refcyc_per_line_delivery_l 620 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_L, dlg_attr->refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 920 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_L, &dlg_attr->refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 213 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c dlg_regs->refcyc_per_line_delivery_pre_c, dlg_regs->refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 273 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c dlg_regs->refcyc_per_line_delivery_pre_c, dlg_regs->refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 121 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_L, dlg_attr->refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 1118 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_L, &dlg_attr->refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 884 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c double refcyc_per_line_delivery_l; refcyc_per_line_delivery_l 1186 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_l = 0.; refcyc_per_line_delivery_l 1220 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_l = get_refcyc_per_delivery(mode_lib, refcyc_per_line_delivery_l 1242 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_l); refcyc_per_line_delivery_l 1497 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 1500 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_l < (unsigned int) dml_pow(2, 13)); refcyc_per_line_delivery_l 884 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c double refcyc_per_line_delivery_l; refcyc_per_line_delivery_l 1186 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_l = 0.; refcyc_per_line_delivery_l 1220 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_l = get_refcyc_per_delivery(mode_lib, refcyc_per_line_delivery_l 1242 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_l); refcyc_per_line_delivery_l 1497 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 1500 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_l < (unsigned int) dml_pow(2, 13)); refcyc_per_line_delivery_l 931 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c double refcyc_per_line_delivery_l; refcyc_per_line_delivery_l 1238 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_l = 0.; refcyc_per_line_delivery_l 1274 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_l = get_refcyc_per_delivery( refcyc_per_line_delivery_l 1298 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_l); refcyc_per_line_delivery_l 1597 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor( refcyc_per_line_delivery_l 1598 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_l, 1); refcyc_per_line_delivery_l 1600 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_l < (unsigned int)dml_pow(2, 13)); refcyc_per_line_delivery_l 441 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int refcyc_per_line_delivery_l; refcyc_per_line_delivery_l 296 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c dlg_regs.refcyc_per_line_delivery_l); refcyc_per_line_delivery_l 1098 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c double refcyc_per_line_delivery_l; refcyc_per_line_delivery_l 1624 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_l = 0.; refcyc_per_line_delivery_l 1654 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_l = get_refcyc_per_delivery( refcyc_per_line_delivery_l 1673 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_l); refcyc_per_line_delivery_l 1678 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor( refcyc_per_line_delivery_l 1679 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_l, refcyc_per_line_delivery_l 1682 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_l < (unsigned int) dml_pow(2, 13));