refcyc_per_line_delivery_c 621 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_C, dlg_attr->refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 921 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_C, &dlg_attr->refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 214 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c dlg_regs->refcyc_per_line_delivery_c, dlg_regs->chunk_hdl_adjust_cur0, dlg_regs->dst_y_offset_cur1, refcyc_per_line_delivery_c 274 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c dlg_regs->refcyc_per_line_delivery_c, dlg_regs->chunk_hdl_adjust_cur0, dlg_regs->dst_y_offset_cur1, refcyc_per_line_delivery_c 122 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_C, dlg_attr->refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 1119 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_C, &dlg_attr->refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 885 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c double refcyc_per_line_delivery_c; refcyc_per_line_delivery_c 1187 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_c = 0.; refcyc_per_line_delivery_c 1256 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_c = get_refcyc_per_delivery(mode_lib, refcyc_per_line_delivery_c 1272 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 1504 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c, refcyc_per_line_delivery_c 1507 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_c < (unsigned int) dml_pow(2, 13)); refcyc_per_line_delivery_c 885 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c double refcyc_per_line_delivery_c; refcyc_per_line_delivery_c 1187 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_c = 0.; refcyc_per_line_delivery_c 1256 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_c = get_refcyc_per_delivery(mode_lib, refcyc_per_line_delivery_c 1272 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 1504 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c, refcyc_per_line_delivery_c 1507 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_c < (unsigned int) dml_pow(2, 13)); refcyc_per_line_delivery_c 932 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c double refcyc_per_line_delivery_c; refcyc_per_line_delivery_c 1239 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_c = 0.; refcyc_per_line_delivery_c 1313 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_c = get_refcyc_per_delivery( refcyc_per_line_delivery_c 1332 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 1604 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor( refcyc_per_line_delivery_c 1605 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c refcyc_per_line_delivery_c, 1); refcyc_per_line_delivery_c 1607 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_c < (unsigned int)dml_pow(2, 13)); refcyc_per_line_delivery_c 442 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int refcyc_per_line_delivery_c; refcyc_per_line_delivery_c 299 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c dlg_regs.refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 1099 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c double refcyc_per_line_delivery_c; refcyc_per_line_delivery_c 1625 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_c = 0.; refcyc_per_line_delivery_c 1695 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_c = get_refcyc_per_delivery( refcyc_per_line_delivery_c 1712 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_c); refcyc_per_line_delivery_c 1717 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor( refcyc_per_line_delivery_c 1718 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c refcyc_per_line_delivery_c, refcyc_per_line_delivery_c 1721 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c ASSERT(disp_dlg_regs->refcyc_per_line_delivery_c < (unsigned int) dml_pow(2, 13));