RLC_ENABLE_F32   1840 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 0);
RLC_ENABLE_F32   1881 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);
RLC_ENABLE_F32   4058 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;
RLC_ENABLE_F32   4104 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 0);
RLC_ENABLE_F32   4121 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 1);
RLC_ENABLE_F32   2949 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0);
RLC_ENABLE_F32   2968 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);