refclk 259 drivers/gpu/drm/bridge/tc358767.c struct clk *refclk; refclk 461 drivers/gpu/drm/bridge/tc358767.c static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) refclk 475 drivers/gpu/drm/bridge/tc358767.c refclk); refclk 483 drivers/gpu/drm/bridge/tc358767.c if (refclk / ext_div[i_pre] < 1000000) refclk 492 drivers/gpu/drm/bridge/tc358767.c do_div(tmp, refclk); refclk 499 drivers/gpu/drm/bridge/tc358767.c clk = (refclk / ext_div[i_pre] / div) * mul; refclk 529 drivers/gpu/drm/bridge/tc358767.c dev_dbg(tc->dev, "PLL: %d / %d / %d * %d / %d\n", refclk, refclk 533 drivers/gpu/drm/bridge/tc358767.c if (refclk / ext_div[best_pre] / best_div * best_mul >= 300000000) refclk 592 drivers/gpu/drm/bridge/tc358767.c rate = clk_get_rate(tc->refclk); refclk 1157 drivers/gpu/drm/bridge/tc358767.c ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk), refclk 1556 drivers/gpu/drm/bridge/tc358767.c tc->refclk = devm_clk_get(dev, "ref"); refclk 1557 drivers/gpu/drm/bridge/tc358767.c if (IS_ERR(tc->refclk)) { refclk 1558 drivers/gpu/drm/bridge/tc358767.c ret = PTR_ERR(tc->refclk); refclk 1632 drivers/gpu/drm/bridge/tc358767.c clk_get_rate(tc->refclk) * 2 / 1000); refclk 98 drivers/gpu/drm/bridge/ti-sn65dsi86.c struct clk *refclk; refclk 399 drivers/gpu/drm/bridge/ti-sn65dsi86.c if (pdata->refclk) { refclk 400 drivers/gpu/drm/bridge/ti-sn65dsi86.c refclk_rate = clk_get_rate(pdata->refclk); refclk 403 drivers/gpu/drm/bridge/ti-sn65dsi86.c clk_prepare_enable(pdata->refclk); refclk 593 drivers/gpu/drm/bridge/ti-sn65dsi86.c if (pdata->refclk) refclk 594 drivers/gpu/drm/bridge/ti-sn65dsi86.c clk_disable_unprepare(pdata->refclk); refclk 745 drivers/gpu/drm/bridge/ti-sn65dsi86.c pdata->refclk = devm_clk_get(pdata->dev, "refclk"); refclk 746 drivers/gpu/drm/bridge/ti-sn65dsi86.c if (IS_ERR(pdata->refclk)) { refclk 747 drivers/gpu/drm/bridge/ti-sn65dsi86.c ret = PTR_ERR(pdata->refclk); refclk 751 drivers/gpu/drm/bridge/ti-sn65dsi86.c pdata->refclk = NULL; refclk 24 drivers/gpu/drm/gma500/cdv_intel_display.c int refclk, struct gma_clock_t *best_clock); refclk 364 drivers/gpu/drm/gma500/cdv_intel_display.c int refclk) refclk 372 drivers/gpu/drm/gma500/cdv_intel_display.c if (refclk == 96000) refclk 378 drivers/gpu/drm/gma500/cdv_intel_display.c if (refclk == 27000) refclk 383 drivers/gpu/drm/gma500/cdv_intel_display.c if (refclk == 27000) refclk 392 drivers/gpu/drm/gma500/cdv_intel_display.c static void cdv_intel_clock(int refclk, struct gma_clock_t *clock) refclk 396 drivers/gpu/drm/gma500/cdv_intel_display.c clock->vco = (refclk * clock->m) / clock->n; refclk 402 drivers/gpu/drm/gma500/cdv_intel_display.c int refclk, refclk 408 drivers/gpu/drm/gma500/cdv_intel_display.c switch (refclk) { refclk 445 drivers/gpu/drm/gma500/cdv_intel_display.c gma_crtc->clock_funcs->clock(refclk, &clock); refclk 579 drivers/gpu/drm/gma500/cdv_intel_display.c int refclk; refclk 627 drivers/gpu/drm/gma500/cdv_intel_display.c refclk = 96000; refclk 630 drivers/gpu/drm/gma500/cdv_intel_display.c refclk = 27000; refclk 641 drivers/gpu/drm/gma500/cdv_intel_display.c refclk = 27000; refclk 643 drivers/gpu/drm/gma500/cdv_intel_display.c refclk = 100000; refclk 647 drivers/gpu/drm/gma500/cdv_intel_display.c refclk = dev_priv->lvds_ssc_freq * 1000; refclk 653 drivers/gpu/drm/gma500/cdv_intel_display.c limit = gma_crtc->clock_funcs->limit(crtc, refclk); refclk 655 drivers/gpu/drm/gma500/cdv_intel_display.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, refclk 830 drivers/gpu/drm/gma500/cdv_intel_display.c static void i8xx_clock(int refclk, struct gma_clock_t *clock) refclk 834 drivers/gpu/drm/gma500/cdv_intel_display.c clock->vco = refclk * clock->m / (clock->n + 2); refclk 700 drivers/gpu/drm/gma500/gma_display.c struct drm_crtc *crtc, int target, int refclk, refclk 743 drivers/gpu/drm/gma500/gma_display.c clock_funcs->clock(refclk, &clock); refclk 43 drivers/gpu/drm/gma500/gma_display.h int target, int refclk, refclk 48 drivers/gpu/drm/gma500/gma_display.h void (*clock)(int refclk, struct gma_clock_t *clock); refclk 49 drivers/gpu/drm/gma500/gma_display.h const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk); refclk 85 drivers/gpu/drm/gma500/gma_display.h extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk); refclk 86 drivers/gpu/drm/gma500/gma_display.h extern void gma_clock(int refclk, struct gma_clock_t *clock); refclk 91 drivers/gpu/drm/gma500/gma_display.h struct drm_crtc *crtc, int target, int refclk, refclk 620 drivers/gpu/drm/gma500/mdfld_intel_display.c static void mdfld_clock(int refclk, struct mrst_clock_t *clock) refclk 622 drivers/gpu/drm/gma500/mdfld_intel_display.c clock->dot = (refclk * clock->m) / clock->p1; refclk 630 drivers/gpu/drm/gma500/mdfld_intel_display.c mdfldFindBestPLL(struct drm_crtc *crtc, int target, int refclk, refclk 644 drivers/gpu/drm/gma500/mdfld_intel_display.c mdfld_clock(refclk, &clock); refclk 667 drivers/gpu/drm/gma500/mdfld_intel_display.c int refclk = 0; refclk 858 drivers/gpu/drm/gma500/mdfld_intel_display.c refclk = 19200; refclk 865 drivers/gpu/drm/gma500/mdfld_intel_display.c refclk = 25000; refclk 873 drivers/gpu/drm/gma500/mdfld_intel_display.c refclk = 83000; refclk 882 drivers/gpu/drm/gma500/mdfld_intel_display.c refclk = 100000; refclk 901 drivers/gpu/drm/gma500/mdfld_intel_display.c ok = mdfldFindBestPLL(crtc, clk_tmp, refclk, &clock); refclk 38 drivers/gpu/drm/gma500/oaktrail_crtc.c int refclk, struct gma_clock_t *best_clock); refclk 42 drivers/gpu/drm/gma500/oaktrail_crtc.c int refclk, struct gma_clock_t *best_clock); refclk 81 drivers/gpu/drm/gma500/oaktrail_crtc.c int refclk) refclk 111 drivers/gpu/drm/gma500/oaktrail_crtc.c static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock) refclk 113 drivers/gpu/drm/gma500/oaktrail_crtc.c clock->dot = (refclk * clock->m) / (14 * clock->p1); refclk 125 drivers/gpu/drm/gma500/oaktrail_crtc.c int refclk, struct gma_clock_t *best_clock) refclk 150 drivers/gpu/drm/gma500/oaktrail_crtc.c actual_freq = (refclk * clock.m) / refclk 183 drivers/gpu/drm/gma500/oaktrail_crtc.c int refclk, struct gma_clock_t *best_clock) refclk 196 drivers/gpu/drm/gma500/oaktrail_crtc.c mrst_lvds_clock(refclk, &clock); refclk 367 drivers/gpu/drm/gma500/oaktrail_crtc.c int refclk = 0; refclk 501 drivers/gpu/drm/gma500/oaktrail_crtc.c refclk = is_sdvo ? 96000 : dev_priv->core_freq * 1000; refclk 502 drivers/gpu/drm/gma500/oaktrail_crtc.c limit = mrst_limit(crtc, refclk); refclk 504 drivers/gpu/drm/gma500/oaktrail_crtc.c refclk, &clock); refclk 177 drivers/gpu/drm/gma500/oaktrail_hdmi.c int refclk, struct oaktrail_hdmi_clock *best_clock) refclk 189 drivers/gpu/drm/gma500/oaktrail_hdmi.c nr_min = DIV_ROUND_UP((refclk * 1000), (target * 10 * np_max)); refclk 190 drivers/gpu/drm/gma500/oaktrail_hdmi.c nr_max = DIV_ROUND_UP((refclk * 1000), (target * 10 * np_min)); refclk 196 drivers/gpu/drm/gma500/oaktrail_hdmi.c np = DIV_ROUND_UP((refclk * 1000), (target * 10 * nr_max)); refclk 197 drivers/gpu/drm/gma500/oaktrail_hdmi.c nr = DIV_ROUND_UP((refclk * 1000), (target * 10 * np)); refclk 198 drivers/gpu/drm/gma500/oaktrail_hdmi.c nf = DIV_ROUND_CLOSEST((target * 10 * np * nr), refclk); refclk 281 drivers/gpu/drm/gma500/oaktrail_hdmi.c int refclk; refclk 305 drivers/gpu/drm/gma500/oaktrail_hdmi.c refclk = 25000; refclk 306 drivers/gpu/drm/gma500/oaktrail_hdmi.c oaktrail_hdmi_find_dpll(crtc, adjusted_mode->clock, refclk, &clock); refclk 55 drivers/gpu/drm/gma500/psb_intel_display.c int refclk) refclk 66 drivers/gpu/drm/gma500/psb_intel_display.c static void psb_intel_clock(int refclk, struct gma_clock_t *clock) refclk 70 drivers/gpu/drm/gma500/psb_intel_display.c clock->vco = refclk * clock->m / (clock->n + 2); refclk 103 drivers/gpu/drm/gma500/psb_intel_display.c int refclk; refclk 138 drivers/gpu/drm/gma500/psb_intel_display.c refclk = 96000; refclk 140 drivers/gpu/drm/gma500/psb_intel_display.c limit = gma_crtc->clock_funcs->limit(crtc, refclk); refclk 142 drivers/gpu/drm/gma500/psb_intel_display.c ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, refclk 1231 drivers/gpu/drm/i915/display/intel_ddi.c int refclk; refclk 1245 drivers/gpu/drm/i915/display/intel_ddi.c refclk = 24; refclk 1247 drivers/gpu/drm/i915/display/intel_ddi.c refclk = 135; refclk 1257 drivers/gpu/drm/i915/display/intel_ddi.c refclk = 135; refclk 1260 drivers/gpu/drm/i915/display/intel_ddi.c refclk = 2700; refclk 1272 drivers/gpu/drm/i915/display/intel_ddi.c return (refclk * n * 100) / (p * r); refclk 533 drivers/gpu/drm/i915/display/intel_display.c static int pnv_calc_dpll_params(int refclk, struct dpll *clock) refclk 539 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); refclk 550 drivers/gpu/drm/i915/display/intel_display.c static int i9xx_calc_dpll_params(int refclk, struct dpll *clock) refclk 556 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2); refclk 562 drivers/gpu/drm/i915/display/intel_display.c static int vlv_calc_dpll_params(int refclk, struct dpll *clock) refclk 568 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); refclk 574 drivers/gpu/drm/i915/display/intel_display.c int chv_calc_dpll_params(int refclk, struct dpll *clock) refclk 580 drivers/gpu/drm/i915/display/intel_display.c clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m), refclk 668 drivers/gpu/drm/i915/display/intel_display.c int target, int refclk, struct dpll *match_clock, refclk 691 drivers/gpu/drm/i915/display/intel_display.c i9xx_calc_dpll_params(refclk, &clock); refclk 726 drivers/gpu/drm/i915/display/intel_display.c int target, int refclk, struct dpll *match_clock, refclk 747 drivers/gpu/drm/i915/display/intel_display.c pnv_calc_dpll_params(refclk, &clock); refclk 782 drivers/gpu/drm/i915/display/intel_display.c int target, int refclk, struct dpll *match_clock, refclk 808 drivers/gpu/drm/i915/display/intel_display.c i9xx_calc_dpll_params(refclk, &clock); refclk 876 drivers/gpu/drm/i915/display/intel_display.c int target, int refclk, struct dpll *match_clock, refclk 884 drivers/gpu/drm/i915/display/intel_display.c int max_n = min(limit->n.max, refclk / 19200); refclk 902 drivers/gpu/drm/i915/display/intel_display.c refclk * clock.m1); refclk 904 drivers/gpu/drm/i915/display/intel_display.c vlv_calc_dpll_params(refclk, &clock); refclk 936 drivers/gpu/drm/i915/display/intel_display.c int target, int refclk, struct dpll *match_clock, refclk 966 drivers/gpu/drm/i915/display/intel_display.c refclk * clock.m1); refclk 973 drivers/gpu/drm/i915/display/intel_display.c chv_calc_dpll_params(refclk, &clock); refclk 994 drivers/gpu/drm/i915/display/intel_display.c int refclk = 100000; refclk 998 drivers/gpu/drm/i915/display/intel_display.c crtc_state->port_clock, refclk, refclk 8344 drivers/gpu/drm/i915/display/intel_display.c int refclk = 48000; refclk 8351 drivers/gpu/drm/i915/display/intel_display.c refclk = dev_priv->vbt.lvds_ssc_freq; refclk 8352 drivers/gpu/drm/i915/display/intel_display.c DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); refclk 8364 drivers/gpu/drm/i915/display/intel_display.c refclk, NULL, &crtc_state->dpll)) { refclk 8379 drivers/gpu/drm/i915/display/intel_display.c int refclk = 96000; refclk 8386 drivers/gpu/drm/i915/display/intel_display.c refclk = dev_priv->vbt.lvds_ssc_freq; refclk 8387 drivers/gpu/drm/i915/display/intel_display.c DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); refclk 8406 drivers/gpu/drm/i915/display/intel_display.c refclk, NULL, &crtc_state->dpll)) { refclk 8422 drivers/gpu/drm/i915/display/intel_display.c int refclk = 96000; refclk 8429 drivers/gpu/drm/i915/display/intel_display.c refclk = dev_priv->vbt.lvds_ssc_freq; refclk 8430 drivers/gpu/drm/i915/display/intel_display.c DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); refclk 8440 drivers/gpu/drm/i915/display/intel_display.c refclk, NULL, &crtc_state->dpll)) { refclk 8456 drivers/gpu/drm/i915/display/intel_display.c int refclk = 96000; refclk 8463 drivers/gpu/drm/i915/display/intel_display.c refclk = dev_priv->vbt.lvds_ssc_freq; refclk 8464 drivers/gpu/drm/i915/display/intel_display.c DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); refclk 8474 drivers/gpu/drm/i915/display/intel_display.c refclk, NULL, &crtc_state->dpll)) { refclk 8487 drivers/gpu/drm/i915/display/intel_display.c int refclk = 100000; refclk 8495 drivers/gpu/drm/i915/display/intel_display.c refclk, NULL, &crtc_state->dpll)) { refclk 8508 drivers/gpu/drm/i915/display/intel_display.c int refclk = 100000; refclk 8516 drivers/gpu/drm/i915/display/intel_display.c refclk, NULL, &crtc_state->dpll)) { refclk 8569 drivers/gpu/drm/i915/display/intel_display.c int refclk = 100000; refclk 8585 drivers/gpu/drm/i915/display/intel_display.c pipe_config->port_clock = vlv_calc_dpll_params(refclk, &clock); refclk 8680 drivers/gpu/drm/i915/display/intel_display.c int refclk = 100000; refclk 8702 drivers/gpu/drm/i915/display/intel_display.c pipe_config->port_clock = chv_calc_dpll_params(refclk, &clock); refclk 9640 drivers/gpu/drm/i915/display/intel_display.c int refclk = 120000; refclk 9653 drivers/gpu/drm/i915/display/intel_display.c refclk = dev_priv->vbt.lvds_ssc_freq; refclk 9657 drivers/gpu/drm/i915/display/intel_display.c if (refclk == 100000) refclk 9662 drivers/gpu/drm/i915/display/intel_display.c if (refclk == 100000) refclk 9673 drivers/gpu/drm/i915/display/intel_display.c refclk, NULL, &crtc_state->dpll)) { refclk 11294 drivers/gpu/drm/i915/display/intel_display.c int refclk = i9xx_pll_refclk(dev, pipe_config); refclk 11334 drivers/gpu/drm/i915/display/intel_display.c port_clock = pnv_calc_dpll_params(refclk, &clock); refclk 11336 drivers/gpu/drm/i915/display/intel_display.c port_clock = i9xx_calc_dpll_params(refclk, &clock); refclk 11362 drivers/gpu/drm/i915/display/intel_display.c port_clock = i9xx_calc_dpll_params(refclk, &clock); refclk 507 drivers/gpu/drm/i915/display/intel_display.h int chv_calc_dpll_params(int refclk, struct dpll *pll_clock); refclk 263 drivers/gpu/drm/i915/display/vlv_dsi_pll.c int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; refclk 311 drivers/gpu/drm/i915/display/vlv_dsi_pll.c dsi_clock = (m * refclk) / (p * n); refclk 199 drivers/gpu/drm/nouveau/dispnv04/hw.c pllvals->refclk = pll_lim.refclk; refclk 210 drivers/gpu/drm/nouveau/dispnv04/hw.c return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P; refclk 20 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h int refclk; refclk 47 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h u32 refclk; refclk 328 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c info->refclk = nvbios_rd32(bios, data + 31); refclk 351 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c info->refclk = nvbios_rd32(bios, data + 28); refclk 354 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c info->refclk = nvbios_rd16(bios, data + 9) * 1000; refclk 369 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c info->refclk = nvbios_rd16(bios, data + 1) * 1000; refclk 387 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c if (!info->refclk) { refclk 388 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c info->refclk = device->crystal; refclk 394 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c info->refclk = 200000; refclk 396 drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c info->refclk = 25000; refclk 261 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c limits.refclk = read_div(clk, idx, 0x137120, 0x137140); refclk 262 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c if (!limits.refclk) refclk 274 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c limits.refclk = read_div(clk, idx, 0x137120, 0x137140); refclk 275 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c if (!limits.refclk) refclk 259 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c ret = gt215_clk_info(&clk->base, idx - 0x10, limits.refclk, info); refclk 260 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c if (ret != limits.refclk) refclk 177 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c pll.refclk = nvkm_clk_read(&clk->base, nv_clk_src_href); refclk 178 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c if (!pll.refclk) refclk 38 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c pv->refclk = info->refclk; refclk 336 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c pll.refclk = read_pll_ref(clk, reg); refclk 337 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c if (!pll.refclk) refclk 42 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; refclk 44 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; refclk 50 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c N = tmp / info->refclk; refclk 51 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c fN = tmp % info->refclk; refclk 54 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c if (fN >= info->refclk / 2) refclk 57 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c if (fN < info->refclk / 2) refclk 59 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c fN = tmp - (N * info->refclk); refclk 67 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c err = abs(freq - (info->refclk * N / M / *P)); refclk 75 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; refclk 86 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.c return info->refclk * *pN / *pM / *P; refclk 48 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c int crystal = info->refclk; refclk 149 drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c int crystal = info->refclk; refclk 374 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c pv.refclk = info.refclk; refclk 215 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c ret = gt215_pll_calc(subdev, &ram->refpll, ram->mempll.refclk, refclk 1045 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c int refclk, i; refclk 1063 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c refclk = next->freq; refclk 1068 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c fuc->mempll.refclk = ret; refclk 1077 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c ret = gt215_pll_calc(subdev, &fuc->refpll, refclk, &ram->N1, refclk 1079 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c fuc->mempll.refclk = ret; refclk 489 drivers/media/dvb-frontends/stb6100.c int refclk = 27000000; /* Hz */ refclk 496 drivers/media/dvb-frontends/stb6100.c state->reference = refclk / 1000; /* kHz */ refclk 90 drivers/media/dvb-frontends/stv090x.h int (*tuner_set_refclk)(struct dvb_frontend *fe, u32 refclk); refclk 16 drivers/media/dvb-frontends/stv6110x.h u32 refclk; refclk 42 drivers/media/dvb-frontends/stv6110x.h int (*tuner_set_refclk) (struct dvb_frontend *fe, u32 refclk); refclk 53 drivers/media/dvb-frontends/stv6110x_priv.h #define REFCLOCK_kHz (stv6110x->config->refclk / 1000) refclk 54 drivers/media/dvb-frontends/stv6110x_priv.h #define REFCLOCK_MHz (stv6110x->config->refclk / 1000000) refclk 1900 drivers/media/i2c/tc358743.c struct clk *refclk; refclk 1904 drivers/media/i2c/tc358743.c refclk = devm_clk_get(dev, "refclk"); refclk 1905 drivers/media/i2c/tc358743.c if (IS_ERR(refclk)) { refclk 1906 drivers/media/i2c/tc358743.c if (PTR_ERR(refclk) != -EPROBE_DEFER) refclk 1908 drivers/media/i2c/tc358743.c PTR_ERR(refclk)); refclk 1909 drivers/media/i2c/tc358743.c return PTR_ERR(refclk); refclk 1940 drivers/media/i2c/tc358743.c ret = clk_prepare_enable(refclk); refclk 1946 drivers/media/i2c/tc358743.c state->pdata.refclk_hz = clk_get_rate(refclk); refclk 2015 drivers/media/i2c/tc358743.c clk_disable_unprepare(refclk); refclk 1110 drivers/media/pci/ddbridge/ddbridge-core.c .refclk = 27000000, refclk 1116 drivers/media/pci/ddbridge/ddbridge-core.c .refclk = 27000000, refclk 1019 drivers/media/pci/ngene/ngene-cards.c .refclk = 27000000, refclk 1025 drivers/media/pci/ngene/ngene-cards.c .refclk = 27000000, refclk 466 drivers/media/pci/ttpci/budget.c .refclk = 27000000, refclk 69 drivers/media/platform/sti/c8sectpfe/c8sectpfe-dvb.c .refclk = 16000000, refclk 514 drivers/media/usb/dvb-usb/technisat-usb2.c .refclk = 16000000, refclk 33 drivers/net/ethernet/arc/emac_rockchip.c struct clk *refclk; refclk 146 drivers/net/ethernet/arc/emac_rockchip.c priv->refclk = devm_clk_get(dev, "macref"); refclk 147 drivers/net/ethernet/arc/emac_rockchip.c if (IS_ERR(priv->refclk)) { refclk 149 drivers/net/ethernet/arc/emac_rockchip.c PTR_ERR(priv->refclk)); refclk 150 drivers/net/ethernet/arc/emac_rockchip.c err = PTR_ERR(priv->refclk); refclk 154 drivers/net/ethernet/arc/emac_rockchip.c err = clk_prepare_enable(priv->refclk); refclk 194 drivers/net/ethernet/arc/emac_rockchip.c err = clk_set_rate(priv->refclk, 50000000); refclk 240 drivers/net/ethernet/arc/emac_rockchip.c clk_disable_unprepare(priv->refclk); refclk 254 drivers/net/ethernet/arc/emac_rockchip.c clk_disable_unprepare(priv->refclk); refclk 457 drivers/net/ethernet/ti/cpts.c clk_enable(cpts->refclk); refclk 476 drivers/net/ethernet/ti/cpts.c clk_disable(cpts->refclk); refclk 495 drivers/net/ethernet/ti/cpts.c clk_disable(cpts->refclk); refclk 504 drivers/net/ethernet/ti/cpts.c freq = clk_get_rate(cpts->refclk); refclk 652 drivers/net/ethernet/ti/cpts.c cpts->refclk = devm_get_clk_from_child(dev, node, "cpts"); refclk 653 drivers/net/ethernet/ti/cpts.c if (IS_ERR(cpts->refclk)) refclk 655 drivers/net/ethernet/ti/cpts.c cpts->refclk = devm_clk_get(dev, "cpts"); refclk 657 drivers/net/ethernet/ti/cpts.c if (IS_ERR(cpts->refclk)) { refclk 659 drivers/net/ethernet/ti/cpts.c PTR_ERR(cpts->refclk)); refclk 660 drivers/net/ethernet/ti/cpts.c return ERR_CAST(cpts->refclk); refclk 663 drivers/net/ethernet/ti/cpts.c ret = clk_prepare(cpts->refclk); refclk 686 drivers/net/ethernet/ti/cpts.c if (WARN_ON(!cpts->refclk)) refclk 689 drivers/net/ethernet/ti/cpts.c clk_unprepare(cpts->refclk); refclk 111 drivers/net/ethernet/ti/cpts.h struct clk *refclk; refclk 480 drivers/net/wireless/ath/ath10k/hw.c .refclk = 48000000, refclk 488 drivers/net/wireless/ath/ath10k/hw.c .refclk = 19200000, refclk 496 drivers/net/wireless/ath/ath10k/hw.c .refclk = 24000000, refclk 504 drivers/net/wireless/ath/ath10k/hw.c .refclk = 26000000, refclk 512 drivers/net/wireless/ath/ath10k/hw.c .refclk = 37400000, refclk 520 drivers/net/wireless/ath/ath10k/hw.c .refclk = 38400000, refclk 528 drivers/net/wireless/ath/ath10k/hw.c .refclk = 40000000, refclk 536 drivers/net/wireless/ath/ath10k/hw.c .refclk = 52000000, refclk 502 drivers/net/wireless/ath/ath10k/hw.h u32 refclk; refclk 125 drivers/phy/motorola/phy-cpcap-usb.c struct clk *refclk; refclk 673 drivers/phy/motorola/phy-cpcap-usb.c clk_unprepare(ddata->refclk); refclk 38 drivers/phy/phy-pistachio-usb.c unsigned int refclk; refclk 68 drivers/phy/phy-pistachio-usb.c p_phy->refclk << USB_PHY_STRAP_CONTROL_REFCLK_SHIFT); refclk 71 drivers/phy/phy-pistachio-usb.c if (p_phy->refclk == REFCLK_XO_CRYSTAL && rate != 12000000) { refclk 161 drivers/phy/phy-pistachio-usb.c &p_phy->refclk); refclk 56 drivers/phy/ti/phy-dm816x-usb.c struct clk *refclk; refclk 87 drivers/phy/ti/phy-dm816x-usb.c if (clk_get_rate(phy->refclk) != 24000000) refclk 134 drivers/phy/ti/phy-dm816x-usb.c clk_disable(phy->refclk); refclk 145 drivers/phy/ti/phy-dm816x-usb.c error = clk_enable(phy->refclk); refclk 162 drivers/phy/ti/phy-dm816x-usb.c clk_disable(phy->refclk); refclk 240 drivers/phy/ti/phy-dm816x-usb.c phy->refclk = devm_clk_get(phy->dev, "refclk"); refclk 241 drivers/phy/ti/phy-dm816x-usb.c if (IS_ERR(phy->refclk)) refclk 242 drivers/phy/ti/phy-dm816x-usb.c return PTR_ERR(phy->refclk); refclk 243 drivers/phy/ti/phy-dm816x-usb.c error = clk_prepare(phy->refclk); refclk 270 drivers/phy/ti/phy-dm816x-usb.c clk_unprepare(phy->refclk); refclk 171 drivers/phy/ti/phy-ti-pipe3.c struct clk *refclk; refclk 608 drivers/phy/ti/phy-ti-pipe3.c phy->refclk = devm_clk_get(dev, "refclk"); refclk 609 drivers/phy/ti/phy-ti-pipe3.c if (IS_ERR(phy->refclk)) { refclk 615 drivers/phy/ti/phy-ti-pipe3.c return PTR_ERR(phy->refclk); refclk 833 drivers/phy/ti/phy-ti-pipe3.c if (!IS_ERR(phy->refclk)) { refclk 834 drivers/phy/ti/phy-ti-pipe3.c clk_prepare_enable(phy->refclk); refclk 862 drivers/phy/ti/phy-ti-pipe3.c if (!IS_ERR(phy->refclk)) { refclk 863 drivers/phy/ti/phy-ti-pipe3.c ret = clk_prepare_enable(phy->refclk); refclk 893 drivers/phy/ti/phy-ti-pipe3.c if (!IS_ERR(phy->refclk)) refclk 894 drivers/phy/ti/phy-ti-pipe3.c clk_disable_unprepare(phy->refclk); refclk 903 drivers/phy/ti/phy-ti-pipe3.c if (!IS_ERR(phy->refclk)) { refclk 904 drivers/phy/ti/phy-ti-pipe3.c clk_disable_unprepare(phy->refclk); refclk 910 drivers/phy/ti/phy-ti-pipe3.c clk_disable_unprepare(phy->refclk); refclk 2490 drivers/scsi/hisi_sas/hisi_sas_main.c struct clk *refclk; refclk 2529 drivers/scsi/hisi_sas/hisi_sas_main.c refclk = devm_clk_get(dev, NULL); refclk 2530 drivers/scsi/hisi_sas/hisi_sas_main.c if (IS_ERR(refclk)) refclk 2533 drivers/scsi/hisi_sas/hisi_sas_main.c hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000; refclk 6816 drivers/scsi/ufs/ufshcd.c void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk) refclk 6820 drivers/scsi/ufs/ufshcd.c freq = clk_get_rate(refclk); refclk 809 drivers/scsi/ufs/ufshcd.h void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk); refclk 296 drivers/soc/xilinx/xlnx_vcu.c u32 refclk, coreclk, mcuclk, inte, deci; refclk 312 drivers/soc/xilinx/xlnx_vcu.c refclk = (inte * MHZ) + (deci * (MHZ / FRAC)); refclk 313 drivers/soc/xilinx/xlnx_vcu.c dev_dbg(xvcu->dev, "Ref clock from logicoreIP is %uHz\n", refclk); refclk 318 drivers/soc/xilinx/xlnx_vcu.c ret = clk_set_rate(xvcu->pll_ref, refclk); refclk 328 drivers/soc/xilinx/xlnx_vcu.c refclk = clk_get_rate(xvcu->pll_ref); refclk 346 drivers/soc/xilinx/xlnx_vcu.c fvco = cfg->fbdiv * refclk; refclk 379 drivers/soc/xilinx/xlnx_vcu.c dev_dbg(xvcu->dev, "Actual Ref clock freq is %uHz\n", refclk); refclk 137 drivers/spi/spi-zynq-qspi.c struct clk *refclk; refclk 336 drivers/spi/spi-zynq-qspi.c (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > refclk 374 drivers/spi/spi-zynq-qspi.c clk_enable(qspi->refclk); refclk 647 drivers/spi/spi-zynq-qspi.c xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); refclk 648 drivers/spi/spi-zynq-qspi.c if (IS_ERR(xqspi->refclk)) { refclk 650 drivers/spi/spi-zynq-qspi.c ret = PTR_ERR(xqspi->refclk); refclk 660 drivers/spi/spi-zynq-qspi.c ret = clk_prepare_enable(xqspi->refclk); refclk 693 drivers/spi/spi-zynq-qspi.c ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; refclk 704 drivers/spi/spi-zynq-qspi.c clk_disable_unprepare(xqspi->refclk); refclk 729 drivers/spi/spi-zynq-qspi.c clk_disable_unprepare(xqspi->refclk); refclk 160 drivers/spi/spi-zynqmp-gqspi.c struct clk *refclk; refclk 462 drivers/spi/spi-zynqmp-gqspi.c clk_rate = clk_get_rate(xqspi->refclk); refclk 934 drivers/spi/spi-zynqmp-gqspi.c ret = clk_enable(xqspi->refclk); refclk 943 drivers/spi/spi-zynqmp-gqspi.c clk_disable(xqspi->refclk); refclk 961 drivers/spi/spi-zynqmp-gqspi.c clk_disable(xqspi->refclk); refclk 987 drivers/spi/spi-zynqmp-gqspi.c ret = clk_enable(xqspi->refclk); refclk 1050 drivers/spi/spi-zynqmp-gqspi.c xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); refclk 1051 drivers/spi/spi-zynqmp-gqspi.c if (IS_ERR(xqspi->refclk)) { refclk 1053 drivers/spi/spi-zynqmp-gqspi.c ret = PTR_ERR(xqspi->refclk); refclk 1057 drivers/spi/spi-zynqmp-gqspi.c ret = clk_prepare_enable(xqspi->refclk); refclk 1093 drivers/spi/spi-zynqmp-gqspi.c master->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; refclk 1110 drivers/spi/spi-zynqmp-gqspi.c clk_disable_unprepare(xqspi->refclk); refclk 1135 drivers/spi/spi-zynqmp-gqspi.c clk_disable_unprepare(xqspi->refclk); refclk 28 drivers/usb/cdns3/drd.h __le32 refclk; refclk 46 drivers/usb/cdns3/drd.h __le32 refclk; refclk 80 drivers/video/fbdev/mb862xx/mb862xxfb.h unsigned int refclk; /* disp. reference clock */ refclk 218 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c sc = par->refclk / (1000000 / fbi->var.pixclock) - 1; refclk 448 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c fbi->var.pixclock = (sc * 1000000) / par->refclk; refclk 639 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->refclk = GC_DISP_REFCLK_400; refclk 853 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->refclk = GC_DISP_REFCLK_400; refclk 936 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->refclk = GC_DISP_REFCLK_533; refclk 1281 sound/soc/codecs/arizona.c int ref, div, refclk; refclk 1286 sound/soc/codecs/arizona.c refclk = priv->sysclk; refclk 1290 sound/soc/codecs/arizona.c refclk = priv->asyncclk; refclk 1296 sound/soc/codecs/arizona.c if (refclk % 8000) refclk 1302 sound/soc/codecs/arizona.c rates[ref] <= refclk; ref++) { refclk 2464 sound/soc/codecs/madera.c int ref, div, refclk; refclk 2472 sound/soc/codecs/madera.c refclk = priv->sysclk; refclk 2476 sound/soc/codecs/madera.c refclk = priv->asyncclk; refclk 2482 sound/soc/codecs/madera.c if (refclk % 4000) refclk 2488 sound/soc/codecs/madera.c if (rates[ref] > refclk) refclk 86 sound/soc/codecs/tlv320dac33.c unsigned int refclk; refclk 840 sound/soc/codecs/tlv320dac33.c #define CALC_OSCSET(rate, refclk) ( \ refclk 841 sound/soc/codecs/tlv320dac33.c ((((rate * 10000) / refclk) * 4096) + 7000) / 10000) refclk 842 sound/soc/codecs/tlv320dac33.c #define CALC_RATIOSET(rate, refclk) ( \ refclk 843 sound/soc/codecs/tlv320dac33.c ((((refclk * 100000) / rate) * 16384) + 50000) / 100000) refclk 860 sound/soc/codecs/tlv320dac33.c oscset = CALC_OSCSET(substream->runtime->rate, dac33->refclk); refclk 862 sound/soc/codecs/tlv320dac33.c dac33->refclk); refclk 1303 sound/soc/codecs/tlv320dac33.c dac33->refclk = freq; refclk 55 sound/soc/meson/axg-spdifin.c struct clk *refclk; refclk 121 sound/soc/meson/axg-spdifin.c ret = clk_prepare_enable(priv->refclk); refclk 140 sound/soc/meson/axg-spdifin.c clk_disable_unprepare(priv->refclk); refclk 193 sound/soc/meson/axg-spdifin.c ret = clk_set_rate(priv->refclk, priv->conf->ref_rate); refclk 203 sound/soc/meson/axg-spdifin.c rate = clk_get_rate(priv->refclk); refclk 489 sound/soc/meson/axg-spdifin.c priv->refclk = devm_clk_get(dev, "refclk"); refclk 490 sound/soc/meson/axg-spdifin.c if (IS_ERR(priv->refclk)) { refclk 491 sound/soc/meson/axg-spdifin.c ret = PTR_ERR(priv->refclk);