ref_rate 195 arch/arm/mach-omap1/clock.c unsigned long ref_rate; ref_rate 197 arch/arm/mach-omap1/clock.c ref_rate = ck_ref_p->rate; ref_rate 203 arch/arm/mach-omap1/clock.c if (ptr->xtal != ref_rate) ref_rate 281 arch/arm/mach-omap1/clock.c unsigned long ref_rate; ref_rate 283 arch/arm/mach-omap1/clock.c ref_rate = ck_ref_p->rate; ref_rate 291 arch/arm/mach-omap1/clock.c if (ptr->xtal != ref_rate) ref_rate 95 arch/mips/ath79/clock.c unsigned long ref_rate; ref_rate 103 arch/mips/ath79/clock.c ref_rate = ath79_setup_ref_clk(AR71XX_BASE_FREQ); ref_rate 108 arch/mips/ath79/clock.c freq = div * ref_rate; ref_rate 146 arch/mips/ath79/clock.c unsigned long ref_rate; ref_rate 159 arch/mips/ath79/clock.c ref_rate = (40 * 1000 * 1000); ref_rate 161 arch/mips/ath79/clock.c ref_rate = (25 * 1000 * 1000); ref_rate 163 arch/mips/ath79/clock.c ath79_setup_ref_clk(ref_rate); ref_rate 234 arch/mips/ath79/clock.c unsigned long ref_rate; ref_rate 247 arch/mips/ath79/clock.c ref_rate = 40 * 1000 * 1000; ref_rate 249 arch/mips/ath79/clock.c ref_rate = 25 * 1000 * 1000; ref_rate 251 arch/mips/ath79/clock.c ref_rate = ath79_setup_ref_clk(ref_rate); ref_rate 277 arch/mips/ath79/clock.c cpu_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint, ref_rate 304 arch/mips/ath79/clock.c ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint, ref_rate 313 arch/mips/ath79/clock.c cpu_rate = ref_rate; ref_rate 323 arch/mips/ath79/clock.c ddr_rate = ref_rate; ref_rate 333 arch/mips/ath79/clock.c ahb_rate = ref_rate; ref_rate 352 arch/mips/ath79/clock.c unsigned long ref_rate; ref_rate 362 arch/mips/ath79/clock.c ref_rate = 40 * 1000 * 1000; ref_rate 364 arch/mips/ath79/clock.c ref_rate = 25 * 1000 * 1000; ref_rate 366 arch/mips/ath79/clock.c ref_rate = ath79_setup_ref_clk(ref_rate); ref_rate 378 arch/mips/ath79/clock.c cpu_pll = nint * ref_rate / ref_div; ref_rate 379 arch/mips/ath79/clock.c cpu_pll += frac * (ref_rate >> 6) / ref_div; ref_rate 392 arch/mips/ath79/clock.c ddr_pll = nint * ref_rate / ref_div; ref_rate 393 arch/mips/ath79/clock.c ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); ref_rate 402 arch/mips/ath79/clock.c cpu_rate = ref_rate; ref_rate 412 arch/mips/ath79/clock.c ddr_rate = ref_rate; ref_rate 422 arch/mips/ath79/clock.c ahb_rate = ref_rate; ref_rate 435 arch/mips/ath79/clock.c unsigned long ref_rate; ref_rate 445 arch/mips/ath79/clock.c ref_rate = 40 * 1000 * 1000; ref_rate 447 arch/mips/ath79/clock.c ref_rate = 25 * 1000 * 1000; ref_rate 449 arch/mips/ath79/clock.c ref_rate = ath79_setup_ref_clk(ref_rate); ref_rate 461 arch/mips/ath79/clock.c cpu_pll = nint * ref_rate / ref_div; ref_rate 462 arch/mips/ath79/clock.c cpu_pll += frac * ref_rate / (ref_div * (1 << 6)); ref_rate 475 arch/mips/ath79/clock.c ddr_pll = nint * ref_rate / ref_div; ref_rate 476 arch/mips/ath79/clock.c ddr_pll += frac * ref_rate / (ref_div * (1 << 10)); ref_rate 485 arch/mips/ath79/clock.c cpu_rate = ref_rate; ref_rate 495 arch/mips/ath79/clock.c ddr_rate = ref_rate; ref_rate 505 arch/mips/ath79/clock.c ahb_rate = ref_rate; ref_rate 518 arch/mips/ath79/clock.c unsigned long ref_rate; ref_rate 538 arch/mips/ath79/clock.c ref_rate = 40 * 1000 * 1000; ref_rate 540 arch/mips/ath79/clock.c ref_rate = 25 * 1000 * 1000; ref_rate 542 arch/mips/ath79/clock.c ref_rate = ath79_setup_ref_clk(ref_rate); ref_rate 558 arch/mips/ath79/clock.c cpu_pll = nint * ref_rate / ref_div; ref_rate 559 arch/mips/ath79/clock.c cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); ref_rate 560 arch/mips/ath79/clock.c cpu_pll += (hfrac >> 13) * ref_rate / ref_div; ref_rate 576 arch/mips/ath79/clock.c ddr_pll = nint * ref_rate / ref_div; ref_rate 577 arch/mips/ath79/clock.c ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); ref_rate 578 arch/mips/ath79/clock.c ddr_pll += (hfrac >> 13) * ref_rate / ref_div; ref_rate 587 arch/mips/ath79/clock.c cpu_rate = ref_rate; ref_rate 597 arch/mips/ath79/clock.c ddr_rate = ref_rate; ref_rate 607 arch/mips/ath79/clock.c ahb_rate = ref_rate; ref_rate 368 arch/mips/ralink/mt7620.c mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) ref_rate 372 arch/mips/ralink/mt7620.c t = ref_rate; ref_rate 303 block/bfq-iosched.c static int ref_rate[2] = {14000, 33000}; ref_rate 6519 block/bfq-iosched.c bfqd->rate_dur_prod = ref_rate[blk_queue_nonrot(bfqd->queue)] * ref_rate 6521 block/bfq-iosched.c bfqd->peak_rate = ref_rate[blk_queue_nonrot(bfqd->queue)] * 2 / 3; ref_rate 477 drivers/clk/nxp/clk-lpc32xx.c unsigned long rate, cco_rate, ref_rate; ref_rate 503 drivers/clk/nxp/clk-lpc32xx.c ref_rate = parent_rate / clk->n_div; ref_rate 504 drivers/clk/nxp/clk-lpc32xx.c rate = cco_rate = ref_rate * clk->m_div; ref_rate 524 drivers/clk/nxp/clk-lpc32xx.c && pll_is_valid(ref_rate, 1, 1000000, 27000000))) ref_rate 527 drivers/clk/nxp/clk-lpc32xx.c parent_rate, cco_rate, ref_rate); ref_rate 202 drivers/clk/tegra/clk-dfll.c #define DVCO_RATE_TO_MULT(rate, ref_rate) ((rate) / ((ref_rate) / 2)) ref_rate 203 drivers/clk/tegra/clk-dfll.c #define MULT_TO_DVCO_RATE(mult, ref_rate) ((mult) * ((ref_rate) / 2)) ref_rate 275 drivers/clk/tegra/clk-dfll.c unsigned long ref_rate; ref_rate 583 drivers/clk/tegra/clk-dfll.c div = DIV_ROUND_UP(td->ref_rate, td->pwm_rate); ref_rate 854 drivers/clk/tegra/clk-dfll.c val = DVCO_RATE_TO_MULT(rate, td->ref_rate); ref_rate 861 drivers/clk/tegra/clk-dfll.c req->dvco_target_rate = MULT_TO_DVCO_RATE(req->mult_bits, td->ref_rate); ref_rate 1236 drivers/clk/tegra/clk-dfll.c unsigned long ref_rate) ref_rate 1238 drivers/clk/tegra/clk-dfll.c return monitor_data * (ref_rate / REF_CLK_CYC_PER_DVCO_SAMPLE); ref_rate 1264 drivers/clk/tegra/clk-dfll.c pre_scaler_rate = dfll_calc_monitored_rate(v, td->ref_rate); ref_rate 1399 drivers/clk/tegra/clk-dfll.c val = DIV_ROUND_UP(td->ref_rate, td->sample_rate * 32); ref_rate 1460 drivers/clk/tegra/clk-dfll.c td->ref_rate = clk_get_rate(td->ref_clk); ref_rate 1461 drivers/clk/tegra/clk-dfll.c if (td->ref_rate != REF_CLOCK_RATE) { ref_rate 1463 drivers/clk/tegra/clk-dfll.c td->ref_rate, REF_CLOCK_RATE); ref_rate 291 drivers/clk/ti/clkt_dpll.c unsigned long ref_rate; ref_rate 304 drivers/clk/ti/clkt_dpll.c ref_rate = clk_hw_get_rate(dd->clk_ref); ref_rate 309 drivers/clk/ti/clkt_dpll.c scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR); ref_rate 335 drivers/clk/ti/clkt_dpll.c ref_rate); ref_rate 731 drivers/phy/samsung/phy-exynos5-usbdrd.c unsigned long ref_rate; ref_rate 745 drivers/phy/samsung/phy-exynos5-usbdrd.c ref_rate = clk_get_rate(phy_drd->ref_clk); ref_rate 747 drivers/phy/samsung/phy-exynos5-usbdrd.c ret = exynos5_rate_to_clk(ref_rate, &phy_drd->extrefclk); ref_rate 750 drivers/phy/samsung/phy-exynos5-usbdrd.c ref_rate); ref_rate 205 drivers/phy/samsung/phy-samsung-usb2.c drv->ref_rate = clk_get_rate(drv->ref_clk); ref_rate 207 drivers/phy/samsung/phy-samsung-usb2.c ret = drv->cfg->rate_to_clk(drv->ref_rate, &drv->ref_reg_val); ref_rate 39 drivers/phy/samsung/phy-samsung-usb2.h unsigned long ref_rate; ref_rate 49 sound/soc/meson/axg-spdifin.c unsigned int ref_rate; ref_rate 193 sound/soc/meson/axg-spdifin.c ret = clk_set_rate(priv->refclk, priv->conf->ref_rate); ref_rate 408 sound/soc/meson/axg-spdifin.c .ref_rate = 333333333,