ref_divider       138 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		uint32_t ref_divider,
ref_divider       146 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		(uint64_t)target_pix_clk_100hz * ref_divider * post_divider;
ref_divider       197 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		uint32_t ref_divider,
ref_divider       210 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			ref_divider,
ref_divider       222 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			ref_divider * post_divider *
ref_divider       237 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		pll_settings->reference_divider = ref_divider;
ref_divider       259 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	uint32_t ref_divider;
ref_divider       275 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				ref_divider = min_ref_divider;
ref_divider       276 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				ref_divider <= max_ref_divider;
ref_divider       277 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				++ref_divider) {
ref_divider       281 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					ref_divider,
ref_divider       306 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t ref_divider;
ref_divider       319 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	ref_divider = 1 + dividers.uc_pll_ref_div;
ref_divider       346 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					(ref_divider * ss_info.speed_spectrum_rate);
ref_divider       868 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint32_t ref_divider;
ref_divider       881 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	ref_divider = 1 + dividers.uc_pll_ref_div;
ref_divider       914 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 					(ref_divider * ssInfo.speed_spectrum_rate);
ref_divider       167 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	u32 status, fb_divider, temp, ref_divider;
ref_divider       180 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		ref_divider = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3);
ref_divider       181 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		ref_divider &= 0x3f;
ref_divider       182 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		ref_divider += 1;
ref_divider       185 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		vco_rate = (parent_rate / ref_divider) * fb_divider * 2;
ref_divider       109 drivers/media/dvb-frontends/tda665x.c 	frequency += config->ref_divider >> 1;
ref_divider       110 drivers/media/dvb-frontends/tda665x.c 	frequency /= config->ref_divider;
ref_divider        19 drivers/media/dvb-frontends/tda665x.h 	u32	ref_divider;
ref_divider        37 drivers/media/pci/mantis/mantis_vp3030.c 	.ref_divider		= 100000, /* 1/6 MHz */
ref_divider       413 drivers/video/fbdev/aty/aty128fb.c 	u32 ref_divider;
ref_divider       916 drivers/video/fbdev/aty/aty128fb.c 	par->constants.ref_divider = BIOS_IN16(bios_pll + 0x10);
ref_divider       921 drivers/video/fbdev/aty/aty128fb.c 			par->constants.xclk, par->constants.ref_divider,
ref_divider       977 drivers/video/fbdev/aty/aty128fb.c 	par->constants.ref_divider =
ref_divider       981 drivers/video/fbdev/aty/aty128fb.c 	if (!par->constants.ref_divider) {
ref_divider       982 drivers/video/fbdev/aty/aty128fb.c 		par->constants.ref_divider = 0x3b;
ref_divider       987 drivers/video/fbdev/aty/aty128fb.c 	aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider);
ref_divider      1343 drivers/video/fbdev/aty/aty128fb.c 	aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider & 0x3ff);
ref_divider      1397 drivers/video/fbdev/aty/aty128fb.c 	n = c.ref_divider * output_freq;
ref_divider      1406 drivers/video/fbdev/aty/aty128fb.c 	    c.ref_divider, period_in_ps);
ref_divider        62 drivers/video/fbdev/aty/atyfb.h 	u16 ref_divider;
ref_divider      3366 drivers/video/fbdev/aty/atyfb_base.c 			pll_block.ref_freq, pll_block.ref_divider);
ref_divider      3374 drivers/video/fbdev/aty/atyfb_base.c 		par->pll_limits.ref_div = pll_block.ref_divider;
ref_divider      1710 drivers/video/fbdev/aty/radeon_base.c 			newmode->ppll_ref_div = rinfo->panel_info.ref_divider;
ref_divider       199 drivers/video/fbdev/aty/radeon_monitor.c 	rinfo->panel_info.ref_divider = BIOS_IN16(tmp + 46);
ref_divider       202 drivers/video/fbdev/aty/radeon_monitor.c 	if (rinfo->panel_info.ref_divider != 0 &&
ref_divider       206 drivers/video/fbdev/aty/radeon_monitor.c 		pr_debug("ref_divider = %x\n", rinfo->panel_info.ref_divider);
ref_divider       669 drivers/video/fbdev/aty/radeon_monitor.c 		rinfo->panel_info.ref_divider = rinfo->pll.ref_div;
ref_divider       264 drivers/video/fbdev/aty/radeonfb.h 	int ref_divider;