red_reg          1189 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 		REG_WRITE(REGAMMA_LUT_DATA, rgb->red_reg);
red_reg           380 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 						    &rgb->red_reg)) {
red_reg           478 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c 			dm_write_reg(xfm_dce->base.ctx, addr, rgb->red_reg);
red_reg           263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c 						    &rgb->red_reg)) {
red_reg           479 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c 			rgb->red_reg         = dc_fixpt_clamp_u0d14(rgb->red);
red_reg           356 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 		REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].red_reg);
red_reg           686 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 		REG_SET(CM_DGAM_LUT_DATA, 0, CM_DGAM_LUT_DATA, rgb[i].red_reg);
red_reg           101 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 		REG_SET(CM_DGAM_LUT_DATA, 0, CM_DGAM_LUT_DATA, rgb[i].red_reg);
red_reg           191 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 		REG_SET(CM_BLNDGAM_LUT_DATA, 0, CM_BLNDGAM_LUT_DATA, rgb[i].red_reg);
red_reg           363 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 		red   = rgb[i].red_reg;
red_reg           349 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 		REG_SET(MPCC_OGAM_LUT_DATA[mpcc_id], 0, MPCC_OGAM_LUT_DATA, rgb[i].red_reg);
red_reg            75 drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h 	uint32_t red_reg;