recout_width      414 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	input->dest.recout_width   = pipe->plane_res.scl_data.recout.width;
recout_width     2056 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			pipes[pipe_cnt].pipe.dest.recout_width = pipes[pipe_cnt].pipe.src.viewport_width; /*vp_width/hratio*/
recout_width     2058 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			pipes[pipe_cnt].pipe.dest.full_recout_width = pipes[pipe_cnt].pipe.dest.recout_width;  /*when is_hsplit != 1*/
recout_width     2097 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			pipes[pipe_cnt].pipe.dest.recout_width = scl->recout.width;
recout_width      122 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		unsigned int recout_width,
recout_width      134 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 					* dml_min((double) recout_width, (double) hactive / 2.0)
recout_width      137 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width
recout_width      146 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	dml_print("DML_DLG: %s: recout_width       = %d\n", __func__, recout_width);
recout_width     1202 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 			full_recout_width = dst->recout_width * 2; // assume half split for dcn1
recout_width     1206 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		full_recout_width = dst->recout_width;
recout_width      122 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		unsigned int recout_width,
recout_width      134 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 					* dml_min((double) recout_width, (double) hactive / 2.0)
recout_width      137 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width
recout_width      146 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	dml_print("DML_DLG: %s: recout_width       = %d\n", __func__, recout_width);
recout_width     1202 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 			full_recout_width = dst->recout_width * 2; // assume half split for dcn1
recout_width     1206 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		full_recout_width = dst->recout_width;
recout_width       99 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		unsigned int recout_width,
recout_width      111 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 					* dml_min((double) recout_width, (double) hactive / 2.0)
recout_width      114 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width
recout_width      123 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	dml_print("DML_DLG: %s: recout_width       = %d\n", __func__, recout_width);
recout_width     1255 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 			full_recout_width = dst->recout_width * 2; // assume half split for dcn1
recout_width     1259 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		full_recout_width = dst->recout_width;
recout_width      304 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int recout_width;
recout_width      432 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c 				dst->recout_width; // TODO: or should this be full_recout_width???...maybe only when in hsplit mode?
recout_width      596 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c 								dst_k->recout_width;
recout_width      101 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		unsigned int recout_width,
recout_width      110 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width
recout_width      119 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	DTRACE("DLG: %s: recout_width       = %d", __func__, recout_width);
recout_width     1263 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 				+ e2e_pipe_param.pipe.dest.recout_width;
recout_width     1638 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 			full_recout_width = e2e_pipe_param.pipe.dest.recout_width * 2; /* assume half split for dcn1 */
recout_width     1642 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		full_recout_width = e2e_pipe_param.pipe.dest.recout_width;