read_val 61 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c u8 read_val[2] = { 0x0 }; read_val 65 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c &read_val, sizeof(read_val)) < 0) { read_val 70 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c level = read_val[0]; read_val 72 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c level = (read_val[0] << 8 | read_val[1]); read_val 165 drivers/hid/hid-alps.c u8 *read_val, u8 write_val, bool read_flag) read_val 239 drivers/hid/hid-alps.c *read_val = readbuf[12]; read_val 252 drivers/hid/hid-alps.c u8 *read_val, u8 write_val, bool read_flag) read_val 306 drivers/hid/hid-alps.c *read_val = readbuf[6]; read_val 996 drivers/hwmon/adm1031.c unsigned int read_val; read_val 1007 drivers/hwmon/adm1031.c read_val = adm1031_read_value(client, ADM1031_REG_CONF2); read_val 1008 drivers/hwmon/adm1031.c if ((read_val | mask) != read_val) read_val 1009 drivers/hwmon/adm1031.c adm1031_write_value(client, ADM1031_REG_CONF2, read_val | mask); read_val 1011 drivers/hwmon/adm1031.c read_val = adm1031_read_value(client, ADM1031_REG_CONF1); read_val 1012 drivers/hwmon/adm1031.c if ((read_val | ADM1031_CONF1_MONITOR_ENABLE) != read_val) { read_val 1014 drivers/hwmon/adm1031.c read_val | ADM1031_CONF1_MONITOR_ENABLE); read_val 1019 drivers/hwmon/adm1031.c read_val = adm1031_read_value(client, ADM1031_REG_FAN_FILTER); read_val 1020 drivers/hwmon/adm1031.c i = (read_val & mask) >> ADM1031_UPDATE_RATE_SHIFT; read_val 29 drivers/ide/ide-ioctls.c goto read_val; read_val 36 drivers/ide/ide-ioctls.c read_val: read_val 381 drivers/iio/dac/ad5592r-base.c u16 read_val; read_val 389 drivers/iio/dac/ad5592r-base.c ret = st->ops->read_adc(st, chan->channel, &read_val); read_val 393 drivers/iio/dac/ad5592r-base.c if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) { read_val 400 drivers/iio/dac/ad5592r-base.c read_val &= GENMASK(11, 0); read_val 403 drivers/iio/dac/ad5592r-base.c read_val = st->cached_dac[chan->channel]; read_val 407 drivers/iio/dac/ad5592r-base.c chan->channel, read_val); read_val 409 drivers/iio/dac/ad5592r-base.c *val = (int) read_val; read_val 3040 drivers/infiniband/hw/qib/qib_iba6120.c u64 read_val, new_out; read_val 3065 drivers/infiniband/hw/qib/qib_iba6120.c read_val = qib_read_kreg64(dd, kr_extstatus); read_val 3066 drivers/infiniband/hw/qib/qib_iba6120.c return SYM_FIELD(read_val, EXTStatus, GPIOIn); read_val 3751 drivers/infiniband/hw/qib/qib_iba7220.c u64 read_val, new_out; read_val 3776 drivers/infiniband/hw/qib/qib_iba7220.c read_val = qib_read_kreg64(dd, kr_extstatus); read_val 3777 drivers/infiniband/hw/qib/qib_iba7220.c return SYM_FIELD(read_val, EXTStatus, GPIOIn); read_val 5698 drivers/infiniband/hw/qib/qib_iba7322.c u64 read_val, new_out; read_val 5723 drivers/infiniband/hw/qib/qib_iba7322.c read_val = qib_read_kreg64(dd, kr_extstatus); read_val 5724 drivers/infiniband/hw/qib/qib_iba7322.c return SYM_FIELD(read_val, EXTStatus, GPIOIn); read_val 137 drivers/infiniband/hw/qib/qib_twsi.c u32 read_val, mask; read_val 143 drivers/infiniband/hw/qib/qib_twsi.c read_val = dd->f_gpio_mod(dd, 0, 0, 0); read_val 146 drivers/infiniband/hw/qib/qib_twsi.c return (read_val & mask) >> bnum; read_val 151 drivers/media/radio/radio-shark.c .read_val = shark_read_val, read_val 113 drivers/media/radio/tea575x.c if (tea->ops->read_val) read_val 114 drivers/media/radio/tea575x.c return tea->ops->read_val(tea); read_val 13097 drivers/net/ethernet/broadcom/tg3.c u32 offset, read_mask, write_mask, val, save_val, read_val; read_val 13272 drivers/net/ethernet/broadcom/tg3.c read_val = save_val & read_mask; read_val 13282 drivers/net/ethernet/broadcom/tg3.c if (((val & read_mask) != read_val) || (val & write_mask)) read_val 13294 drivers/net/ethernet/broadcom/tg3.c if ((val & read_mask) != read_val) read_val 379 drivers/net/ethernet/seeq/ether3.c int read_val; read_val 382 drivers/net/ethernet/seeq/ether3.c read_val = ether3_inw(REG_RECVPTR); read_val 384 drivers/net/ethernet/seeq/ether3.c printk(KERN_DEBUG "ether3_probe: write16 [%04X], read16 [%04X]\n", val, read_val); read_val 386 drivers/net/ethernet/seeq/ether3.c return read_val == val; read_val 29 drivers/pci/controller/pci-thunder-pem.c u64 read_val, tmp_val; read_val 43 drivers/pci/controller/pci-thunder-pem.c read_val = where & ~3ull; read_val 44 drivers/pci/controller/pci-thunder-pem.c writeq(read_val, pem_pci->pem_reg_base + PEM_CFG_RD); read_val 45 drivers/pci/controller/pci-thunder-pem.c read_val = readq(pem_pci->pem_reg_base + PEM_CFG_RD); read_val 46 drivers/pci/controller/pci-thunder-pem.c read_val >>= 32; read_val 54 drivers/pci/controller/pci-thunder-pem.c read_val &= 0xffff00ff; read_val 55 drivers/pci/controller/pci-thunder-pem.c read_val |= 0x00007000; /* Skip MSI CAP */ read_val 62 drivers/pci/controller/pci-thunder-pem.c if (!(read_val & (0x1f << 25))) read_val 63 drivers/pci/controller/pci-thunder-pem.c read_val |= (2u << 25); read_val 67 drivers/pci/controller/pci-thunder-pem.c read_val &= 0xc00000ff; read_val 77 drivers/pci/controller/pci-thunder-pem.c read_val |= 0x0003bc00; read_val 79 drivers/pci/controller/pci-thunder-pem.c read_val |= 0x0001bc00; read_val 83 drivers/pci/controller/pci-thunder-pem.c read_val = 0x00000000; read_val 87 drivers/pci/controller/pci-thunder-pem.c read_val = 0x000f0000; read_val 91 drivers/pci/controller/pci-thunder-pem.c read_val = 0x00010014; read_val 95 drivers/pci/controller/pci-thunder-pem.c read_val = 0x00000000; read_val 99 drivers/pci/controller/pci-thunder-pem.c read_val = 0x80ff0003; read_val 102 drivers/pci/controller/pci-thunder-pem.c read_val = pem_pci->ea_entry[0]; read_val 105 drivers/pci/controller/pci-thunder-pem.c read_val = pem_pci->ea_entry[1]; read_val 108 drivers/pci/controller/pci-thunder-pem.c read_val = pem_pci->ea_entry[2]; read_val 113 drivers/pci/controller/pci-thunder-pem.c read_val >>= (8 * (where & 3)); read_val 116 drivers/pci/controller/pci-thunder-pem.c read_val &= 0xff; read_val 119 drivers/pci/controller/pci-thunder-pem.c read_val &= 0xffff; read_val 124 drivers/pci/controller/pci-thunder-pem.c *val = read_val; read_val 209 drivers/pci/controller/pci-thunder-pem.c u64 write_val, read_val; read_val 226 drivers/pci/controller/pci-thunder-pem.c read_val = readq(pem_pci->pem_reg_base + PEM_CFG_RD); read_val 227 drivers/pci/controller/pci-thunder-pem.c read_val >>= 32; read_val 229 drivers/pci/controller/pci-thunder-pem.c read_val &= mask; read_val 231 drivers/pci/controller/pci-thunder-pem.c val |= (u32)read_val; read_val 235 drivers/pci/controller/pci-thunder-pem.c read_val = readq(pem_pci->pem_reg_base + PEM_CFG_RD); read_val 236 drivers/pci/controller/pci-thunder-pem.c read_val >>= 32; read_val 238 drivers/pci/controller/pci-thunder-pem.c read_val &= mask; read_val 240 drivers/pci/controller/pci-thunder-pem.c val |= (u32)read_val; read_val 366 drivers/phy/cadence/phy-cadence-dp.c unsigned int read_val; read_val 377 drivers/phy/cadence/phy-cadence-dp.c read_val, read_val & 1, 0, POLL_TIMEOUT_US); read_val 406 drivers/phy/cadence/phy-cadence-dp.c read_val, (read_val & mask) == write_val1, 0, read_val 418 drivers/phy/cadence/phy-cadence-dp.c read_val, (read_val & mask) == write_val2, 0, read_val 434 drivers/phy/cadence/phy-cadence-dp.c unsigned int read_val; read_val 436 drivers/phy/cadence/phy-cadence-dp.c read_val = readl(cdns_phy->base + offset); read_val 437 drivers/phy/cadence/phy-cadence-dp.c writel(((val << start_bit) | (read_val & ~(((1 << num_bits) - 1) << read_val 796 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int read_val = 0; read_val 806 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_read(pctl->regmap1, reg_addr, &read_val); read_val 807 drivers/pinctrl/mediatek/pinctrl-mtk-common.c return !(read_val & bit); read_val 814 drivers/pinctrl/mediatek/pinctrl-mtk-common.c unsigned int read_val = 0; read_val 821 drivers/pinctrl/mediatek/pinctrl-mtk-common.c regmap_read(pctl->regmap1, reg_addr, &read_val); read_val 822 drivers/pinctrl/mediatek/pinctrl-mtk-common.c return !!(read_val & bit); read_val 296 drivers/power/supply/pm2301_charger.c u8 read_val; read_val 303 drivers/power/supply/pm2301_charger.c ret = pm2xxx_charger_detection(pm2, &read_val); read_val 305 drivers/power/supply/pm2301_charger.c if ((ret == 0) && read_val) { read_val 163 drivers/spi/spi-sprd-adi.c static int sprd_adi_read(struct sprd_adi *sadi, u32 reg_paddr, u32 *read_val) read_val 221 drivers/spi/spi-sprd-adi.c *read_val = val & RD_VALUE_MASK; read_val 174 drivers/staging/axis-fifo/axis-fifo.c unsigned int read_val; read_val 178 drivers/staging/axis-fifo/axis-fifo.c read_val = ioread32(fifo->base_addr + addr_offset); read_val 179 drivers/staging/axis-fifo/axis-fifo.c len = snprintf(tmp, sizeof(tmp), "0x%x\n", read_val); read_val 54 drivers/staging/kpc2000/kpc2000/cell_probe.c void parse_core_table_entry_v0(struct core_table_entry *cte, const u64 read_val) read_val 56 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->type = ((read_val & 0xFFF0000000000000UL) >> 52); read_val 57 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->offset = ((read_val & 0x00000000FFFF0000UL) >> 16) * 4096; read_val 58 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->length = ((read_val & 0x0000FFFF00000000UL) >> 32) * 8; read_val 59 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->s2c_dma_present = ((read_val & 0x0008000000000000UL) >> 51); read_val 60 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->s2c_dma_channel_num = ((read_val & 0x0007000000000000UL) >> 48); read_val 61 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->c2s_dma_present = ((read_val & 0x0000000000008000UL) >> 15); read_val 62 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->c2s_dma_channel_num = ((read_val & 0x0000000000007000UL) >> 12); read_val 63 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->irq_count = ((read_val & 0x0000000000000C00UL) >> 10); read_val 64 drivers/staging/kpc2000/kpc2000/cell_probe.c cte->irq_base_num = ((read_val & 0x00000000000003F8UL) >> 3); read_val 84 drivers/staging/kpc2000/kpc2000/cell_probe.c void parse_core_table_entry(struct core_table_entry *cte, const u64 read_val, const u8 entry_rev) read_val 88 drivers/staging/kpc2000/kpc2000/cell_probe.c parse_core_table_entry_v0(cte, read_val); read_val 413 drivers/staging/kpc2000/kpc2000/cell_probe.c u64 read_val; read_val 425 drivers/staging/kpc2000/kpc2000/cell_probe.c read_val = readq(pcard->sysinfo_regs_base + ((pcard->core_table_offset + i) * 8)); read_val 426 drivers/staging/kpc2000/kpc2000/cell_probe.c parse_core_table_entry(&cte, read_val, pcard->core_table_rev); read_val 431 drivers/staging/kpc2000/kpc2000/cell_probe.c dev_info(&pcard->pdev->dev, "Found Invalid core: %016llx\n", read_val); read_val 439 drivers/staging/kpc2000/kpc2000/cell_probe.c read_val = readq(pcard->sysinfo_regs_base + ((pcard->core_table_offset + i) * 8)); read_val 440 drivers/staging/kpc2000/kpc2000/cell_probe.c parse_core_table_entry(&cte, read_val, pcard->core_table_rev); read_val 205 drivers/staging/kpc2000/kpc2000/core.c u64 read_val = readq(pcard->sysinfo_regs_base + REG_FPGA_SSID); read_val 208 drivers/staging/kpc2000/kpc2000/core.c if (read_val & 0x8000000000000000UL) { read_val 209 drivers/staging/kpc2000/kpc2000/core.c pcard->ssid = read_val; read_val 215 drivers/staging/kpc2000/kpc2000/core.c read_val = readq(pcard->sysinfo_regs_base + REG_FPGA_SSID); read_val 216 drivers/staging/kpc2000/kpc2000/core.c if (read_val & 0x8000000000000000UL) { read_val 217 drivers/staging/kpc2000/kpc2000/core.c pcard->ssid = read_val; read_val 233 drivers/staging/kpc2000/kpc2000/core.c u64 read_val; read_val 235 drivers/staging/kpc2000/kpc2000/core.c read_val = readq(pcard->sysinfo_regs_base + REG_MAGIC_NUMBER); read_val 236 drivers/staging/kpc2000/kpc2000/core.c if (read_val != KP2000_MAGIC_VALUE) { read_val 239 drivers/staging/kpc2000/kpc2000/core.c read_val, KP2000_MAGIC_VALUE); read_val 243 drivers/staging/kpc2000/kpc2000/core.c read_val = readq(pcard->sysinfo_regs_base + REG_CARD_ID_AND_BUILD); read_val 244 drivers/staging/kpc2000/kpc2000/core.c pcard->card_id = (read_val & 0xFFFFFFFF00000000UL) >> 32; read_val 245 drivers/staging/kpc2000/kpc2000/core.c pcard->build_version = (read_val & 0x00000000FFFFFFFFUL) >> 0; read_val 247 drivers/staging/kpc2000/kpc2000/core.c read_val = readq(pcard->sysinfo_regs_base + REG_DATE_AND_TIME_STAMPS); read_val 248 drivers/staging/kpc2000/kpc2000/core.c pcard->build_datestamp = (read_val & 0xFFFFFFFF00000000UL) >> 32; read_val 249 drivers/staging/kpc2000/kpc2000/core.c pcard->build_timestamp = (read_val & 0x00000000FFFFFFFFUL) >> 0; read_val 251 drivers/staging/kpc2000/kpc2000/core.c read_val = readq(pcard->sysinfo_regs_base + REG_CORE_TABLE_OFFSET); read_val 252 drivers/staging/kpc2000/kpc2000/core.c pcard->core_table_length = (read_val & 0xFFFFFFFF00000000UL) >> 32; read_val 253 drivers/staging/kpc2000/kpc2000/core.c pcard->core_table_offset = (read_val & 0x00000000FFFFFFFFUL) >> 0; read_val 257 drivers/staging/kpc2000/kpc2000/core.c read_val = readq(pcard->sysinfo_regs_base + REG_FPGA_HW_ID); read_val 258 drivers/staging/kpc2000/kpc2000/core.c pcard->core_table_rev = (read_val & 0x0000000000000F00) >> 8; read_val 259 drivers/staging/kpc2000/kpc2000/core.c pcard->hardware_revision = (read_val & 0x000000000000001F); read_val 261 drivers/staging/kpc2000/kpc2000/core.c read_val = readq(pcard->sysinfo_regs_base + REG_FPGA_DDNA); read_val 262 drivers/staging/kpc2000/kpc2000/core.c pcard->ddna = read_val; read_val 29 include/media/drv-intf/tea575x.h u32 (*read_val)(struct snd_tea575x *tea);