rdev 286 arch/alpha/kernel/osf_sys.c tmp.st_rdev = lstat->rdev; rdev 287 arch/alpha/kernel/osf_sys.c tmp.st_ldev = lstat->rdev; rdev 127 arch/arm/kernel/sys_oabi-compat.c tmp.st_rdev = huge_encode_dev(stat->rdev); rdev 134 arch/powerpc/sysdev/fsl_rio.h struct rio_dev *rdev, rdev 660 arch/powerpc/sysdev/fsl_rmu.c fsl_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, rdev 670 arch/powerpc/sysdev/fsl_rmu.c "%p len %8.8zx\n", rdev->destid, mbox, buffer, len); rdev 684 arch/powerpc/sysdev/fsl_rmu.c desc->dport = (rdev->destid << 16) | (mbox & 0x3); rdev 139 arch/s390/kernel/compat_linux.c tmp.st_rdev = huge_encode_dev(stat->rdev); rdev 76 arch/sparc/kernel/sys_sparc32.c err |= put_user(huge_encode_dev(stat->rdev), &statbuf->st_rdev); rdev 86 arch/x86/ia32/sys_ia32.c __put_user(huge_encode_dev(stat->rdev), &ubuf->st_rdev) || rdev 305 drivers/base/devtmpfs.c if (stat->rdev != dev->devt) rdev 1416 drivers/block/loop.c info->lo_rdevice = huge_encode_dev(stat.rdev); rdev 142 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); rdev 148 drivers/bus/sunxi-rsb.c if (!rdev->irq) { rdev 159 drivers/bus/sunxi-rsb.c rdev->irq = irq; rdev 166 drivers/bus/sunxi-rsb.c return drv->probe(rdev); rdev 186 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); rdev 188 drivers/bus/sunxi-rsb.c kfree(rdev); rdev 202 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev; rdev 204 drivers/bus/sunxi-rsb.c rdev = kzalloc(sizeof(*rdev), GFP_KERNEL); rdev 205 drivers/bus/sunxi-rsb.c if (!rdev) rdev 208 drivers/bus/sunxi-rsb.c rdev->rsb = rsb; rdev 209 drivers/bus/sunxi-rsb.c rdev->hwaddr = hwaddr; rdev 210 drivers/bus/sunxi-rsb.c rdev->rtaddr = rtaddr; rdev 211 drivers/bus/sunxi-rsb.c rdev->dev.bus = &sunxi_rsb_bus; rdev 212 drivers/bus/sunxi-rsb.c rdev->dev.parent = rsb->dev; rdev 213 drivers/bus/sunxi-rsb.c rdev->dev.of_node = node; rdev 214 drivers/bus/sunxi-rsb.c rdev->dev.release = sunxi_rsb_dev_release; rdev 216 drivers/bus/sunxi-rsb.c dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr); rdev 218 drivers/bus/sunxi-rsb.c err = device_register(&rdev->dev); rdev 220 drivers/bus/sunxi-rsb.c dev_err(&rdev->dev, "Can't add %s, status %d\n", rdev 221 drivers/bus/sunxi-rsb.c dev_name(&rdev->dev), err); rdev 225 drivers/bus/sunxi-rsb.c dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev)); rdev 228 drivers/bus/sunxi-rsb.c put_device(&rdev->dev); rdev 237 drivers/bus/sunxi-rsb.c static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev) rdev 239 drivers/bus/sunxi-rsb.c device_unregister(&rdev->dev); rdev 244 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); rdev 247 drivers/bus/sunxi-rsb.c sunxi_rsb_device_unregister(rdev); rdev 395 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev; rdev 403 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev = ctx->rdev; rdev 408 drivers/bus/sunxi-rsb.c return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size); rdev 415 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev = ctx->rdev; rdev 417 drivers/bus/sunxi-rsb.c return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size); rdev 435 drivers/bus/sunxi-rsb.c static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev, rdev 453 drivers/bus/sunxi-rsb.c ctx->rdev = rdev; rdev 459 drivers/bus/sunxi-rsb.c struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev, rdev 464 drivers/bus/sunxi-rsb.c struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config); rdev 469 drivers/bus/sunxi-rsb.c return __devm_regmap_init(&rdev->dev, ®map_sunxi_rsb, ctx, config, rdev 596 drivers/bus/sunxi-rsb.c struct sunxi_rsb_device *rdev; rdev 608 drivers/bus/sunxi-rsb.c rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr); rdev 609 drivers/bus/sunxi-rsb.c if (IS_ERR(rdev)) rdev 611 drivers/bus/sunxi-rsb.c child, PTR_ERR(rdev)); rdev 318 drivers/crypto/caam/jr.c void caam_jr_free(struct device *rdev) rdev 320 drivers/crypto/caam/jr.c struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev); rdev 13 drivers/crypto/caam/jr.h void caam_jr_free(struct device *rdev); rdev 192 drivers/gpu/drm/qxl/qxl_drv.h int qxl_debugfs_add_files(struct qxl_device *rdev, rdev 195 drivers/gpu/drm/qxl/qxl_drv.h int qxl_debugfs_fence_init(struct qxl_device *rdev); rdev 372 drivers/gpu/drm/qxl/qxl_ttm.c struct qxl_device *rdev = dev->dev_private; rdev 373 drivers/gpu/drm/qxl/qxl_ttm.c struct ttm_bo_global *glob = rdev->mman.bdev.glob; rdev 110 drivers/gpu/drm/radeon/atom.c struct radeon_device *rdev = ctx->card->dev->dev_private; rdev 123 drivers/gpu/drm/radeon/atom.c if (rdev->family == CHIP_RV515) rdev 1328 drivers/gpu/drm/radeon/atom.c struct radeon_device *rdev = ctx->card->dev->dev_private; rdev 1348 drivers/gpu/drm/radeon/atom.c if (rdev->family < CHIP_R600) { rdev 43 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 80 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 86 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 96 drivers/gpu/drm/radeon/atombios_crtc.c if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id) rdev 153 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_AVIVO(rdev)) rdev 160 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 162 drivers/gpu/drm/radeon/atombios_crtc.c && rdev->family >= CHIP_RV515 && rdev->family <= CHIP_R580) { rdev 163 drivers/gpu/drm/radeon/atombios_crtc.c atom_rv515_force_tv_scaler(rdev, radeon_crtc); rdev 171 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 181 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 188 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 197 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 204 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 213 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 230 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 237 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE8(rdev)) { rdev 245 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 247 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE8(rdev)) { rdev 256 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 265 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 271 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 278 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev)) rdev 292 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev)) rdev 299 drivers/gpu/drm/radeon/atombios_crtc.c radeon_pm_compute_clocks(rdev); rdev 308 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 347 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 355 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 393 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 396 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_disable_ss(struct radeon_device *rdev, int pll_id) rdev 400 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) { rdev 416 drivers/gpu/drm/radeon/atombios_crtc.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 444 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_program_ss(struct radeon_device *rdev, rdev 465 drivers/gpu/drm/radeon/atombios_crtc.c for (i = 0; i < rdev->num_crtc; i++) { rdev 466 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->mode_info.crtcs[i] && rdev 467 drivers/gpu/drm/radeon/atombios_crtc.c rdev->mode_info.crtcs[i]->enabled && rdev 469 drivers/gpu/drm/radeon/atombios_crtc.c pll_id == rdev->mode_info.crtcs[i]->pll_id) { rdev 481 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE5(rdev)) { rdev 500 drivers/gpu/drm/radeon/atombios_crtc.c } else if (ASIC_IS_DCE4(rdev)) { rdev 519 drivers/gpu/drm/radeon/atombios_crtc.c } else if (ASIC_IS_DCE3(rdev)) { rdev 527 drivers/gpu/drm/radeon/atombios_crtc.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 530 drivers/gpu/drm/radeon/atombios_crtc.c atombios_disable_ss(rdev, pll_id); rdev 541 drivers/gpu/drm/radeon/atombios_crtc.c atombios_disable_ss(rdev, pll_id); rdev 550 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 563 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 577 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_AVIVO(rdev)) { rdev 578 drivers/gpu/drm/radeon/atombios_crtc.c if ((rdev->family == CHIP_RS600) || rdev 579 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_RS690) || rdev 580 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_RS740)) rdev 584 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */ rdev 589 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family < CHIP_RV770) rdev 592 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev) || ASIC_IS_DCE8(rdev)) rdev 595 drivers/gpu/drm/radeon/atombios_crtc.c if (((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880)) rdev 598 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE32(rdev) && mode->clock > 165000) rdev 633 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_AVIVO(rdev) && rdev 634 drivers/gpu/drm/radeon/atombios_crtc.c rdev->family != CHIP_RS780 && rdev 635 drivers/gpu/drm/radeon/atombios_crtc.c rdev->family != CHIP_RS880) rdev 641 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_AVIVO(rdev)) { rdev 678 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE3(rdev)) { rdev 684 drivers/gpu/drm/radeon/atombios_crtc.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, rdev 702 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, rdev 735 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, rdev 774 drivers/gpu/drm/radeon/atombios_crtc.c static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev, rdev 784 drivers/gpu/drm/radeon/atombios_crtc.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, rdev 804 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE61(rdev) || ASIC_IS_DCE8(rdev)) rdev 806 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_DCE6(rdev)) rdev 820 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 838 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 845 drivers/gpu/drm/radeon/atombios_crtc.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, rdev 960 drivers/gpu/drm/radeon/atombios_crtc.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 967 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 997 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 999 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss, rdev 1005 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_ppll_ss_info(rdev, rdev 1010 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_ppll_ss_info(rdev, rdev 1015 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_ppll_ss_info(rdev, rdev 1024 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 1026 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_asic_ss_info(rdev, rdev 1032 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_ppll_ss_info(rdev, rdev 1037 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 1039 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_asic_ss_info(rdev, rdev 1045 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 1047 drivers/gpu/drm/radeon/atombios_crtc.c radeon_atombios_get_asic_ss_info(rdev, rdev 1067 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1077 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE5(rdev) && rdev 1084 drivers/gpu/drm/radeon/atombios_crtc.c pll = &rdev->clock.p1pll; rdev 1087 drivers/gpu/drm/radeon/atombios_crtc.c pll = &rdev->clock.p2pll; rdev 1092 drivers/gpu/drm/radeon/atombios_crtc.c pll = &rdev->clock.dcpll; rdev 1105 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_AVIVO(rdev)) rdev 1112 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_program_ss(rdev, ATOM_DISABLE, radeon_crtc->pll_id, rdev 1122 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) { rdev 1139 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_program_ss(rdev, ATOM_ENABLE, radeon_crtc->pll_id, rdev 1150 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1280 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_TAHITI) { rdev 1283 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_BONAIRE) { rdev 1301 drivers/gpu/drm/radeon/atombios_crtc.c num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; rdev 1316 drivers/gpu/drm/radeon/atombios_crtc.c num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3; rdev 1322 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_CAYMAN) rdev 1323 drivers/gpu/drm/radeon/atombios_crtc.c tmp = rdev->config.cayman.tile_config; rdev 1325 drivers/gpu/drm/radeon/atombios_crtc.c tmp = rdev->config.evergreen.tile_config; rdev 1346 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_BONAIRE) { rdev 1353 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_BONAIRE) { rdev 1357 drivers/gpu/drm/radeon/atombios_crtc.c u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f; rdev 1360 drivers/gpu/drm/radeon/atombios_crtc.c } else if ((rdev->family == CHIP_TAHITI) || rdev 1361 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_PITCAIRN)) rdev 1363 drivers/gpu/drm/radeon/atombios_crtc.c else if ((rdev->family == CHIP_VERDE) || rdev 1364 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_OLAND) || rdev 1365 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_HAINAN)) /* for completeness. HAINAN has no display hw */ rdev 1430 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_BONAIRE) rdev 1442 drivers/gpu/drm/radeon/atombios_crtc.c if ((rdev->family >= CHIP_BONAIRE) && rdev 1461 drivers/gpu/drm/radeon/atombios_crtc.c radeon_bandwidth_update(rdev); rdev 1472 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1572 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_R600) rdev 1588 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_R600) { rdev 1611 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_RV770) { rdev 1625 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->family >= CHIP_R600) rdev 1670 drivers/gpu/drm/radeon/atombios_crtc.c radeon_bandwidth_update(rdev); rdev 1679 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1681 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 1683 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_AVIVO(rdev)) rdev 1694 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1696 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 1698 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_AVIVO(rdev)) rdev 1708 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1765 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1776 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE61(rdev) && !ASIC_IS_DCE8(rdev) && rdev 1800 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1817 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE61(rdev) && !ASIC_IS_DCE8(rdev) && rdev 1879 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 1885 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE8(rdev)) { rdev 1887 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) rdev 1903 drivers/gpu/drm/radeon/atombios_crtc.c if ((rdev->family == CHIP_KABINI) || rdev 1904 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_MULLINS)) { rdev 1925 drivers/gpu/drm/radeon/atombios_crtc.c } else if (ASIC_IS_DCE61(rdev)) { rdev 1935 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) rdev 1958 drivers/gpu/drm/radeon/atombios_crtc.c } else if (ASIC_IS_DCE41(rdev)) { rdev 1961 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) rdev 1972 drivers/gpu/drm/radeon/atombios_crtc.c } else if (ASIC_IS_DCE4(rdev)) { rdev 1984 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->clock.dp_extclk) rdev 1987 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_DCE6(rdev)) rdev 1990 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_DCE5(rdev)) rdev 2033 drivers/gpu/drm/radeon/atombios_crtc.c void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev) rdev 2036 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE6(rdev)) rdev 2037 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk); rdev 2038 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_DCE4(rdev)) { rdev 2040 drivers/gpu/drm/radeon/atombios_crtc.c bool ss_enabled = radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 2042 drivers/gpu/drm/radeon/atombios_crtc.c rdev->clock.default_dispclk); rdev 2044 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_program_ss(rdev, ATOM_DISABLE, ATOM_DCPLL, -1, &ss); rdev 2046 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk); rdev 2048 drivers/gpu/drm/radeon/atombios_crtc.c atombios_crtc_program_ss(rdev, ATOM_ENABLE, ATOM_DCPLL, -1, &ss); rdev 2060 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 2074 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 2076 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_AVIVO(rdev)) { rdev 2141 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 2144 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE6(rdev)) rdev 2161 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 2180 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) rdev 2182 drivers/gpu/drm/radeon/atombios_crtc.c else if (ASIC_IS_AVIVO(rdev)) rdev 2185 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE6(rdev)) rdev 2188 drivers/gpu/drm/radeon/atombios_crtc.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2189 drivers/gpu/drm/radeon/atombios_crtc.c if (rdev->mode_info.crtcs[i] && rdev 2190 drivers/gpu/drm/radeon/atombios_crtc.c rdev->mode_info.crtcs[i]->enabled && rdev 2192 drivers/gpu/drm/radeon/atombios_crtc.c radeon_crtc->pll_id == rdev->mode_info.crtcs[i]->pll_id) { rdev 2209 drivers/gpu/drm/radeon/atombios_crtc.c if ((rdev->family == CHIP_ARUBA) || rdev 2210 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_KAVERI) || rdev 2211 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_BONAIRE) || rdev 2212 drivers/gpu/drm/radeon/atombios_crtc.c (rdev->family == CHIP_HAWAII)) rdev 2240 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 2242 drivers/gpu/drm/radeon/atombios_crtc.c if (ASIC_IS_DCE4(rdev)) { rdev 91 drivers/gpu/drm/radeon/atombios_dp.c struct radeon_device *rdev = dev->dev_private; rdev 101 drivers/gpu/drm/radeon/atombios_dp.c mutex_lock(&rdev->mode_info.atom_context->scratch_mutex); rdev 103 drivers/gpu/drm/radeon/atombios_dp.c base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1); rdev 112 drivers/gpu/drm/radeon/atombios_dp.c if (ASIC_IS_DCE4(rdev)) rdev 115 drivers/gpu/drm/radeon/atombios_dp.c atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 149 drivers/gpu/drm/radeon/atombios_dp.c mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex); rdev 230 drivers/gpu/drm/radeon/atombios_dp.c struct radeon_device *rdev = dev->dev_private; rdev 235 drivers/gpu/drm/radeon/atombios_dp.c if (ASIC_IS_DCE5(rdev)) { rdev 342 drivers/gpu/drm/radeon/atombios_dp.c static u8 radeon_dp_encoder_service(struct radeon_device *rdev, rdev 356 drivers/gpu/drm/radeon/atombios_dp.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 363 drivers/gpu/drm/radeon/atombios_dp.c struct radeon_device *rdev = dev->dev_private; rdev 365 drivers/gpu/drm/radeon/atombios_dp.c return radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_GET_SINK_TYPE, 0, rdev 413 drivers/gpu/drm/radeon/atombios_dp.c struct radeon_device *rdev = dev->dev_private; rdev 420 drivers/gpu/drm/radeon/atombios_dp.c if (!ASIC_IS_DCE4(rdev)) rdev 540 drivers/gpu/drm/radeon/atombios_dp.c struct radeon_device *rdev; rdev 572 drivers/gpu/drm/radeon/atombios_dp.c if (ASIC_IS_DCE4(dp_info->rdev) || !dp_info->use_dpencoder) { rdev 594 drivers/gpu/drm/radeon/atombios_dp.c radeon_dp_encoder_service(dp_info->rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL, rdev 633 drivers/gpu/drm/radeon/atombios_dp.c if (ASIC_IS_DCE4(dp_info->rdev) || !dp_info->use_dpencoder) rdev 637 drivers/gpu/drm/radeon/atombios_dp.c radeon_dp_encoder_service(dp_info->rdev, ATOM_DP_ACTION_TRAINING_START, rdev 658 drivers/gpu/drm/radeon/atombios_dp.c if (ASIC_IS_DCE4(dp_info->rdev) || !dp_info->use_dpencoder) rdev 662 drivers/gpu/drm/radeon/atombios_dp.c radeon_dp_encoder_service(dp_info->rdev, ATOM_DP_ACTION_TRAINING_COMPLETE, rdev 790 drivers/gpu/drm/radeon/atombios_dp.c struct radeon_device *rdev = dev->dev_private; rdev 818 drivers/gpu/drm/radeon/atombios_dp.c if (atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) { rdev 836 drivers/gpu/drm/radeon/atombios_dp.c if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED)) rdev 845 drivers/gpu/drm/radeon/atombios_dp.c dp_info.rdev = rdev; rdev 43 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_get_backlight_level_from_reg(struct radeon_device *rdev) rdev 48 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family >= CHIP_R600) rdev 60 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_set_backlight_level_to_reg(struct radeon_device *rdev, rdev 65 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family >= CHIP_R600) rdev 74 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family >= CHIP_R600) rdev 84 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 86 drivers/gpu/drm/radeon/atombios_encoders.c if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) rdev 89 drivers/gpu/drm/radeon/atombios_encoders.c return radeon_atom_get_backlight_level_from_reg(rdev); rdev 97 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 102 drivers/gpu/drm/radeon/atombios_encoders.c if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) rdev 109 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_set_backlight_level_to_reg(rdev, dig->backlight_level); rdev 117 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 120 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 122 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 175 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 177 drivers/gpu/drm/radeon/atombios_encoders.c return radeon_atom_get_backlight_level_from_reg(rdev); rdev 189 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 199 drivers/gpu/drm/radeon/atombios_encoders.c if ((rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) && rdev 200 drivers/gpu/drm/radeon/atombios_encoders.c (rdev->pdev->device == 0x6741)) rdev 206 drivers/gpu/drm/radeon/atombios_encoders.c if (!rdev->is_atom_bios) rdev 209 drivers/gpu/drm/radeon/atombios_encoders.c if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) rdev 247 drivers/gpu/drm/radeon/atombios_encoders.c rdev->mode_info.bl_encoder = radeon_encoder; rdev 259 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 266 drivers/gpu/drm/radeon/atombios_encoders.c if (!rdev->is_atom_bios) rdev 269 drivers/gpu/drm/radeon/atombios_encoders.c if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) rdev 300 drivers/gpu/drm/radeon/atombios_encoders.c bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, rdev 309 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 333 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_get_tv_timings(rdev, 0, adjusted_mode); rdev 335 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_get_tv_timings(rdev, 1, adjusted_mode); rdev 341 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE3(rdev) && rdev 355 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 399 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 407 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 455 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 496 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 504 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 508 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family <= CHIP_RV410) rdev 556 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 568 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 600 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 674 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 681 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 756 drivers/gpu/drm/radeon/atombios_encoders.c ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) rdev 774 drivers/gpu/drm/radeon/atombios_encoders.c ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) rdev 849 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 876 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE4(rdev)) rdev 885 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 997 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1019 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1086 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 1115 drivers/gpu/drm/radeon/atombios_encoders.c if ((rdev->flags & RADEON_IS_IGP) && rdev 1224 drivers/gpu/drm/radeon/atombios_encoders.c if (is_dp && rdev->clock.dp_extclk) rdev 1284 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->clock.dp_extclk) rdev 1351 drivers/gpu/drm/radeon/atombios_encoders.c if (is_dp && rdev->clock.dp_extclk) rdev 1379 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1393 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1401 drivers/gpu/drm/radeon/atombios_encoders.c if (!ASIC_IS_DCE4(rdev)) rdev 1408 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 1415 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1422 drivers/gpu/drm/radeon/atombios_encoders.c if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) rdev 1443 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1473 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 1537 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1544 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1553 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family >= CHIP_R600) rdev 1572 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1581 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1636 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1639 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1641 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->mode_info.bl_encoder) { rdev 1647 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1655 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1658 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 1668 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1683 drivers/gpu/drm/radeon/atombios_encoders.c !ASIC_IS_DCE5(rdev)) rdev 1689 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { rdev 1701 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) rdev 1705 drivers/gpu/drm/radeon/atombios_encoders.c } else if (ASIC_IS_DCE4(rdev)) { rdev 1725 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE4(rdev)) rdev 1729 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->mode_info.bl_encoder) rdev 1746 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE4(rdev)) { rdev 1759 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE4(rdev)) { rdev 1786 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1818 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE5(rdev)) { rdev 1829 drivers/gpu/drm/radeon/atombios_encoders.c } else if (ASIC_IS_DCE3(rdev)) rdev 1836 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE5(rdev)) { rdev 1867 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1877 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 1885 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_AVIVO(rdev)) rdev 2006 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2016 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2024 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 2056 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2064 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2083 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_AVIVO(rdev) && rdev 2085 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE8(rdev)) { rdev 2091 drivers/gpu/drm/radeon/atombios_encoders.c } else if (ASIC_IS_DCE4(rdev)) { rdev 2107 drivers/gpu/drm/radeon/atombios_encoders.c void radeon_atom_release_dig_encoder(struct radeon_device *rdev, int enc_idx) rdev 2111 drivers/gpu/drm/radeon/atombios_encoders.c rdev->mode_info.active_encoders &= ~(1 << enc_idx); rdev 2117 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2129 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE6(rdev)) { rdev 2155 drivers/gpu/drm/radeon/atombios_encoders.c } else if (ASIC_IS_DCE4(rdev)) { rdev 2157 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE41(rdev) && !ASIC_IS_DCE61(rdev)) { rdev 2159 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family == CHIP_PALM) { rdev 2197 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE32(rdev)) { rdev 2237 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->mode_info.active_encoders & (1 << enc_idx)) { rdev 2240 drivers/gpu/drm/radeon/atombios_encoders.c rdev->mode_info.active_encoders |= (1 << enc_idx); rdev 2246 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_encoder_init(struct radeon_device *rdev) rdev 2248 drivers/gpu/drm/radeon/atombios_encoders.c struct drm_device *dev = rdev->ddev; rdev 2267 drivers/gpu/drm/radeon/atombios_encoders.c if (ext_encoder && (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev))) rdev 2279 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2289 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE4(rdev)) { rdev 2342 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2355 drivers/gpu/drm/radeon/atombios_encoders.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 2380 drivers/gpu/drm/radeon/atombios_encoders.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2391 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2401 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family >= CHIP_R600) rdev 2432 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2438 drivers/gpu/drm/radeon/atombios_encoders.c if (!ASIC_IS_DCE4(rdev)) rdev 2489 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 2500 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_release_dig_encoder(rdev, dig->dig_encoder); rdev 2503 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->family >= CHIP_R600) rdev 2504 drivers/gpu/drm/radeon/atombios_encoders.c dig->afmt = rdev->mode_info.afmt[dig->dig_encoder]; rdev 2507 drivers/gpu/drm/radeon/atombios_encoders.c dig->afmt = rdev->mode_info.afmt[0]; rdev 2530 drivers/gpu/drm/radeon/atombios_encoders.c if (ASIC_IS_DCE8(rdev)) rdev 2532 drivers/gpu/drm/radeon/atombios_encoders.c else if (ASIC_IS_DCE4(rdev)) rdev 2534 drivers/gpu/drm/radeon/atombios_encoders.c else if (ASIC_IS_DCE3(rdev)) rdev 2536 drivers/gpu/drm/radeon/atombios_encoders.c else if (ASIC_IS_AVIVO(rdev)) rdev 2550 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2558 drivers/gpu/drm/radeon/atombios_encoders.c if (!ASIC_IS_DCE3(rdev)) { rdev 2604 drivers/gpu/drm/radeon/atombios_encoders.c if (rdev->asic->display.hdmi_enable) rdev 2605 drivers/gpu/drm/radeon/atombios_encoders.c radeon_hdmi_enable(rdev, encoder, false); rdev 2609 drivers/gpu/drm/radeon/atombios_encoders.c radeon_atom_release_dig_encoder(rdev, dig->dig_encoder); rdev 2693 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2699 drivers/gpu/drm/radeon/atombios_encoders.c dac->tv_std = radeon_atombios_get_tv_info(rdev); rdev 2730 drivers/gpu/drm/radeon/atombios_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 2750 drivers/gpu/drm/radeon/atombios_encoders.c switch (rdev->num_crtc) { rdev 41 drivers/gpu/drm/radeon/atombios_i2c.c struct radeon_device *rdev = dev->dev_private; rdev 51 drivers/gpu/drm/radeon/atombios_i2c.c mutex_lock(&rdev->mode_info.atom_context->scratch_mutex); rdev 53 drivers/gpu/drm/radeon/atombios_i2c.c base = (unsigned char *)rdev->mode_info.atom_context->scratch; rdev 86 drivers/gpu/drm/radeon/atombios_i2c.c atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 99 drivers/gpu/drm/radeon/atombios_i2c.c mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex); rdev 53 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); rdev 54 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); rdev 56 drivers/gpu/drm/radeon/btc_dpm.c extern int ni_mc_load_microcode(struct radeon_device *rdev); rdev 1229 drivers/gpu/drm/radeon/btc_dpm.c static u32 btc_get_valid_mclk(struct radeon_device *rdev, rdev 1232 drivers/gpu/drm/radeon/btc_dpm.c return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, rdev 1236 drivers/gpu/drm/radeon/btc_dpm.c static u32 btc_get_valid_sclk(struct radeon_device *rdev, rdev 1239 drivers/gpu/drm/radeon/btc_dpm.c return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, rdev 1243 drivers/gpu/drm/radeon/btc_dpm.c void btc_skip_blacklist_clocks(struct radeon_device *rdev, rdev 1262 drivers/gpu/drm/radeon/btc_dpm.c *sclk = btc_get_valid_sclk(rdev, max_sclk, *sclk + 1); rdev 1265 drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks(rdev, max_sclk, max_mclk, sclk, mclk); rdev 1270 drivers/gpu/drm/radeon/btc_dpm.c void btc_adjust_clock_combinations(struct radeon_device *rdev, rdev 1282 drivers/gpu/drm/radeon/btc_dpm.c if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) rdev 1283 drivers/gpu/drm/radeon/btc_dpm.c pl->sclk = btc_get_valid_sclk(rdev, rdev 1286 drivers/gpu/drm/radeon/btc_dpm.c (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / rdev 1287 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.mclk_sclk_ratio); rdev 1289 drivers/gpu/drm/radeon/btc_dpm.c if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) rdev 1290 drivers/gpu/drm/radeon/btc_dpm.c pl->mclk = btc_get_valid_mclk(rdev, rdev 1293 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.sclk_mclk_delta); rdev 1309 drivers/gpu/drm/radeon/btc_dpm.c void btc_apply_voltage_delta_rules(struct radeon_device *rdev, rdev 1313 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1320 drivers/gpu/drm/radeon/btc_dpm.c if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { rdev 1322 drivers/gpu/drm/radeon/btc_dpm.c (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); rdev 1326 drivers/gpu/drm/radeon/btc_dpm.c if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { rdev 1328 drivers/gpu/drm/radeon/btc_dpm.c (*vddci - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); rdev 1334 drivers/gpu/drm/radeon/btc_dpm.c static void btc_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 1337 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1376 drivers/gpu/drm/radeon/btc_dpm.c static void btc_enable_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 1379 drivers/gpu/drm/radeon/btc_dpm.c btc_enable_bif_dynamic_pcie_gen2(rdev, enable); rdev 1387 drivers/gpu/drm/radeon/btc_dpm.c static int btc_disable_ulv(struct radeon_device *rdev) rdev 1389 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1392 drivers/gpu/drm/radeon/btc_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_DisableULV) != PPSMC_Result_OK) rdev 1398 drivers/gpu/drm/radeon/btc_dpm.c static int btc_populate_ulv_state(struct radeon_device *rdev, rdev 1402 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1406 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_convert_power_level_to_smc(rdev, rdev 1427 drivers/gpu/drm/radeon/btc_dpm.c static int btc_populate_smc_acpi_state(struct radeon_device *rdev, rdev 1430 drivers/gpu/drm/radeon/btc_dpm.c int ret = cypress_populate_smc_acpi_state(rdev, table); rdev 1441 drivers/gpu/drm/radeon/btc_dpm.c void btc_program_mgcg_hw_sequence(struct radeon_device *rdev, rdev 1455 drivers/gpu/drm/radeon/btc_dpm.c static void btc_cg_clock_gating_default(struct radeon_device *rdev) rdev 1460 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1463 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1466 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1472 drivers/gpu/drm/radeon/btc_dpm.c btc_program_mgcg_hw_sequence(rdev, p, count); rdev 1475 drivers/gpu/drm/radeon/btc_dpm.c static void btc_cg_clock_gating_enable(struct radeon_device *rdev, rdev 1482 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1485 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1488 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1494 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1497 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1500 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1507 drivers/gpu/drm/radeon/btc_dpm.c btc_program_mgcg_hw_sequence(rdev, p, count); rdev 1510 drivers/gpu/drm/radeon/btc_dpm.c static void btc_mg_clock_gating_default(struct radeon_device *rdev) rdev 1515 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1518 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1521 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1527 drivers/gpu/drm/radeon/btc_dpm.c btc_program_mgcg_hw_sequence(rdev, p, count); rdev 1530 drivers/gpu/drm/radeon/btc_dpm.c static void btc_mg_clock_gating_enable(struct radeon_device *rdev, rdev 1537 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1540 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1543 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1549 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1552 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1555 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1562 drivers/gpu/drm/radeon/btc_dpm.c btc_program_mgcg_hw_sequence(rdev, p, count); rdev 1565 drivers/gpu/drm/radeon/btc_dpm.c static void btc_ls_clock_gating_default(struct radeon_device *rdev) rdev 1570 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1573 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1576 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1582 drivers/gpu/drm/radeon/btc_dpm.c btc_program_mgcg_hw_sequence(rdev, p, count); rdev 1585 drivers/gpu/drm/radeon/btc_dpm.c static void btc_ls_clock_gating_enable(struct radeon_device *rdev, rdev 1592 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1595 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1598 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1604 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) { rdev 1607 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_TURKS) { rdev 1610 drivers/gpu/drm/radeon/btc_dpm.c } else if (rdev->family == CHIP_CAICOS) { rdev 1617 drivers/gpu/drm/radeon/btc_dpm.c btc_program_mgcg_hw_sequence(rdev, p, count); rdev 1620 drivers/gpu/drm/radeon/btc_dpm.c bool btc_dpm_enabled(struct radeon_device *rdev) rdev 1622 drivers/gpu/drm/radeon/btc_dpm.c if (rv770_is_smc_running(rdev)) rdev 1628 drivers/gpu/drm/radeon/btc_dpm.c static int btc_init_smc_table(struct radeon_device *rdev, rdev 1631 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1632 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1638 drivers/gpu/drm/radeon/btc_dpm.c cypress_populate_smc_voltage_tables(rdev, table); rdev 1640 drivers/gpu/drm/radeon/btc_dpm.c switch (rdev->pm.int_thermal_type) { rdev 1653 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) rdev 1656 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) rdev 1659 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 1665 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_populate_smc_initial_state(rdev, radeon_boot_state, table); rdev 1673 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_populate_smc_acpi_state(rdev, table); rdev 1678 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_populate_ulv_state(rdev, table); rdev 1685 drivers/gpu/drm/radeon/btc_dpm.c return rv770_copy_bytes_to_smc(rdev, rdev 1692 drivers/gpu/drm/radeon/btc_dpm.c static void btc_set_at_for_uvd(struct radeon_device *rdev, rdev 1695 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1696 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1716 drivers/gpu/drm/radeon/btc_dpm.c void btc_notify_uvd_to_smc(struct radeon_device *rdev, rdev 1719 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1722 drivers/gpu/drm/radeon/btc_dpm.c rv770_write_smc_soft_register(rdev, rdev 1726 drivers/gpu/drm/radeon/btc_dpm.c rv770_write_smc_soft_register(rdev, rdev 1732 drivers/gpu/drm/radeon/btc_dpm.c int btc_reset_to_default(struct radeon_device *rdev) rdev 1734 drivers/gpu/drm/radeon/btc_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_ResetToDefaults) != PPSMC_Result_OK) rdev 1740 drivers/gpu/drm/radeon/btc_dpm.c static void btc_stop_smc(struct radeon_device *rdev) rdev 1744 drivers/gpu/drm/radeon/btc_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1751 drivers/gpu/drm/radeon/btc_dpm.c r7xx_stop_smc(rdev); rdev 1754 drivers/gpu/drm/radeon/btc_dpm.c void btc_read_arb_registers(struct radeon_device *rdev) rdev 1756 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1767 drivers/gpu/drm/radeon/btc_dpm.c static void btc_set_arb0_registers(struct radeon_device *rdev, rdev 1784 drivers/gpu/drm/radeon/btc_dpm.c static void btc_set_boot_state_timing(struct radeon_device *rdev) rdev 1786 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1789 drivers/gpu/drm/radeon/btc_dpm.c btc_set_arb0_registers(rdev, &eg_pi->bootup_arb_registers); rdev 1792 drivers/gpu/drm/radeon/btc_dpm.c static bool btc_is_state_ulv_compatible(struct radeon_device *rdev, rdev 1796 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1811 drivers/gpu/drm/radeon/btc_dpm.c static int btc_set_ulv_dram_timing(struct radeon_device *rdev) rdev 1814 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1817 drivers/gpu/drm/radeon/btc_dpm.c radeon_atom_set_engine_dram_timings(rdev, rdev 1821 drivers/gpu/drm/radeon/btc_dpm.c val = rv770_calculate_memory_refresh_rate(rdev, ulv_pl->sclk); rdev 1824 drivers/gpu/drm/radeon/btc_dpm.c val = cypress_calculate_burst_time(rdev, ulv_pl->sclk, ulv_pl->mclk); rdev 1830 drivers/gpu/drm/radeon/btc_dpm.c static int btc_enable_ulv(struct radeon_device *rdev) rdev 1832 drivers/gpu/drm/radeon/btc_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_EnableULV) != PPSMC_Result_OK) rdev 1838 drivers/gpu/drm/radeon/btc_dpm.c static int btc_set_power_state_conditionally_enable_ulv(struct radeon_device *rdev, rdev 1842 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1845 drivers/gpu/drm/radeon/btc_dpm.c if (btc_is_state_ulv_compatible(rdev, radeon_new_state)) { rdev 1847 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_set_ulv_dram_timing(rdev); rdev 1849 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_enable_ulv(rdev); rdev 1917 drivers/gpu/drm/radeon/btc_dpm.c static int btc_set_mc_special_registers(struct radeon_device *rdev, rdev 1920 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2018 drivers/gpu/drm/radeon/btc_dpm.c static int btc_initialize_mc_reg_table(struct radeon_device *rdev) rdev 2022 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2024 drivers/gpu/drm/radeon/btc_dpm.c u8 module_index = rv770_get_memory_module_index(rdev); rdev 2043 drivers/gpu/drm/radeon/btc_dpm.c ret = radeon_atom_init_mc_reg_table(rdev, module_index, table); rdev 2054 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_set_mc_special_registers(rdev, eg_table); rdev 2067 drivers/gpu/drm/radeon/btc_dpm.c static void btc_init_stutter_mode(struct radeon_device *rdev) rdev 2069 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2083 drivers/gpu/drm/radeon/btc_dpm.c bool btc_dpm_vblank_too_short(struct radeon_device *rdev) rdev 2085 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2086 drivers/gpu/drm/radeon/btc_dpm.c u32 vblank_time = r600_dpm_get_vblank_time(rdev); rdev 2096 drivers/gpu/drm/radeon/btc_dpm.c static void btc_apply_state_adjust_rules(struct radeon_device *rdev, rdev 2105 drivers/gpu/drm/radeon/btc_dpm.c if ((rdev->pm.dpm.new_active_crtc_count > 1) || rdev 2106 drivers/gpu/drm/radeon/btc_dpm.c btc_dpm_vblank_too_short(rdev)) rdev 2111 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.ac_power) rdev 2112 drivers/gpu/drm/radeon/btc_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 2114 drivers/gpu/drm/radeon/btc_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 2116 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.ac_power == false) { rdev 2165 drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, rdev 2201 drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, rdev 2203 drivers/gpu/drm/radeon/btc_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, rdev 2206 drivers/gpu/drm/radeon/btc_dpm.c btc_adjust_clock_combinations(rdev, max_limits, &ps->low); rdev 2207 drivers/gpu/drm/radeon/btc_dpm.c btc_adjust_clock_combinations(rdev, max_limits, &ps->medium); rdev 2208 drivers/gpu/drm/radeon/btc_dpm.c btc_adjust_clock_combinations(rdev, max_limits, &ps->high); rdev 2210 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 2212 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 2214 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 2216 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, rdev 2217 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->low.vddc); rdev 2219 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 2221 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 2223 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 2225 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, rdev 2226 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->medium.vddc); rdev 2228 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 2230 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 2232 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 2234 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, rdev 2235 drivers/gpu/drm/radeon/btc_dpm.c rdev->clock.current_dispclk, max_limits->vddc, &ps->high.vddc); rdev 2237 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, rdev 2239 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, rdev 2241 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_voltage_delta_rules(rdev, max_limits->vddc, max_limits->vddci, rdev 2244 drivers/gpu/drm/radeon/btc_dpm.c if ((ps->high.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) && rdev 2245 drivers/gpu/drm/radeon/btc_dpm.c (ps->medium.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) && rdev 2246 drivers/gpu/drm/radeon/btc_dpm.c (ps->low.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)) rdev 2251 drivers/gpu/drm/radeon/btc_dpm.c if (ps->low.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) rdev 2253 drivers/gpu/drm/radeon/btc_dpm.c if (ps->medium.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) rdev 2255 drivers/gpu/drm/radeon/btc_dpm.c if (ps->high.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) rdev 2259 drivers/gpu/drm/radeon/btc_dpm.c static void btc_update_current_ps(struct radeon_device *rdev, rdev 2263 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2270 drivers/gpu/drm/radeon/btc_dpm.c static void btc_update_requested_ps(struct radeon_device *rdev, rdev 2274 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2282 drivers/gpu/drm/radeon/btc_dpm.c void btc_dpm_reset_asic(struct radeon_device *rdev) rdev 2284 drivers/gpu/drm/radeon/btc_dpm.c rv770_restrict_performance_levels_before_switch(rdev); rdev 2285 drivers/gpu/drm/radeon/btc_dpm.c btc_disable_ulv(rdev); rdev 2286 drivers/gpu/drm/radeon/btc_dpm.c btc_set_boot_state_timing(rdev); rdev 2287 drivers/gpu/drm/radeon/btc_dpm.c rv770_set_boot_state(rdev); rdev 2291 drivers/gpu/drm/radeon/btc_dpm.c int btc_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 2293 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2294 drivers/gpu/drm/radeon/btc_dpm.c struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; rdev 2297 drivers/gpu/drm/radeon/btc_dpm.c btc_update_requested_ps(rdev, new_ps); rdev 2299 drivers/gpu/drm/radeon/btc_dpm.c btc_apply_state_adjust_rules(rdev, &eg_pi->requested_rps); rdev 2304 drivers/gpu/drm/radeon/btc_dpm.c int btc_dpm_set_power_state(struct radeon_device *rdev) rdev 2306 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2311 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_disable_ulv(rdev); rdev 2312 drivers/gpu/drm/radeon/btc_dpm.c btc_set_boot_state_timing(rdev); rdev 2313 drivers/gpu/drm/radeon/btc_dpm.c ret = rv770_restrict_performance_levels_before_switch(rdev); rdev 2319 drivers/gpu/drm/radeon/btc_dpm.c cypress_notify_link_speed_change_before_state_change(rdev, new_ps, old_ps); rdev 2321 drivers/gpu/drm/radeon/btc_dpm.c rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 2322 drivers/gpu/drm/radeon/btc_dpm.c ret = rv770_halt_smc(rdev); rdev 2327 drivers/gpu/drm/radeon/btc_dpm.c btc_set_at_for_uvd(rdev, new_ps); rdev 2329 drivers/gpu/drm/radeon/btc_dpm.c btc_notify_uvd_to_smc(rdev, new_ps); rdev 2330 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_upload_sw_state(rdev, new_ps); rdev 2336 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_upload_mc_reg_table(rdev, new_ps); rdev 2343 drivers/gpu/drm/radeon/btc_dpm.c cypress_program_memory_timing_parameters(rdev, new_ps); rdev 2345 drivers/gpu/drm/radeon/btc_dpm.c ret = rv770_resume_smc(rdev); rdev 2350 drivers/gpu/drm/radeon/btc_dpm.c ret = rv770_set_sw_state(rdev); rdev 2355 drivers/gpu/drm/radeon/btc_dpm.c rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 2358 drivers/gpu/drm/radeon/btc_dpm.c cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); rdev 2360 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_set_power_state_conditionally_enable_ulv(rdev, new_ps); rdev 2369 drivers/gpu/drm/radeon/btc_dpm.c void btc_dpm_post_set_power_state(struct radeon_device *rdev) rdev 2371 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2374 drivers/gpu/drm/radeon/btc_dpm.c btc_update_current_ps(rdev, new_ps); rdev 2377 drivers/gpu/drm/radeon/btc_dpm.c int btc_dpm_enable(struct radeon_device *rdev) rdev 2379 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2380 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2381 drivers/gpu/drm/radeon/btc_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 2385 drivers/gpu/drm/radeon/btc_dpm.c btc_cg_clock_gating_default(rdev); rdev 2387 drivers/gpu/drm/radeon/btc_dpm.c if (btc_dpm_enabled(rdev)) rdev 2391 drivers/gpu/drm/radeon/btc_dpm.c btc_mg_clock_gating_default(rdev); rdev 2394 drivers/gpu/drm/radeon/btc_dpm.c btc_ls_clock_gating_default(rdev); rdev 2397 drivers/gpu/drm/radeon/btc_dpm.c rv770_enable_voltage_control(rdev, true); rdev 2398 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_construct_voltage_tables(rdev); rdev 2406 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_get_mvdd_configuration(rdev); rdev 2414 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_initialize_mc_reg_table(rdev); rdev 2419 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 2420 drivers/gpu/drm/radeon/btc_dpm.c rv770_enable_backbias(rdev, true); rdev 2423 drivers/gpu/drm/radeon/btc_dpm.c cypress_enable_spread_spectrum(rdev, true); rdev 2426 drivers/gpu/drm/radeon/btc_dpm.c rv770_enable_thermal_protection(rdev, true); rdev 2428 drivers/gpu/drm/radeon/btc_dpm.c rv770_setup_bsp(rdev); rdev 2429 drivers/gpu/drm/radeon/btc_dpm.c rv770_program_git(rdev); rdev 2430 drivers/gpu/drm/radeon/btc_dpm.c rv770_program_tp(rdev); rdev 2431 drivers/gpu/drm/radeon/btc_dpm.c rv770_program_tpp(rdev); rdev 2432 drivers/gpu/drm/radeon/btc_dpm.c rv770_program_sstp(rdev); rdev 2433 drivers/gpu/drm/radeon/btc_dpm.c rv770_program_engine_speed_parameters(rdev); rdev 2434 drivers/gpu/drm/radeon/btc_dpm.c cypress_enable_display_gap(rdev); rdev 2435 drivers/gpu/drm/radeon/btc_dpm.c rv770_program_vc(rdev); rdev 2438 drivers/gpu/drm/radeon/btc_dpm.c btc_enable_dynamic_pcie_gen2(rdev, true); rdev 2440 drivers/gpu/drm/radeon/btc_dpm.c ret = rv770_upload_firmware(rdev); rdev 2445 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_get_table_locations(rdev); rdev 2450 drivers/gpu/drm/radeon/btc_dpm.c ret = btc_init_smc_table(rdev, boot_ps); rdev 2455 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_populate_mc_reg_table(rdev, boot_ps); rdev 2462 drivers/gpu/drm/radeon/btc_dpm.c cypress_program_response_times(rdev); rdev 2463 drivers/gpu/drm/radeon/btc_dpm.c r7xx_start_smc(rdev); rdev 2464 drivers/gpu/drm/radeon/btc_dpm.c ret = cypress_notify_smc_display_change(rdev, false); rdev 2469 drivers/gpu/drm/radeon/btc_dpm.c cypress_enable_sclk_control(rdev, true); rdev 2472 drivers/gpu/drm/radeon/btc_dpm.c cypress_enable_mclk_control(rdev, true); rdev 2474 drivers/gpu/drm/radeon/btc_dpm.c cypress_start_dpm(rdev); rdev 2477 drivers/gpu/drm/radeon/btc_dpm.c btc_cg_clock_gating_enable(rdev, true); rdev 2480 drivers/gpu/drm/radeon/btc_dpm.c btc_mg_clock_gating_enable(rdev, true); rdev 2483 drivers/gpu/drm/radeon/btc_dpm.c btc_ls_clock_gating_enable(rdev, true); rdev 2485 drivers/gpu/drm/radeon/btc_dpm.c rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); rdev 2487 drivers/gpu/drm/radeon/btc_dpm.c btc_init_stutter_mode(rdev); rdev 2489 drivers/gpu/drm/radeon/btc_dpm.c btc_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 2494 drivers/gpu/drm/radeon/btc_dpm.c void btc_dpm_disable(struct radeon_device *rdev) rdev 2496 drivers/gpu/drm/radeon/btc_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2497 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2499 drivers/gpu/drm/radeon/btc_dpm.c if (!btc_dpm_enabled(rdev)) rdev 2502 drivers/gpu/drm/radeon/btc_dpm.c rv770_clear_vc(rdev); rdev 2505 drivers/gpu/drm/radeon/btc_dpm.c rv770_enable_thermal_protection(rdev, false); rdev 2508 drivers/gpu/drm/radeon/btc_dpm.c btc_enable_dynamic_pcie_gen2(rdev, false); rdev 2510 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->irq.installed && rdev 2511 drivers/gpu/drm/radeon/btc_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 2512 drivers/gpu/drm/radeon/btc_dpm.c rdev->irq.dpm_thermal = false; rdev 2513 drivers/gpu/drm/radeon/btc_dpm.c radeon_irq_set(rdev); rdev 2517 drivers/gpu/drm/radeon/btc_dpm.c btc_cg_clock_gating_enable(rdev, false); rdev 2520 drivers/gpu/drm/radeon/btc_dpm.c btc_mg_clock_gating_enable(rdev, false); rdev 2523 drivers/gpu/drm/radeon/btc_dpm.c btc_ls_clock_gating_enable(rdev, false); rdev 2525 drivers/gpu/drm/radeon/btc_dpm.c rv770_stop_dpm(rdev); rdev 2526 drivers/gpu/drm/radeon/btc_dpm.c btc_reset_to_default(rdev); rdev 2527 drivers/gpu/drm/radeon/btc_dpm.c btc_stop_smc(rdev); rdev 2528 drivers/gpu/drm/radeon/btc_dpm.c cypress_enable_spread_spectrum(rdev, false); rdev 2530 drivers/gpu/drm/radeon/btc_dpm.c btc_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 2533 drivers/gpu/drm/radeon/btc_dpm.c void btc_dpm_setup_asic(struct radeon_device *rdev) rdev 2535 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2538 drivers/gpu/drm/radeon/btc_dpm.c r = ni_mc_load_microcode(rdev); rdev 2541 drivers/gpu/drm/radeon/btc_dpm.c rv770_get_memory_type(rdev); rdev 2542 drivers/gpu/drm/radeon/btc_dpm.c rv740_read_clock_registers(rdev); rdev 2543 drivers/gpu/drm/radeon/btc_dpm.c btc_read_arb_registers(rdev); rdev 2544 drivers/gpu/drm/radeon/btc_dpm.c rv770_read_voltage_smio_registers(rdev); rdev 2547 drivers/gpu/drm/radeon/btc_dpm.c cypress_advertise_gen2_capability(rdev); rdev 2549 drivers/gpu/drm/radeon/btc_dpm.c rv770_get_pcie_gen2_status(rdev); rdev 2550 drivers/gpu/drm/radeon/btc_dpm.c rv770_enable_acpi_pm(rdev); rdev 2553 drivers/gpu/drm/radeon/btc_dpm.c int btc_dpm_init(struct radeon_device *rdev) rdev 2563 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.priv = eg_pi; rdev 2566 drivers/gpu/drm/radeon/btc_dpm.c rv770_get_max_vddc(rdev); rdev 2574 drivers/gpu/drm/radeon/btc_dpm.c ret = r600_get_platform_caps(rdev); rdev 2578 drivers/gpu/drm/radeon/btc_dpm.c ret = rv7xx_parse_power_table(rdev); rdev 2581 drivers/gpu/drm/radeon/btc_dpm.c ret = r600_parse_extended_power_table(rdev); rdev 2585 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = rdev 2589 drivers/gpu/drm/radeon/btc_dpm.c if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { rdev 2590 drivers/gpu/drm/radeon/btc_dpm.c r600_free_extended_power_table(rdev); rdev 2593 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; rdev 2594 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; rdev 2595 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; rdev 2596 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; rdev 2597 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 800; rdev 2598 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; rdev 2599 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 800; rdev 2600 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000; rdev 2601 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 800; rdev 2603 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.voltage_response_time == 0) rdev 2604 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; rdev 2605 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.dpm.backbias_response_time == 0) rdev 2606 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; rdev 2608 drivers/gpu/drm/radeon/btc_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 2637 drivers/gpu/drm/radeon/btc_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0); rdev 2640 drivers/gpu/drm/radeon/btc_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0); rdev 2643 drivers/gpu/drm/radeon/btc_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0); rdev 2645 drivers/gpu/drm/radeon/btc_dpm.c rv770_get_engine_memory_ss(rdev); rdev 2662 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE) rdev 2669 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->flags & RADEON_IS_MOBILITY) rdev 2683 drivers/gpu/drm/radeon/btc_dpm.c radeon_acpi_is_pcie_performance_request_supported(rdev); rdev 2688 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_BARTS) rdev 2694 drivers/gpu/drm/radeon/btc_dpm.c if (ASIC_IS_LOMBOK(rdev)) rdev 2701 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 4; rdev 2702 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200; rdev 2703 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2 = 900; rdev 2704 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.count = ARRAY_SIZE(btc_valid_sclk); rdev 2705 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.values = btc_valid_sclk; rdev 2706 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0; rdev 2707 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; rdev 2709 drivers/gpu/drm/radeon/btc_dpm.c if (rdev->family == CHIP_TURKS) rdev 2710 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.sclk_mclk_delta = 15000; rdev 2712 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.sclk_mclk_delta = 10000; rdev 2715 drivers/gpu/drm/radeon/btc_dpm.c if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || rdev 2716 drivers/gpu/drm/radeon/btc_dpm.c (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) rdev 2717 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc = rdev 2718 drivers/gpu/drm/radeon/btc_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 2723 drivers/gpu/drm/radeon/btc_dpm.c void btc_dpm_fini(struct radeon_device *rdev) rdev 2727 drivers/gpu/drm/radeon/btc_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 2728 drivers/gpu/drm/radeon/btc_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 2730 drivers/gpu/drm/radeon/btc_dpm.c kfree(rdev->pm.dpm.ps); rdev 2731 drivers/gpu/drm/radeon/btc_dpm.c kfree(rdev->pm.dpm.priv); rdev 2732 drivers/gpu/drm/radeon/btc_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); rdev 2733 drivers/gpu/drm/radeon/btc_dpm.c r600_free_extended_power_table(rdev); rdev 2736 drivers/gpu/drm/radeon/btc_dpm.c void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 2739 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2762 drivers/gpu/drm/radeon/btc_dpm.c u32 btc_dpm_get_current_sclk(struct radeon_device *rdev) rdev 2764 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2785 drivers/gpu/drm/radeon/btc_dpm.c u32 btc_dpm_get_current_mclk(struct radeon_device *rdev) rdev 2787 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2808 drivers/gpu/drm/radeon/btc_dpm.c u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 2810 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2819 drivers/gpu/drm/radeon/btc_dpm.c u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 2821 drivers/gpu/drm/radeon/btc_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 41 drivers/gpu/drm/radeon/btc_dpm.h void btc_read_arb_registers(struct radeon_device *rdev); rdev 42 drivers/gpu/drm/radeon/btc_dpm.h void btc_program_mgcg_hw_sequence(struct radeon_device *rdev, rdev 44 drivers/gpu/drm/radeon/btc_dpm.h void btc_skip_blacklist_clocks(struct radeon_device *rdev, rdev 47 drivers/gpu/drm/radeon/btc_dpm.h void btc_adjust_clock_combinations(struct radeon_device *rdev, rdev 54 drivers/gpu/drm/radeon/btc_dpm.h void btc_apply_voltage_delta_rules(struct radeon_device *rdev, rdev 57 drivers/gpu/drm/radeon/btc_dpm.h bool btc_dpm_enabled(struct radeon_device *rdev); rdev 58 drivers/gpu/drm/radeon/btc_dpm.h int btc_reset_to_default(struct radeon_device *rdev); rdev 59 drivers/gpu/drm/radeon/btc_dpm.h void btc_notify_uvd_to_smc(struct radeon_device *rdev, rdev 167 drivers/gpu/drm/radeon/ci_dpm.c extern u8 rv770_get_memory_module_index(struct radeon_device *rdev); rdev 168 drivers/gpu/drm/radeon/ci_dpm.c extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, rdev 172 drivers/gpu/drm/radeon/ci_dpm.c extern void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev, rdev 175 drivers/gpu/drm/radeon/ci_dpm.c extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev); rdev 176 drivers/gpu/drm/radeon/ci_dpm.c extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); rdev 177 drivers/gpu/drm/radeon/ci_dpm.c extern int ci_mc_load_microcode(struct radeon_device *rdev); rdev 178 drivers/gpu/drm/radeon/ci_dpm.c extern void cik_update_cg(struct radeon_device *rdev, rdev 181 drivers/gpu/drm/radeon/ci_dpm.c static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev, rdev 184 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_power_limit(struct radeon_device *rdev, u32 n); rdev 185 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_overdrive_target_tdp(struct radeon_device *rdev, rdev 187 drivers/gpu/drm/radeon/ci_dpm.c static int ci_update_uvd_dpm(struct radeon_device *rdev, bool gate); rdev 189 drivers/gpu/drm/radeon/ci_dpm.c static PPSMC_Result ci_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg); rdev 190 drivers/gpu/drm/radeon/ci_dpm.c static PPSMC_Result ci_send_msg_to_smc_with_parameter(struct radeon_device *rdev, rdev 193 drivers/gpu/drm/radeon/ci_dpm.c static void ci_thermal_start_smc_fan_control(struct radeon_device *rdev); rdev 194 drivers/gpu/drm/radeon/ci_dpm.c static void ci_fan_ctrl_set_default_mode(struct radeon_device *rdev); rdev 196 drivers/gpu/drm/radeon/ci_dpm.c static struct ci_power_info *ci_get_pi(struct radeon_device *rdev) rdev 198 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = rdev->pm.dpm.priv; rdev 210 drivers/gpu/drm/radeon/ci_dpm.c static void ci_initialize_powertune_defaults(struct radeon_device *rdev) rdev 212 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 214 drivers/gpu/drm/radeon/ci_dpm.c switch (rdev->pdev->device) { rdev 261 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->family == CHIP_HAWAII) rdev 275 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_bapm_vddc_vid_sidd(struct radeon_device *rdev) rdev 277 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 283 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) rdev 285 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8) rdev 287 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.cac_leakage_table.count != rdev 288 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) rdev 291 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { rdev 292 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { rdev 293 drivers/gpu/drm/radeon/ci_dpm.c lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); rdev 294 drivers/gpu/drm/radeon/ci_dpm.c hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); rdev 295 drivers/gpu/drm/radeon/ci_dpm.c hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3); rdev 297 drivers/gpu/drm/radeon/ci_dpm.c lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); rdev 298 drivers/gpu/drm/radeon/ci_dpm.c hi_vid[i] = ci_convert_to_vid((u16)rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage); rdev 304 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_vddc_vid(struct radeon_device *rdev) rdev 306 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 319 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_svi_load_line(struct radeon_device *rdev) rdev 321 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 332 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_tdc_limit(struct radeon_device *rdev) rdev 334 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 338 drivers/gpu/drm/radeon/ci_dpm.c tdc_limit = rdev->pm.dpm.dyn_state.cac_tdp_table->tdc * 256; rdev 347 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_dw8(struct radeon_device *rdev) rdev 349 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 353 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, rdev 367 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_fuzzy_fan(struct radeon_device *rdev) rdev 369 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 371 drivers/gpu/drm/radeon/ci_dpm.c if ((rdev->pm.dpm.fan.fan_output_sensitivity & (1 << 15)) || rdev 372 drivers/gpu/drm/radeon/ci_dpm.c (rdev->pm.dpm.fan.fan_output_sensitivity == 0)) rdev 373 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.fan.fan_output_sensitivity = rdev 374 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.fan.default_fan_output_sensitivity; rdev 377 drivers/gpu/drm/radeon/ci_dpm.c cpu_to_be16(rdev->pm.dpm.fan.fan_output_sensitivity); rdev 382 drivers/gpu/drm/radeon/ci_dpm.c static int ci_min_max_v_gnbl_pm_lid_from_bapm_vddc(struct radeon_device *rdev) rdev 384 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 414 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_bapm_vddc_base_leakage_sidd(struct radeon_device *rdev) rdev 416 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 420 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table; rdev 431 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_bapm_parameters_in_dpm_table(struct radeon_device *rdev) rdev 433 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 437 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table; rdev 438 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table; rdev 479 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_pm_base(struct radeon_device *rdev) rdev 481 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 486 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, rdev 492 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_bapm_vddc_vid_sidd(rdev); rdev 495 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_vddc_vid(rdev); rdev 498 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_svi_load_line(rdev); rdev 501 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_tdc_limit(rdev); rdev 504 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_dw8(rdev); rdev 507 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_fuzzy_fan(rdev); rdev 510 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_min_max_v_gnbl_pm_lid_from_bapm_vddc(rdev); rdev 513 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_bapm_vddc_base_leakage_sidd(rdev); rdev 516 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_copy_bytes_to_smc(rdev, pm_fuse_table_offset, rdev 526 drivers/gpu/drm/radeon/ci_dpm.c static void ci_do_enable_didt(struct radeon_device *rdev, const bool enable) rdev 528 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 568 drivers/gpu/drm/radeon/ci_dpm.c static int ci_program_pt_config_registers(struct radeon_device *rdev, rdev 616 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_didt(struct radeon_device *rdev, bool enable) rdev 618 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 623 drivers/gpu/drm/radeon/ci_dpm.c cik_enter_rlc_safe_mode(rdev); rdev 626 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_program_pt_config_registers(rdev, didt_config_ci); rdev 628 drivers/gpu/drm/radeon/ci_dpm.c cik_exit_rlc_safe_mode(rdev); rdev 633 drivers/gpu/drm/radeon/ci_dpm.c ci_do_enable_didt(rdev, enable); rdev 635 drivers/gpu/drm/radeon/ci_dpm.c cik_exit_rlc_safe_mode(rdev); rdev 641 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_power_containment(struct radeon_device *rdev, bool enable) rdev 643 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 651 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_EnableDTE); rdev 659 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_TDCLimitEnable); rdev 667 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_PkgPwrLimitEnable); rdev 672 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table; rdev 678 drivers/gpu/drm/radeon/ci_dpm.c ci_set_power_limit(rdev, default_pwr_limit); rdev 685 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc(rdev, PPSMC_MSG_TDCLimitDisable); rdev 688 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc(rdev, PPSMC_MSG_DisableDTE); rdev 691 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc(rdev, PPSMC_MSG_PkgPwrLimitDisable); rdev 699 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_smc_cac(struct radeon_device *rdev, bool enable) rdev 701 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 707 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_EnableCac); rdev 715 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc(rdev, PPSMC_MSG_DisableCac); rdev 723 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_thermal_based_sclk_dpm(struct radeon_device *rdev, rdev 726 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 731 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_ENABLE_THERMAL_DPM); rdev 733 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_DISABLE_THERMAL_DPM); rdev 742 drivers/gpu/drm/radeon/ci_dpm.c static int ci_power_control_set_level(struct radeon_device *rdev) rdev 744 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 746 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table; rdev 754 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.tdp_adjustment : (-1 * rdev->pm.dpm.tdp_adjustment); rdev 758 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_set_overdrive_target_tdp(rdev, (u32)target_tdp); rdev 764 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate) rdev 766 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 773 drivers/gpu/drm/radeon/ci_dpm.c ci_update_uvd_dpm(rdev, gate); rdev 776 drivers/gpu/drm/radeon/ci_dpm.c bool ci_dpm_vblank_too_short(struct radeon_device *rdev) rdev 778 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 779 drivers/gpu/drm/radeon/ci_dpm.c u32 vblank_time = r600_dpm_get_vblank_time(rdev); rdev 785 drivers/gpu/drm/radeon/ci_dpm.c if (r600_dpm_get_vrefresh(rdev) > 120) rdev 795 drivers/gpu/drm/radeon/ci_dpm.c static void ci_apply_state_adjust_rules(struct radeon_device *rdev, rdev 799 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 806 drivers/gpu/drm/radeon/ci_dpm.c rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; rdev 807 drivers/gpu/drm/radeon/ci_dpm.c rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; rdev 813 drivers/gpu/drm/radeon/ci_dpm.c if ((rdev->pm.dpm.new_active_crtc_count > 1) || rdev 814 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_vblank_too_short(rdev)) rdev 824 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.ac_power) rdev 825 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 827 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 829 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.ac_power == false) { rdev 849 drivers/gpu/drm/radeon/ci_dpm.c if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) rdev 850 drivers/gpu/drm/radeon/ci_dpm.c sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; rdev 851 drivers/gpu/drm/radeon/ci_dpm.c if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) rdev 852 drivers/gpu/drm/radeon/ci_dpm.c mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; rdev 870 drivers/gpu/drm/radeon/ci_dpm.c static int ci_thermal_set_temperature_range(struct radeon_device *rdev, rdev 900 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.thermal.min_temp = low_temp; rdev 901 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.thermal.max_temp = high_temp; rdev 906 drivers/gpu/drm/radeon/ci_dpm.c static int ci_thermal_enable_alert(struct radeon_device *rdev, rdev 915 drivers/gpu/drm/radeon/ci_dpm.c rdev->irq.dpm_thermal = false; rdev 916 drivers/gpu/drm/radeon/ci_dpm.c result = ci_send_msg_to_smc(rdev, PPSMC_MSG_Thermal_Cntl_Enable); rdev 924 drivers/gpu/drm/radeon/ci_dpm.c rdev->irq.dpm_thermal = true; rdev 925 drivers/gpu/drm/radeon/ci_dpm.c result = ci_send_msg_to_smc(rdev, PPSMC_MSG_Thermal_Cntl_Disable); rdev 935 drivers/gpu/drm/radeon/ci_dpm.c static void ci_fan_ctrl_set_static_mode(struct radeon_device *rdev, u32 mode) rdev 937 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 957 drivers/gpu/drm/radeon/ci_dpm.c static int ci_thermal_setup_fan_table(struct radeon_device *rdev) rdev 959 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 969 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.fan.ucode_fan_control = false; rdev 976 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.fan.ucode_fan_control = false; rdev 980 drivers/gpu/drm/radeon/ci_dpm.c tmp64 = (u64)rdev->pm.dpm.fan.pwm_min * duty100; rdev 984 drivers/gpu/drm/radeon/ci_dpm.c t_diff1 = rdev->pm.dpm.fan.t_med - rdev->pm.dpm.fan.t_min; rdev 985 drivers/gpu/drm/radeon/ci_dpm.c t_diff2 = rdev->pm.dpm.fan.t_high - rdev->pm.dpm.fan.t_med; rdev 987 drivers/gpu/drm/radeon/ci_dpm.c pwm_diff1 = rdev->pm.dpm.fan.pwm_med - rdev->pm.dpm.fan.pwm_min; rdev 988 drivers/gpu/drm/radeon/ci_dpm.c pwm_diff2 = rdev->pm.dpm.fan.pwm_high - rdev->pm.dpm.fan.pwm_med; rdev 993 drivers/gpu/drm/radeon/ci_dpm.c fan_table.TempMin = cpu_to_be16((50 + rdev->pm.dpm.fan.t_min) / 100); rdev 994 drivers/gpu/drm/radeon/ci_dpm.c fan_table.TempMed = cpu_to_be16((50 + rdev->pm.dpm.fan.t_med) / 100); rdev 995 drivers/gpu/drm/radeon/ci_dpm.c fan_table.TempMax = cpu_to_be16((50 + rdev->pm.dpm.fan.t_max) / 100); rdev 1002 drivers/gpu/drm/radeon/ci_dpm.c fan_table.HystDown = cpu_to_be16(rdev->pm.dpm.fan.t_hyst); rdev 1010 drivers/gpu/drm/radeon/ci_dpm.c reference_clock = radeon_get_xclk(rdev); rdev 1012 drivers/gpu/drm/radeon/ci_dpm.c fan_table.RefreshPeriod = cpu_to_be32((rdev->pm.dpm.fan.cycle_delay * rdev 1020 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_copy_bytes_to_smc(rdev, rdev 1028 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.fan.ucode_fan_control = false; rdev 1034 drivers/gpu/drm/radeon/ci_dpm.c static int ci_fan_ctrl_start_smc_fan_control(struct radeon_device *rdev) rdev 1036 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1040 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_send_msg_to_smc_with_parameter(rdev, rdev 1045 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_send_msg_to_smc_with_parameter(rdev, rdev 1047 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.fan.default_max_fan_pwm); rdev 1051 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_send_msg_to_smc_with_parameter(rdev, rdev 1062 drivers/gpu/drm/radeon/ci_dpm.c static int ci_fan_ctrl_stop_smc_fan_control(struct radeon_device *rdev) rdev 1065 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1067 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_send_msg_to_smc(rdev, PPSMC_StopFanControl); rdev 1075 drivers/gpu/drm/radeon/ci_dpm.c int ci_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, rdev 1081 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.no_fan) rdev 1100 drivers/gpu/drm/radeon/ci_dpm.c int ci_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, rdev 1106 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1108 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.no_fan) rdev 1133 drivers/gpu/drm/radeon/ci_dpm.c void ci_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode) rdev 1137 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) rdev 1138 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_stop_smc_fan_control(rdev); rdev 1139 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_set_static_mode(rdev, mode); rdev 1142 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) rdev 1143 drivers/gpu/drm/radeon/ci_dpm.c ci_thermal_start_smc_fan_control(rdev); rdev 1145 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_set_default_mode(rdev); rdev 1149 drivers/gpu/drm/radeon/ci_dpm.c u32 ci_fan_ctrl_get_mode(struct radeon_device *rdev) rdev 1151 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1162 drivers/gpu/drm/radeon/ci_dpm.c static int ci_fan_ctrl_get_fan_speed_rpm(struct radeon_device *rdev, rdev 1166 drivers/gpu/drm/radeon/ci_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 1168 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.no_fan) rdev 1171 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.fan_pulses_per_revolution == 0) rdev 1183 drivers/gpu/drm/radeon/ci_dpm.c static int ci_fan_ctrl_set_fan_speed_rpm(struct radeon_device *rdev, rdev 1187 drivers/gpu/drm/radeon/ci_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 1189 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.no_fan) rdev 1192 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.fan_pulses_per_revolution == 0) rdev 1195 drivers/gpu/drm/radeon/ci_dpm.c if ((speed < rdev->pm.fan_min_rpm) || rdev 1196 drivers/gpu/drm/radeon/ci_dpm.c (speed > rdev->pm.fan_max_rpm)) rdev 1199 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) rdev 1200 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_stop_smc_fan_control(rdev); rdev 1207 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC_RPM); rdev 1213 drivers/gpu/drm/radeon/ci_dpm.c static void ci_fan_ctrl_set_default_mode(struct radeon_device *rdev) rdev 1215 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1230 drivers/gpu/drm/radeon/ci_dpm.c static void ci_thermal_start_smc_fan_control(struct radeon_device *rdev) rdev 1232 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) { rdev 1233 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_start_smc_fan_control(rdev); rdev 1234 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC); rdev 1238 drivers/gpu/drm/radeon/ci_dpm.c static void ci_thermal_initialize(struct radeon_device *rdev) rdev 1242 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.fan_pulses_per_revolution) { rdev 1244 drivers/gpu/drm/radeon/ci_dpm.c tmp |= EDGE_PER_REV(rdev->pm.fan_pulses_per_revolution -1); rdev 1253 drivers/gpu/drm/radeon/ci_dpm.c static int ci_thermal_start_thermal_controller(struct radeon_device *rdev) rdev 1257 drivers/gpu/drm/radeon/ci_dpm.c ci_thermal_initialize(rdev); rdev 1258 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_thermal_set_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 1261 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_thermal_enable_alert(rdev, true); rdev 1264 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) { rdev 1265 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_thermal_setup_fan_table(rdev); rdev 1268 drivers/gpu/drm/radeon/ci_dpm.c ci_thermal_start_smc_fan_control(rdev); rdev 1274 drivers/gpu/drm/radeon/ci_dpm.c static void ci_thermal_stop_thermal_controller(struct radeon_device *rdev) rdev 1276 drivers/gpu/drm/radeon/ci_dpm.c if (!rdev->pm.no_fan) rdev 1277 drivers/gpu/drm/radeon/ci_dpm.c ci_fan_ctrl_set_default_mode(rdev); rdev 1281 drivers/gpu/drm/radeon/ci_dpm.c static int ci_read_smc_soft_register(struct radeon_device *rdev, rdev 1284 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1286 drivers/gpu/drm/radeon/ci_dpm.c return ci_read_smc_sram_dword(rdev, rdev 1292 drivers/gpu/drm/radeon/ci_dpm.c static int ci_write_smc_soft_register(struct radeon_device *rdev, rdev 1295 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1297 drivers/gpu/drm/radeon/ci_dpm.c return ci_write_smc_sram_dword(rdev, rdev 1302 drivers/gpu/drm/radeon/ci_dpm.c static void ci_init_fps_limits(struct radeon_device *rdev) rdev 1304 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1318 drivers/gpu/drm/radeon/ci_dpm.c static int ci_update_sclk_t(struct radeon_device *rdev) rdev 1320 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1327 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_copy_bytes_to_smc(rdev, rdev 1338 drivers/gpu/drm/radeon/ci_dpm.c static void ci_get_leakage_voltages(struct radeon_device *rdev) rdev 1340 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1348 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { rdev 1351 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atom_get_voltage_evv(rdev, virtual_voltage_id, &vddc) != 0) rdev 1359 drivers/gpu/drm/radeon/ci_dpm.c } else if (radeon_atom_get_leakage_id_from_vbios(rdev, &leakage_id) == 0) { rdev 1362 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atom_get_leakage_vddc_based_on_leakage_params(rdev, &vddc, &vddci, rdev 1380 drivers/gpu/drm/radeon/ci_dpm.c static void ci_set_dpm_event_sources(struct radeon_device *rdev, u32 sources) rdev 1382 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1429 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_auto_throttle_source(struct radeon_device *rdev, rdev 1433 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1438 drivers/gpu/drm/radeon/ci_dpm.c ci_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 1443 drivers/gpu/drm/radeon/ci_dpm.c ci_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 1448 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_vr_hot_gpio_interrupt(struct radeon_device *rdev) rdev 1450 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) rdev 1451 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc(rdev, PPSMC_MSG_EnableVRHotGPIOInterrupt); rdev 1454 drivers/gpu/drm/radeon/ci_dpm.c static int ci_unfreeze_sclk_mclk_dpm(struct radeon_device *rdev) rdev 1456 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1464 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_SCLKDPM_UnfreezeLevel); rdev 1471 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_MCLKDPM_UnfreezeLevel); rdev 1480 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_sclk_mclk_dpm(struct radeon_device *rdev, bool enable) rdev 1482 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1487 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_DPM_Enable); rdev 1493 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_MCLKDPM_Enable); rdev 1511 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_DPM_Disable); rdev 1517 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_MCLKDPM_Disable); rdev 1526 drivers/gpu/drm/radeon/ci_dpm.c static int ci_start_dpm(struct radeon_device *rdev) rdev 1528 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1541 drivers/gpu/drm/radeon/ci_dpm.c ci_write_smc_soft_register(rdev, offsetof(SMU7_SoftRegisters, VoltageChangeTimeout), 0x1000); rdev 1545 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_Voltage_Cntl_Enable); rdev 1549 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_sclk_mclk_dpm(rdev, true); rdev 1554 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_PCIeDPM_Enable); rdev 1562 drivers/gpu/drm/radeon/ci_dpm.c static int ci_freeze_sclk_mclk_dpm(struct radeon_device *rdev) rdev 1564 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1572 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_SCLKDPM_FreezeLevel); rdev 1579 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_MCLKDPM_FreezeLevel); rdev 1587 drivers/gpu/drm/radeon/ci_dpm.c static int ci_stop_dpm(struct radeon_device *rdev) rdev 1589 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1603 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_PCIeDPM_Disable); rdev 1608 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_sclk_mclk_dpm(rdev, false); rdev 1612 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, PPSMC_MSG_Voltage_Cntl_Disable); rdev 1619 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_sclk_control(struct radeon_device *rdev, bool enable) rdev 1631 drivers/gpu/drm/radeon/ci_dpm.c static int ci_notify_hw_of_power_source(struct radeon_device *rdev, rdev 1634 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1636 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table; rdev 1644 drivers/gpu/drm/radeon/ci_dpm.c ci_set_power_limit(rdev, power_limit); rdev 1648 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc(rdev, PPSMC_MSG_RunningOnAC); rdev 1650 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc(rdev, PPSMC_MSG_Remove_DC_Clamp); rdev 1657 drivers/gpu/drm/radeon/ci_dpm.c static PPSMC_Result ci_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg) rdev 1662 drivers/gpu/drm/radeon/ci_dpm.c if (!ci_is_smc_running(rdev)) rdev 1667 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1678 drivers/gpu/drm/radeon/ci_dpm.c static PPSMC_Result ci_send_msg_to_smc_with_parameter(struct radeon_device *rdev, rdev 1682 drivers/gpu/drm/radeon/ci_dpm.c return ci_send_msg_to_smc(rdev, msg); rdev 1685 drivers/gpu/drm/radeon/ci_dpm.c static PPSMC_Result ci_send_msg_to_smc_return_parameter(struct radeon_device *rdev, rdev 1690 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, msg); rdev 1698 drivers/gpu/drm/radeon/ci_dpm.c static int ci_dpm_force_state_sclk(struct radeon_device *rdev, u32 n) rdev 1700 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1704 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SCLKDPM_SetEnabledMask, 1 << n); rdev 1712 drivers/gpu/drm/radeon/ci_dpm.c static int ci_dpm_force_state_mclk(struct radeon_device *rdev, u32 n) rdev 1714 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1718 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_MCLKDPM_SetEnabledMask, 1 << n); rdev 1726 drivers/gpu/drm/radeon/ci_dpm.c static int ci_dpm_force_state_pcie(struct radeon_device *rdev, u32 n) rdev 1728 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1732 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_PCIeDPM_ForceLevel, n); rdev 1740 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_power_limit(struct radeon_device *rdev, u32 n) rdev 1742 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1746 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_PkgPwrSetLimit, n); rdev 1754 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_overdrive_target_tdp(struct radeon_device *rdev, rdev 1758 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_OverDriveSetTargetTdp, target_tdp); rdev 1765 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_boot_state(struct radeon_device *rdev) rdev 1767 drivers/gpu/drm/radeon/ci_dpm.c return ci_enable_sclk_mclk_dpm(rdev, false); rdev 1771 drivers/gpu/drm/radeon/ci_dpm.c static u32 ci_get_average_sclk_freq(struct radeon_device *rdev) rdev 1775 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_return_parameter(rdev, rdev 1784 drivers/gpu/drm/radeon/ci_dpm.c static u32 ci_get_average_mclk_freq(struct radeon_device *rdev) rdev 1788 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_return_parameter(rdev, rdev 1797 drivers/gpu/drm/radeon/ci_dpm.c static void ci_dpm_start_smc(struct radeon_device *rdev) rdev 1801 drivers/gpu/drm/radeon/ci_dpm.c ci_program_jump_on_start(rdev); rdev 1802 drivers/gpu/drm/radeon/ci_dpm.c ci_start_smc_clock(rdev); rdev 1803 drivers/gpu/drm/radeon/ci_dpm.c ci_start_smc(rdev); rdev 1804 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1810 drivers/gpu/drm/radeon/ci_dpm.c static void ci_dpm_stop_smc(struct radeon_device *rdev) rdev 1812 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_smc(rdev); rdev 1813 drivers/gpu/drm/radeon/ci_dpm.c ci_stop_smc_clock(rdev); rdev 1816 drivers/gpu/drm/radeon/ci_dpm.c static int ci_process_firmware_header(struct radeon_device *rdev) rdev 1818 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1822 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, rdev 1831 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, rdev 1840 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, rdev 1849 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, rdev 1858 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, rdev 1870 drivers/gpu/drm/radeon/ci_dpm.c static void ci_read_clock_registers(struct radeon_device *rdev) rdev 1872 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1897 drivers/gpu/drm/radeon/ci_dpm.c static void ci_init_sclk_t(struct radeon_device *rdev) rdev 1899 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1904 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_thermal_protection(struct radeon_device *rdev, rdev 1916 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_acpi_power_management(struct radeon_device *rdev) rdev 1926 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enter_ulp_state(struct radeon_device *rdev) rdev 1936 drivers/gpu/drm/radeon/ci_dpm.c static int ci_exit_ulp_state(struct radeon_device *rdev) rdev 1944 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1954 drivers/gpu/drm/radeon/ci_dpm.c static int ci_notify_smc_display_change(struct radeon_device *rdev, rdev 1959 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, msg) == PPSMC_Result_OK) ? 0 : -EINVAL; rdev 1962 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_ds_master_switch(struct radeon_device *rdev, rdev 1965 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 1969 drivers/gpu/drm/radeon/ci_dpm.c if (ci_send_msg_to_smc(rdev, PPSMC_MSG_MASTER_DeepSleep_ON) != PPSMC_Result_OK) rdev 1972 drivers/gpu/drm/radeon/ci_dpm.c if (ci_send_msg_to_smc(rdev, PPSMC_MSG_MASTER_DeepSleep_OFF) != PPSMC_Result_OK) rdev 1977 drivers/gpu/drm/radeon/ci_dpm.c if (ci_send_msg_to_smc(rdev, PPSMC_MSG_MASTER_DeepSleep_OFF) != PPSMC_Result_OK) rdev 1985 drivers/gpu/drm/radeon/ci_dpm.c static void ci_program_display_gap(struct radeon_device *rdev) rdev 1990 drivers/gpu/drm/radeon/ci_dpm.c u32 ref_clock = rdev->clock.spll.reference_freq; rdev 1991 drivers/gpu/drm/radeon/ci_dpm.c u32 refresh_rate = r600_dpm_get_vrefresh(rdev); rdev 1992 drivers/gpu/drm/radeon/ci_dpm.c u32 vblank_time = r600_dpm_get_vblank_time(rdev); rdev 1995 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.new_active_crtc_count > 0) rdev 2011 drivers/gpu/drm/radeon/ci_dpm.c ci_write_smc_soft_register(rdev, offsetof(SMU7_SoftRegisters, PreVBlankGap), 0x64); rdev 2012 drivers/gpu/drm/radeon/ci_dpm.c ci_write_smc_soft_register(rdev, offsetof(SMU7_SoftRegisters, VBlankTimeout), (frame_time_in_us - pre_vbi_time_in_us)); rdev 2015 drivers/gpu/drm/radeon/ci_dpm.c ci_notify_smc_display_change(rdev, (rdev->pm.dpm.new_active_crtc_count == 1)); rdev 2019 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_spread_spectrum(struct radeon_device *rdev, bool enable) rdev 2021 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2041 drivers/gpu/drm/radeon/ci_dpm.c static void ci_program_sstp(struct radeon_device *rdev) rdev 2046 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_display_gap(struct radeon_device *rdev) rdev 2057 drivers/gpu/drm/radeon/ci_dpm.c static void ci_program_vc(struct radeon_device *rdev) rdev 2075 drivers/gpu/drm/radeon/ci_dpm.c static void ci_clear_vc(struct radeon_device *rdev) rdev 2093 drivers/gpu/drm/radeon/ci_dpm.c static int ci_upload_firmware(struct radeon_device *rdev) rdev 2095 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2098 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2104 drivers/gpu/drm/radeon/ci_dpm.c ci_stop_smc_clock(rdev); rdev 2105 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_smc(rdev); rdev 2107 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_load_smc_ucode(rdev, pi->sram_end); rdev 2113 drivers/gpu/drm/radeon/ci_dpm.c static int ci_get_svi2_voltage_table(struct radeon_device *rdev, rdev 2134 drivers/gpu/drm/radeon/ci_dpm.c static int ci_construct_voltage_tables(struct radeon_device *rdev) rdev 2136 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2140 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_VDDC, rdev 2146 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_svi2_voltage_table(rdev, rdev 2147 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 2154 drivers/gpu/drm/radeon/ci_dpm.c si_trim_voltage_table_to_fit_state_table(rdev, SMU7_MAX_LEVELS_VDDC, rdev 2158 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_VDDCI, rdev 2164 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_svi2_voltage_table(rdev, rdev 2165 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 2172 drivers/gpu/drm/radeon/ci_dpm.c si_trim_voltage_table_to_fit_state_table(rdev, SMU7_MAX_LEVELS_VDDCI, rdev 2176 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_MVDDC, rdev 2182 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_svi2_voltage_table(rdev, rdev 2183 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, rdev 2190 drivers/gpu/drm/radeon/ci_dpm.c si_trim_voltage_table_to_fit_state_table(rdev, SMU7_MAX_LEVELS_MVDD, rdev 2196 drivers/gpu/drm/radeon/ci_dpm.c static void ci_populate_smc_voltage_table(struct radeon_device *rdev, rdev 2202 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_std_voltage_value_sidd(rdev, voltage_table, rdev 2218 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_vddc_table(struct radeon_device *rdev, rdev 2221 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2226 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_smc_voltage_table(rdev, rdev 2241 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_vddci_table(struct radeon_device *rdev, rdev 2245 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2249 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_smc_voltage_table(rdev, rdev 2264 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_mvdd_table(struct radeon_device *rdev, rdev 2267 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2272 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_smc_voltage_table(rdev, rdev 2287 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_voltage_tables(struct radeon_device *rdev, rdev 2292 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_vddc_table(rdev, table); rdev 2296 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_vddci_table(rdev, table); rdev 2300 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_mvdd_table(rdev, table); rdev 2307 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, rdev 2310 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2314 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count; i++) { rdev 2315 drivers/gpu/drm/radeon/ci_dpm.c if (mclk <= rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries[i].clk) { rdev 2321 drivers/gpu/drm/radeon/ci_dpm.c if (i >= rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count) rdev 2328 drivers/gpu/drm/radeon/ci_dpm.c static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev, rdev 2337 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL) rdev 2340 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries) { rdev 2341 drivers/gpu/drm/radeon/ci_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { rdev 2343 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { rdev 2345 drivers/gpu/drm/radeon/ci_dpm.c if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count) rdev 2348 drivers/gpu/drm/radeon/ci_dpm.c idx = rdev->pm.dpm.dyn_state.cac_leakage_table.count - 1; rdev 2350 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE; rdev 2352 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].leakage * VOLTAGE_SCALE; rdev 2358 drivers/gpu/drm/radeon/ci_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { rdev 2360 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { rdev 2362 drivers/gpu/drm/radeon/ci_dpm.c if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count) rdev 2365 drivers/gpu/drm/radeon/ci_dpm.c idx = rdev->pm.dpm.dyn_state.cac_leakage_table.count - 1; rdev 2367 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE; rdev 2369 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].leakage * VOLTAGE_SCALE; rdev 2379 drivers/gpu/drm/radeon/ci_dpm.c static void ci_populate_phase_value_based_on_sclk(struct radeon_device *rdev, rdev 2396 drivers/gpu/drm/radeon/ci_dpm.c static void ci_populate_phase_value_based_on_mclk(struct radeon_device *rdev, rdev 2413 drivers/gpu/drm/radeon/ci_dpm.c static int ci_init_arb_table_index(struct radeon_device *rdev) rdev 2415 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2419 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_read_smc_sram_dword(rdev, pi->arb_table_start, rdev 2427 drivers/gpu/drm/radeon/ci_dpm.c return ci_write_smc_sram_dword(rdev, pi->arb_table_start, rdev 2431 drivers/gpu/drm/radeon/ci_dpm.c static int ci_get_dependency_volt_by_clk(struct radeon_device *rdev, rdev 2452 drivers/gpu/drm/radeon/ci_dpm.c static u8 ci_get_sleep_divider_id_from_clock(struct radeon_device *rdev, rdev 2472 drivers/gpu/drm/radeon/ci_dpm.c static int ci_initial_switch_from_arb_f0_to_f1(struct radeon_device *rdev) rdev 2474 drivers/gpu/drm/radeon/ci_dpm.c return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); rdev 2477 drivers/gpu/drm/radeon/ci_dpm.c static int ci_reset_to_default(struct radeon_device *rdev) rdev 2479 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, PPSMC_MSG_ResetToDefaults) == PPSMC_Result_OK) ? rdev 2483 drivers/gpu/drm/radeon/ci_dpm.c static int ci_force_switch_to_arb_f0(struct radeon_device *rdev) rdev 2492 drivers/gpu/drm/radeon/ci_dpm.c return ni_copy_and_switch_arb_sets(rdev, tmp, MC_CG_ARB_FREQ_F0); rdev 2495 drivers/gpu/drm/radeon/ci_dpm.c static void ci_register_patching_mc_arb(struct radeon_device *rdev, rdev 2507 drivers/gpu/drm/radeon/ci_dpm.c ((rdev->pdev->device == 0x67B0) || rdev 2508 drivers/gpu/drm/radeon/ci_dpm.c (rdev->pdev->device == 0x67B1))) { rdev 2522 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_memory_timing_parameters(struct radeon_device *rdev, rdev 2531 drivers/gpu/drm/radeon/ci_dpm.c radeon_atom_set_engine_dram_timings(rdev, sclk, mclk); rdev 2537 drivers/gpu/drm/radeon/ci_dpm.c ci_register_patching_mc_arb(rdev, sclk, mclk, &dram_timing2); rdev 2546 drivers/gpu/drm/radeon/ci_dpm.c static int ci_do_program_memory_timing_parameters(struct radeon_device *rdev) rdev 2548 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2557 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_memory_timing_parameters(rdev, rdev 2567 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_copy_bytes_to_smc(rdev, rdev 2576 drivers/gpu/drm/radeon/ci_dpm.c static int ci_program_memory_timing_parameters(struct radeon_device *rdev) rdev 2578 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2583 drivers/gpu/drm/radeon/ci_dpm.c return ci_do_program_memory_timing_parameters(rdev); rdev 2586 drivers/gpu/drm/radeon/ci_dpm.c static void ci_populate_smc_initial_state(struct radeon_device *rdev, rdev 2590 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2593 drivers/gpu/drm/radeon/ci_dpm.c for (level = 0; level < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; level++) { rdev 2594 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[level].clk >= rdev 2601 drivers/gpu/drm/radeon/ci_dpm.c for (level = 0; level < rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count; level++) { rdev 2602 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries[level].clk >= rdev 2626 drivers/gpu/drm/radeon/ci_dpm.c static void ci_populate_smc_link_level(struct radeon_device *rdev, rdev 2629 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2648 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_uvd_level(struct radeon_device *rdev, rdev 2656 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count; rdev 2660 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].vclk; rdev 2662 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].dclk; rdev 2664 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE; rdev 2667 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_clock_dividers(rdev, rdev 2675 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_clock_dividers(rdev, rdev 2691 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_vce_level(struct radeon_device *rdev, rdev 2699 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count; rdev 2703 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].evclk; rdev 2705 drivers/gpu/drm/radeon/ci_dpm.c (u16)rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE; rdev 2708 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_clock_dividers(rdev, rdev 2724 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_acp_level(struct radeon_device *rdev, rdev 2732 drivers/gpu/drm/radeon/ci_dpm.c (rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count); rdev 2736 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].clk; rdev 2738 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].v; rdev 2741 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_clock_dividers(rdev, rdev 2756 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_samu_level(struct radeon_device *rdev, rdev 2764 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count; rdev 2768 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].clk; rdev 2770 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE; rdev 2773 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_clock_dividers(rdev, rdev 2788 drivers/gpu/drm/radeon/ci_dpm.c static int ci_calculate_mclk_params(struct radeon_device *rdev, rdev 2794 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2807 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); rdev 2831 drivers/gpu/drm/radeon/ci_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; rdev 2840 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 2875 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_single_memory_level(struct radeon_device *rdev, rdev 2879 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 2883 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries) { rdev 2884 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_dependency_volt_by_clk(rdev, rdev 2885 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 2891 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries) { rdev 2892 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_dependency_volt_by_clk(rdev, rdev 2893 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 2899 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries) { rdev 2900 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_dependency_volt_by_clk(rdev, rdev 2901 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, rdev 2910 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_phase_value_based_on_mclk(rdev, rdev 2911 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, rdev 2933 drivers/gpu/drm/radeon/ci_dpm.c (rdev->pm.dpm.new_active_crtc_count <= 2)) rdev 2965 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_calculate_mclk_params(rdev, memory_clock, memory_level, memory_level->StrobeEnable, dll_state_on); rdev 2989 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_smc_acpi_level(struct radeon_device *rdev, rdev 2992 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3010 drivers/gpu/drm/radeon/ci_dpm.c table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq; rdev 3012 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_clock_dividers(rdev, rdev 3061 drivers/gpu/drm/radeon/ci_dpm.c if (ci_populate_mvdd_value(rdev, 0, &voltage_level)) rdev 3105 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_ulv(struct radeon_device *rdev, bool enable) rdev 3107 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3112 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, PPSMC_MSG_EnableULV) == PPSMC_Result_OK) ? rdev 3115 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, PPSMC_MSG_DisableULV) == PPSMC_Result_OK) ? rdev 3122 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_ulv_level(struct radeon_device *rdev, rdev 3125 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3126 drivers/gpu/drm/radeon/ci_dpm.c u16 ulv_voltage = rdev->pm.dpm.backbias_response_time; rdev 3137 drivers/gpu/drm/radeon/ci_dpm.c if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v) rdev 3141 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage; rdev 3143 drivers/gpu/drm/radeon/ci_dpm.c if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v) rdev 3147 drivers/gpu/drm/radeon/ci_dpm.c ((rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage) * rdev 3159 drivers/gpu/drm/radeon/ci_dpm.c static int ci_calculate_sclk_params(struct radeon_device *rdev, rdev 3163 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3169 drivers/gpu/drm/radeon/ci_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 3174 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_get_clock_dividers(rdev, rdev 3191 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 3215 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_single_graphic_level(struct radeon_device *rdev, rdev 3220 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3223 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_calculate_sclk_params(rdev, engine_clock, graphic_level); rdev 3227 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_dependency_volt_by_clk(rdev, rdev 3228 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 3239 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_phase_value_based_on_sclk(rdev, rdev 3240 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, rdev 3255 drivers/gpu/drm/radeon/ci_dpm.c graphic_level->DeepSleepDivId = ci_get_sleep_divider_id_from_clock(rdev, rdev 3276 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_all_graphic_levels(struct radeon_device *rdev) rdev 3278 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3290 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_single_graphic_level(rdev, rdev 3308 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_copy_bytes_to_smc(rdev, level_array_address, rdev 3317 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_ulv_state(struct radeon_device *rdev, rdev 3320 drivers/gpu/drm/radeon/ci_dpm.c return ci_populate_ulv_level(rdev, ulv_level); rdev 3323 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_all_memory_levels(struct radeon_device *rdev) rdev 3325 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3339 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_single_memory_level(rdev, rdev 3349 drivers/gpu/drm/radeon/ci_dpm.c ((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 0x67B1))) { rdev 3365 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_copy_bytes_to_smc(rdev, level_array_address, rdev 3374 drivers/gpu/drm/radeon/ci_dpm.c static void ci_reset_single_dpm_table(struct radeon_device *rdev, rdev 3393 drivers/gpu/drm/radeon/ci_dpm.c static int ci_setup_default_pcie_tables(struct radeon_device *rdev) rdev 3395 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3408 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_single_dpm_table(rdev, rdev 3412 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->family == CHIP_BONAIRE) rdev 3441 drivers/gpu/drm/radeon/ci_dpm.c static int ci_setup_default_dpm_tables(struct radeon_device *rdev) rdev 3443 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3445 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 3447 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk; rdev 3449 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.cac_leakage_table; rdev 3463 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_single_dpm_table(rdev, rdev 3466 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_single_dpm_table(rdev, rdev 3469 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_single_dpm_table(rdev, rdev 3472 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_single_dpm_table(rdev, rdev 3475 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_single_dpm_table(rdev, rdev 3514 drivers/gpu/drm/radeon/ci_dpm.c allowed_mclk_table = &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; rdev 3524 drivers/gpu/drm/radeon/ci_dpm.c allowed_mclk_table = &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk; rdev 3534 drivers/gpu/drm/radeon/ci_dpm.c ci_setup_default_pcie_tables(rdev); rdev 3555 drivers/gpu/drm/radeon/ci_dpm.c static int ci_init_smc_table(struct radeon_device *rdev) rdev 3557 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3559 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_ps *radeon_boot_state = rdev->pm.dpm.boot_ps; rdev 3563 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_setup_default_dpm_tables(rdev); rdev 3568 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_smc_voltage_tables(rdev, table); rdev 3570 drivers/gpu/drm/radeon/ci_dpm.c ci_init_fps_limits(rdev); rdev 3572 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) rdev 3575 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 3582 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_ulv_state(rdev, &pi->smc_state_table.Ulv); rdev 3588 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_all_graphic_levels(rdev); rdev 3592 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_all_memory_levels(rdev); rdev 3596 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_smc_link_level(rdev, table); rdev 3598 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_acpi_level(rdev, table); rdev 3602 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_vce_level(rdev, table); rdev 3606 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_acp_level(rdev, table); rdev 3610 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_samu_level(rdev, table); rdev 3614 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_do_program_memory_timing_parameters(rdev); rdev 3618 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_smc_uvd_level(rdev, table); rdev 3641 drivers/gpu/drm/radeon/ci_dpm.c ci_populate_smc_initial_state(rdev, radeon_boot_state); rdev 3643 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_bapm_parameters_in_dpm_table(rdev); rdev 3691 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_copy_bytes_to_smc(rdev, rdev 3703 drivers/gpu/drm/radeon/ci_dpm.c static void ci_trim_single_dpm_states(struct radeon_device *rdev, rdev 3718 drivers/gpu/drm/radeon/ci_dpm.c static void ci_trim_pcie_dpm_states(struct radeon_device *rdev, rdev 3722 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3749 drivers/gpu/drm/radeon/ci_dpm.c static int ci_trim_dpm_states(struct radeon_device *rdev, rdev 3753 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3764 drivers/gpu/drm/radeon/ci_dpm.c ci_trim_single_dpm_states(rdev, rdev 3769 drivers/gpu/drm/radeon/ci_dpm.c ci_trim_single_dpm_states(rdev, rdev 3774 drivers/gpu/drm/radeon/ci_dpm.c ci_trim_pcie_dpm_states(rdev, rdev 3783 drivers/gpu/drm/radeon/ci_dpm.c static int ci_apply_disp_minimum_voltage_request(struct radeon_device *rdev) rdev 3786 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk; rdev 3788 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 3798 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->clock.current_dispclk == disp_voltage_table->entries[i].clk) rdev 3805 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc_with_parameter(rdev, rdev 3815 drivers/gpu/drm/radeon/ci_dpm.c static int ci_upload_dpm_level_enable_mask(struct radeon_device *rdev) rdev 3817 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3820 drivers/gpu/drm/radeon/ci_dpm.c ci_apply_disp_minimum_voltage_request(rdev); rdev 3824 drivers/gpu/drm/radeon/ci_dpm.c result = ci_send_msg_to_smc_with_parameter(rdev, rdev 3834 drivers/gpu/drm/radeon/ci_dpm.c result = ci_send_msg_to_smc_with_parameter(rdev, rdev 3844 drivers/gpu/drm/radeon/ci_dpm.c result = ci_send_msg_to_smc_with_parameter(rdev, rdev 3855 drivers/gpu/drm/radeon/ci_dpm.c static void ci_find_dpm_states_clocks_in_dpm_table(struct radeon_device *rdev, rdev 3858 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3892 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.current_active_crtc_count != rdev 3893 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.new_active_crtc_count) rdev 3897 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_and_upload_sclk_mclk_dpm_levels(struct radeon_device *rdev, rdev 3900 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3917 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_all_graphic_levels(rdev); rdev 3923 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_all_memory_levels(rdev); rdev 3931 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_uvd_dpm(struct radeon_device *rdev, bool enable) rdev 3933 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3937 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.ac_power) rdev 3938 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 3940 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 3945 drivers/gpu/drm/radeon/ci_dpm.c for (i = rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count - 1; i >= 0; i--) { rdev 3946 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { rdev 3954 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, rdev 3961 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, rdev 3969 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, rdev 3975 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, enable ? rdev 3980 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_vce_dpm(struct radeon_device *rdev, bool enable) rdev 3982 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 3986 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.ac_power) rdev 3987 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 3989 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 3993 drivers/gpu/drm/radeon/ci_dpm.c for (i = rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count - 1; i >= 0; i--) { rdev 3994 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { rdev 4002 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, rdev 4007 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, enable ? rdev 4013 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_samu_dpm(struct radeon_device *rdev, bool enable) rdev 4015 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4019 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.ac_power) rdev 4020 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 4022 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 4026 drivers/gpu/drm/radeon/ci_dpm.c for (i = rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count - 1; i >= 0; i--) { rdev 4027 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { rdev 4035 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, rdev 4039 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, enable ? rdev 4044 drivers/gpu/drm/radeon/ci_dpm.c static int ci_enable_acp_dpm(struct radeon_device *rdev, bool enable) rdev 4046 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4050 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.ac_power) rdev 4051 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 4053 drivers/gpu/drm/radeon/ci_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 4057 drivers/gpu/drm/radeon/ci_dpm.c for (i = rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count - 1; i >= 0; i--) { rdev 4058 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { rdev 4066 drivers/gpu/drm/radeon/ci_dpm.c ci_send_msg_to_smc_with_parameter(rdev, rdev 4071 drivers/gpu/drm/radeon/ci_dpm.c return (ci_send_msg_to_smc(rdev, enable ? rdev 4077 drivers/gpu/drm/radeon/ci_dpm.c static int ci_update_uvd_dpm(struct radeon_device *rdev, bool gate) rdev 4079 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4084 drivers/gpu/drm/radeon/ci_dpm.c (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count <= 0)) rdev 4088 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count - 1; rdev 4096 drivers/gpu/drm/radeon/ci_dpm.c return ci_enable_uvd_dpm(rdev, !gate); rdev 4099 drivers/gpu/drm/radeon/ci_dpm.c static u8 ci_get_vce_boot_level(struct radeon_device *rdev) rdev 4104 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; rdev 4114 drivers/gpu/drm/radeon/ci_dpm.c static int ci_update_vce_dpm(struct radeon_device *rdev, rdev 4118 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4125 drivers/gpu/drm/radeon/ci_dpm.c cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false); rdev 4127 drivers/gpu/drm/radeon/ci_dpm.c pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev); rdev 4133 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_vce_dpm(rdev, true); rdev 4136 drivers/gpu/drm/radeon/ci_dpm.c cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true); rdev 4138 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_vce_dpm(rdev, false); rdev 4145 drivers/gpu/drm/radeon/ci_dpm.c static int ci_update_samu_dpm(struct radeon_device *rdev, bool gate) rdev 4147 drivers/gpu/drm/radeon/ci_dpm.c return ci_enable_samu_dpm(rdev, gate); rdev 4150 drivers/gpu/drm/radeon/ci_dpm.c static int ci_update_acp_dpm(struct radeon_device *rdev, bool gate) rdev 4152 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4164 drivers/gpu/drm/radeon/ci_dpm.c return ci_enable_acp_dpm(rdev, !gate); rdev 4168 drivers/gpu/drm/radeon/ci_dpm.c static int ci_generate_dpm_level_enable_mask(struct radeon_device *rdev, rdev 4171 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4174 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_trim_dpm_states(rdev, radeon_state); rdev 4194 drivers/gpu/drm/radeon/ci_dpm.c static u32 ci_get_lowest_enabled_level(struct radeon_device *rdev, rdev 4206 drivers/gpu/drm/radeon/ci_dpm.c int ci_dpm_force_performance_level(struct radeon_device *rdev, rdev 4209 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4221 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_dpm_force_state_pcie(rdev, level); rdev 4224 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4240 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_dpm_force_state_sclk(rdev, levels); rdev 4243 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4259 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_dpm_force_state_mclk(rdev, levels); rdev 4262 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4274 drivers/gpu/drm/radeon/ci_dpm.c levels = ci_get_lowest_enabled_level(rdev, rdev 4276 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_dpm_force_state_sclk(rdev, levels); rdev 4279 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4289 drivers/gpu/drm/radeon/ci_dpm.c levels = ci_get_lowest_enabled_level(rdev, rdev 4291 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_dpm_force_state_mclk(rdev, levels); rdev 4294 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4304 drivers/gpu/drm/radeon/ci_dpm.c levels = ci_get_lowest_enabled_level(rdev, rdev 4306 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_dpm_force_state_pcie(rdev, levels); rdev 4309 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4321 drivers/gpu/drm/radeon/ci_dpm.c smc_result = ci_send_msg_to_smc(rdev, rdev 4326 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_upload_dpm_level_enable_mask(rdev); rdev 4331 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.forced_level = level; rdev 4336 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_mc_special_registers(struct radeon_device *rdev, rdev 4339 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4534 drivers/gpu/drm/radeon/ci_dpm.c static int ci_register_patching_mc_seq(struct radeon_device *rdev, rdev 4545 drivers/gpu/drm/radeon/ci_dpm.c ((rdev->pdev->device == 0x67B0) || rdev 4546 drivers/gpu/drm/radeon/ci_dpm.c (rdev->pdev->device == 0x67B1))) { rdev 4624 drivers/gpu/drm/radeon/ci_dpm.c static int ci_initialize_mc_reg_table(struct radeon_device *rdev) rdev 4626 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4629 drivers/gpu/drm/radeon/ci_dpm.c u8 module_index = rv770_get_memory_module_index(rdev); rdev 4657 drivers/gpu/drm/radeon/ci_dpm.c ret = radeon_atom_init_mc_reg_table(rdev, module_index, table); rdev 4667 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_register_patching_mc_seq(rdev, ci_table); rdev 4671 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_set_mc_special_registers(rdev, ci_table); rdev 4683 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_mc_reg_addresses(struct radeon_device *rdev, rdev 4686 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4718 drivers/gpu/drm/radeon/ci_dpm.c static void ci_convert_mc_reg_table_entry_to_smc(struct radeon_device *rdev, rdev 4722 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4738 drivers/gpu/drm/radeon/ci_dpm.c static void ci_convert_mc_reg_table_to_smc(struct radeon_device *rdev, rdev 4741 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4745 drivers/gpu/drm/radeon/ci_dpm.c ci_convert_mc_reg_table_entry_to_smc(rdev, rdev 4750 drivers/gpu/drm/radeon/ci_dpm.c static int ci_populate_initial_mc_reg_table(struct radeon_device *rdev) rdev 4752 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4757 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_mc_reg_addresses(rdev, &pi->smc_mc_reg_table); rdev 4760 drivers/gpu/drm/radeon/ci_dpm.c ci_convert_mc_reg_table_to_smc(rdev, &pi->smc_mc_reg_table); rdev 4762 drivers/gpu/drm/radeon/ci_dpm.c return ci_copy_bytes_to_smc(rdev, rdev 4769 drivers/gpu/drm/radeon/ci_dpm.c static int ci_update_and_upload_mc_reg_table(struct radeon_device *rdev) rdev 4771 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4778 drivers/gpu/drm/radeon/ci_dpm.c ci_convert_mc_reg_table_to_smc(rdev, &pi->smc_mc_reg_table); rdev 4780 drivers/gpu/drm/radeon/ci_dpm.c return ci_copy_bytes_to_smc(rdev, rdev 4789 drivers/gpu/drm/radeon/ci_dpm.c static void ci_enable_voltage_control(struct radeon_device *rdev) rdev 4797 drivers/gpu/drm/radeon/ci_dpm.c static enum radeon_pcie_gen ci_get_maximum_link_speed(struct radeon_device *rdev, rdev 4813 drivers/gpu/drm/radeon/ci_dpm.c static u16 ci_get_current_pcie_speed(struct radeon_device *rdev) rdev 4823 drivers/gpu/drm/radeon/ci_dpm.c static int ci_get_current_pcie_lane_number(struct radeon_device *rdev) rdev 4849 drivers/gpu/drm/radeon/ci_dpm.c static void ci_request_link_speed_change_before_state_change(struct radeon_device *rdev, rdev 4853 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4855 drivers/gpu/drm/radeon/ci_dpm.c ci_get_maximum_link_speed(rdev, radeon_new_state); rdev 4859 drivers/gpu/drm/radeon/ci_dpm.c current_link_speed = ci_get_maximum_link_speed(rdev, radeon_current_state); rdev 4869 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN3, false) == 0) rdev 4876 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0) rdev 4881 drivers/gpu/drm/radeon/ci_dpm.c pi->force_pcie_gen = ci_get_current_pcie_speed(rdev); rdev 4890 drivers/gpu/drm/radeon/ci_dpm.c static void ci_notify_link_speed_change_after_state_change(struct radeon_device *rdev, rdev 4894 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4896 drivers/gpu/drm/radeon/ci_dpm.c ci_get_maximum_link_speed(rdev, radeon_new_state); rdev 4908 drivers/gpu/drm/radeon/ci_dpm.c (ci_get_current_pcie_speed(rdev) > 0)) rdev 4912 drivers/gpu/drm/radeon/ci_dpm.c radeon_acpi_pcie_performance_request(rdev, request, false); rdev 4917 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_private_data_variables_based_on_pptable(struct radeon_device *rdev) rdev 4919 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4921 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 4923 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk; rdev 4925 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; rdev 4948 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = rdev 4950 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = rdev 4952 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = rdev 4954 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = rdev 4960 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_with_vddc_leakage(struct radeon_device *rdev, u16 *vddc) rdev 4962 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4974 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_with_vddci_leakage(struct radeon_device *rdev, u16 *vddci) rdev 4976 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 4988 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_clock_voltage_dependency_table_with_vddc_leakage(struct radeon_device *rdev, rdev 4995 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].v); rdev 4999 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_clock_voltage_dependency_table_with_vddci_leakage(struct radeon_device *rdev, rdev 5006 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddci_leakage(rdev, &table->entries[i].v); rdev 5010 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_vce_clock_voltage_dependency_table_with_vddc_leakage(struct radeon_device *rdev, rdev 5017 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].v); rdev 5021 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_uvd_clock_voltage_dependency_table_with_vddc_leakage(struct radeon_device *rdev, rdev 5028 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].v); rdev 5032 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_vddc_phase_shed_limit_table_with_vddc_leakage(struct radeon_device *rdev, rdev 5039 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].voltage); rdev 5043 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_clock_voltage_limits_with_vddc_leakage(struct radeon_device *rdev, rdev 5047 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, (u16 *)&table->vddc); rdev 5048 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddci_leakage(rdev, (u16 *)&table->vddci); rdev 5052 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_cac_leakage_table_with_vddc_leakage(struct radeon_device *rdev, rdev 5059 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_with_vddc_leakage(rdev, &table->entries[i].vddc); rdev 5063 drivers/gpu/drm/radeon/ci_dpm.c static void ci_patch_dependency_tables_with_leakage(struct radeon_device *rdev) rdev 5066 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_dependency_table_with_vddc_leakage(rdev, rdev 5067 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); rdev 5068 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_dependency_table_with_vddc_leakage(rdev, rdev 5069 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); rdev 5070 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_dependency_table_with_vddc_leakage(rdev, rdev 5071 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk); rdev 5072 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_dependency_table_with_vddci_leakage(rdev, rdev 5073 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk); rdev 5074 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_vce_clock_voltage_dependency_table_with_vddc_leakage(rdev, rdev 5075 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table); rdev 5076 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_uvd_clock_voltage_dependency_table_with_vddc_leakage(rdev, rdev 5077 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table); rdev 5078 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_dependency_table_with_vddc_leakage(rdev, rdev 5079 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table); rdev 5080 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_dependency_table_with_vddc_leakage(rdev, rdev 5081 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table); rdev 5082 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_vddc_phase_shed_limit_table_with_vddc_leakage(rdev, rdev 5083 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table); rdev 5084 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_limits_with_vddc_leakage(rdev, rdev 5085 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac); rdev 5086 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_clock_voltage_limits_with_vddc_leakage(rdev, rdev 5087 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc); rdev 5088 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_cac_leakage_table_with_vddc_leakage(rdev, rdev 5089 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.dyn_state.cac_leakage_table); rdev 5093 drivers/gpu/drm/radeon/ci_dpm.c static void ci_get_memory_type(struct radeon_device *rdev) rdev 5095 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5108 drivers/gpu/drm/radeon/ci_dpm.c static void ci_update_current_ps(struct radeon_device *rdev, rdev 5112 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5119 drivers/gpu/drm/radeon/ci_dpm.c static void ci_update_requested_ps(struct radeon_device *rdev, rdev 5123 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5130 drivers/gpu/drm/radeon/ci_dpm.c int ci_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 5132 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5133 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; rdev 5136 drivers/gpu/drm/radeon/ci_dpm.c ci_update_requested_ps(rdev, new_ps); rdev 5138 drivers/gpu/drm/radeon/ci_dpm.c ci_apply_state_adjust_rules(rdev, &pi->requested_rps); rdev 5143 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_post_set_power_state(struct radeon_device *rdev) rdev 5145 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5148 drivers/gpu/drm/radeon/ci_dpm.c ci_update_current_ps(rdev, new_ps); rdev 5152 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_setup_asic(struct radeon_device *rdev) rdev 5156 drivers/gpu/drm/radeon/ci_dpm.c r = ci_mc_load_microcode(rdev); rdev 5159 drivers/gpu/drm/radeon/ci_dpm.c ci_read_clock_registers(rdev); rdev 5160 drivers/gpu/drm/radeon/ci_dpm.c ci_get_memory_type(rdev); rdev 5161 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_acpi_power_management(rdev); rdev 5162 drivers/gpu/drm/radeon/ci_dpm.c ci_init_sclk_t(rdev); rdev 5165 drivers/gpu/drm/radeon/ci_dpm.c int ci_dpm_enable(struct radeon_device *rdev) rdev 5167 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5168 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 5171 drivers/gpu/drm/radeon/ci_dpm.c if (ci_is_smc_running(rdev)) rdev 5174 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_voltage_control(rdev); rdev 5175 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_construct_voltage_tables(rdev); rdev 5182 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_initialize_mc_reg_table(rdev); rdev 5187 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_spread_spectrum(rdev, true); rdev 5189 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_thermal_protection(rdev, true); rdev 5190 drivers/gpu/drm/radeon/ci_dpm.c ci_program_sstp(rdev); rdev 5191 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_display_gap(rdev); rdev 5192 drivers/gpu/drm/radeon/ci_dpm.c ci_program_vc(rdev); rdev 5193 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_upload_firmware(rdev); rdev 5198 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_process_firmware_header(rdev); rdev 5203 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_initial_switch_from_arb_f0_to_f1(rdev); rdev 5208 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_init_smc_table(rdev); rdev 5213 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_init_arb_table_index(rdev); rdev 5219 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_initial_mc_reg_table(rdev); rdev 5225 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_pm_base(rdev); rdev 5230 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_start_smc(rdev); rdev 5231 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_vr_hot_gpio_interrupt(rdev); rdev 5232 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_notify_smc_display_change(rdev, false); rdev 5237 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_sclk_control(rdev, true); rdev 5238 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_ulv(rdev, true); rdev 5243 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_ds_master_switch(rdev, true); rdev 5248 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_start_dpm(rdev); rdev 5253 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_didt(rdev, true); rdev 5258 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_smc_cac(rdev, true); rdev 5263 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_power_containment(rdev, true); rdev 5269 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_power_control_set_level(rdev); rdev 5275 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); rdev 5277 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_enable_thermal_based_sclk_dpm(rdev, true); rdev 5283 drivers/gpu/drm/radeon/ci_dpm.c ci_thermal_start_thermal_controller(rdev); rdev 5285 drivers/gpu/drm/radeon/ci_dpm.c ci_update_current_ps(rdev, boot_ps); rdev 5290 drivers/gpu/drm/radeon/ci_dpm.c static int ci_set_temperature_range(struct radeon_device *rdev) rdev 5294 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_thermal_enable_alert(rdev, false); rdev 5297 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_thermal_set_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 5300 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_thermal_enable_alert(rdev, true); rdev 5307 drivers/gpu/drm/radeon/ci_dpm.c int ci_dpm_late_enable(struct radeon_device *rdev) rdev 5311 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_set_temperature_range(rdev); rdev 5315 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_powergate_uvd(rdev, true); rdev 5320 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_disable(struct radeon_device *rdev) rdev 5322 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5323 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 5325 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_powergate_uvd(rdev, false); rdev 5327 drivers/gpu/drm/radeon/ci_dpm.c if (!ci_is_smc_running(rdev)) rdev 5330 drivers/gpu/drm/radeon/ci_dpm.c ci_thermal_stop_thermal_controller(rdev); rdev 5333 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_thermal_protection(rdev, false); rdev 5334 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_power_containment(rdev, false); rdev 5335 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_smc_cac(rdev, false); rdev 5336 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_didt(rdev, false); rdev 5337 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_spread_spectrum(rdev, false); rdev 5338 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, false); rdev 5339 drivers/gpu/drm/radeon/ci_dpm.c ci_stop_dpm(rdev); rdev 5340 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_ds_master_switch(rdev, false); rdev 5341 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_ulv(rdev, false); rdev 5342 drivers/gpu/drm/radeon/ci_dpm.c ci_clear_vc(rdev); rdev 5343 drivers/gpu/drm/radeon/ci_dpm.c ci_reset_to_default(rdev); rdev 5344 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_stop_smc(rdev); rdev 5345 drivers/gpu/drm/radeon/ci_dpm.c ci_force_switch_to_arb_f0(rdev); rdev 5346 drivers/gpu/drm/radeon/ci_dpm.c ci_enable_thermal_based_sclk_dpm(rdev, false); rdev 5348 drivers/gpu/drm/radeon/ci_dpm.c ci_update_current_ps(rdev, boot_ps); rdev 5351 drivers/gpu/drm/radeon/ci_dpm.c int ci_dpm_set_power_state(struct radeon_device *rdev) rdev 5353 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5358 drivers/gpu/drm/radeon/ci_dpm.c ci_find_dpm_states_clocks_in_dpm_table(rdev, new_ps); rdev 5360 drivers/gpu/drm/radeon/ci_dpm.c ci_request_link_speed_change_before_state_change(rdev, new_ps, old_ps); rdev 5361 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_freeze_sclk_mclk_dpm(rdev); rdev 5366 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_populate_and_upload_sclk_mclk_dpm_levels(rdev, new_ps); rdev 5371 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_generate_dpm_level_enable_mask(rdev, new_ps); rdev 5377 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_update_vce_dpm(rdev, new_ps, old_ps); rdev 5383 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_update_sclk_t(rdev); rdev 5389 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_update_and_upload_mc_reg_table(rdev); rdev 5395 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_program_memory_timing_parameters(rdev); rdev 5400 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_unfreeze_sclk_mclk_dpm(rdev); rdev 5405 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_upload_dpm_level_enable_mask(rdev); rdev 5411 drivers/gpu/drm/radeon/ci_dpm.c ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); rdev 5417 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_reset_asic(struct radeon_device *rdev) rdev 5419 drivers/gpu/drm/radeon/ci_dpm.c ci_set_boot_state(rdev); rdev 5423 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 5425 drivers/gpu/drm/radeon/ci_dpm.c ci_program_display_gap(rdev); rdev 5451 drivers/gpu/drm/radeon/ci_dpm.c static void ci_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 5469 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 5471 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 5474 drivers/gpu/drm/radeon/ci_dpm.c static void ci_parse_pplib_clock_info(struct radeon_device *rdev, rdev 5478 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5489 drivers/gpu/drm/radeon/ci_dpm.c pl->pcie_gen = r600_get_pcie_gen_support(rdev, rdev 5493 drivers/gpu/drm/radeon/ci_dpm.c pl->pcie_lane = r600_get_pcie_lane_support(rdev, rdev 5543 drivers/gpu/drm/radeon/ci_dpm.c static int ci_parse_power_table(struct radeon_device *rdev) rdev 5545 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 5575 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, rdev 5578 drivers/gpu/drm/radeon/ci_dpm.c if (!rdev->pm.dpm.ps) rdev 5587 drivers/gpu/drm/radeon/ci_dpm.c if (!rdev->pm.power_state[i].clock_info) rdev 5591 drivers/gpu/drm/radeon/ci_dpm.c kfree(rdev->pm.dpm.ps); rdev 5594 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 5595 drivers/gpu/drm/radeon/ci_dpm.c ci_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 5609 drivers/gpu/drm/radeon/ci_dpm.c ci_parse_pplib_clock_info(rdev, rdev 5610 drivers/gpu/drm/radeon/ci_dpm.c &rdev->pm.dpm.ps[i], k, rdev 5616 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.num_ps = state_array->ucNumEntries; rdev 5621 drivers/gpu/drm/radeon/ci_dpm.c clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; rdev 5628 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.vce_states[i].sclk = sclk; rdev 5629 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.vce_states[i].mclk = mclk; rdev 5635 drivers/gpu/drm/radeon/ci_dpm.c static int ci_get_vbios_boot_values(struct radeon_device *rdev, rdev 5638 drivers/gpu/drm/radeon/ci_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 5652 drivers/gpu/drm/radeon/ci_dpm.c boot_state->pcie_gen_bootup_value = ci_get_current_pcie_speed(rdev); rdev 5653 drivers/gpu/drm/radeon/ci_dpm.c boot_state->pcie_lane_bootup_value = ci_get_current_pcie_lane_number(rdev); rdev 5662 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_fini(struct radeon_device *rdev) rdev 5666 drivers/gpu/drm/radeon/ci_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 5667 drivers/gpu/drm/radeon/ci_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 5669 drivers/gpu/drm/radeon/ci_dpm.c kfree(rdev->pm.dpm.ps); rdev 5670 drivers/gpu/drm/radeon/ci_dpm.c kfree(rdev->pm.dpm.priv); rdev 5671 drivers/gpu/drm/radeon/ci_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); rdev 5672 drivers/gpu/drm/radeon/ci_dpm.c r600_free_extended_power_table(rdev); rdev 5675 drivers/gpu/drm/radeon/ci_dpm.c int ci_dpm_init(struct radeon_device *rdev) rdev 5684 drivers/gpu/drm/radeon/ci_dpm.c struct pci_dev *root = rdev->pdev->bus->self; rdev 5690 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.priv = pi; rdev 5692 drivers/gpu/drm/radeon/ci_dpm.c if (!pci_is_root_bus(rdev->pdev->bus)) rdev 5719 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_get_vbios_boot_values(rdev, &pi->vbios_boot_state); rdev 5721 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_fini(rdev); rdev 5725 drivers/gpu/drm/radeon/ci_dpm.c ret = r600_get_platform_caps(rdev); rdev 5727 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_fini(rdev); rdev 5731 drivers/gpu/drm/radeon/ci_dpm.c ret = r600_parse_extended_power_table(rdev); rdev 5733 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_fini(rdev); rdev 5737 drivers/gpu/drm/radeon/ci_dpm.c ret = ci_parse_power_table(rdev); rdev 5739 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_fini(rdev); rdev 5763 drivers/gpu/drm/radeon/ci_dpm.c if ((rdev->pdev->device == 0x6658) && rdev 5764 drivers/gpu/drm/radeon/ci_dpm.c (rdev->mc_fw->size == (BONAIRE_MC_UCODE_SIZE * 4))) { rdev 5775 drivers/gpu/drm/radeon/ci_dpm.c ci_initialize_powertune_defaults(rdev); rdev 5784 drivers/gpu/drm/radeon/ci_dpm.c ci_get_leakage_voltages(rdev); rdev 5785 drivers/gpu/drm/radeon/ci_dpm.c ci_patch_dependency_tables_with_leakage(rdev); rdev 5786 drivers/gpu/drm/radeon/ci_dpm.c ci_set_private_data_variables_based_on_pptable(rdev); rdev 5788 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = rdev 5792 drivers/gpu/drm/radeon/ci_dpm.c if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { rdev 5793 drivers/gpu/drm/radeon/ci_dpm.c ci_dpm_fini(rdev); rdev 5796 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; rdev 5797 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; rdev 5798 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; rdev 5799 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; rdev 5800 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; rdev 5801 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; rdev 5802 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; rdev 5803 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000; rdev 5804 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; rdev 5806 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 4; rdev 5807 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.sclk_mclk_delta = 15000; rdev 5808 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200; rdev 5810 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.count = 0; rdev 5811 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.values = NULL; rdev 5812 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0; rdev 5813 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; rdev 5815 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->family == CHIP_HAWAII) { rdev 5829 drivers/gpu/drm/radeon/ci_dpm.c gpio = radeon_atombios_lookup_gpio(rdev, VDDC_VRHOT_GPIO_PINID); rdev 5832 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.platform_caps |= ATOM_PP_PLATFORM_CAP_REGULATOR_HOT; rdev 5835 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_REGULATOR_HOT; rdev 5838 drivers/gpu/drm/radeon/ci_dpm.c gpio = radeon_atombios_lookup_gpio(rdev, PP_AC_DC_SWITCH_GPIO_PINID); rdev 5841 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.platform_caps |= ATOM_PP_PLATFORM_CAP_HARDWAREDC; rdev 5844 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_HARDWAREDC; rdev 5847 drivers/gpu/drm/radeon/ci_dpm.c gpio = radeon_atombios_lookup_gpio(rdev, VDDC_PCC_GPIO_PINID); rdev 5879 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atom_is_voltage_gpio(rdev, VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_GPIO_LUT)) rdev 5881 drivers/gpu/drm/radeon/ci_dpm.c else if (radeon_atom_is_voltage_gpio(rdev, VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2)) rdev 5884 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL) { rdev 5885 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atom_is_voltage_gpio(rdev, VOLTAGE_TYPE_VDDCI, VOLTAGE_OBJ_GPIO_LUT)) rdev 5887 drivers/gpu/drm/radeon/ci_dpm.c else if (radeon_atom_is_voltage_gpio(rdev, VOLTAGE_TYPE_VDDCI, VOLTAGE_OBJ_SVID2)) rdev 5890 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL; rdev 5893 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_MVDDCONTROL) { rdev 5894 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_atom_is_voltage_gpio(rdev, VOLTAGE_TYPE_MVDDC, VOLTAGE_OBJ_GPIO_LUT)) rdev 5896 drivers/gpu/drm/radeon/ci_dpm.c else if (radeon_atom_is_voltage_gpio(rdev, VOLTAGE_TYPE_MVDDC, VOLTAGE_OBJ_SVID2)) rdev 5899 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_MVDDCONTROL; rdev 5906 drivers/gpu/drm/radeon/ci_dpm.c radeon_acpi_is_pcie_performance_request_supported(rdev); rdev 5911 drivers/gpu/drm/radeon/ci_dpm.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 5922 drivers/gpu/drm/radeon/ci_dpm.c if (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE) rdev 5932 drivers/gpu/drm/radeon/ci_dpm.c if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || rdev 5933 drivers/gpu/drm/radeon/ci_dpm.c (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) rdev 5934 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc = rdev 5935 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 5942 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 5945 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5947 drivers/gpu/drm/radeon/ci_dpm.c u32 sclk = ci_get_average_sclk_freq(rdev); rdev 5948 drivers/gpu/drm/radeon/ci_dpm.c u32 mclk = ci_get_average_mclk_freq(rdev); rdev 5956 drivers/gpu/drm/radeon/ci_dpm.c void ci_dpm_print_power_state(struct radeon_device *rdev, rdev 5971 drivers/gpu/drm/radeon/ci_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 5974 drivers/gpu/drm/radeon/ci_dpm.c u32 ci_dpm_get_current_sclk(struct radeon_device *rdev) rdev 5976 drivers/gpu/drm/radeon/ci_dpm.c u32 sclk = ci_get_average_sclk_freq(rdev); rdev 5981 drivers/gpu/drm/radeon/ci_dpm.c u32 ci_dpm_get_current_mclk(struct radeon_device *rdev) rdev 5983 drivers/gpu/drm/radeon/ci_dpm.c u32 mclk = ci_get_average_mclk_freq(rdev); rdev 5988 drivers/gpu/drm/radeon/ci_dpm.c u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 5990 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 5999 drivers/gpu/drm/radeon/ci_dpm.c u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 6001 drivers/gpu/drm/radeon/ci_dpm.c struct ci_power_info *pi = ci_get_pi(rdev); rdev 325 drivers/gpu/drm/radeon/ci_dpm.h int ci_copy_bytes_to_smc(struct radeon_device *rdev, rdev 328 drivers/gpu/drm/radeon/ci_dpm.h void ci_start_smc(struct radeon_device *rdev); rdev 329 drivers/gpu/drm/radeon/ci_dpm.h void ci_reset_smc(struct radeon_device *rdev); rdev 330 drivers/gpu/drm/radeon/ci_dpm.h int ci_program_jump_on_start(struct radeon_device *rdev); rdev 331 drivers/gpu/drm/radeon/ci_dpm.h void ci_stop_smc_clock(struct radeon_device *rdev); rdev 332 drivers/gpu/drm/radeon/ci_dpm.h void ci_start_smc_clock(struct radeon_device *rdev); rdev 333 drivers/gpu/drm/radeon/ci_dpm.h bool ci_is_smc_running(struct radeon_device *rdev); rdev 334 drivers/gpu/drm/radeon/ci_dpm.h PPSMC_Result ci_wait_for_smc_inactive(struct radeon_device *rdev); rdev 335 drivers/gpu/drm/radeon/ci_dpm.h int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit); rdev 336 drivers/gpu/drm/radeon/ci_dpm.h int ci_read_smc_sram_dword(struct radeon_device *rdev, rdev 338 drivers/gpu/drm/radeon/ci_dpm.h int ci_write_smc_sram_dword(struct radeon_device *rdev, rdev 33 drivers/gpu/drm/radeon/ci_smc.c static int ci_set_smc_sram_address(struct radeon_device *rdev, rdev 47 drivers/gpu/drm/radeon/ci_smc.c int ci_copy_bytes_to_smc(struct radeon_device *rdev, rdev 64 drivers/gpu/drm/radeon/ci_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 69 drivers/gpu/drm/radeon/ci_smc.c ret = ci_set_smc_sram_address(rdev, addr, limit); rdev 84 drivers/gpu/drm/radeon/ci_smc.c ret = ci_set_smc_sram_address(rdev, addr, limit); rdev 101 drivers/gpu/drm/radeon/ci_smc.c ret = ci_set_smc_sram_address(rdev, addr, limit); rdev 109 drivers/gpu/drm/radeon/ci_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 114 drivers/gpu/drm/radeon/ci_smc.c void ci_start_smc(struct radeon_device *rdev) rdev 122 drivers/gpu/drm/radeon/ci_smc.c void ci_reset_smc(struct radeon_device *rdev) rdev 130 drivers/gpu/drm/radeon/ci_smc.c int ci_program_jump_on_start(struct radeon_device *rdev) rdev 134 drivers/gpu/drm/radeon/ci_smc.c return ci_copy_bytes_to_smc(rdev, 0x0, data, 4, sizeof(data)+1); rdev 137 drivers/gpu/drm/radeon/ci_smc.c void ci_stop_smc_clock(struct radeon_device *rdev) rdev 146 drivers/gpu/drm/radeon/ci_smc.c void ci_start_smc_clock(struct radeon_device *rdev) rdev 155 drivers/gpu/drm/radeon/ci_smc.c bool ci_is_smc_running(struct radeon_device *rdev) rdev 167 drivers/gpu/drm/radeon/ci_smc.c PPSMC_Result ci_wait_for_smc_inactive(struct radeon_device *rdev) rdev 172 drivers/gpu/drm/radeon/ci_smc.c if (!ci_is_smc_running(rdev)) rdev 175 drivers/gpu/drm/radeon/ci_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 186 drivers/gpu/drm/radeon/ci_smc.c int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) rdev 194 drivers/gpu/drm/radeon/ci_smc.c if (!rdev->smc_fw) rdev 197 drivers/gpu/drm/radeon/ci_smc.c if (rdev->new_fw) { rdev 199 drivers/gpu/drm/radeon/ci_smc.c (const struct smc_firmware_header_v1_0 *)rdev->smc_fw->data; rdev 206 drivers/gpu/drm/radeon/ci_smc.c (rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 208 drivers/gpu/drm/radeon/ci_smc.c switch (rdev->family) { rdev 222 drivers/gpu/drm/radeon/ci_smc.c src = (const u8 *)rdev->smc_fw->data; rdev 228 drivers/gpu/drm/radeon/ci_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 241 drivers/gpu/drm/radeon/ci_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 246 drivers/gpu/drm/radeon/ci_smc.c int ci_read_smc_sram_dword(struct radeon_device *rdev, rdev 252 drivers/gpu/drm/radeon/ci_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 253 drivers/gpu/drm/radeon/ci_smc.c ret = ci_set_smc_sram_address(rdev, smc_address, limit); rdev 256 drivers/gpu/drm/radeon/ci_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 261 drivers/gpu/drm/radeon/ci_smc.c int ci_write_smc_sram_dword(struct radeon_device *rdev, rdev 267 drivers/gpu/drm/radeon/ci_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 268 drivers/gpu/drm/radeon/ci_smc.c ret = ci_set_smc_sram_address(rdev, smc_address, limit); rdev 271 drivers/gpu/drm/radeon/ci_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 127 drivers/gpu/drm/radeon/cik.c extern int r600_ih_ring_alloc(struct radeon_device *rdev); rdev 128 drivers/gpu/drm/radeon/cik.c extern void r600_ih_ring_fini(struct radeon_device *rdev); rdev 129 drivers/gpu/drm/radeon/cik.c extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); rdev 130 drivers/gpu/drm/radeon/cik.c extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); rdev 131 drivers/gpu/drm/radeon/cik.c extern bool evergreen_is_display_hung(struct radeon_device *rdev); rdev 132 drivers/gpu/drm/radeon/cik.c extern void sumo_rlc_fini(struct radeon_device *rdev); rdev 133 drivers/gpu/drm/radeon/cik.c extern int sumo_rlc_init(struct radeon_device *rdev); rdev 134 drivers/gpu/drm/radeon/cik.c extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); rdev 135 drivers/gpu/drm/radeon/cik.c extern void si_rlc_reset(struct radeon_device *rdev); rdev 136 drivers/gpu/drm/radeon/cik.c extern void si_init_uvd_internal_cg(struct radeon_device *rdev); rdev 137 drivers/gpu/drm/radeon/cik.c static u32 cik_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh); rdev 138 drivers/gpu/drm/radeon/cik.c extern int cik_sdma_resume(struct radeon_device *rdev); rdev 139 drivers/gpu/drm/radeon/cik.c extern void cik_sdma_enable(struct radeon_device *rdev, bool enable); rdev 140 drivers/gpu/drm/radeon/cik.c extern void cik_sdma_fini(struct radeon_device *rdev); rdev 141 drivers/gpu/drm/radeon/cik.c extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable); rdev 142 drivers/gpu/drm/radeon/cik.c static void cik_rlc_stop(struct radeon_device *rdev); rdev 143 drivers/gpu/drm/radeon/cik.c static void cik_pcie_gen3_enable(struct radeon_device *rdev); rdev 144 drivers/gpu/drm/radeon/cik.c static void cik_program_aspm(struct radeon_device *rdev); rdev 145 drivers/gpu/drm/radeon/cik.c static void cik_init_pg(struct radeon_device *rdev); rdev 146 drivers/gpu/drm/radeon/cik.c static void cik_init_cg(struct radeon_device *rdev); rdev 147 drivers/gpu/drm/radeon/cik.c static void cik_fini_pg(struct radeon_device *rdev); rdev 148 drivers/gpu/drm/radeon/cik.c static void cik_fini_cg(struct radeon_device *rdev); rdev 149 drivers/gpu/drm/radeon/cik.c static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev, rdev 162 drivers/gpu/drm/radeon/cik.c int cik_get_allowed_info_register(struct radeon_device *rdev, rdev 188 drivers/gpu/drm/radeon/cik.c u32 cik_didt_rreg(struct radeon_device *rdev, u32 reg) rdev 193 drivers/gpu/drm/radeon/cik.c spin_lock_irqsave(&rdev->didt_idx_lock, flags); rdev 196 drivers/gpu/drm/radeon/cik.c spin_unlock_irqrestore(&rdev->didt_idx_lock, flags); rdev 200 drivers/gpu/drm/radeon/cik.c void cik_didt_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 204 drivers/gpu/drm/radeon/cik.c spin_lock_irqsave(&rdev->didt_idx_lock, flags); rdev 207 drivers/gpu/drm/radeon/cik.c spin_unlock_irqrestore(&rdev->didt_idx_lock, flags); rdev 211 drivers/gpu/drm/radeon/cik.c int ci_get_temp(struct radeon_device *rdev) rdev 230 drivers/gpu/drm/radeon/cik.c int kv_get_temp(struct radeon_device *rdev) rdev 250 drivers/gpu/drm/radeon/cik.c u32 cik_pciep_rreg(struct radeon_device *rdev, u32 reg) rdev 255 drivers/gpu/drm/radeon/cik.c spin_lock_irqsave(&rdev->pciep_idx_lock, flags); rdev 259 drivers/gpu/drm/radeon/cik.c spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); rdev 263 drivers/gpu/drm/radeon/cik.c void cik_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 267 drivers/gpu/drm/radeon/cik.c spin_lock_irqsave(&rdev->pciep_idx_lock, flags); rdev 272 drivers/gpu/drm/radeon/cik.c spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); rdev 1632 drivers/gpu/drm/radeon/cik.c static void cik_init_golden_registers(struct radeon_device *rdev) rdev 1634 drivers/gpu/drm/radeon/cik.c switch (rdev->family) { rdev 1636 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1639 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1642 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1645 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1650 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1653 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1656 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1659 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1664 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1667 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1670 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1673 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1678 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1681 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1684 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1687 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1692 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1695 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1698 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1701 drivers/gpu/drm/radeon/cik.c radeon_program_register_sequence(rdev, rdev 1718 drivers/gpu/drm/radeon/cik.c u32 cik_get_xclk(struct radeon_device *rdev) rdev 1720 drivers/gpu/drm/radeon/cik.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 1722 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) { rdev 1741 drivers/gpu/drm/radeon/cik.c u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 index) rdev 1743 drivers/gpu/drm/radeon/cik.c if (index < rdev->doorbell.num_doorbells) { rdev 1744 drivers/gpu/drm/radeon/cik.c return readl(rdev->doorbell.ptr + index); rdev 1761 drivers/gpu/drm/radeon/cik.c void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v) rdev 1763 drivers/gpu/drm/radeon/cik.c if (index < rdev->doorbell.num_doorbells) { rdev 1764 drivers/gpu/drm/radeon/cik.c writel(v, rdev->doorbell.ptr + index); rdev 1854 drivers/gpu/drm/radeon/cik.c static void cik_srbm_select(struct radeon_device *rdev, rdev 1873 drivers/gpu/drm/radeon/cik.c int ci_mc_load_microcode(struct radeon_device *rdev) rdev 1882 drivers/gpu/drm/radeon/cik.c if (!rdev->mc_fw) rdev 1885 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) { rdev 1887 drivers/gpu/drm/radeon/cik.c (const struct mc_firmware_header_v1_0 *)rdev->mc_fw->data; rdev 1893 drivers/gpu/drm/radeon/cik.c (rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); rdev 1896 drivers/gpu/drm/radeon/cik.c (rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 1898 drivers/gpu/drm/radeon/cik.c ucode_size = rdev->mc_fw->size / 4; rdev 1900 drivers/gpu/drm/radeon/cik.c switch (rdev->family) { rdev 1912 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->mc_fw->data; rdev 1924 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) { rdev 1934 drivers/gpu/drm/radeon/cik.c if ((rdev->pdev->device == 0x6649) && ((tmp & 0xff00) == 0x5600)) { rdev 1943 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) rdev 1955 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1960 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1979 drivers/gpu/drm/radeon/cik.c static int cik_init_microcode(struct radeon_device *rdev) rdev 1994 drivers/gpu/drm/radeon/cik.c switch (rdev->family) { rdev 1997 drivers/gpu/drm/radeon/cik.c if ((rdev->pdev->revision == 0x80) || rdev 1998 drivers/gpu/drm/radeon/cik.c (rdev->pdev->revision == 0x81) || rdev 1999 drivers/gpu/drm/radeon/cik.c (rdev->pdev->device == 0x665f)) rdev 2015 drivers/gpu/drm/radeon/cik.c if (rdev->pdev->revision == 0x80) rdev 2068 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev); rdev 2071 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev); rdev 2074 drivers/gpu/drm/radeon/cik.c if (rdev->pfp_fw->size != pfp_req_size) { rdev 2076 drivers/gpu/drm/radeon/cik.c rdev->pfp_fw->size, fw_name); rdev 2081 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->pfp_fw); rdev 2092 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); rdev 2095 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); rdev 2098 drivers/gpu/drm/radeon/cik.c if (rdev->me_fw->size != me_req_size) { rdev 2100 drivers/gpu/drm/radeon/cik.c rdev->me_fw->size, fw_name); rdev 2104 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->me_fw); rdev 2115 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev); rdev 2118 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev); rdev 2121 drivers/gpu/drm/radeon/cik.c if (rdev->ce_fw->size != ce_req_size) { rdev 2123 drivers/gpu/drm/radeon/cik.c rdev->ce_fw->size, fw_name); rdev 2127 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->ce_fw); rdev 2138 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev); rdev 2141 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev); rdev 2144 drivers/gpu/drm/radeon/cik.c if (rdev->mec_fw->size != mec_req_size) { rdev 2146 drivers/gpu/drm/radeon/cik.c rdev->mec_fw->size, fw_name); rdev 2150 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->mec_fw); rdev 2160 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_KAVERI) { rdev 2162 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->mec2_fw, fw_name, rdev->dev); rdev 2166 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->mec2_fw); rdev 2176 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev); rdev 2179 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev); rdev 2182 drivers/gpu/drm/radeon/cik.c if (rdev->rlc_fw->size != rlc_req_size) { rdev 2184 drivers/gpu/drm/radeon/cik.c rdev->rlc_fw->size, fw_name); rdev 2188 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->rlc_fw); rdev 2199 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev); rdev 2202 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev); rdev 2205 drivers/gpu/drm/radeon/cik.c if (rdev->sdma_fw->size != sdma_req_size) { rdev 2207 drivers/gpu/drm/radeon/cik.c rdev->sdma_fw->size, fw_name); rdev 2211 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->sdma_fw); rdev 2222 drivers/gpu/drm/radeon/cik.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 2224 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); rdev 2227 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); rdev 2230 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); rdev 2234 drivers/gpu/drm/radeon/cik.c if ((rdev->mc_fw->size != mc_req_size) && rdev 2235 drivers/gpu/drm/radeon/cik.c (rdev->mc_fw->size != mc2_req_size)){ rdev 2237 drivers/gpu/drm/radeon/cik.c rdev->mc_fw->size, fw_name); rdev 2240 drivers/gpu/drm/radeon/cik.c DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size); rdev 2242 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->mc_fw); rdev 2256 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); rdev 2259 drivers/gpu/drm/radeon/cik.c err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); rdev 2263 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->smc_fw); rdev 2264 drivers/gpu/drm/radeon/cik.c rdev->smc_fw = NULL; rdev 2266 drivers/gpu/drm/radeon/cik.c } else if (rdev->smc_fw->size != smc_req_size) { rdev 2268 drivers/gpu/drm/radeon/cik.c rdev->smc_fw->size, fw_name); rdev 2272 drivers/gpu/drm/radeon/cik.c err = radeon_ucode_validate(rdev->smc_fw); rdev 2284 drivers/gpu/drm/radeon/cik.c rdev->new_fw = false; rdev 2289 drivers/gpu/drm/radeon/cik.c rdev->new_fw = true; rdev 2297 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->pfp_fw); rdev 2298 drivers/gpu/drm/radeon/cik.c rdev->pfp_fw = NULL; rdev 2299 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->me_fw); rdev 2300 drivers/gpu/drm/radeon/cik.c rdev->me_fw = NULL; rdev 2301 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->ce_fw); rdev 2302 drivers/gpu/drm/radeon/cik.c rdev->ce_fw = NULL; rdev 2303 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->mec_fw); rdev 2304 drivers/gpu/drm/radeon/cik.c rdev->mec_fw = NULL; rdev 2305 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->mec2_fw); rdev 2306 drivers/gpu/drm/radeon/cik.c rdev->mec2_fw = NULL; rdev 2307 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->rlc_fw); rdev 2308 drivers/gpu/drm/radeon/cik.c rdev->rlc_fw = NULL; rdev 2309 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->sdma_fw); rdev 2310 drivers/gpu/drm/radeon/cik.c rdev->sdma_fw = NULL; rdev 2311 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->mc_fw); rdev 2312 drivers/gpu/drm/radeon/cik.c rdev->mc_fw = NULL; rdev 2313 drivers/gpu/drm/radeon/cik.c release_firmware(rdev->smc_fw); rdev 2314 drivers/gpu/drm/radeon/cik.c rdev->smc_fw = NULL; rdev 2333 drivers/gpu/drm/radeon/cik.c static void cik_tiling_mode_table_init(struct radeon_device *rdev) rdev 2335 drivers/gpu/drm/radeon/cik.c u32 *tile = rdev->config.cik.tile_mode_array; rdev 2336 drivers/gpu/drm/radeon/cik.c u32 *macrotile = rdev->config.cik.macrotile_mode_array; rdev 2338 drivers/gpu/drm/radeon/cik.c ARRAY_SIZE(rdev->config.cik.tile_mode_array); rdev 2340 drivers/gpu/drm/radeon/cik.c ARRAY_SIZE(rdev->config.cik.macrotile_mode_array); rdev 2343 drivers/gpu/drm/radeon/cik.c u32 num_rbs = rdev->config.cik.max_backends_per_se * rdev 2344 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_shader_engines; rdev 2346 drivers/gpu/drm/radeon/cik.c switch (rdev->config.cik.mem_row_size_in_kb) { rdev 2359 drivers/gpu/drm/radeon/cik.c num_pipe_configs = rdev->config.cik.max_tile_pipes; rdev 3039 drivers/gpu/drm/radeon/cik.c static void cik_select_se_sh(struct radeon_device *rdev, rdev 3085 drivers/gpu/drm/radeon/cik.c static u32 cik_get_rb_disabled(struct radeon_device *rdev, rdev 3115 drivers/gpu/drm/radeon/cik.c static void cik_setup_rb(struct radeon_device *rdev, rdev 3126 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, i, j); rdev 3127 drivers/gpu/drm/radeon/cik.c data = cik_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); rdev 3128 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_HAWAII) rdev 3134 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 3143 drivers/gpu/drm/radeon/cik.c rdev->config.cik.backend_enable_mask = enabled_rbs; rdev 3146 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, i, 0xffffffff); rdev 3171 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 3182 drivers/gpu/drm/radeon/cik.c static void cik_gpu_init(struct radeon_device *rdev) rdev 3190 drivers/gpu/drm/radeon/cik.c switch (rdev->family) { rdev 3192 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_shader_engines = 2; rdev 3193 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_tile_pipes = 4; rdev 3194 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_cu_per_sh = 7; rdev 3195 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_sh_per_se = 1; rdev 3196 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_backends_per_se = 2; rdev 3197 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_texture_channel_caches = 4; rdev 3198 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gprs = 256; rdev 3199 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gs_threads = 32; rdev 3200 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_hw_contexts = 8; rdev 3202 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; rdev 3203 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_backend = 0x100; rdev 3204 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; rdev 3205 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130; rdev 3209 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_shader_engines = 4; rdev 3210 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_tile_pipes = 16; rdev 3211 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_cu_per_sh = 11; rdev 3212 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_sh_per_se = 1; rdev 3213 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_backends_per_se = 4; rdev 3214 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_texture_channel_caches = 16; rdev 3215 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gprs = 256; rdev 3216 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gs_threads = 32; rdev 3217 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_hw_contexts = 8; rdev 3219 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; rdev 3220 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_backend = 0x100; rdev 3221 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; rdev 3222 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130; rdev 3226 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_shader_engines = 1; rdev 3227 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_tile_pipes = 4; rdev 3228 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_cu_per_sh = 8; rdev 3229 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_backends_per_se = 2; rdev 3230 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_sh_per_se = 1; rdev 3231 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_texture_channel_caches = 4; rdev 3232 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gprs = 256; rdev 3233 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gs_threads = 16; rdev 3234 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_hw_contexts = 8; rdev 3236 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; rdev 3237 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_backend = 0x100; rdev 3238 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; rdev 3239 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130; rdev 3245 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_shader_engines = 1; rdev 3246 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_tile_pipes = 2; rdev 3247 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_cu_per_sh = 2; rdev 3248 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_sh_per_se = 1; rdev 3249 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_backends_per_se = 1; rdev 3250 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_texture_channel_caches = 2; rdev 3251 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gprs = 256; rdev 3252 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_gs_threads = 16; rdev 3253 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_hw_contexts = 8; rdev 3255 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; rdev 3256 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_prim_fifo_size_backend = 0x100; rdev 3257 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; rdev 3258 drivers/gpu/drm/radeon/cik.c rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130; rdev 3281 drivers/gpu/drm/radeon/cik.c rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes; rdev 3282 drivers/gpu/drm/radeon/cik.c rdev->config.cik.mem_max_burst_length_bytes = 256; rdev 3284 drivers/gpu/drm/radeon/cik.c rdev->config.cik.mem_row_size_in_kb = (4 * (1 << (8 + tmp))) / 1024; rdev 3285 drivers/gpu/drm/radeon/cik.c if (rdev->config.cik.mem_row_size_in_kb > 4) rdev 3286 drivers/gpu/drm/radeon/cik.c rdev->config.cik.mem_row_size_in_kb = 4; rdev 3288 drivers/gpu/drm/radeon/cik.c rdev->config.cik.shader_engine_tile_size = 32; rdev 3289 drivers/gpu/drm/radeon/cik.c rdev->config.cik.num_gpus = 1; rdev 3290 drivers/gpu/drm/radeon/cik.c rdev->config.cik.multi_gpu_tile_size = 64; rdev 3294 drivers/gpu/drm/radeon/cik.c switch (rdev->config.cik.mem_row_size_in_kb) { rdev 3314 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config = 0; rdev 3315 drivers/gpu/drm/radeon/cik.c switch (rdev->config.cik.num_tile_pipes) { rdev 3317 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config |= (0 << 0); rdev 3320 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config |= (1 << 0); rdev 3323 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config |= (2 << 0); rdev 3328 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config |= (3 << 0); rdev 3331 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config |= rdev 3333 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config |= rdev 3335 drivers/gpu/drm/radeon/cik.c rdev->config.cik.tile_config |= rdev 3347 drivers/gpu/drm/radeon/cik.c cik_tiling_mode_table_init(rdev); rdev 3349 drivers/gpu/drm/radeon/cik.c cik_setup_rb(rdev, rdev->config.cik.max_shader_engines, rdev 3350 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_sh_per_se, rdev 3351 drivers/gpu/drm/radeon/cik.c rdev->config.cik.max_backends_per_se); rdev 3353 drivers/gpu/drm/radeon/cik.c rdev->config.cik.active_cus = 0; rdev 3354 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { rdev 3355 drivers/gpu/drm/radeon/cik.c for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { rdev 3356 drivers/gpu/drm/radeon/cik.c rdev->config.cik.active_cus += rdev 3357 drivers/gpu/drm/radeon/cik.c hweight32(cik_get_cu_active_bitmap(rdev, i, j)); rdev 3390 drivers/gpu/drm/radeon/cik.c WREG32(PA_SC_FIFO_SIZE, (SC_FRONTEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_frontend) | rdev 3391 drivers/gpu/drm/radeon/cik.c SC_BACKEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_backend) | rdev 3392 drivers/gpu/drm/radeon/cik.c SC_HIZ_TILE_FIFO_SIZE(rdev->config.cik.sc_hiz_tile_fifo_size) | rdev 3393 drivers/gpu/drm/radeon/cik.c SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.cik.sc_earlyz_tile_fifo_size))); rdev 3436 drivers/gpu/drm/radeon/cik.c static void cik_scratch_init(struct radeon_device *rdev) rdev 3440 drivers/gpu/drm/radeon/cik.c rdev->scratch.num_reg = 7; rdev 3441 drivers/gpu/drm/radeon/cik.c rdev->scratch.reg_base = SCRATCH_REG0; rdev 3442 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->scratch.num_reg; i++) { rdev 3443 drivers/gpu/drm/radeon/cik.c rdev->scratch.free[i] = true; rdev 3444 drivers/gpu/drm/radeon/cik.c rdev->scratch.reg[i] = rdev->scratch.reg_base + (i * 4); rdev 3459 drivers/gpu/drm/radeon/cik.c int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 3466 drivers/gpu/drm/radeon/cik.c r = radeon_scratch_get(rdev, &scratch); rdev 3472 drivers/gpu/drm/radeon/cik.c r = radeon_ring_lock(rdev, ring, 3); rdev 3475 drivers/gpu/drm/radeon/cik.c radeon_scratch_free(rdev, scratch); rdev 3481 drivers/gpu/drm/radeon/cik.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3483 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 3489 drivers/gpu/drm/radeon/cik.c if (i < rdev->usec_timeout) { rdev 3496 drivers/gpu/drm/radeon/cik.c radeon_scratch_free(rdev, scratch); rdev 3508 drivers/gpu/drm/radeon/cik.c static void cik_hdp_flush_cp_ring_emit(struct radeon_device *rdev, rdev 3511 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[ridx]; rdev 3554 drivers/gpu/drm/radeon/cik.c void cik_fence_gfx_ring_emit(struct radeon_device *rdev, rdev 3557 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 3558 drivers/gpu/drm/radeon/cik.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 3595 drivers/gpu/drm/radeon/cik.c void cik_fence_compute_ring_emit(struct radeon_device *rdev, rdev 3598 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 3599 drivers/gpu/drm/radeon/cik.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 3625 drivers/gpu/drm/radeon/cik.c bool cik_semaphore_ring_emit(struct radeon_device *rdev, rdev 3659 drivers/gpu/drm/radeon/cik.c struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev, rdev 3666 drivers/gpu/drm/radeon/cik.c int ring_index = rdev->asic->copy.blit_ring_index; rdev 3667 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[ring_index]; rdev 3676 drivers/gpu/drm/radeon/cik.c r = radeon_ring_lock(rdev, ring, num_loops * 7 + 18); rdev 3679 drivers/gpu/drm/radeon/cik.c radeon_sync_free(rdev, &sync, NULL); rdev 3683 drivers/gpu/drm/radeon/cik.c radeon_sync_resv(rdev, &sync, resv, false); rdev 3684 drivers/gpu/drm/radeon/cik.c radeon_sync_rings(rdev, &sync, ring->idx); rdev 3705 drivers/gpu/drm/radeon/cik.c r = radeon_fence_emit(rdev, &fence, ring->idx); rdev 3707 drivers/gpu/drm/radeon/cik.c radeon_ring_unlock_undo(rdev, ring); rdev 3708 drivers/gpu/drm/radeon/cik.c radeon_sync_free(rdev, &sync, NULL); rdev 3712 drivers/gpu/drm/radeon/cik.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3713 drivers/gpu/drm/radeon/cik.c radeon_sync_free(rdev, &sync, fence); rdev 3733 drivers/gpu/drm/radeon/cik.c void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 3735 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 3753 drivers/gpu/drm/radeon/cik.c } else if (rdev->wb.enabled) { rdev 3783 drivers/gpu/drm/radeon/cik.c int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 3791 drivers/gpu/drm/radeon/cik.c r = radeon_scratch_get(rdev, &scratch); rdev 3797 drivers/gpu/drm/radeon/cik.c r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); rdev 3800 drivers/gpu/drm/radeon/cik.c radeon_scratch_free(rdev, scratch); rdev 3807 drivers/gpu/drm/radeon/cik.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 3809 drivers/gpu/drm/radeon/cik.c radeon_scratch_free(rdev, scratch); rdev 3810 drivers/gpu/drm/radeon/cik.c radeon_ib_free(rdev, &ib); rdev 3818 drivers/gpu/drm/radeon/cik.c radeon_scratch_free(rdev, scratch); rdev 3819 drivers/gpu/drm/radeon/cik.c radeon_ib_free(rdev, &ib); rdev 3823 drivers/gpu/drm/radeon/cik.c radeon_scratch_free(rdev, scratch); rdev 3824 drivers/gpu/drm/radeon/cik.c radeon_ib_free(rdev, &ib); rdev 3828 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 3834 drivers/gpu/drm/radeon/cik.c if (i < rdev->usec_timeout) { rdev 3841 drivers/gpu/drm/radeon/cik.c radeon_scratch_free(rdev, scratch); rdev 3842 drivers/gpu/drm/radeon/cik.c radeon_ib_free(rdev, &ib); rdev 3877 drivers/gpu/drm/radeon/cik.c static void cik_cp_gfx_enable(struct radeon_device *rdev, bool enable) rdev 3882 drivers/gpu/drm/radeon/cik.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 3883 drivers/gpu/drm/radeon/cik.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 3885 drivers/gpu/drm/radeon/cik.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 3898 drivers/gpu/drm/radeon/cik.c static int cik_cp_gfx_load_microcode(struct radeon_device *rdev) rdev 3902 drivers/gpu/drm/radeon/cik.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw) rdev 3905 drivers/gpu/drm/radeon/cik.c cik_cp_gfx_enable(rdev, false); rdev 3907 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) { rdev 3909 drivers/gpu/drm/radeon/cik.c (const struct gfx_firmware_header_v1_0 *)rdev->pfp_fw->data; rdev 3911 drivers/gpu/drm/radeon/cik.c (const struct gfx_firmware_header_v1_0 *)rdev->ce_fw->data; rdev 3913 drivers/gpu/drm/radeon/cik.c (const struct gfx_firmware_header_v1_0 *)rdev->me_fw->data; rdev 3923 drivers/gpu/drm/radeon/cik.c (rdev->pfp_fw->data + le32_to_cpu(pfp_hdr->header.ucode_array_offset_bytes)); rdev 3932 drivers/gpu/drm/radeon/cik.c (rdev->ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); rdev 3941 drivers/gpu/drm/radeon/cik.c (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); rdev 3952 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->pfp_fw->data; rdev 3959 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->ce_fw->data; rdev 3966 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->me_fw->data; rdev 3985 drivers/gpu/drm/radeon/cik.c static int cik_cp_gfx_start(struct radeon_device *rdev) rdev 3987 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3991 drivers/gpu/drm/radeon/cik.c WREG32(CP_MAX_CONTEXT, rdev->config.cik.max_hw_contexts - 1); rdev 3995 drivers/gpu/drm/radeon/cik.c cik_cp_gfx_enable(rdev, true); rdev 3997 drivers/gpu/drm/radeon/cik.c r = radeon_ring_lock(rdev, ring, cik_default_size + 17); rdev 4032 drivers/gpu/drm/radeon/cik.c radeon_ring_unlock_commit(rdev, ring, false); rdev 4045 drivers/gpu/drm/radeon/cik.c static void cik_cp_gfx_fini(struct radeon_device *rdev) rdev 4047 drivers/gpu/drm/radeon/cik.c cik_cp_gfx_enable(rdev, false); rdev 4048 drivers/gpu/drm/radeon/cik.c radeon_ring_fini(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]); rdev 4060 drivers/gpu/drm/radeon/cik.c static int cik_cp_gfx_resume(struct radeon_device *rdev) rdev 4069 drivers/gpu/drm/radeon/cik.c if (rdev->family != CHIP_HAWAII) rdev 4078 drivers/gpu/drm/radeon/cik.c WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); rdev 4082 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 4096 drivers/gpu/drm/radeon/cik.c WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); rdev 4097 drivers/gpu/drm/radeon/cik.c WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); rdev 4102 drivers/gpu/drm/radeon/cik.c if (!rdev->wb.enabled) rdev 4113 drivers/gpu/drm/radeon/cik.c cik_cp_gfx_start(rdev); rdev 4114 drivers/gpu/drm/radeon/cik.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = true; rdev 4115 drivers/gpu/drm/radeon/cik.c r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]); rdev 4117 drivers/gpu/drm/radeon/cik.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 4121 drivers/gpu/drm/radeon/cik.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 4122 drivers/gpu/drm/radeon/cik.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 4127 drivers/gpu/drm/radeon/cik.c u32 cik_gfx_get_rptr(struct radeon_device *rdev, rdev 4132 drivers/gpu/drm/radeon/cik.c if (rdev->wb.enabled) rdev 4133 drivers/gpu/drm/radeon/cik.c rptr = rdev->wb.wb[ring->rptr_offs/4]; rdev 4140 drivers/gpu/drm/radeon/cik.c u32 cik_gfx_get_wptr(struct radeon_device *rdev, rdev 4146 drivers/gpu/drm/radeon/cik.c void cik_gfx_set_wptr(struct radeon_device *rdev, rdev 4153 drivers/gpu/drm/radeon/cik.c u32 cik_compute_get_rptr(struct radeon_device *rdev, rdev 4158 drivers/gpu/drm/radeon/cik.c if (rdev->wb.enabled) { rdev 4159 drivers/gpu/drm/radeon/cik.c rptr = rdev->wb.wb[ring->rptr_offs/4]; rdev 4161 drivers/gpu/drm/radeon/cik.c mutex_lock(&rdev->srbm_mutex); rdev 4162 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0); rdev 4164 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, 0, 0, 0, 0); rdev 4165 drivers/gpu/drm/radeon/cik.c mutex_unlock(&rdev->srbm_mutex); rdev 4171 drivers/gpu/drm/radeon/cik.c u32 cik_compute_get_wptr(struct radeon_device *rdev, rdev 4176 drivers/gpu/drm/radeon/cik.c if (rdev->wb.enabled) { rdev 4178 drivers/gpu/drm/radeon/cik.c wptr = rdev->wb.wb[ring->wptr_offs/4]; rdev 4180 drivers/gpu/drm/radeon/cik.c mutex_lock(&rdev->srbm_mutex); rdev 4181 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0); rdev 4183 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, 0, 0, 0, 0); rdev 4184 drivers/gpu/drm/radeon/cik.c mutex_unlock(&rdev->srbm_mutex); rdev 4190 drivers/gpu/drm/radeon/cik.c void cik_compute_set_wptr(struct radeon_device *rdev, rdev 4194 drivers/gpu/drm/radeon/cik.c rdev->wb.wb[ring->wptr_offs/4] = ring->wptr; rdev 4198 drivers/gpu/drm/radeon/cik.c static void cik_compute_stop(struct radeon_device *rdev, rdev 4203 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0); rdev 4211 drivers/gpu/drm/radeon/cik.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 4220 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, 0, 0, 0, 0); rdev 4231 drivers/gpu/drm/radeon/cik.c static void cik_cp_compute_enable(struct radeon_device *rdev, bool enable) rdev 4240 drivers/gpu/drm/radeon/cik.c mutex_lock(&rdev->srbm_mutex); rdev 4241 drivers/gpu/drm/radeon/cik.c cik_compute_stop(rdev,&rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]); rdev 4242 drivers/gpu/drm/radeon/cik.c cik_compute_stop(rdev,&rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]); rdev 4243 drivers/gpu/drm/radeon/cik.c mutex_unlock(&rdev->srbm_mutex); rdev 4246 drivers/gpu/drm/radeon/cik.c rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false; rdev 4247 drivers/gpu/drm/radeon/cik.c rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; rdev 4260 drivers/gpu/drm/radeon/cik.c static int cik_cp_compute_load_microcode(struct radeon_device *rdev) rdev 4264 drivers/gpu/drm/radeon/cik.c if (!rdev->mec_fw) rdev 4267 drivers/gpu/drm/radeon/cik.c cik_cp_compute_enable(rdev, false); rdev 4269 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) { rdev 4271 drivers/gpu/drm/radeon/cik.c (const struct gfx_firmware_header_v1_0 *)rdev->mec_fw->data; rdev 4279 drivers/gpu/drm/radeon/cik.c (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); rdev 4287 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_KAVERI) { rdev 4289 drivers/gpu/drm/radeon/cik.c (const struct gfx_firmware_header_v1_0 *)rdev->mec2_fw->data; rdev 4292 drivers/gpu/drm/radeon/cik.c (rdev->mec2_fw->data + rdev 4304 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->mec_fw->data; rdev 4310 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_KAVERI) { rdev 4312 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->mec_fw->data; rdev 4331 drivers/gpu/drm/radeon/cik.c static int cik_cp_compute_start(struct radeon_device *rdev) rdev 4333 drivers/gpu/drm/radeon/cik.c cik_cp_compute_enable(rdev, true); rdev 4346 drivers/gpu/drm/radeon/cik.c static void cik_cp_compute_fini(struct radeon_device *rdev) rdev 4350 drivers/gpu/drm/radeon/cik.c cik_cp_compute_enable(rdev, false); rdev 4358 drivers/gpu/drm/radeon/cik.c if (rdev->ring[idx].mqd_obj) { rdev 4359 drivers/gpu/drm/radeon/cik.c r = radeon_bo_reserve(rdev->ring[idx].mqd_obj, false); rdev 4361 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) reserve MQD bo failed\n", r); rdev 4363 drivers/gpu/drm/radeon/cik.c radeon_bo_unpin(rdev->ring[idx].mqd_obj); rdev 4364 drivers/gpu/drm/radeon/cik.c radeon_bo_unreserve(rdev->ring[idx].mqd_obj); rdev 4366 drivers/gpu/drm/radeon/cik.c radeon_bo_unref(&rdev->ring[idx].mqd_obj); rdev 4367 drivers/gpu/drm/radeon/cik.c rdev->ring[idx].mqd_obj = NULL; rdev 4372 drivers/gpu/drm/radeon/cik.c static void cik_mec_fini(struct radeon_device *rdev) rdev 4376 drivers/gpu/drm/radeon/cik.c if (rdev->mec.hpd_eop_obj) { rdev 4377 drivers/gpu/drm/radeon/cik.c r = radeon_bo_reserve(rdev->mec.hpd_eop_obj, false); rdev 4379 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) reserve HPD EOP bo failed\n", r); rdev 4380 drivers/gpu/drm/radeon/cik.c radeon_bo_unpin(rdev->mec.hpd_eop_obj); rdev 4381 drivers/gpu/drm/radeon/cik.c radeon_bo_unreserve(rdev->mec.hpd_eop_obj); rdev 4383 drivers/gpu/drm/radeon/cik.c radeon_bo_unref(&rdev->mec.hpd_eop_obj); rdev 4384 drivers/gpu/drm/radeon/cik.c rdev->mec.hpd_eop_obj = NULL; rdev 4390 drivers/gpu/drm/radeon/cik.c static int cik_mec_init(struct radeon_device *rdev) rdev 4399 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_KAVERI) rdev 4400 drivers/gpu/drm/radeon/cik.c rdev->mec.num_mec = 2; rdev 4402 drivers/gpu/drm/radeon/cik.c rdev->mec.num_mec = 1; rdev 4403 drivers/gpu/drm/radeon/cik.c rdev->mec.num_pipe = 4; rdev 4404 drivers/gpu/drm/radeon/cik.c rdev->mec.num_queue = rdev->mec.num_mec * rdev->mec.num_pipe * 8; rdev 4406 drivers/gpu/drm/radeon/cik.c if (rdev->mec.hpd_eop_obj == NULL) { rdev 4407 drivers/gpu/drm/radeon/cik.c r = radeon_bo_create(rdev, rdev 4408 drivers/gpu/drm/radeon/cik.c rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2, rdev 4411 drivers/gpu/drm/radeon/cik.c &rdev->mec.hpd_eop_obj); rdev 4413 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) create HDP EOP bo failed\n", r); rdev 4418 drivers/gpu/drm/radeon/cik.c r = radeon_bo_reserve(rdev->mec.hpd_eop_obj, false); rdev 4420 drivers/gpu/drm/radeon/cik.c cik_mec_fini(rdev); rdev 4423 drivers/gpu/drm/radeon/cik.c r = radeon_bo_pin(rdev->mec.hpd_eop_obj, RADEON_GEM_DOMAIN_GTT, rdev 4424 drivers/gpu/drm/radeon/cik.c &rdev->mec.hpd_eop_gpu_addr); rdev 4426 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) pin HDP EOP bo failed\n", r); rdev 4427 drivers/gpu/drm/radeon/cik.c cik_mec_fini(rdev); rdev 4430 drivers/gpu/drm/radeon/cik.c r = radeon_bo_kmap(rdev->mec.hpd_eop_obj, (void **)&hpd); rdev 4432 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) map HDP EOP bo failed\n", r); rdev 4433 drivers/gpu/drm/radeon/cik.c cik_mec_fini(rdev); rdev 4438 drivers/gpu/drm/radeon/cik.c memset(hpd, 0, rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2); rdev 4440 drivers/gpu/drm/radeon/cik.c radeon_bo_kunmap(rdev->mec.hpd_eop_obj); rdev 4441 drivers/gpu/drm/radeon/cik.c radeon_bo_unreserve(rdev->mec.hpd_eop_obj); rdev 4522 drivers/gpu/drm/radeon/cik.c static int cik_cp_compute_resume(struct radeon_device *rdev) rdev 4534 drivers/gpu/drm/radeon/cik.c r = cik_cp_compute_start(rdev); rdev 4544 drivers/gpu/drm/radeon/cik.c mutex_lock(&rdev->srbm_mutex); rdev 4546 drivers/gpu/drm/radeon/cik.c for (i = 0; i < (rdev->mec.num_pipe * rdev->mec.num_mec); ++i) { rdev 4550 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, me, pipe, 0, 0); rdev 4552 drivers/gpu/drm/radeon/cik.c eop_gpu_addr = rdev->mec.hpd_eop_gpu_addr + (i * MEC_HPD_SIZE * 2) ; rdev 4567 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, 0, 0, 0, 0); rdev 4568 drivers/gpu/drm/radeon/cik.c mutex_unlock(&rdev->srbm_mutex); rdev 4577 drivers/gpu/drm/radeon/cik.c if (rdev->ring[idx].mqd_obj == NULL) { rdev 4578 drivers/gpu/drm/radeon/cik.c r = radeon_bo_create(rdev, rdev 4582 drivers/gpu/drm/radeon/cik.c NULL, &rdev->ring[idx].mqd_obj); rdev 4584 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) create MQD bo failed\n", r); rdev 4589 drivers/gpu/drm/radeon/cik.c r = radeon_bo_reserve(rdev->ring[idx].mqd_obj, false); rdev 4591 drivers/gpu/drm/radeon/cik.c cik_cp_compute_fini(rdev); rdev 4594 drivers/gpu/drm/radeon/cik.c r = radeon_bo_pin(rdev->ring[idx].mqd_obj, RADEON_GEM_DOMAIN_GTT, rdev 4597 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) pin MQD bo failed\n", r); rdev 4598 drivers/gpu/drm/radeon/cik.c cik_cp_compute_fini(rdev); rdev 4601 drivers/gpu/drm/radeon/cik.c r = radeon_bo_kmap(rdev->ring[idx].mqd_obj, (void **)&buf); rdev 4603 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "(%d) map MQD bo failed\n", r); rdev 4604 drivers/gpu/drm/radeon/cik.c cik_cp_compute_fini(rdev); rdev 4618 drivers/gpu/drm/radeon/cik.c mutex_lock(&rdev->srbm_mutex); rdev 4619 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, rdev->ring[idx].me, rdev 4620 drivers/gpu/drm/radeon/cik.c rdev->ring[idx].pipe, rdev 4621 drivers/gpu/drm/radeon/cik.c rdev->ring[idx].queue, 0); rdev 4644 drivers/gpu/drm/radeon/cik.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 4665 drivers/gpu/drm/radeon/cik.c hqd_gpu_addr = rdev->ring[idx].gpu_addr >> 8; rdev 4677 drivers/gpu/drm/radeon/cik.c order_base_2(rdev->ring[idx].ring_size / 8); rdev 4691 drivers/gpu/drm/radeon/cik.c wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP1_WPTR_OFFSET; rdev 4693 drivers/gpu/drm/radeon/cik.c wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP2_WPTR_OFFSET; rdev 4702 drivers/gpu/drm/radeon/cik.c wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET; rdev 4704 drivers/gpu/drm/radeon/cik.c wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET; rdev 4719 drivers/gpu/drm/radeon/cik.c DOORBELL_OFFSET(rdev->ring[idx].doorbell_index); rdev 4731 drivers/gpu/drm/radeon/cik.c rdev->ring[idx].wptr = 0; rdev 4732 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_wptr = rdev->ring[idx].wptr; rdev 4744 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, 0, 0, 0, 0); rdev 4745 drivers/gpu/drm/radeon/cik.c mutex_unlock(&rdev->srbm_mutex); rdev 4747 drivers/gpu/drm/radeon/cik.c radeon_bo_kunmap(rdev->ring[idx].mqd_obj); rdev 4748 drivers/gpu/drm/radeon/cik.c radeon_bo_unreserve(rdev->ring[idx].mqd_obj); rdev 4750 drivers/gpu/drm/radeon/cik.c rdev->ring[idx].ready = true; rdev 4751 drivers/gpu/drm/radeon/cik.c r = radeon_ring_test(rdev, idx, &rdev->ring[idx]); rdev 4753 drivers/gpu/drm/radeon/cik.c rdev->ring[idx].ready = false; rdev 4759 drivers/gpu/drm/radeon/cik.c static void cik_cp_enable(struct radeon_device *rdev, bool enable) rdev 4761 drivers/gpu/drm/radeon/cik.c cik_cp_gfx_enable(rdev, enable); rdev 4762 drivers/gpu/drm/radeon/cik.c cik_cp_compute_enable(rdev, enable); rdev 4765 drivers/gpu/drm/radeon/cik.c static int cik_cp_load_microcode(struct radeon_device *rdev) rdev 4769 drivers/gpu/drm/radeon/cik.c r = cik_cp_gfx_load_microcode(rdev); rdev 4772 drivers/gpu/drm/radeon/cik.c r = cik_cp_compute_load_microcode(rdev); rdev 4779 drivers/gpu/drm/radeon/cik.c static void cik_cp_fini(struct radeon_device *rdev) rdev 4781 drivers/gpu/drm/radeon/cik.c cik_cp_gfx_fini(rdev); rdev 4782 drivers/gpu/drm/radeon/cik.c cik_cp_compute_fini(rdev); rdev 4785 drivers/gpu/drm/radeon/cik.c static int cik_cp_resume(struct radeon_device *rdev) rdev 4789 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, false); rdev 4791 drivers/gpu/drm/radeon/cik.c r = cik_cp_load_microcode(rdev); rdev 4795 drivers/gpu/drm/radeon/cik.c r = cik_cp_gfx_resume(rdev); rdev 4798 drivers/gpu/drm/radeon/cik.c r = cik_cp_compute_resume(rdev); rdev 4802 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, true); rdev 4807 drivers/gpu/drm/radeon/cik.c static void cik_print_gpu_status_regs(struct radeon_device *rdev) rdev 4809 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n", rdev 4811 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " GRBM_STATUS2=0x%08X\n", rdev 4813 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " GRBM_STATUS_SE0=0x%08X\n", rdev 4815 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " GRBM_STATUS_SE1=0x%08X\n", rdev 4817 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " GRBM_STATUS_SE2=0x%08X\n", rdev 4819 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " GRBM_STATUS_SE3=0x%08X\n", rdev 4821 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", rdev 4823 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " SRBM_STATUS2=0x%08X\n", rdev 4825 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " SDMA0_STATUS_REG = 0x%08X\n", rdev 4827 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " SDMA1_STATUS_REG = 0x%08X\n", rdev 4829 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_STAT = 0x%08x\n", RREG32(CP_STAT)); rdev 4830 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_STALLED_STAT1 = 0x%08x\n", rdev 4832 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_STALLED_STAT2 = 0x%08x\n", rdev 4834 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_STALLED_STAT3 = 0x%08x\n", rdev 4836 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_CPF_BUSY_STAT = 0x%08x\n", rdev 4838 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_CPF_STALLED_STAT1 = 0x%08x\n", rdev 4840 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_CPF_STATUS = 0x%08x\n", RREG32(CP_CPF_STATUS)); rdev 4841 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_CPC_BUSY_STAT = 0x%08x\n", RREG32(CP_CPC_BUSY_STAT)); rdev 4842 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_CPC_STALLED_STAT1 = 0x%08x\n", rdev 4844 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " CP_CPC_STATUS = 0x%08x\n", RREG32(CP_CPC_STATUS)); rdev 4856 drivers/gpu/drm/radeon/cik.c u32 cik_gpu_check_soft_reset(struct radeon_device *rdev) rdev 4916 drivers/gpu/drm/radeon/cik.c if (evergreen_is_display_hung(rdev)) rdev 4936 drivers/gpu/drm/radeon/cik.c static void cik_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) rdev 4945 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask); rdev 4947 drivers/gpu/drm/radeon/cik.c cik_print_gpu_status_regs(rdev); rdev 4948 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", rdev 4950 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", rdev 4954 drivers/gpu/drm/radeon/cik.c cik_fini_pg(rdev); rdev 4955 drivers/gpu/drm/radeon/cik.c cik_fini_cg(rdev); rdev 4958 drivers/gpu/drm/radeon/cik.c cik_rlc_stop(rdev); rdev 4979 drivers/gpu/drm/radeon/cik.c evergreen_mc_stop(rdev, &save); rdev 4980 drivers/gpu/drm/radeon/cik.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 4981 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 5017 drivers/gpu/drm/radeon/cik.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 5025 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); rdev 5039 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); rdev 5053 drivers/gpu/drm/radeon/cik.c evergreen_mc_resume(rdev, &save); rdev 5056 drivers/gpu/drm/radeon/cik.c cik_print_gpu_status_regs(rdev); rdev 5065 drivers/gpu/drm/radeon/cik.c static void kv_save_regs_for_reset(struct radeon_device *rdev, rdev 5077 drivers/gpu/drm/radeon/cik.c static void kv_restore_regs_for_reset(struct radeon_device *rdev, rdev 5150 drivers/gpu/drm/radeon/cik.c static void cik_gpu_pci_config_reset(struct radeon_device *rdev) rdev 5156 drivers/gpu/drm/radeon/cik.c dev_info(rdev->dev, "GPU pci config reset\n"); rdev 5161 drivers/gpu/drm/radeon/cik.c cik_fini_pg(rdev); rdev 5162 drivers/gpu/drm/radeon/cik.c cik_fini_cg(rdev); rdev 5181 drivers/gpu/drm/radeon/cik.c cik_rlc_stop(rdev); rdev 5186 drivers/gpu/drm/radeon/cik.c evergreen_mc_stop(rdev, &save); rdev 5187 drivers/gpu/drm/radeon/cik.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 5188 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "Wait for MC idle timed out !\n"); rdev 5191 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) rdev 5192 drivers/gpu/drm/radeon/cik.c kv_save_regs_for_reset(rdev, &kv_save); rdev 5195 drivers/gpu/drm/radeon/cik.c pci_clear_master(rdev->pdev); rdev 5197 drivers/gpu/drm/radeon/cik.c radeon_pci_config_reset(rdev); rdev 5202 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 5209 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) rdev 5210 drivers/gpu/drm/radeon/cik.c kv_restore_regs_for_reset(rdev, &kv_save); rdev 5223 drivers/gpu/drm/radeon/cik.c int cik_asic_reset(struct radeon_device *rdev, bool hard) rdev 5228 drivers/gpu/drm/radeon/cik.c cik_gpu_pci_config_reset(rdev); rdev 5232 drivers/gpu/drm/radeon/cik.c reset_mask = cik_gpu_check_soft_reset(rdev); rdev 5235 drivers/gpu/drm/radeon/cik.c r600_set_bios_scratch_engine_hung(rdev, true); rdev 5238 drivers/gpu/drm/radeon/cik.c cik_gpu_soft_reset(rdev, reset_mask); rdev 5240 drivers/gpu/drm/radeon/cik.c reset_mask = cik_gpu_check_soft_reset(rdev); rdev 5244 drivers/gpu/drm/radeon/cik.c cik_gpu_pci_config_reset(rdev); rdev 5246 drivers/gpu/drm/radeon/cik.c reset_mask = cik_gpu_check_soft_reset(rdev); rdev 5249 drivers/gpu/drm/radeon/cik.c r600_set_bios_scratch_engine_hung(rdev, false); rdev 5263 drivers/gpu/drm/radeon/cik.c bool cik_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 5265 drivers/gpu/drm/radeon/cik.c u32 reset_mask = cik_gpu_check_soft_reset(rdev); rdev 5270 drivers/gpu/drm/radeon/cik.c radeon_ring_lockup_update(rdev, ring); rdev 5273 drivers/gpu/drm/radeon/cik.c return radeon_ring_test_lockup(rdev, ring); rdev 5285 drivers/gpu/drm/radeon/cik.c static void cik_mc_program(struct radeon_device *rdev) rdev 5301 drivers/gpu/drm/radeon/cik.c evergreen_mc_stop(rdev, &save); rdev 5302 drivers/gpu/drm/radeon/cik.c if (radeon_mc_wait_for_idle(rdev)) { rdev 5303 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 5309 drivers/gpu/drm/radeon/cik.c rdev->mc.vram_start >> 12); rdev 5311 drivers/gpu/drm/radeon/cik.c rdev->mc.vram_end >> 12); rdev 5313 drivers/gpu/drm/radeon/cik.c rdev->vram_scratch.gpu_addr >> 12); rdev 5314 drivers/gpu/drm/radeon/cik.c tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; rdev 5315 drivers/gpu/drm/radeon/cik.c tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); rdev 5318 drivers/gpu/drm/radeon/cik.c WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); rdev 5324 drivers/gpu/drm/radeon/cik.c if (radeon_mc_wait_for_idle(rdev)) { rdev 5325 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 5327 drivers/gpu/drm/radeon/cik.c evergreen_mc_resume(rdev, &save); rdev 5330 drivers/gpu/drm/radeon/cik.c rv515_vga_render_disable(rdev); rdev 5342 drivers/gpu/drm/radeon/cik.c static int cik_mc_init(struct radeon_device *rdev) rdev 5348 drivers/gpu/drm/radeon/cik.c rdev->mc.vram_is_ddr = true; rdev 5386 drivers/gpu/drm/radeon/cik.c rdev->mc.vram_width = numchan * chansize; rdev 5388 drivers/gpu/drm/radeon/cik.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 5389 drivers/gpu/drm/radeon/cik.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 5391 drivers/gpu/drm/radeon/cik.c rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; rdev 5392 drivers/gpu/drm/radeon/cik.c rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; rdev 5393 drivers/gpu/drm/radeon/cik.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 5394 drivers/gpu/drm/radeon/cik.c si_vram_gtt_location(rdev, &rdev->mc); rdev 5395 drivers/gpu/drm/radeon/cik.c radeon_update_bandwidth_info(rdev); rdev 5413 drivers/gpu/drm/radeon/cik.c void cik_pcie_gart_tlb_flush(struct radeon_device *rdev) rdev 5433 drivers/gpu/drm/radeon/cik.c static int cik_pcie_gart_enable(struct radeon_device *rdev) rdev 5437 drivers/gpu/drm/radeon/cik.c if (rdev->gart.robj == NULL) { rdev 5438 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 5441 drivers/gpu/drm/radeon/cik.c r = radeon_gart_table_vram_pin(rdev); rdev 5464 drivers/gpu/drm/radeon/cik.c WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); rdev 5465 drivers/gpu/drm/radeon/cik.c WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); rdev 5466 drivers/gpu/drm/radeon/cik.c WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); rdev 5468 drivers/gpu/drm/radeon/cik.c (u32)(rdev->dummy_page.addr >> 12)); rdev 5480 drivers/gpu/drm/radeon/cik.c WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn - 1); rdev 5484 drivers/gpu/drm/radeon/cik.c rdev->vm_manager.saved_table_addr[i]); rdev 5487 drivers/gpu/drm/radeon/cik.c rdev->vm_manager.saved_table_addr[i]); rdev 5492 drivers/gpu/drm/radeon/cik.c (u32)(rdev->dummy_page.addr >> 12)); rdev 5509 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_KAVERI) { rdev 5517 drivers/gpu/drm/radeon/cik.c mutex_lock(&rdev->srbm_mutex); rdev 5519 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, 0, 0, 0, i); rdev 5532 drivers/gpu/drm/radeon/cik.c cik_srbm_select(rdev, 0, 0, 0, 0); rdev 5533 drivers/gpu/drm/radeon/cik.c mutex_unlock(&rdev->srbm_mutex); rdev 5535 drivers/gpu/drm/radeon/cik.c cik_pcie_gart_tlb_flush(rdev); rdev 5537 drivers/gpu/drm/radeon/cik.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 5538 drivers/gpu/drm/radeon/cik.c (unsigned long long)rdev->gart.table_addr); rdev 5539 drivers/gpu/drm/radeon/cik.c rdev->gart.ready = true; rdev 5550 drivers/gpu/drm/radeon/cik.c static void cik_pcie_gart_disable(struct radeon_device *rdev) rdev 5560 drivers/gpu/drm/radeon/cik.c rdev->vm_manager.saved_table_addr[i] = RREG32(reg); rdev 5579 drivers/gpu/drm/radeon/cik.c radeon_gart_table_vram_unpin(rdev); rdev 5589 drivers/gpu/drm/radeon/cik.c static void cik_pcie_gart_fini(struct radeon_device *rdev) rdev 5591 drivers/gpu/drm/radeon/cik.c cik_pcie_gart_disable(rdev); rdev 5592 drivers/gpu/drm/radeon/cik.c radeon_gart_table_vram_free(rdev); rdev 5593 drivers/gpu/drm/radeon/cik.c radeon_gart_fini(rdev); rdev 5605 drivers/gpu/drm/radeon/cik.c int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib) rdev 5625 drivers/gpu/drm/radeon/cik.c int cik_vm_init(struct radeon_device *rdev) rdev 5632 drivers/gpu/drm/radeon/cik.c rdev->vm_manager.nvm = 16; rdev 5634 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) { rdev 5637 drivers/gpu/drm/radeon/cik.c rdev->vm_manager.vram_base_offset = tmp; rdev 5639 drivers/gpu/drm/radeon/cik.c rdev->vm_manager.vram_base_offset = 0; rdev 5651 drivers/gpu/drm/radeon/cik.c void cik_vm_fini(struct radeon_device *rdev) rdev 5664 drivers/gpu/drm/radeon/cik.c static void cik_vm_decode_fault(struct radeon_device *rdev, rdev 5673 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_HAWAII) rdev 5692 drivers/gpu/drm/radeon/cik.c void cik_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 5737 drivers/gpu/drm/radeon/cik.c cik_hdp_flush_cp_ring_emit(rdev, ring->idx); rdev 5772 drivers/gpu/drm/radeon/cik.c static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev, rdev 5784 drivers/gpu/drm/radeon/cik.c static void cik_enable_lbpw(struct radeon_device *rdev, bool enable) rdev 5796 drivers/gpu/drm/radeon/cik.c static void cik_wait_for_rlc_serdes(struct radeon_device *rdev) rdev 5801 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { rdev 5802 drivers/gpu/drm/radeon/cik.c for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { rdev 5803 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, i, j); rdev 5804 drivers/gpu/drm/radeon/cik.c for (k = 0; k < rdev->usec_timeout; k++) { rdev 5811 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 5814 drivers/gpu/drm/radeon/cik.c for (k = 0; k < rdev->usec_timeout; k++) { rdev 5821 drivers/gpu/drm/radeon/cik.c static void cik_update_rlc(struct radeon_device *rdev, u32 rlc) rdev 5830 drivers/gpu/drm/radeon/cik.c static u32 cik_halt_rlc(struct radeon_device *rdev) rdev 5842 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 5848 drivers/gpu/drm/radeon/cik.c cik_wait_for_rlc_serdes(rdev); rdev 5854 drivers/gpu/drm/radeon/cik.c void cik_enter_rlc_safe_mode(struct radeon_device *rdev) rdev 5862 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 5868 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 5875 drivers/gpu/drm/radeon/cik.c void cik_exit_rlc_safe_mode(struct radeon_device *rdev) rdev 5890 drivers/gpu/drm/radeon/cik.c static void cik_rlc_stop(struct radeon_device *rdev) rdev 5894 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, false); rdev 5896 drivers/gpu/drm/radeon/cik.c cik_wait_for_rlc_serdes(rdev); rdev 5906 drivers/gpu/drm/radeon/cik.c static void cik_rlc_start(struct radeon_device *rdev) rdev 5910 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, true); rdev 5924 drivers/gpu/drm/radeon/cik.c static int cik_rlc_resume(struct radeon_device *rdev) rdev 5928 drivers/gpu/drm/radeon/cik.c if (!rdev->rlc_fw) rdev 5931 drivers/gpu/drm/radeon/cik.c cik_rlc_stop(rdev); rdev 5937 drivers/gpu/drm/radeon/cik.c si_rlc_reset(rdev); rdev 5939 drivers/gpu/drm/radeon/cik.c cik_init_pg(rdev); rdev 5941 drivers/gpu/drm/radeon/cik.c cik_init_cg(rdev); rdev 5946 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 5954 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) { rdev 5956 drivers/gpu/drm/radeon/cik.c (const struct rlc_firmware_header_v1_0 *)rdev->rlc_fw->data; rdev 5958 drivers/gpu/drm/radeon/cik.c (rdev->rlc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 5970 drivers/gpu/drm/radeon/cik.c switch (rdev->family) { rdev 5987 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->rlc_fw->data; rdev 5995 drivers/gpu/drm/radeon/cik.c cik_enable_lbpw(rdev, false); rdev 5997 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_BONAIRE) rdev 6000 drivers/gpu/drm/radeon/cik.c cik_rlc_start(rdev); rdev 6005 drivers/gpu/drm/radeon/cik.c static void cik_enable_cgcg(struct radeon_device *rdev, bool enable) rdev 6011 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CGCG)) { rdev 6012 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, true); rdev 6014 drivers/gpu/drm/radeon/cik.c tmp = cik_halt_rlc(rdev); rdev 6016 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 6022 drivers/gpu/drm/radeon/cik.c cik_update_rlc(rdev, tmp); rdev 6026 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, false); rdev 6041 drivers/gpu/drm/radeon/cik.c static void cik_enable_mgcg(struct radeon_device *rdev, bool enable) rdev 6045 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_MGCG)) { rdev 6046 drivers/gpu/drm/radeon/cik.c if (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_MGLS) { rdev 6047 drivers/gpu/drm/radeon/cik.c if (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CP_LS) { rdev 6061 drivers/gpu/drm/radeon/cik.c tmp = cik_halt_rlc(rdev); rdev 6063 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 6069 drivers/gpu/drm/radeon/cik.c cik_update_rlc(rdev, tmp); rdev 6071 drivers/gpu/drm/radeon/cik.c if (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CGTS) { rdev 6077 drivers/gpu/drm/radeon/cik.c if ((rdev->cg_flags & RADEON_CG_SUPPORT_GFX_MGLS) && rdev 6078 drivers/gpu/drm/radeon/cik.c (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CGTS_LS)) rdev 6109 drivers/gpu/drm/radeon/cik.c tmp = cik_halt_rlc(rdev); rdev 6111 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 6117 drivers/gpu/drm/radeon/cik.c cik_update_rlc(rdev, tmp); rdev 6134 drivers/gpu/drm/radeon/cik.c static void cik_enable_mc_ls(struct radeon_device *rdev, rdev 6142 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_MC_LS)) rdev 6151 drivers/gpu/drm/radeon/cik.c static void cik_enable_mc_mgcg(struct radeon_device *rdev, rdev 6159 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_MC_MGCG)) rdev 6168 drivers/gpu/drm/radeon/cik.c static void cik_enable_sdma_mgcg(struct radeon_device *rdev, rdev 6173 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_SDMA_MGCG)) { rdev 6189 drivers/gpu/drm/radeon/cik.c static void cik_enable_sdma_mgls(struct radeon_device *rdev, rdev 6194 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_SDMA_LS)) { rdev 6217 drivers/gpu/drm/radeon/cik.c static void cik_enable_uvd_mgcg(struct radeon_device *rdev, rdev 6222 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_UVD_MGCG)) { rdev 6243 drivers/gpu/drm/radeon/cik.c static void cik_enable_bif_mgls(struct radeon_device *rdev, rdev 6250 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_BIF_LS)) rdev 6261 drivers/gpu/drm/radeon/cik.c static void cik_enable_hdp_mgcg(struct radeon_device *rdev, rdev 6268 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_HDP_MGCG)) rdev 6277 drivers/gpu/drm/radeon/cik.c static void cik_enable_hdp_ls(struct radeon_device *rdev, rdev 6284 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_HDP_LS)) rdev 6293 drivers/gpu/drm/radeon/cik.c void cik_update_cg(struct radeon_device *rdev, rdev 6298 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, false); rdev 6301 drivers/gpu/drm/radeon/cik.c cik_enable_mgcg(rdev, true); rdev 6302 drivers/gpu/drm/radeon/cik.c cik_enable_cgcg(rdev, true); rdev 6304 drivers/gpu/drm/radeon/cik.c cik_enable_cgcg(rdev, false); rdev 6305 drivers/gpu/drm/radeon/cik.c cik_enable_mgcg(rdev, false); rdev 6307 drivers/gpu/drm/radeon/cik.c cik_enable_gui_idle_interrupt(rdev, true); rdev 6311 drivers/gpu/drm/radeon/cik.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 6312 drivers/gpu/drm/radeon/cik.c cik_enable_mc_mgcg(rdev, enable); rdev 6313 drivers/gpu/drm/radeon/cik.c cik_enable_mc_ls(rdev, enable); rdev 6318 drivers/gpu/drm/radeon/cik.c cik_enable_sdma_mgcg(rdev, enable); rdev 6319 drivers/gpu/drm/radeon/cik.c cik_enable_sdma_mgls(rdev, enable); rdev 6323 drivers/gpu/drm/radeon/cik.c cik_enable_bif_mgls(rdev, enable); rdev 6327 drivers/gpu/drm/radeon/cik.c if (rdev->has_uvd) rdev 6328 drivers/gpu/drm/radeon/cik.c cik_enable_uvd_mgcg(rdev, enable); rdev 6332 drivers/gpu/drm/radeon/cik.c cik_enable_hdp_mgcg(rdev, enable); rdev 6333 drivers/gpu/drm/radeon/cik.c cik_enable_hdp_ls(rdev, enable); rdev 6337 drivers/gpu/drm/radeon/cik.c vce_v2_0_enable_mgcg(rdev, enable); rdev 6341 drivers/gpu/drm/radeon/cik.c static void cik_init_cg(struct radeon_device *rdev) rdev 6344 drivers/gpu/drm/radeon/cik.c cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, true); rdev 6346 drivers/gpu/drm/radeon/cik.c if (rdev->has_uvd) rdev 6347 drivers/gpu/drm/radeon/cik.c si_init_uvd_internal_cg(rdev); rdev 6349 drivers/gpu/drm/radeon/cik.c cik_update_cg(rdev, (RADEON_CG_BLOCK_MC | rdev 6356 drivers/gpu/drm/radeon/cik.c static void cik_fini_cg(struct radeon_device *rdev) rdev 6358 drivers/gpu/drm/radeon/cik.c cik_update_cg(rdev, (RADEON_CG_BLOCK_MC | rdev 6364 drivers/gpu/drm/radeon/cik.c cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, false); rdev 6367 drivers/gpu/drm/radeon/cik.c static void cik_enable_sck_slowdown_on_pu(struct radeon_device *rdev, rdev 6373 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_RLC_SMU_HS)) rdev 6381 drivers/gpu/drm/radeon/cik.c static void cik_enable_sck_slowdown_on_pd(struct radeon_device *rdev, rdev 6387 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_RLC_SMU_HS)) rdev 6395 drivers/gpu/drm/radeon/cik.c static void cik_enable_cp_pg(struct radeon_device *rdev, bool enable) rdev 6400 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_CP)) rdev 6408 drivers/gpu/drm/radeon/cik.c static void cik_enable_gds_pg(struct radeon_device *rdev, bool enable) rdev 6413 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GDS)) rdev 6425 drivers/gpu/drm/radeon/cik.c void cik_init_cp_pg_table(struct radeon_device *rdev) rdev 6432 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_KAVERI) rdev 6435 drivers/gpu/drm/radeon/cik.c if (rdev->rlc.cp_table_ptr == NULL) rdev 6439 drivers/gpu/drm/radeon/cik.c dst_ptr = rdev->rlc.cp_table_ptr; rdev 6441 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) { rdev 6446 drivers/gpu/drm/radeon/cik.c hdr = (const struct gfx_firmware_header_v1_0 *)rdev->ce_fw->data; rdev 6448 drivers/gpu/drm/radeon/cik.c (rdev->ce_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 6452 drivers/gpu/drm/radeon/cik.c hdr = (const struct gfx_firmware_header_v1_0 *)rdev->pfp_fw->data; rdev 6454 drivers/gpu/drm/radeon/cik.c (rdev->pfp_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 6458 drivers/gpu/drm/radeon/cik.c hdr = (const struct gfx_firmware_header_v1_0 *)rdev->me_fw->data; rdev 6460 drivers/gpu/drm/radeon/cik.c (rdev->me_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 6464 drivers/gpu/drm/radeon/cik.c hdr = (const struct gfx_firmware_header_v1_0 *)rdev->mec_fw->data; rdev 6466 drivers/gpu/drm/radeon/cik.c (rdev->mec_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 6470 drivers/gpu/drm/radeon/cik.c hdr = (const struct gfx_firmware_header_v1_0 *)rdev->mec2_fw->data; rdev 6472 drivers/gpu/drm/radeon/cik.c (rdev->mec2_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 6487 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->ce_fw->data; rdev 6490 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->pfp_fw->data; rdev 6493 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->me_fw->data; rdev 6496 drivers/gpu/drm/radeon/cik.c fw_data = (const __be32 *)rdev->mec_fw->data; rdev 6509 drivers/gpu/drm/radeon/cik.c static void cik_enable_gfx_cgpg(struct radeon_device *rdev, rdev 6514 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG)) { rdev 6539 drivers/gpu/drm/radeon/cik.c static u32 cik_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh) rdev 6544 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, se, sh); rdev 6547 drivers/gpu/drm/radeon/cik.c cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 6554 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->config.cik.max_cu_per_sh; i ++) { rdev 6562 drivers/gpu/drm/radeon/cik.c static void cik_init_ao_cu_mask(struct radeon_device *rdev) rdev 6568 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { rdev 6569 drivers/gpu/drm/radeon/cik.c for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { rdev 6573 drivers/gpu/drm/radeon/cik.c for (k = 0; k < rdev->config.cik.max_cu_per_sh; k ++) { rdev 6574 drivers/gpu/drm/radeon/cik.c if (cik_get_cu_active_bitmap(rdev, i, j) & mask) { rdev 6595 drivers/gpu/drm/radeon/cik.c static void cik_enable_gfx_static_mgpg(struct radeon_device *rdev, rdev 6601 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_SMG)) rdev 6609 drivers/gpu/drm/radeon/cik.c static void cik_enable_gfx_dynamic_mgpg(struct radeon_device *rdev, rdev 6615 drivers/gpu/drm/radeon/cik.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_DMG)) rdev 6626 drivers/gpu/drm/radeon/cik.c static void cik_init_gfx_cgpg(struct radeon_device *rdev) rdev 6631 drivers/gpu/drm/radeon/cik.c if (rdev->rlc.cs_data) { rdev 6633 drivers/gpu/drm/radeon/cik.c WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr)); rdev 6634 drivers/gpu/drm/radeon/cik.c WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr)); rdev 6635 drivers/gpu/drm/radeon/cik.c WREG32(RLC_GPM_SCRATCH_DATA, rdev->rlc.clear_state_size); rdev 6641 drivers/gpu/drm/radeon/cik.c if (rdev->rlc.reg_list) { rdev 6643 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->rlc.reg_list_size; i++) rdev 6644 drivers/gpu/drm/radeon/cik.c WREG32(RLC_GPM_SCRATCH_DATA, rdev->rlc.reg_list[i]); rdev 6652 drivers/gpu/drm/radeon/cik.c WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); rdev 6653 drivers/gpu/drm/radeon/cik.c WREG32(RLC_CP_TABLE_RESTORE, rdev->rlc.cp_table_gpu_addr >> 8); rdev 6675 drivers/gpu/drm/radeon/cik.c static void cik_update_gfx_pg(struct radeon_device *rdev, bool enable) rdev 6677 drivers/gpu/drm/radeon/cik.c cik_enable_gfx_cgpg(rdev, enable); rdev 6678 drivers/gpu/drm/radeon/cik.c cik_enable_gfx_static_mgpg(rdev, enable); rdev 6679 drivers/gpu/drm/radeon/cik.c cik_enable_gfx_dynamic_mgpg(rdev, enable); rdev 6682 drivers/gpu/drm/radeon/cik.c u32 cik_get_csb_size(struct radeon_device *rdev) rdev 6688 drivers/gpu/drm/radeon/cik.c if (rdev->rlc.cs_data == NULL) rdev 6696 drivers/gpu/drm/radeon/cik.c for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { rdev 6714 drivers/gpu/drm/radeon/cik.c void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer) rdev 6720 drivers/gpu/drm/radeon/cik.c if (rdev->rlc.cs_data == NULL) rdev 6732 drivers/gpu/drm/radeon/cik.c for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { rdev 6748 drivers/gpu/drm/radeon/cik.c switch (rdev->family) { rdev 6779 drivers/gpu/drm/radeon/cik.c static void cik_init_pg(struct radeon_device *rdev) rdev 6781 drivers/gpu/drm/radeon/cik.c if (rdev->pg_flags) { rdev 6782 drivers/gpu/drm/radeon/cik.c cik_enable_sck_slowdown_on_pu(rdev, true); rdev 6783 drivers/gpu/drm/radeon/cik.c cik_enable_sck_slowdown_on_pd(rdev, true); rdev 6784 drivers/gpu/drm/radeon/cik.c if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) { rdev 6785 drivers/gpu/drm/radeon/cik.c cik_init_gfx_cgpg(rdev); rdev 6786 drivers/gpu/drm/radeon/cik.c cik_enable_cp_pg(rdev, true); rdev 6787 drivers/gpu/drm/radeon/cik.c cik_enable_gds_pg(rdev, true); rdev 6789 drivers/gpu/drm/radeon/cik.c cik_init_ao_cu_mask(rdev); rdev 6790 drivers/gpu/drm/radeon/cik.c cik_update_gfx_pg(rdev, true); rdev 6794 drivers/gpu/drm/radeon/cik.c static void cik_fini_pg(struct radeon_device *rdev) rdev 6796 drivers/gpu/drm/radeon/cik.c if (rdev->pg_flags) { rdev 6797 drivers/gpu/drm/radeon/cik.c cik_update_gfx_pg(rdev, false); rdev 6798 drivers/gpu/drm/radeon/cik.c if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) { rdev 6799 drivers/gpu/drm/radeon/cik.c cik_enable_cp_pg(rdev, false); rdev 6800 drivers/gpu/drm/radeon/cik.c cik_enable_gds_pg(rdev, false); rdev 6827 drivers/gpu/drm/radeon/cik.c static void cik_enable_interrupts(struct radeon_device *rdev) rdev 6836 drivers/gpu/drm/radeon/cik.c rdev->ih.enabled = true; rdev 6846 drivers/gpu/drm/radeon/cik.c static void cik_disable_interrupts(struct radeon_device *rdev) rdev 6858 drivers/gpu/drm/radeon/cik.c rdev->ih.enabled = false; rdev 6859 drivers/gpu/drm/radeon/cik.c rdev->ih.rptr = 0; rdev 6869 drivers/gpu/drm/radeon/cik.c static void cik_disable_interrupt_state(struct radeon_device *rdev) rdev 6898 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 4) { rdev 6902 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 6) { rdev 6907 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 2) { rdev 6911 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 4) { rdev 6915 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 6) { rdev 6950 drivers/gpu/drm/radeon/cik.c static int cik_irq_init(struct radeon_device *rdev) rdev 6957 drivers/gpu/drm/radeon/cik.c ret = r600_ih_ring_alloc(rdev); rdev 6962 drivers/gpu/drm/radeon/cik.c cik_disable_interrupts(rdev); rdev 6965 drivers/gpu/drm/radeon/cik.c ret = cik_rlc_resume(rdev); rdev 6967 drivers/gpu/drm/radeon/cik.c r600_ih_ring_fini(rdev); rdev 6973 drivers/gpu/drm/radeon/cik.c WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); rdev 6983 drivers/gpu/drm/radeon/cik.c WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8); rdev 6984 drivers/gpu/drm/radeon/cik.c rb_bufsz = order_base_2(rdev->ih.ring_size / 4); rdev 6990 drivers/gpu/drm/radeon/cik.c if (rdev->wb.enabled) rdev 6994 drivers/gpu/drm/radeon/cik.c WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC); rdev 6995 drivers/gpu/drm/radeon/cik.c WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF); rdev 7006 drivers/gpu/drm/radeon/cik.c if (rdev->msi_enabled) rdev 7011 drivers/gpu/drm/radeon/cik.c cik_disable_interrupt_state(rdev); rdev 7013 drivers/gpu/drm/radeon/cik.c pci_set_master(rdev->pdev); rdev 7016 drivers/gpu/drm/radeon/cik.c cik_enable_interrupts(rdev); rdev 7030 drivers/gpu/drm/radeon/cik.c int cik_irq_set(struct radeon_device *rdev) rdev 7040 drivers/gpu/drm/radeon/cik.c if (!rdev->irq.installed) { rdev 7045 drivers/gpu/drm/radeon/cik.c if (!rdev->ih.enabled) { rdev 7046 drivers/gpu/drm/radeon/cik.c cik_disable_interrupts(rdev); rdev 7048 drivers/gpu/drm/radeon/cik.c cik_disable_interrupt_state(rdev); rdev 7076 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { rdev 7080 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP1_INDEX])) { rdev 7081 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 7123 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP2_INDEX])) { rdev 7124 drivers/gpu/drm/radeon/cik.c struct radeon_ring *ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 7167 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.ring_int[R600_RING_TYPE_DMA_INDEX])) { rdev 7172 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_DMA1_INDEX])) { rdev 7177 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[0] || rdev 7178 drivers/gpu/drm/radeon/cik.c atomic_read(&rdev->irq.pflip[0])) { rdev 7182 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[1] || rdev 7183 drivers/gpu/drm/radeon/cik.c atomic_read(&rdev->irq.pflip[1])) { rdev 7187 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[2] || rdev 7188 drivers/gpu/drm/radeon/cik.c atomic_read(&rdev->irq.pflip[2])) { rdev 7192 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[3] || rdev 7193 drivers/gpu/drm/radeon/cik.c atomic_read(&rdev->irq.pflip[3])) { rdev 7197 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[4] || rdev 7198 drivers/gpu/drm/radeon/cik.c atomic_read(&rdev->irq.pflip[4])) { rdev 7202 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[5] || rdev 7203 drivers/gpu/drm/radeon/cik.c atomic_read(&rdev->irq.pflip[5])) { rdev 7207 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[0]) { rdev 7211 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[1]) { rdev 7215 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[2]) { rdev 7219 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[3]) { rdev 7223 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[4]) { rdev 7227 drivers/gpu/drm/radeon/cik.c if (rdev->irq.hpd[5]) { rdev 7250 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 4) { rdev 7254 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 6) { rdev 7259 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 2) { rdev 7265 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 4) { rdev 7271 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 6) { rdev 7300 drivers/gpu/drm/radeon/cik.c static inline void cik_irq_ack(struct radeon_device *rdev) rdev 7304 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); rdev 7305 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE); rdev 7306 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE2); rdev 7307 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE3); rdev 7308 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE4); rdev 7309 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5); rdev 7310 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont6 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE6); rdev 7312 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d1grph_int = RREG32(GRPH_INT_STATUS + rdev 7314 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d2grph_int = RREG32(GRPH_INT_STATUS + rdev 7316 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 4) { rdev 7317 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d3grph_int = RREG32(GRPH_INT_STATUS + rdev 7319 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d4grph_int = RREG32(GRPH_INT_STATUS + rdev 7322 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 6) { rdev 7323 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d5grph_int = RREG32(GRPH_INT_STATUS + rdev 7325 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d6grph_int = RREG32(GRPH_INT_STATUS + rdev 7329 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d1grph_int & GRPH_PFLIP_INT_OCCURRED) rdev 7332 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d2grph_int & GRPH_PFLIP_INT_OCCURRED) rdev 7335 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) rdev 7337 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) rdev 7339 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VBLANK_INTERRUPT) rdev 7341 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VLINE_INTERRUPT) rdev 7344 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 4) { rdev 7345 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d3grph_int & GRPH_PFLIP_INT_OCCURRED) rdev 7348 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d4grph_int & GRPH_PFLIP_INT_OCCURRED) rdev 7351 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT) rdev 7353 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT) rdev 7355 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT) rdev 7357 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VLINE_INTERRUPT) rdev 7361 drivers/gpu/drm/radeon/cik.c if (rdev->num_crtc >= 6) { rdev 7362 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d5grph_int & GRPH_PFLIP_INT_OCCURRED) rdev 7365 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d6grph_int & GRPH_PFLIP_INT_OCCURRED) rdev 7368 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT) rdev 7370 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT) rdev 7372 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT) rdev 7374 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VLINE_INTERRUPT) rdev 7378 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { rdev 7383 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_INTERRUPT) { rdev 7388 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_INTERRUPT) { rdev 7393 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_INTERRUPT) { rdev 7398 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT) { rdev 7403 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT) { rdev 7408 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { rdev 7413 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_RX_INTERRUPT) { rdev 7418 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_RX_INTERRUPT) { rdev 7423 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_RX_INTERRUPT) { rdev 7428 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT) { rdev 7433 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) { rdev 7447 drivers/gpu/drm/radeon/cik.c static void cik_irq_disable(struct radeon_device *rdev) rdev 7449 drivers/gpu/drm/radeon/cik.c cik_disable_interrupts(rdev); rdev 7452 drivers/gpu/drm/radeon/cik.c cik_irq_ack(rdev); rdev 7453 drivers/gpu/drm/radeon/cik.c cik_disable_interrupt_state(rdev); rdev 7464 drivers/gpu/drm/radeon/cik.c static void cik_irq_suspend(struct radeon_device *rdev) rdev 7466 drivers/gpu/drm/radeon/cik.c cik_irq_disable(rdev); rdev 7467 drivers/gpu/drm/radeon/cik.c cik_rlc_stop(rdev); rdev 7479 drivers/gpu/drm/radeon/cik.c static void cik_irq_fini(struct radeon_device *rdev) rdev 7481 drivers/gpu/drm/radeon/cik.c cik_irq_suspend(rdev); rdev 7482 drivers/gpu/drm/radeon/cik.c r600_ih_ring_fini(rdev); rdev 7496 drivers/gpu/drm/radeon/cik.c static inline u32 cik_get_ih_wptr(struct radeon_device *rdev) rdev 7500 drivers/gpu/drm/radeon/cik.c if (rdev->wb.enabled) rdev 7501 drivers/gpu/drm/radeon/cik.c wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]); rdev 7511 drivers/gpu/drm/radeon/cik.c dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", rdev 7512 drivers/gpu/drm/radeon/cik.c wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask); rdev 7513 drivers/gpu/drm/radeon/cik.c rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask; rdev 7518 drivers/gpu/drm/radeon/cik.c return (wptr & rdev->ih.ptr_mask); rdev 7553 drivers/gpu/drm/radeon/cik.c int cik_irq_process(struct radeon_device *rdev) rdev 7555 drivers/gpu/drm/radeon/cik.c struct radeon_ring *cp1_ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 7556 drivers/gpu/drm/radeon/cik.c struct radeon_ring *cp2_ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 7568 drivers/gpu/drm/radeon/cik.c if (!rdev->ih.enabled || rdev->shutdown) rdev 7571 drivers/gpu/drm/radeon/cik.c wptr = cik_get_ih_wptr(rdev); rdev 7575 drivers/gpu/drm/radeon/cik.c if (atomic_xchg(&rdev->ih.lock, 1)) rdev 7578 drivers/gpu/drm/radeon/cik.c rptr = rdev->ih.rptr; rdev 7585 drivers/gpu/drm/radeon/cik.c cik_irq_ack(rdev); rdev 7591 drivers/gpu/drm/radeon/cik.c src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff; rdev 7592 drivers/gpu/drm/radeon/cik.c src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff; rdev 7593 drivers/gpu/drm/radeon/cik.c ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) & 0xff; rdev 7599 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)) rdev 7602 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[0]) { rdev 7603 drivers/gpu/drm/radeon/cik.c drm_handle_vblank(rdev->ddev, 0); rdev 7604 drivers/gpu/drm/radeon/cik.c rdev->pm.vblank_sync = true; rdev 7605 drivers/gpu/drm/radeon/cik.c wake_up(&rdev->irq.vblank_queue); rdev 7607 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.pflip[0])) rdev 7608 drivers/gpu/drm/radeon/cik.c radeon_crtc_handle_vblank(rdev, 0); rdev 7609 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; rdev 7614 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)) rdev 7617 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; rdev 7629 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VBLANK_INTERRUPT)) rdev 7632 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[1]) { rdev 7633 drivers/gpu/drm/radeon/cik.c drm_handle_vblank(rdev->ddev, 1); rdev 7634 drivers/gpu/drm/radeon/cik.c rdev->pm.vblank_sync = true; rdev 7635 drivers/gpu/drm/radeon/cik.c wake_up(&rdev->irq.vblank_queue); rdev 7637 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.pflip[1])) rdev 7638 drivers/gpu/drm/radeon/cik.c radeon_crtc_handle_vblank(rdev, 1); rdev 7639 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT; rdev 7644 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VLINE_INTERRUPT)) rdev 7647 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VLINE_INTERRUPT; rdev 7659 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT)) rdev 7662 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[2]) { rdev 7663 drivers/gpu/drm/radeon/cik.c drm_handle_vblank(rdev->ddev, 2); rdev 7664 drivers/gpu/drm/radeon/cik.c rdev->pm.vblank_sync = true; rdev 7665 drivers/gpu/drm/radeon/cik.c wake_up(&rdev->irq.vblank_queue); rdev 7667 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.pflip[2])) rdev 7668 drivers/gpu/drm/radeon/cik.c radeon_crtc_handle_vblank(rdev, 2); rdev 7669 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT; rdev 7674 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT)) rdev 7677 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VLINE_INTERRUPT; rdev 7689 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT)) rdev 7692 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[3]) { rdev 7693 drivers/gpu/drm/radeon/cik.c drm_handle_vblank(rdev->ddev, 3); rdev 7694 drivers/gpu/drm/radeon/cik.c rdev->pm.vblank_sync = true; rdev 7695 drivers/gpu/drm/radeon/cik.c wake_up(&rdev->irq.vblank_queue); rdev 7697 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.pflip[3])) rdev 7698 drivers/gpu/drm/radeon/cik.c radeon_crtc_handle_vblank(rdev, 3); rdev 7699 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT; rdev 7704 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VLINE_INTERRUPT)) rdev 7707 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VLINE_INTERRUPT; rdev 7719 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT)) rdev 7722 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[4]) { rdev 7723 drivers/gpu/drm/radeon/cik.c drm_handle_vblank(rdev->ddev, 4); rdev 7724 drivers/gpu/drm/radeon/cik.c rdev->pm.vblank_sync = true; rdev 7725 drivers/gpu/drm/radeon/cik.c wake_up(&rdev->irq.vblank_queue); rdev 7727 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.pflip[4])) rdev 7728 drivers/gpu/drm/radeon/cik.c radeon_crtc_handle_vblank(rdev, 4); rdev 7729 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT; rdev 7734 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT)) rdev 7737 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VLINE_INTERRUPT; rdev 7749 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT)) rdev 7752 drivers/gpu/drm/radeon/cik.c if (rdev->irq.crtc_vblank_int[5]) { rdev 7753 drivers/gpu/drm/radeon/cik.c drm_handle_vblank(rdev->ddev, 5); rdev 7754 drivers/gpu/drm/radeon/cik.c rdev->pm.vblank_sync = true; rdev 7755 drivers/gpu/drm/radeon/cik.c wake_up(&rdev->irq.vblank_queue); rdev 7757 drivers/gpu/drm/radeon/cik.c if (atomic_read(&rdev->irq.pflip[5])) rdev 7758 drivers/gpu/drm/radeon/cik.c radeon_crtc_handle_vblank(rdev, 5); rdev 7759 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT; rdev 7764 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VLINE_INTERRUPT)) rdev 7767 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VLINE_INTERRUPT; rdev 7784 drivers/gpu/drm/radeon/cik.c radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1); rdev 7789 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT)) rdev 7792 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~DC_HPD1_INTERRUPT; rdev 7798 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_INTERRUPT)) rdev 7801 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~DC_HPD2_INTERRUPT; rdev 7807 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_INTERRUPT)) rdev 7810 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~DC_HPD3_INTERRUPT; rdev 7816 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_INTERRUPT)) rdev 7819 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~DC_HPD4_INTERRUPT; rdev 7825 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT)) rdev 7828 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_INTERRUPT; rdev 7834 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT)) rdev 7837 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~DC_HPD6_INTERRUPT; rdev 7843 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT)) rdev 7846 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~DC_HPD1_RX_INTERRUPT; rdev 7852 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_RX_INTERRUPT)) rdev 7855 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~DC_HPD2_RX_INTERRUPT; rdev 7861 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_RX_INTERRUPT)) rdev 7864 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~DC_HPD3_RX_INTERRUPT; rdev 7870 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_RX_INTERRUPT)) rdev 7873 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~DC_HPD4_RX_INTERRUPT; rdev 7879 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT)) rdev 7882 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_RX_INTERRUPT; rdev 7888 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT)) rdev 7891 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~DC_HPD6_RX_INTERRUPT; rdev 7907 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); rdev 7918 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); rdev 7919 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", rdev 7921 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", rdev 7923 drivers/gpu/drm/radeon/cik.c cik_vm_decode_fault(rdev, status, addr, mc_client); rdev 7929 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, TN_RING_TYPE_VCE1_INDEX); rdev 7932 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, TN_RING_TYPE_VCE2_INDEX); rdev 7941 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 7951 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 7956 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX); rdev 7958 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP2_INDEX); rdev 8017 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, R600_RING_TYPE_DMA_INDEX); rdev 8030 drivers/gpu/drm/radeon/cik.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_DMA1_INDEX); rdev 8044 drivers/gpu/drm/radeon/cik.c rdev->pm.dpm.thermal.high_to_low = false; rdev 8049 drivers/gpu/drm/radeon/cik.c rdev->pm.dpm.thermal.high_to_low = true; rdev 8101 drivers/gpu/drm/radeon/cik.c rptr &= rdev->ih.ptr_mask; rdev 8105 drivers/gpu/drm/radeon/cik.c schedule_work(&rdev->dp_work); rdev 8107 drivers/gpu/drm/radeon/cik.c schedule_delayed_work(&rdev->hotplug_work, 0); rdev 8109 drivers/gpu/drm/radeon/cik.c rdev->needs_reset = true; rdev 8110 drivers/gpu/drm/radeon/cik.c wake_up_all(&rdev->fence_queue); rdev 8113 drivers/gpu/drm/radeon/cik.c schedule_work(&rdev->pm.dpm.thermal.work); rdev 8114 drivers/gpu/drm/radeon/cik.c rdev->ih.rptr = rptr; rdev 8115 drivers/gpu/drm/radeon/cik.c atomic_set(&rdev->ih.lock, 0); rdev 8118 drivers/gpu/drm/radeon/cik.c wptr = cik_get_ih_wptr(rdev); rdev 8128 drivers/gpu/drm/radeon/cik.c static void cik_uvd_init(struct radeon_device *rdev) rdev 8132 drivers/gpu/drm/radeon/cik.c if (!rdev->has_uvd) rdev 8135 drivers/gpu/drm/radeon/cik.c r = radeon_uvd_init(rdev); rdev 8137 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed UVD (%d) init.\n", r); rdev 8144 drivers/gpu/drm/radeon/cik.c rdev->has_uvd = 0; rdev 8147 drivers/gpu/drm/radeon/cik.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_obj = NULL; rdev 8148 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], 4096); rdev 8151 drivers/gpu/drm/radeon/cik.c static void cik_uvd_start(struct radeon_device *rdev) rdev 8155 drivers/gpu/drm/radeon/cik.c if (!rdev->has_uvd) rdev 8158 drivers/gpu/drm/radeon/cik.c r = radeon_uvd_resume(rdev); rdev 8160 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed UVD resume (%d).\n", r); rdev 8163 drivers/gpu/drm/radeon/cik.c r = uvd_v4_2_resume(rdev); rdev 8165 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed UVD 4.2 resume (%d).\n", r); rdev 8168 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_UVD_INDEX); rdev 8170 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing UVD fences (%d).\n", r); rdev 8176 drivers/gpu/drm/radeon/cik.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; rdev 8179 drivers/gpu/drm/radeon/cik.c static void cik_uvd_resume(struct radeon_device *rdev) rdev 8184 drivers/gpu/drm/radeon/cik.c if (!rdev->has_uvd || !rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size) rdev 8187 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 8188 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, PACKET0(UVD_NO_OP, 0)); rdev 8190 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing UVD ring (%d).\n", r); rdev 8193 drivers/gpu/drm/radeon/cik.c r = uvd_v1_0_init(rdev); rdev 8195 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing UVD (%d).\n", r); rdev 8200 drivers/gpu/drm/radeon/cik.c static void cik_vce_init(struct radeon_device *rdev) rdev 8204 drivers/gpu/drm/radeon/cik.c if (!rdev->has_vce) rdev 8207 drivers/gpu/drm/radeon/cik.c r = radeon_vce_init(rdev); rdev 8209 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed VCE (%d) init.\n", r); rdev 8216 drivers/gpu/drm/radeon/cik.c rdev->has_vce = 0; rdev 8219 drivers/gpu/drm/radeon/cik.c rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_obj = NULL; rdev 8220 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE1_INDEX], 4096); rdev 8221 drivers/gpu/drm/radeon/cik.c rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_obj = NULL; rdev 8222 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE2_INDEX], 4096); rdev 8225 drivers/gpu/drm/radeon/cik.c static void cik_vce_start(struct radeon_device *rdev) rdev 8229 drivers/gpu/drm/radeon/cik.c if (!rdev->has_vce) rdev 8232 drivers/gpu/drm/radeon/cik.c r = radeon_vce_resume(rdev); rdev 8234 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed VCE resume (%d).\n", r); rdev 8237 drivers/gpu/drm/radeon/cik.c r = vce_v2_0_resume(rdev); rdev 8239 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed VCE resume (%d).\n", r); rdev 8242 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE1_INDEX); rdev 8244 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing VCE1 fences (%d).\n", r); rdev 8247 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE2_INDEX); rdev 8249 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing VCE2 fences (%d).\n", r); rdev 8255 drivers/gpu/drm/radeon/cik.c rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size = 0; rdev 8256 drivers/gpu/drm/radeon/cik.c rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_size = 0; rdev 8259 drivers/gpu/drm/radeon/cik.c static void cik_vce_resume(struct radeon_device *rdev) rdev 8264 drivers/gpu/drm/radeon/cik.c if (!rdev->has_vce || !rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size) rdev 8267 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; rdev 8268 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, VCE_CMD_NO_OP); rdev 8270 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); rdev 8273 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; rdev 8274 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, VCE_CMD_NO_OP); rdev 8276 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); rdev 8279 drivers/gpu/drm/radeon/cik.c r = vce_v1_0_init(rdev); rdev 8281 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing VCE (%d).\n", r); rdev 8295 drivers/gpu/drm/radeon/cik.c static int cik_startup(struct radeon_device *rdev) rdev 8302 drivers/gpu/drm/radeon/cik.c cik_pcie_gen3_enable(rdev); rdev 8304 drivers/gpu/drm/radeon/cik.c cik_program_aspm(rdev); rdev 8307 drivers/gpu/drm/radeon/cik.c r = r600_vram_scratch_init(rdev); rdev 8311 drivers/gpu/drm/radeon/cik.c cik_mc_program(rdev); rdev 8313 drivers/gpu/drm/radeon/cik.c if (!(rdev->flags & RADEON_IS_IGP) && !rdev->pm.dpm_enabled) { rdev 8314 drivers/gpu/drm/radeon/cik.c r = ci_mc_load_microcode(rdev); rdev 8321 drivers/gpu/drm/radeon/cik.c r = cik_pcie_gart_enable(rdev); rdev 8324 drivers/gpu/drm/radeon/cik.c cik_gpu_init(rdev); rdev 8327 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) { rdev 8328 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_KAVERI) { rdev 8329 drivers/gpu/drm/radeon/cik.c rdev->rlc.reg_list = spectre_rlc_save_restore_register_list; rdev 8330 drivers/gpu/drm/radeon/cik.c rdev->rlc.reg_list_size = rdev 8333 drivers/gpu/drm/radeon/cik.c rdev->rlc.reg_list = kalindi_rlc_save_restore_register_list; rdev 8334 drivers/gpu/drm/radeon/cik.c rdev->rlc.reg_list_size = rdev 8338 drivers/gpu/drm/radeon/cik.c rdev->rlc.cs_data = ci_cs_data; rdev 8339 drivers/gpu/drm/radeon/cik.c rdev->rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */ rdev 8340 drivers/gpu/drm/radeon/cik.c rdev->rlc.cp_table_size += 64 * 1024; /* GDS */ rdev 8341 drivers/gpu/drm/radeon/cik.c r = sumo_rlc_init(rdev); rdev 8348 drivers/gpu/drm/radeon/cik.c r = radeon_wb_init(rdev); rdev 8353 drivers/gpu/drm/radeon/cik.c r = cik_mec_init(rdev); rdev 8359 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 8361 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 8365 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP1_INDEX); rdev 8367 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 8371 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP2_INDEX); rdev 8373 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 8377 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_DMA_INDEX); rdev 8379 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 8383 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_DMA1_INDEX); rdev 8385 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 8389 drivers/gpu/drm/radeon/cik.c cik_uvd_start(rdev); rdev 8390 drivers/gpu/drm/radeon/cik.c cik_vce_start(rdev); rdev 8393 drivers/gpu/drm/radeon/cik.c if (!rdev->irq.installed) { rdev 8394 drivers/gpu/drm/radeon/cik.c r = radeon_irq_kms_init(rdev); rdev 8399 drivers/gpu/drm/radeon/cik.c r = cik_irq_init(rdev); rdev 8402 drivers/gpu/drm/radeon/cik.c radeon_irq_kms_fini(rdev); rdev 8405 drivers/gpu/drm/radeon/cik.c cik_irq_set(rdev); rdev 8407 drivers/gpu/drm/radeon/cik.c if (rdev->family == CHIP_HAWAII) { rdev 8408 drivers/gpu/drm/radeon/cik.c if (rdev->new_fw) rdev 8416 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 8417 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, rdev 8424 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 8425 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, rdev 8435 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 8436 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, rdev 8446 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 8447 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, rdev 8452 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 8453 drivers/gpu/drm/radeon/cik.c r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, rdev 8458 drivers/gpu/drm/radeon/cik.c r = cik_cp_resume(rdev); rdev 8462 drivers/gpu/drm/radeon/cik.c r = cik_sdma_resume(rdev); rdev 8466 drivers/gpu/drm/radeon/cik.c cik_uvd_resume(rdev); rdev 8467 drivers/gpu/drm/radeon/cik.c cik_vce_resume(rdev); rdev 8469 drivers/gpu/drm/radeon/cik.c r = radeon_ib_pool_init(rdev); rdev 8471 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 8475 drivers/gpu/drm/radeon/cik.c r = radeon_vm_manager_init(rdev); rdev 8477 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "vm manager initialization failed (%d).\n", r); rdev 8481 drivers/gpu/drm/radeon/cik.c r = radeon_audio_init(rdev); rdev 8497 drivers/gpu/drm/radeon/cik.c int cik_resume(struct radeon_device *rdev) rdev 8502 drivers/gpu/drm/radeon/cik.c atom_asic_init(rdev->mode_info.atom_context); rdev 8505 drivers/gpu/drm/radeon/cik.c cik_init_golden_registers(rdev); rdev 8507 drivers/gpu/drm/radeon/cik.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 8508 drivers/gpu/drm/radeon/cik.c radeon_pm_resume(rdev); rdev 8510 drivers/gpu/drm/radeon/cik.c rdev->accel_working = true; rdev 8511 drivers/gpu/drm/radeon/cik.c r = cik_startup(rdev); rdev 8514 drivers/gpu/drm/radeon/cik.c rdev->accel_working = false; rdev 8531 drivers/gpu/drm/radeon/cik.c int cik_suspend(struct radeon_device *rdev) rdev 8533 drivers/gpu/drm/radeon/cik.c radeon_pm_suspend(rdev); rdev 8534 drivers/gpu/drm/radeon/cik.c radeon_audio_fini(rdev); rdev 8535 drivers/gpu/drm/radeon/cik.c radeon_vm_manager_fini(rdev); rdev 8536 drivers/gpu/drm/radeon/cik.c cik_cp_enable(rdev, false); rdev 8537 drivers/gpu/drm/radeon/cik.c cik_sdma_enable(rdev, false); rdev 8538 drivers/gpu/drm/radeon/cik.c if (rdev->has_uvd) { rdev 8539 drivers/gpu/drm/radeon/cik.c uvd_v1_0_fini(rdev); rdev 8540 drivers/gpu/drm/radeon/cik.c radeon_uvd_suspend(rdev); rdev 8542 drivers/gpu/drm/radeon/cik.c if (rdev->has_vce) rdev 8543 drivers/gpu/drm/radeon/cik.c radeon_vce_suspend(rdev); rdev 8544 drivers/gpu/drm/radeon/cik.c cik_fini_pg(rdev); rdev 8545 drivers/gpu/drm/radeon/cik.c cik_fini_cg(rdev); rdev 8546 drivers/gpu/drm/radeon/cik.c cik_irq_suspend(rdev); rdev 8547 drivers/gpu/drm/radeon/cik.c radeon_wb_disable(rdev); rdev 8548 drivers/gpu/drm/radeon/cik.c cik_pcie_gart_disable(rdev); rdev 8568 drivers/gpu/drm/radeon/cik.c int cik_init(struct radeon_device *rdev) rdev 8574 drivers/gpu/drm/radeon/cik.c if (!radeon_get_bios(rdev)) { rdev 8575 drivers/gpu/drm/radeon/cik.c if (ASIC_IS_AVIVO(rdev)) rdev 8579 drivers/gpu/drm/radeon/cik.c if (!rdev->is_atom_bios) { rdev 8580 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "Expecting atombios for cayman GPU\n"); rdev 8583 drivers/gpu/drm/radeon/cik.c r = radeon_atombios_init(rdev); rdev 8588 drivers/gpu/drm/radeon/cik.c if (!radeon_card_posted(rdev)) { rdev 8589 drivers/gpu/drm/radeon/cik.c if (!rdev->bios) { rdev 8590 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); rdev 8594 drivers/gpu/drm/radeon/cik.c atom_asic_init(rdev->mode_info.atom_context); rdev 8597 drivers/gpu/drm/radeon/cik.c cik_init_golden_registers(rdev); rdev 8599 drivers/gpu/drm/radeon/cik.c cik_scratch_init(rdev); rdev 8601 drivers/gpu/drm/radeon/cik.c radeon_surface_init(rdev); rdev 8603 drivers/gpu/drm/radeon/cik.c radeon_get_clock_info(rdev->ddev); rdev 8606 drivers/gpu/drm/radeon/cik.c r = radeon_fence_driver_init(rdev); rdev 8611 drivers/gpu/drm/radeon/cik.c r = cik_mc_init(rdev); rdev 8615 drivers/gpu/drm/radeon/cik.c r = radeon_bo_init(rdev); rdev 8619 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) { rdev 8620 drivers/gpu/drm/radeon/cik.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw || rdev 8621 drivers/gpu/drm/radeon/cik.c !rdev->mec_fw || !rdev->sdma_fw || !rdev->rlc_fw) { rdev 8622 drivers/gpu/drm/radeon/cik.c r = cik_init_microcode(rdev); rdev 8629 drivers/gpu/drm/radeon/cik.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw || rdev 8630 drivers/gpu/drm/radeon/cik.c !rdev->mec_fw || !rdev->sdma_fw || !rdev->rlc_fw || rdev 8631 drivers/gpu/drm/radeon/cik.c !rdev->mc_fw) { rdev 8632 drivers/gpu/drm/radeon/cik.c r = cik_init_microcode(rdev); rdev 8641 drivers/gpu/drm/radeon/cik.c radeon_pm_init(rdev); rdev 8643 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 8645 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, ring, 1024 * 1024); rdev 8647 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 8649 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, ring, 1024 * 1024); rdev 8650 drivers/gpu/drm/radeon/cik.c r = radeon_doorbell_get(rdev, &ring->doorbell_index); rdev 8654 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 8656 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, ring, 1024 * 1024); rdev 8657 drivers/gpu/drm/radeon/cik.c r = radeon_doorbell_get(rdev, &ring->doorbell_index); rdev 8661 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 8663 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, ring, 256 * 1024); rdev 8665 drivers/gpu/drm/radeon/cik.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 8667 drivers/gpu/drm/radeon/cik.c r600_ring_init(rdev, ring, 256 * 1024); rdev 8669 drivers/gpu/drm/radeon/cik.c cik_uvd_init(rdev); rdev 8670 drivers/gpu/drm/radeon/cik.c cik_vce_init(rdev); rdev 8672 drivers/gpu/drm/radeon/cik.c rdev->ih.ring_obj = NULL; rdev 8673 drivers/gpu/drm/radeon/cik.c r600_ih_ring_init(rdev, 64 * 1024); rdev 8675 drivers/gpu/drm/radeon/cik.c r = r600_pcie_gart_init(rdev); rdev 8679 drivers/gpu/drm/radeon/cik.c rdev->accel_working = true; rdev 8680 drivers/gpu/drm/radeon/cik.c r = cik_startup(rdev); rdev 8682 drivers/gpu/drm/radeon/cik.c dev_err(rdev->dev, "disabling GPU acceleration\n"); rdev 8683 drivers/gpu/drm/radeon/cik.c cik_cp_fini(rdev); rdev 8684 drivers/gpu/drm/radeon/cik.c cik_sdma_fini(rdev); rdev 8685 drivers/gpu/drm/radeon/cik.c cik_irq_fini(rdev); rdev 8686 drivers/gpu/drm/radeon/cik.c sumo_rlc_fini(rdev); rdev 8687 drivers/gpu/drm/radeon/cik.c cik_mec_fini(rdev); rdev 8688 drivers/gpu/drm/radeon/cik.c radeon_wb_fini(rdev); rdev 8689 drivers/gpu/drm/radeon/cik.c radeon_ib_pool_fini(rdev); rdev 8690 drivers/gpu/drm/radeon/cik.c radeon_vm_manager_fini(rdev); rdev 8691 drivers/gpu/drm/radeon/cik.c radeon_irq_kms_fini(rdev); rdev 8692 drivers/gpu/drm/radeon/cik.c cik_pcie_gart_fini(rdev); rdev 8693 drivers/gpu/drm/radeon/cik.c rdev->accel_working = false; rdev 8700 drivers/gpu/drm/radeon/cik.c if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) { rdev 8717 drivers/gpu/drm/radeon/cik.c void cik_fini(struct radeon_device *rdev) rdev 8719 drivers/gpu/drm/radeon/cik.c radeon_pm_fini(rdev); rdev 8720 drivers/gpu/drm/radeon/cik.c cik_cp_fini(rdev); rdev 8721 drivers/gpu/drm/radeon/cik.c cik_sdma_fini(rdev); rdev 8722 drivers/gpu/drm/radeon/cik.c cik_fini_pg(rdev); rdev 8723 drivers/gpu/drm/radeon/cik.c cik_fini_cg(rdev); rdev 8724 drivers/gpu/drm/radeon/cik.c cik_irq_fini(rdev); rdev 8725 drivers/gpu/drm/radeon/cik.c sumo_rlc_fini(rdev); rdev 8726 drivers/gpu/drm/radeon/cik.c cik_mec_fini(rdev); rdev 8727 drivers/gpu/drm/radeon/cik.c radeon_wb_fini(rdev); rdev 8728 drivers/gpu/drm/radeon/cik.c radeon_vm_manager_fini(rdev); rdev 8729 drivers/gpu/drm/radeon/cik.c radeon_ib_pool_fini(rdev); rdev 8730 drivers/gpu/drm/radeon/cik.c radeon_irq_kms_fini(rdev); rdev 8731 drivers/gpu/drm/radeon/cik.c uvd_v1_0_fini(rdev); rdev 8732 drivers/gpu/drm/radeon/cik.c radeon_uvd_fini(rdev); rdev 8733 drivers/gpu/drm/radeon/cik.c radeon_vce_fini(rdev); rdev 8734 drivers/gpu/drm/radeon/cik.c cik_pcie_gart_fini(rdev); rdev 8735 drivers/gpu/drm/radeon/cik.c r600_vram_scratch_fini(rdev); rdev 8736 drivers/gpu/drm/radeon/cik.c radeon_gem_fini(rdev); rdev 8737 drivers/gpu/drm/radeon/cik.c radeon_fence_driver_fini(rdev); rdev 8738 drivers/gpu/drm/radeon/cik.c radeon_bo_fini(rdev); rdev 8739 drivers/gpu/drm/radeon/cik.c radeon_atombios_fini(rdev); rdev 8740 drivers/gpu/drm/radeon/cik.c kfree(rdev->bios); rdev 8741 drivers/gpu/drm/radeon/cik.c rdev->bios = NULL; rdev 8747 drivers/gpu/drm/radeon/cik.c struct radeon_device *rdev = dev->dev_private; rdev 8821 drivers/gpu/drm/radeon/cik.c static u32 dce8_line_buffer_adjust(struct radeon_device *rdev, rdev 8844 drivers/gpu/drm/radeon/cik.c buffer_alloc = (rdev->flags & RADEON_IS_IGP) ? 2 : 4; rdev 8848 drivers/gpu/drm/radeon/cik.c buffer_alloc = (rdev->flags & RADEON_IS_IGP) ? 2 : 4; rdev 8860 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 8892 drivers/gpu/drm/radeon/cik.c static u32 cik_get_number_of_dram_channels(struct radeon_device *rdev) rdev 9250 drivers/gpu/drm/radeon/cik.c static void dce8_program_watermarks(struct radeon_device *rdev, rdev 9269 drivers/gpu/drm/radeon/cik.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev 9270 drivers/gpu/drm/radeon/cik.c rdev->pm.dpm_enabled) { rdev 9272 drivers/gpu/drm/radeon/cik.c radeon_dpm_get_mclk(rdev, false) * 10; rdev 9274 drivers/gpu/drm/radeon/cik.c radeon_dpm_get_sclk(rdev, false) * 10; rdev 9276 drivers/gpu/drm/radeon/cik.c wm_high.yclk = rdev->pm.current_mclk * 10; rdev 9277 drivers/gpu/drm/radeon/cik.c wm_high.sclk = rdev->pm.current_sclk * 10; rdev 9293 drivers/gpu/drm/radeon/cik.c wm_high.dram_channels = cik_get_number_of_dram_channels(rdev); rdev 9304 drivers/gpu/drm/radeon/cik.c (rdev->disp_priority == 2)) { rdev 9309 drivers/gpu/drm/radeon/cik.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev 9310 drivers/gpu/drm/radeon/cik.c rdev->pm.dpm_enabled) { rdev 9312 drivers/gpu/drm/radeon/cik.c radeon_dpm_get_mclk(rdev, true) * 10; rdev 9314 drivers/gpu/drm/radeon/cik.c radeon_dpm_get_sclk(rdev, true) * 10; rdev 9316 drivers/gpu/drm/radeon/cik.c wm_low.yclk = rdev->pm.current_mclk * 10; rdev 9317 drivers/gpu/drm/radeon/cik.c wm_low.sclk = rdev->pm.current_sclk * 10; rdev 9333 drivers/gpu/drm/radeon/cik.c wm_low.dram_channels = cik_get_number_of_dram_channels(rdev); rdev 9344 drivers/gpu/drm/radeon/cik.c (rdev->disp_priority == 2)) { rdev 9386 drivers/gpu/drm/radeon/cik.c void dce8_bandwidth_update(struct radeon_device *rdev) rdev 9392 drivers/gpu/drm/radeon/cik.c if (!rdev->mode_info.mode_config_initialized) rdev 9395 drivers/gpu/drm/radeon/cik.c radeon_update_display_priority(rdev); rdev 9397 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->num_crtc; i++) { rdev 9398 drivers/gpu/drm/radeon/cik.c if (rdev->mode_info.crtcs[i]->base.enabled) rdev 9401 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->num_crtc; i++) { rdev 9402 drivers/gpu/drm/radeon/cik.c mode = &rdev->mode_info.crtcs[i]->base.mode; rdev 9403 drivers/gpu/drm/radeon/cik.c lb_size = dce8_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode); rdev 9404 drivers/gpu/drm/radeon/cik.c dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); rdev 9416 drivers/gpu/drm/radeon/cik.c uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev) rdev 9420 drivers/gpu/drm/radeon/cik.c mutex_lock(&rdev->gpu_clock_mutex); rdev 9424 drivers/gpu/drm/radeon/cik.c mutex_unlock(&rdev->gpu_clock_mutex); rdev 9428 drivers/gpu/drm/radeon/cik.c static int cik_set_uvd_clock(struct radeon_device *rdev, u32 clock, rdev 9435 drivers/gpu/drm/radeon/cik.c r = radeon_atom_get_clock_dividers(rdev, COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK, rdev 9456 drivers/gpu/drm/radeon/cik.c int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) rdev 9460 drivers/gpu/drm/radeon/cik.c r = cik_set_uvd_clock(rdev, vclk, CG_VCLK_CNTL, CG_VCLK_STATUS); rdev 9464 drivers/gpu/drm/radeon/cik.c r = cik_set_uvd_clock(rdev, dclk, CG_DCLK_CNTL, CG_DCLK_STATUS); rdev 9468 drivers/gpu/drm/radeon/cik.c int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) rdev 9474 drivers/gpu/drm/radeon/cik.c r = radeon_atom_get_clock_dividers(rdev, COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK, rdev 9503 drivers/gpu/drm/radeon/cik.c static void cik_pcie_gen3_enable(struct radeon_device *rdev) rdev 9505 drivers/gpu/drm/radeon/cik.c struct pci_dev *root = rdev->pdev->bus->self; rdev 9512 drivers/gpu/drm/radeon/cik.c if (pci_is_root_bus(rdev->pdev->bus)) rdev 9518 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) rdev 9521 drivers/gpu/drm/radeon/cik.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 9553 drivers/gpu/drm/radeon/cik.c gpu_pos = pci_pcie_cap(rdev->pdev); rdev 9565 drivers/gpu/drm/radeon/cik.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); rdev 9571 drivers/gpu/drm/radeon/cik.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); rdev 9589 drivers/gpu/drm/radeon/cik.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_DEVSTA, &tmp16); rdev 9594 drivers/gpu/drm/radeon/cik.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); rdev 9597 drivers/gpu/drm/radeon/cik.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &gpu_cfg2); rdev 9615 drivers/gpu/drm/radeon/cik.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &tmp16); rdev 9618 drivers/gpu/drm/radeon/cik.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); rdev 9626 drivers/gpu/drm/radeon/cik.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); rdev 9629 drivers/gpu/drm/radeon/cik.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); rdev 9643 drivers/gpu/drm/radeon/cik.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); rdev 9651 drivers/gpu/drm/radeon/cik.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); rdev 9657 drivers/gpu/drm/radeon/cik.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 9665 drivers/gpu/drm/radeon/cik.c static void cik_program_aspm(struct radeon_device *rdev) rdev 9675 drivers/gpu/drm/radeon/cik.c if (rdev->flags & RADEON_IS_IGP) rdev 9678 drivers/gpu/drm/radeon/cik.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 9743 drivers/gpu/drm/radeon/cik.c !pci_is_root_bus(rdev->pdev->bus)) { rdev 9744 drivers/gpu/drm/radeon/cik.c struct pci_dev *root = rdev->pdev->bus->self; rdev 36 drivers/gpu/drm/radeon/cik_sdma.c u32 cik_gpu_check_soft_reset(struct radeon_device *rdev); rdev 63 drivers/gpu/drm/radeon/cik_sdma.c uint32_t cik_sdma_get_rptr(struct radeon_device *rdev, rdev 68 drivers/gpu/drm/radeon/cik_sdma.c if (rdev->wb.enabled) { rdev 69 drivers/gpu/drm/radeon/cik_sdma.c rptr = rdev->wb.wb[ring->rptr_offs/4]; rdev 90 drivers/gpu/drm/radeon/cik_sdma.c uint32_t cik_sdma_get_wptr(struct radeon_device *rdev, rdev 111 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_set_wptr(struct radeon_device *rdev, rdev 133 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_ring_ib_execute(struct radeon_device *rdev, rdev 136 drivers/gpu/drm/radeon/cik_sdma.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 139 drivers/gpu/drm/radeon/cik_sdma.c if (rdev->wb.enabled) { rdev 169 drivers/gpu/drm/radeon/cik_sdma.c static void cik_sdma_hdp_flush_ring_emit(struct radeon_device *rdev, rdev 172 drivers/gpu/drm/radeon/cik_sdma.c struct radeon_ring *ring = &rdev->ring[ridx]; rdev 200 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_fence_ring_emit(struct radeon_device *rdev, rdev 203 drivers/gpu/drm/radeon/cik_sdma.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 204 drivers/gpu/drm/radeon/cik_sdma.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 214 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_hdp_flush_ring_emit(rdev, fence->ring); rdev 228 drivers/gpu/drm/radeon/cik_sdma.c bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, rdev 250 drivers/gpu/drm/radeon/cik_sdma.c static void cik_sdma_gfx_stop(struct radeon_device *rdev) rdev 255 drivers/gpu/drm/radeon/cik_sdma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || rdev 256 drivers/gpu/drm/radeon/cik_sdma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) rdev 257 drivers/gpu/drm/radeon/cik_sdma.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 269 drivers/gpu/drm/radeon/cik_sdma.c rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; rdev 270 drivers/gpu/drm/radeon/cik_sdma.c rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX].ready = false; rdev 291 drivers/gpu/drm/radeon/cik_sdma.c static void cik_sdma_rlc_stop(struct radeon_device *rdev) rdev 304 drivers/gpu/drm/radeon/cik_sdma.c static void cik_sdma_ctx_switch_enable(struct radeon_device *rdev, bool enable) rdev 331 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_enable(struct radeon_device *rdev, bool enable) rdev 337 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_gfx_stop(rdev); rdev 338 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_rlc_stop(rdev); rdev 354 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_ctx_switch_enable(rdev, enable); rdev 365 drivers/gpu/drm/radeon/cik_sdma.c static int cik_sdma_gfx_resume(struct radeon_device *rdev) rdev 375 drivers/gpu/drm/radeon/cik_sdma.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 379 drivers/gpu/drm/radeon/cik_sdma.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 401 drivers/gpu/drm/radeon/cik_sdma.c upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); rdev 403 drivers/gpu/drm/radeon/cik_sdma.c ((rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC)); rdev 405 drivers/gpu/drm/radeon/cik_sdma.c if (rdev->wb.enabled) rdev 426 drivers/gpu/drm/radeon/cik_sdma.c r = radeon_ring_test(rdev, ring->idx, ring); rdev 433 drivers/gpu/drm/radeon/cik_sdma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || rdev 434 drivers/gpu/drm/radeon/cik_sdma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) rdev 435 drivers/gpu/drm/radeon/cik_sdma.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 448 drivers/gpu/drm/radeon/cik_sdma.c static int cik_sdma_rlc_resume(struct radeon_device *rdev) rdev 462 drivers/gpu/drm/radeon/cik_sdma.c static int cik_sdma_load_microcode(struct radeon_device *rdev) rdev 466 drivers/gpu/drm/radeon/cik_sdma.c if (!rdev->sdma_fw) rdev 470 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_enable(rdev, false); rdev 472 drivers/gpu/drm/radeon/cik_sdma.c if (rdev->new_fw) { rdev 474 drivers/gpu/drm/radeon/cik_sdma.c (const struct sdma_firmware_header_v1_0 *)rdev->sdma_fw->data; rdev 482 drivers/gpu/drm/radeon/cik_sdma.c (rdev->sdma_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 491 drivers/gpu/drm/radeon/cik_sdma.c (rdev->sdma_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 501 drivers/gpu/drm/radeon/cik_sdma.c fw_data = (const __be32 *)rdev->sdma_fw->data; rdev 508 drivers/gpu/drm/radeon/cik_sdma.c fw_data = (const __be32 *)rdev->sdma_fw->data; rdev 528 drivers/gpu/drm/radeon/cik_sdma.c int cik_sdma_resume(struct radeon_device *rdev) rdev 532 drivers/gpu/drm/radeon/cik_sdma.c r = cik_sdma_load_microcode(rdev); rdev 537 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_enable(rdev, true); rdev 540 drivers/gpu/drm/radeon/cik_sdma.c r = cik_sdma_gfx_resume(rdev); rdev 543 drivers/gpu/drm/radeon/cik_sdma.c r = cik_sdma_rlc_resume(rdev); rdev 557 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_fini(struct radeon_device *rdev) rdev 560 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_enable(rdev, false); rdev 561 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX]); rdev 562 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_fini(rdev, &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]); rdev 579 drivers/gpu/drm/radeon/cik_sdma.c struct radeon_fence *cik_copy_dma(struct radeon_device *rdev, rdev 586 drivers/gpu/drm/radeon/cik_sdma.c int ring_index = rdev->asic->copy.dma_ring_index; rdev 587 drivers/gpu/drm/radeon/cik_sdma.c struct radeon_ring *ring = &rdev->ring[ring_index]; rdev 596 drivers/gpu/drm/radeon/cik_sdma.c r = radeon_ring_lock(rdev, ring, num_loops * 7 + 14); rdev 599 drivers/gpu/drm/radeon/cik_sdma.c radeon_sync_free(rdev, &sync, NULL); rdev 603 drivers/gpu/drm/radeon/cik_sdma.c radeon_sync_resv(rdev, &sync, resv, false); rdev 604 drivers/gpu/drm/radeon/cik_sdma.c radeon_sync_rings(rdev, &sync, ring->idx); rdev 622 drivers/gpu/drm/radeon/cik_sdma.c r = radeon_fence_emit(rdev, &fence, ring->idx); rdev 624 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_unlock_undo(rdev, ring); rdev 625 drivers/gpu/drm/radeon/cik_sdma.c radeon_sync_free(rdev, &sync, NULL); rdev 629 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_unlock_commit(rdev, ring, false); rdev 630 drivers/gpu/drm/radeon/cik_sdma.c radeon_sync_free(rdev, &sync, fence); rdev 645 drivers/gpu/drm/radeon/cik_sdma.c int cik_sdma_ring_test(struct radeon_device *rdev, rdev 659 drivers/gpu/drm/radeon/cik_sdma.c gpu_addr = rdev->wb.gpu_addr + index; rdev 662 drivers/gpu/drm/radeon/cik_sdma.c rdev->wb.wb[index/4] = cpu_to_le32(tmp); rdev 664 drivers/gpu/drm/radeon/cik_sdma.c r = radeon_ring_lock(rdev, ring, 5); rdev 674 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_unlock_commit(rdev, ring, false); rdev 676 drivers/gpu/drm/radeon/cik_sdma.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 677 drivers/gpu/drm/radeon/cik_sdma.c tmp = le32_to_cpu(rdev->wb.wb[index/4]); rdev 683 drivers/gpu/drm/radeon/cik_sdma.c if (i < rdev->usec_timeout) { rdev 702 drivers/gpu/drm/radeon/cik_sdma.c int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 716 drivers/gpu/drm/radeon/cik_sdma.c gpu_addr = rdev->wb.gpu_addr + index; rdev 719 drivers/gpu/drm/radeon/cik_sdma.c rdev->wb.wb[index/4] = cpu_to_le32(tmp); rdev 721 drivers/gpu/drm/radeon/cik_sdma.c r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); rdev 734 drivers/gpu/drm/radeon/cik_sdma.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 736 drivers/gpu/drm/radeon/cik_sdma.c radeon_ib_free(rdev, &ib); rdev 750 drivers/gpu/drm/radeon/cik_sdma.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 751 drivers/gpu/drm/radeon/cik_sdma.c tmp = le32_to_cpu(rdev->wb.wb[index/4]); rdev 756 drivers/gpu/drm/radeon/cik_sdma.c if (i < rdev->usec_timeout) { rdev 762 drivers/gpu/drm/radeon/cik_sdma.c radeon_ib_free(rdev, &ib); rdev 775 drivers/gpu/drm/radeon/cik_sdma.c bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 777 drivers/gpu/drm/radeon/cik_sdma.c u32 reset_mask = cik_gpu_check_soft_reset(rdev); rdev 786 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_lockup_update(rdev, ring); rdev 789 drivers/gpu/drm/radeon/cik_sdma.c return radeon_ring_test_lockup(rdev, ring); rdev 803 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_vm_copy_pages(struct radeon_device *rdev, rdev 841 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_vm_write_pages(struct radeon_device *rdev, rdev 863 drivers/gpu/drm/radeon/cik_sdma.c value = radeon_vm_map_gart(rdev, addr); rdev 890 drivers/gpu/drm/radeon/cik_sdma.c void cik_sdma_vm_set_pages(struct radeon_device *rdev, rdev 947 drivers/gpu/drm/radeon/cik_sdma.c void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 987 drivers/gpu/drm/radeon/cik_sdma.c cik_sdma_hdp_flush_ring_emit(rdev, ring->idx); rdev 47 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); rdev 48 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); rdev 50 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 53 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 87 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_enable_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 90 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_bif_dynamic_pcie_gen2(rdev, enable); rdev 99 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_enter_ulp_state(struct radeon_device *rdev) rdev 101 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 120 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_gfx_clock_gating_enable(struct radeon_device *rdev, rdev 123 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 172 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_mg_clock_gating_enable(struct radeon_device *rdev, rdev 175 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 176 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 181 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->family == CHIP_CEDAR) rdev 183 drivers/gpu/drm/radeon/cypress_dpm.c else if (rdev->family == CHIP_REDWOOD) rdev 221 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_enable_spread_spectrum(struct radeon_device *rdev, rdev 224 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 240 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_start_dpm(struct radeon_device *rdev) rdev 245 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_enable_sclk_control(struct radeon_device *rdev, rdev 254 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_enable_mclk_control(struct radeon_device *rdev, rdev 263 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_notify_smc_display_change(struct radeon_device *rdev, rdev 269 drivers/gpu/drm/radeon/cypress_dpm.c if (rv770_send_msg_to_smc(rdev, msg) != PPSMC_Result_OK) rdev 275 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_program_response_times(struct radeon_device *rdev) rdev 280 drivers/gpu/drm/radeon/cypress_dpm.c reference_clock = radeon_get_xclk(rdev); rdev 283 drivers/gpu/drm/radeon/cypress_dpm.c rv770_write_smc_soft_register(rdev, rdev 287 drivers/gpu/drm/radeon/cypress_dpm.c rv770_write_smc_soft_register(rdev, rdev 290 drivers/gpu/drm/radeon/cypress_dpm.c rv770_write_smc_soft_register(rdev, rdev 293 drivers/gpu/drm/radeon/cypress_dpm.c rv770_program_response_times(rdev); rdev 295 drivers/gpu/drm/radeon/cypress_dpm.c if (ASIC_IS_LOMBOK(rdev)) rdev 296 drivers/gpu/drm/radeon/cypress_dpm.c rv770_write_smc_soft_register(rdev, rdev 301 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_pcie_performance_request(struct radeon_device *rdev, rdev 305 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 318 drivers/gpu/drm/radeon/cypress_dpm.c return radeon_acpi_pcie_performance_request(rdev, perf_req, advertise); rdev 322 drivers/gpu/drm/radeon/cypress_dpm.c return radeon_acpi_pcie_performance_request(rdev, perf_req, advertise); rdev 329 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_advertise_gen2_capability(struct radeon_device *rdev) rdev 331 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 335 drivers/gpu/drm/radeon/cypress_dpm.c radeon_acpi_pcie_notify_device_ready(rdev); rdev 347 drivers/gpu/drm/radeon/cypress_dpm.c cypress_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, true); rdev 360 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_notify_link_speed_change_after_state_change(struct radeon_device *rdev, rdev 378 drivers/gpu/drm/radeon/cypress_dpm.c cypress_pcie_performance_request(rdev, request, false); rdev 382 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_notify_link_speed_change_before_state_change(struct radeon_device *rdev, rdev 400 drivers/gpu/drm/radeon/cypress_dpm.c cypress_pcie_performance_request(rdev, request, false); rdev 404 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_populate_voltage_value(struct radeon_device *rdev, rdev 424 drivers/gpu/drm/radeon/cypress_dpm.c u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk) rdev 426 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 433 drivers/gpu/drm/radeon/cypress_dpm.c result = cypress_get_mclk_frequency_ratio(rdev, mclk, strobe_mode); rdev 442 drivers/gpu/drm/radeon/cypress_dpm.c u32 cypress_map_clkf_to_ibias(struct radeon_device *rdev, u32 clkf) rdev 444 drivers/gpu/drm/radeon/cypress_dpm.c u32 ref_clk = rdev->clock.mpll.reference_freq; rdev 474 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_populate_mclk_value(struct radeon_device *rdev, rdev 479 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 501 drivers/gpu/drm/radeon/cypress_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, rdev 513 drivers/gpu/drm/radeon/cypress_dpm.c ibias = cypress_map_clkf_to_ibias(rdev, dividers.whole_fb_div); rdev 558 drivers/gpu/drm/radeon/cypress_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 560 drivers/gpu/drm/radeon/cypress_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; rdev 611 drivers/gpu/drm/radeon/cypress_dpm.c u8 cypress_get_mclk_frequency_ratio(struct radeon_device *rdev, rdev 616 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->family >= CHIP_BARTS) { rdev 652 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_populate_mvdd_value(struct radeon_device *rdev, rdev 656 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 657 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 676 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_convert_power_level_to_smc(struct radeon_device *rdev, rdev 681 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 682 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 692 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv740_populate_sclk_value(rdev, pl->sclk, &level->sclk); rdev 714 drivers/gpu/drm/radeon/cypress_dpm.c level->strobeMode = cypress_get_strobe_mode_settings(rdev, pl->mclk); rdev 717 drivers/gpu/drm/radeon/cypress_dpm.c if (cypress_get_mclk_frequency_ratio(rdev, pl->mclk, true) >= rdev 725 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_mclk_value(rdev, rdev 732 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_mclk_value(rdev, rdev 742 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_voltage_value(rdev, rdev 750 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_voltage_value(rdev, rdev 758 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); rdev 763 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_convert_power_state_to_smc(struct radeon_device *rdev, rdev 768 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 774 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_convert_power_level_to_smc(rdev, rdev 781 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_convert_power_level_to_smc(rdev, rdev 788 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_convert_power_level_to_smc(rdev, rdev 809 drivers/gpu/drm/radeon/cypress_dpm.c rv770_populate_smc_sp(rdev, radeon_state, smc_state); rdev 811 drivers/gpu/drm/radeon/cypress_dpm.c return rv770_populate_smc_t(rdev, radeon_state, smc_state); rdev 828 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_convert_mc_reg_table_entry_to_smc(struct radeon_device *rdev, rdev 832 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 850 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_convert_mc_reg_table_to_smc(struct radeon_device *rdev, rdev 856 drivers/gpu/drm/radeon/cypress_dpm.c cypress_convert_mc_reg_table_entry_to_smc(rdev, rdev 859 drivers/gpu/drm/radeon/cypress_dpm.c cypress_convert_mc_reg_table_entry_to_smc(rdev, rdev 862 drivers/gpu/drm/radeon/cypress_dpm.c cypress_convert_mc_reg_table_entry_to_smc(rdev, rdev 867 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_upload_sw_state(struct radeon_device *rdev, rdev 870 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 876 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_convert_power_state_to_smc(rdev, radeon_new_state, &state); rdev 880 drivers/gpu/drm/radeon/cypress_dpm.c return rv770_copy_bytes_to_smc(rdev, address, (u8 *)&state, rdev 885 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_upload_mc_reg_table(struct radeon_device *rdev, rdev 888 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 889 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 893 drivers/gpu/drm/radeon/cypress_dpm.c cypress_convert_mc_reg_table_to_smc(rdev, radeon_new_state, &mc_reg_table); rdev 898 drivers/gpu/drm/radeon/cypress_dpm.c return rv770_copy_bytes_to_smc(rdev, address, rdev 904 drivers/gpu/drm/radeon/cypress_dpm.c u32 cypress_calculate_burst_time(struct radeon_device *rdev, rdev 907 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 925 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_program_memory_timing_parameters(struct radeon_device *rdev, rdev 933 drivers/gpu/drm/radeon/cypress_dpm.c mc_arb_burst_time |= STATE1(cypress_calculate_burst_time(rdev, rdev 936 drivers/gpu/drm/radeon/cypress_dpm.c mc_arb_burst_time |= STATE2(cypress_calculate_burst_time(rdev, rdev 939 drivers/gpu/drm/radeon/cypress_dpm.c mc_arb_burst_time |= STATE3(cypress_calculate_burst_time(rdev, rdev 943 drivers/gpu/drm/radeon/cypress_dpm.c rv730_program_memory_timing_parameters(rdev, radeon_new_state); rdev 948 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_populate_mc_reg_addresses(struct radeon_device *rdev, rdev 951 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 967 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_set_mc_reg_address_table(struct radeon_device *rdev) rdev 969 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1031 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_retrieve_ac_timing_for_one_entry(struct radeon_device *rdev, rdev 1034 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1043 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_retrieve_ac_timing_for_all_ranges(struct radeon_device *rdev, rdev 1046 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1052 drivers/gpu/drm/radeon/cypress_dpm.c radeon_atom_set_ac_timing(rdev, range_table->mclk[i]); rdev 1053 drivers/gpu/drm/radeon/cypress_dpm.c cypress_retrieve_ac_timing_for_one_entry(rdev, rdev 1071 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_initialize_mc_reg_table(struct radeon_device *rdev) rdev 1073 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1074 drivers/gpu/drm/radeon/cypress_dpm.c u8 module_index = rv770_get_memory_module_index(rdev); rdev 1078 drivers/gpu/drm/radeon/cypress_dpm.c ret = radeon_atom_get_mclk_range_table(rdev, rdev 1084 drivers/gpu/drm/radeon/cypress_dpm.c cypress_retrieve_ac_timing_for_all_ranges(rdev, &range_table); rdev 1089 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_wait_for_mc_sequencer(struct radeon_device *rdev, u8 value) rdev 1094 drivers/gpu/drm/radeon/cypress_dpm.c if ((rdev->family == CHIP_CYPRESS) || rdev 1095 drivers/gpu/drm/radeon/cypress_dpm.c (rdev->family == CHIP_HEMLOCK)) rdev 1097 drivers/gpu/drm/radeon/cypress_dpm.c else if (rdev->family == CHIP_CEDAR) rdev 1101 drivers/gpu/drm/radeon/cypress_dpm.c if ((rdev->family == CHIP_CYPRESS) || rdev 1102 drivers/gpu/drm/radeon/cypress_dpm.c (rdev->family == CHIP_HEMLOCK)) { rdev 1109 drivers/gpu/drm/radeon/cypress_dpm.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 1117 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_force_mc_use_s1(struct radeon_device *rdev, rdev 1128 drivers/gpu/drm/radeon/cypress_dpm.c radeon_atom_set_ac_timing(rdev, boot_state->low.mclk); rdev 1129 drivers/gpu/drm/radeon/cypress_dpm.c radeon_mc_wait_for_idle(rdev); rdev 1131 drivers/gpu/drm/radeon/cypress_dpm.c if ((rdev->family == CHIP_CYPRESS) || rdev 1132 drivers/gpu/drm/radeon/cypress_dpm.c (rdev->family == CHIP_HEMLOCK)) { rdev 1140 drivers/gpu/drm/radeon/cypress_dpm.c for (i = 0; i < rdev->num_crtc; i++) rdev 1141 drivers/gpu/drm/radeon/cypress_dpm.c radeon_wait_for_vblank(rdev, i); rdev 1144 drivers/gpu/drm/radeon/cypress_dpm.c cypress_wait_for_mc_sequencer(rdev, MC_CG_SEQ_YCLK_SUSPEND); rdev 1146 drivers/gpu/drm/radeon/cypress_dpm.c strobe_mode = cypress_get_strobe_mode_settings(rdev, rdev 1153 drivers/gpu/drm/radeon/cypress_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1163 drivers/gpu/drm/radeon/cypress_dpm.c cypress_wait_for_mc_sequencer(rdev, MC_CG_SEQ_YCLK_RESUME); rdev 1166 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_copy_ac_timing_from_s1_to_s0(struct radeon_device *rdev) rdev 1168 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1178 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_force_mc_use_s0(struct radeon_device *rdev, rdev 1186 drivers/gpu/drm/radeon/cypress_dpm.c cypress_copy_ac_timing_from_s1_to_s0(rdev); rdev 1187 drivers/gpu/drm/radeon/cypress_dpm.c radeon_mc_wait_for_idle(rdev); rdev 1189 drivers/gpu/drm/radeon/cypress_dpm.c if ((rdev->family == CHIP_CYPRESS) || rdev 1190 drivers/gpu/drm/radeon/cypress_dpm.c (rdev->family == CHIP_HEMLOCK)) { rdev 1198 drivers/gpu/drm/radeon/cypress_dpm.c for (i = 0; i < rdev->num_crtc; i++) rdev 1199 drivers/gpu/drm/radeon/cypress_dpm.c radeon_wait_for_vblank(rdev, i); rdev 1202 drivers/gpu/drm/radeon/cypress_dpm.c cypress_wait_for_mc_sequencer(rdev, MC_CG_SEQ_YCLK_SUSPEND); rdev 1204 drivers/gpu/drm/radeon/cypress_dpm.c strobe_mode = cypress_get_strobe_mode_settings(rdev, rdev 1211 drivers/gpu/drm/radeon/cypress_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1221 drivers/gpu/drm/radeon/cypress_dpm.c cypress_wait_for_mc_sequencer(rdev, MC_CG_SEQ_YCLK_RESUME); rdev 1224 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_populate_initial_mvdd_value(struct radeon_device *rdev, rdev 1227 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1235 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_populate_smc_initial_state(struct radeon_device *rdev, rdev 1240 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1241 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1283 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_voltage_value(rdev, rdev 1289 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_voltage_value(rdev, rdev 1294 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_initial_mvdd_value(rdev, rdev 1314 drivers/gpu/drm/radeon/cypress_dpm.c cypress_get_strobe_mode_settings(rdev, rdev 1331 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_populate_smc_acpi_state(struct radeon_device *rdev, rdev 1334 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1335 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1360 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_voltage_value(rdev, rdev 1376 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_voltage_value(rdev, rdev 1385 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_voltage_value(rdev, rdev 1428 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->family <= CHIP_HEMLOCK) rdev 1457 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); rdev 1468 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev, rdev 1484 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_construct_voltage_tables(struct radeon_device *rdev) rdev 1486 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1489 drivers/gpu/drm/radeon/cypress_dpm.c ret = radeon_atom_get_voltage_table(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0, rdev 1495 drivers/gpu/drm/radeon/cypress_dpm.c cypress_trim_voltage_table_to_fit_state_table(rdev, rdev 1499 drivers/gpu/drm/radeon/cypress_dpm.c ret = radeon_atom_get_voltage_table(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0, rdev 1505 drivers/gpu/drm/radeon/cypress_dpm.c cypress_trim_voltage_table_to_fit_state_table(rdev, rdev 1512 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_populate_smc_voltage_table(struct radeon_device *rdev, rdev 1524 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_populate_smc_voltage_tables(struct radeon_device *rdev, rdev 1527 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1528 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1532 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_smc_voltage_table(rdev, rdev 1550 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_smc_voltage_table(rdev, rdev 1571 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_get_mvdd_configuration(struct radeon_device *rdev) rdev 1573 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1574 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1594 drivers/gpu/drm/radeon/cypress_dpm.c module_index = rv770_get_memory_module_index(rdev); rdev 1596 drivers/gpu/drm/radeon/cypress_dpm.c if (radeon_atom_get_memory_info(rdev, module_index, &memory_info)) { rdev 1612 drivers/gpu/drm/radeon/cypress_dpm.c static int cypress_init_smc_table(struct radeon_device *rdev, rdev 1615 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1621 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_smc_voltage_tables(rdev, table); rdev 1623 drivers/gpu/drm/radeon/cypress_dpm.c switch (rdev->pm.int_thermal_type) { rdev 1636 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) rdev 1639 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) rdev 1642 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 1648 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_smc_initial_state(rdev, radeon_boot_state, table); rdev 1652 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_smc_acpi_state(rdev, table); rdev 1658 drivers/gpu/drm/radeon/cypress_dpm.c return rv770_copy_bytes_to_smc(rdev, rdev 1664 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_populate_mc_reg_table(struct radeon_device *rdev, rdev 1667 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1668 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1672 drivers/gpu/drm/radeon/cypress_dpm.c rv770_write_smc_soft_register(rdev, rdev 1675 drivers/gpu/drm/radeon/cypress_dpm.c cypress_populate_mc_reg_addresses(rdev, &mc_reg_table); rdev 1677 drivers/gpu/drm/radeon/cypress_dpm.c cypress_convert_mc_reg_table_entry_to_smc(rdev, rdev 1685 drivers/gpu/drm/radeon/cypress_dpm.c cypress_convert_mc_reg_table_to_smc(rdev, radeon_boot_state, &mc_reg_table); rdev 1687 drivers/gpu/drm/radeon/cypress_dpm.c return rv770_copy_bytes_to_smc(rdev, eg_pi->mc_reg_table_start, rdev 1692 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_get_table_locations(struct radeon_device *rdev) rdev 1694 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1695 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1699 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1708 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1717 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1729 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_enable_display_gap(struct radeon_device *rdev) rdev 1743 drivers/gpu/drm/radeon/cypress_dpm.c static void cypress_program_display_gap(struct radeon_device *rdev) rdev 1749 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.new_active_crtc_count > 0) rdev 1754 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.new_active_crtc_count > 1) rdev 1764 drivers/gpu/drm/radeon/cypress_dpm.c if ((rdev->pm.dpm.new_active_crtc_count > 0) && rdev 1765 drivers/gpu/drm/radeon/cypress_dpm.c (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) { rdev 1767 drivers/gpu/drm/radeon/cypress_dpm.c for (i = 0; i < rdev->num_crtc; i++) { rdev 1768 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.new_active_crtcs & (1 << i)) rdev 1771 drivers/gpu/drm/radeon/cypress_dpm.c if (i == rdev->num_crtc) rdev 1781 drivers/gpu/drm/radeon/cypress_dpm.c cypress_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0); rdev 1784 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_dpm_setup_asic(struct radeon_device *rdev) rdev 1786 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1788 drivers/gpu/drm/radeon/cypress_dpm.c rv740_read_clock_registers(rdev); rdev 1789 drivers/gpu/drm/radeon/cypress_dpm.c rv770_read_voltage_smio_registers(rdev); rdev 1790 drivers/gpu/drm/radeon/cypress_dpm.c rv770_get_max_vddc(rdev); rdev 1791 drivers/gpu/drm/radeon/cypress_dpm.c rv770_get_memory_type(rdev); rdev 1797 drivers/gpu/drm/radeon/cypress_dpm.c cypress_advertise_gen2_capability(rdev); rdev 1799 drivers/gpu/drm/radeon/cypress_dpm.c rv770_get_pcie_gen2_status(rdev); rdev 1801 drivers/gpu/drm/radeon/cypress_dpm.c rv770_enable_acpi_pm(rdev); rdev 1804 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_dpm_enable(struct radeon_device *rdev) rdev 1806 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1807 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1808 drivers/gpu/drm/radeon/cypress_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 1812 drivers/gpu/drm/radeon/cypress_dpm.c rv770_restore_cgcg(rdev); rdev 1814 drivers/gpu/drm/radeon/cypress_dpm.c if (rv770_dpm_enabled(rdev)) rdev 1818 drivers/gpu/drm/radeon/cypress_dpm.c rv770_enable_voltage_control(rdev, true); rdev 1819 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_construct_voltage_tables(rdev); rdev 1827 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_get_mvdd_configuration(rdev); rdev 1835 drivers/gpu/drm/radeon/cypress_dpm.c cypress_set_mc_reg_address_table(rdev); rdev 1836 drivers/gpu/drm/radeon/cypress_dpm.c cypress_force_mc_use_s0(rdev, boot_ps); rdev 1837 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_initialize_mc_reg_table(rdev); rdev 1840 drivers/gpu/drm/radeon/cypress_dpm.c cypress_force_mc_use_s1(rdev, boot_ps); rdev 1843 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 1844 drivers/gpu/drm/radeon/cypress_dpm.c rv770_enable_backbias(rdev, true); rdev 1847 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_spread_spectrum(rdev, true); rdev 1850 drivers/gpu/drm/radeon/cypress_dpm.c rv770_enable_thermal_protection(rdev, true); rdev 1852 drivers/gpu/drm/radeon/cypress_dpm.c rv770_setup_bsp(rdev); rdev 1853 drivers/gpu/drm/radeon/cypress_dpm.c rv770_program_git(rdev); rdev 1854 drivers/gpu/drm/radeon/cypress_dpm.c rv770_program_tp(rdev); rdev 1855 drivers/gpu/drm/radeon/cypress_dpm.c rv770_program_tpp(rdev); rdev 1856 drivers/gpu/drm/radeon/cypress_dpm.c rv770_program_sstp(rdev); rdev 1857 drivers/gpu/drm/radeon/cypress_dpm.c rv770_program_engine_speed_parameters(rdev); rdev 1858 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_display_gap(rdev); rdev 1859 drivers/gpu/drm/radeon/cypress_dpm.c rv770_program_vc(rdev); rdev 1862 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_dynamic_pcie_gen2(rdev, true); rdev 1864 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_upload_firmware(rdev); rdev 1870 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_get_table_locations(rdev); rdev 1875 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_init_smc_table(rdev, boot_ps); rdev 1881 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_populate_mc_reg_table(rdev, boot_ps); rdev 1888 drivers/gpu/drm/radeon/cypress_dpm.c cypress_program_response_times(rdev); rdev 1890 drivers/gpu/drm/radeon/cypress_dpm.c r7xx_start_smc(rdev); rdev 1892 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_notify_smc_display_change(rdev, false); rdev 1897 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_sclk_control(rdev, true); rdev 1900 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_mclk_control(rdev, true); rdev 1902 drivers/gpu/drm/radeon/cypress_dpm.c cypress_start_dpm(rdev); rdev 1905 drivers/gpu/drm/radeon/cypress_dpm.c cypress_gfx_clock_gating_enable(rdev, true); rdev 1908 drivers/gpu/drm/radeon/cypress_dpm.c cypress_mg_clock_gating_enable(rdev, true); rdev 1910 drivers/gpu/drm/radeon/cypress_dpm.c rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); rdev 1915 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_dpm_disable(struct radeon_device *rdev) rdev 1917 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1918 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1919 drivers/gpu/drm/radeon/cypress_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 1921 drivers/gpu/drm/radeon/cypress_dpm.c if (!rv770_dpm_enabled(rdev)) rdev 1924 drivers/gpu/drm/radeon/cypress_dpm.c rv770_clear_vc(rdev); rdev 1927 drivers/gpu/drm/radeon/cypress_dpm.c rv770_enable_thermal_protection(rdev, false); rdev 1930 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_dynamic_pcie_gen2(rdev, false); rdev 1932 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->irq.installed && rdev 1933 drivers/gpu/drm/radeon/cypress_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1934 drivers/gpu/drm/radeon/cypress_dpm.c rdev->irq.dpm_thermal = false; rdev 1935 drivers/gpu/drm/radeon/cypress_dpm.c radeon_irq_set(rdev); rdev 1939 drivers/gpu/drm/radeon/cypress_dpm.c cypress_gfx_clock_gating_enable(rdev, false); rdev 1942 drivers/gpu/drm/radeon/cypress_dpm.c cypress_mg_clock_gating_enable(rdev, false); rdev 1944 drivers/gpu/drm/radeon/cypress_dpm.c rv770_stop_dpm(rdev); rdev 1945 drivers/gpu/drm/radeon/cypress_dpm.c r7xx_stop_smc(rdev); rdev 1947 drivers/gpu/drm/radeon/cypress_dpm.c cypress_enable_spread_spectrum(rdev, false); rdev 1950 drivers/gpu/drm/radeon/cypress_dpm.c cypress_force_mc_use_s1(rdev, boot_ps); rdev 1952 drivers/gpu/drm/radeon/cypress_dpm.c rv770_reset_smio_status(rdev); rdev 1955 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_dpm_set_power_state(struct radeon_device *rdev) rdev 1957 drivers/gpu/drm/radeon/cypress_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1958 drivers/gpu/drm/radeon/cypress_dpm.c struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; rdev 1959 drivers/gpu/drm/radeon/cypress_dpm.c struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; rdev 1962 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_restrict_performance_levels_before_switch(rdev); rdev 1968 drivers/gpu/drm/radeon/cypress_dpm.c cypress_notify_link_speed_change_before_state_change(rdev, new_ps, old_ps); rdev 1970 drivers/gpu/drm/radeon/cypress_dpm.c rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 1971 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_halt_smc(rdev); rdev 1976 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_upload_sw_state(rdev, new_ps); rdev 1982 drivers/gpu/drm/radeon/cypress_dpm.c ret = cypress_upload_mc_reg_table(rdev, new_ps); rdev 1989 drivers/gpu/drm/radeon/cypress_dpm.c cypress_program_memory_timing_parameters(rdev, new_ps); rdev 1991 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_resume_smc(rdev); rdev 1996 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv770_set_sw_state(rdev); rdev 2001 drivers/gpu/drm/radeon/cypress_dpm.c rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 2004 drivers/gpu/drm/radeon/cypress_dpm.c cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); rdev 2010 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_dpm_reset_asic(struct radeon_device *rdev) rdev 2012 drivers/gpu/drm/radeon/cypress_dpm.c rv770_restrict_performance_levels_before_switch(rdev); rdev 2013 drivers/gpu/drm/radeon/cypress_dpm.c rv770_set_boot_state(rdev); rdev 2017 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 2019 drivers/gpu/drm/radeon/cypress_dpm.c cypress_program_display_gap(rdev); rdev 2022 drivers/gpu/drm/radeon/cypress_dpm.c int cypress_dpm_init(struct radeon_device *rdev) rdev 2032 drivers/gpu/drm/radeon/cypress_dpm.c rdev->pm.dpm.priv = eg_pi; rdev 2035 drivers/gpu/drm/radeon/cypress_dpm.c rv770_get_max_vddc(rdev); rdev 2043 drivers/gpu/drm/radeon/cypress_dpm.c ret = r600_get_platform_caps(rdev); rdev 2047 drivers/gpu/drm/radeon/cypress_dpm.c ret = rv7xx_parse_power_table(rdev); rdev 2051 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.voltage_response_time == 0) rdev 2052 drivers/gpu/drm/radeon/cypress_dpm.c rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; rdev 2053 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.dpm.backbias_response_time == 0) rdev 2054 drivers/gpu/drm/radeon/cypress_dpm.c rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; rdev 2056 drivers/gpu/drm/radeon/cypress_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 2073 drivers/gpu/drm/radeon/cypress_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0); rdev 2076 drivers/gpu/drm/radeon/cypress_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0); rdev 2079 drivers/gpu/drm/radeon/cypress_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0); rdev 2081 drivers/gpu/drm/radeon/cypress_dpm.c rv770_get_engine_memory_ss(rdev); rdev 2089 drivers/gpu/drm/radeon/cypress_dpm.c if ((rdev->family == CHIP_CYPRESS) || rdev 2090 drivers/gpu/drm/radeon/cypress_dpm.c (rdev->family == CHIP_HEMLOCK)) rdev 2102 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE) rdev 2109 drivers/gpu/drm/radeon/cypress_dpm.c if (rdev->flags & RADEON_IS_MOBILITY) rdev 2123 drivers/gpu/drm/radeon/cypress_dpm.c radeon_acpi_is_pcie_performance_request_supported(rdev); rdev 2128 drivers/gpu/drm/radeon/cypress_dpm.c if ((rdev->family == CHIP_CYPRESS) || rdev 2129 drivers/gpu/drm/radeon/cypress_dpm.c (rdev->family == CHIP_HEMLOCK) || rdev 2130 drivers/gpu/drm/radeon/cypress_dpm.c (rdev->family == CHIP_JUNIPER)) rdev 2143 drivers/gpu/drm/radeon/cypress_dpm.c void cypress_dpm_fini(struct radeon_device *rdev) rdev 2147 drivers/gpu/drm/radeon/cypress_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 2148 drivers/gpu/drm/radeon/cypress_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 2150 drivers/gpu/drm/radeon/cypress_dpm.c kfree(rdev->pm.dpm.ps); rdev 2151 drivers/gpu/drm/radeon/cypress_dpm.c kfree(rdev->pm.dpm.priv); rdev 2154 drivers/gpu/drm/radeon/cypress_dpm.c bool cypress_dpm_vblank_too_short(struct radeon_device *rdev) rdev 2156 drivers/gpu/drm/radeon/cypress_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2157 drivers/gpu/drm/radeon/cypress_dpm.c u32 vblank_time = r600_dpm_get_vblank_time(rdev); rdev 113 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_convert_power_level_to_smc(struct radeon_device *rdev, rdev 117 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_populate_smc_acpi_state(struct radeon_device *rdev, rdev 119 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_populate_smc_voltage_tables(struct radeon_device *rdev, rdev 121 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_populate_smc_initial_state(struct radeon_device *rdev, rdev 124 drivers/gpu/drm/radeon/cypress_dpm.h u32 cypress_calculate_burst_time(struct radeon_device *rdev, rdev 126 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_notify_link_speed_change_before_state_change(struct radeon_device *rdev, rdev 129 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_upload_sw_state(struct radeon_device *rdev, rdev 131 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_upload_mc_reg_table(struct radeon_device *rdev, rdev 133 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_program_memory_timing_parameters(struct radeon_device *rdev, rdev 135 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_notify_link_speed_change_after_state_change(struct radeon_device *rdev, rdev 138 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_construct_voltage_tables(struct radeon_device *rdev); rdev 139 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_get_mvdd_configuration(struct radeon_device *rdev); rdev 140 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_enable_spread_spectrum(struct radeon_device *rdev, rdev 142 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_enable_display_gap(struct radeon_device *rdev); rdev 143 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_get_table_locations(struct radeon_device *rdev); rdev 144 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_populate_mc_reg_table(struct radeon_device *rdev, rdev 146 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_program_response_times(struct radeon_device *rdev); rdev 147 drivers/gpu/drm/radeon/cypress_dpm.h int cypress_notify_smc_display_change(struct radeon_device *rdev, rdev 149 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_enable_sclk_control(struct radeon_device *rdev, rdev 151 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_enable_mclk_control(struct radeon_device *rdev, rdev 153 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_start_dpm(struct radeon_device *rdev); rdev 154 drivers/gpu/drm/radeon/cypress_dpm.h void cypress_advertise_gen2_capability(struct radeon_device *rdev); rdev 155 drivers/gpu/drm/radeon/cypress_dpm.h u32 cypress_map_clkf_to_ibias(struct radeon_device *rdev, u32 clkf); rdev 156 drivers/gpu/drm/radeon/cypress_dpm.h u8 cypress_get_mclk_frequency_ratio(struct radeon_device *rdev, rdev 158 drivers/gpu/drm/radeon/cypress_dpm.h u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk); rdev 33 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 51 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 70 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 116 drivers/gpu/drm/radeon/dce3_1_afmt.c void dce3_2_audio_set_dto(struct radeon_device *rdev, rdev 174 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_device *rdev = dev->dev_private; rdev 205 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_device *rdev = dev->dev_private; rdev 226 drivers/gpu/drm/radeon/dce3_1_afmt.c struct radeon_device *rdev = dev->dev_private; rdev 32 drivers/gpu/drm/radeon/dce6_afmt.c u32 dce6_endpoint_rreg(struct radeon_device *rdev, rdev 38 drivers/gpu/drm/radeon/dce6_afmt.c spin_lock_irqsave(&rdev->end_idx_lock, flags); rdev 41 drivers/gpu/drm/radeon/dce6_afmt.c spin_unlock_irqrestore(&rdev->end_idx_lock, flags); rdev 46 drivers/gpu/drm/radeon/dce6_afmt.c void dce6_endpoint_wreg(struct radeon_device *rdev, rdev 51 drivers/gpu/drm/radeon/dce6_afmt.c spin_lock_irqsave(&rdev->end_idx_lock, flags); rdev 52 drivers/gpu/drm/radeon/dce6_afmt.c if (ASIC_IS_DCE8(rdev)) rdev 58 drivers/gpu/drm/radeon/dce6_afmt.c spin_unlock_irqrestore(&rdev->end_idx_lock, flags); rdev 61 drivers/gpu/drm/radeon/dce6_afmt.c static void dce6_afmt_get_connected_pins(struct radeon_device *rdev) rdev 66 drivers/gpu/drm/radeon/dce6_afmt.c for (i = 0; i < rdev->audio.num_pins; i++) { rdev 67 drivers/gpu/drm/radeon/dce6_afmt.c offset = rdev->audio.pin[i].offset; rdev 71 drivers/gpu/drm/radeon/dce6_afmt.c rdev->audio.pin[i].connected = false; rdev 73 drivers/gpu/drm/radeon/dce6_afmt.c rdev->audio.pin[i].connected = true; rdev 77 drivers/gpu/drm/radeon/dce6_afmt.c struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev) rdev 85 drivers/gpu/drm/radeon/dce6_afmt.c dce6_afmt_get_connected_pins(rdev); rdev 87 drivers/gpu/drm/radeon/dce6_afmt.c for (i = 0; i < rdev->audio.num_pins; i++) { rdev 88 drivers/gpu/drm/radeon/dce6_afmt.c if (rdev->audio.pin[i].connected) { rdev 89 drivers/gpu/drm/radeon/dce6_afmt.c pin = &rdev->audio.pin[i]; rdev 92 drivers/gpu/drm/radeon/dce6_afmt.c list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { rdev 112 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 127 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 155 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 180 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 208 drivers/gpu/drm/radeon/dce6_afmt.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 257 drivers/gpu/drm/radeon/dce6_afmt.c void dce6_audio_enable(struct radeon_device *rdev, rdev 268 drivers/gpu/drm/radeon/dce6_afmt.c void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, rdev 287 drivers/gpu/drm/radeon/dce6_afmt.c void dce6_dp_audio_set_dto(struct radeon_device *rdev, rdev 303 drivers/gpu/drm/radeon/dce6_afmt.c if (ASIC_IS_DCE8(rdev)) { rdev 49 drivers/gpu/drm/radeon/evergreen.c u32 eg_cg_rreg(struct radeon_device *rdev, u32 reg) rdev 54 drivers/gpu/drm/radeon/evergreen.c spin_lock_irqsave(&rdev->cg_idx_lock, flags); rdev 57 drivers/gpu/drm/radeon/evergreen.c spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); rdev 61 drivers/gpu/drm/radeon/evergreen.c void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 65 drivers/gpu/drm/radeon/evergreen.c spin_lock_irqsave(&rdev->cg_idx_lock, flags); rdev 68 drivers/gpu/drm/radeon/evergreen.c spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); rdev 71 drivers/gpu/drm/radeon/evergreen.c u32 eg_pif_phy0_rreg(struct radeon_device *rdev, u32 reg) rdev 76 drivers/gpu/drm/radeon/evergreen.c spin_lock_irqsave(&rdev->pif_idx_lock, flags); rdev 79 drivers/gpu/drm/radeon/evergreen.c spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); rdev 83 drivers/gpu/drm/radeon/evergreen.c void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 87 drivers/gpu/drm/radeon/evergreen.c spin_lock_irqsave(&rdev->pif_idx_lock, flags); rdev 90 drivers/gpu/drm/radeon/evergreen.c spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); rdev 93 drivers/gpu/drm/radeon/evergreen.c u32 eg_pif_phy1_rreg(struct radeon_device *rdev, u32 reg) rdev 98 drivers/gpu/drm/radeon/evergreen.c spin_lock_irqsave(&rdev->pif_idx_lock, flags); rdev 101 drivers/gpu/drm/radeon/evergreen.c spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); rdev 105 drivers/gpu/drm/radeon/evergreen.c void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 109 drivers/gpu/drm/radeon/evergreen.c spin_lock_irqsave(&rdev->pif_idx_lock, flags); rdev 112 drivers/gpu/drm/radeon/evergreen.c spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); rdev 212 drivers/gpu/drm/radeon/evergreen.c static void evergreen_gpu_init(struct radeon_device *rdev); rdev 213 drivers/gpu/drm/radeon/evergreen.c void evergreen_fini(struct radeon_device *rdev); rdev 214 drivers/gpu/drm/radeon/evergreen.c void evergreen_pcie_gen2_enable(struct radeon_device *rdev); rdev 215 drivers/gpu/drm/radeon/evergreen.c void evergreen_program_aspm(struct radeon_device *rdev); rdev 216 drivers/gpu/drm/radeon/evergreen.c extern void cayman_cp_int_cntl_setup(struct radeon_device *rdev, rdev 218 drivers/gpu/drm/radeon/evergreen.c extern void cayman_vm_decode_fault(struct radeon_device *rdev, rdev 220 drivers/gpu/drm/radeon/evergreen.c void cik_init_cp_pg_table(struct radeon_device *rdev); rdev 222 drivers/gpu/drm/radeon/evergreen.c extern u32 si_get_csb_size(struct radeon_device *rdev); rdev 223 drivers/gpu/drm/radeon/evergreen.c extern void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); rdev 224 drivers/gpu/drm/radeon/evergreen.c extern u32 cik_get_csb_size(struct radeon_device *rdev); rdev 225 drivers/gpu/drm/radeon/evergreen.c extern void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); rdev 226 drivers/gpu/drm/radeon/evergreen.c extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); rdev 1000 drivers/gpu/drm/radeon/evergreen.c static void evergreen_init_golden_registers(struct radeon_device *rdev) rdev 1002 drivers/gpu/drm/radeon/evergreen.c switch (rdev->family) { rdev 1005 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1008 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1011 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1016 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1019 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1022 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1027 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1030 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1033 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1038 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1041 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1044 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1049 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1054 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1059 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1062 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1067 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1072 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1077 drivers/gpu/drm/radeon/evergreen.c radeon_program_register_sequence(rdev, rdev 1096 drivers/gpu/drm/radeon/evergreen.c int evergreen_get_allowed_info_register(struct radeon_device *rdev, rdev 1145 drivers/gpu/drm/radeon/evergreen.c static int sumo_set_uvd_clock(struct radeon_device *rdev, u32 clock, rdev 1151 drivers/gpu/drm/radeon/evergreen.c r = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 1169 drivers/gpu/drm/radeon/evergreen.c int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) rdev 1174 drivers/gpu/drm/radeon/evergreen.c r = sumo_set_uvd_clock(rdev, vclk, CG_VCLK_CNTL, CG_VCLK_STATUS); rdev 1180 drivers/gpu/drm/radeon/evergreen.c r = sumo_set_uvd_clock(rdev, dclk, CG_DCLK_CNTL, CG_DCLK_STATUS); rdev 1192 drivers/gpu/drm/radeon/evergreen.c int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) rdev 1212 drivers/gpu/drm/radeon/evergreen.c r = radeon_uvd_calc_upll_dividers(rdev, vclk, dclk, 125000, 250000, rdev 1230 drivers/gpu/drm/radeon/evergreen.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 1267 drivers/gpu/drm/radeon/evergreen.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 1281 drivers/gpu/drm/radeon/evergreen.c void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) rdev 1286 drivers/gpu/drm/radeon/evergreen.c readrq = pcie_get_readrq(rdev->pdev); rdev 1292 drivers/gpu/drm/radeon/evergreen.c pcie_set_readrq(rdev->pdev, 512); rdev 1298 drivers/gpu/drm/radeon/evergreen.c struct radeon_device *rdev = dev->dev_private; rdev 1351 drivers/gpu/drm/radeon/evergreen.c static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc) rdev 1359 drivers/gpu/drm/radeon/evergreen.c static bool dce4_is_counter_moving(struct radeon_device *rdev, int crtc) rdev 1380 drivers/gpu/drm/radeon/evergreen.c void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc) rdev 1384 drivers/gpu/drm/radeon/evergreen.c if (crtc >= rdev->num_crtc) rdev 1393 drivers/gpu/drm/radeon/evergreen.c while (dce4_is_in_vblank(rdev, crtc)) { rdev 1395 drivers/gpu/drm/radeon/evergreen.c if (!dce4_is_counter_moving(rdev, crtc)) rdev 1400 drivers/gpu/drm/radeon/evergreen.c while (!dce4_is_in_vblank(rdev, crtc)) { rdev 1402 drivers/gpu/drm/radeon/evergreen.c if (!dce4_is_counter_moving(rdev, crtc)) rdev 1418 drivers/gpu/drm/radeon/evergreen.c void evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, rdev 1421 drivers/gpu/drm/radeon/evergreen.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 1442 drivers/gpu/drm/radeon/evergreen.c bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc_id) rdev 1444 drivers/gpu/drm/radeon/evergreen.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 1452 drivers/gpu/drm/radeon/evergreen.c int evergreen_get_temp(struct radeon_device *rdev) rdev 1457 drivers/gpu/drm/radeon/evergreen.c if (rdev->family == CHIP_JUNIPER) { rdev 1490 drivers/gpu/drm/radeon/evergreen.c int sumo_get_temp(struct radeon_device *rdev) rdev 1507 drivers/gpu/drm/radeon/evergreen.c void sumo_pm_init_profile(struct radeon_device *rdev) rdev 1512 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 1513 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 1514 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 1515 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; rdev 1518 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_MOBILITY) rdev 1519 drivers/gpu/drm/radeon/evergreen.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); rdev 1521 drivers/gpu/drm/radeon/evergreen.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); rdev 1523 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = idx; rdev 1524 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = idx; rdev 1525 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 1526 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 1528 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = idx; rdev 1529 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = idx; rdev 1530 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 1531 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 1533 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = idx; rdev 1534 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = idx; rdev 1535 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 1536 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; rdev 1538 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = idx; rdev 1539 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = idx; rdev 1540 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 1541 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; rdev 1544 drivers/gpu/drm/radeon/evergreen.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); rdev 1545 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = idx; rdev 1546 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = idx; rdev 1547 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 1548 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = rdev 1549 drivers/gpu/drm/radeon/evergreen.c rdev->pm.power_state[idx].num_clock_modes - 1; rdev 1551 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = idx; rdev 1552 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = idx; rdev 1553 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 1554 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = rdev 1555 drivers/gpu/drm/radeon/evergreen.c rdev->pm.power_state[idx].num_clock_modes - 1; rdev 1567 drivers/gpu/drm/radeon/evergreen.c void btc_pm_init_profile(struct radeon_device *rdev) rdev 1572 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 1573 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 1574 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 1575 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 2; rdev 1580 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_MOBILITY) rdev 1581 drivers/gpu/drm/radeon/evergreen.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); rdev 1583 drivers/gpu/drm/radeon/evergreen.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); rdev 1585 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = idx; rdev 1586 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = idx; rdev 1587 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 1588 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 1590 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = idx; rdev 1591 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = idx; rdev 1592 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 1593 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; rdev 1595 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = idx; rdev 1596 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = idx; rdev 1597 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 1598 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2; rdev 1600 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = idx; rdev 1601 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = idx; rdev 1602 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 1603 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 1605 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = idx; rdev 1606 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = idx; rdev 1607 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 1608 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; rdev 1610 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = idx; rdev 1611 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = idx; rdev 1612 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 1613 drivers/gpu/drm/radeon/evergreen.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2; rdev 1624 drivers/gpu/drm/radeon/evergreen.c void evergreen_pm_misc(struct radeon_device *rdev) rdev 1626 drivers/gpu/drm/radeon/evergreen.c int req_ps_idx = rdev->pm.requested_power_state_index; rdev 1627 drivers/gpu/drm/radeon/evergreen.c int req_cm_idx = rdev->pm.requested_clock_mode_index; rdev 1628 drivers/gpu/drm/radeon/evergreen.c struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; rdev 1635 drivers/gpu/drm/radeon/evergreen.c if (voltage->voltage && (voltage->voltage != rdev->pm.current_vddc)) { rdev 1636 drivers/gpu/drm/radeon/evergreen.c radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); rdev 1637 drivers/gpu/drm/radeon/evergreen.c rdev->pm.current_vddc = voltage->voltage; rdev 1645 drivers/gpu/drm/radeon/evergreen.c if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && rdev 1646 drivers/gpu/drm/radeon/evergreen.c (rdev->family >= CHIP_BARTS) && rdev 1647 drivers/gpu/drm/radeon/evergreen.c rdev->pm.active_crtc_count && rdev 1648 drivers/gpu/drm/radeon/evergreen.c ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || rdev 1649 drivers/gpu/drm/radeon/evergreen.c (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) rdev 1650 drivers/gpu/drm/radeon/evergreen.c voltage = &rdev->pm.power_state[req_ps_idx]. rdev 1651 drivers/gpu/drm/radeon/evergreen.c clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].voltage; rdev 1656 drivers/gpu/drm/radeon/evergreen.c if (voltage->vddci && (voltage->vddci != rdev->pm.current_vddci)) { rdev 1657 drivers/gpu/drm/radeon/evergreen.c radeon_atom_set_voltage(rdev, voltage->vddci, SET_VOLTAGE_TYPE_ASIC_VDDCI); rdev 1658 drivers/gpu/drm/radeon/evergreen.c rdev->pm.current_vddci = voltage->vddci; rdev 1671 drivers/gpu/drm/radeon/evergreen.c void evergreen_pm_prepare(struct radeon_device *rdev) rdev 1673 drivers/gpu/drm/radeon/evergreen.c struct drm_device *ddev = rdev->ddev; rdev 1696 drivers/gpu/drm/radeon/evergreen.c void evergreen_pm_finish(struct radeon_device *rdev) rdev 1698 drivers/gpu/drm/radeon/evergreen.c struct drm_device *ddev = rdev->ddev; rdev 1723 drivers/gpu/drm/radeon/evergreen.c bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) rdev 1739 drivers/gpu/drm/radeon/evergreen.c void evergreen_hpd_set_polarity(struct radeon_device *rdev, rdev 1742 drivers/gpu/drm/radeon/evergreen.c bool connected = evergreen_hpd_sense(rdev, hpd); rdev 1761 drivers/gpu/drm/radeon/evergreen.c void evergreen_hpd_init(struct radeon_device *rdev) rdev 1763 drivers/gpu/drm/radeon/evergreen.c struct drm_device *dev = rdev->ddev; rdev 1789 drivers/gpu/drm/radeon/evergreen.c radeon_hpd_set_polarity(rdev, hpd); rdev 1791 drivers/gpu/drm/radeon/evergreen.c radeon_irq_kms_enable_hpd(rdev, enabled); rdev 1802 drivers/gpu/drm/radeon/evergreen.c void evergreen_hpd_fini(struct radeon_device *rdev) rdev 1804 drivers/gpu/drm/radeon/evergreen.c struct drm_device *dev = rdev->ddev; rdev 1818 drivers/gpu/drm/radeon/evergreen.c radeon_irq_kms_disable_hpd(rdev, disabled); rdev 1823 drivers/gpu/drm/radeon/evergreen.c static u32 evergreen_line_buffer_adjust(struct radeon_device *rdev, rdev 1869 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { rdev 1872 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1885 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev)) rdev 1891 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev)) rdev 1897 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev)) rdev 1903 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev)) rdev 1914 drivers/gpu/drm/radeon/evergreen.c u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev) rdev 2152 drivers/gpu/drm/radeon/evergreen.c static void evergreen_program_watermarks(struct radeon_device *rdev, rdev 2177 drivers/gpu/drm/radeon/evergreen.c dram_channels = evergreen_get_number_of_dram_channels(rdev); rdev 2180 drivers/gpu/drm/radeon/evergreen.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 2182 drivers/gpu/drm/radeon/evergreen.c radeon_dpm_get_mclk(rdev, false) * 10; rdev 2184 drivers/gpu/drm/radeon/evergreen.c radeon_dpm_get_sclk(rdev, false) * 10; rdev 2186 drivers/gpu/drm/radeon/evergreen.c wm_high.yclk = rdev->pm.current_mclk * 10; rdev 2187 drivers/gpu/drm/radeon/evergreen.c wm_high.sclk = rdev->pm.current_sclk * 10; rdev 2207 drivers/gpu/drm/radeon/evergreen.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 2209 drivers/gpu/drm/radeon/evergreen.c radeon_dpm_get_mclk(rdev, true) * 10; rdev 2211 drivers/gpu/drm/radeon/evergreen.c radeon_dpm_get_sclk(rdev, true) * 10; rdev 2213 drivers/gpu/drm/radeon/evergreen.c wm_low.yclk = rdev->pm.current_mclk * 10; rdev 2214 drivers/gpu/drm/radeon/evergreen.c wm_low.sclk = rdev->pm.current_sclk * 10; rdev 2243 drivers/gpu/drm/radeon/evergreen.c (rdev->disp_priority == 2)) { rdev 2250 drivers/gpu/drm/radeon/evergreen.c (rdev->disp_priority == 2)) { rdev 2321 drivers/gpu/drm/radeon/evergreen.c void evergreen_bandwidth_update(struct radeon_device *rdev) rdev 2328 drivers/gpu/drm/radeon/evergreen.c if (!rdev->mode_info.mode_config_initialized) rdev 2331 drivers/gpu/drm/radeon/evergreen.c radeon_update_display_priority(rdev); rdev 2333 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2334 drivers/gpu/drm/radeon/evergreen.c if (rdev->mode_info.crtcs[i]->base.enabled) rdev 2337 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i += 2) { rdev 2338 drivers/gpu/drm/radeon/evergreen.c mode0 = &rdev->mode_info.crtcs[i]->base.mode; rdev 2339 drivers/gpu/drm/radeon/evergreen.c mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; rdev 2340 drivers/gpu/drm/radeon/evergreen.c lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); rdev 2341 drivers/gpu/drm/radeon/evergreen.c evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); rdev 2342 drivers/gpu/drm/radeon/evergreen.c lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); rdev 2343 drivers/gpu/drm/radeon/evergreen.c evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i+1], lb_size, num_heads); rdev 2356 drivers/gpu/drm/radeon/evergreen.c int evergreen_mc_wait_for_idle(struct radeon_device *rdev) rdev 2361 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2374 drivers/gpu/drm/radeon/evergreen.c void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev) rdev 2382 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2397 drivers/gpu/drm/radeon/evergreen.c static int evergreen_pcie_gart_enable(struct radeon_device *rdev) rdev 2402 drivers/gpu/drm/radeon/evergreen.c if (rdev->gart.robj == NULL) { rdev 2403 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 2406 drivers/gpu/drm/radeon/evergreen.c r = radeon_gart_table_vram_pin(rdev); rdev 2420 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) { rdev 2428 drivers/gpu/drm/radeon/evergreen.c if ((rdev->family == CHIP_JUNIPER) || rdev 2429 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_CYPRESS) || rdev 2430 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_HEMLOCK) || rdev 2431 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_BARTS)) rdev 2438 drivers/gpu/drm/radeon/evergreen.c WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); rdev 2439 drivers/gpu/drm/radeon/evergreen.c WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); rdev 2440 drivers/gpu/drm/radeon/evergreen.c WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); rdev 2444 drivers/gpu/drm/radeon/evergreen.c (u32)(rdev->dummy_page.addr >> 12)); rdev 2447 drivers/gpu/drm/radeon/evergreen.c evergreen_pcie_gart_tlb_flush(rdev); rdev 2449 drivers/gpu/drm/radeon/evergreen.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 2450 drivers/gpu/drm/radeon/evergreen.c (unsigned long long)rdev->gart.table_addr); rdev 2451 drivers/gpu/drm/radeon/evergreen.c rdev->gart.ready = true; rdev 2455 drivers/gpu/drm/radeon/evergreen.c static void evergreen_pcie_gart_disable(struct radeon_device *rdev) rdev 2477 drivers/gpu/drm/radeon/evergreen.c radeon_gart_table_vram_unpin(rdev); rdev 2480 drivers/gpu/drm/radeon/evergreen.c static void evergreen_pcie_gart_fini(struct radeon_device *rdev) rdev 2482 drivers/gpu/drm/radeon/evergreen.c evergreen_pcie_gart_disable(rdev); rdev 2483 drivers/gpu/drm/radeon/evergreen.c radeon_gart_table_vram_free(rdev); rdev 2484 drivers/gpu/drm/radeon/evergreen.c radeon_gart_fini(rdev); rdev 2488 drivers/gpu/drm/radeon/evergreen.c static void evergreen_agp_enable(struct radeon_device *rdev) rdev 2564 drivers/gpu/drm/radeon/evergreen.c static bool evergreen_is_dp_sst_stream_enabled(struct radeon_device *rdev, rdev 2624 drivers/gpu/drm/radeon/evergreen.c static void evergreen_blank_dp_output(struct radeon_device *rdev, rdev 2664 drivers/gpu/drm/radeon/evergreen.c void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save) rdev 2670 drivers/gpu/drm/radeon/evergreen.c if (!ASIC_IS_NODCE(rdev)) { rdev 2678 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2682 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE6(rdev)) { rdev 2685 drivers/gpu/drm/radeon/evergreen.c radeon_wait_for_vblank(rdev, i); rdev 2694 drivers/gpu/drm/radeon/evergreen.c radeon_wait_for_vblank(rdev, i); rdev 2702 drivers/gpu/drm/radeon/evergreen.c frame_count = radeon_get_vblank_counter(rdev, i); rdev 2703 drivers/gpu/drm/radeon/evergreen.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 2704 drivers/gpu/drm/radeon/evergreen.c if (radeon_get_vblank_counter(rdev, i) != frame_count) rdev 2715 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev) && rdev 2716 drivers/gpu/drm/radeon/evergreen.c evergreen_is_dp_sst_stream_enabled(rdev, i ,&dig_fe)) rdev 2717 drivers/gpu/drm/radeon/evergreen.c evergreen_blank_dp_output(rdev, dig_fe); rdev 2732 drivers/gpu/drm/radeon/evergreen.c radeon_mc_wait_for_idle(rdev); rdev 2746 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2762 drivers/gpu/drm/radeon/evergreen.c void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save) rdev 2768 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2770 drivers/gpu/drm/radeon/evergreen.c upper_32_bits(rdev->mc.vram_start)); rdev 2772 drivers/gpu/drm/radeon/evergreen.c upper_32_bits(rdev->mc.vram_start)); rdev 2774 drivers/gpu/drm/radeon/evergreen.c (u32)rdev->mc.vram_start); rdev 2776 drivers/gpu/drm/radeon/evergreen.c (u32)rdev->mc.vram_start); rdev 2779 drivers/gpu/drm/radeon/evergreen.c if (!ASIC_IS_NODCE(rdev)) { rdev 2780 drivers/gpu/drm/radeon/evergreen.c WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start)); rdev 2781 drivers/gpu/drm/radeon/evergreen.c WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start); rdev 2785 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2802 drivers/gpu/drm/radeon/evergreen.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 2818 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2820 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE6(rdev)) { rdev 2834 drivers/gpu/drm/radeon/evergreen.c frame_count = radeon_get_vblank_counter(rdev, i); rdev 2835 drivers/gpu/drm/radeon/evergreen.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 2836 drivers/gpu/drm/radeon/evergreen.c if (radeon_get_vblank_counter(rdev, i) != frame_count) rdev 2842 drivers/gpu/drm/radeon/evergreen.c if (!ASIC_IS_NODCE(rdev)) { rdev 2850 drivers/gpu/drm/radeon/evergreen.c void evergreen_mc_program(struct radeon_device *rdev) rdev 2866 drivers/gpu/drm/radeon/evergreen.c evergreen_mc_stop(rdev, &save); rdev 2867 drivers/gpu/drm/radeon/evergreen.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 2868 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 2873 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_AGP) { rdev 2874 drivers/gpu/drm/radeon/evergreen.c if (rdev->mc.vram_start < rdev->mc.gtt_start) { rdev 2877 drivers/gpu/drm/radeon/evergreen.c rdev->mc.vram_start >> 12); rdev 2879 drivers/gpu/drm/radeon/evergreen.c rdev->mc.gtt_end >> 12); rdev 2883 drivers/gpu/drm/radeon/evergreen.c rdev->mc.gtt_start >> 12); rdev 2885 drivers/gpu/drm/radeon/evergreen.c rdev->mc.vram_end >> 12); rdev 2889 drivers/gpu/drm/radeon/evergreen.c rdev->mc.vram_start >> 12); rdev 2891 drivers/gpu/drm/radeon/evergreen.c rdev->mc.vram_end >> 12); rdev 2893 drivers/gpu/drm/radeon/evergreen.c WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12); rdev 2895 drivers/gpu/drm/radeon/evergreen.c if ((rdev->family == CHIP_PALM) || rdev 2896 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO) || rdev 2897 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO2)) { rdev 2899 drivers/gpu/drm/radeon/evergreen.c tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24; rdev 2900 drivers/gpu/drm/radeon/evergreen.c tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20; rdev 2903 drivers/gpu/drm/radeon/evergreen.c tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; rdev 2904 drivers/gpu/drm/radeon/evergreen.c tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); rdev 2906 drivers/gpu/drm/radeon/evergreen.c WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); rdev 2909 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_AGP) { rdev 2910 drivers/gpu/drm/radeon/evergreen.c WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16); rdev 2911 drivers/gpu/drm/radeon/evergreen.c WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16); rdev 2912 drivers/gpu/drm/radeon/evergreen.c WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22); rdev 2918 drivers/gpu/drm/radeon/evergreen.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 2919 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 2921 drivers/gpu/drm/radeon/evergreen.c evergreen_mc_resume(rdev, &save); rdev 2924 drivers/gpu/drm/radeon/evergreen.c rv515_vga_render_disable(rdev); rdev 2930 drivers/gpu/drm/radeon/evergreen.c void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 2932 drivers/gpu/drm/radeon/evergreen.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 2945 drivers/gpu/drm/radeon/evergreen.c } else if (rdev->wb.enabled) { rdev 2965 drivers/gpu/drm/radeon/evergreen.c static int evergreen_cp_load_microcode(struct radeon_device *rdev) rdev 2970 drivers/gpu/drm/radeon/evergreen.c if (!rdev->me_fw || !rdev->pfp_fw) rdev 2973 drivers/gpu/drm/radeon/evergreen.c r700_cp_stop(rdev); rdev 2980 drivers/gpu/drm/radeon/evergreen.c fw_data = (const __be32 *)rdev->pfp_fw->data; rdev 2986 drivers/gpu/drm/radeon/evergreen.c fw_data = (const __be32 *)rdev->me_fw->data; rdev 2997 drivers/gpu/drm/radeon/evergreen.c static int evergreen_cp_start(struct radeon_device *rdev) rdev 2999 drivers/gpu/drm/radeon/evergreen.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3003 drivers/gpu/drm/radeon/evergreen.c r = radeon_ring_lock(rdev, ring, 7); rdev 3011 drivers/gpu/drm/radeon/evergreen.c radeon_ring_write(ring, rdev->config.evergreen.max_hw_contexts - 1); rdev 3015 drivers/gpu/drm/radeon/evergreen.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3020 drivers/gpu/drm/radeon/evergreen.c r = radeon_ring_lock(rdev, ring, evergreen_default_size + 19); rdev 3058 drivers/gpu/drm/radeon/evergreen.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3063 drivers/gpu/drm/radeon/evergreen.c static int evergreen_cp_resume(struct radeon_device *rdev) rdev 3065 drivers/gpu/drm/radeon/evergreen.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3103 drivers/gpu/drm/radeon/evergreen.c ((rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC)); rdev 3104 drivers/gpu/drm/radeon/evergreen.c WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); rdev 3105 drivers/gpu/drm/radeon/evergreen.c WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); rdev 3107 drivers/gpu/drm/radeon/evergreen.c if (rdev->wb.enabled) rdev 3120 drivers/gpu/drm/radeon/evergreen.c evergreen_cp_start(rdev); rdev 3122 drivers/gpu/drm/radeon/evergreen.c r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring); rdev 3133 drivers/gpu/drm/radeon/evergreen.c static void evergreen_gpu_init(struct radeon_device *rdev) rdev 3154 drivers/gpu/drm/radeon/evergreen.c switch (rdev->family) { rdev 3157 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 2; rdev 3158 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 4; rdev 3159 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 8; rdev 3160 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 10; rdev 3161 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 4 * rdev->config.evergreen.num_ses; rdev 3162 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3163 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 248; rdev 3164 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 32; rdev 3165 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 512; rdev 3166 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3167 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 256; rdev 3168 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 64; rdev 3169 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 192; rdev 3170 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 8; rdev 3171 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 2; rdev 3173 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x100; rdev 3174 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3175 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3179 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3180 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 4; rdev 3181 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 4; rdev 3182 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 10; rdev 3183 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 4 * rdev->config.evergreen.num_ses; rdev 3184 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3185 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 248; rdev 3186 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 32; rdev 3187 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 512; rdev 3188 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3189 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 256; rdev 3190 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 64; rdev 3191 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 192; rdev 3192 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 8; rdev 3193 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 2; rdev 3195 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x100; rdev 3196 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3197 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3201 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3202 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 4; rdev 3203 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 4; rdev 3204 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 5; rdev 3205 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 2 * rdev->config.evergreen.num_ses; rdev 3206 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3207 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 248; rdev 3208 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 32; rdev 3209 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 256; rdev 3210 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3211 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 256; rdev 3212 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 64; rdev 3213 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 192; rdev 3214 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 8; rdev 3215 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 2; rdev 3217 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x100; rdev 3218 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3219 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3224 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3225 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 2; rdev 3226 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 2; rdev 3227 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 2; rdev 3228 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 1 * rdev->config.evergreen.num_ses; rdev 3229 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3230 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 192; rdev 3231 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 16; rdev 3232 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 256; rdev 3233 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3234 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 128; rdev 3235 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 32; rdev 3236 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 96; rdev 3237 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 4; rdev 3238 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 1; rdev 3240 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x40; rdev 3241 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3242 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3246 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3247 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 2; rdev 3248 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 2; rdev 3249 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 2; rdev 3250 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 1 * rdev->config.evergreen.num_ses; rdev 3251 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3252 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 192; rdev 3253 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 16; rdev 3254 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 256; rdev 3255 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3256 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 128; rdev 3257 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 32; rdev 3258 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 96; rdev 3259 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 4; rdev 3260 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 1; rdev 3262 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x40; rdev 3263 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3264 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3268 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3269 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 4; rdev 3270 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 4; rdev 3271 drivers/gpu/drm/radeon/evergreen.c if (rdev->pdev->device == 0x9648) rdev 3272 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 3; rdev 3273 drivers/gpu/drm/radeon/evergreen.c else if ((rdev->pdev->device == 0x9647) || rdev 3274 drivers/gpu/drm/radeon/evergreen.c (rdev->pdev->device == 0x964a)) rdev 3275 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 4; rdev 3277 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 5; rdev 3278 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 2 * rdev->config.evergreen.num_ses; rdev 3279 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3280 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 248; rdev 3281 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 32; rdev 3282 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 256; rdev 3283 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3284 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 256; rdev 3285 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 64; rdev 3286 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 192; rdev 3287 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 8; rdev 3288 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 2; rdev 3290 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x40; rdev 3291 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3292 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3296 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3297 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 4; rdev 3298 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 4; rdev 3299 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 2; rdev 3300 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 1 * rdev->config.evergreen.num_ses; rdev 3301 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3302 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 248; rdev 3303 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 32; rdev 3304 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 512; rdev 3305 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3306 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 256; rdev 3307 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 64; rdev 3308 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 192; rdev 3309 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 4; rdev 3310 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 2; rdev 3312 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x40; rdev 3313 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3314 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3318 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 2; rdev 3319 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 4; rdev 3320 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 8; rdev 3321 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 7; rdev 3322 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 4 * rdev->config.evergreen.num_ses; rdev 3323 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3324 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 248; rdev 3325 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 32; rdev 3326 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 512; rdev 3327 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3328 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 256; rdev 3329 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 64; rdev 3330 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 192; rdev 3331 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 8; rdev 3332 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 2; rdev 3334 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x100; rdev 3335 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3336 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3340 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3341 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 4; rdev 3342 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 4; rdev 3343 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 6; rdev 3344 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 2 * rdev->config.evergreen.num_ses; rdev 3345 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3346 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 248; rdev 3347 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 32; rdev 3348 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 256; rdev 3349 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3350 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 256; rdev 3351 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 64; rdev 3352 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 192; rdev 3353 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 8; rdev 3354 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 2; rdev 3356 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x100; rdev 3357 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3358 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3362 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.num_ses = 1; rdev 3363 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_pipes = 2; rdev 3364 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_tile_pipes = 2; rdev 3365 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_simds = 2; rdev 3366 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_backends = 1 * rdev->config.evergreen.num_ses; rdev 3367 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gprs = 256; rdev 3368 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_threads = 192; rdev 3369 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_gs_threads = 16; rdev 3370 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_stack_entries = 256; rdev 3371 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_num_of_sets = 4; rdev 3372 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_size = 128; rdev 3373 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_pos_size = 32; rdev 3374 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sx_max_export_smx_size = 96; rdev 3375 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.max_hw_contexts = 4; rdev 3376 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sq_num_cf_insts = 1; rdev 3378 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_prim_fifo_size = 0x40; rdev 3379 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; rdev 3380 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; rdev 3398 drivers/gpu/drm/radeon/evergreen.c evergreen_fix_pci_max_read_req_size(rdev); rdev 3401 drivers/gpu/drm/radeon/evergreen.c if ((rdev->family == CHIP_PALM) || rdev 3402 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO) || rdev 3403 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO2)) rdev 3415 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config = 0; rdev 3416 drivers/gpu/drm/radeon/evergreen.c switch (rdev->config.evergreen.max_tile_pipes) { rdev 3419 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= (0 << 0); rdev 3422 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= (1 << 0); rdev 3425 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= (2 << 0); rdev 3428 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= (3 << 0); rdev 3432 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) rdev 3433 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= 1 << 4; rdev 3437 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= 0 << 4; rdev 3440 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= 1 << 4; rdev 3444 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= 2 << 4; rdev 3448 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= 0 << 8; rdev 3449 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.tile_config |= rdev 3452 drivers/gpu/drm/radeon/evergreen.c if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) { rdev 3462 drivers/gpu/drm/radeon/evergreen.c for (i = (rdev->config.evergreen.num_ses - 1); i >= 0; i--) { rdev 3475 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->config.evergreen.max_backends; i++) rdev 3479 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->config.evergreen.max_backends; i++) rdev 3483 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->config.evergreen.num_ses; i++) { rdev 3489 drivers/gpu/drm/radeon/evergreen.c simd_disable_bitmap |= 0xffffffff << rdev->config.evergreen.max_simds; rdev 3493 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.active_simds = hweight32(~tmp); rdev 3506 drivers/gpu/drm/radeon/evergreen.c if ((rdev->config.evergreen.max_backends == 1) && rdev 3507 drivers/gpu/drm/radeon/evergreen.c (rdev->flags & RADEON_IS_IGP)) { rdev 3517 drivers/gpu/drm/radeon/evergreen.c tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.evergreen.max_backends, rdev 3520 drivers/gpu/drm/radeon/evergreen.c rdev->config.evergreen.backend_map = tmp; rdev 3546 drivers/gpu/drm/radeon/evergreen.c smx_dc_ctl0 |= NUMBER_OF_SETS(rdev->config.evergreen.sx_num_of_sets); rdev 3549 drivers/gpu/drm/radeon/evergreen.c if (rdev->family <= CHIP_SUMO2) rdev 3552 drivers/gpu/drm/radeon/evergreen.c WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_size / 4) - 1) | rdev 3553 drivers/gpu/drm/radeon/evergreen.c POSITION_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_pos_size / 4) - 1) | rdev 3554 drivers/gpu/drm/radeon/evergreen.c SMX_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_smx_size / 4) - 1))); rdev 3556 drivers/gpu/drm/radeon/evergreen.c WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.evergreen.sc_prim_fifo_size) | rdev 3557 drivers/gpu/drm/radeon/evergreen.c SC_HIZ_TILE_FIFO_SIZE(rdev->config.evergreen.sc_hiz_tile_fifo_size) | rdev 3558 drivers/gpu/drm/radeon/evergreen.c SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.evergreen.sc_earlyz_tile_fifo_size))); rdev 3565 drivers/gpu/drm/radeon/evergreen.c WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.evergreen.sq_num_cf_insts) | rdev 3582 drivers/gpu/drm/radeon/evergreen.c switch (rdev->family) { rdev 3597 drivers/gpu/drm/radeon/evergreen.c sq_gpr_resource_mgmt_1 = NUM_PS_GPRS((rdev->config.evergreen.max_gprs - (4 * 2))* 12 / 32); rdev 3598 drivers/gpu/drm/radeon/evergreen.c sq_gpr_resource_mgmt_1 |= NUM_VS_GPRS((rdev->config.evergreen.max_gprs - (4 * 2)) * 6 / 32); rdev 3600 drivers/gpu/drm/radeon/evergreen.c sq_gpr_resource_mgmt_2 = NUM_GS_GPRS((rdev->config.evergreen.max_gprs - (4 * 2)) * 4 / 32); rdev 3601 drivers/gpu/drm/radeon/evergreen.c sq_gpr_resource_mgmt_2 |= NUM_ES_GPRS((rdev->config.evergreen.max_gprs - (4 * 2)) * 4 / 32); rdev 3602 drivers/gpu/drm/radeon/evergreen.c sq_gpr_resource_mgmt_3 = NUM_HS_GPRS((rdev->config.evergreen.max_gprs - (4 * 2)) * 3 / 32); rdev 3603 drivers/gpu/drm/radeon/evergreen.c sq_gpr_resource_mgmt_3 |= NUM_LS_GPRS((rdev->config.evergreen.max_gprs - (4 * 2)) * 3 / 32); rdev 3605 drivers/gpu/drm/radeon/evergreen.c switch (rdev->family) { rdev 3618 drivers/gpu/drm/radeon/evergreen.c sq_thread_resource_mgmt |= NUM_VS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8); rdev 3619 drivers/gpu/drm/radeon/evergreen.c sq_thread_resource_mgmt |= NUM_GS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8); rdev 3620 drivers/gpu/drm/radeon/evergreen.c sq_thread_resource_mgmt |= NUM_ES_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8); rdev 3621 drivers/gpu/drm/radeon/evergreen.c sq_thread_resource_mgmt_2 = NUM_HS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8); rdev 3622 drivers/gpu/drm/radeon/evergreen.c sq_thread_resource_mgmt_2 |= NUM_LS_THREADS((((rdev->config.evergreen.max_threads - ps_thread_count) / 6) / 8) * 8); rdev 3624 drivers/gpu/drm/radeon/evergreen.c sq_stack_resource_mgmt_1 = NUM_PS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); rdev 3625 drivers/gpu/drm/radeon/evergreen.c sq_stack_resource_mgmt_1 |= NUM_VS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); rdev 3626 drivers/gpu/drm/radeon/evergreen.c sq_stack_resource_mgmt_2 = NUM_GS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); rdev 3627 drivers/gpu/drm/radeon/evergreen.c sq_stack_resource_mgmt_2 |= NUM_ES_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); rdev 3628 drivers/gpu/drm/radeon/evergreen.c sq_stack_resource_mgmt_3 = NUM_HS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); rdev 3629 drivers/gpu/drm/radeon/evergreen.c sq_stack_resource_mgmt_3 |= NUM_LS_STACK_ENTRIES((rdev->config.evergreen.max_stack_entries * 1) / 6); rdev 3646 drivers/gpu/drm/radeon/evergreen.c switch (rdev->family) { rdev 3710 drivers/gpu/drm/radeon/evergreen.c int evergreen_mc_init(struct radeon_device *rdev) rdev 3716 drivers/gpu/drm/radeon/evergreen.c rdev->mc.vram_is_ddr = true; rdev 3717 drivers/gpu/drm/radeon/evergreen.c if ((rdev->family == CHIP_PALM) || rdev 3718 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO) || rdev 3719 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO2)) rdev 3746 drivers/gpu/drm/radeon/evergreen.c rdev->mc.vram_width = numchan * chansize; rdev 3748 drivers/gpu/drm/radeon/evergreen.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 3749 drivers/gpu/drm/radeon/evergreen.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 3751 drivers/gpu/drm/radeon/evergreen.c if ((rdev->family == CHIP_PALM) || rdev 3752 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO) || rdev 3753 drivers/gpu/drm/radeon/evergreen.c (rdev->family == CHIP_SUMO2)) { rdev 3755 drivers/gpu/drm/radeon/evergreen.c rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); rdev 3756 drivers/gpu/drm/radeon/evergreen.c rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); rdev 3759 drivers/gpu/drm/radeon/evergreen.c rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; rdev 3760 drivers/gpu/drm/radeon/evergreen.c rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; rdev 3762 drivers/gpu/drm/radeon/evergreen.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 3763 drivers/gpu/drm/radeon/evergreen.c r700_vram_gtt_location(rdev, &rdev->mc); rdev 3764 drivers/gpu/drm/radeon/evergreen.c radeon_update_bandwidth_info(rdev); rdev 3769 drivers/gpu/drm/radeon/evergreen.c void evergreen_print_gpu_status_regs(struct radeon_device *rdev) rdev 3771 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " GRBM_STATUS = 0x%08X\n", rdev 3773 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " GRBM_STATUS_SE0 = 0x%08X\n", rdev 3775 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " GRBM_STATUS_SE1 = 0x%08X\n", rdev 3777 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " SRBM_STATUS = 0x%08X\n", rdev 3779 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " SRBM_STATUS2 = 0x%08X\n", rdev 3781 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", rdev 3783 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n", rdev 3785 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n", rdev 3787 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", rdev 3789 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n", rdev 3791 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) { rdev 3792 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, " R_00D834_DMA_STATUS_REG = 0x%08X\n", rdev 3797 drivers/gpu/drm/radeon/evergreen.c bool evergreen_is_display_hung(struct radeon_device *rdev) rdev 3803 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 3811 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 3826 drivers/gpu/drm/radeon/evergreen.c u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev) rdev 3878 drivers/gpu/drm/radeon/evergreen.c if (evergreen_is_display_hung(rdev)) rdev 3895 drivers/gpu/drm/radeon/evergreen.c static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) rdev 3904 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask); rdev 3906 drivers/gpu/drm/radeon/evergreen.c evergreen_print_gpu_status_regs(rdev); rdev 3920 drivers/gpu/drm/radeon/evergreen.c evergreen_mc_stop(rdev, &save); rdev 3921 drivers/gpu/drm/radeon/evergreen.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 3922 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 3967 drivers/gpu/drm/radeon/evergreen.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 3975 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); rdev 3989 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); rdev 4003 drivers/gpu/drm/radeon/evergreen.c evergreen_mc_resume(rdev, &save); rdev 4006 drivers/gpu/drm/radeon/evergreen.c evergreen_print_gpu_status_regs(rdev); rdev 4009 drivers/gpu/drm/radeon/evergreen.c void evergreen_gpu_pci_config_reset(struct radeon_device *rdev) rdev 4014 drivers/gpu/drm/radeon/evergreen.c dev_info(rdev->dev, "GPU pci config reset\n"); rdev 4028 drivers/gpu/drm/radeon/evergreen.c r600_rlc_stop(rdev); rdev 4033 drivers/gpu/drm/radeon/evergreen.c rv770_set_clk_bypass_mode(rdev); rdev 4035 drivers/gpu/drm/radeon/evergreen.c pci_clear_master(rdev->pdev); rdev 4037 drivers/gpu/drm/radeon/evergreen.c evergreen_mc_stop(rdev, &save); rdev 4038 drivers/gpu/drm/radeon/evergreen.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 4039 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "Wait for MC idle timed out !\n"); rdev 4042 drivers/gpu/drm/radeon/evergreen.c radeon_pci_config_reset(rdev); rdev 4044 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4051 drivers/gpu/drm/radeon/evergreen.c int evergreen_asic_reset(struct radeon_device *rdev, bool hard) rdev 4056 drivers/gpu/drm/radeon/evergreen.c evergreen_gpu_pci_config_reset(rdev); rdev 4060 drivers/gpu/drm/radeon/evergreen.c reset_mask = evergreen_gpu_check_soft_reset(rdev); rdev 4063 drivers/gpu/drm/radeon/evergreen.c r600_set_bios_scratch_engine_hung(rdev, true); rdev 4066 drivers/gpu/drm/radeon/evergreen.c evergreen_gpu_soft_reset(rdev, reset_mask); rdev 4068 drivers/gpu/drm/radeon/evergreen.c reset_mask = evergreen_gpu_check_soft_reset(rdev); rdev 4072 drivers/gpu/drm/radeon/evergreen.c evergreen_gpu_pci_config_reset(rdev); rdev 4074 drivers/gpu/drm/radeon/evergreen.c reset_mask = evergreen_gpu_check_soft_reset(rdev); rdev 4077 drivers/gpu/drm/radeon/evergreen.c r600_set_bios_scratch_engine_hung(rdev, false); rdev 4091 drivers/gpu/drm/radeon/evergreen.c bool evergreen_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 4093 drivers/gpu/drm/radeon/evergreen.c u32 reset_mask = evergreen_gpu_check_soft_reset(rdev); rdev 4098 drivers/gpu/drm/radeon/evergreen.c radeon_ring_lockup_update(rdev, ring); rdev 4101 drivers/gpu/drm/radeon/evergreen.c return radeon_ring_test_lockup(rdev, ring); rdev 4110 drivers/gpu/drm/radeon/evergreen.c void sumo_rlc_fini(struct radeon_device *rdev) rdev 4115 drivers/gpu/drm/radeon/evergreen.c if (rdev->rlc.save_restore_obj) { rdev 4116 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_reserve(rdev->rlc.save_restore_obj, false); rdev 4118 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) reserve RLC sr bo failed\n", r); rdev 4119 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unpin(rdev->rlc.save_restore_obj); rdev 4120 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.save_restore_obj); rdev 4122 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unref(&rdev->rlc.save_restore_obj); rdev 4123 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.save_restore_obj = NULL; rdev 4127 drivers/gpu/drm/radeon/evergreen.c if (rdev->rlc.clear_state_obj) { rdev 4128 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false); rdev 4130 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) reserve RLC c bo failed\n", r); rdev 4131 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unpin(rdev->rlc.clear_state_obj); rdev 4132 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.clear_state_obj); rdev 4134 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unref(&rdev->rlc.clear_state_obj); rdev 4135 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.clear_state_obj = NULL; rdev 4139 drivers/gpu/drm/radeon/evergreen.c if (rdev->rlc.cp_table_obj) { rdev 4140 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_reserve(rdev->rlc.cp_table_obj, false); rdev 4142 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) reserve RLC cp table bo failed\n", r); rdev 4143 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unpin(rdev->rlc.cp_table_obj); rdev 4144 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.cp_table_obj); rdev 4146 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unref(&rdev->rlc.cp_table_obj); rdev 4147 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.cp_table_obj = NULL; rdev 4153 drivers/gpu/drm/radeon/evergreen.c int sumo_rlc_init(struct radeon_device *rdev) rdev 4163 drivers/gpu/drm/radeon/evergreen.c src_ptr = rdev->rlc.reg_list; rdev 4164 drivers/gpu/drm/radeon/evergreen.c dws = rdev->rlc.reg_list_size; rdev 4165 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_BONAIRE) { rdev 4168 drivers/gpu/drm/radeon/evergreen.c cs_data = rdev->rlc.cs_data; rdev 4172 drivers/gpu/drm/radeon/evergreen.c if (rdev->rlc.save_restore_obj == NULL) { rdev 4173 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_create(rdev, dws * 4, PAGE_SIZE, true, rdev 4175 drivers/gpu/drm/radeon/evergreen.c NULL, &rdev->rlc.save_restore_obj); rdev 4177 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) create RLC sr bo failed\n", r); rdev 4182 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_reserve(rdev->rlc.save_restore_obj, false); rdev 4184 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4187 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_pin(rdev->rlc.save_restore_obj, RADEON_GEM_DOMAIN_VRAM, rdev 4188 drivers/gpu/drm/radeon/evergreen.c &rdev->rlc.save_restore_gpu_addr); rdev 4190 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.save_restore_obj); rdev 4191 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) pin RLC sr bo failed\n", r); rdev 4192 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4196 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_kmap(rdev->rlc.save_restore_obj, (void **)&rdev->rlc.sr_ptr); rdev 4198 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) map RLC sr bo failed\n", r); rdev 4199 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4203 drivers/gpu/drm/radeon/evergreen.c dst_ptr = rdev->rlc.sr_ptr; rdev 4204 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_TAHITI) { rdev 4206 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->rlc.reg_list_size; i++) rdev 4226 drivers/gpu/drm/radeon/evergreen.c radeon_bo_kunmap(rdev->rlc.save_restore_obj); rdev 4227 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.save_restore_obj); rdev 4232 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_BONAIRE) { rdev 4233 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.clear_state_size = dws = cik_get_csb_size(rdev); rdev 4234 drivers/gpu/drm/radeon/evergreen.c } else if (rdev->family >= CHIP_TAHITI) { rdev 4235 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.clear_state_size = si_get_csb_size(rdev); rdev 4236 drivers/gpu/drm/radeon/evergreen.c dws = rdev->rlc.clear_state_size + (256 / 4); rdev 4248 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.clear_state_size = dws; rdev 4251 drivers/gpu/drm/radeon/evergreen.c if (rdev->rlc.clear_state_obj == NULL) { rdev 4252 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_create(rdev, dws * 4, PAGE_SIZE, true, rdev 4254 drivers/gpu/drm/radeon/evergreen.c NULL, &rdev->rlc.clear_state_obj); rdev 4256 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) create RLC c bo failed\n", r); rdev 4257 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4261 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false); rdev 4263 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4266 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_pin(rdev->rlc.clear_state_obj, RADEON_GEM_DOMAIN_VRAM, rdev 4267 drivers/gpu/drm/radeon/evergreen.c &rdev->rlc.clear_state_gpu_addr); rdev 4269 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.clear_state_obj); rdev 4270 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) pin RLC c bo failed\n", r); rdev 4271 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4275 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_kmap(rdev->rlc.clear_state_obj, (void **)&rdev->rlc.cs_ptr); rdev 4277 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) map RLC c bo failed\n", r); rdev 4278 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4282 drivers/gpu/drm/radeon/evergreen.c dst_ptr = rdev->rlc.cs_ptr; rdev 4283 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_BONAIRE) { rdev 4284 drivers/gpu/drm/radeon/evergreen.c cik_get_csb_buffer(rdev, dst_ptr); rdev 4285 drivers/gpu/drm/radeon/evergreen.c } else if (rdev->family >= CHIP_TAHITI) { rdev 4286 drivers/gpu/drm/radeon/evergreen.c reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256; rdev 4289 drivers/gpu/drm/radeon/evergreen.c dst_ptr[2] = cpu_to_le32(rdev->rlc.clear_state_size); rdev 4290 drivers/gpu/drm/radeon/evergreen.c si_get_csb_buffer(rdev, &dst_ptr[(256/4)]); rdev 4293 drivers/gpu/drm/radeon/evergreen.c reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4); rdev 4322 drivers/gpu/drm/radeon/evergreen.c radeon_bo_kunmap(rdev->rlc.clear_state_obj); rdev 4323 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.clear_state_obj); rdev 4326 drivers/gpu/drm/radeon/evergreen.c if (rdev->rlc.cp_table_size) { rdev 4327 drivers/gpu/drm/radeon/evergreen.c if (rdev->rlc.cp_table_obj == NULL) { rdev 4328 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_create(rdev, rdev->rlc.cp_table_size, rdev 4331 drivers/gpu/drm/radeon/evergreen.c NULL, &rdev->rlc.cp_table_obj); rdev 4333 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) create RLC cp table bo failed\n", r); rdev 4334 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4339 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_reserve(rdev->rlc.cp_table_obj, false); rdev 4341 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) reserve RLC cp table bo failed\n", r); rdev 4342 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4345 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_pin(rdev->rlc.cp_table_obj, RADEON_GEM_DOMAIN_VRAM, rdev 4346 drivers/gpu/drm/radeon/evergreen.c &rdev->rlc.cp_table_gpu_addr); rdev 4348 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.cp_table_obj); rdev 4349 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) pin RLC cp_table bo failed\n", r); rdev 4350 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4353 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_kmap(rdev->rlc.cp_table_obj, (void **)&rdev->rlc.cp_table_ptr); rdev 4355 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "(%d) map RLC cp table bo failed\n", r); rdev 4356 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 4360 drivers/gpu/drm/radeon/evergreen.c cik_init_cp_pg_table(rdev); rdev 4362 drivers/gpu/drm/radeon/evergreen.c radeon_bo_kunmap(rdev->rlc.cp_table_obj); rdev 4363 drivers/gpu/drm/radeon/evergreen.c radeon_bo_unreserve(rdev->rlc.cp_table_obj); rdev 4370 drivers/gpu/drm/radeon/evergreen.c static void evergreen_rlc_start(struct radeon_device *rdev) rdev 4374 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) { rdev 4381 drivers/gpu/drm/radeon/evergreen.c int evergreen_rlc_resume(struct radeon_device *rdev) rdev 4386 drivers/gpu/drm/radeon/evergreen.c if (!rdev->rlc_fw) rdev 4389 drivers/gpu/drm/radeon/evergreen.c r600_rlc_stop(rdev); rdev 4393 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) { rdev 4394 drivers/gpu/drm/radeon/evergreen.c if (rdev->family == CHIP_ARUBA) { rdev 4396 drivers/gpu/drm/radeon/evergreen.c 3 | (3 << (16 * rdev->config.cayman.max_shader_engines)); rdev 4399 drivers/gpu/drm/radeon/evergreen.c tmp |= 0xffffffff << rdev->config.cayman.max_simds_per_se; rdev 4401 drivers/gpu/drm/radeon/evergreen.c if (tmp == rdev->config.cayman.max_simds_per_se) { rdev 4412 drivers/gpu/drm/radeon/evergreen.c WREG32(TN_RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); rdev 4413 drivers/gpu/drm/radeon/evergreen.c WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); rdev 4424 drivers/gpu/drm/radeon/evergreen.c fw_data = (const __be32 *)rdev->rlc_fw->data; rdev 4425 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_ARUBA) { rdev 4430 drivers/gpu/drm/radeon/evergreen.c } else if (rdev->family >= CHIP_CAYMAN) { rdev 4443 drivers/gpu/drm/radeon/evergreen.c evergreen_rlc_start(rdev); rdev 4450 drivers/gpu/drm/radeon/evergreen.c u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc) rdev 4452 drivers/gpu/drm/radeon/evergreen.c if (crtc >= rdev->num_crtc) rdev 4458 drivers/gpu/drm/radeon/evergreen.c void evergreen_disable_interrupt_state(struct radeon_device *rdev) rdev 4463 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) { rdev 4464 drivers/gpu/drm/radeon/evergreen.c cayman_cp_int_cntl_setup(rdev, 0, rdev 4466 drivers/gpu/drm/radeon/evergreen.c cayman_cp_int_cntl_setup(rdev, 1, 0); rdev 4467 drivers/gpu/drm/radeon/evergreen.c cayman_cp_int_cntl_setup(rdev, 2, 0); rdev 4476 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) rdev 4478 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) rdev 4482 drivers/gpu/drm/radeon/evergreen.c if (!ASIC_IS_DCE5(rdev)) rdev 4491 drivers/gpu/drm/radeon/evergreen.c int evergreen_irq_set(struct radeon_device *rdev) rdev 4500 drivers/gpu/drm/radeon/evergreen.c if (!rdev->irq.installed) { rdev 4505 drivers/gpu/drm/radeon/evergreen.c if (!rdev->ih.enabled) { rdev 4506 drivers/gpu/drm/radeon/evergreen.c r600_disable_interrupts(rdev); rdev 4508 drivers/gpu/drm/radeon/evergreen.c evergreen_disable_interrupt_state(rdev); rdev 4512 drivers/gpu/drm/radeon/evergreen.c if (rdev->family == CHIP_ARUBA) rdev 4521 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) { rdev 4523 drivers/gpu/drm/radeon/evergreen.c if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { rdev 4527 drivers/gpu/drm/radeon/evergreen.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP1_INDEX])) { rdev 4531 drivers/gpu/drm/radeon/evergreen.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP2_INDEX])) { rdev 4536 drivers/gpu/drm/radeon/evergreen.c if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { rdev 4543 drivers/gpu/drm/radeon/evergreen.c if (atomic_read(&rdev->irq.ring_int[R600_RING_TYPE_DMA_INDEX])) { rdev 4548 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) { rdev 4550 drivers/gpu/drm/radeon/evergreen.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_DMA1_INDEX])) { rdev 4556 drivers/gpu/drm/radeon/evergreen.c if (rdev->irq.dpm_thermal) { rdev 4561 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) { rdev 4562 drivers/gpu/drm/radeon/evergreen.c cayman_cp_int_cntl_setup(rdev, 0, cp_int_cntl); rdev 4563 drivers/gpu/drm/radeon/evergreen.c cayman_cp_int_cntl_setup(rdev, 1, cp_int_cntl1); rdev 4564 drivers/gpu/drm/radeon/evergreen.c cayman_cp_int_cntl_setup(rdev, 2, cp_int_cntl2); rdev 4570 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) rdev 4575 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) { rdev 4577 drivers/gpu/drm/radeon/evergreen.c rdev, INT_MASK + crtc_offsets[i], rdev 4579 drivers/gpu/drm/radeon/evergreen.c rdev->irq.crtc_vblank_int[i] || rdev 4580 drivers/gpu/drm/radeon/evergreen.c atomic_read(&rdev->irq.pflip[i]), "vblank", i); rdev 4583 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i++) rdev 4588 drivers/gpu/drm/radeon/evergreen.c rdev, DC_HPDx_INT_CONTROL(i), rdev 4590 drivers/gpu/drm/radeon/evergreen.c rdev->irq.hpd[i], "HPD", i); rdev 4593 drivers/gpu/drm/radeon/evergreen.c if (rdev->family == CHIP_ARUBA) rdev 4600 drivers/gpu/drm/radeon/evergreen.c rdev, AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i], rdev 4602 drivers/gpu/drm/radeon/evergreen.c rdev->irq.afmt[i], "HDMI", i); rdev 4612 drivers/gpu/drm/radeon/evergreen.c static void evergreen_irq_ack(struct radeon_device *rdev) rdev 4615 drivers/gpu/drm/radeon/evergreen.c u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int; rdev 4616 drivers/gpu/drm/radeon/evergreen.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; rdev 4617 drivers/gpu/drm/radeon/evergreen.c u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status; rdev 4622 drivers/gpu/drm/radeon/evergreen.c if (i < rdev->num_crtc) rdev 4627 drivers/gpu/drm/radeon/evergreen.c for (i = 0; i < rdev->num_crtc; i += 2) { rdev 4661 drivers/gpu/drm/radeon/evergreen.c static void evergreen_irq_disable(struct radeon_device *rdev) rdev 4663 drivers/gpu/drm/radeon/evergreen.c r600_disable_interrupts(rdev); rdev 4666 drivers/gpu/drm/radeon/evergreen.c evergreen_irq_ack(rdev); rdev 4667 drivers/gpu/drm/radeon/evergreen.c evergreen_disable_interrupt_state(rdev); rdev 4670 drivers/gpu/drm/radeon/evergreen.c void evergreen_irq_suspend(struct radeon_device *rdev) rdev 4672 drivers/gpu/drm/radeon/evergreen.c evergreen_irq_disable(rdev); rdev 4673 drivers/gpu/drm/radeon/evergreen.c r600_rlc_stop(rdev); rdev 4676 drivers/gpu/drm/radeon/evergreen.c static u32 evergreen_get_ih_wptr(struct radeon_device *rdev) rdev 4680 drivers/gpu/drm/radeon/evergreen.c if (rdev->wb.enabled) rdev 4681 drivers/gpu/drm/radeon/evergreen.c wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]); rdev 4691 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", rdev 4692 drivers/gpu/drm/radeon/evergreen.c wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask); rdev 4693 drivers/gpu/drm/radeon/evergreen.c rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask; rdev 4698 drivers/gpu/drm/radeon/evergreen.c return (wptr & rdev->ih.ptr_mask); rdev 4701 drivers/gpu/drm/radeon/evergreen.c int evergreen_irq_process(struct radeon_device *rdev) rdev 4703 drivers/gpu/drm/radeon/evergreen.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; rdev 4704 drivers/gpu/drm/radeon/evergreen.c u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status; rdev 4718 drivers/gpu/drm/radeon/evergreen.c if (!rdev->ih.enabled || rdev->shutdown) rdev 4721 drivers/gpu/drm/radeon/evergreen.c wptr = evergreen_get_ih_wptr(rdev); rdev 4725 drivers/gpu/drm/radeon/evergreen.c if (atomic_xchg(&rdev->ih.lock, 1)) rdev 4728 drivers/gpu/drm/radeon/evergreen.c rptr = rdev->ih.rptr; rdev 4735 drivers/gpu/drm/radeon/evergreen.c evergreen_irq_ack(rdev); rdev 4740 drivers/gpu/drm/radeon/evergreen.c src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff; rdev 4741 drivers/gpu/drm/radeon/evergreen.c src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff; rdev 4756 drivers/gpu/drm/radeon/evergreen.c if (rdev->irq.crtc_vblank_int[crtc_idx]) { rdev 4757 drivers/gpu/drm/radeon/evergreen.c drm_handle_vblank(rdev->ddev, crtc_idx); rdev 4758 drivers/gpu/drm/radeon/evergreen.c rdev->pm.vblank_sync = true; rdev 4759 drivers/gpu/drm/radeon/evergreen.c wake_up(&rdev->irq.vblank_queue); rdev 4761 drivers/gpu/drm/radeon/evergreen.c if (atomic_read(&rdev->irq.pflip[crtc_idx])) { rdev 4762 drivers/gpu/drm/radeon/evergreen.c radeon_crtc_handle_vblank(rdev, rdev 4792 drivers/gpu/drm/radeon/evergreen.c radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1); rdev 4840 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); rdev 4850 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); rdev 4851 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", rdev 4853 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", rdev 4855 drivers/gpu/drm/radeon/evergreen.c cayman_vm_decode_fault(rdev, status, addr); rdev 4861 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 4865 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) { rdev 4868 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 4871 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX); rdev 4874 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP2_INDEX); rdev 4878 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 4882 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, R600_RING_TYPE_DMA_INDEX); rdev 4886 drivers/gpu/drm/radeon/evergreen.c rdev->pm.dpm.thermal.high_to_low = false; rdev 4891 drivers/gpu/drm/radeon/evergreen.c rdev->pm.dpm.thermal.high_to_low = true; rdev 4898 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_CAYMAN) { rdev 4900 drivers/gpu/drm/radeon/evergreen.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_DMA1_INDEX); rdev 4910 drivers/gpu/drm/radeon/evergreen.c rptr &= rdev->ih.ptr_mask; rdev 4914 drivers/gpu/drm/radeon/evergreen.c schedule_work(&rdev->dp_work); rdev 4916 drivers/gpu/drm/radeon/evergreen.c schedule_delayed_work(&rdev->hotplug_work, 0); rdev 4918 drivers/gpu/drm/radeon/evergreen.c schedule_work(&rdev->audio_work); rdev 4919 drivers/gpu/drm/radeon/evergreen.c if (queue_thermal && rdev->pm.dpm_enabled) rdev 4920 drivers/gpu/drm/radeon/evergreen.c schedule_work(&rdev->pm.dpm.thermal.work); rdev 4921 drivers/gpu/drm/radeon/evergreen.c rdev->ih.rptr = rptr; rdev 4922 drivers/gpu/drm/radeon/evergreen.c atomic_set(&rdev->ih.lock, 0); rdev 4925 drivers/gpu/drm/radeon/evergreen.c wptr = evergreen_get_ih_wptr(rdev); rdev 4932 drivers/gpu/drm/radeon/evergreen.c static void evergreen_uvd_init(struct radeon_device *rdev) rdev 4936 drivers/gpu/drm/radeon/evergreen.c if (!rdev->has_uvd) rdev 4939 drivers/gpu/drm/radeon/evergreen.c r = radeon_uvd_init(rdev); rdev 4941 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "failed UVD (%d) init.\n", r); rdev 4948 drivers/gpu/drm/radeon/evergreen.c rdev->has_uvd = 0; rdev 4951 drivers/gpu/drm/radeon/evergreen.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_obj = NULL; rdev 4952 drivers/gpu/drm/radeon/evergreen.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], 4096); rdev 4955 drivers/gpu/drm/radeon/evergreen.c static void evergreen_uvd_start(struct radeon_device *rdev) rdev 4959 drivers/gpu/drm/radeon/evergreen.c if (!rdev->has_uvd) rdev 4962 drivers/gpu/drm/radeon/evergreen.c r = uvd_v2_2_resume(rdev); rdev 4964 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "failed UVD resume (%d).\n", r); rdev 4967 drivers/gpu/drm/radeon/evergreen.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_UVD_INDEX); rdev 4969 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "failed initializing UVD fences (%d).\n", r); rdev 4975 drivers/gpu/drm/radeon/evergreen.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; rdev 4978 drivers/gpu/drm/radeon/evergreen.c static void evergreen_uvd_resume(struct radeon_device *rdev) rdev 4983 drivers/gpu/drm/radeon/evergreen.c if (!rdev->has_uvd || !rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size) rdev 4986 drivers/gpu/drm/radeon/evergreen.c ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 4987 drivers/gpu/drm/radeon/evergreen.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, PACKET0(UVD_NO_OP, 0)); rdev 4989 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "failed initializing UVD ring (%d).\n", r); rdev 4992 drivers/gpu/drm/radeon/evergreen.c r = uvd_v1_0_init(rdev); rdev 4994 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "failed initializing UVD (%d).\n", r); rdev 4999 drivers/gpu/drm/radeon/evergreen.c static int evergreen_startup(struct radeon_device *rdev) rdev 5005 drivers/gpu/drm/radeon/evergreen.c evergreen_pcie_gen2_enable(rdev); rdev 5007 drivers/gpu/drm/radeon/evergreen.c evergreen_program_aspm(rdev); rdev 5010 drivers/gpu/drm/radeon/evergreen.c r = r600_vram_scratch_init(rdev); rdev 5014 drivers/gpu/drm/radeon/evergreen.c evergreen_mc_program(rdev); rdev 5016 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev) && !rdev->pm.dpm_enabled) { rdev 5017 drivers/gpu/drm/radeon/evergreen.c r = ni_mc_load_microcode(rdev); rdev 5024 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_AGP) { rdev 5025 drivers/gpu/drm/radeon/evergreen.c evergreen_agp_enable(rdev); rdev 5027 drivers/gpu/drm/radeon/evergreen.c r = evergreen_pcie_gart_enable(rdev); rdev 5031 drivers/gpu/drm/radeon/evergreen.c evergreen_gpu_init(rdev); rdev 5034 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) { rdev 5035 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.reg_list = sumo_rlc_save_restore_register_list; rdev 5036 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.reg_list_size = rdev 5038 drivers/gpu/drm/radeon/evergreen.c rdev->rlc.cs_data = evergreen_cs_data; rdev 5039 drivers/gpu/drm/radeon/evergreen.c r = sumo_rlc_init(rdev); rdev 5047 drivers/gpu/drm/radeon/evergreen.c r = radeon_wb_init(rdev); rdev 5051 drivers/gpu/drm/radeon/evergreen.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 5053 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 5057 drivers/gpu/drm/radeon/evergreen.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_DMA_INDEX); rdev 5059 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 5063 drivers/gpu/drm/radeon/evergreen.c evergreen_uvd_start(rdev); rdev 5066 drivers/gpu/drm/radeon/evergreen.c if (!rdev->irq.installed) { rdev 5067 drivers/gpu/drm/radeon/evergreen.c r = radeon_irq_kms_init(rdev); rdev 5072 drivers/gpu/drm/radeon/evergreen.c r = r600_irq_init(rdev); rdev 5075 drivers/gpu/drm/radeon/evergreen.c radeon_irq_kms_fini(rdev); rdev 5078 drivers/gpu/drm/radeon/evergreen.c evergreen_irq_set(rdev); rdev 5080 drivers/gpu/drm/radeon/evergreen.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 5081 drivers/gpu/drm/radeon/evergreen.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, rdev 5086 drivers/gpu/drm/radeon/evergreen.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 5087 drivers/gpu/drm/radeon/evergreen.c r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, rdev 5092 drivers/gpu/drm/radeon/evergreen.c r = evergreen_cp_load_microcode(rdev); rdev 5095 drivers/gpu/drm/radeon/evergreen.c r = evergreen_cp_resume(rdev); rdev 5098 drivers/gpu/drm/radeon/evergreen.c r = r600_dma_resume(rdev); rdev 5102 drivers/gpu/drm/radeon/evergreen.c evergreen_uvd_resume(rdev); rdev 5104 drivers/gpu/drm/radeon/evergreen.c r = radeon_ib_pool_init(rdev); rdev 5106 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 5110 drivers/gpu/drm/radeon/evergreen.c r = radeon_audio_init(rdev); rdev 5119 drivers/gpu/drm/radeon/evergreen.c int evergreen_resume(struct radeon_device *rdev) rdev 5126 drivers/gpu/drm/radeon/evergreen.c if (radeon_asic_reset(rdev)) rdev 5127 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "GPU reset failed !\n"); rdev 5133 drivers/gpu/drm/radeon/evergreen.c atom_asic_init(rdev->mode_info.atom_context); rdev 5136 drivers/gpu/drm/radeon/evergreen.c evergreen_init_golden_registers(rdev); rdev 5138 drivers/gpu/drm/radeon/evergreen.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 5139 drivers/gpu/drm/radeon/evergreen.c radeon_pm_resume(rdev); rdev 5141 drivers/gpu/drm/radeon/evergreen.c rdev->accel_working = true; rdev 5142 drivers/gpu/drm/radeon/evergreen.c r = evergreen_startup(rdev); rdev 5145 drivers/gpu/drm/radeon/evergreen.c rdev->accel_working = false; rdev 5153 drivers/gpu/drm/radeon/evergreen.c int evergreen_suspend(struct radeon_device *rdev) rdev 5155 drivers/gpu/drm/radeon/evergreen.c radeon_pm_suspend(rdev); rdev 5156 drivers/gpu/drm/radeon/evergreen.c radeon_audio_fini(rdev); rdev 5157 drivers/gpu/drm/radeon/evergreen.c if (rdev->has_uvd) { rdev 5158 drivers/gpu/drm/radeon/evergreen.c uvd_v1_0_fini(rdev); rdev 5159 drivers/gpu/drm/radeon/evergreen.c radeon_uvd_suspend(rdev); rdev 5161 drivers/gpu/drm/radeon/evergreen.c r700_cp_stop(rdev); rdev 5162 drivers/gpu/drm/radeon/evergreen.c r600_dma_stop(rdev); rdev 5163 drivers/gpu/drm/radeon/evergreen.c evergreen_irq_suspend(rdev); rdev 5164 drivers/gpu/drm/radeon/evergreen.c radeon_wb_disable(rdev); rdev 5165 drivers/gpu/drm/radeon/evergreen.c evergreen_pcie_gart_disable(rdev); rdev 5176 drivers/gpu/drm/radeon/evergreen.c int evergreen_init(struct radeon_device *rdev) rdev 5181 drivers/gpu/drm/radeon/evergreen.c if (!radeon_get_bios(rdev)) { rdev 5182 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_AVIVO(rdev)) rdev 5186 drivers/gpu/drm/radeon/evergreen.c if (!rdev->is_atom_bios) { rdev 5187 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "Expecting atombios for evergreen GPU\n"); rdev 5190 drivers/gpu/drm/radeon/evergreen.c r = radeon_atombios_init(rdev); rdev 5196 drivers/gpu/drm/radeon/evergreen.c if (radeon_asic_reset(rdev)) rdev 5197 drivers/gpu/drm/radeon/evergreen.c dev_warn(rdev->dev, "GPU reset failed !\n"); rdev 5199 drivers/gpu/drm/radeon/evergreen.c if (!radeon_card_posted(rdev)) { rdev 5200 drivers/gpu/drm/radeon/evergreen.c if (!rdev->bios) { rdev 5201 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); rdev 5205 drivers/gpu/drm/radeon/evergreen.c atom_asic_init(rdev->mode_info.atom_context); rdev 5208 drivers/gpu/drm/radeon/evergreen.c evergreen_init_golden_registers(rdev); rdev 5210 drivers/gpu/drm/radeon/evergreen.c r600_scratch_init(rdev); rdev 5212 drivers/gpu/drm/radeon/evergreen.c radeon_surface_init(rdev); rdev 5214 drivers/gpu/drm/radeon/evergreen.c radeon_get_clock_info(rdev->ddev); rdev 5216 drivers/gpu/drm/radeon/evergreen.c r = radeon_fence_driver_init(rdev); rdev 5220 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_AGP) { rdev 5221 drivers/gpu/drm/radeon/evergreen.c r = radeon_agp_init(rdev); rdev 5223 drivers/gpu/drm/radeon/evergreen.c radeon_agp_disable(rdev); rdev 5226 drivers/gpu/drm/radeon/evergreen.c r = evergreen_mc_init(rdev); rdev 5230 drivers/gpu/drm/radeon/evergreen.c r = radeon_bo_init(rdev); rdev 5234 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev)) { rdev 5235 drivers/gpu/drm/radeon/evergreen.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw || !rdev->mc_fw) { rdev 5236 drivers/gpu/drm/radeon/evergreen.c r = ni_init_microcode(rdev); rdev 5243 drivers/gpu/drm/radeon/evergreen.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { rdev 5244 drivers/gpu/drm/radeon/evergreen.c r = r600_init_microcode(rdev); rdev 5253 drivers/gpu/drm/radeon/evergreen.c radeon_pm_init(rdev); rdev 5255 drivers/gpu/drm/radeon/evergreen.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; rdev 5256 drivers/gpu/drm/radeon/evergreen.c r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); rdev 5258 drivers/gpu/drm/radeon/evergreen.c rdev->ring[R600_RING_TYPE_DMA_INDEX].ring_obj = NULL; rdev 5259 drivers/gpu/drm/radeon/evergreen.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX], 64 * 1024); rdev 5261 drivers/gpu/drm/radeon/evergreen.c evergreen_uvd_init(rdev); rdev 5263 drivers/gpu/drm/radeon/evergreen.c rdev->ih.ring_obj = NULL; rdev 5264 drivers/gpu/drm/radeon/evergreen.c r600_ih_ring_init(rdev, 64 * 1024); rdev 5266 drivers/gpu/drm/radeon/evergreen.c r = r600_pcie_gart_init(rdev); rdev 5270 drivers/gpu/drm/radeon/evergreen.c rdev->accel_working = true; rdev 5271 drivers/gpu/drm/radeon/evergreen.c r = evergreen_startup(rdev); rdev 5273 drivers/gpu/drm/radeon/evergreen.c dev_err(rdev->dev, "disabling GPU acceleration\n"); rdev 5274 drivers/gpu/drm/radeon/evergreen.c r700_cp_fini(rdev); rdev 5275 drivers/gpu/drm/radeon/evergreen.c r600_dma_fini(rdev); rdev 5276 drivers/gpu/drm/radeon/evergreen.c r600_irq_fini(rdev); rdev 5277 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) rdev 5278 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 5279 drivers/gpu/drm/radeon/evergreen.c radeon_wb_fini(rdev); rdev 5280 drivers/gpu/drm/radeon/evergreen.c radeon_ib_pool_fini(rdev); rdev 5281 drivers/gpu/drm/radeon/evergreen.c radeon_irq_kms_fini(rdev); rdev 5282 drivers/gpu/drm/radeon/evergreen.c evergreen_pcie_gart_fini(rdev); rdev 5283 drivers/gpu/drm/radeon/evergreen.c rdev->accel_working = false; rdev 5290 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_DCE5(rdev)) { rdev 5291 drivers/gpu/drm/radeon/evergreen.c if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) { rdev 5300 drivers/gpu/drm/radeon/evergreen.c void evergreen_fini(struct radeon_device *rdev) rdev 5302 drivers/gpu/drm/radeon/evergreen.c radeon_pm_fini(rdev); rdev 5303 drivers/gpu/drm/radeon/evergreen.c radeon_audio_fini(rdev); rdev 5304 drivers/gpu/drm/radeon/evergreen.c r700_cp_fini(rdev); rdev 5305 drivers/gpu/drm/radeon/evergreen.c r600_dma_fini(rdev); rdev 5306 drivers/gpu/drm/radeon/evergreen.c r600_irq_fini(rdev); rdev 5307 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) rdev 5308 drivers/gpu/drm/radeon/evergreen.c sumo_rlc_fini(rdev); rdev 5309 drivers/gpu/drm/radeon/evergreen.c radeon_wb_fini(rdev); rdev 5310 drivers/gpu/drm/radeon/evergreen.c radeon_ib_pool_fini(rdev); rdev 5311 drivers/gpu/drm/radeon/evergreen.c radeon_irq_kms_fini(rdev); rdev 5312 drivers/gpu/drm/radeon/evergreen.c uvd_v1_0_fini(rdev); rdev 5313 drivers/gpu/drm/radeon/evergreen.c radeon_uvd_fini(rdev); rdev 5314 drivers/gpu/drm/radeon/evergreen.c evergreen_pcie_gart_fini(rdev); rdev 5315 drivers/gpu/drm/radeon/evergreen.c r600_vram_scratch_fini(rdev); rdev 5316 drivers/gpu/drm/radeon/evergreen.c radeon_gem_fini(rdev); rdev 5317 drivers/gpu/drm/radeon/evergreen.c radeon_fence_driver_fini(rdev); rdev 5318 drivers/gpu/drm/radeon/evergreen.c radeon_agp_fini(rdev); rdev 5319 drivers/gpu/drm/radeon/evergreen.c radeon_bo_fini(rdev); rdev 5320 drivers/gpu/drm/radeon/evergreen.c radeon_atombios_fini(rdev); rdev 5321 drivers/gpu/drm/radeon/evergreen.c kfree(rdev->bios); rdev 5322 drivers/gpu/drm/radeon/evergreen.c rdev->bios = NULL; rdev 5325 drivers/gpu/drm/radeon/evergreen.c void evergreen_pcie_gen2_enable(struct radeon_device *rdev) rdev 5332 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) rdev 5335 drivers/gpu/drm/radeon/evergreen.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 5339 drivers/gpu/drm/radeon/evergreen.c if (ASIC_IS_X2(rdev)) rdev 5342 drivers/gpu/drm/radeon/evergreen.c if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) && rdev 5343 drivers/gpu/drm/radeon/evergreen.c (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT)) rdev 5388 drivers/gpu/drm/radeon/evergreen.c void evergreen_program_aspm(struct radeon_device *rdev) rdev 5403 drivers/gpu/drm/radeon/evergreen.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 5406 drivers/gpu/drm/radeon/evergreen.c switch (rdev->family) { rdev 5423 drivers/gpu/drm/radeon/evergreen.c if (rdev->flags & RADEON_IS_IGP) rdev 5445 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_BARTS) rdev 5452 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_BARTS) rdev 5482 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_BARTS) { rdev 5514 drivers/gpu/drm/radeon/evergreen.c if (rdev->family >= CHIP_BARTS) { rdev 5531 drivers/gpu/drm/radeon/evergreen.c if (rdev->family < CHIP_BARTS) rdev 1156 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family < CHIP_CAYMAN) { rdev 1163 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family < CHIP_CAYMAN) { rdev 1312 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family >= CHIP_CAYMAN) { rdev 1321 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family < CHIP_CAYMAN) { rdev 1711 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family >= CHIP_CAYMAN) { rdev 1725 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family < CHIP_CAYMAN) { rdev 1842 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family < CHIP_CAYMAN) { rdev 2418 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { rdev 2685 drivers/gpu/drm/radeon/evergreen_cs.c if (p->rdev->family >= CHIP_CAYMAN) { rdev 2686 drivers/gpu/drm/radeon/evergreen_cs.c tmp = p->rdev->config.cayman.tile_config; rdev 2689 drivers/gpu/drm/radeon/evergreen_cs.c tmp = p->rdev->config.evergreen.tile_config; rdev 3348 drivers/gpu/drm/radeon/evergreen_cs.c static int evergreen_vm_packet3_check(struct radeon_device *rdev, rdev 3521 drivers/gpu/drm/radeon/evergreen_cs.c int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib) rdev 3534 drivers/gpu/drm/radeon/evergreen_cs.c dev_err(rdev->dev, "Packet0 not allowed!\n"); rdev 3542 drivers/gpu/drm/radeon/evergreen_cs.c ret = evergreen_vm_packet3_check(rdev, ib->ptr, &pkt); rdev 3546 drivers/gpu/drm/radeon/evergreen_cs.c dev_err(rdev->dev, "Unknown packet type %d !\n", pkt.type); rdev 3566 drivers/gpu/drm/radeon/evergreen_cs.c int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib) rdev 29 drivers/gpu/drm/radeon/evergreen_dma.c u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev); rdev 41 drivers/gpu/drm/radeon/evergreen_dma.c void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, rdev 44 drivers/gpu/drm/radeon/evergreen_dma.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 45 drivers/gpu/drm/radeon/evergreen_dma.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 67 drivers/gpu/drm/radeon/evergreen_dma.c void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, rdev 70 drivers/gpu/drm/radeon/evergreen_dma.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 72 drivers/gpu/drm/radeon/evergreen_dma.c if (rdev->wb.enabled) { rdev 107 drivers/gpu/drm/radeon/evergreen_dma.c struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, rdev 115 drivers/gpu/drm/radeon/evergreen_dma.c int ring_index = rdev->asic->copy.dma_ring_index; rdev 116 drivers/gpu/drm/radeon/evergreen_dma.c struct radeon_ring *ring = &rdev->ring[ring_index]; rdev 125 drivers/gpu/drm/radeon/evergreen_dma.c r = radeon_ring_lock(rdev, ring, num_loops * 5 + 11); rdev 128 drivers/gpu/drm/radeon/evergreen_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 132 drivers/gpu/drm/radeon/evergreen_dma.c radeon_sync_resv(rdev, &sync, resv, false); rdev 133 drivers/gpu/drm/radeon/evergreen_dma.c radeon_sync_rings(rdev, &sync, ring->idx); rdev 149 drivers/gpu/drm/radeon/evergreen_dma.c r = radeon_fence_emit(rdev, &fence, ring->idx); rdev 151 drivers/gpu/drm/radeon/evergreen_dma.c radeon_ring_unlock_undo(rdev, ring); rdev 152 drivers/gpu/drm/radeon/evergreen_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 156 drivers/gpu/drm/radeon/evergreen_dma.c radeon_ring_unlock_commit(rdev, ring, false); rdev 157 drivers/gpu/drm/radeon/evergreen_dma.c radeon_sync_free(rdev, &sync, fence); rdev 171 drivers/gpu/drm/radeon/evergreen_dma.c bool evergreen_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 173 drivers/gpu/drm/radeon/evergreen_dma.c u32 reset_mask = evergreen_gpu_check_soft_reset(rdev); rdev 176 drivers/gpu/drm/radeon/evergreen_dma.c radeon_ring_lockup_update(rdev, ring); rdev 179 drivers/gpu/drm/radeon/evergreen_dma.c return radeon_ring_test_lockup(rdev, ring); rdev 37 drivers/gpu/drm/radeon/evergreen_hdmi.c void dce4_audio_enable(struct radeon_device *rdev, rdev 71 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 100 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 122 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 140 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 159 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 208 drivers/gpu/drm/radeon/evergreen_hdmi.c void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, rdev 227 drivers/gpu/drm/radeon/evergreen_hdmi.c void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, rdev 270 drivers/gpu/drm/radeon/evergreen_hdmi.c void dce4_dp_audio_set_dto(struct radeon_device *rdev, rdev 292 drivers/gpu/drm/radeon/evergreen_hdmi.c if (ASIC_IS_DCE41(rdev)) { rdev 309 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 320 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 357 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 392 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 403 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 443 drivers/gpu/drm/radeon/evergreen_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 464 drivers/gpu/drm/radeon/evergreen_hdmi.c if (!ASIC_IS_DCE6(rdev) && radeon_connector->con_priv) { rdev 38 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_nb_dpm(struct radeon_device *rdev, rdev 40 drivers/gpu/drm/radeon/kv_dpm.c static void kv_init_graphics_levels(struct radeon_device *rdev); rdev 41 drivers/gpu/drm/radeon/kv_dpm.c static int kv_calculate_ds_divider(struct radeon_device *rdev); rdev 42 drivers/gpu/drm/radeon/kv_dpm.c static int kv_calculate_nbps_level_settings(struct radeon_device *rdev); rdev 43 drivers/gpu/drm/radeon/kv_dpm.c static int kv_calculate_dpm_settings(struct radeon_device *rdev); rdev 44 drivers/gpu/drm/radeon/kv_dpm.c static void kv_enable_new_levels(struct radeon_device *rdev); rdev 45 drivers/gpu/drm/radeon/kv_dpm.c static void kv_program_nbps_index_settings(struct radeon_device *rdev, rdev 47 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_enabled_level(struct radeon_device *rdev, u32 level); rdev 48 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_enabled_levels(struct radeon_device *rdev); rdev 49 drivers/gpu/drm/radeon/kv_dpm.c static int kv_force_dpm_highest(struct radeon_device *rdev); rdev 50 drivers/gpu/drm/radeon/kv_dpm.c static int kv_force_dpm_lowest(struct radeon_device *rdev); rdev 51 drivers/gpu/drm/radeon/kv_dpm.c static void kv_apply_state_adjust_rules(struct radeon_device *rdev, rdev 54 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_thermal_temperature_range(struct radeon_device *rdev, rdev 56 drivers/gpu/drm/radeon/kv_dpm.c static int kv_init_fps_limits(struct radeon_device *rdev); rdev 58 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); rdev 59 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate); rdev 60 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate); rdev 61 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate); rdev 63 drivers/gpu/drm/radeon/kv_dpm.c extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev); rdev 64 drivers/gpu/drm/radeon/kv_dpm.c extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); rdev 65 drivers/gpu/drm/radeon/kv_dpm.c extern void cik_update_cg(struct radeon_device *rdev, rdev 251 drivers/gpu/drm/radeon/kv_dpm.c static struct kv_power_info *kv_get_pi(struct radeon_device *rdev) rdev 253 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = rdev->pm.dpm.priv; rdev 259 drivers/gpu/drm/radeon/kv_dpm.c static void kv_program_local_cac_table(struct radeon_device *rdev, rdev 284 drivers/gpu/drm/radeon/kv_dpm.c static int kv_program_pt_config_registers(struct radeon_device *rdev, rdev 333 drivers/gpu/drm/radeon/kv_dpm.c static void kv_do_enable_didt(struct radeon_device *rdev, bool enable) rdev 335 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 375 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_didt(struct radeon_device *rdev, bool enable) rdev 377 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 384 drivers/gpu/drm/radeon/kv_dpm.c cik_enter_rlc_safe_mode(rdev); rdev 387 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_program_pt_config_registers(rdev, didt_config_kv); rdev 389 drivers/gpu/drm/radeon/kv_dpm.c cik_exit_rlc_safe_mode(rdev); rdev 394 drivers/gpu/drm/radeon/kv_dpm.c kv_do_enable_didt(rdev, enable); rdev 396 drivers/gpu/drm/radeon/kv_dpm.c cik_exit_rlc_safe_mode(rdev); rdev 403 drivers/gpu/drm/radeon/kv_dpm.c static void kv_initialize_hardware_cac_manager(struct radeon_device *rdev) rdev 405 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 410 drivers/gpu/drm/radeon/kv_dpm.c kv_program_local_cac_table(rdev, sx_local_cac_cfg_kv, sx0_cac_config_reg); rdev 414 drivers/gpu/drm/radeon/kv_dpm.c kv_program_local_cac_table(rdev, mc0_local_cac_cfg_kv, mc0_cac_config_reg); rdev 418 drivers/gpu/drm/radeon/kv_dpm.c kv_program_local_cac_table(rdev, mc1_local_cac_cfg_kv, mc1_cac_config_reg); rdev 422 drivers/gpu/drm/radeon/kv_dpm.c kv_program_local_cac_table(rdev, mc2_local_cac_cfg_kv, mc2_cac_config_reg); rdev 426 drivers/gpu/drm/radeon/kv_dpm.c kv_program_local_cac_table(rdev, mc3_local_cac_cfg_kv, mc3_cac_config_reg); rdev 430 drivers/gpu/drm/radeon/kv_dpm.c kv_program_local_cac_table(rdev, cpl_local_cac_cfg_kv, cpl_cac_config_reg); rdev 435 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_smc_cac(struct radeon_device *rdev, bool enable) rdev 437 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 442 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_EnableCac); rdev 448 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_DisableCac); rdev 456 drivers/gpu/drm/radeon/kv_dpm.c static int kv_process_firmware_header(struct radeon_device *rdev) rdev 458 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 462 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_read_smc_sram_dword(rdev, SMU7_FIRMWARE_HEADER_LOCATION + rdev 469 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_read_smc_sram_dword(rdev, SMU7_FIRMWARE_HEADER_LOCATION + rdev 479 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_dpm_voltage_scaling(struct radeon_device *rdev) rdev 481 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 486 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 495 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_dpm_interval(struct radeon_device *rdev) rdev 497 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 502 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 511 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_dpm_boot_state(struct radeon_device *rdev) rdev 513 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 516 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 525 drivers/gpu/drm/radeon/kv_dpm.c static void kv_program_vc(struct radeon_device *rdev) rdev 530 drivers/gpu/drm/radeon/kv_dpm.c static void kv_clear_vc(struct radeon_device *rdev) rdev 535 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_divider_value(struct radeon_device *rdev, rdev 538 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 542 drivers/gpu/drm/radeon/kv_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 553 drivers/gpu/drm/radeon/kv_dpm.c static u32 kv_convert_vid2_to_vid7(struct radeon_device *rdev, rdev 558 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 575 drivers/gpu/drm/radeon/kv_dpm.c static u32 kv_convert_vid7_to_vid2(struct radeon_device *rdev, rdev 580 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 599 drivers/gpu/drm/radeon/kv_dpm.c static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev, rdev 605 drivers/gpu/drm/radeon/kv_dpm.c static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev, rdev 608 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 609 drivers/gpu/drm/radeon/kv_dpm.c u32 vid_8bit = kv_convert_vid2_to_vid7(rdev, rdev 613 drivers/gpu/drm/radeon/kv_dpm.c return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit); rdev 617 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_vid(struct radeon_device *rdev, u32 index, u32 vid) rdev 619 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 623 drivers/gpu/drm/radeon/kv_dpm.c cpu_to_be32(kv_convert_2bit_index_to_voltage(rdev, vid)); rdev 628 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_at(struct radeon_device *rdev, u32 index, u32 at) rdev 630 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 637 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_power_level_enable(struct radeon_device *rdev, rdev 640 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 645 drivers/gpu/drm/radeon/kv_dpm.c static void kv_start_dpm(struct radeon_device *rdev) rdev 652 drivers/gpu/drm/radeon/kv_dpm.c kv_smc_dpm_enable(rdev, true); rdev 655 drivers/gpu/drm/radeon/kv_dpm.c static void kv_stop_dpm(struct radeon_device *rdev) rdev 657 drivers/gpu/drm/radeon/kv_dpm.c kv_smc_dpm_enable(rdev, false); rdev 660 drivers/gpu/drm/radeon/kv_dpm.c static void kv_start_am(struct radeon_device *rdev) rdev 670 drivers/gpu/drm/radeon/kv_dpm.c static void kv_reset_am(struct radeon_device *rdev) rdev 679 drivers/gpu/drm/radeon/kv_dpm.c static int kv_freeze_sclk_dpm(struct radeon_device *rdev, bool freeze) rdev 681 drivers/gpu/drm/radeon/kv_dpm.c return kv_notify_message_to_smu(rdev, freeze ? rdev 685 drivers/gpu/drm/radeon/kv_dpm.c static int kv_force_lowest_valid(struct radeon_device *rdev) rdev 687 drivers/gpu/drm/radeon/kv_dpm.c return kv_force_dpm_lowest(rdev); rdev 690 drivers/gpu/drm/radeon/kv_dpm.c static int kv_unforce_levels(struct radeon_device *rdev) rdev 692 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) rdev 693 drivers/gpu/drm/radeon/kv_dpm.c return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); rdev 695 drivers/gpu/drm/radeon/kv_dpm.c return kv_set_enabled_levels(rdev); rdev 698 drivers/gpu/drm/radeon/kv_dpm.c static int kv_update_sclk_t(struct radeon_device *rdev) rdev 700 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 707 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 716 drivers/gpu/drm/radeon/kv_dpm.c static int kv_program_bootup_state(struct radeon_device *rdev) rdev 718 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 721 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 730 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_power_level_enable(rdev, i, true); rdev 744 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_power_level_enable(rdev, i, true); rdev 749 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_auto_thermal_throttling(struct radeon_device *rdev) rdev 751 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 756 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 765 drivers/gpu/drm/radeon/kv_dpm.c static int kv_upload_dpm_settings(struct radeon_device *rdev) rdev 767 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 770 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 780 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 794 drivers/gpu/drm/radeon/kv_dpm.c static u32 kv_get_clk_bypass(struct radeon_device *rdev, u32 clk) rdev 796 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 819 drivers/gpu/drm/radeon/kv_dpm.c static int kv_populate_uvd_table(struct radeon_device *rdev) rdev 821 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 823 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; rdev 842 drivers/gpu/drm/radeon/kv_dpm.c (u8)kv_get_clk_bypass(rdev, table->entries[i].vclk); rdev 844 drivers/gpu/drm/radeon/kv_dpm.c (u8)kv_get_clk_bypass(rdev, table->entries[i].dclk); rdev 846 drivers/gpu/drm/radeon/kv_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 852 drivers/gpu/drm/radeon/kv_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 861 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 871 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 879 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 890 drivers/gpu/drm/radeon/kv_dpm.c static int kv_populate_vce_table(struct radeon_device *rdev) rdev 892 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 896 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; rdev 912 drivers/gpu/drm/radeon/kv_dpm.c (u8)kv_get_clk_bypass(rdev, table->entries[i].evclk); rdev 914 drivers/gpu/drm/radeon/kv_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 923 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 934 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 943 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 953 drivers/gpu/drm/radeon/kv_dpm.c static int kv_populate_samu_table(struct radeon_device *rdev) rdev 955 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 957 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; rdev 975 drivers/gpu/drm/radeon/kv_dpm.c (u8)kv_get_clk_bypass(rdev, table->entries[i].clk); rdev 977 drivers/gpu/drm/radeon/kv_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 986 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 997 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1006 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1019 drivers/gpu/drm/radeon/kv_dpm.c static int kv_populate_acp_table(struct radeon_device *rdev) rdev 1021 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1023 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; rdev 1036 drivers/gpu/drm/radeon/kv_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 1045 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1056 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1065 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1077 drivers/gpu/drm/radeon/kv_dpm.c static void kv_calculate_dfs_bypass_settings(struct radeon_device *rdev) rdev 1079 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1082 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 1127 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_ulv(struct radeon_device *rdev, bool enable) rdev 1129 drivers/gpu/drm/radeon/kv_dpm.c return kv_notify_message_to_smu(rdev, enable ? rdev 1133 drivers/gpu/drm/radeon/kv_dpm.c static void kv_reset_acp_boot_level(struct radeon_device *rdev) rdev 1135 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1140 drivers/gpu/drm/radeon/kv_dpm.c static void kv_update_current_ps(struct radeon_device *rdev, rdev 1144 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1151 drivers/gpu/drm/radeon/kv_dpm.c static void kv_update_requested_ps(struct radeon_device *rdev, rdev 1155 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1162 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable) rdev 1164 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1168 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_smc_bapm_enable(rdev, enable); rdev 1174 drivers/gpu/drm/radeon/kv_dpm.c static void kv_enable_thermal_int(struct radeon_device *rdev, bool enable) rdev 1187 drivers/gpu/drm/radeon/kv_dpm.c int kv_dpm_enable(struct radeon_device *rdev) rdev 1189 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1192 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_process_firmware_header(rdev); rdev 1197 drivers/gpu/drm/radeon/kv_dpm.c kv_init_fps_limits(rdev); rdev 1198 drivers/gpu/drm/radeon/kv_dpm.c kv_init_graphics_levels(rdev); rdev 1199 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_program_bootup_state(rdev); rdev 1204 drivers/gpu/drm/radeon/kv_dpm.c kv_calculate_dfs_bypass_settings(rdev); rdev 1205 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_upload_dpm_settings(rdev); rdev 1210 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_populate_uvd_table(rdev); rdev 1215 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_populate_vce_table(rdev); rdev 1220 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_populate_samu_table(rdev); rdev 1225 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_populate_acp_table(rdev); rdev 1230 drivers/gpu/drm/radeon/kv_dpm.c kv_program_vc(rdev); rdev 1232 drivers/gpu/drm/radeon/kv_dpm.c kv_initialize_hardware_cac_manager(rdev); rdev 1234 drivers/gpu/drm/radeon/kv_dpm.c kv_start_am(rdev); rdev 1236 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_enable_auto_thermal_throttling(rdev); rdev 1242 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_enable_dpm_voltage_scaling(rdev); rdev 1247 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_set_dpm_interval(rdev); rdev 1252 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_set_dpm_boot_state(rdev); rdev 1257 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_enable_ulv(rdev, true); rdev 1262 drivers/gpu/drm/radeon/kv_dpm.c kv_start_dpm(rdev); rdev 1263 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_enable_didt(rdev, true); rdev 1268 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_enable_smc_cac(rdev, true); rdev 1274 drivers/gpu/drm/radeon/kv_dpm.c kv_reset_acp_boot_level(rdev); rdev 1276 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_smc_bapm_enable(rdev, false); rdev 1282 drivers/gpu/drm/radeon/kv_dpm.c kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 1287 drivers/gpu/drm/radeon/kv_dpm.c int kv_dpm_late_enable(struct radeon_device *rdev) rdev 1291 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->irq.installed && rdev 1292 drivers/gpu/drm/radeon/kv_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1293 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 1298 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_thermal_int(rdev, true); rdev 1302 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_acp(rdev, true); rdev 1303 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_samu(rdev, true); rdev 1304 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_vce(rdev, true); rdev 1305 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_uvd(rdev, true); rdev 1310 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_disable(struct radeon_device *rdev) rdev 1312 drivers/gpu/drm/radeon/kv_dpm.c kv_smc_bapm_enable(rdev, false); rdev 1314 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_MULLINS) rdev 1315 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_nb_dpm(rdev, false); rdev 1318 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_acp(rdev, false); rdev 1319 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_samu(rdev, false); rdev 1320 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_vce(rdev, false); rdev 1321 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_uvd(rdev, false); rdev 1323 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_smc_cac(rdev, false); rdev 1324 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_didt(rdev, false); rdev 1325 drivers/gpu/drm/radeon/kv_dpm.c kv_clear_vc(rdev); rdev 1326 drivers/gpu/drm/radeon/kv_dpm.c kv_stop_dpm(rdev); rdev 1327 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_ulv(rdev, false); rdev 1328 drivers/gpu/drm/radeon/kv_dpm.c kv_reset_am(rdev); rdev 1329 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_thermal_int(rdev, false); rdev 1331 drivers/gpu/drm/radeon/kv_dpm.c kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 1335 drivers/gpu/drm/radeon/kv_dpm.c static int kv_write_smc_soft_register(struct radeon_device *rdev, rdev 1338 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1340 drivers/gpu/drm/radeon/kv_dpm.c return kv_copy_bytes_to_smc(rdev, pi->soft_regs_start + reg_offset, rdev 1344 drivers/gpu/drm/radeon/kv_dpm.c static int kv_read_smc_soft_register(struct radeon_device *rdev, rdev 1347 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1349 drivers/gpu/drm/radeon/kv_dpm.c return kv_read_smc_sram_dword(rdev, pi->soft_regs_start + reg_offset, rdev 1354 drivers/gpu/drm/radeon/kv_dpm.c static void kv_init_sclk_t(struct radeon_device *rdev) rdev 1356 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1361 drivers/gpu/drm/radeon/kv_dpm.c static int kv_init_fps_limits(struct radeon_device *rdev) rdev 1363 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1371 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1380 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1390 drivers/gpu/drm/radeon/kv_dpm.c static void kv_init_powergate_state(struct radeon_device *rdev) rdev 1392 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1401 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_uvd_dpm(struct radeon_device *rdev, bool enable) rdev 1403 drivers/gpu/drm/radeon/kv_dpm.c return kv_notify_message_to_smu(rdev, enable ? rdev 1407 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_vce_dpm(struct radeon_device *rdev, bool enable) rdev 1409 drivers/gpu/drm/radeon/kv_dpm.c return kv_notify_message_to_smu(rdev, enable ? rdev 1413 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_samu_dpm(struct radeon_device *rdev, bool enable) rdev 1415 drivers/gpu/drm/radeon/kv_dpm.c return kv_notify_message_to_smu(rdev, enable ? rdev 1419 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_acp_dpm(struct radeon_device *rdev, bool enable) rdev 1421 drivers/gpu/drm/radeon/kv_dpm.c return kv_notify_message_to_smu(rdev, enable ? rdev 1425 drivers/gpu/drm/radeon/kv_dpm.c static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) rdev 1427 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1429 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; rdev 1445 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1453 drivers/gpu/drm/radeon/kv_dpm.c kv_send_msg_to_smc_with_parameter(rdev, rdev 1458 drivers/gpu/drm/radeon/kv_dpm.c return kv_enable_uvd_dpm(rdev, !gate); rdev 1461 drivers/gpu/drm/radeon/kv_dpm.c static u8 kv_get_vce_boot_level(struct radeon_device *rdev, u32 evclk) rdev 1465 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; rdev 1475 drivers/gpu/drm/radeon/kv_dpm.c static int kv_update_vce_dpm(struct radeon_device *rdev, rdev 1479 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1481 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; rdev 1485 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_vce(rdev, false); rdev 1487 drivers/gpu/drm/radeon/kv_dpm.c cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false); rdev 1491 drivers/gpu/drm/radeon/kv_dpm.c pi->vce_boot_level = kv_get_vce_boot_level(rdev, radeon_new_state->evclk); rdev 1493 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1503 drivers/gpu/drm/radeon/kv_dpm.c kv_send_msg_to_smc_with_parameter(rdev, rdev 1507 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_vce_dpm(rdev, true); rdev 1509 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_vce_dpm(rdev, false); rdev 1511 drivers/gpu/drm/radeon/kv_dpm.c cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true); rdev 1512 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_powergate_vce(rdev, true); rdev 1518 drivers/gpu/drm/radeon/kv_dpm.c static int kv_update_samu_dpm(struct radeon_device *rdev, bool gate) rdev 1520 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1522 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; rdev 1531 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1541 drivers/gpu/drm/radeon/kv_dpm.c kv_send_msg_to_smc_with_parameter(rdev, rdev 1546 drivers/gpu/drm/radeon/kv_dpm.c return kv_enable_samu_dpm(rdev, !gate); rdev 1549 drivers/gpu/drm/radeon/kv_dpm.c static u8 kv_get_acp_boot_level(struct radeon_device *rdev) rdev 1553 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; rdev 1566 drivers/gpu/drm/radeon/kv_dpm.c static void kv_update_acp_boot_level(struct radeon_device *rdev) rdev 1568 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1572 drivers/gpu/drm/radeon/kv_dpm.c acp_boot_level = kv_get_acp_boot_level(rdev); rdev 1575 drivers/gpu/drm/radeon/kv_dpm.c kv_send_msg_to_smc_with_parameter(rdev, rdev 1582 drivers/gpu/drm/radeon/kv_dpm.c static int kv_update_acp_dpm(struct radeon_device *rdev, bool gate) rdev 1584 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1586 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; rdev 1593 drivers/gpu/drm/radeon/kv_dpm.c pi->acp_boot_level = kv_get_acp_boot_level(rdev); rdev 1595 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1605 drivers/gpu/drm/radeon/kv_dpm.c kv_send_msg_to_smc_with_parameter(rdev, rdev 1610 drivers/gpu/drm/radeon/kv_dpm.c return kv_enable_acp_dpm(rdev, !gate); rdev 1613 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate) rdev 1615 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1624 drivers/gpu/drm/radeon/kv_dpm.c uvd_v1_0_stop(rdev); rdev 1625 drivers/gpu/drm/radeon/kv_dpm.c cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false); rdev 1627 drivers/gpu/drm/radeon/kv_dpm.c kv_update_uvd_dpm(rdev, gate); rdev 1629 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerOFF); rdev 1632 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON); rdev 1633 drivers/gpu/drm/radeon/kv_dpm.c uvd_v4_2_resume(rdev); rdev 1634 drivers/gpu/drm/radeon/kv_dpm.c uvd_v1_0_start(rdev); rdev 1635 drivers/gpu/drm/radeon/kv_dpm.c cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true); rdev 1637 drivers/gpu/drm/radeon/kv_dpm.c kv_update_uvd_dpm(rdev, gate); rdev 1641 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate) rdev 1643 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1653 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerOFF); rdev 1657 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerON); rdev 1658 drivers/gpu/drm/radeon/kv_dpm.c vce_v2_0_resume(rdev); rdev 1659 drivers/gpu/drm/radeon/kv_dpm.c vce_v1_0_start(rdev); rdev 1664 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate) rdev 1666 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1674 drivers/gpu/drm/radeon/kv_dpm.c kv_update_samu_dpm(rdev, true); rdev 1676 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_SAMPowerOFF); rdev 1679 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_SAMPowerON); rdev 1680 drivers/gpu/drm/radeon/kv_dpm.c kv_update_samu_dpm(rdev, false); rdev 1684 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate) rdev 1686 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1691 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) rdev 1697 drivers/gpu/drm/radeon/kv_dpm.c kv_update_acp_dpm(rdev, true); rdev 1699 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_ACPPowerOFF); rdev 1702 drivers/gpu/drm/radeon/kv_dpm.c kv_notify_message_to_smu(rdev, PPSMC_MSG_ACPPowerON); rdev 1703 drivers/gpu/drm/radeon/kv_dpm.c kv_update_acp_dpm(rdev, false); rdev 1707 drivers/gpu/drm/radeon/kv_dpm.c static void kv_set_valid_clock_range(struct radeon_device *rdev, rdev 1711 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1714 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 1769 drivers/gpu/drm/radeon/kv_dpm.c static int kv_update_dfs_bypass_settings(struct radeon_device *rdev, rdev 1773 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1780 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_copy_bytes_to_smc(rdev, rdev 1792 drivers/gpu/drm/radeon/kv_dpm.c static int kv_enable_nb_dpm(struct radeon_device *rdev, rdev 1795 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1800 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Enable); rdev 1806 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Disable); rdev 1815 drivers/gpu/drm/radeon/kv_dpm.c int kv_dpm_force_performance_level(struct radeon_device *rdev, rdev 1821 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_force_dpm_highest(rdev); rdev 1825 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_force_dpm_lowest(rdev); rdev 1829 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_unforce_levels(rdev); rdev 1834 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.forced_level = level; rdev 1839 drivers/gpu/drm/radeon/kv_dpm.c int kv_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 1841 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1842 drivers/gpu/drm/radeon/kv_dpm.c struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; rdev 1845 drivers/gpu/drm/radeon/kv_dpm.c kv_update_requested_ps(rdev, new_ps); rdev 1847 drivers/gpu/drm/radeon/kv_dpm.c kv_apply_state_adjust_rules(rdev, rdev 1854 drivers/gpu/drm/radeon/kv_dpm.c int kv_dpm_set_power_state(struct radeon_device *rdev) rdev 1856 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1862 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power); rdev 1869 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { rdev 1871 drivers/gpu/drm/radeon/kv_dpm.c kv_set_valid_clock_range(rdev, new_ps); rdev 1872 drivers/gpu/drm/radeon/kv_dpm.c kv_update_dfs_bypass_settings(rdev, new_ps); rdev 1873 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_calculate_ds_divider(rdev); rdev 1878 drivers/gpu/drm/radeon/kv_dpm.c kv_calculate_nbps_level_settings(rdev); rdev 1879 drivers/gpu/drm/radeon/kv_dpm.c kv_calculate_dpm_settings(rdev); rdev 1880 drivers/gpu/drm/radeon/kv_dpm.c kv_force_lowest_valid(rdev); rdev 1881 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_new_levels(rdev); rdev 1882 drivers/gpu/drm/radeon/kv_dpm.c kv_upload_dpm_settings(rdev); rdev 1883 drivers/gpu/drm/radeon/kv_dpm.c kv_program_nbps_index_settings(rdev, new_ps); rdev 1884 drivers/gpu/drm/radeon/kv_dpm.c kv_unforce_levels(rdev); rdev 1885 drivers/gpu/drm/radeon/kv_dpm.c kv_set_enabled_levels(rdev); rdev 1886 drivers/gpu/drm/radeon/kv_dpm.c kv_force_lowest_valid(rdev); rdev 1887 drivers/gpu/drm/radeon/kv_dpm.c kv_unforce_levels(rdev); rdev 1889 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_update_vce_dpm(rdev, new_ps, old_ps); rdev 1894 drivers/gpu/drm/radeon/kv_dpm.c kv_update_sclk_t(rdev); rdev 1895 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_MULLINS) rdev 1896 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_nb_dpm(rdev, true); rdev 1900 drivers/gpu/drm/radeon/kv_dpm.c kv_set_valid_clock_range(rdev, new_ps); rdev 1901 drivers/gpu/drm/radeon/kv_dpm.c kv_update_dfs_bypass_settings(rdev, new_ps); rdev 1902 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_calculate_ds_divider(rdev); rdev 1907 drivers/gpu/drm/radeon/kv_dpm.c kv_calculate_nbps_level_settings(rdev); rdev 1908 drivers/gpu/drm/radeon/kv_dpm.c kv_calculate_dpm_settings(rdev); rdev 1909 drivers/gpu/drm/radeon/kv_dpm.c kv_freeze_sclk_dpm(rdev, true); rdev 1910 drivers/gpu/drm/radeon/kv_dpm.c kv_upload_dpm_settings(rdev); rdev 1911 drivers/gpu/drm/radeon/kv_dpm.c kv_program_nbps_index_settings(rdev, new_ps); rdev 1912 drivers/gpu/drm/radeon/kv_dpm.c kv_freeze_sclk_dpm(rdev, false); rdev 1913 drivers/gpu/drm/radeon/kv_dpm.c kv_set_enabled_levels(rdev); rdev 1914 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_update_vce_dpm(rdev, new_ps, old_ps); rdev 1919 drivers/gpu/drm/radeon/kv_dpm.c kv_update_acp_boot_level(rdev); rdev 1920 drivers/gpu/drm/radeon/kv_dpm.c kv_update_sclk_t(rdev); rdev 1921 drivers/gpu/drm/radeon/kv_dpm.c kv_enable_nb_dpm(rdev, true); rdev 1928 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_post_set_power_state(struct radeon_device *rdev) rdev 1930 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1933 drivers/gpu/drm/radeon/kv_dpm.c kv_update_current_ps(rdev, new_ps); rdev 1936 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_setup_asic(struct radeon_device *rdev) rdev 1938 drivers/gpu/drm/radeon/kv_dpm.c sumo_take_smu_control(rdev, true); rdev 1939 drivers/gpu/drm/radeon/kv_dpm.c kv_init_powergate_state(rdev); rdev 1940 drivers/gpu/drm/radeon/kv_dpm.c kv_init_sclk_t(rdev); rdev 1944 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_reset_asic(struct radeon_device *rdev) rdev 1946 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1948 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { rdev 1949 drivers/gpu/drm/radeon/kv_dpm.c kv_force_lowest_valid(rdev); rdev 1950 drivers/gpu/drm/radeon/kv_dpm.c kv_init_graphics_levels(rdev); rdev 1951 drivers/gpu/drm/radeon/kv_dpm.c kv_program_bootup_state(rdev); rdev 1952 drivers/gpu/drm/radeon/kv_dpm.c kv_upload_dpm_settings(rdev); rdev 1953 drivers/gpu/drm/radeon/kv_dpm.c kv_force_lowest_valid(rdev); rdev 1954 drivers/gpu/drm/radeon/kv_dpm.c kv_unforce_levels(rdev); rdev 1956 drivers/gpu/drm/radeon/kv_dpm.c kv_init_graphics_levels(rdev); rdev 1957 drivers/gpu/drm/radeon/kv_dpm.c kv_program_bootup_state(rdev); rdev 1958 drivers/gpu/drm/radeon/kv_dpm.c kv_freeze_sclk_dpm(rdev, true); rdev 1959 drivers/gpu/drm/radeon/kv_dpm.c kv_upload_dpm_settings(rdev); rdev 1960 drivers/gpu/drm/radeon/kv_dpm.c kv_freeze_sclk_dpm(rdev, false); rdev 1961 drivers/gpu/drm/radeon/kv_dpm.c kv_set_enabled_level(rdev, pi->graphics_boot_level); rdev 1968 drivers/gpu/drm/radeon/kv_dpm.c static void kv_construct_max_power_limits_table(struct radeon_device *rdev, rdev 1971 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 1978 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_2bit_index_to_voltage(rdev, rdev 1985 drivers/gpu/drm/radeon/kv_dpm.c static void kv_patch_voltage_values(struct radeon_device *rdev) rdev 1989 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; rdev 1991 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; rdev 1993 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; rdev 1995 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; rdev 2000 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, rdev 2007 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, rdev 2014 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, rdev 2021 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, rdev 2027 drivers/gpu/drm/radeon/kv_dpm.c static void kv_construct_boot_state(struct radeon_device *rdev) rdev 2029 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2041 drivers/gpu/drm/radeon/kv_dpm.c static int kv_force_dpm_highest(struct radeon_device *rdev) rdev 2046 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_dpm_get_enable_mask(rdev, &enable_mask); rdev 2055 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) rdev 2056 drivers/gpu/drm/radeon/kv_dpm.c return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); rdev 2058 drivers/gpu/drm/radeon/kv_dpm.c return kv_set_enabled_level(rdev, i); rdev 2061 drivers/gpu/drm/radeon/kv_dpm.c static int kv_force_dpm_lowest(struct radeon_device *rdev) rdev 2066 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_dpm_get_enable_mask(rdev, &enable_mask); rdev 2075 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) rdev 2076 drivers/gpu/drm/radeon/kv_dpm.c return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); rdev 2078 drivers/gpu/drm/radeon/kv_dpm.c return kv_set_enabled_level(rdev, i); rdev 2081 drivers/gpu/drm/radeon/kv_dpm.c static u8 kv_get_sleep_divider_id_from_clock(struct radeon_device *rdev, rdev 2084 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2105 drivers/gpu/drm/radeon/kv_dpm.c static int kv_get_high_voltage_limit(struct radeon_device *rdev, int *limit) rdev 2107 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2109 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 2115 drivers/gpu/drm/radeon/kv_dpm.c (kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v) <= rdev 2127 drivers/gpu/drm/radeon/kv_dpm.c (kv_convert_2bit_index_to_voltage(rdev, table->entries[i].vid_2bit) <= rdev 2139 drivers/gpu/drm/radeon/kv_dpm.c static void kv_apply_state_adjust_rules(struct radeon_device *rdev, rdev 2144 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2150 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 2153 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 2156 drivers/gpu/drm/radeon/kv_dpm.c new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; rdev 2157 drivers/gpu/drm/radeon/kv_dpm.c new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; rdev 2183 drivers/gpu/drm/radeon/kv_dpm.c if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) rdev 2184 drivers/gpu/drm/radeon/kv_dpm.c sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; rdev 2198 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, ps->levels[i].vddc_index))) { rdev 2199 drivers/gpu/drm/radeon/kv_dpm.c kv_get_high_voltage_limit(rdev, &limit); rdev 2210 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, ps->levels[i].vddc_index))) { rdev 2211 drivers/gpu/drm/radeon/kv_dpm.c kv_get_high_voltage_limit(rdev, &limit); rdev 2232 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { rdev 2245 drivers/gpu/drm/radeon/kv_dpm.c pi->video_start || (rdev->pm.dpm.new_active_crtc_count >= 3) || rdev 2255 drivers/gpu/drm/radeon/kv_dpm.c static void kv_dpm_power_level_enabled_for_throttle(struct radeon_device *rdev, rdev 2258 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2263 drivers/gpu/drm/radeon/kv_dpm.c static int kv_calculate_ds_divider(struct radeon_device *rdev) rdev 2265 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2274 drivers/gpu/drm/radeon/kv_dpm.c kv_get_sleep_divider_id_from_clock(rdev, rdev 2281 drivers/gpu/drm/radeon/kv_dpm.c static int kv_calculate_nbps_level_settings(struct radeon_device *rdev) rdev 2283 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2287 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 2293 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { rdev 2304 drivers/gpu/drm/radeon/kv_dpm.c (rdev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start); rdev 2335 drivers/gpu/drm/radeon/kv_dpm.c static int kv_calculate_dpm_settings(struct radeon_device *rdev) rdev 2337 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2349 drivers/gpu/drm/radeon/kv_dpm.c static void kv_init_graphics_levels(struct radeon_device *rdev) rdev 2351 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2354 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; rdev 2363 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, table->entries[i].v))) rdev 2366 drivers/gpu/drm/radeon/kv_dpm.c kv_set_divider_value(rdev, i, table->entries[i].clk); rdev 2367 drivers/gpu/drm/radeon/kv_dpm.c vid_2bit = kv_convert_vid7_to_vid2(rdev, rdev 2370 drivers/gpu/drm/radeon/kv_dpm.c kv_set_vid(rdev, i, vid_2bit); rdev 2371 drivers/gpu/drm/radeon/kv_dpm.c kv_set_at(rdev, i, pi->at[i]); rdev 2372 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_power_level_enabled_for_throttle(rdev, i, true); rdev 2383 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_2bit_index_to_voltage(rdev, table->entries[i].vid_2bit)) rdev 2386 drivers/gpu/drm/radeon/kv_dpm.c kv_set_divider_value(rdev, i, table->entries[i].sclk_frequency); rdev 2387 drivers/gpu/drm/radeon/kv_dpm.c kv_set_vid(rdev, i, table->entries[i].vid_2bit); rdev 2388 drivers/gpu/drm/radeon/kv_dpm.c kv_set_at(rdev, i, pi->at[i]); rdev 2389 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_power_level_enabled_for_throttle(rdev, i, true); rdev 2395 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_power_level_enable(rdev, i, false); rdev 2398 drivers/gpu/drm/radeon/kv_dpm.c static void kv_enable_new_levels(struct radeon_device *rdev) rdev 2400 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2405 drivers/gpu/drm/radeon/kv_dpm.c kv_dpm_power_level_enable(rdev, i, true); rdev 2409 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_enabled_level(struct radeon_device *rdev, u32 level) rdev 2413 drivers/gpu/drm/radeon/kv_dpm.c return kv_send_msg_to_smc_with_parameter(rdev, rdev 2418 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_enabled_levels(struct radeon_device *rdev) rdev 2420 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2426 drivers/gpu/drm/radeon/kv_dpm.c return kv_send_msg_to_smc_with_parameter(rdev, rdev 2431 drivers/gpu/drm/radeon/kv_dpm.c static void kv_program_nbps_index_settings(struct radeon_device *rdev, rdev 2435 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2438 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) rdev 2453 drivers/gpu/drm/radeon/kv_dpm.c static int kv_set_thermal_temperature_range(struct radeon_device *rdev, rdev 2475 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.thermal.min_temp = low_temp; rdev 2476 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.thermal.max_temp = high_temp; rdev 2490 drivers/gpu/drm/radeon/kv_dpm.c static int kv_parse_sys_info_table(struct radeon_device *rdev) rdev 2492 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2493 drivers/gpu/drm/radeon/kv_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2540 drivers/gpu/drm/radeon/kv_dpm.c sumo_construct_sclk_voltage_mapping_table(rdev, rdev 2544 drivers/gpu/drm/radeon/kv_dpm.c sumo_construct_vid_mapping_table(rdev, rdev 2548 drivers/gpu/drm/radeon/kv_dpm.c kv_construct_max_power_limits_table(rdev, rdev 2549 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac); rdev 2575 drivers/gpu/drm/radeon/kv_dpm.c static void kv_patch_boot_state(struct radeon_device *rdev, rdev 2578 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2584 drivers/gpu/drm/radeon/kv_dpm.c static void kv_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 2604 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 2605 drivers/gpu/drm/radeon/kv_dpm.c kv_patch_boot_state(rdev, ps); rdev 2608 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 2611 drivers/gpu/drm/radeon/kv_dpm.c static void kv_parse_pplib_clock_info(struct radeon_device *rdev, rdev 2615 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2633 drivers/gpu/drm/radeon/kv_dpm.c static int kv_parse_power_table(struct radeon_device *rdev) rdev 2635 drivers/gpu/drm/radeon/kv_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2665 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, rdev 2668 drivers/gpu/drm/radeon/kv_dpm.c if (!rdev->pm.dpm.ps) rdev 2677 drivers/gpu/drm/radeon/kv_dpm.c if (!rdev->pm.power_state[i].clock_info) rdev 2681 drivers/gpu/drm/radeon/kv_dpm.c kfree(rdev->pm.dpm.ps); rdev 2684 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 2696 drivers/gpu/drm/radeon/kv_dpm.c kv_parse_pplib_clock_info(rdev, rdev 2697 drivers/gpu/drm/radeon/kv_dpm.c &rdev->pm.dpm.ps[i], k, rdev 2701 drivers/gpu/drm/radeon/kv_dpm.c kv_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 2706 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.num_ps = state_array->ucNumEntries; rdev 2711 drivers/gpu/drm/radeon/kv_dpm.c clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; rdev 2716 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.vce_states[i].sclk = sclk; rdev 2717 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.vce_states[i].mclk = 0; rdev 2723 drivers/gpu/drm/radeon/kv_dpm.c int kv_dpm_init(struct radeon_device *rdev) rdev 2731 drivers/gpu/drm/radeon/kv_dpm.c rdev->pm.dpm.priv = pi; rdev 2733 drivers/gpu/drm/radeon/kv_dpm.c ret = r600_get_platform_caps(rdev); rdev 2737 drivers/gpu/drm/radeon/kv_dpm.c ret = r600_parse_extended_power_table(rdev); rdev 2747 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->pdev->subsystem_vendor == 0x1849) rdev 2767 drivers/gpu/drm/radeon/kv_dpm.c if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) rdev 2786 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_parse_sys_info_table(rdev); rdev 2790 drivers/gpu/drm/radeon/kv_dpm.c kv_patch_voltage_values(rdev); rdev 2791 drivers/gpu/drm/radeon/kv_dpm.c kv_construct_boot_state(rdev); rdev 2793 drivers/gpu/drm/radeon/kv_dpm.c ret = kv_parse_power_table(rdev); rdev 2802 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 2805 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2818 drivers/gpu/drm/radeon/kv_dpm.c vddc = kv_convert_8bit_index_to_voltage(rdev, (u16)tmp); rdev 2826 drivers/gpu/drm/radeon/kv_dpm.c u32 kv_dpm_get_current_sclk(struct radeon_device *rdev) rdev 2828 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2842 drivers/gpu/drm/radeon/kv_dpm.c u32 kv_dpm_get_current_mclk(struct radeon_device *rdev) rdev 2844 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2849 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_print_power_state(struct radeon_device *rdev, rdev 2862 drivers/gpu/drm/radeon/kv_dpm.c kv_convert_8bit_index_to_voltage(rdev, pl->vddc_index)); rdev 2864 drivers/gpu/drm/radeon/kv_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 2867 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_fini(struct radeon_device *rdev) rdev 2871 drivers/gpu/drm/radeon/kv_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 2872 drivers/gpu/drm/radeon/kv_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 2874 drivers/gpu/drm/radeon/kv_dpm.c kfree(rdev->pm.dpm.ps); rdev 2875 drivers/gpu/drm/radeon/kv_dpm.c kfree(rdev->pm.dpm.priv); rdev 2876 drivers/gpu/drm/radeon/kv_dpm.c r600_free_extended_power_table(rdev); rdev 2879 drivers/gpu/drm/radeon/kv_dpm.c void kv_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 2884 drivers/gpu/drm/radeon/kv_dpm.c u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 2886 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 2895 drivers/gpu/drm/radeon/kv_dpm.c u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 2897 drivers/gpu/drm/radeon/kv_dpm.c struct kv_power_info *pi = kv_get_pi(rdev); rdev 188 drivers/gpu/drm/radeon/kv_dpm.h int kv_notify_message_to_smu(struct radeon_device *rdev, u32 id); rdev 189 drivers/gpu/drm/radeon/kv_dpm.h int kv_dpm_get_enable_mask(struct radeon_device *rdev, u32 *enable_mask); rdev 190 drivers/gpu/drm/radeon/kv_dpm.h int kv_send_msg_to_smc_with_parameter(struct radeon_device *rdev, rdev 192 drivers/gpu/drm/radeon/kv_dpm.h int kv_read_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, rdev 194 drivers/gpu/drm/radeon/kv_dpm.h int kv_smc_dpm_enable(struct radeon_device *rdev, bool enable); rdev 195 drivers/gpu/drm/radeon/kv_dpm.h int kv_smc_bapm_enable(struct radeon_device *rdev, bool enable); rdev 196 drivers/gpu/drm/radeon/kv_dpm.h int kv_copy_bytes_to_smc(struct radeon_device *rdev, rdev 29 drivers/gpu/drm/radeon/kv_smc.c int kv_notify_message_to_smu(struct radeon_device *rdev, u32 id) rdev 36 drivers/gpu/drm/radeon/kv_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 53 drivers/gpu/drm/radeon/kv_smc.c int kv_dpm_get_enable_mask(struct radeon_device *rdev, u32 *enable_mask) rdev 57 drivers/gpu/drm/radeon/kv_smc.c ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_SCLKDPM_GetEnabledMask); rdev 65 drivers/gpu/drm/radeon/kv_smc.c int kv_send_msg_to_smc_with_parameter(struct radeon_device *rdev, rdev 71 drivers/gpu/drm/radeon/kv_smc.c return kv_notify_message_to_smu(rdev, msg); rdev 74 drivers/gpu/drm/radeon/kv_smc.c static int kv_set_smc_sram_address(struct radeon_device *rdev, rdev 88 drivers/gpu/drm/radeon/kv_smc.c int kv_read_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, rdev 93 drivers/gpu/drm/radeon/kv_smc.c ret = kv_set_smc_sram_address(rdev, smc_address, limit); rdev 101 drivers/gpu/drm/radeon/kv_smc.c int kv_smc_dpm_enable(struct radeon_device *rdev, bool enable) rdev 104 drivers/gpu/drm/radeon/kv_smc.c return kv_notify_message_to_smu(rdev, PPSMC_MSG_DPM_Enable); rdev 106 drivers/gpu/drm/radeon/kv_smc.c return kv_notify_message_to_smu(rdev, PPSMC_MSG_DPM_Disable); rdev 109 drivers/gpu/drm/radeon/kv_smc.c int kv_smc_bapm_enable(struct radeon_device *rdev, bool enable) rdev 112 drivers/gpu/drm/radeon/kv_smc.c return kv_notify_message_to_smu(rdev, PPSMC_MSG_EnableBAPM); rdev 114 drivers/gpu/drm/radeon/kv_smc.c return kv_notify_message_to_smu(rdev, PPSMC_MSG_DisableBAPM); rdev 117 drivers/gpu/drm/radeon/kv_smc.c int kv_copy_bytes_to_smc(struct radeon_device *rdev, rdev 134 drivers/gpu/drm/radeon/kv_smc.c ret = kv_set_smc_sram_address(rdev, addr, limit); rdev 160 drivers/gpu/drm/radeon/kv_smc.c ret = kv_set_smc_sram_address(rdev, addr, limit); rdev 173 drivers/gpu/drm/radeon/kv_smc.c ret = kv_set_smc_sram_address(rdev, addr, limit); rdev 188 drivers/gpu/drm/radeon/kv_smc.c ret = kv_set_smc_sram_address(rdev, addr, limit); rdev 206 drivers/gpu/drm/radeon/kv_smc.c ret = kv_set_smc_sram_address(rdev, addr, limit); rdev 45 drivers/gpu/drm/radeon/ni.c u32 tn_smc_rreg(struct radeon_device *rdev, u32 reg) rdev 50 drivers/gpu/drm/radeon/ni.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 53 drivers/gpu/drm/radeon/ni.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 57 drivers/gpu/drm/radeon/ni.c void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 61 drivers/gpu/drm/radeon/ni.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 64 drivers/gpu/drm/radeon/ni.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 193 drivers/gpu/drm/radeon/ni.c extern bool evergreen_is_display_hung(struct radeon_device *rdev); rdev 194 drivers/gpu/drm/radeon/ni.c extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); rdev 195 drivers/gpu/drm/radeon/ni.c extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); rdev 196 drivers/gpu/drm/radeon/ni.c extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); rdev 197 drivers/gpu/drm/radeon/ni.c extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev); rdev 198 drivers/gpu/drm/radeon/ni.c extern void evergreen_mc_program(struct radeon_device *rdev); rdev 199 drivers/gpu/drm/radeon/ni.c extern void evergreen_irq_suspend(struct radeon_device *rdev); rdev 200 drivers/gpu/drm/radeon/ni.c extern int evergreen_mc_init(struct radeon_device *rdev); rdev 201 drivers/gpu/drm/radeon/ni.c extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); rdev 202 drivers/gpu/drm/radeon/ni.c extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); rdev 203 drivers/gpu/drm/radeon/ni.c extern void evergreen_program_aspm(struct radeon_device *rdev); rdev 204 drivers/gpu/drm/radeon/ni.c extern void sumo_rlc_fini(struct radeon_device *rdev); rdev 205 drivers/gpu/drm/radeon/ni.c extern int sumo_rlc_init(struct radeon_device *rdev); rdev 206 drivers/gpu/drm/radeon/ni.c extern void evergreen_gpu_pci_config_reset(struct radeon_device *rdev); rdev 456 drivers/gpu/drm/radeon/ni.c static void ni_init_golden_registers(struct radeon_device *rdev) rdev 458 drivers/gpu/drm/radeon/ni.c switch (rdev->family) { rdev 460 drivers/gpu/drm/radeon/ni.c radeon_program_register_sequence(rdev, rdev 463 drivers/gpu/drm/radeon/ni.c radeon_program_register_sequence(rdev, rdev 468 drivers/gpu/drm/radeon/ni.c if ((rdev->pdev->device == 0x9900) || rdev 469 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9901) || rdev 470 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9903) || rdev 471 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9904) || rdev 472 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9905) || rdev 473 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9906) || rdev 474 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9907) || rdev 475 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9908) || rdev 476 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9909) || rdev 477 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990A) || rdev 478 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990B) || rdev 479 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990C) || rdev 480 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990D) || rdev 481 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990E) || rdev 482 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990F) || rdev 483 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9910) || rdev 484 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9913) || rdev 485 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9917) || rdev 486 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9918)) { rdev 487 drivers/gpu/drm/radeon/ni.c radeon_program_register_sequence(rdev, rdev 490 drivers/gpu/drm/radeon/ni.c radeon_program_register_sequence(rdev, rdev 494 drivers/gpu/drm/radeon/ni.c radeon_program_register_sequence(rdev, rdev 497 drivers/gpu/drm/radeon/ni.c radeon_program_register_sequence(rdev, rdev 637 drivers/gpu/drm/radeon/ni.c int ni_mc_load_microcode(struct radeon_device *rdev) rdev 644 drivers/gpu/drm/radeon/ni.c if (!rdev->mc_fw) rdev 647 drivers/gpu/drm/radeon/ni.c switch (rdev->family) { rdev 690 drivers/gpu/drm/radeon/ni.c fw_data = (const __be32 *)rdev->mc_fw->data; rdev 700 drivers/gpu/drm/radeon/ni.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 713 drivers/gpu/drm/radeon/ni.c int ni_init_microcode(struct radeon_device *rdev) rdev 724 drivers/gpu/drm/radeon/ni.c switch (rdev->family) { rdev 776 drivers/gpu/drm/radeon/ni.c err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev); rdev 779 drivers/gpu/drm/radeon/ni.c if (rdev->pfp_fw->size != pfp_req_size) { rdev 781 drivers/gpu/drm/radeon/ni.c rdev->pfp_fw->size, fw_name); rdev 787 drivers/gpu/drm/radeon/ni.c err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); rdev 790 drivers/gpu/drm/radeon/ni.c if (rdev->me_fw->size != me_req_size) { rdev 792 drivers/gpu/drm/radeon/ni.c rdev->me_fw->size, fw_name); rdev 797 drivers/gpu/drm/radeon/ni.c err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev); rdev 800 drivers/gpu/drm/radeon/ni.c if (rdev->rlc_fw->size != rlc_req_size) { rdev 802 drivers/gpu/drm/radeon/ni.c rdev->rlc_fw->size, fw_name); rdev 807 drivers/gpu/drm/radeon/ni.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 809 drivers/gpu/drm/radeon/ni.c err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); rdev 812 drivers/gpu/drm/radeon/ni.c if (rdev->mc_fw->size != mc_req_size) { rdev 814 drivers/gpu/drm/radeon/ni.c rdev->mc_fw->size, fw_name); rdev 819 drivers/gpu/drm/radeon/ni.c if ((rdev->family >= CHIP_BARTS) && (rdev->family <= CHIP_CAYMAN)) { rdev 821 drivers/gpu/drm/radeon/ni.c err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); rdev 824 drivers/gpu/drm/radeon/ni.c release_firmware(rdev->smc_fw); rdev 825 drivers/gpu/drm/radeon/ni.c rdev->smc_fw = NULL; rdev 827 drivers/gpu/drm/radeon/ni.c } else if (rdev->smc_fw->size != smc_req_size) { rdev 829 drivers/gpu/drm/radeon/ni.c rdev->mc_fw->size, fw_name); rdev 839 drivers/gpu/drm/radeon/ni.c release_firmware(rdev->pfp_fw); rdev 840 drivers/gpu/drm/radeon/ni.c rdev->pfp_fw = NULL; rdev 841 drivers/gpu/drm/radeon/ni.c release_firmware(rdev->me_fw); rdev 842 drivers/gpu/drm/radeon/ni.c rdev->me_fw = NULL; rdev 843 drivers/gpu/drm/radeon/ni.c release_firmware(rdev->rlc_fw); rdev 844 drivers/gpu/drm/radeon/ni.c rdev->rlc_fw = NULL; rdev 845 drivers/gpu/drm/radeon/ni.c release_firmware(rdev->mc_fw); rdev 846 drivers/gpu/drm/radeon/ni.c rdev->mc_fw = NULL; rdev 861 drivers/gpu/drm/radeon/ni.c int cayman_get_allowed_info_register(struct radeon_device *rdev, rdev 880 drivers/gpu/drm/radeon/ni.c int tn_get_temp(struct radeon_device *rdev) rdev 891 drivers/gpu/drm/radeon/ni.c static void cayman_gpu_init(struct radeon_device *rdev) rdev 904 drivers/gpu/drm/radeon/ni.c switch (rdev->family) { rdev 906 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_shader_engines = 2; rdev 907 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_pipes_per_simd = 4; rdev 908 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_tile_pipes = 8; rdev 909 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_simds_per_se = 12; rdev 910 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_backends_per_se = 4; rdev 911 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_texture_channel_caches = 8; rdev 912 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_gprs = 256; rdev 913 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_threads = 256; rdev 914 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_gs_threads = 32; rdev 915 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_stack_entries = 512; rdev 916 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_num_of_sets = 8; rdev 917 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_size = 256; rdev 918 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_pos_size = 64; rdev 919 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_smx_size = 192; rdev 920 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_hw_contexts = 8; rdev 921 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sq_num_cf_insts = 2; rdev 923 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sc_prim_fifo_size = 0x100; rdev 924 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; rdev 925 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sc_earlyz_tile_fifo_size = 0x130; rdev 930 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_shader_engines = 1; rdev 931 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_pipes_per_simd = 4; rdev 932 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_tile_pipes = 2; rdev 933 drivers/gpu/drm/radeon/ni.c if ((rdev->pdev->device == 0x9900) || rdev 934 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9901) || rdev 935 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9905) || rdev 936 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9906) || rdev 937 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9907) || rdev 938 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9908) || rdev 939 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9909) || rdev 940 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990B) || rdev 941 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990C) || rdev 942 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990F) || rdev 943 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9910) || rdev 944 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9917) || rdev 945 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9999) || rdev 946 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x999C)) { rdev 947 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_simds_per_se = 6; rdev 948 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_backends_per_se = 2; rdev 949 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_hw_contexts = 8; rdev 950 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_size = 256; rdev 951 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_pos_size = 64; rdev 952 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_smx_size = 192; rdev 953 drivers/gpu/drm/radeon/ni.c } else if ((rdev->pdev->device == 0x9903) || rdev 954 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9904) || rdev 955 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990A) || rdev 956 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990D) || rdev 957 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x990E) || rdev 958 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9913) || rdev 959 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9918) || rdev 960 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x999D)) { rdev 961 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_simds_per_se = 4; rdev 962 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_backends_per_se = 2; rdev 963 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_hw_contexts = 8; rdev 964 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_size = 256; rdev 965 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_pos_size = 64; rdev 966 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_smx_size = 192; rdev 967 drivers/gpu/drm/radeon/ni.c } else if ((rdev->pdev->device == 0x9919) || rdev 968 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9990) || rdev 969 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9991) || rdev 970 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9994) || rdev 971 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9995) || rdev 972 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x9996) || rdev 973 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x999A) || rdev 974 drivers/gpu/drm/radeon/ni.c (rdev->pdev->device == 0x99A0)) { rdev 975 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_simds_per_se = 3; rdev 976 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_backends_per_se = 1; rdev 977 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_hw_contexts = 4; rdev 978 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_size = 128; rdev 979 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_pos_size = 32; rdev 980 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_smx_size = 96; rdev 982 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_simds_per_se = 2; rdev 983 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_backends_per_se = 1; rdev 984 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_hw_contexts = 4; rdev 985 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_size = 128; rdev 986 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_pos_size = 32; rdev 987 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_max_export_smx_size = 96; rdev 989 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_texture_channel_caches = 2; rdev 990 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_gprs = 256; rdev 991 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_threads = 256; rdev 992 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_gs_threads = 32; rdev 993 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_stack_entries = 512; rdev 994 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sx_num_of_sets = 8; rdev 995 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sq_num_cf_insts = 2; rdev 997 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sc_prim_fifo_size = 0x40; rdev 998 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; rdev 999 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.sc_earlyz_tile_fifo_size = 0x130; rdev 1017 drivers/gpu/drm/radeon/ni.c evergreen_fix_pci_max_read_req_size(rdev); rdev 1023 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.mem_row_size_in_kb = (4 * (1 << (8 + tmp))) / 1024; rdev 1024 drivers/gpu/drm/radeon/ni.c if (rdev->config.cayman.mem_row_size_in_kb > 4) rdev 1025 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.mem_row_size_in_kb = 4; rdev 1027 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.shader_engine_tile_size = 32; rdev 1028 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.num_gpus = 1; rdev 1029 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.multi_gpu_tile_size = 64; rdev 1032 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.num_tile_pipes = (1 << tmp); rdev 1034 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.mem_max_burst_length_bytes = (tmp + 1) * 256; rdev 1036 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.num_shader_engines = tmp + 1; rdev 1038 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.num_gpus = tmp + 1; rdev 1040 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.multi_gpu_tile_size = 1 << tmp; rdev 1042 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.mem_row_size_in_kb = 1 << tmp; rdev 1052 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config = 0; rdev 1053 drivers/gpu/drm/radeon/ni.c switch (rdev->config.cayman.num_tile_pipes) { rdev 1056 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= (0 << 0); rdev 1059 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= (1 << 0); rdev 1062 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= (2 << 0); rdev 1065 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= (3 << 0); rdev 1070 drivers/gpu/drm/radeon/ni.c if (rdev->flags & RADEON_IS_IGP) rdev 1071 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= 1 << 4; rdev 1075 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= 0 << 4; rdev 1078 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= 1 << 4; rdev 1082 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= 2 << 4; rdev 1086 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= rdev 1088 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.tile_config |= rdev 1092 drivers/gpu/drm/radeon/ni.c for (i = (rdev->config.cayman.max_shader_engines - 1); i >= 0; i--) { rdev 1104 drivers/gpu/drm/radeon/ni.c for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines); i++) rdev 1108 drivers/gpu/drm/radeon/ni.c for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines); i++) rdev 1112 drivers/gpu/drm/radeon/ni.c for (i = 0; i < rdev->config.cayman.max_shader_engines; i++) { rdev 1118 drivers/gpu/drm/radeon/ni.c simd_disable_bitmap |= 0xffffffff << rdev->config.cayman.max_simds_per_se; rdev 1122 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.active_simds = hweight32(~tmp); rdev 1129 drivers/gpu/drm/radeon/ni.c if (ASIC_IS_DCE6(rdev)) rdev 1138 drivers/gpu/drm/radeon/ni.c if ((rdev->config.cayman.max_backends_per_se == 1) && rdev 1139 drivers/gpu/drm/radeon/ni.c (rdev->flags & RADEON_IS_IGP)) { rdev 1149 drivers/gpu/drm/radeon/ni.c tmp = r6xx_remap_render_backend(rdev, tmp, rdev 1150 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_backends_per_se * rdev 1151 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.max_shader_engines, rdev 1154 drivers/gpu/drm/radeon/ni.c rdev->config.cayman.backend_map = tmp; rdev 1158 drivers/gpu/drm/radeon/ni.c for (i = 0; i < rdev->config.cayman.max_texture_channel_caches; i++) rdev 1180 drivers/gpu/drm/radeon/ni.c smx_dc_ctl0 |= NUMBER_OF_SETS(rdev->config.cayman.sx_num_of_sets); rdev 1196 drivers/gpu/drm/radeon/ni.c WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.cayman.sx_max_export_size / 4) - 1) | rdev 1197 drivers/gpu/drm/radeon/ni.c POSITION_BUFFER_SIZE((rdev->config.cayman.sx_max_export_pos_size / 4) - 1) | rdev 1198 drivers/gpu/drm/radeon/ni.c SMX_BUFFER_SIZE((rdev->config.cayman.sx_max_export_smx_size / 4) - 1))); rdev 1200 drivers/gpu/drm/radeon/ni.c WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.cayman.sc_prim_fifo_size) | rdev 1201 drivers/gpu/drm/radeon/ni.c SC_HIZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_hiz_tile_fifo_size) | rdev 1202 drivers/gpu/drm/radeon/ni.c SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_earlyz_tile_fifo_size))); rdev 1209 drivers/gpu/drm/radeon/ni.c WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.cayman.sq_num_cf_insts) | rdev 1252 drivers/gpu/drm/radeon/ni.c if (rdev->family == CHIP_ARUBA) { rdev 1265 drivers/gpu/drm/radeon/ni.c void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev) rdev 1274 drivers/gpu/drm/radeon/ni.c static int cayman_pcie_gart_enable(struct radeon_device *rdev) rdev 1278 drivers/gpu/drm/radeon/ni.c if (rdev->gart.robj == NULL) { rdev 1279 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 1282 drivers/gpu/drm/radeon/ni.c r = radeon_gart_table_vram_pin(rdev); rdev 1305 drivers/gpu/drm/radeon/ni.c WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); rdev 1306 drivers/gpu/drm/radeon/ni.c WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); rdev 1307 drivers/gpu/drm/radeon/ni.c WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); rdev 1309 drivers/gpu/drm/radeon/ni.c (u32)(rdev->dummy_page.addr >> 12)); rdev 1326 drivers/gpu/drm/radeon/ni.c rdev->vm_manager.max_pfn - 1); rdev 1328 drivers/gpu/drm/radeon/ni.c rdev->vm_manager.saved_table_addr[i]); rdev 1333 drivers/gpu/drm/radeon/ni.c (u32)(rdev->dummy_page.addr >> 12)); rdev 1350 drivers/gpu/drm/radeon/ni.c cayman_pcie_gart_tlb_flush(rdev); rdev 1352 drivers/gpu/drm/radeon/ni.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 1353 drivers/gpu/drm/radeon/ni.c (unsigned long long)rdev->gart.table_addr); rdev 1354 drivers/gpu/drm/radeon/ni.c rdev->gart.ready = true; rdev 1358 drivers/gpu/drm/radeon/ni.c static void cayman_pcie_gart_disable(struct radeon_device *rdev) rdev 1363 drivers/gpu/drm/radeon/ni.c rdev->vm_manager.saved_table_addr[i] = RREG32( rdev 1382 drivers/gpu/drm/radeon/ni.c radeon_gart_table_vram_unpin(rdev); rdev 1385 drivers/gpu/drm/radeon/ni.c static void cayman_pcie_gart_fini(struct radeon_device *rdev) rdev 1387 drivers/gpu/drm/radeon/ni.c cayman_pcie_gart_disable(rdev); rdev 1388 drivers/gpu/drm/radeon/ni.c radeon_gart_table_vram_free(rdev); rdev 1389 drivers/gpu/drm/radeon/ni.c radeon_gart_fini(rdev); rdev 1392 drivers/gpu/drm/radeon/ni.c void cayman_cp_int_cntl_setup(struct radeon_device *rdev, rdev 1402 drivers/gpu/drm/radeon/ni.c void cayman_fence_ring_emit(struct radeon_device *rdev, rdev 1405 drivers/gpu/drm/radeon/ni.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 1406 drivers/gpu/drm/radeon/ni.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 1425 drivers/gpu/drm/radeon/ni.c void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 1427 drivers/gpu/drm/radeon/ni.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 1461 drivers/gpu/drm/radeon/ni.c static void cayman_cp_enable(struct radeon_device *rdev, bool enable) rdev 1466 drivers/gpu/drm/radeon/ni.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 1467 drivers/gpu/drm/radeon/ni.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 1470 drivers/gpu/drm/radeon/ni.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 1474 drivers/gpu/drm/radeon/ni.c u32 cayman_gfx_get_rptr(struct radeon_device *rdev, rdev 1479 drivers/gpu/drm/radeon/ni.c if (rdev->wb.enabled) rdev 1480 drivers/gpu/drm/radeon/ni.c rptr = rdev->wb.wb[ring->rptr_offs/4]; rdev 1493 drivers/gpu/drm/radeon/ni.c u32 cayman_gfx_get_wptr(struct radeon_device *rdev, rdev 1508 drivers/gpu/drm/radeon/ni.c void cayman_gfx_set_wptr(struct radeon_device *rdev, rdev 1523 drivers/gpu/drm/radeon/ni.c static int cayman_cp_load_microcode(struct radeon_device *rdev) rdev 1528 drivers/gpu/drm/radeon/ni.c if (!rdev->me_fw || !rdev->pfp_fw) rdev 1531 drivers/gpu/drm/radeon/ni.c cayman_cp_enable(rdev, false); rdev 1533 drivers/gpu/drm/radeon/ni.c fw_data = (const __be32 *)rdev->pfp_fw->data; rdev 1539 drivers/gpu/drm/radeon/ni.c fw_data = (const __be32 *)rdev->me_fw->data; rdev 1550 drivers/gpu/drm/radeon/ni.c static int cayman_cp_start(struct radeon_device *rdev) rdev 1552 drivers/gpu/drm/radeon/ni.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 1555 drivers/gpu/drm/radeon/ni.c r = radeon_ring_lock(rdev, ring, 7); rdev 1563 drivers/gpu/drm/radeon/ni.c radeon_ring_write(ring, rdev->config.cayman.max_hw_contexts - 1); rdev 1567 drivers/gpu/drm/radeon/ni.c radeon_ring_unlock_commit(rdev, ring, false); rdev 1569 drivers/gpu/drm/radeon/ni.c cayman_cp_enable(rdev, true); rdev 1571 drivers/gpu/drm/radeon/ni.c r = radeon_ring_lock(rdev, ring, cayman_default_size + 19); rdev 1609 drivers/gpu/drm/radeon/ni.c radeon_ring_unlock_commit(rdev, ring, false); rdev 1616 drivers/gpu/drm/radeon/ni.c static void cayman_cp_fini(struct radeon_device *rdev) rdev 1618 drivers/gpu/drm/radeon/ni.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 1619 drivers/gpu/drm/radeon/ni.c cayman_cp_enable(rdev, false); rdev 1620 drivers/gpu/drm/radeon/ni.c radeon_ring_fini(rdev, ring); rdev 1621 drivers/gpu/drm/radeon/ni.c radeon_scratch_free(rdev, ring->rptr_save_reg); rdev 1624 drivers/gpu/drm/radeon/ni.c static int cayman_cp_resume(struct radeon_device *rdev) rdev 1685 drivers/gpu/drm/radeon/ni.c WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); rdev 1693 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[ridx[i]]; rdev 1702 drivers/gpu/drm/radeon/ni.c addr = rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET; rdev 1709 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[ridx[i]]; rdev 1715 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[ridx[i]]; rdev 1727 drivers/gpu/drm/radeon/ni.c cayman_cp_start(rdev); rdev 1728 drivers/gpu/drm/radeon/ni.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = true; rdev 1729 drivers/gpu/drm/radeon/ni.c rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false; rdev 1730 drivers/gpu/drm/radeon/ni.c rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; rdev 1732 drivers/gpu/drm/radeon/ni.c r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]); rdev 1734 drivers/gpu/drm/radeon/ni.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 1735 drivers/gpu/drm/radeon/ni.c rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false; rdev 1736 drivers/gpu/drm/radeon/ni.c rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; rdev 1740 drivers/gpu/drm/radeon/ni.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 1741 drivers/gpu/drm/radeon/ni.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 1746 drivers/gpu/drm/radeon/ni.c u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev) rdev 1807 drivers/gpu/drm/radeon/ni.c if (evergreen_is_display_hung(rdev)) rdev 1824 drivers/gpu/drm/radeon/ni.c static void cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) rdev 1833 drivers/gpu/drm/radeon/ni.c dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask); rdev 1835 drivers/gpu/drm/radeon/ni.c evergreen_print_gpu_status_regs(rdev); rdev 1836 drivers/gpu/drm/radeon/ni.c dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_ADDR 0x%08X\n", rdev 1838 drivers/gpu/drm/radeon/ni.c dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_STATUS 0x%08X\n", rdev 1840 drivers/gpu/drm/radeon/ni.c dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", rdev 1842 drivers/gpu/drm/radeon/ni.c dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", rdev 1864 drivers/gpu/drm/radeon/ni.c evergreen_mc_stop(rdev, &save); rdev 1865 drivers/gpu/drm/radeon/ni.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 1866 drivers/gpu/drm/radeon/ni.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 1914 drivers/gpu/drm/radeon/ni.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 1922 drivers/gpu/drm/radeon/ni.c dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); rdev 1936 drivers/gpu/drm/radeon/ni.c dev_info(rdev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); rdev 1950 drivers/gpu/drm/radeon/ni.c evergreen_mc_resume(rdev, &save); rdev 1953 drivers/gpu/drm/radeon/ni.c evergreen_print_gpu_status_regs(rdev); rdev 1956 drivers/gpu/drm/radeon/ni.c int cayman_asic_reset(struct radeon_device *rdev, bool hard) rdev 1961 drivers/gpu/drm/radeon/ni.c evergreen_gpu_pci_config_reset(rdev); rdev 1965 drivers/gpu/drm/radeon/ni.c reset_mask = cayman_gpu_check_soft_reset(rdev); rdev 1968 drivers/gpu/drm/radeon/ni.c r600_set_bios_scratch_engine_hung(rdev, true); rdev 1970 drivers/gpu/drm/radeon/ni.c cayman_gpu_soft_reset(rdev, reset_mask); rdev 1972 drivers/gpu/drm/radeon/ni.c reset_mask = cayman_gpu_check_soft_reset(rdev); rdev 1975 drivers/gpu/drm/radeon/ni.c evergreen_gpu_pci_config_reset(rdev); rdev 1977 drivers/gpu/drm/radeon/ni.c r600_set_bios_scratch_engine_hung(rdev, false); rdev 1991 drivers/gpu/drm/radeon/ni.c bool cayman_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 1993 drivers/gpu/drm/radeon/ni.c u32 reset_mask = cayman_gpu_check_soft_reset(rdev); rdev 1998 drivers/gpu/drm/radeon/ni.c radeon_ring_lockup_update(rdev, ring); rdev 2001 drivers/gpu/drm/radeon/ni.c return radeon_ring_test_lockup(rdev, ring); rdev 2004 drivers/gpu/drm/radeon/ni.c static void cayman_uvd_init(struct radeon_device *rdev) rdev 2008 drivers/gpu/drm/radeon/ni.c if (!rdev->has_uvd) rdev 2011 drivers/gpu/drm/radeon/ni.c r = radeon_uvd_init(rdev); rdev 2013 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed UVD (%d) init.\n", r); rdev 2020 drivers/gpu/drm/radeon/ni.c rdev->has_uvd = 0; rdev 2023 drivers/gpu/drm/radeon/ni.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_obj = NULL; rdev 2024 drivers/gpu/drm/radeon/ni.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], 4096); rdev 2027 drivers/gpu/drm/radeon/ni.c static void cayman_uvd_start(struct radeon_device *rdev) rdev 2031 drivers/gpu/drm/radeon/ni.c if (!rdev->has_uvd) rdev 2034 drivers/gpu/drm/radeon/ni.c r = uvd_v2_2_resume(rdev); rdev 2036 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed UVD resume (%d).\n", r); rdev 2039 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_UVD_INDEX); rdev 2041 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing UVD fences (%d).\n", r); rdev 2047 drivers/gpu/drm/radeon/ni.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; rdev 2050 drivers/gpu/drm/radeon/ni.c static void cayman_uvd_resume(struct radeon_device *rdev) rdev 2055 drivers/gpu/drm/radeon/ni.c if (!rdev->has_uvd || !rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size) rdev 2058 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 2059 drivers/gpu/drm/radeon/ni.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, PACKET0(UVD_NO_OP, 0)); rdev 2061 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing UVD ring (%d).\n", r); rdev 2064 drivers/gpu/drm/radeon/ni.c r = uvd_v1_0_init(rdev); rdev 2066 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing UVD (%d).\n", r); rdev 2071 drivers/gpu/drm/radeon/ni.c static void cayman_vce_init(struct radeon_device *rdev) rdev 2076 drivers/gpu/drm/radeon/ni.c if (!rdev->has_vce) rdev 2079 drivers/gpu/drm/radeon/ni.c r = radeon_vce_init(rdev); rdev 2081 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed VCE (%d) init.\n", r); rdev 2088 drivers/gpu/drm/radeon/ni.c rdev->has_vce = 0; rdev 2091 drivers/gpu/drm/radeon/ni.c rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_obj = NULL; rdev 2092 drivers/gpu/drm/radeon/ni.c r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE1_INDEX], 4096); rdev 2093 drivers/gpu/drm/radeon/ni.c rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_obj = NULL; rdev 2094 drivers/gpu/drm/radeon/ni.c r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE2_INDEX], 4096); rdev 2097 drivers/gpu/drm/radeon/ni.c static void cayman_vce_start(struct radeon_device *rdev) rdev 2101 drivers/gpu/drm/radeon/ni.c if (!rdev->has_vce) rdev 2104 drivers/gpu/drm/radeon/ni.c r = radeon_vce_resume(rdev); rdev 2106 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed VCE resume (%d).\n", r); rdev 2109 drivers/gpu/drm/radeon/ni.c r = vce_v1_0_resume(rdev); rdev 2111 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed VCE resume (%d).\n", r); rdev 2114 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE1_INDEX); rdev 2116 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing VCE1 fences (%d).\n", r); rdev 2119 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE2_INDEX); rdev 2121 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing VCE2 fences (%d).\n", r); rdev 2127 drivers/gpu/drm/radeon/ni.c rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size = 0; rdev 2128 drivers/gpu/drm/radeon/ni.c rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_size = 0; rdev 2131 drivers/gpu/drm/radeon/ni.c static void cayman_vce_resume(struct radeon_device *rdev) rdev 2136 drivers/gpu/drm/radeon/ni.c if (!rdev->has_vce || !rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size) rdev 2139 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; rdev 2140 drivers/gpu/drm/radeon/ni.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, 0x0); rdev 2142 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); rdev 2145 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; rdev 2146 drivers/gpu/drm/radeon/ni.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, 0x0); rdev 2148 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); rdev 2151 drivers/gpu/drm/radeon/ni.c r = vce_v1_0_init(rdev); rdev 2153 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing VCE (%d).\n", r); rdev 2158 drivers/gpu/drm/radeon/ni.c static int cayman_startup(struct radeon_device *rdev) rdev 2160 drivers/gpu/drm/radeon/ni.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 2164 drivers/gpu/drm/radeon/ni.c evergreen_pcie_gen2_enable(rdev); rdev 2166 drivers/gpu/drm/radeon/ni.c evergreen_program_aspm(rdev); rdev 2169 drivers/gpu/drm/radeon/ni.c r = r600_vram_scratch_init(rdev); rdev 2173 drivers/gpu/drm/radeon/ni.c evergreen_mc_program(rdev); rdev 2175 drivers/gpu/drm/radeon/ni.c if (!(rdev->flags & RADEON_IS_IGP) && !rdev->pm.dpm_enabled) { rdev 2176 drivers/gpu/drm/radeon/ni.c r = ni_mc_load_microcode(rdev); rdev 2183 drivers/gpu/drm/radeon/ni.c r = cayman_pcie_gart_enable(rdev); rdev 2186 drivers/gpu/drm/radeon/ni.c cayman_gpu_init(rdev); rdev 2189 drivers/gpu/drm/radeon/ni.c if (rdev->flags & RADEON_IS_IGP) { rdev 2190 drivers/gpu/drm/radeon/ni.c rdev->rlc.reg_list = tn_rlc_save_restore_register_list; rdev 2191 drivers/gpu/drm/radeon/ni.c rdev->rlc.reg_list_size = rdev 2193 drivers/gpu/drm/radeon/ni.c rdev->rlc.cs_data = cayman_cs_data; rdev 2194 drivers/gpu/drm/radeon/ni.c r = sumo_rlc_init(rdev); rdev 2202 drivers/gpu/drm/radeon/ni.c r = radeon_wb_init(rdev); rdev 2206 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 2208 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 2212 drivers/gpu/drm/radeon/ni.c cayman_uvd_start(rdev); rdev 2213 drivers/gpu/drm/radeon/ni.c cayman_vce_start(rdev); rdev 2215 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP1_INDEX); rdev 2217 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 2221 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP2_INDEX); rdev 2223 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 2227 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_DMA_INDEX); rdev 2229 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 2233 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_DMA1_INDEX); rdev 2235 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 2240 drivers/gpu/drm/radeon/ni.c if (!rdev->irq.installed) { rdev 2241 drivers/gpu/drm/radeon/ni.c r = radeon_irq_kms_init(rdev); rdev 2246 drivers/gpu/drm/radeon/ni.c r = r600_irq_init(rdev); rdev 2249 drivers/gpu/drm/radeon/ni.c radeon_irq_kms_fini(rdev); rdev 2252 drivers/gpu/drm/radeon/ni.c evergreen_irq_set(rdev); rdev 2254 drivers/gpu/drm/radeon/ni.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, rdev 2259 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 2260 drivers/gpu/drm/radeon/ni.c r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, rdev 2265 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 2266 drivers/gpu/drm/radeon/ni.c r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, rdev 2271 drivers/gpu/drm/radeon/ni.c r = cayman_cp_load_microcode(rdev); rdev 2274 drivers/gpu/drm/radeon/ni.c r = cayman_cp_resume(rdev); rdev 2278 drivers/gpu/drm/radeon/ni.c r = cayman_dma_resume(rdev); rdev 2282 drivers/gpu/drm/radeon/ni.c cayman_uvd_resume(rdev); rdev 2283 drivers/gpu/drm/radeon/ni.c cayman_vce_resume(rdev); rdev 2285 drivers/gpu/drm/radeon/ni.c r = radeon_ib_pool_init(rdev); rdev 2287 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 2291 drivers/gpu/drm/radeon/ni.c r = radeon_vm_manager_init(rdev); rdev 2293 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "vm manager initialization failed (%d).\n", r); rdev 2297 drivers/gpu/drm/radeon/ni.c r = radeon_audio_init(rdev); rdev 2304 drivers/gpu/drm/radeon/ni.c int cayman_resume(struct radeon_device *rdev) rdev 2313 drivers/gpu/drm/radeon/ni.c atom_asic_init(rdev->mode_info.atom_context); rdev 2316 drivers/gpu/drm/radeon/ni.c ni_init_golden_registers(rdev); rdev 2318 drivers/gpu/drm/radeon/ni.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 2319 drivers/gpu/drm/radeon/ni.c radeon_pm_resume(rdev); rdev 2321 drivers/gpu/drm/radeon/ni.c rdev->accel_working = true; rdev 2322 drivers/gpu/drm/radeon/ni.c r = cayman_startup(rdev); rdev 2325 drivers/gpu/drm/radeon/ni.c rdev->accel_working = false; rdev 2331 drivers/gpu/drm/radeon/ni.c int cayman_suspend(struct radeon_device *rdev) rdev 2333 drivers/gpu/drm/radeon/ni.c radeon_pm_suspend(rdev); rdev 2334 drivers/gpu/drm/radeon/ni.c radeon_audio_fini(rdev); rdev 2335 drivers/gpu/drm/radeon/ni.c radeon_vm_manager_fini(rdev); rdev 2336 drivers/gpu/drm/radeon/ni.c cayman_cp_enable(rdev, false); rdev 2337 drivers/gpu/drm/radeon/ni.c cayman_dma_stop(rdev); rdev 2338 drivers/gpu/drm/radeon/ni.c if (rdev->has_uvd) { rdev 2339 drivers/gpu/drm/radeon/ni.c uvd_v1_0_fini(rdev); rdev 2340 drivers/gpu/drm/radeon/ni.c radeon_uvd_suspend(rdev); rdev 2342 drivers/gpu/drm/radeon/ni.c evergreen_irq_suspend(rdev); rdev 2343 drivers/gpu/drm/radeon/ni.c radeon_wb_disable(rdev); rdev 2344 drivers/gpu/drm/radeon/ni.c cayman_pcie_gart_disable(rdev); rdev 2354 drivers/gpu/drm/radeon/ni.c int cayman_init(struct radeon_device *rdev) rdev 2356 drivers/gpu/drm/radeon/ni.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 2360 drivers/gpu/drm/radeon/ni.c if (!radeon_get_bios(rdev)) { rdev 2361 drivers/gpu/drm/radeon/ni.c if (ASIC_IS_AVIVO(rdev)) rdev 2365 drivers/gpu/drm/radeon/ni.c if (!rdev->is_atom_bios) { rdev 2366 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "Expecting atombios for cayman GPU\n"); rdev 2369 drivers/gpu/drm/radeon/ni.c r = radeon_atombios_init(rdev); rdev 2374 drivers/gpu/drm/radeon/ni.c if (!radeon_card_posted(rdev)) { rdev 2375 drivers/gpu/drm/radeon/ni.c if (!rdev->bios) { rdev 2376 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); rdev 2380 drivers/gpu/drm/radeon/ni.c atom_asic_init(rdev->mode_info.atom_context); rdev 2383 drivers/gpu/drm/radeon/ni.c ni_init_golden_registers(rdev); rdev 2385 drivers/gpu/drm/radeon/ni.c r600_scratch_init(rdev); rdev 2387 drivers/gpu/drm/radeon/ni.c radeon_surface_init(rdev); rdev 2389 drivers/gpu/drm/radeon/ni.c radeon_get_clock_info(rdev->ddev); rdev 2391 drivers/gpu/drm/radeon/ni.c r = radeon_fence_driver_init(rdev); rdev 2395 drivers/gpu/drm/radeon/ni.c r = evergreen_mc_init(rdev); rdev 2399 drivers/gpu/drm/radeon/ni.c r = radeon_bo_init(rdev); rdev 2403 drivers/gpu/drm/radeon/ni.c if (rdev->flags & RADEON_IS_IGP) { rdev 2404 drivers/gpu/drm/radeon/ni.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { rdev 2405 drivers/gpu/drm/radeon/ni.c r = ni_init_microcode(rdev); rdev 2412 drivers/gpu/drm/radeon/ni.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw || !rdev->mc_fw) { rdev 2413 drivers/gpu/drm/radeon/ni.c r = ni_init_microcode(rdev); rdev 2422 drivers/gpu/drm/radeon/ni.c radeon_pm_init(rdev); rdev 2425 drivers/gpu/drm/radeon/ni.c r600_ring_init(rdev, ring, 1024 * 1024); rdev 2427 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 2429 drivers/gpu/drm/radeon/ni.c r600_ring_init(rdev, ring, 64 * 1024); rdev 2431 drivers/gpu/drm/radeon/ni.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 2433 drivers/gpu/drm/radeon/ni.c r600_ring_init(rdev, ring, 64 * 1024); rdev 2435 drivers/gpu/drm/radeon/ni.c cayman_uvd_init(rdev); rdev 2436 drivers/gpu/drm/radeon/ni.c cayman_vce_init(rdev); rdev 2438 drivers/gpu/drm/radeon/ni.c rdev->ih.ring_obj = NULL; rdev 2439 drivers/gpu/drm/radeon/ni.c r600_ih_ring_init(rdev, 64 * 1024); rdev 2441 drivers/gpu/drm/radeon/ni.c r = r600_pcie_gart_init(rdev); rdev 2445 drivers/gpu/drm/radeon/ni.c rdev->accel_working = true; rdev 2446 drivers/gpu/drm/radeon/ni.c r = cayman_startup(rdev); rdev 2448 drivers/gpu/drm/radeon/ni.c dev_err(rdev->dev, "disabling GPU acceleration\n"); rdev 2449 drivers/gpu/drm/radeon/ni.c cayman_cp_fini(rdev); rdev 2450 drivers/gpu/drm/radeon/ni.c cayman_dma_fini(rdev); rdev 2451 drivers/gpu/drm/radeon/ni.c r600_irq_fini(rdev); rdev 2452 drivers/gpu/drm/radeon/ni.c if (rdev->flags & RADEON_IS_IGP) rdev 2453 drivers/gpu/drm/radeon/ni.c sumo_rlc_fini(rdev); rdev 2454 drivers/gpu/drm/radeon/ni.c radeon_wb_fini(rdev); rdev 2455 drivers/gpu/drm/radeon/ni.c radeon_ib_pool_fini(rdev); rdev 2456 drivers/gpu/drm/radeon/ni.c radeon_vm_manager_fini(rdev); rdev 2457 drivers/gpu/drm/radeon/ni.c radeon_irq_kms_fini(rdev); rdev 2458 drivers/gpu/drm/radeon/ni.c cayman_pcie_gart_fini(rdev); rdev 2459 drivers/gpu/drm/radeon/ni.c rdev->accel_working = false; rdev 2469 drivers/gpu/drm/radeon/ni.c if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) { rdev 2477 drivers/gpu/drm/radeon/ni.c void cayman_fini(struct radeon_device *rdev) rdev 2479 drivers/gpu/drm/radeon/ni.c radeon_pm_fini(rdev); rdev 2480 drivers/gpu/drm/radeon/ni.c cayman_cp_fini(rdev); rdev 2481 drivers/gpu/drm/radeon/ni.c cayman_dma_fini(rdev); rdev 2482 drivers/gpu/drm/radeon/ni.c r600_irq_fini(rdev); rdev 2483 drivers/gpu/drm/radeon/ni.c if (rdev->flags & RADEON_IS_IGP) rdev 2484 drivers/gpu/drm/radeon/ni.c sumo_rlc_fini(rdev); rdev 2485 drivers/gpu/drm/radeon/ni.c radeon_wb_fini(rdev); rdev 2486 drivers/gpu/drm/radeon/ni.c radeon_vm_manager_fini(rdev); rdev 2487 drivers/gpu/drm/radeon/ni.c radeon_ib_pool_fini(rdev); rdev 2488 drivers/gpu/drm/radeon/ni.c radeon_irq_kms_fini(rdev); rdev 2489 drivers/gpu/drm/radeon/ni.c uvd_v1_0_fini(rdev); rdev 2490 drivers/gpu/drm/radeon/ni.c radeon_uvd_fini(rdev); rdev 2491 drivers/gpu/drm/radeon/ni.c if (rdev->has_vce) rdev 2492 drivers/gpu/drm/radeon/ni.c radeon_vce_fini(rdev); rdev 2493 drivers/gpu/drm/radeon/ni.c cayman_pcie_gart_fini(rdev); rdev 2494 drivers/gpu/drm/radeon/ni.c r600_vram_scratch_fini(rdev); rdev 2495 drivers/gpu/drm/radeon/ni.c radeon_gem_fini(rdev); rdev 2496 drivers/gpu/drm/radeon/ni.c radeon_fence_driver_fini(rdev); rdev 2497 drivers/gpu/drm/radeon/ni.c radeon_bo_fini(rdev); rdev 2498 drivers/gpu/drm/radeon/ni.c radeon_atombios_fini(rdev); rdev 2499 drivers/gpu/drm/radeon/ni.c kfree(rdev->bios); rdev 2500 drivers/gpu/drm/radeon/ni.c rdev->bios = NULL; rdev 2506 drivers/gpu/drm/radeon/ni.c int cayman_vm_init(struct radeon_device *rdev) rdev 2509 drivers/gpu/drm/radeon/ni.c rdev->vm_manager.nvm = 8; rdev 2511 drivers/gpu/drm/radeon/ni.c if (rdev->flags & RADEON_IS_IGP) { rdev 2514 drivers/gpu/drm/radeon/ni.c rdev->vm_manager.vram_base_offset = tmp; rdev 2516 drivers/gpu/drm/radeon/ni.c rdev->vm_manager.vram_base_offset = 0; rdev 2520 drivers/gpu/drm/radeon/ni.c void cayman_vm_fini(struct radeon_device *rdev) rdev 2533 drivers/gpu/drm/radeon/ni.c void cayman_vm_decode_fault(struct radeon_device *rdev, rdev 2693 drivers/gpu/drm/radeon/ni.c void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 2722 drivers/gpu/drm/radeon/ni.c int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) rdev 2727 drivers/gpu/drm/radeon/ni.c r = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 30 drivers/gpu/drm/radeon/ni_dma.c u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); rdev 53 drivers/gpu/drm/radeon/ni_dma.c uint32_t cayman_dma_get_rptr(struct radeon_device *rdev, rdev 58 drivers/gpu/drm/radeon/ni_dma.c if (rdev->wb.enabled) { rdev 59 drivers/gpu/drm/radeon/ni_dma.c rptr = rdev->wb.wb[ring->rptr_offs/4]; rdev 80 drivers/gpu/drm/radeon/ni_dma.c uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, rdev 101 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_set_wptr(struct radeon_device *rdev, rdev 122 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_ring_ib_execute(struct radeon_device *rdev, rdev 125 drivers/gpu/drm/radeon/ni_dma.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 128 drivers/gpu/drm/radeon/ni_dma.c if (rdev->wb.enabled) { rdev 157 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_stop(struct radeon_device *rdev) rdev 161 drivers/gpu/drm/radeon/ni_dma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || rdev 162 drivers/gpu/drm/radeon/ni_dma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) rdev 163 drivers/gpu/drm/radeon/ni_dma.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 175 drivers/gpu/drm/radeon/ni_dma.c rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; rdev 176 drivers/gpu/drm/radeon/ni_dma.c rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX].ready = false; rdev 187 drivers/gpu/drm/radeon/ni_dma.c int cayman_dma_resume(struct radeon_device *rdev) rdev 197 drivers/gpu/drm/radeon/ni_dma.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 201 drivers/gpu/drm/radeon/ni_dma.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 223 drivers/gpu/drm/radeon/ni_dma.c upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFF); rdev 225 drivers/gpu/drm/radeon/ni_dma.c ((rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC)); rdev 227 drivers/gpu/drm/radeon/ni_dma.c if (rdev->wb.enabled) rdev 250 drivers/gpu/drm/radeon/ni_dma.c r = radeon_ring_test(rdev, ring->idx, ring); rdev 257 drivers/gpu/drm/radeon/ni_dma.c if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || rdev 258 drivers/gpu/drm/radeon/ni_dma.c (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) rdev 259 drivers/gpu/drm/radeon/ni_dma.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 271 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_fini(struct radeon_device *rdev) rdev 273 drivers/gpu/drm/radeon/ni_dma.c cayman_dma_stop(rdev); rdev 274 drivers/gpu/drm/radeon/ni_dma.c radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX]); rdev 275 drivers/gpu/drm/radeon/ni_dma.c radeon_ring_fini(rdev, &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]); rdev 287 drivers/gpu/drm/radeon/ni_dma.c bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 289 drivers/gpu/drm/radeon/ni_dma.c u32 reset_mask = cayman_gpu_check_soft_reset(rdev); rdev 298 drivers/gpu/drm/radeon/ni_dma.c radeon_ring_lockup_update(rdev, ring); rdev 301 drivers/gpu/drm/radeon/ni_dma.c return radeon_ring_test_lockup(rdev, ring); rdev 315 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_vm_copy_pages(struct radeon_device *rdev, rdev 353 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_vm_write_pages(struct radeon_device *rdev, rdev 374 drivers/gpu/drm/radeon/ni_dma.c value = radeon_vm_map_gart(rdev, addr); rdev 401 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_vm_set_pages(struct radeon_device *rdev, rdev 449 drivers/gpu/drm/radeon/ni_dma.c void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 723 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); rdev 724 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); rdev 726 drivers/gpu/drm/radeon/ni_dpm.c extern int ni_mc_load_microcode(struct radeon_device *rdev); rdev 728 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_get_pi(struct radeon_device *rdev) rdev 730 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *pi = rdev->pm.dpm.priv; rdev 763 drivers/gpu/drm/radeon/ni_dpm.c static void ni_calculate_leakage_for_v_and_t(struct radeon_device *rdev, rdev 773 drivers/gpu/drm/radeon/ni_dpm.c bool ni_dpm_vblank_too_short(struct radeon_device *rdev) rdev 775 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 776 drivers/gpu/drm/radeon/ni_dpm.c u32 vblank_time = r600_dpm_get_vblank_time(rdev); rdev 787 drivers/gpu/drm/radeon/ni_dpm.c static void ni_apply_state_adjust_rules(struct radeon_device *rdev, rdev 797 drivers/gpu/drm/radeon/ni_dpm.c if ((rdev->pm.dpm.new_active_crtc_count > 1) || rdev 798 drivers/gpu/drm/radeon/ni_dpm.c ni_dpm_vblank_too_short(rdev)) rdev 803 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.ac_power) rdev 804 drivers/gpu/drm/radeon/ni_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 806 drivers/gpu/drm/radeon/ni_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 808 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.ac_power == false) { rdev 831 drivers/gpu/drm/radeon/ni_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, rdev 866 drivers/gpu/drm/radeon/ni_dpm.c btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, rdev 871 drivers/gpu/drm/radeon/ni_dpm.c btc_adjust_clock_combinations(rdev, max_limits, rdev 875 drivers/gpu/drm/radeon/ni_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 878 drivers/gpu/drm/radeon/ni_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 881 drivers/gpu/drm/radeon/ni_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 884 drivers/gpu/drm/radeon/ni_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, rdev 885 drivers/gpu/drm/radeon/ni_dpm.c rdev->clock.current_dispclk, rdev 890 drivers/gpu/drm/radeon/ni_dpm.c btc_apply_voltage_delta_rules(rdev, rdev 898 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) rdev 901 drivers/gpu/drm/radeon/ni_dpm.c if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) rdev 906 drivers/gpu/drm/radeon/ni_dpm.c static void ni_cg_clockgating_default(struct radeon_device *rdev) rdev 914 drivers/gpu/drm/radeon/ni_dpm.c btc_program_mgcg_hw_sequence(rdev, ps, count); rdev 917 drivers/gpu/drm/radeon/ni_dpm.c static void ni_gfx_clockgating_enable(struct radeon_device *rdev, rdev 931 drivers/gpu/drm/radeon/ni_dpm.c btc_program_mgcg_hw_sequence(rdev, ps, count); rdev 934 drivers/gpu/drm/radeon/ni_dpm.c static void ni_mg_clockgating_default(struct radeon_device *rdev) rdev 942 drivers/gpu/drm/radeon/ni_dpm.c btc_program_mgcg_hw_sequence(rdev, ps, count); rdev 945 drivers/gpu/drm/radeon/ni_dpm.c static void ni_mg_clockgating_enable(struct radeon_device *rdev, rdev 959 drivers/gpu/drm/radeon/ni_dpm.c btc_program_mgcg_hw_sequence(rdev, ps, count); rdev 962 drivers/gpu/drm/radeon/ni_dpm.c static void ni_ls_clockgating_default(struct radeon_device *rdev) rdev 970 drivers/gpu/drm/radeon/ni_dpm.c btc_program_mgcg_hw_sequence(rdev, ps, count); rdev 973 drivers/gpu/drm/radeon/ni_dpm.c static void ni_ls_clockgating_enable(struct radeon_device *rdev, rdev 987 drivers/gpu/drm/radeon/ni_dpm.c btc_program_mgcg_hw_sequence(rdev, ps, count); rdev 991 drivers/gpu/drm/radeon/ni_dpm.c static int ni_patch_single_dependency_table_based_on_leakage(struct radeon_device *rdev, rdev 994 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1009 drivers/gpu/drm/radeon/ni_dpm.c static int ni_patch_dependency_tables_based_on_leakage(struct radeon_device *rdev) rdev 1013 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_patch_single_dependency_table_based_on_leakage(rdev, rdev 1014 drivers/gpu/drm/radeon/ni_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); rdev 1016 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_patch_single_dependency_table_based_on_leakage(rdev, rdev 1017 drivers/gpu/drm/radeon/ni_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); rdev 1021 drivers/gpu/drm/radeon/ni_dpm.c static void ni_stop_dpm(struct radeon_device *rdev) rdev 1027 drivers/gpu/drm/radeon/ni_dpm.c static int ni_notify_hw_of_power_source(struct radeon_device *rdev, rdev 1031 drivers/gpu/drm/radeon/ni_dpm.c return (rv770_send_msg_to_smc(rdev, PPSMC_MSG_RunningOnAC) == PPSMC_Result_OK) ? rdev 1038 drivers/gpu/drm/radeon/ni_dpm.c static PPSMC_Result ni_send_msg_to_smc_with_parameter(struct radeon_device *rdev, rdev 1042 drivers/gpu/drm/radeon/ni_dpm.c return rv770_send_msg_to_smc(rdev, msg); rdev 1045 drivers/gpu/drm/radeon/ni_dpm.c static int ni_restrict_performance_levels_before_switch(struct radeon_device *rdev) rdev 1047 drivers/gpu/drm/radeon/ni_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK) rdev 1050 drivers/gpu/drm/radeon/ni_dpm.c return (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 1) == PPSMC_Result_OK) ? rdev 1054 drivers/gpu/drm/radeon/ni_dpm.c int ni_dpm_force_performance_level(struct radeon_device *rdev, rdev 1058 drivers/gpu/drm/radeon/ni_dpm.c if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 0) != PPSMC_Result_OK) rdev 1061 drivers/gpu/drm/radeon/ni_dpm.c if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 1) != PPSMC_Result_OK) rdev 1064 drivers/gpu/drm/radeon/ni_dpm.c if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) rdev 1067 drivers/gpu/drm/radeon/ni_dpm.c if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 1) != PPSMC_Result_OK) rdev 1070 drivers/gpu/drm/radeon/ni_dpm.c if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) rdev 1073 drivers/gpu/drm/radeon/ni_dpm.c if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 0) != PPSMC_Result_OK) rdev 1077 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.forced_level = level; rdev 1082 drivers/gpu/drm/radeon/ni_dpm.c static void ni_stop_smc(struct radeon_device *rdev) rdev 1087 drivers/gpu/drm/radeon/ni_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1096 drivers/gpu/drm/radeon/ni_dpm.c r7xx_stop_smc(rdev); rdev 1099 drivers/gpu/drm/radeon/ni_dpm.c static int ni_process_firmware_header(struct radeon_device *rdev) rdev 1101 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1102 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1103 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1107 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1117 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1127 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1137 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1147 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1157 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1167 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, rdev 1181 drivers/gpu/drm/radeon/ni_dpm.c static void ni_read_clock_registers(struct radeon_device *rdev) rdev 1183 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1202 drivers/gpu/drm/radeon/ni_dpm.c static int ni_enter_ulp_state(struct radeon_device *rdev) rdev 1204 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1222 drivers/gpu/drm/radeon/ni_dpm.c static void ni_program_response_times(struct radeon_device *rdev) rdev 1228 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_mvdd_chg_time, 1); rdev 1230 drivers/gpu/drm/radeon/ni_dpm.c voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time; rdev 1231 drivers/gpu/drm/radeon/ni_dpm.c backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time; rdev 1242 drivers/gpu/drm/radeon/ni_dpm.c reference_clock = radeon_get_xclk(rdev); rdev 1251 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_delay_vreg, vddc_dly); rdev 1252 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_delay_bbias, bb_dly); rdev 1253 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_delay_acpi, acpi_dly); rdev 1254 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_mclk_chg_timeout, vbi_dly); rdev 1255 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_mc_block_delay, 0xAA); rdev 1256 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_mclk_switch_lim, mclk_switch_limit); rdev 1259 drivers/gpu/drm/radeon/ni_dpm.c static void ni_populate_smc_voltage_table(struct radeon_device *rdev, rdev 1271 drivers/gpu/drm/radeon/ni_dpm.c static void ni_populate_smc_voltage_tables(struct radeon_device *rdev, rdev 1274 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1275 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1279 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table); rdev 1293 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table); rdev 1301 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_voltage_value(struct radeon_device *rdev, rdev 1322 drivers/gpu/drm/radeon/ni_dpm.c static void ni_populate_mvdd_value(struct radeon_device *rdev, rdev 1326 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1327 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1344 drivers/gpu/drm/radeon/ni_dpm.c static int ni_get_std_voltage_value(struct radeon_device *rdev, rdev 1348 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries && rdev 1349 drivers/gpu/drm/radeon/ni_dpm.c ((u32)voltage->index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)) rdev 1350 drivers/gpu/drm/radeon/ni_dpm.c *std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc; rdev 1357 drivers/gpu/drm/radeon/ni_dpm.c static void ni_populate_std_voltage_value(struct radeon_device *rdev, rdev 1365 drivers/gpu/drm/radeon/ni_dpm.c static u32 ni_get_smc_power_scaling_factor(struct radeon_device *rdev) rdev 1368 drivers/gpu/drm/radeon/ni_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 1382 drivers/gpu/drm/radeon/ni_dpm.c static u32 ni_calculate_power_boost_limit(struct radeon_device *rdev, rdev 1387 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1388 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1402 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 1408 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, &vddc, &std_vddc_med); rdev 1412 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 1418 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, &vddc, &std_vddc_high); rdev 1434 drivers/gpu/drm/radeon/ni_dpm.c static int ni_calculate_adjusted_tdp_limits(struct radeon_device *rdev, rdev 1440 drivers/gpu/drm/radeon/ni_dpm.c if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit) rdev 1444 drivers/gpu/drm/radeon/ni_dpm.c *tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; rdev 1445 drivers/gpu/drm/radeon/ni_dpm.c *near_tdp_limit = rdev->pm.dpm.near_tdp_limit + (*tdp_limit - rdev->pm.dpm.tdp_limit); rdev 1447 drivers/gpu/drm/radeon/ni_dpm.c *tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; rdev 1448 drivers/gpu/drm/radeon/ni_dpm.c *near_tdp_limit = rdev->pm.dpm.near_tdp_limit - (rdev->pm.dpm.tdp_limit - *tdp_limit); rdev 1454 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_smc_tdp_limits(struct radeon_device *rdev, rdev 1457 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1458 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1462 drivers/gpu/drm/radeon/ni_dpm.c u32 scaling_factor = ni_get_smc_power_scaling_factor(rdev); rdev 1473 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_calculate_adjusted_tdp_limits(rdev, rdev 1475 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.tdp_adjustment, rdev 1481 drivers/gpu/drm/radeon/ni_dpm.c power_boost_limit = ni_calculate_power_boost_limit(rdev, radeon_state, rdev 1494 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_copy_bytes_to_smc(rdev, rdev 1506 drivers/gpu/drm/radeon/ni_dpm.c int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, rdev 1571 drivers/gpu/drm/radeon/ni_dpm.c static int ni_init_arb_table_index(struct radeon_device *rdev) rdev 1573 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1574 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1578 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, ni_pi->arb_table_start, rdev 1586 drivers/gpu/drm/radeon/ni_dpm.c return rv770_write_smc_sram_dword(rdev, ni_pi->arb_table_start, rdev 1590 drivers/gpu/drm/radeon/ni_dpm.c static int ni_initial_switch_from_arb_f0_to_f1(struct radeon_device *rdev) rdev 1592 drivers/gpu/drm/radeon/ni_dpm.c return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); rdev 1595 drivers/gpu/drm/radeon/ni_dpm.c static int ni_force_switch_to_arb_f0(struct radeon_device *rdev) rdev 1597 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1598 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1602 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, ni_pi->arb_table_start, rdev 1612 drivers/gpu/drm/radeon/ni_dpm.c return ni_copy_and_switch_arb_sets(rdev, tmp, MC_CG_ARB_FREQ_F0); rdev 1615 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_memory_timing_parameters(struct radeon_device *rdev, rdev 1623 drivers/gpu/drm/radeon/ni_dpm.c (u8)rv770_calculate_memory_refresh_rate(rdev, pl->sclk); rdev 1626 drivers/gpu/drm/radeon/ni_dpm.c radeon_atom_set_engine_dram_timings(rdev, pl->sclk, pl->mclk); rdev 1637 drivers/gpu/drm/radeon/ni_dpm.c static int ni_do_program_memory_timing_parameters(struct radeon_device *rdev, rdev 1641 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1642 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1648 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_memory_timing_parameters(rdev, &state->performance_levels[i], &arb_regs); rdev 1652 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_copy_bytes_to_smc(rdev, rdev 1665 drivers/gpu/drm/radeon/ni_dpm.c static int ni_program_memory_timing_parameters(struct radeon_device *rdev, rdev 1668 drivers/gpu/drm/radeon/ni_dpm.c return ni_do_program_memory_timing_parameters(rdev, radeon_new_state, rdev 1672 drivers/gpu/drm/radeon/ni_dpm.c static void ni_populate_initial_mvdd_value(struct radeon_device *rdev, rdev 1675 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1681 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_smc_initial_state(struct radeon_device *rdev, rdev 1686 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1687 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1688 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1730 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 1736 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, rdev 1740 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_std_voltage_value(rdev, std_vddc, rdev 1746 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_voltage_value(rdev, rdev 1751 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); rdev 1765 drivers/gpu/drm/radeon/ni_dpm.c cypress_get_strobe_mode_settings(rdev, rdev 1792 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_smc_acpi_state(struct radeon_device *rdev, rdev 1795 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1796 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 1797 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1816 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_voltage_value(rdev, rdev 1822 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, rdev 1825 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_std_voltage_value(rdev, std_vddc, rdev 1839 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_voltage_value(rdev, rdev 1846 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, rdev 1850 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_std_voltage_value(rdev, std_vddc, rdev 1859 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_voltage_value(rdev, rdev 1921 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); rdev 1940 drivers/gpu/drm/radeon/ni_dpm.c static int ni_init_smc_table(struct radeon_device *rdev) rdev 1942 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1943 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1945 drivers/gpu/drm/radeon/ni_dpm.c struct radeon_ps *radeon_boot_state = rdev->pm.dpm.boot_ps; rdev 1950 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_smc_voltage_tables(rdev, table); rdev 1952 drivers/gpu/drm/radeon/ni_dpm.c switch (rdev->pm.int_thermal_type) { rdev 1965 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) rdev 1968 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) rdev 1971 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 1977 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_smc_initial_state(rdev, radeon_boot_state, table); rdev 1981 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_smc_acpi_state(rdev, table); rdev 1989 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_do_program_memory_timing_parameters(rdev, radeon_boot_state, rdev 1994 drivers/gpu/drm/radeon/ni_dpm.c return rv770_copy_bytes_to_smc(rdev, pi->state_table_start, (u8 *)table, rdev 1998 drivers/gpu/drm/radeon/ni_dpm.c static int ni_calculate_sclk_params(struct radeon_device *rdev, rdev 2002 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2003 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2012 drivers/gpu/drm/radeon/ni_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 2017 drivers/gpu/drm/radeon/ni_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 2044 drivers/gpu/drm/radeon/ni_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 2069 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_sclk_value(struct radeon_device *rdev, rdev 2076 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_calculate_sclk_params(rdev, engine_clock, &sclk_tmp); rdev 2090 drivers/gpu/drm/radeon/ni_dpm.c static int ni_init_smc_spll_table(struct radeon_device *rdev) rdev 2092 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2093 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2112 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_calculate_sclk_params(rdev, sclk, &sclk_params); rdev 2152 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_copy_bytes_to_smc(rdev, ni_pi->spll_table_start, (u8 *)spll_table, rdev 2160 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_mclk_value(struct radeon_device *rdev, rdev 2167 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2168 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2183 drivers/gpu/drm/radeon/ni_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, rdev 2195 drivers/gpu/drm/radeon/ni_dpm.c ibias = cypress_map_clkf_to_ibias(rdev, dividers.whole_fb_div); rdev 2240 drivers/gpu/drm/radeon/ni_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 2242 drivers/gpu/drm/radeon/ni_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; rdev 2294 drivers/gpu/drm/radeon/ni_dpm.c static void ni_populate_smc_sp(struct radeon_device *rdev, rdev 2299 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2309 drivers/gpu/drm/radeon/ni_dpm.c static int ni_convert_power_level_to_smc(struct radeon_device *rdev, rdev 2313 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2314 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2315 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2324 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_sclk_value(rdev, pl->sclk, &level->sclk); rdev 2342 drivers/gpu/drm/radeon/ni_dpm.c level->strobeMode = cypress_get_strobe_mode_settings(rdev, pl->mclk); rdev 2345 drivers/gpu/drm/radeon/ni_dpm.c if (cypress_get_mclk_frequency_ratio(rdev, pl->mclk, true) >= rdev 2356 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_mclk_value(rdev, pl->sclk, pl->mclk, rdev 2361 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_mclk_value(rdev, pl->sclk, pl->mclk, &level->mclk, 1, 1); rdev 2366 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 2371 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_get_std_voltage_value(rdev, &level->vddc, &std_vddc); rdev 2375 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_std_voltage_value(rdev, std_vddc, rdev 2379 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table, rdev 2385 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); rdev 2390 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_smc_t(struct radeon_device *rdev, rdev 2394 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2395 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2450 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_power_containment_values(struct radeon_device *rdev, rdev 2454 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2455 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2456 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2476 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_calculate_adjusted_tdp_limits(rdev, rdev 2478 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.tdp_adjustment, rdev 2484 drivers/gpu/drm/radeon/ni_dpm.c power_boost_limit = ni_calculate_power_boost_limit(rdev, radeon_state, near_tdp_limit); rdev 2486 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_write_smc_sram_dword(rdev, rdev 2490 drivers/gpu/drm/radeon/ni_dpm.c ni_scale_power_for_smc(power_boost_limit, ni_get_smc_power_scaling_factor(rdev)), rdev 2536 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_sq_ramping_values(struct radeon_device *rdev, rdev 2540 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2553 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.sq_ramping_threshold == 0) rdev 2575 drivers/gpu/drm/radeon/ni_dpm.c if ((state->performance_levels[i].sclk >= rdev->pm.dpm.sq_ramping_threshold) && rdev 2594 drivers/gpu/drm/radeon/ni_dpm.c static int ni_enable_power_containment(struct radeon_device *rdev, rdev 2598 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2605 drivers/gpu/drm/radeon/ni_dpm.c smc_result = rv770_send_msg_to_smc(rdev, PPSMC_TDPClampingActive); rdev 2614 drivers/gpu/drm/radeon/ni_dpm.c smc_result = rv770_send_msg_to_smc(rdev, PPSMC_TDPClampingInactive); rdev 2624 drivers/gpu/drm/radeon/ni_dpm.c static int ni_convert_power_state_to_smc(struct radeon_device *rdev, rdev 2628 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2629 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2643 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_convert_power_level_to_smc(rdev, &state->performance_levels[i], rdev 2667 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_watermark_threshold, rdev 2670 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_smc_sp(rdev, radeon_state, smc_state); rdev 2672 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_power_containment_values(rdev, radeon_state, smc_state); rdev 2676 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_sq_ramping_values(rdev, radeon_state, smc_state); rdev 2680 drivers/gpu/drm/radeon/ni_dpm.c return ni_populate_smc_t(rdev, radeon_state, smc_state); rdev 2683 drivers/gpu/drm/radeon/ni_dpm.c static int ni_upload_sw_state(struct radeon_device *rdev, rdev 2686 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2697 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_convert_power_state_to_smc(rdev, radeon_new_state, smc_state); rdev 2701 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_copy_bytes_to_smc(rdev, address, (u8 *)smc_state, state_size, pi->sram_end); rdev 2709 drivers/gpu/drm/radeon/ni_dpm.c static int ni_set_mc_special_registers(struct radeon_device *rdev, rdev 2712 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2871 drivers/gpu/drm/radeon/ni_dpm.c static int ni_initialize_mc_reg_table(struct radeon_device *rdev) rdev 2873 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2877 drivers/gpu/drm/radeon/ni_dpm.c u8 module_index = rv770_get_memory_module_index(rdev); rdev 2897 drivers/gpu/drm/radeon/ni_dpm.c ret = radeon_atom_init_mc_reg_table(rdev, module_index, table); rdev 2909 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_set_mc_special_registers(rdev, ni_table); rdev 2922 drivers/gpu/drm/radeon/ni_dpm.c static void ni_populate_mc_reg_addresses(struct radeon_device *rdev, rdev 2925 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2957 drivers/gpu/drm/radeon/ni_dpm.c static void ni_convert_mc_reg_table_entry_to_smc(struct radeon_device *rdev, rdev 2961 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2978 drivers/gpu/drm/radeon/ni_dpm.c static void ni_convert_mc_reg_table_to_smc(struct radeon_device *rdev, rdev 2986 drivers/gpu/drm/radeon/ni_dpm.c ni_convert_mc_reg_table_entry_to_smc(rdev, rdev 2992 drivers/gpu/drm/radeon/ni_dpm.c static int ni_populate_mc_reg_table(struct radeon_device *rdev, rdev 2995 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2996 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2997 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3003 drivers/gpu/drm/radeon/ni_dpm.c rv770_write_smc_soft_register(rdev, NI_SMC_SOFT_REGISTER_seq_index, 1); rdev 3005 drivers/gpu/drm/radeon/ni_dpm.c ni_populate_mc_reg_addresses(rdev, mc_reg_table); rdev 3007 drivers/gpu/drm/radeon/ni_dpm.c ni_convert_mc_reg_table_entry_to_smc(rdev, &boot_state->performance_levels[0], rdev 3015 drivers/gpu/drm/radeon/ni_dpm.c ni_convert_mc_reg_table_to_smc(rdev, radeon_boot_state, mc_reg_table); rdev 3017 drivers/gpu/drm/radeon/ni_dpm.c return rv770_copy_bytes_to_smc(rdev, eg_pi->mc_reg_table_start, rdev 3023 drivers/gpu/drm/radeon/ni_dpm.c static int ni_upload_mc_reg_table(struct radeon_device *rdev, rdev 3026 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3027 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3028 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3035 drivers/gpu/drm/radeon/ni_dpm.c ni_convert_mc_reg_table_to_smc(rdev, radeon_new_state, mc_reg_table); rdev 3040 drivers/gpu/drm/radeon/ni_dpm.c return rv770_copy_bytes_to_smc(rdev, address, rdev 3046 drivers/gpu/drm/radeon/ni_dpm.c static int ni_init_driver_calculated_leakage_table(struct radeon_device *rdev, rdev 3049 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3050 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3062 drivers/gpu/drm/radeon/ni_dpm.c scaling_factor = ni_get_smc_power_scaling_factor(rdev); rdev 3071 drivers/gpu/drm/radeon/ni_dpm.c ni_calculate_leakage_for_v_and_t(rdev, rdev 3093 drivers/gpu/drm/radeon/ni_dpm.c static int ni_init_simplified_leakage_table(struct radeon_device *rdev, rdev 3096 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3098 drivers/gpu/drm/radeon/ni_dpm.c &rdev->pm.dpm.dyn_state.cac_leakage_table; rdev 3118 drivers/gpu/drm/radeon/ni_dpm.c scaling_factor = ni_get_smc_power_scaling_factor(rdev); rdev 3139 drivers/gpu/drm/radeon/ni_dpm.c static int ni_initialize_smc_cac_tables(struct radeon_device *rdev) rdev 3141 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3142 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3165 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.i_leakage = rdev->pm.dpm.cac_leakage; rdev 3177 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_init_driver_calculated_leakage_table(rdev, cac_tables); rdev 3179 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_init_simplified_leakage_table(rdev, cac_tables); rdev 3194 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_copy_bytes_to_smc(rdev, ni_pi->cac_table_start, (u8 *)cac_tables, rdev 3208 drivers/gpu/drm/radeon/ni_dpm.c static int ni_initialize_hardware_cac_manager(struct radeon_device *rdev) rdev 3210 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3377 drivers/gpu/drm/radeon/ni_dpm.c static int ni_enable_smc_cac(struct radeon_device *rdev, rdev 3381 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3388 drivers/gpu/drm/radeon/ni_dpm.c smc_result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_CollectCAC_PowerCorreln); rdev 3391 drivers/gpu/drm/radeon/ni_dpm.c smc_result = rv770_send_msg_to_smc(rdev, PPSMC_CACLongTermAvgEnable); rdev 3396 drivers/gpu/drm/radeon/ni_dpm.c smc_result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_EnableCac); rdev 3403 drivers/gpu/drm/radeon/ni_dpm.c smc_result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_DisableCac); rdev 3408 drivers/gpu/drm/radeon/ni_dpm.c smc_result = rv770_send_msg_to_smc(rdev, PPSMC_CACLongTermAvgDisable); rdev 3418 drivers/gpu/drm/radeon/ni_dpm.c static int ni_pcie_performance_request(struct radeon_device *rdev, rdev 3422 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3427 drivers/gpu/drm/radeon/ni_dpm.c radeon_acpi_pcie_notify_device_ready(rdev); rdev 3429 drivers/gpu/drm/radeon/ni_dpm.c return radeon_acpi_pcie_performance_request(rdev, perf_req, advertise); rdev 3433 drivers/gpu/drm/radeon/ni_dpm.c return radeon_acpi_pcie_performance_request(rdev, perf_req, advertise); rdev 3439 drivers/gpu/drm/radeon/ni_dpm.c static int ni_advertise_gen2_capability(struct radeon_device *rdev) rdev 3441 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3453 drivers/gpu/drm/radeon/ni_dpm.c ni_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, true); rdev 3458 drivers/gpu/drm/radeon/ni_dpm.c static void ni_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 3461 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3497 drivers/gpu/drm/radeon/ni_dpm.c static void ni_enable_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 3500 drivers/gpu/drm/radeon/ni_dpm.c ni_enable_bif_dynamic_pcie_gen2(rdev, enable); rdev 3508 drivers/gpu/drm/radeon/ni_dpm.c void ni_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 3523 drivers/gpu/drm/radeon/ni_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 3526 drivers/gpu/drm/radeon/ni_dpm.c void ni_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 3541 drivers/gpu/drm/radeon/ni_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 3544 drivers/gpu/drm/radeon/ni_dpm.c void ni_dpm_setup_asic(struct radeon_device *rdev) rdev 3546 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3549 drivers/gpu/drm/radeon/ni_dpm.c r = ni_mc_load_microcode(rdev); rdev 3552 drivers/gpu/drm/radeon/ni_dpm.c ni_read_clock_registers(rdev); rdev 3553 drivers/gpu/drm/radeon/ni_dpm.c btc_read_arb_registers(rdev); rdev 3554 drivers/gpu/drm/radeon/ni_dpm.c rv770_get_memory_type(rdev); rdev 3556 drivers/gpu/drm/radeon/ni_dpm.c ni_advertise_gen2_capability(rdev); rdev 3557 drivers/gpu/drm/radeon/ni_dpm.c rv770_get_pcie_gen2_status(rdev); rdev 3558 drivers/gpu/drm/radeon/ni_dpm.c rv770_enable_acpi_pm(rdev); rdev 3561 drivers/gpu/drm/radeon/ni_dpm.c void ni_update_current_ps(struct radeon_device *rdev, rdev 3565 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3566 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3573 drivers/gpu/drm/radeon/ni_dpm.c void ni_update_requested_ps(struct radeon_device *rdev, rdev 3577 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3578 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 3585 drivers/gpu/drm/radeon/ni_dpm.c int ni_dpm_enable(struct radeon_device *rdev) rdev 3587 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3588 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3589 drivers/gpu/drm/radeon/ni_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 3593 drivers/gpu/drm/radeon/ni_dpm.c ni_cg_clockgating_default(rdev); rdev 3594 drivers/gpu/drm/radeon/ni_dpm.c if (btc_dpm_enabled(rdev)) rdev 3597 drivers/gpu/drm/radeon/ni_dpm.c ni_mg_clockgating_default(rdev); rdev 3599 drivers/gpu/drm/radeon/ni_dpm.c ni_ls_clockgating_default(rdev); rdev 3601 drivers/gpu/drm/radeon/ni_dpm.c rv770_enable_voltage_control(rdev, true); rdev 3602 drivers/gpu/drm/radeon/ni_dpm.c ret = cypress_construct_voltage_tables(rdev); rdev 3609 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_initialize_mc_reg_table(rdev); rdev 3614 drivers/gpu/drm/radeon/ni_dpm.c cypress_enable_spread_spectrum(rdev, true); rdev 3616 drivers/gpu/drm/radeon/ni_dpm.c rv770_enable_thermal_protection(rdev, true); rdev 3617 drivers/gpu/drm/radeon/ni_dpm.c rv770_setup_bsp(rdev); rdev 3618 drivers/gpu/drm/radeon/ni_dpm.c rv770_program_git(rdev); rdev 3619 drivers/gpu/drm/radeon/ni_dpm.c rv770_program_tp(rdev); rdev 3620 drivers/gpu/drm/radeon/ni_dpm.c rv770_program_tpp(rdev); rdev 3621 drivers/gpu/drm/radeon/ni_dpm.c rv770_program_sstp(rdev); rdev 3622 drivers/gpu/drm/radeon/ni_dpm.c cypress_enable_display_gap(rdev); rdev 3623 drivers/gpu/drm/radeon/ni_dpm.c rv770_program_vc(rdev); rdev 3625 drivers/gpu/drm/radeon/ni_dpm.c ni_enable_dynamic_pcie_gen2(rdev, true); rdev 3626 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_upload_firmware(rdev); rdev 3631 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_process_firmware_header(rdev); rdev 3636 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_initial_switch_from_arb_f0_to_f1(rdev); rdev 3641 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_init_smc_table(rdev); rdev 3646 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_init_smc_spll_table(rdev); rdev 3651 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_init_arb_table_index(rdev); rdev 3657 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_mc_reg_table(rdev, boot_ps); rdev 3663 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_initialize_smc_cac_tables(rdev); rdev 3668 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_initialize_hardware_cac_manager(rdev); rdev 3673 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_smc_tdp_limits(rdev, boot_ps); rdev 3678 drivers/gpu/drm/radeon/ni_dpm.c ni_program_response_times(rdev); rdev 3679 drivers/gpu/drm/radeon/ni_dpm.c r7xx_start_smc(rdev); rdev 3680 drivers/gpu/drm/radeon/ni_dpm.c ret = cypress_notify_smc_display_change(rdev, false); rdev 3685 drivers/gpu/drm/radeon/ni_dpm.c cypress_enable_sclk_control(rdev, true); rdev 3687 drivers/gpu/drm/radeon/ni_dpm.c cypress_enable_mclk_control(rdev, true); rdev 3688 drivers/gpu/drm/radeon/ni_dpm.c cypress_start_dpm(rdev); rdev 3690 drivers/gpu/drm/radeon/ni_dpm.c ni_gfx_clockgating_enable(rdev, true); rdev 3692 drivers/gpu/drm/radeon/ni_dpm.c ni_mg_clockgating_enable(rdev, true); rdev 3694 drivers/gpu/drm/radeon/ni_dpm.c ni_ls_clockgating_enable(rdev, true); rdev 3696 drivers/gpu/drm/radeon/ni_dpm.c rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); rdev 3698 drivers/gpu/drm/radeon/ni_dpm.c ni_update_current_ps(rdev, boot_ps); rdev 3703 drivers/gpu/drm/radeon/ni_dpm.c void ni_dpm_disable(struct radeon_device *rdev) rdev 3705 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3706 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3707 drivers/gpu/drm/radeon/ni_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 3709 drivers/gpu/drm/radeon/ni_dpm.c if (!btc_dpm_enabled(rdev)) rdev 3711 drivers/gpu/drm/radeon/ni_dpm.c rv770_clear_vc(rdev); rdev 3713 drivers/gpu/drm/radeon/ni_dpm.c rv770_enable_thermal_protection(rdev, false); rdev 3714 drivers/gpu/drm/radeon/ni_dpm.c ni_enable_power_containment(rdev, boot_ps, false); rdev 3715 drivers/gpu/drm/radeon/ni_dpm.c ni_enable_smc_cac(rdev, boot_ps, false); rdev 3716 drivers/gpu/drm/radeon/ni_dpm.c cypress_enable_spread_spectrum(rdev, false); rdev 3717 drivers/gpu/drm/radeon/ni_dpm.c rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, false); rdev 3719 drivers/gpu/drm/radeon/ni_dpm.c ni_enable_dynamic_pcie_gen2(rdev, false); rdev 3721 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->irq.installed && rdev 3722 drivers/gpu/drm/radeon/ni_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 3723 drivers/gpu/drm/radeon/ni_dpm.c rdev->irq.dpm_thermal = false; rdev 3724 drivers/gpu/drm/radeon/ni_dpm.c radeon_irq_set(rdev); rdev 3728 drivers/gpu/drm/radeon/ni_dpm.c ni_gfx_clockgating_enable(rdev, false); rdev 3730 drivers/gpu/drm/radeon/ni_dpm.c ni_mg_clockgating_enable(rdev, false); rdev 3732 drivers/gpu/drm/radeon/ni_dpm.c ni_ls_clockgating_enable(rdev, false); rdev 3733 drivers/gpu/drm/radeon/ni_dpm.c ni_stop_dpm(rdev); rdev 3734 drivers/gpu/drm/radeon/ni_dpm.c btc_reset_to_default(rdev); rdev 3735 drivers/gpu/drm/radeon/ni_dpm.c ni_stop_smc(rdev); rdev 3736 drivers/gpu/drm/radeon/ni_dpm.c ni_force_switch_to_arb_f0(rdev); rdev 3738 drivers/gpu/drm/radeon/ni_dpm.c ni_update_current_ps(rdev, boot_ps); rdev 3741 drivers/gpu/drm/radeon/ni_dpm.c static int ni_power_control_set_level(struct radeon_device *rdev) rdev 3743 drivers/gpu/drm/radeon/ni_dpm.c struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; rdev 3746 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_restrict_performance_levels_before_switch(rdev); rdev 3749 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_halt_smc(rdev); rdev 3752 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_populate_smc_tdp_limits(rdev, new_ps); rdev 3755 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_resume_smc(rdev); rdev 3758 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_set_sw_state(rdev); rdev 3765 drivers/gpu/drm/radeon/ni_dpm.c int ni_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 3767 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3768 drivers/gpu/drm/radeon/ni_dpm.c struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; rdev 3771 drivers/gpu/drm/radeon/ni_dpm.c ni_update_requested_ps(rdev, new_ps); rdev 3773 drivers/gpu/drm/radeon/ni_dpm.c ni_apply_state_adjust_rules(rdev, &eg_pi->requested_rps); rdev 3778 drivers/gpu/drm/radeon/ni_dpm.c int ni_dpm_set_power_state(struct radeon_device *rdev) rdev 3780 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3785 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_restrict_performance_levels_before_switch(rdev); rdev 3790 drivers/gpu/drm/radeon/ni_dpm.c ni_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 3791 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_enable_power_containment(rdev, new_ps, false); rdev 3796 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_enable_smc_cac(rdev, new_ps, false); rdev 3801 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_halt_smc(rdev); rdev 3807 drivers/gpu/drm/radeon/ni_dpm.c btc_notify_uvd_to_smc(rdev, new_ps); rdev 3808 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_upload_sw_state(rdev, new_ps); rdev 3814 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_upload_mc_reg_table(rdev, new_ps); rdev 3820 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_program_memory_timing_parameters(rdev, new_ps); rdev 3825 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_resume_smc(rdev); rdev 3830 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_set_sw_state(rdev); rdev 3835 drivers/gpu/drm/radeon/ni_dpm.c ni_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 3836 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_enable_smc_cac(rdev, new_ps, true); rdev 3841 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_enable_power_containment(rdev, new_ps, true); rdev 3848 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_power_control_set_level(rdev); rdev 3857 drivers/gpu/drm/radeon/ni_dpm.c void ni_dpm_post_set_power_state(struct radeon_device *rdev) rdev 3859 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3862 drivers/gpu/drm/radeon/ni_dpm.c ni_update_current_ps(rdev, new_ps); rdev 3866 drivers/gpu/drm/radeon/ni_dpm.c void ni_dpm_reset_asic(struct radeon_device *rdev) rdev 3868 drivers/gpu/drm/radeon/ni_dpm.c ni_restrict_performance_levels_before_switch(rdev); rdev 3869 drivers/gpu/drm/radeon/ni_dpm.c rv770_set_boot_state(rdev); rdev 3894 drivers/gpu/drm/radeon/ni_dpm.c static void ni_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 3915 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 3917 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 3920 drivers/gpu/drm/radeon/ni_dpm.c static void ni_parse_pplib_clock_info(struct radeon_device *rdev, rdev 3924 drivers/gpu/drm/radeon/ni_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3925 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3969 drivers/gpu/drm/radeon/ni_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); rdev 3970 drivers/gpu/drm/radeon/ni_dpm.c pl->mclk = rdev->clock.default_mclk; rdev 3971 drivers/gpu/drm/radeon/ni_dpm.c pl->sclk = rdev->clock.default_sclk; rdev 3978 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; rdev 3979 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; rdev 3980 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; rdev 3981 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; rdev 3985 drivers/gpu/drm/radeon/ni_dpm.c static int ni_parse_power_table(struct radeon_device *rdev) rdev 3987 drivers/gpu/drm/radeon/ni_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 4003 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, rdev 4006 drivers/gpu/drm/radeon/ni_dpm.c if (!rdev->pm.dpm.ps) rdev 4023 drivers/gpu/drm/radeon/ni_dpm.c kfree(rdev->pm.dpm.ps); rdev 4026 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 4027 drivers/gpu/drm/radeon/ni_dpm.c ni_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 4036 drivers/gpu/drm/radeon/ni_dpm.c ni_parse_pplib_clock_info(rdev, rdev 4037 drivers/gpu/drm/radeon/ni_dpm.c &rdev->pm.dpm.ps[i], j, rdev 4042 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates; rdev 4046 drivers/gpu/drm/radeon/ni_dpm.c int ni_dpm_init(struct radeon_device *rdev) rdev 4057 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.priv = ni_pi; rdev 4061 drivers/gpu/drm/radeon/ni_dpm.c rv770_get_max_vddc(rdev); rdev 4069 drivers/gpu/drm/radeon/ni_dpm.c ret = r600_get_platform_caps(rdev); rdev 4073 drivers/gpu/drm/radeon/ni_dpm.c ret = ni_parse_power_table(rdev); rdev 4076 drivers/gpu/drm/radeon/ni_dpm.c ret = r600_parse_extended_power_table(rdev); rdev 4080 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = rdev 4084 drivers/gpu/drm/radeon/ni_dpm.c if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { rdev 4085 drivers/gpu/drm/radeon/ni_dpm.c r600_free_extended_power_table(rdev); rdev 4088 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; rdev 4089 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; rdev 4090 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; rdev 4091 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; rdev 4092 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; rdev 4093 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; rdev 4094 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; rdev 4095 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000; rdev 4096 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; rdev 4098 drivers/gpu/drm/radeon/ni_dpm.c ni_patch_dependency_tables_based_on_leakage(rdev); rdev 4100 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.voltage_response_time == 0) rdev 4101 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; rdev 4102 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.dpm.backbias_response_time == 0) rdev 4103 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; rdev 4105 drivers/gpu/drm/radeon/ni_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 4129 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pdev->device == 0x6707) { rdev 4141 drivers/gpu/drm/radeon/ni_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0); rdev 4144 drivers/gpu/drm/radeon/ni_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0); rdev 4147 drivers/gpu/drm/radeon/ni_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0); rdev 4149 drivers/gpu/drm/radeon/ni_dpm.c rv770_get_engine_memory_ss(rdev); rdev 4166 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE) rdev 4184 drivers/gpu/drm/radeon/ni_dpm.c radeon_acpi_is_pcie_performance_request_supported(rdev); rdev 4197 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 3; rdev 4198 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200; rdev 4199 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2 = 900; rdev 4200 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.count = ARRAY_SIZE(btc_valid_sclk); rdev 4201 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.values = btc_valid_sclk; rdev 4202 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0; rdev 4203 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; rdev 4204 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.sclk_mclk_delta = 12500; rdev 4211 drivers/gpu/drm/radeon/ni_dpm.c switch (rdev->pdev->device) { rdev 4261 drivers/gpu/drm/radeon/ni_dpm.c if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || rdev 4262 drivers/gpu/drm/radeon/ni_dpm.c (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) rdev 4263 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc = rdev 4264 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 4269 drivers/gpu/drm/radeon/ni_dpm.c void ni_dpm_fini(struct radeon_device *rdev) rdev 4273 drivers/gpu/drm/radeon/ni_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 4274 drivers/gpu/drm/radeon/ni_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 4276 drivers/gpu/drm/radeon/ni_dpm.c kfree(rdev->pm.dpm.ps); rdev 4277 drivers/gpu/drm/radeon/ni_dpm.c kfree(rdev->pm.dpm.priv); rdev 4278 drivers/gpu/drm/radeon/ni_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); rdev 4279 drivers/gpu/drm/radeon/ni_dpm.c r600_free_extended_power_table(rdev); rdev 4282 drivers/gpu/drm/radeon/ni_dpm.c void ni_dpm_print_power_state(struct radeon_device *rdev, rdev 4294 drivers/gpu/drm/radeon/ni_dpm.c if (rdev->family >= CHIP_TAHITI) rdev 4301 drivers/gpu/drm/radeon/ni_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 4304 drivers/gpu/drm/radeon/ni_dpm.c void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 4307 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4325 drivers/gpu/drm/radeon/ni_dpm.c u32 ni_dpm_get_current_sclk(struct radeon_device *rdev) rdev 4327 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4343 drivers/gpu/drm/radeon/ni_dpm.c u32 ni_dpm_get_current_mclk(struct radeon_device *rdev) rdev 4345 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4361 drivers/gpu/drm/radeon/ni_dpm.c u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 4363 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4372 drivers/gpu/drm/radeon/ni_dpm.c u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 4374 drivers/gpu/drm/radeon/ni_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 234 drivers/gpu/drm/radeon/ni_dpm.h int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, rdev 236 drivers/gpu/drm/radeon/ni_dpm.h void ni_update_current_ps(struct radeon_device *rdev, rdev 238 drivers/gpu/drm/radeon/ni_dpm.h void ni_update_requested_ps(struct radeon_device *rdev, rdev 241 drivers/gpu/drm/radeon/ni_dpm.h void ni_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 244 drivers/gpu/drm/radeon/ni_dpm.h void ni_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 248 drivers/gpu/drm/radeon/ni_dpm.h bool ni_dpm_vblank_too_short(struct radeon_device *rdev); rdev 77 drivers/gpu/drm/radeon/r100.c static bool r100_is_in_vblank(struct radeon_device *rdev, int crtc) rdev 92 drivers/gpu/drm/radeon/r100.c static bool r100_is_counter_moving(struct radeon_device *rdev, int crtc) rdev 117 drivers/gpu/drm/radeon/r100.c void r100_wait_for_vblank(struct radeon_device *rdev, int crtc) rdev 121 drivers/gpu/drm/radeon/r100.c if (crtc >= rdev->num_crtc) rdev 135 drivers/gpu/drm/radeon/r100.c while (r100_is_in_vblank(rdev, crtc)) { rdev 137 drivers/gpu/drm/radeon/r100.c if (!r100_is_counter_moving(rdev, crtc)) rdev 142 drivers/gpu/drm/radeon/r100.c while (!r100_is_in_vblank(rdev, crtc)) { rdev 144 drivers/gpu/drm/radeon/r100.c if (!r100_is_counter_moving(rdev, crtc)) rdev 162 drivers/gpu/drm/radeon/r100.c void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) rdev 164 drivers/gpu/drm/radeon/r100.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 173 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 195 drivers/gpu/drm/radeon/r100.c bool r100_page_flip_pending(struct radeon_device *rdev, int crtc_id) rdev 197 drivers/gpu/drm/radeon/r100.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 213 drivers/gpu/drm/radeon/r100.c void r100_pm_get_dynpm_state(struct radeon_device *rdev) rdev 216 drivers/gpu/drm/radeon/r100.c rdev->pm.dynpm_can_upclock = true; rdev 217 drivers/gpu/drm/radeon/r100.c rdev->pm.dynpm_can_downclock = true; rdev 219 drivers/gpu/drm/radeon/r100.c switch (rdev->pm.dynpm_planned_action) { rdev 221 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = 0; rdev 222 drivers/gpu/drm/radeon/r100.c rdev->pm.dynpm_can_downclock = false; rdev 225 drivers/gpu/drm/radeon/r100.c if (rdev->pm.current_power_state_index == 0) { rdev 226 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = rdev->pm.current_power_state_index; rdev 227 drivers/gpu/drm/radeon/r100.c rdev->pm.dynpm_can_downclock = false; rdev 229 drivers/gpu/drm/radeon/r100.c if (rdev->pm.active_crtc_count > 1) { rdev 230 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->pm.num_power_states; i++) { rdev 231 drivers/gpu/drm/radeon/r100.c if (rdev->pm.power_state[i].flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) rdev 233 drivers/gpu/drm/radeon/r100.c else if (i >= rdev->pm.current_power_state_index) { rdev 234 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = rdev->pm.current_power_state_index; rdev 237 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = i; rdev 242 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = rdev 243 drivers/gpu/drm/radeon/r100.c rdev->pm.current_power_state_index - 1; rdev 246 drivers/gpu/drm/radeon/r100.c if ((rdev->pm.active_crtc_count > 0) && rdev 247 drivers/gpu/drm/radeon/r100.c (rdev->pm.power_state[rdev->pm.requested_power_state_index].clock_info[0].flags & rdev 249 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index++; rdev 253 drivers/gpu/drm/radeon/r100.c if (rdev->pm.current_power_state_index == (rdev->pm.num_power_states - 1)) { rdev 254 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = rdev->pm.current_power_state_index; rdev 255 drivers/gpu/drm/radeon/r100.c rdev->pm.dynpm_can_upclock = false; rdev 257 drivers/gpu/drm/radeon/r100.c if (rdev->pm.active_crtc_count > 1) { rdev 258 drivers/gpu/drm/radeon/r100.c for (i = (rdev->pm.num_power_states - 1); i >= 0; i--) { rdev 259 drivers/gpu/drm/radeon/r100.c if (rdev->pm.power_state[i].flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) rdev 261 drivers/gpu/drm/radeon/r100.c else if (i <= rdev->pm.current_power_state_index) { rdev 262 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = rdev->pm.current_power_state_index; rdev 265 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = i; rdev 270 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = rdev 271 drivers/gpu/drm/radeon/r100.c rdev->pm.current_power_state_index + 1; rdev 275 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_power_state_index = rdev->pm.default_power_state_index; rdev 276 drivers/gpu/drm/radeon/r100.c rdev->pm.dynpm_can_upclock = false; rdev 284 drivers/gpu/drm/radeon/r100.c rdev->pm.requested_clock_mode_index = 0; rdev 287 drivers/gpu/drm/radeon/r100.c rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 288 drivers/gpu/drm/radeon/r100.c clock_info[rdev->pm.requested_clock_mode_index].sclk, rdev 289 drivers/gpu/drm/radeon/r100.c rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 290 drivers/gpu/drm/radeon/r100.c clock_info[rdev->pm.requested_clock_mode_index].mclk, rdev 291 drivers/gpu/drm/radeon/r100.c rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 304 drivers/gpu/drm/radeon/r100.c void r100_pm_init_profile(struct radeon_device *rdev) rdev 307 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 308 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 309 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 310 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; rdev 312 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0; rdev 313 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; rdev 314 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 315 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 317 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; rdev 318 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 0; rdev 319 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 320 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; rdev 322 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; rdev 323 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 324 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 325 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0; rdev 327 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 0; rdev 328 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 329 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 330 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 332 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0; rdev 333 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 334 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 335 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; rdev 337 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; rdev 338 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 339 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 340 drivers/gpu/drm/radeon/r100.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0; rdev 351 drivers/gpu/drm/radeon/r100.c void r100_pm_misc(struct radeon_device *rdev) rdev 353 drivers/gpu/drm/radeon/r100.c int requested_index = rdev->pm.requested_power_state_index; rdev 354 drivers/gpu/drm/radeon/r100.c struct radeon_power_state *ps = &rdev->pm.power_state[requested_index]; rdev 431 drivers/gpu/drm/radeon/r100.c if ((rdev->flags & RADEON_IS_PCIE) && rdev 432 drivers/gpu/drm/radeon/r100.c !(rdev->flags & RADEON_IS_IGP) && rdev 433 drivers/gpu/drm/radeon/r100.c rdev->asic->pm.set_pcie_lanes && rdev 435 drivers/gpu/drm/radeon/r100.c rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) { rdev 436 drivers/gpu/drm/radeon/r100.c radeon_set_pcie_lanes(rdev, rdev 449 drivers/gpu/drm/radeon/r100.c void r100_pm_prepare(struct radeon_device *rdev) rdev 451 drivers/gpu/drm/radeon/r100.c struct drm_device *ddev = rdev->ddev; rdev 480 drivers/gpu/drm/radeon/r100.c void r100_pm_finish(struct radeon_device *rdev) rdev 482 drivers/gpu/drm/radeon/r100.c struct drm_device *ddev = rdev->ddev; rdev 512 drivers/gpu/drm/radeon/r100.c bool r100_gui_idle(struct radeon_device *rdev) rdev 530 drivers/gpu/drm/radeon/r100.c bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) rdev 557 drivers/gpu/drm/radeon/r100.c void r100_hpd_set_polarity(struct radeon_device *rdev, rdev 561 drivers/gpu/drm/radeon/r100.c bool connected = r100_hpd_sense(rdev, hpd); rdev 593 drivers/gpu/drm/radeon/r100.c void r100_hpd_init(struct radeon_device *rdev) rdev 595 drivers/gpu/drm/radeon/r100.c struct drm_device *dev = rdev->ddev; rdev 603 drivers/gpu/drm/radeon/r100.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); rdev 605 drivers/gpu/drm/radeon/r100.c radeon_irq_kms_enable_hpd(rdev, enable); rdev 616 drivers/gpu/drm/radeon/r100.c void r100_hpd_fini(struct radeon_device *rdev) rdev 618 drivers/gpu/drm/radeon/r100.c struct drm_device *dev = rdev->ddev; rdev 627 drivers/gpu/drm/radeon/r100.c radeon_irq_kms_disable_hpd(rdev, disable); rdev 633 drivers/gpu/drm/radeon/r100.c void r100_pci_gart_tlb_flush(struct radeon_device *rdev) rdev 641 drivers/gpu/drm/radeon/r100.c int r100_pci_gart_init(struct radeon_device *rdev) rdev 645 drivers/gpu/drm/radeon/r100.c if (rdev->gart.ptr) { rdev 650 drivers/gpu/drm/radeon/r100.c r = radeon_gart_init(rdev); rdev 653 drivers/gpu/drm/radeon/r100.c rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; rdev 654 drivers/gpu/drm/radeon/r100.c rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; rdev 655 drivers/gpu/drm/radeon/r100.c rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; rdev 656 drivers/gpu/drm/radeon/r100.c rdev->asic->gart.set_page = &r100_pci_gart_set_page; rdev 657 drivers/gpu/drm/radeon/r100.c return radeon_gart_table_ram_alloc(rdev); rdev 660 drivers/gpu/drm/radeon/r100.c int r100_pci_gart_enable(struct radeon_device *rdev) rdev 668 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_AIC_LO_ADDR, rdev->mc.gtt_start); rdev 669 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_AIC_HI_ADDR, rdev->mc.gtt_end); rdev 671 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr); rdev 674 drivers/gpu/drm/radeon/r100.c r100_pci_gart_tlb_flush(rdev); rdev 676 drivers/gpu/drm/radeon/r100.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 677 drivers/gpu/drm/radeon/r100.c (unsigned long long)rdev->gart.table_addr); rdev 678 drivers/gpu/drm/radeon/r100.c rdev->gart.ready = true; rdev 682 drivers/gpu/drm/radeon/r100.c void r100_pci_gart_disable(struct radeon_device *rdev) rdev 698 drivers/gpu/drm/radeon/r100.c void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 701 drivers/gpu/drm/radeon/r100.c u32 *gtt = rdev->gart.ptr; rdev 705 drivers/gpu/drm/radeon/r100.c void r100_pci_gart_fini(struct radeon_device *rdev) rdev 707 drivers/gpu/drm/radeon/r100.c radeon_gart_fini(rdev); rdev 708 drivers/gpu/drm/radeon/r100.c r100_pci_gart_disable(rdev); rdev 709 drivers/gpu/drm/radeon/r100.c radeon_gart_table_ram_free(rdev); rdev 712 drivers/gpu/drm/radeon/r100.c int r100_irq_set(struct radeon_device *rdev) rdev 716 drivers/gpu/drm/radeon/r100.c if (!rdev->irq.installed) { rdev 721 drivers/gpu/drm/radeon/r100.c if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { rdev 724 drivers/gpu/drm/radeon/r100.c if (rdev->irq.crtc_vblank_int[0] || rdev 725 drivers/gpu/drm/radeon/r100.c atomic_read(&rdev->irq.pflip[0])) { rdev 728 drivers/gpu/drm/radeon/r100.c if (rdev->irq.crtc_vblank_int[1] || rdev 729 drivers/gpu/drm/radeon/r100.c atomic_read(&rdev->irq.pflip[1])) { rdev 732 drivers/gpu/drm/radeon/r100.c if (rdev->irq.hpd[0]) { rdev 735 drivers/gpu/drm/radeon/r100.c if (rdev->irq.hpd[1]) { rdev 746 drivers/gpu/drm/radeon/r100.c void r100_irq_disable(struct radeon_device *rdev) rdev 757 drivers/gpu/drm/radeon/r100.c static uint32_t r100_irq_ack(struct radeon_device *rdev) rdev 770 drivers/gpu/drm/radeon/r100.c int r100_irq_process(struct radeon_device *rdev) rdev 775 drivers/gpu/drm/radeon/r100.c status = r100_irq_ack(rdev); rdev 779 drivers/gpu/drm/radeon/r100.c if (rdev->shutdown) { rdev 785 drivers/gpu/drm/radeon/r100.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 789 drivers/gpu/drm/radeon/r100.c if (rdev->irq.crtc_vblank_int[0]) { rdev 790 drivers/gpu/drm/radeon/r100.c drm_handle_vblank(rdev->ddev, 0); rdev 791 drivers/gpu/drm/radeon/r100.c rdev->pm.vblank_sync = true; rdev 792 drivers/gpu/drm/radeon/r100.c wake_up(&rdev->irq.vblank_queue); rdev 794 drivers/gpu/drm/radeon/r100.c if (atomic_read(&rdev->irq.pflip[0])) rdev 795 drivers/gpu/drm/radeon/r100.c radeon_crtc_handle_vblank(rdev, 0); rdev 798 drivers/gpu/drm/radeon/r100.c if (rdev->irq.crtc_vblank_int[1]) { rdev 799 drivers/gpu/drm/radeon/r100.c drm_handle_vblank(rdev->ddev, 1); rdev 800 drivers/gpu/drm/radeon/r100.c rdev->pm.vblank_sync = true; rdev 801 drivers/gpu/drm/radeon/r100.c wake_up(&rdev->irq.vblank_queue); rdev 803 drivers/gpu/drm/radeon/r100.c if (atomic_read(&rdev->irq.pflip[1])) rdev 804 drivers/gpu/drm/radeon/r100.c radeon_crtc_handle_vblank(rdev, 1); rdev 814 drivers/gpu/drm/radeon/r100.c status = r100_irq_ack(rdev); rdev 817 drivers/gpu/drm/radeon/r100.c schedule_delayed_work(&rdev->hotplug_work, 0); rdev 818 drivers/gpu/drm/radeon/r100.c if (rdev->msi_enabled) { rdev 819 drivers/gpu/drm/radeon/r100.c switch (rdev->family) { rdev 834 drivers/gpu/drm/radeon/r100.c u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc) rdev 847 drivers/gpu/drm/radeon/r100.c static void r100_ring_hdp_flush(struct radeon_device *rdev, struct radeon_ring *ring) rdev 850 drivers/gpu/drm/radeon/r100.c radeon_ring_write(ring, rdev->config.r100.hdp_cntl | rdev 853 drivers/gpu/drm/radeon/r100.c radeon_ring_write(ring, rdev->config.r100.hdp_cntl); rdev 858 drivers/gpu/drm/radeon/r100.c void r100_fence_ring_emit(struct radeon_device *rdev, rdev 861 drivers/gpu/drm/radeon/r100.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 872 drivers/gpu/drm/radeon/r100.c r100_ring_hdp_flush(rdev, ring); rdev 874 drivers/gpu/drm/radeon/r100.c radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0)); rdev 880 drivers/gpu/drm/radeon/r100.c bool r100_semaphore_ring_emit(struct radeon_device *rdev, rdev 890 drivers/gpu/drm/radeon/r100.c struct radeon_fence *r100_copy_blit(struct radeon_device *rdev, rdev 896 drivers/gpu/drm/radeon/r100.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 915 drivers/gpu/drm/radeon/r100.c r = radeon_ring_lock(rdev, ring, ndw); rdev 958 drivers/gpu/drm/radeon/r100.c r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX); rdev 960 drivers/gpu/drm/radeon/r100.c radeon_ring_unlock_undo(rdev, ring); rdev 963 drivers/gpu/drm/radeon/r100.c radeon_ring_unlock_commit(rdev, ring, false); rdev 967 drivers/gpu/drm/radeon/r100.c static int r100_cp_wait_for_idle(struct radeon_device *rdev) rdev 972 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 982 drivers/gpu/drm/radeon/r100.c void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring) rdev 986 drivers/gpu/drm/radeon/r100.c r = radeon_ring_lock(rdev, ring, 2); rdev 996 drivers/gpu/drm/radeon/r100.c radeon_ring_unlock_commit(rdev, ring, false); rdev 1001 drivers/gpu/drm/radeon/r100.c static int r100_cp_init_microcode(struct radeon_device *rdev) rdev 1008 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_R100) || (rdev->family == CHIP_RV100) || rdev 1009 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV200) || (rdev->family == CHIP_RS100) || rdev 1010 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS200)) { rdev 1013 drivers/gpu/drm/radeon/r100.c } else if ((rdev->family == CHIP_R200) || rdev 1014 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV250) || rdev 1015 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV280) || rdev 1016 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS300)) { rdev 1019 drivers/gpu/drm/radeon/r100.c } else if ((rdev->family == CHIP_R300) || rdev 1020 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_R350) || rdev 1021 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV350) || rdev 1022 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV380) || rdev 1023 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS400) || rdev 1024 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS480)) { rdev 1027 drivers/gpu/drm/radeon/r100.c } else if ((rdev->family == CHIP_R420) || rdev 1028 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_R423) || rdev 1029 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV410)) { rdev 1032 drivers/gpu/drm/radeon/r100.c } else if ((rdev->family == CHIP_RS690) || rdev 1033 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS740)) { rdev 1036 drivers/gpu/drm/radeon/r100.c } else if (rdev->family == CHIP_RS600) { rdev 1039 drivers/gpu/drm/radeon/r100.c } else if ((rdev->family == CHIP_RV515) || rdev 1040 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_R520) || rdev 1041 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV530) || rdev 1042 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_R580) || rdev 1043 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV560) || rdev 1044 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RV570)) { rdev 1049 drivers/gpu/drm/radeon/r100.c err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); rdev 1052 drivers/gpu/drm/radeon/r100.c } else if (rdev->me_fw->size % 8) { rdev 1054 drivers/gpu/drm/radeon/r100.c rdev->me_fw->size, fw_name); rdev 1056 drivers/gpu/drm/radeon/r100.c release_firmware(rdev->me_fw); rdev 1057 drivers/gpu/drm/radeon/r100.c rdev->me_fw = NULL; rdev 1062 drivers/gpu/drm/radeon/r100.c u32 r100_gfx_get_rptr(struct radeon_device *rdev, rdev 1067 drivers/gpu/drm/radeon/r100.c if (rdev->wb.enabled) rdev 1068 drivers/gpu/drm/radeon/r100.c rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); rdev 1075 drivers/gpu/drm/radeon/r100.c u32 r100_gfx_get_wptr(struct radeon_device *rdev, rdev 1081 drivers/gpu/drm/radeon/r100.c void r100_gfx_set_wptr(struct radeon_device *rdev, rdev 1088 drivers/gpu/drm/radeon/r100.c static void r100_cp_load_microcode(struct radeon_device *rdev) rdev 1093 drivers/gpu/drm/radeon/r100.c if (r100_gui_wait_for_idle(rdev)) { rdev 1097 drivers/gpu/drm/radeon/r100.c if (rdev->me_fw) { rdev 1098 drivers/gpu/drm/radeon/r100.c size = rdev->me_fw->size / 4; rdev 1099 drivers/gpu/drm/radeon/r100.c fw_data = (const __be32 *)&rdev->me_fw->data[0]; rdev 1110 drivers/gpu/drm/radeon/r100.c int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) rdev 1112 drivers/gpu/drm/radeon/r100.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 1123 drivers/gpu/drm/radeon/r100.c if (r100_debugfs_cp_init(rdev)) { rdev 1126 drivers/gpu/drm/radeon/r100.c if (!rdev->me_fw) { rdev 1127 drivers/gpu/drm/radeon/r100.c r = r100_cp_init_microcode(rdev); rdev 1137 drivers/gpu/drm/radeon/r100.c r100_cp_load_microcode(rdev); rdev 1138 drivers/gpu/drm/radeon/r100.c r = radeon_ring_init(rdev, ring, ring_size, RADEON_WB_CP_RPTR_OFFSET, rdev 1188 drivers/gpu/drm/radeon/r100.c S_00070C_RB_RPTR_ADDR((rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) >> 2)); rdev 1189 drivers/gpu/drm/radeon/r100.c WREG32(R_000774_SCRATCH_ADDR, rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET); rdev 1191 drivers/gpu/drm/radeon/r100.c if (rdev->wb.enabled) rdev 1209 drivers/gpu/drm/radeon/r100.c pci_set_master(rdev->pdev); rdev 1211 drivers/gpu/drm/radeon/r100.c radeon_ring_start(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]); rdev 1212 drivers/gpu/drm/radeon/r100.c r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring); rdev 1218 drivers/gpu/drm/radeon/r100.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 1221 drivers/gpu/drm/radeon/r100.c && radeon_ring_supports_scratch_reg(rdev, ring)) { rdev 1222 drivers/gpu/drm/radeon/r100.c r = radeon_scratch_get(rdev, &ring->rptr_save_reg); rdev 1231 drivers/gpu/drm/radeon/r100.c void r100_cp_fini(struct radeon_device *rdev) rdev 1233 drivers/gpu/drm/radeon/r100.c if (r100_cp_wait_for_idle(rdev)) { rdev 1237 drivers/gpu/drm/radeon/r100.c r100_cp_disable(rdev); rdev 1238 drivers/gpu/drm/radeon/r100.c radeon_scratch_free(rdev, rdev->ring[RADEON_RING_TYPE_GFX_INDEX].rptr_save_reg); rdev 1239 drivers/gpu/drm/radeon/r100.c radeon_ring_fini(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]); rdev 1243 drivers/gpu/drm/radeon/r100.c void r100_cp_disable(struct radeon_device *rdev) rdev 1246 drivers/gpu/drm/radeon/r100.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 1247 drivers/gpu/drm/radeon/r100.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 1251 drivers/gpu/drm/radeon/r100.c if (r100_gui_wait_for_idle(rdev)) { rdev 1465 drivers/gpu/drm/radeon/r100.c crtc = drm_crtc_find(p->rdev->ddev, p->filp, crtc_id); rdev 1960 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); rdev 1972 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); rdev 1984 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); rdev 1991 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); rdev 1998 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); rdev 2005 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); rdev 2012 drivers/gpu/drm/radeon/r100.c r = r100_cs_track_check(p->rdev, track); rdev 2019 drivers/gpu/drm/radeon/r100.c if (p->rdev->hyperz_filp != p->filp) rdev 2040 drivers/gpu/drm/radeon/r100.c r100_cs_track_clear(p->rdev, track); rdev 2050 drivers/gpu/drm/radeon/r100.c if (p->rdev->family >= CHIP_R200) rdev 2052 drivers/gpu/drm/radeon/r100.c p->rdev->config.r100.reg_safe_bm, rdev 2053 drivers/gpu/drm/radeon/r100.c p->rdev->config.r100.reg_safe_bm_size, rdev 2057 drivers/gpu/drm/radeon/r100.c p->rdev->config.r100.reg_safe_bm, rdev 2058 drivers/gpu/drm/radeon/r100.c p->rdev->config.r100.reg_safe_bm_size, rdev 2124 drivers/gpu/drm/radeon/r100.c static int r100_cs_track_cube(struct radeon_device *rdev, rdev 2155 drivers/gpu/drm/radeon/r100.c static int r100_cs_track_texture_check(struct radeon_device *rdev, rdev 2176 drivers/gpu/drm/radeon/r100.c if (rdev->family < CHIP_R300) rdev 2182 drivers/gpu/drm/radeon/r100.c if (rdev->family >= CHIP_RV515) rdev 2189 drivers/gpu/drm/radeon/r100.c if (rdev->family >= CHIP_RV515) rdev 2216 drivers/gpu/drm/radeon/r100.c ret = r100_cs_track_cube(rdev, track, u); rdev 2237 drivers/gpu/drm/radeon/r100.c int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) rdev 2323 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "(PW %u) Vertex array %u " rdev 2342 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "(PW %u) Vertex array %u " rdev 2369 drivers/gpu/drm/radeon/r100.c return r100_cs_track_texture_check(rdev, track); rdev 2374 drivers/gpu/drm/radeon/r100.c void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track) rdev 2383 drivers/gpu/drm/radeon/r100.c if (rdev->family < CHIP_R300) { rdev 2385 drivers/gpu/drm/radeon/r100.c if (rdev->family <= CHIP_RS200) rdev 2427 drivers/gpu/drm/radeon/r100.c if (rdev->family <= CHIP_RS200) { rdev 2454 drivers/gpu/drm/radeon/r100.c static void r100_errata(struct radeon_device *rdev) rdev 2456 drivers/gpu/drm/radeon/r100.c rdev->pll_errata = 0; rdev 2458 drivers/gpu/drm/radeon/r100.c if (rdev->family == CHIP_RV200 || rdev->family == CHIP_RS200) { rdev 2459 drivers/gpu/drm/radeon/r100.c rdev->pll_errata |= CHIP_ERRATA_PLL_DUMMYREADS; rdev 2462 drivers/gpu/drm/radeon/r100.c if (rdev->family == CHIP_RV100 || rdev 2463 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_RS100 || rdev 2464 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_RS200) { rdev 2465 drivers/gpu/drm/radeon/r100.c rdev->pll_errata |= CHIP_ERRATA_PLL_DELAY; rdev 2469 drivers/gpu/drm/radeon/r100.c static int r100_rbbm_fifo_wait_for_entry(struct radeon_device *rdev, unsigned n) rdev 2474 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2484 drivers/gpu/drm/radeon/r100.c int r100_gui_wait_for_idle(struct radeon_device *rdev) rdev 2489 drivers/gpu/drm/radeon/r100.c if (r100_rbbm_fifo_wait_for_entry(rdev, 64)) { rdev 2492 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2502 drivers/gpu/drm/radeon/r100.c int r100_mc_wait_for_idle(struct radeon_device *rdev) rdev 2507 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2518 drivers/gpu/drm/radeon/r100.c bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 2524 drivers/gpu/drm/radeon/r100.c radeon_ring_lockup_update(rdev, ring); rdev 2527 drivers/gpu/drm/radeon/r100.c return radeon_ring_test_lockup(rdev, ring); rdev 2531 drivers/gpu/drm/radeon/r100.c void r100_enable_bm(struct radeon_device *rdev) rdev 2539 drivers/gpu/drm/radeon/r100.c void r100_bm_disable(struct radeon_device *rdev) rdev 2552 drivers/gpu/drm/radeon/r100.c pci_clear_master(rdev->pdev); rdev 2556 drivers/gpu/drm/radeon/r100.c int r100_asic_reset(struct radeon_device *rdev, bool hard) rdev 2566 drivers/gpu/drm/radeon/r100.c r100_mc_stop(rdev, &save); rdev 2568 drivers/gpu/drm/radeon/r100.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 2577 drivers/gpu/drm/radeon/r100.c pci_save_state(rdev->pdev); rdev 2579 drivers/gpu/drm/radeon/r100.c r100_bm_disable(rdev); rdev 2589 drivers/gpu/drm/radeon/r100.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 2597 drivers/gpu/drm/radeon/r100.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 2599 drivers/gpu/drm/radeon/r100.c pci_restore_state(rdev->pdev); rdev 2600 drivers/gpu/drm/radeon/r100.c r100_enable_bm(rdev); rdev 2604 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "failed to reset GPU\n"); rdev 2607 drivers/gpu/drm/radeon/r100.c dev_info(rdev->dev, "GPU reset succeed\n"); rdev 2608 drivers/gpu/drm/radeon/r100.c r100_mc_resume(rdev, &save); rdev 2612 drivers/gpu/drm/radeon/r100.c void r100_set_common_regs(struct radeon_device *rdev) rdev 2614 drivers/gpu/drm/radeon/r100.c struct drm_device *dev = rdev->ddev; rdev 2699 drivers/gpu/drm/radeon/r100.c static void r100_vram_get_type(struct radeon_device *rdev) rdev 2703 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_is_ddr = false; rdev 2704 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_IGP) rdev 2705 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_is_ddr = true; rdev 2707 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_is_ddr = true; rdev 2708 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RV100) || rdev 2709 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS100) || rdev 2710 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS200)) { rdev 2713 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_width = 32; rdev 2715 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_width = 64; rdev 2717 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 2718 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_width /= 4; rdev 2719 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_is_ddr = true; rdev 2721 drivers/gpu/drm/radeon/r100.c } else if (rdev->family <= CHIP_RV280) { rdev 2724 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_width = 128; rdev 2726 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_width = 64; rdev 2730 drivers/gpu/drm/radeon/r100.c rdev->mc.vram_width = 128; rdev 2734 drivers/gpu/drm/radeon/r100.c static u32 r100_get_accessible_vram(struct radeon_device *rdev) rdev 2744 drivers/gpu/drm/radeon/r100.c if (rdev->family == CHIP_RV280 || rdev 2745 drivers/gpu/drm/radeon/r100.c rdev->family >= CHIP_RV350) { rdev 2756 drivers/gpu/drm/radeon/r100.c pci_read_config_byte(rdev->pdev, 0xe, &byte); rdev 2772 drivers/gpu/drm/radeon/r100.c void r100_vram_init_sizes(struct radeon_device *rdev) rdev 2777 drivers/gpu/drm/radeon/r100.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 2778 drivers/gpu/drm/radeon/r100.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 2779 drivers/gpu/drm/radeon/r100.c rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev); rdev 2781 drivers/gpu/drm/radeon/r100.c if (rdev->mc.visible_vram_size > rdev->mc.aper_size) rdev 2782 drivers/gpu/drm/radeon/r100.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 2784 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_IGP) { rdev 2788 drivers/gpu/drm/radeon/r100.c rdev->mc.real_vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16); rdev 2789 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size); rdev 2790 drivers/gpu/drm/radeon/r100.c rdev->mc.mc_vram_size = rdev->mc.real_vram_size; rdev 2792 drivers/gpu/drm/radeon/r100.c rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); rdev 2796 drivers/gpu/drm/radeon/r100.c if (rdev->mc.real_vram_size == 0) { rdev 2797 drivers/gpu/drm/radeon/r100.c rdev->mc.real_vram_size = 8192 * 1024; rdev 2798 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size); rdev 2803 drivers/gpu/drm/radeon/r100.c if (rdev->mc.aper_size > config_aper_size) rdev 2804 drivers/gpu/drm/radeon/r100.c config_aper_size = rdev->mc.aper_size; rdev 2806 drivers/gpu/drm/radeon/r100.c if (config_aper_size > rdev->mc.real_vram_size) rdev 2807 drivers/gpu/drm/radeon/r100.c rdev->mc.mc_vram_size = config_aper_size; rdev 2809 drivers/gpu/drm/radeon/r100.c rdev->mc.mc_vram_size = rdev->mc.real_vram_size; rdev 2813 drivers/gpu/drm/radeon/r100.c void r100_vga_set_state(struct radeon_device *rdev, bool state) rdev 2827 drivers/gpu/drm/radeon/r100.c static void r100_mc_init(struct radeon_device *rdev) rdev 2831 drivers/gpu/drm/radeon/r100.c r100_vram_get_type(rdev); rdev 2832 drivers/gpu/drm/radeon/r100.c r100_vram_init_sizes(rdev); rdev 2833 drivers/gpu/drm/radeon/r100.c base = rdev->mc.aper_base; rdev 2834 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_IGP) rdev 2836 drivers/gpu/drm/radeon/r100.c radeon_vram_location(rdev, &rdev->mc, base); rdev 2837 drivers/gpu/drm/radeon/r100.c rdev->mc.gtt_base_align = 0; rdev 2838 drivers/gpu/drm/radeon/r100.c if (!(rdev->flags & RADEON_IS_AGP)) rdev 2839 drivers/gpu/drm/radeon/r100.c radeon_gtt_location(rdev, &rdev->mc); rdev 2840 drivers/gpu/drm/radeon/r100.c radeon_update_bandwidth_info(rdev); rdev 2847 drivers/gpu/drm/radeon/r100.c void r100_pll_errata_after_index(struct radeon_device *rdev) rdev 2849 drivers/gpu/drm/radeon/r100.c if (rdev->pll_errata & CHIP_ERRATA_PLL_DUMMYREADS) { rdev 2855 drivers/gpu/drm/radeon/r100.c static void r100_pll_errata_after_data(struct radeon_device *rdev) rdev 2860 drivers/gpu/drm/radeon/r100.c if (rdev->pll_errata & CHIP_ERRATA_PLL_DELAY) { rdev 2869 drivers/gpu/drm/radeon/r100.c if (rdev->pll_errata & CHIP_ERRATA_R300_CG) { rdev 2880 drivers/gpu/drm/radeon/r100.c uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg) rdev 2885 drivers/gpu/drm/radeon/r100.c spin_lock_irqsave(&rdev->pll_idx_lock, flags); rdev 2887 drivers/gpu/drm/radeon/r100.c r100_pll_errata_after_index(rdev); rdev 2889 drivers/gpu/drm/radeon/r100.c r100_pll_errata_after_data(rdev); rdev 2890 drivers/gpu/drm/radeon/r100.c spin_unlock_irqrestore(&rdev->pll_idx_lock, flags); rdev 2894 drivers/gpu/drm/radeon/r100.c void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 2898 drivers/gpu/drm/radeon/r100.c spin_lock_irqsave(&rdev->pll_idx_lock, flags); rdev 2900 drivers/gpu/drm/radeon/r100.c r100_pll_errata_after_index(rdev); rdev 2902 drivers/gpu/drm/radeon/r100.c r100_pll_errata_after_data(rdev); rdev 2903 drivers/gpu/drm/radeon/r100.c spin_unlock_irqrestore(&rdev->pll_idx_lock, flags); rdev 2906 drivers/gpu/drm/radeon/r100.c static void r100_set_safe_registers(struct radeon_device *rdev) rdev 2908 drivers/gpu/drm/radeon/r100.c if (ASIC_IS_RN50(rdev)) { rdev 2909 drivers/gpu/drm/radeon/r100.c rdev->config.r100.reg_safe_bm = rn50_reg_safe_bm; rdev 2910 drivers/gpu/drm/radeon/r100.c rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(rn50_reg_safe_bm); rdev 2911 drivers/gpu/drm/radeon/r100.c } else if (rdev->family < CHIP_R200) { rdev 2912 drivers/gpu/drm/radeon/r100.c rdev->config.r100.reg_safe_bm = r100_reg_safe_bm; rdev 2913 drivers/gpu/drm/radeon/r100.c rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(r100_reg_safe_bm); rdev 2915 drivers/gpu/drm/radeon/r100.c r200_set_safe_registers(rdev); rdev 2927 drivers/gpu/drm/radeon/r100.c struct radeon_device *rdev = dev->dev_private; rdev 2948 drivers/gpu/drm/radeon/r100.c struct radeon_device *rdev = dev->dev_private; rdev 2949 drivers/gpu/drm/radeon/r100.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 2953 drivers/gpu/drm/radeon/r100.c radeon_ring_free_size(rdev, ring); rdev 2976 drivers/gpu/drm/radeon/r100.c struct radeon_device *rdev = dev->dev_private; rdev 3026 drivers/gpu/drm/radeon/r100.c struct radeon_device *rdev = dev->dev_private; rdev 3066 drivers/gpu/drm/radeon/r100.c int r100_debugfs_rbbm_init(struct radeon_device *rdev) rdev 3069 drivers/gpu/drm/radeon/r100.c return radeon_debugfs_add_files(rdev, r100_debugfs_rbbm_list, 1); rdev 3075 drivers/gpu/drm/radeon/r100.c int r100_debugfs_cp_init(struct radeon_device *rdev) rdev 3078 drivers/gpu/drm/radeon/r100.c return radeon_debugfs_add_files(rdev, r100_debugfs_cp_list, 2); rdev 3084 drivers/gpu/drm/radeon/r100.c int r100_debugfs_mc_info_init(struct radeon_device *rdev) rdev 3087 drivers/gpu/drm/radeon/r100.c return radeon_debugfs_add_files(rdev, r100_debugfs_mc_info_list, 1); rdev 3093 drivers/gpu/drm/radeon/r100.c int r100_set_surface_reg(struct radeon_device *rdev, int reg, rdev 3100 drivers/gpu/drm/radeon/r100.c if (rdev->family <= CHIP_RS200) { rdev 3110 drivers/gpu/drm/radeon/r100.c } else if (rdev->family <= CHIP_RV280) { rdev 3128 drivers/gpu/drm/radeon/r100.c if (rdev->family < CHIP_R300) rdev 3141 drivers/gpu/drm/radeon/r100.c void r100_clear_surface_reg(struct radeon_device *rdev, int reg) rdev 3147 drivers/gpu/drm/radeon/r100.c void r100_bandwidth_update(struct radeon_device *rdev) rdev 3222 drivers/gpu/drm/radeon/r100.c if (!rdev->mode_info.mode_config_initialized) rdev 3225 drivers/gpu/drm/radeon/r100.c radeon_update_display_priority(rdev); rdev 3227 drivers/gpu/drm/radeon/r100.c if (rdev->mode_info.crtcs[0]->base.enabled) { rdev 3229 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[0]->base.primary->fb; rdev 3231 drivers/gpu/drm/radeon/r100.c mode1 = &rdev->mode_info.crtcs[0]->base.mode; rdev 3234 drivers/gpu/drm/radeon/r100.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 3235 drivers/gpu/drm/radeon/r100.c if (rdev->mode_info.crtcs[1]->base.enabled) { rdev 3237 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[1]->base.primary->fb; rdev 3239 drivers/gpu/drm/radeon/r100.c mode2 = &rdev->mode_info.crtcs[1]->base.mode; rdev 3246 drivers/gpu/drm/radeon/r100.c if ((rdev->disp_priority == 2) && ASIC_IS_R300(rdev)) { rdev 3261 drivers/gpu/drm/radeon/r100.c sclk_ff = rdev->pm.sclk; rdev 3262 drivers/gpu/drm/radeon/r100.c mclk_ff = rdev->pm.mclk; rdev 3264 drivers/gpu/drm/radeon/r100.c temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1); rdev 3294 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RV100) || (rdev->flags & RADEON_IS_IGP)) { /* RV100, M6, IGPs */ rdev 3298 drivers/gpu/drm/radeon/r100.c } else if (rdev->family == CHIP_R300 || rdev 3299 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_R350) { /* r300, r350 */ rdev 3303 drivers/gpu/drm/radeon/r100.c } else if (rdev->family == CHIP_RV350 || rdev 3304 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_RV380) { rdev 3309 drivers/gpu/drm/radeon/r100.c } else if (rdev->family == CHIP_R420 || rdev 3310 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_R423 || rdev 3311 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_RV410) { rdev 3335 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RV100) || rdev->flags & RADEON_IS_IGP) { rdev 3336 drivers/gpu/drm/radeon/r100.c if (rdev->family == CHIP_RS480) /* don't think rs400 */ rdev 3343 drivers/gpu/drm/radeon/r100.c if (rdev->family == CHIP_RS400 || rdev 3344 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_RS480) { rdev 3351 drivers/gpu/drm/radeon/r100.c if (ASIC_IS_R300(rdev) && !(rdev->flags & RADEON_IS_IGP)) { rdev 3372 drivers/gpu/drm/radeon/r100.c if (rdev->family == CHIP_RV410 || rdev 3373 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_R420 || rdev 3374 drivers/gpu/drm/radeon/r100.c rdev->family == CHIP_R423) rdev 3383 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_AGP) { rdev 3391 drivers/gpu/drm/radeon/r100.c if (ASIC_IS_R300(rdev)) { rdev 3394 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RV100) || rdev 3395 drivers/gpu/drm/radeon/r100.c rdev->flags & RADEON_IS_IGP) { rdev 3396 drivers/gpu/drm/radeon/r100.c if (rdev->mc.vram_is_ddr) rdev 3401 drivers/gpu/drm/radeon/r100.c if (rdev->mc.vram_width == 128) rdev 3410 drivers/gpu/drm/radeon/r100.c if (rdev->mc.vram_is_ddr) { rdev 3411 drivers/gpu/drm/radeon/r100.c if (rdev->mc.vram_width == 32) { rdev 3438 drivers/gpu/drm/radeon/r100.c temp_ff.full = dfixed_const((2 * (cur_size - (rdev->mc.vram_is_ddr + 1)))); rdev 3460 drivers/gpu/drm/radeon/r100.c if (ASIC_IS_RV100(rdev)) rdev 3489 drivers/gpu/drm/radeon/r100.c if (rdev->disp_priority == 2) { rdev 3500 drivers/gpu/drm/radeon/r100.c if (critical_point == 0 && mode2 && rdev->family == CHIP_R300) { rdev 3509 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_R350) && rdev 3525 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RS400) || rdev 3526 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS480)) { rdev 3565 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_R350) && rdev 3575 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RS100) || rdev 3576 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS200)) rdev 3579 drivers/gpu/drm/radeon/r100.c temp = (rdev->mc.vram_width * rdev->mc.vram_is_ddr + 1)/128; rdev 3599 drivers/gpu/drm/radeon/r100.c if (rdev->disp_priority == 2) { rdev 3608 drivers/gpu/drm/radeon/r100.c if (critical_point2 == 0 && rdev->family == CHIP_R300) { rdev 3616 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RS400) || rdev 3617 drivers/gpu/drm/radeon/r100.c (rdev->family == CHIP_RS480)) { rdev 3645 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); rdev 3648 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); rdev 3651 drivers/gpu/drm/radeon/r100.c int r100_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 3658 drivers/gpu/drm/radeon/r100.c r = radeon_scratch_get(rdev, &scratch); rdev 3664 drivers/gpu/drm/radeon/r100.c r = radeon_ring_lock(rdev, ring, 2); rdev 3667 drivers/gpu/drm/radeon/r100.c radeon_scratch_free(rdev, scratch); rdev 3672 drivers/gpu/drm/radeon/r100.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3673 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 3680 drivers/gpu/drm/radeon/r100.c if (i < rdev->usec_timeout) { rdev 3687 drivers/gpu/drm/radeon/r100.c radeon_scratch_free(rdev, scratch); rdev 3691 drivers/gpu/drm/radeon/r100.c void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 3693 drivers/gpu/drm/radeon/r100.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3706 drivers/gpu/drm/radeon/r100.c int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 3714 drivers/gpu/drm/radeon/r100.c r = radeon_scratch_get(rdev, &scratch); rdev 3720 drivers/gpu/drm/radeon/r100.c r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &ib, NULL, 256); rdev 3734 drivers/gpu/drm/radeon/r100.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 3750 drivers/gpu/drm/radeon/r100.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 3757 drivers/gpu/drm/radeon/r100.c if (i < rdev->usec_timeout) { rdev 3765 drivers/gpu/drm/radeon/r100.c radeon_ib_free(rdev, &ib); rdev 3767 drivers/gpu/drm/radeon/r100.c radeon_scratch_free(rdev, scratch); rdev 3771 drivers/gpu/drm/radeon/r100.c void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save) rdev 3776 drivers/gpu/drm/radeon/r100.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 3784 drivers/gpu/drm/radeon/r100.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 3801 drivers/gpu/drm/radeon/r100.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 3813 drivers/gpu/drm/radeon/r100.c void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save) rdev 3816 drivers/gpu/drm/radeon/r100.c WREG32(R_00023C_DISPLAY_BASE_ADDR, rdev->mc.vram_start); rdev 3817 drivers/gpu/drm/radeon/r100.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 3818 drivers/gpu/drm/radeon/r100.c WREG32(R_00033C_CRTC2_DISPLAY_BASE_ADDR, rdev->mc.vram_start); rdev 3824 drivers/gpu/drm/radeon/r100.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 3829 drivers/gpu/drm/radeon/r100.c void r100_vga_render_disable(struct radeon_device *rdev) rdev 3837 drivers/gpu/drm/radeon/r100.c static void r100_debugfs(struct radeon_device *rdev) rdev 3841 drivers/gpu/drm/radeon/r100.c r = r100_debugfs_mc_info_init(rdev); rdev 3843 drivers/gpu/drm/radeon/r100.c dev_warn(rdev->dev, "Failed to create r100_mc debugfs file.\n"); rdev 3846 drivers/gpu/drm/radeon/r100.c static void r100_mc_program(struct radeon_device *rdev) rdev 3851 drivers/gpu/drm/radeon/r100.c r100_mc_stop(rdev, &save); rdev 3852 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_AGP) { rdev 3854 drivers/gpu/drm/radeon/r100.c S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) | rdev 3855 drivers/gpu/drm/radeon/r100.c S_00014C_MC_AGP_TOP(rdev->mc.gtt_end >> 16)); rdev 3856 drivers/gpu/drm/radeon/r100.c WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); rdev 3857 drivers/gpu/drm/radeon/r100.c if (rdev->family > CHIP_RV200) rdev 3859 drivers/gpu/drm/radeon/r100.c upper_32_bits(rdev->mc.agp_base) & 0xff); rdev 3863 drivers/gpu/drm/radeon/r100.c if (rdev->family > CHIP_RV200) rdev 3867 drivers/gpu/drm/radeon/r100.c if (r100_mc_wait_for_idle(rdev)) rdev 3868 drivers/gpu/drm/radeon/r100.c dev_warn(rdev->dev, "Wait for MC idle timeout.\n"); rdev 3871 drivers/gpu/drm/radeon/r100.c S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | rdev 3872 drivers/gpu/drm/radeon/r100.c S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16)); rdev 3873 drivers/gpu/drm/radeon/r100.c r100_mc_resume(rdev, &save); rdev 3876 drivers/gpu/drm/radeon/r100.c static void r100_clock_startup(struct radeon_device *rdev) rdev 3881 drivers/gpu/drm/radeon/r100.c radeon_legacy_set_clock_gating(rdev, 1); rdev 3885 drivers/gpu/drm/radeon/r100.c if ((rdev->family == CHIP_RV250) || (rdev->family == CHIP_RV280)) rdev 3890 drivers/gpu/drm/radeon/r100.c static int r100_startup(struct radeon_device *rdev) rdev 3895 drivers/gpu/drm/radeon/r100.c r100_set_common_regs(rdev); rdev 3897 drivers/gpu/drm/radeon/r100.c r100_mc_program(rdev); rdev 3899 drivers/gpu/drm/radeon/r100.c r100_clock_startup(rdev); rdev 3902 drivers/gpu/drm/radeon/r100.c r100_enable_bm(rdev); rdev 3903 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_PCI) { rdev 3904 drivers/gpu/drm/radeon/r100.c r = r100_pci_gart_enable(rdev); rdev 3910 drivers/gpu/drm/radeon/r100.c r = radeon_wb_init(rdev); rdev 3914 drivers/gpu/drm/radeon/r100.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 3916 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 3921 drivers/gpu/drm/radeon/r100.c if (!rdev->irq.installed) { rdev 3922 drivers/gpu/drm/radeon/r100.c r = radeon_irq_kms_init(rdev); rdev 3927 drivers/gpu/drm/radeon/r100.c r100_irq_set(rdev); rdev 3928 drivers/gpu/drm/radeon/r100.c rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 3930 drivers/gpu/drm/radeon/r100.c r = r100_cp_init(rdev, 1024 * 1024); rdev 3932 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 3936 drivers/gpu/drm/radeon/r100.c r = radeon_ib_pool_init(rdev); rdev 3938 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 3945 drivers/gpu/drm/radeon/r100.c int r100_resume(struct radeon_device *rdev) rdev 3950 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_PCI) rdev 3951 drivers/gpu/drm/radeon/r100.c r100_pci_gart_disable(rdev); rdev 3953 drivers/gpu/drm/radeon/r100.c r100_clock_startup(rdev); rdev 3955 drivers/gpu/drm/radeon/r100.c if (radeon_asic_reset(rdev)) { rdev 3956 drivers/gpu/drm/radeon/r100.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 3961 drivers/gpu/drm/radeon/r100.c radeon_combios_asic_init(rdev->ddev); rdev 3963 drivers/gpu/drm/radeon/r100.c r100_clock_startup(rdev); rdev 3965 drivers/gpu/drm/radeon/r100.c radeon_surface_init(rdev); rdev 3967 drivers/gpu/drm/radeon/r100.c rdev->accel_working = true; rdev 3968 drivers/gpu/drm/radeon/r100.c r = r100_startup(rdev); rdev 3970 drivers/gpu/drm/radeon/r100.c rdev->accel_working = false; rdev 3975 drivers/gpu/drm/radeon/r100.c int r100_suspend(struct radeon_device *rdev) rdev 3977 drivers/gpu/drm/radeon/r100.c radeon_pm_suspend(rdev); rdev 3978 drivers/gpu/drm/radeon/r100.c r100_cp_disable(rdev); rdev 3979 drivers/gpu/drm/radeon/r100.c radeon_wb_disable(rdev); rdev 3980 drivers/gpu/drm/radeon/r100.c r100_irq_disable(rdev); rdev 3981 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_PCI) rdev 3982 drivers/gpu/drm/radeon/r100.c r100_pci_gart_disable(rdev); rdev 3986 drivers/gpu/drm/radeon/r100.c void r100_fini(struct radeon_device *rdev) rdev 3988 drivers/gpu/drm/radeon/r100.c radeon_pm_fini(rdev); rdev 3989 drivers/gpu/drm/radeon/r100.c r100_cp_fini(rdev); rdev 3990 drivers/gpu/drm/radeon/r100.c radeon_wb_fini(rdev); rdev 3991 drivers/gpu/drm/radeon/r100.c radeon_ib_pool_fini(rdev); rdev 3992 drivers/gpu/drm/radeon/r100.c radeon_gem_fini(rdev); rdev 3993 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_PCI) rdev 3994 drivers/gpu/drm/radeon/r100.c r100_pci_gart_fini(rdev); rdev 3995 drivers/gpu/drm/radeon/r100.c radeon_agp_fini(rdev); rdev 3996 drivers/gpu/drm/radeon/r100.c radeon_irq_kms_fini(rdev); rdev 3997 drivers/gpu/drm/radeon/r100.c radeon_fence_driver_fini(rdev); rdev 3998 drivers/gpu/drm/radeon/r100.c radeon_bo_fini(rdev); rdev 3999 drivers/gpu/drm/radeon/r100.c radeon_atombios_fini(rdev); rdev 4000 drivers/gpu/drm/radeon/r100.c kfree(rdev->bios); rdev 4001 drivers/gpu/drm/radeon/r100.c rdev->bios = NULL; rdev 4011 drivers/gpu/drm/radeon/r100.c void r100_restore_sanity(struct radeon_device *rdev) rdev 4029 drivers/gpu/drm/radeon/r100.c int r100_init(struct radeon_device *rdev) rdev 4034 drivers/gpu/drm/radeon/r100.c r100_debugfs(rdev); rdev 4036 drivers/gpu/drm/radeon/r100.c r100_vga_render_disable(rdev); rdev 4038 drivers/gpu/drm/radeon/r100.c radeon_scratch_init(rdev); rdev 4040 drivers/gpu/drm/radeon/r100.c radeon_surface_init(rdev); rdev 4042 drivers/gpu/drm/radeon/r100.c r100_restore_sanity(rdev); rdev 4045 drivers/gpu/drm/radeon/r100.c if (!radeon_get_bios(rdev)) { rdev 4046 drivers/gpu/drm/radeon/r100.c if (ASIC_IS_AVIVO(rdev)) rdev 4049 drivers/gpu/drm/radeon/r100.c if (rdev->is_atom_bios) { rdev 4050 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "Expecting combios for RS400/RS480 GPU\n"); rdev 4053 drivers/gpu/drm/radeon/r100.c r = radeon_combios_init(rdev); rdev 4058 drivers/gpu/drm/radeon/r100.c if (radeon_asic_reset(rdev)) { rdev 4059 drivers/gpu/drm/radeon/r100.c dev_warn(rdev->dev, rdev 4065 drivers/gpu/drm/radeon/r100.c if (radeon_boot_test_post_card(rdev) == false) rdev 4068 drivers/gpu/drm/radeon/r100.c r100_errata(rdev); rdev 4070 drivers/gpu/drm/radeon/r100.c radeon_get_clock_info(rdev->ddev); rdev 4072 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_AGP) { rdev 4073 drivers/gpu/drm/radeon/r100.c r = radeon_agp_init(rdev); rdev 4075 drivers/gpu/drm/radeon/r100.c radeon_agp_disable(rdev); rdev 4079 drivers/gpu/drm/radeon/r100.c r100_mc_init(rdev); rdev 4081 drivers/gpu/drm/radeon/r100.c r = radeon_fence_driver_init(rdev); rdev 4085 drivers/gpu/drm/radeon/r100.c r = radeon_bo_init(rdev); rdev 4088 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_PCI) { rdev 4089 drivers/gpu/drm/radeon/r100.c r = r100_pci_gart_init(rdev); rdev 4093 drivers/gpu/drm/radeon/r100.c r100_set_safe_registers(rdev); rdev 4096 drivers/gpu/drm/radeon/r100.c radeon_pm_init(rdev); rdev 4098 drivers/gpu/drm/radeon/r100.c rdev->accel_working = true; rdev 4099 drivers/gpu/drm/radeon/r100.c r = r100_startup(rdev); rdev 4102 drivers/gpu/drm/radeon/r100.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 4103 drivers/gpu/drm/radeon/r100.c r100_cp_fini(rdev); rdev 4104 drivers/gpu/drm/radeon/r100.c radeon_wb_fini(rdev); rdev 4105 drivers/gpu/drm/radeon/r100.c radeon_ib_pool_fini(rdev); rdev 4106 drivers/gpu/drm/radeon/r100.c radeon_irq_kms_fini(rdev); rdev 4107 drivers/gpu/drm/radeon/r100.c if (rdev->flags & RADEON_IS_PCI) rdev 4108 drivers/gpu/drm/radeon/r100.c r100_pci_gart_fini(rdev); rdev 4109 drivers/gpu/drm/radeon/r100.c rdev->accel_working = false; rdev 4114 drivers/gpu/drm/radeon/r100.c uint32_t r100_mm_rreg_slow(struct radeon_device *rdev, uint32_t reg) rdev 4119 drivers/gpu/drm/radeon/r100.c spin_lock_irqsave(&rdev->mmio_idx_lock, flags); rdev 4120 drivers/gpu/drm/radeon/r100.c writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX); rdev 4121 drivers/gpu/drm/radeon/r100.c ret = readl(((void __iomem *)rdev->rmmio) + RADEON_MM_DATA); rdev 4122 drivers/gpu/drm/radeon/r100.c spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); rdev 4126 drivers/gpu/drm/radeon/r100.c void r100_mm_wreg_slow(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 4130 drivers/gpu/drm/radeon/r100.c spin_lock_irqsave(&rdev->mmio_idx_lock, flags); rdev 4131 drivers/gpu/drm/radeon/r100.c writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX); rdev 4132 drivers/gpu/drm/radeon/r100.c writel(v, ((void __iomem *)rdev->rmmio) + RADEON_MM_DATA); rdev 4133 drivers/gpu/drm/radeon/r100.c spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); rdev 4136 drivers/gpu/drm/radeon/r100.c u32 r100_io_rreg(struct radeon_device *rdev, u32 reg) rdev 4138 drivers/gpu/drm/radeon/r100.c if (reg < rdev->rio_mem_size) rdev 4139 drivers/gpu/drm/radeon/r100.c return ioread32(rdev->rio_mem + reg); rdev 4141 drivers/gpu/drm/radeon/r100.c iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX); rdev 4142 drivers/gpu/drm/radeon/r100.c return ioread32(rdev->rio_mem + RADEON_MM_DATA); rdev 4146 drivers/gpu/drm/radeon/r100.c void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 4148 drivers/gpu/drm/radeon/r100.c if (reg < rdev->rio_mem_size) rdev 4149 drivers/gpu/drm/radeon/r100.c iowrite32(v, rdev->rio_mem + reg); rdev 4151 drivers/gpu/drm/radeon/r100.c iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX); rdev 4152 drivers/gpu/drm/radeon/r100.c iowrite32(v, rdev->rio_mem + RADEON_MM_DATA); rdev 85 drivers/gpu/drm/radeon/r100_track.h int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track); rdev 86 drivers/gpu/drm/radeon/r100_track.h void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track); rdev 83 drivers/gpu/drm/radeon/r200.c struct radeon_fence *r200_copy_dma(struct radeon_device *rdev, rdev 89 drivers/gpu/drm/radeon/r200.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 99 drivers/gpu/drm/radeon/r200.c r = radeon_ring_lock(rdev, ring, num_loops * 4 + 64); rdev 122 drivers/gpu/drm/radeon/r200.c r = radeon_fence_emit(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX); rdev 124 drivers/gpu/drm/radeon/r200.c radeon_ring_unlock_undo(rdev, ring); rdev 127 drivers/gpu/drm/radeon/r200.c radeon_ring_unlock_commit(rdev, ring, false); rdev 546 drivers/gpu/drm/radeon/r200.c void r200_set_safe_registers(struct radeon_device *rdev) rdev 548 drivers/gpu/drm/radeon/r200.c rdev->config.r100.reg_safe_bm = r200_reg_safe_bm; rdev 549 drivers/gpu/drm/radeon/r200.c rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(r200_reg_safe_bm); rdev 61 drivers/gpu/drm/radeon/r300.c uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg) rdev 66 drivers/gpu/drm/radeon/r300.c spin_lock_irqsave(&rdev->pcie_idx_lock, flags); rdev 67 drivers/gpu/drm/radeon/r300.c WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); rdev 69 drivers/gpu/drm/radeon/r300.c spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); rdev 73 drivers/gpu/drm/radeon/r300.c void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 77 drivers/gpu/drm/radeon/r300.c spin_lock_irqsave(&rdev->pcie_idx_lock, flags); rdev 78 drivers/gpu/drm/radeon/r300.c WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); rdev 80 drivers/gpu/drm/radeon/r300.c spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); rdev 86 drivers/gpu/drm/radeon/r300.c static int rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev); rdev 88 drivers/gpu/drm/radeon/r300.c void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev) rdev 120 drivers/gpu/drm/radeon/r300.c void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 123 drivers/gpu/drm/radeon/r300.c void __iomem *ptr = rdev->gart.ptr; rdev 131 drivers/gpu/drm/radeon/r300.c int rv370_pcie_gart_init(struct radeon_device *rdev) rdev 135 drivers/gpu/drm/radeon/r300.c if (rdev->gart.robj) { rdev 140 drivers/gpu/drm/radeon/r300.c r = radeon_gart_init(rdev); rdev 143 drivers/gpu/drm/radeon/r300.c r = rv370_debugfs_pcie_gart_info_init(rdev); rdev 146 drivers/gpu/drm/radeon/r300.c rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; rdev 147 drivers/gpu/drm/radeon/r300.c rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; rdev 148 drivers/gpu/drm/radeon/r300.c rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; rdev 149 drivers/gpu/drm/radeon/r300.c rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; rdev 150 drivers/gpu/drm/radeon/r300.c return radeon_gart_table_vram_alloc(rdev); rdev 153 drivers/gpu/drm/radeon/r300.c int rv370_pcie_gart_enable(struct radeon_device *rdev) rdev 159 drivers/gpu/drm/radeon/r300.c if (rdev->gart.robj == NULL) { rdev 160 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 163 drivers/gpu/drm/radeon/r300.c r = radeon_gart_table_vram_pin(rdev); rdev 169 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_start); rdev 170 drivers/gpu/drm/radeon/r300.c tmp = rdev->mc.gtt_end & ~RADEON_GPU_PAGE_MASK; rdev 174 drivers/gpu/drm/radeon/r300.c table_addr = rdev->gart.table_addr; rdev 177 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_LO, rdev->mc.vram_start); rdev 185 drivers/gpu/drm/radeon/r300.c rv370_pcie_gart_tlb_flush(rdev); rdev 187 drivers/gpu/drm/radeon/r300.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 189 drivers/gpu/drm/radeon/r300.c rdev->gart.ready = true; rdev 193 drivers/gpu/drm/radeon/r300.c void rv370_pcie_gart_disable(struct radeon_device *rdev) rdev 204 drivers/gpu/drm/radeon/r300.c radeon_gart_table_vram_unpin(rdev); rdev 207 drivers/gpu/drm/radeon/r300.c void rv370_pcie_gart_fini(struct radeon_device *rdev) rdev 209 drivers/gpu/drm/radeon/r300.c radeon_gart_fini(rdev); rdev 210 drivers/gpu/drm/radeon/r300.c rv370_pcie_gart_disable(rdev); rdev 211 drivers/gpu/drm/radeon/r300.c radeon_gart_table_vram_free(rdev); rdev 214 drivers/gpu/drm/radeon/r300.c void r300_fence_ring_emit(struct radeon_device *rdev, rdev 217 drivers/gpu/drm/radeon/r300.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 237 drivers/gpu/drm/radeon/r300.c radeon_ring_write(ring, rdev->config.r300.hdp_cntl | rdev 240 drivers/gpu/drm/radeon/r300.c radeon_ring_write(ring, rdev->config.r300.hdp_cntl); rdev 242 drivers/gpu/drm/radeon/r300.c radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0)); rdev 248 drivers/gpu/drm/radeon/r300.c void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring) rdev 255 drivers/gpu/drm/radeon/r300.c switch(rdev->num_gb_pipes) { rdev 271 drivers/gpu/drm/radeon/r300.c r = radeon_ring_lock(rdev, ring, 64); rdev 335 drivers/gpu/drm/radeon/r300.c radeon_ring_unlock_commit(rdev, ring, false); rdev 338 drivers/gpu/drm/radeon/r300.c static void r300_errata(struct radeon_device *rdev) rdev 340 drivers/gpu/drm/radeon/r300.c rdev->pll_errata = 0; rdev 342 drivers/gpu/drm/radeon/r300.c if (rdev->family == CHIP_R300 && rdev 344 drivers/gpu/drm/radeon/r300.c rdev->pll_errata |= CHIP_ERRATA_R300_CG; rdev 348 drivers/gpu/drm/radeon/r300.c int r300_mc_wait_for_idle(struct radeon_device *rdev) rdev 353 drivers/gpu/drm/radeon/r300.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 364 drivers/gpu/drm/radeon/r300.c static void r300_gpu_init(struct radeon_device *rdev) rdev 368 drivers/gpu/drm/radeon/r300.c if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) || rdev 369 drivers/gpu/drm/radeon/r300.c (rdev->family == CHIP_R350 && rdev->pdev->device != 0x4148)) { rdev 371 drivers/gpu/drm/radeon/r300.c rdev->num_gb_pipes = 2; rdev 374 drivers/gpu/drm/radeon/r300.c rdev->num_gb_pipes = 1; rdev 376 drivers/gpu/drm/radeon/r300.c rdev->num_z_pipes = 1; rdev 378 drivers/gpu/drm/radeon/r300.c switch (rdev->num_gb_pipes) { rdev 395 drivers/gpu/drm/radeon/r300.c if (r100_gui_wait_for_idle(rdev)) { rdev 406 drivers/gpu/drm/radeon/r300.c if (r100_gui_wait_for_idle(rdev)) { rdev 409 drivers/gpu/drm/radeon/r300.c if (r300_mc_wait_for_idle(rdev)) { rdev 413 drivers/gpu/drm/radeon/r300.c rdev->num_gb_pipes, rdev->num_z_pipes); rdev 416 drivers/gpu/drm/radeon/r300.c int r300_asic_reset(struct radeon_device *rdev, bool hard) rdev 426 drivers/gpu/drm/radeon/r300.c r100_mc_stop(rdev, &save); rdev 428 drivers/gpu/drm/radeon/r300.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 437 drivers/gpu/drm/radeon/r300.c pci_save_state(rdev->pdev); rdev 439 drivers/gpu/drm/radeon/r300.c r100_bm_disable(rdev); rdev 447 drivers/gpu/drm/radeon/r300.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 459 drivers/gpu/drm/radeon/r300.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 461 drivers/gpu/drm/radeon/r300.c pci_restore_state(rdev->pdev); rdev 462 drivers/gpu/drm/radeon/r300.c r100_enable_bm(rdev); rdev 465 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "failed to reset GPU\n"); rdev 468 drivers/gpu/drm/radeon/r300.c dev_info(rdev->dev, "GPU reset succeed\n"); rdev 469 drivers/gpu/drm/radeon/r300.c r100_mc_resume(rdev, &save); rdev 476 drivers/gpu/drm/radeon/r300.c void r300_mc_init(struct radeon_device *rdev) rdev 482 drivers/gpu/drm/radeon/r300.c rdev->mc.vram_is_ddr = true; rdev 486 drivers/gpu/drm/radeon/r300.c case 0: rdev->mc.vram_width = 64; break; rdev 487 drivers/gpu/drm/radeon/r300.c case 1: rdev->mc.vram_width = 128; break; rdev 488 drivers/gpu/drm/radeon/r300.c case 2: rdev->mc.vram_width = 256; break; rdev 489 drivers/gpu/drm/radeon/r300.c default: rdev->mc.vram_width = 128; break; rdev 491 drivers/gpu/drm/radeon/r300.c r100_vram_init_sizes(rdev); rdev 492 drivers/gpu/drm/radeon/r300.c base = rdev->mc.aper_base; rdev 493 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_IGP) rdev 495 drivers/gpu/drm/radeon/r300.c radeon_vram_location(rdev, &rdev->mc, base); rdev 496 drivers/gpu/drm/radeon/r300.c rdev->mc.gtt_base_align = 0; rdev 497 drivers/gpu/drm/radeon/r300.c if (!(rdev->flags & RADEON_IS_AGP)) rdev 498 drivers/gpu/drm/radeon/r300.c radeon_gtt_location(rdev, &rdev->mc); rdev 499 drivers/gpu/drm/radeon/r300.c radeon_update_bandwidth_info(rdev); rdev 502 drivers/gpu/drm/radeon/r300.c void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes) rdev 506 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_IGP) rdev 509 drivers/gpu/drm/radeon/r300.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 561 drivers/gpu/drm/radeon/r300.c int rv370_get_pcie_lanes(struct radeon_device *rdev) rdev 565 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_IGP) rdev 568 drivers/gpu/drm/radeon/r300.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 597 drivers/gpu/drm/radeon/r300.c struct radeon_device *rdev = dev->dev_private; rdev 622 drivers/gpu/drm/radeon/r300.c static int rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev) rdev 625 drivers/gpu/drm/radeon/r300.c return radeon_debugfs_add_files(rdev, rv370_pcie_gart_info_list, 1); rdev 752 drivers/gpu/drm/radeon/r300.c if (p->rdev->family < CHIP_RV515) rdev 759 drivers/gpu/drm/radeon/r300.c if (p->rdev->family < CHIP_RV515) { rdev 768 drivers/gpu/drm/radeon/r300.c p->rdev->cmask_filp != p->filp) { rdev 818 drivers/gpu/drm/radeon/r300.c if (p->rdev->family < CHIP_RV515) { rdev 968 drivers/gpu/drm/radeon/r300.c if (p->rdev->family < CHIP_R420) { rdev 1035 drivers/gpu/drm/radeon/r300.c if (p->rdev->family >= CHIP_RV515) { rdev 1102 drivers/gpu/drm/radeon/r300.c if (p->rdev->hyperz_filp != p->filp) { rdev 1112 drivers/gpu/drm/radeon/r300.c if (p->rdev->hyperz_filp != p->filp) { rdev 1150 drivers/gpu/drm/radeon/r300.c if (idx_value && (p->rdev->hyperz_filp != p->filp)) rdev 1154 drivers/gpu/drm/radeon/r300.c if (idx_value && (p->rdev->hyperz_filp != p->filp)) rdev 1157 drivers/gpu/drm/radeon/r300.c if (p->rdev->family >= CHIP_RV350) rdev 1163 drivers/gpu/drm/radeon/r300.c if (p->rdev->family == CHIP_RV530) rdev 1218 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); rdev 1233 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); rdev 1240 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); rdev 1247 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); rdev 1254 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); rdev 1261 drivers/gpu/drm/radeon/r300.c r = r100_cs_track_check(p->rdev, track); rdev 1268 drivers/gpu/drm/radeon/r300.c if (p->rdev->hyperz_filp != p->filp) rdev 1272 drivers/gpu/drm/radeon/r300.c if (p->rdev->cmask_filp != p->filp) rdev 1293 drivers/gpu/drm/radeon/r300.c r100_cs_track_clear(p->rdev, track); rdev 1304 drivers/gpu/drm/radeon/r300.c p->rdev->config.r300.reg_safe_bm, rdev 1305 drivers/gpu/drm/radeon/r300.c p->rdev->config.r300.reg_safe_bm_size, rdev 1324 drivers/gpu/drm/radeon/r300.c void r300_set_reg_safe(struct radeon_device *rdev) rdev 1326 drivers/gpu/drm/radeon/r300.c rdev->config.r300.reg_safe_bm = r300_reg_safe_bm; rdev 1327 drivers/gpu/drm/radeon/r300.c rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r300_reg_safe_bm); rdev 1330 drivers/gpu/drm/radeon/r300.c void r300_mc_program(struct radeon_device *rdev) rdev 1335 drivers/gpu/drm/radeon/r300.c r = r100_debugfs_mc_info_init(rdev); rdev 1337 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "Failed to create r100_mc debugfs file.\n"); rdev 1341 drivers/gpu/drm/radeon/r300.c r100_mc_stop(rdev, &save); rdev 1342 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_AGP) { rdev 1344 drivers/gpu/drm/radeon/r300.c S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) | rdev 1345 drivers/gpu/drm/radeon/r300.c S_00014C_MC_AGP_TOP(rdev->mc.gtt_end >> 16)); rdev 1346 drivers/gpu/drm/radeon/r300.c WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); rdev 1348 drivers/gpu/drm/radeon/r300.c upper_32_bits(rdev->mc.agp_base) & 0xff); rdev 1355 drivers/gpu/drm/radeon/r300.c if (r300_mc_wait_for_idle(rdev)) rdev 1359 drivers/gpu/drm/radeon/r300.c S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | rdev 1360 drivers/gpu/drm/radeon/r300.c S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16)); rdev 1361 drivers/gpu/drm/radeon/r300.c r100_mc_resume(rdev, &save); rdev 1364 drivers/gpu/drm/radeon/r300.c void r300_clock_startup(struct radeon_device *rdev) rdev 1369 drivers/gpu/drm/radeon/r300.c radeon_legacy_set_clock_gating(rdev, 1); rdev 1373 drivers/gpu/drm/radeon/r300.c if ((rdev->family == CHIP_RV350) || (rdev->family == CHIP_RV380)) rdev 1378 drivers/gpu/drm/radeon/r300.c static int r300_startup(struct radeon_device *rdev) rdev 1383 drivers/gpu/drm/radeon/r300.c r100_set_common_regs(rdev); rdev 1385 drivers/gpu/drm/radeon/r300.c r300_mc_program(rdev); rdev 1387 drivers/gpu/drm/radeon/r300.c r300_clock_startup(rdev); rdev 1389 drivers/gpu/drm/radeon/r300.c r300_gpu_init(rdev); rdev 1392 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCIE) { rdev 1393 drivers/gpu/drm/radeon/r300.c r = rv370_pcie_gart_enable(rdev); rdev 1398 drivers/gpu/drm/radeon/r300.c if (rdev->family == CHIP_R300 || rdev 1399 drivers/gpu/drm/radeon/r300.c rdev->family == CHIP_R350 || rdev 1400 drivers/gpu/drm/radeon/r300.c rdev->family == CHIP_RV350) rdev 1401 drivers/gpu/drm/radeon/r300.c r100_enable_bm(rdev); rdev 1403 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCI) { rdev 1404 drivers/gpu/drm/radeon/r300.c r = r100_pci_gart_enable(rdev); rdev 1410 drivers/gpu/drm/radeon/r300.c r = radeon_wb_init(rdev); rdev 1414 drivers/gpu/drm/radeon/r300.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 1416 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 1421 drivers/gpu/drm/radeon/r300.c if (!rdev->irq.installed) { rdev 1422 drivers/gpu/drm/radeon/r300.c r = radeon_irq_kms_init(rdev); rdev 1427 drivers/gpu/drm/radeon/r300.c r100_irq_set(rdev); rdev 1428 drivers/gpu/drm/radeon/r300.c rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 1430 drivers/gpu/drm/radeon/r300.c r = r100_cp_init(rdev, 1024 * 1024); rdev 1432 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 1436 drivers/gpu/drm/radeon/r300.c r = radeon_ib_pool_init(rdev); rdev 1438 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 1445 drivers/gpu/drm/radeon/r300.c int r300_resume(struct radeon_device *rdev) rdev 1450 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCIE) rdev 1451 drivers/gpu/drm/radeon/r300.c rv370_pcie_gart_disable(rdev); rdev 1452 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCI) rdev 1453 drivers/gpu/drm/radeon/r300.c r100_pci_gart_disable(rdev); rdev 1455 drivers/gpu/drm/radeon/r300.c r300_clock_startup(rdev); rdev 1457 drivers/gpu/drm/radeon/r300.c if (radeon_asic_reset(rdev)) { rdev 1458 drivers/gpu/drm/radeon/r300.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 1463 drivers/gpu/drm/radeon/r300.c radeon_combios_asic_init(rdev->ddev); rdev 1465 drivers/gpu/drm/radeon/r300.c r300_clock_startup(rdev); rdev 1467 drivers/gpu/drm/radeon/r300.c radeon_surface_init(rdev); rdev 1469 drivers/gpu/drm/radeon/r300.c rdev->accel_working = true; rdev 1470 drivers/gpu/drm/radeon/r300.c r = r300_startup(rdev); rdev 1472 drivers/gpu/drm/radeon/r300.c rdev->accel_working = false; rdev 1477 drivers/gpu/drm/radeon/r300.c int r300_suspend(struct radeon_device *rdev) rdev 1479 drivers/gpu/drm/radeon/r300.c radeon_pm_suspend(rdev); rdev 1480 drivers/gpu/drm/radeon/r300.c r100_cp_disable(rdev); rdev 1481 drivers/gpu/drm/radeon/r300.c radeon_wb_disable(rdev); rdev 1482 drivers/gpu/drm/radeon/r300.c r100_irq_disable(rdev); rdev 1483 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCIE) rdev 1484 drivers/gpu/drm/radeon/r300.c rv370_pcie_gart_disable(rdev); rdev 1485 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCI) rdev 1486 drivers/gpu/drm/radeon/r300.c r100_pci_gart_disable(rdev); rdev 1490 drivers/gpu/drm/radeon/r300.c void r300_fini(struct radeon_device *rdev) rdev 1492 drivers/gpu/drm/radeon/r300.c radeon_pm_fini(rdev); rdev 1493 drivers/gpu/drm/radeon/r300.c r100_cp_fini(rdev); rdev 1494 drivers/gpu/drm/radeon/r300.c radeon_wb_fini(rdev); rdev 1495 drivers/gpu/drm/radeon/r300.c radeon_ib_pool_fini(rdev); rdev 1496 drivers/gpu/drm/radeon/r300.c radeon_gem_fini(rdev); rdev 1497 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCIE) rdev 1498 drivers/gpu/drm/radeon/r300.c rv370_pcie_gart_fini(rdev); rdev 1499 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCI) rdev 1500 drivers/gpu/drm/radeon/r300.c r100_pci_gart_fini(rdev); rdev 1501 drivers/gpu/drm/radeon/r300.c radeon_agp_fini(rdev); rdev 1502 drivers/gpu/drm/radeon/r300.c radeon_irq_kms_fini(rdev); rdev 1503 drivers/gpu/drm/radeon/r300.c radeon_fence_driver_fini(rdev); rdev 1504 drivers/gpu/drm/radeon/r300.c radeon_bo_fini(rdev); rdev 1505 drivers/gpu/drm/radeon/r300.c radeon_atombios_fini(rdev); rdev 1506 drivers/gpu/drm/radeon/r300.c kfree(rdev->bios); rdev 1507 drivers/gpu/drm/radeon/r300.c rdev->bios = NULL; rdev 1510 drivers/gpu/drm/radeon/r300.c int r300_init(struct radeon_device *rdev) rdev 1515 drivers/gpu/drm/radeon/r300.c r100_vga_render_disable(rdev); rdev 1517 drivers/gpu/drm/radeon/r300.c radeon_scratch_init(rdev); rdev 1519 drivers/gpu/drm/radeon/r300.c radeon_surface_init(rdev); rdev 1522 drivers/gpu/drm/radeon/r300.c r100_restore_sanity(rdev); rdev 1524 drivers/gpu/drm/radeon/r300.c if (!radeon_get_bios(rdev)) { rdev 1525 drivers/gpu/drm/radeon/r300.c if (ASIC_IS_AVIVO(rdev)) rdev 1528 drivers/gpu/drm/radeon/r300.c if (rdev->is_atom_bios) { rdev 1529 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "Expecting combios for RS400/RS480 GPU\n"); rdev 1532 drivers/gpu/drm/radeon/r300.c r = radeon_combios_init(rdev); rdev 1537 drivers/gpu/drm/radeon/r300.c if (radeon_asic_reset(rdev)) { rdev 1538 drivers/gpu/drm/radeon/r300.c dev_warn(rdev->dev, rdev 1544 drivers/gpu/drm/radeon/r300.c if (radeon_boot_test_post_card(rdev) == false) rdev 1547 drivers/gpu/drm/radeon/r300.c r300_errata(rdev); rdev 1549 drivers/gpu/drm/radeon/r300.c radeon_get_clock_info(rdev->ddev); rdev 1551 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_AGP) { rdev 1552 drivers/gpu/drm/radeon/r300.c r = radeon_agp_init(rdev); rdev 1554 drivers/gpu/drm/radeon/r300.c radeon_agp_disable(rdev); rdev 1558 drivers/gpu/drm/radeon/r300.c r300_mc_init(rdev); rdev 1560 drivers/gpu/drm/radeon/r300.c r = radeon_fence_driver_init(rdev); rdev 1564 drivers/gpu/drm/radeon/r300.c r = radeon_bo_init(rdev); rdev 1567 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCIE) { rdev 1568 drivers/gpu/drm/radeon/r300.c r = rv370_pcie_gart_init(rdev); rdev 1572 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCI) { rdev 1573 drivers/gpu/drm/radeon/r300.c r = r100_pci_gart_init(rdev); rdev 1577 drivers/gpu/drm/radeon/r300.c r300_set_reg_safe(rdev); rdev 1580 drivers/gpu/drm/radeon/r300.c radeon_pm_init(rdev); rdev 1582 drivers/gpu/drm/radeon/r300.c rdev->accel_working = true; rdev 1583 drivers/gpu/drm/radeon/r300.c r = r300_startup(rdev); rdev 1586 drivers/gpu/drm/radeon/r300.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 1587 drivers/gpu/drm/radeon/r300.c r100_cp_fini(rdev); rdev 1588 drivers/gpu/drm/radeon/r300.c radeon_wb_fini(rdev); rdev 1589 drivers/gpu/drm/radeon/r300.c radeon_ib_pool_fini(rdev); rdev 1590 drivers/gpu/drm/radeon/r300.c radeon_irq_kms_fini(rdev); rdev 1591 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCIE) rdev 1592 drivers/gpu/drm/radeon/r300.c rv370_pcie_gart_fini(rdev); rdev 1593 drivers/gpu/drm/radeon/r300.c if (rdev->flags & RADEON_IS_PCI) rdev 1594 drivers/gpu/drm/radeon/r300.c r100_pci_gart_fini(rdev); rdev 1595 drivers/gpu/drm/radeon/r300.c radeon_agp_fini(rdev); rdev 1596 drivers/gpu/drm/radeon/r300.c rdev->accel_working = false; rdev 45 drivers/gpu/drm/radeon/r420.c void r420_pm_init_profile(struct radeon_device *rdev) rdev 48 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 49 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 50 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 51 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; rdev 53 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0; rdev 54 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; rdev 55 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 56 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 58 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; rdev 59 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1; rdev 60 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 61 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; rdev 63 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; rdev 64 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 65 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 66 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0; rdev 68 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 0; rdev 69 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 70 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 71 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 73 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0; rdev 74 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 75 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 76 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; rdev 78 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; rdev 79 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 80 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 81 drivers/gpu/drm/radeon/r420.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0; rdev 84 drivers/gpu/drm/radeon/r420.c static void r420_set_reg_safe(struct radeon_device *rdev) rdev 86 drivers/gpu/drm/radeon/r420.c rdev->config.r300.reg_safe_bm = r420_reg_safe_bm; rdev 87 drivers/gpu/drm/radeon/r420.c rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm); rdev 90 drivers/gpu/drm/radeon/r420.c void r420_pipes_init(struct radeon_device *rdev) rdev 100 drivers/gpu/drm/radeon/r420.c if (r100_gui_wait_for_idle(rdev)) { rdev 108 drivers/gpu/drm/radeon/r420.c if ((rdev->pdev->device == 0x5e4c) || rdev 109 drivers/gpu/drm/radeon/r420.c (rdev->pdev->device == 0x5e4f)) rdev 112 drivers/gpu/drm/radeon/r420.c rdev->num_gb_pipes = num_pipes; rdev 136 drivers/gpu/drm/radeon/r420.c if (r100_gui_wait_for_idle(rdev)) { rdev 148 drivers/gpu/drm/radeon/r420.c if (r100_gui_wait_for_idle(rdev)) { rdev 152 drivers/gpu/drm/radeon/r420.c if (rdev->family == CHIP_RV530) { rdev 155 drivers/gpu/drm/radeon/r420.c rdev->num_z_pipes = 2; rdev 157 drivers/gpu/drm/radeon/r420.c rdev->num_z_pipes = 1; rdev 159 drivers/gpu/drm/radeon/r420.c rdev->num_z_pipes = 1; rdev 162 drivers/gpu/drm/radeon/r420.c rdev->num_gb_pipes, rdev->num_z_pipes); rdev 165 drivers/gpu/drm/radeon/r420.c u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg) rdev 170 drivers/gpu/drm/radeon/r420.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 173 drivers/gpu/drm/radeon/r420.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 177 drivers/gpu/drm/radeon/r420.c void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 181 drivers/gpu/drm/radeon/r420.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 185 drivers/gpu/drm/radeon/r420.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 188 drivers/gpu/drm/radeon/r420.c static void r420_debugfs(struct radeon_device *rdev) rdev 190 drivers/gpu/drm/radeon/r420.c if (r100_debugfs_rbbm_init(rdev)) { rdev 193 drivers/gpu/drm/radeon/r420.c if (r420_debugfs_pipes_info_init(rdev)) { rdev 198 drivers/gpu/drm/radeon/r420.c static void r420_clock_resume(struct radeon_device *rdev) rdev 203 drivers/gpu/drm/radeon/r420.c radeon_atom_set_clock_gating(rdev, 1); rdev 206 drivers/gpu/drm/radeon/r420.c if (rdev->family == CHIP_R420) rdev 211 drivers/gpu/drm/radeon/r420.c static void r420_cp_errata_init(struct radeon_device *rdev) rdev 214 drivers/gpu/drm/radeon/r420.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 222 drivers/gpu/drm/radeon/r420.c radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch); rdev 223 drivers/gpu/drm/radeon/r420.c r = radeon_ring_lock(rdev, ring, 8); rdev 226 drivers/gpu/drm/radeon/r420.c radeon_ring_write(ring, rdev->config.r300.resync_scratch); rdev 228 drivers/gpu/drm/radeon/r420.c radeon_ring_unlock_commit(rdev, ring, false); rdev 231 drivers/gpu/drm/radeon/r420.c static void r420_cp_errata_fini(struct radeon_device *rdev) rdev 234 drivers/gpu/drm/radeon/r420.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 239 drivers/gpu/drm/radeon/r420.c r = radeon_ring_lock(rdev, ring, 8); rdev 243 drivers/gpu/drm/radeon/r420.c radeon_ring_unlock_commit(rdev, ring, false); rdev 244 drivers/gpu/drm/radeon/r420.c radeon_scratch_free(rdev, rdev->config.r300.resync_scratch); rdev 247 drivers/gpu/drm/radeon/r420.c static int r420_startup(struct radeon_device *rdev) rdev 252 drivers/gpu/drm/radeon/r420.c r100_set_common_regs(rdev); rdev 254 drivers/gpu/drm/radeon/r420.c r300_mc_program(rdev); rdev 256 drivers/gpu/drm/radeon/r420.c r420_clock_resume(rdev); rdev 259 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCIE) { rdev 260 drivers/gpu/drm/radeon/r420.c r = rv370_pcie_gart_enable(rdev); rdev 264 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCI) { rdev 265 drivers/gpu/drm/radeon/r420.c r = r100_pci_gart_enable(rdev); rdev 269 drivers/gpu/drm/radeon/r420.c r420_pipes_init(rdev); rdev 272 drivers/gpu/drm/radeon/r420.c r = radeon_wb_init(rdev); rdev 276 drivers/gpu/drm/radeon/r420.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 278 drivers/gpu/drm/radeon/r420.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 283 drivers/gpu/drm/radeon/r420.c if (!rdev->irq.installed) { rdev 284 drivers/gpu/drm/radeon/r420.c r = radeon_irq_kms_init(rdev); rdev 289 drivers/gpu/drm/radeon/r420.c r100_irq_set(rdev); rdev 290 drivers/gpu/drm/radeon/r420.c rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 292 drivers/gpu/drm/radeon/r420.c r = r100_cp_init(rdev, 1024 * 1024); rdev 294 drivers/gpu/drm/radeon/r420.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 297 drivers/gpu/drm/radeon/r420.c r420_cp_errata_init(rdev); rdev 299 drivers/gpu/drm/radeon/r420.c r = radeon_ib_pool_init(rdev); rdev 301 drivers/gpu/drm/radeon/r420.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 308 drivers/gpu/drm/radeon/r420.c int r420_resume(struct radeon_device *rdev) rdev 313 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCIE) rdev 314 drivers/gpu/drm/radeon/r420.c rv370_pcie_gart_disable(rdev); rdev 315 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCI) rdev 316 drivers/gpu/drm/radeon/r420.c r100_pci_gart_disable(rdev); rdev 318 drivers/gpu/drm/radeon/r420.c r420_clock_resume(rdev); rdev 320 drivers/gpu/drm/radeon/r420.c if (radeon_asic_reset(rdev)) { rdev 321 drivers/gpu/drm/radeon/r420.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 326 drivers/gpu/drm/radeon/r420.c if (rdev->is_atom_bios) { rdev 327 drivers/gpu/drm/radeon/r420.c atom_asic_init(rdev->mode_info.atom_context); rdev 329 drivers/gpu/drm/radeon/r420.c radeon_combios_asic_init(rdev->ddev); rdev 332 drivers/gpu/drm/radeon/r420.c r420_clock_resume(rdev); rdev 334 drivers/gpu/drm/radeon/r420.c radeon_surface_init(rdev); rdev 336 drivers/gpu/drm/radeon/r420.c rdev->accel_working = true; rdev 337 drivers/gpu/drm/radeon/r420.c r = r420_startup(rdev); rdev 339 drivers/gpu/drm/radeon/r420.c rdev->accel_working = false; rdev 344 drivers/gpu/drm/radeon/r420.c int r420_suspend(struct radeon_device *rdev) rdev 346 drivers/gpu/drm/radeon/r420.c radeon_pm_suspend(rdev); rdev 347 drivers/gpu/drm/radeon/r420.c r420_cp_errata_fini(rdev); rdev 348 drivers/gpu/drm/radeon/r420.c r100_cp_disable(rdev); rdev 349 drivers/gpu/drm/radeon/r420.c radeon_wb_disable(rdev); rdev 350 drivers/gpu/drm/radeon/r420.c r100_irq_disable(rdev); rdev 351 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCIE) rdev 352 drivers/gpu/drm/radeon/r420.c rv370_pcie_gart_disable(rdev); rdev 353 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCI) rdev 354 drivers/gpu/drm/radeon/r420.c r100_pci_gart_disable(rdev); rdev 358 drivers/gpu/drm/radeon/r420.c void r420_fini(struct radeon_device *rdev) rdev 360 drivers/gpu/drm/radeon/r420.c radeon_pm_fini(rdev); rdev 361 drivers/gpu/drm/radeon/r420.c r100_cp_fini(rdev); rdev 362 drivers/gpu/drm/radeon/r420.c radeon_wb_fini(rdev); rdev 363 drivers/gpu/drm/radeon/r420.c radeon_ib_pool_fini(rdev); rdev 364 drivers/gpu/drm/radeon/r420.c radeon_gem_fini(rdev); rdev 365 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCIE) rdev 366 drivers/gpu/drm/radeon/r420.c rv370_pcie_gart_fini(rdev); rdev 367 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCI) rdev 368 drivers/gpu/drm/radeon/r420.c r100_pci_gart_fini(rdev); rdev 369 drivers/gpu/drm/radeon/r420.c radeon_agp_fini(rdev); rdev 370 drivers/gpu/drm/radeon/r420.c radeon_irq_kms_fini(rdev); rdev 371 drivers/gpu/drm/radeon/r420.c radeon_fence_driver_fini(rdev); rdev 372 drivers/gpu/drm/radeon/r420.c radeon_bo_fini(rdev); rdev 373 drivers/gpu/drm/radeon/r420.c if (rdev->is_atom_bios) { rdev 374 drivers/gpu/drm/radeon/r420.c radeon_atombios_fini(rdev); rdev 376 drivers/gpu/drm/radeon/r420.c radeon_combios_fini(rdev); rdev 378 drivers/gpu/drm/radeon/r420.c kfree(rdev->bios); rdev 379 drivers/gpu/drm/radeon/r420.c rdev->bios = NULL; rdev 382 drivers/gpu/drm/radeon/r420.c int r420_init(struct radeon_device *rdev) rdev 387 drivers/gpu/drm/radeon/r420.c radeon_scratch_init(rdev); rdev 389 drivers/gpu/drm/radeon/r420.c radeon_surface_init(rdev); rdev 392 drivers/gpu/drm/radeon/r420.c r100_restore_sanity(rdev); rdev 394 drivers/gpu/drm/radeon/r420.c if (!radeon_get_bios(rdev)) { rdev 395 drivers/gpu/drm/radeon/r420.c if (ASIC_IS_AVIVO(rdev)) rdev 398 drivers/gpu/drm/radeon/r420.c if (rdev->is_atom_bios) { rdev 399 drivers/gpu/drm/radeon/r420.c r = radeon_atombios_init(rdev); rdev 404 drivers/gpu/drm/radeon/r420.c r = radeon_combios_init(rdev); rdev 410 drivers/gpu/drm/radeon/r420.c if (radeon_asic_reset(rdev)) { rdev 411 drivers/gpu/drm/radeon/r420.c dev_warn(rdev->dev, rdev 417 drivers/gpu/drm/radeon/r420.c if (radeon_boot_test_post_card(rdev) == false) rdev 421 drivers/gpu/drm/radeon/r420.c radeon_get_clock_info(rdev->ddev); rdev 423 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_AGP) { rdev 424 drivers/gpu/drm/radeon/r420.c r = radeon_agp_init(rdev); rdev 426 drivers/gpu/drm/radeon/r420.c radeon_agp_disable(rdev); rdev 430 drivers/gpu/drm/radeon/r420.c r300_mc_init(rdev); rdev 431 drivers/gpu/drm/radeon/r420.c r420_debugfs(rdev); rdev 433 drivers/gpu/drm/radeon/r420.c r = radeon_fence_driver_init(rdev); rdev 438 drivers/gpu/drm/radeon/r420.c r = radeon_bo_init(rdev); rdev 442 drivers/gpu/drm/radeon/r420.c if (rdev->family == CHIP_R420) rdev 443 drivers/gpu/drm/radeon/r420.c r100_enable_bm(rdev); rdev 445 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCIE) { rdev 446 drivers/gpu/drm/radeon/r420.c r = rv370_pcie_gart_init(rdev); rdev 450 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCI) { rdev 451 drivers/gpu/drm/radeon/r420.c r = r100_pci_gart_init(rdev); rdev 455 drivers/gpu/drm/radeon/r420.c r420_set_reg_safe(rdev); rdev 458 drivers/gpu/drm/radeon/r420.c radeon_pm_init(rdev); rdev 460 drivers/gpu/drm/radeon/r420.c rdev->accel_working = true; rdev 461 drivers/gpu/drm/radeon/r420.c r = r420_startup(rdev); rdev 464 drivers/gpu/drm/radeon/r420.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 465 drivers/gpu/drm/radeon/r420.c r100_cp_fini(rdev); rdev 466 drivers/gpu/drm/radeon/r420.c radeon_wb_fini(rdev); rdev 467 drivers/gpu/drm/radeon/r420.c radeon_ib_pool_fini(rdev); rdev 468 drivers/gpu/drm/radeon/r420.c radeon_irq_kms_fini(rdev); rdev 469 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCIE) rdev 470 drivers/gpu/drm/radeon/r420.c rv370_pcie_gart_fini(rdev); rdev 471 drivers/gpu/drm/radeon/r420.c if (rdev->flags & RADEON_IS_PCI) rdev 472 drivers/gpu/drm/radeon/r420.c r100_pci_gart_fini(rdev); rdev 473 drivers/gpu/drm/radeon/r420.c radeon_agp_fini(rdev); rdev 474 drivers/gpu/drm/radeon/r420.c rdev->accel_working = false; rdev 487 drivers/gpu/drm/radeon/r420.c struct radeon_device *rdev = dev->dev_private; rdev 504 drivers/gpu/drm/radeon/r420.c int r420_debugfs_pipes_info_init(struct radeon_device *rdev) rdev 507 drivers/gpu/drm/radeon/r420.c return radeon_debugfs_add_files(rdev, r420_pipes_info_list, 1); rdev 36 drivers/gpu/drm/radeon/r520.c int r520_mc_wait_for_idle(struct radeon_device *rdev) rdev 41 drivers/gpu/drm/radeon/r520.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 52 drivers/gpu/drm/radeon/r520.c static void r520_gpu_init(struct radeon_device *rdev) rdev 56 drivers/gpu/drm/radeon/r520.c rv515_vga_render_disable(rdev); rdev 78 drivers/gpu/drm/radeon/r520.c if (rdev->family == CHIP_RV530) { rdev 81 drivers/gpu/drm/radeon/r520.c r420_pipes_init(rdev); rdev 88 drivers/gpu/drm/radeon/r520.c if (r520_mc_wait_for_idle(rdev)) { rdev 93 drivers/gpu/drm/radeon/r520.c static void r520_vram_get_type(struct radeon_device *rdev) rdev 97 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_width = 128; rdev 98 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_is_ddr = true; rdev 102 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_width = 32; rdev 105 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_width = 64; rdev 108 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_width = 128; rdev 111 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_width = 256; rdev 114 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_width = 128; rdev 118 drivers/gpu/drm/radeon/r520.c rdev->mc.vram_width *= 2; rdev 121 drivers/gpu/drm/radeon/r520.c static void r520_mc_init(struct radeon_device *rdev) rdev 124 drivers/gpu/drm/radeon/r520.c r520_vram_get_type(rdev); rdev 125 drivers/gpu/drm/radeon/r520.c r100_vram_init_sizes(rdev); rdev 126 drivers/gpu/drm/radeon/r520.c radeon_vram_location(rdev, &rdev->mc, 0); rdev 127 drivers/gpu/drm/radeon/r520.c rdev->mc.gtt_base_align = 0; rdev 128 drivers/gpu/drm/radeon/r520.c if (!(rdev->flags & RADEON_IS_AGP)) rdev 129 drivers/gpu/drm/radeon/r520.c radeon_gtt_location(rdev, &rdev->mc); rdev 130 drivers/gpu/drm/radeon/r520.c radeon_update_bandwidth_info(rdev); rdev 133 drivers/gpu/drm/radeon/r520.c static void r520_mc_program(struct radeon_device *rdev) rdev 138 drivers/gpu/drm/radeon/r520.c rv515_mc_stop(rdev, &save); rdev 141 drivers/gpu/drm/radeon/r520.c if (r520_mc_wait_for_idle(rdev)) rdev 142 drivers/gpu/drm/radeon/r520.c dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rdev 144 drivers/gpu/drm/radeon/r520.c WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size); rdev 147 drivers/gpu/drm/radeon/r520.c S_000004_MC_FB_START(rdev->mc.vram_start >> 16) | rdev 148 drivers/gpu/drm/radeon/r520.c S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16)); rdev 150 drivers/gpu/drm/radeon/r520.c S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); rdev 151 drivers/gpu/drm/radeon/r520.c if (rdev->flags & RADEON_IS_AGP) { rdev 153 drivers/gpu/drm/radeon/r520.c S_000005_MC_AGP_START(rdev->mc.gtt_start >> 16) | rdev 154 drivers/gpu/drm/radeon/r520.c S_000005_MC_AGP_TOP(rdev->mc.gtt_end >> 16)); rdev 155 drivers/gpu/drm/radeon/r520.c WREG32_MC(R_000006_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); rdev 157 drivers/gpu/drm/radeon/r520.c S_000007_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base))); rdev 164 drivers/gpu/drm/radeon/r520.c rv515_mc_resume(rdev, &save); rdev 167 drivers/gpu/drm/radeon/r520.c static int r520_startup(struct radeon_device *rdev) rdev 171 drivers/gpu/drm/radeon/r520.c r520_mc_program(rdev); rdev 173 drivers/gpu/drm/radeon/r520.c rv515_clock_startup(rdev); rdev 175 drivers/gpu/drm/radeon/r520.c r520_gpu_init(rdev); rdev 178 drivers/gpu/drm/radeon/r520.c if (rdev->flags & RADEON_IS_PCIE) { rdev 179 drivers/gpu/drm/radeon/r520.c r = rv370_pcie_gart_enable(rdev); rdev 185 drivers/gpu/drm/radeon/r520.c r = radeon_wb_init(rdev); rdev 189 drivers/gpu/drm/radeon/r520.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 191 drivers/gpu/drm/radeon/r520.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 196 drivers/gpu/drm/radeon/r520.c if (!rdev->irq.installed) { rdev 197 drivers/gpu/drm/radeon/r520.c r = radeon_irq_kms_init(rdev); rdev 202 drivers/gpu/drm/radeon/r520.c rs600_irq_set(rdev); rdev 203 drivers/gpu/drm/radeon/r520.c rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 205 drivers/gpu/drm/radeon/r520.c r = r100_cp_init(rdev, 1024 * 1024); rdev 207 drivers/gpu/drm/radeon/r520.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 211 drivers/gpu/drm/radeon/r520.c r = radeon_ib_pool_init(rdev); rdev 213 drivers/gpu/drm/radeon/r520.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 220 drivers/gpu/drm/radeon/r520.c int r520_resume(struct radeon_device *rdev) rdev 225 drivers/gpu/drm/radeon/r520.c if (rdev->flags & RADEON_IS_PCIE) rdev 226 drivers/gpu/drm/radeon/r520.c rv370_pcie_gart_disable(rdev); rdev 228 drivers/gpu/drm/radeon/r520.c rv515_clock_startup(rdev); rdev 230 drivers/gpu/drm/radeon/r520.c if (radeon_asic_reset(rdev)) { rdev 231 drivers/gpu/drm/radeon/r520.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 236 drivers/gpu/drm/radeon/r520.c atom_asic_init(rdev->mode_info.atom_context); rdev 238 drivers/gpu/drm/radeon/r520.c rv515_clock_startup(rdev); rdev 240 drivers/gpu/drm/radeon/r520.c radeon_surface_init(rdev); rdev 242 drivers/gpu/drm/radeon/r520.c rdev->accel_working = true; rdev 243 drivers/gpu/drm/radeon/r520.c r = r520_startup(rdev); rdev 245 drivers/gpu/drm/radeon/r520.c rdev->accel_working = false; rdev 250 drivers/gpu/drm/radeon/r520.c int r520_init(struct radeon_device *rdev) rdev 255 drivers/gpu/drm/radeon/r520.c radeon_scratch_init(rdev); rdev 257 drivers/gpu/drm/radeon/r520.c radeon_surface_init(rdev); rdev 259 drivers/gpu/drm/radeon/r520.c r100_restore_sanity(rdev); rdev 262 drivers/gpu/drm/radeon/r520.c if (!radeon_get_bios(rdev)) { rdev 263 drivers/gpu/drm/radeon/r520.c if (ASIC_IS_AVIVO(rdev)) rdev 266 drivers/gpu/drm/radeon/r520.c if (rdev->is_atom_bios) { rdev 267 drivers/gpu/drm/radeon/r520.c r = radeon_atombios_init(rdev); rdev 271 drivers/gpu/drm/radeon/r520.c dev_err(rdev->dev, "Expecting atombios for RV515 GPU\n"); rdev 275 drivers/gpu/drm/radeon/r520.c if (radeon_asic_reset(rdev)) { rdev 276 drivers/gpu/drm/radeon/r520.c dev_warn(rdev->dev, rdev 282 drivers/gpu/drm/radeon/r520.c if (radeon_boot_test_post_card(rdev) == false) rdev 285 drivers/gpu/drm/radeon/r520.c if (!radeon_card_posted(rdev) && rdev->bios) { rdev 287 drivers/gpu/drm/radeon/r520.c atom_asic_init(rdev->mode_info.atom_context); rdev 290 drivers/gpu/drm/radeon/r520.c radeon_get_clock_info(rdev->ddev); rdev 292 drivers/gpu/drm/radeon/r520.c if (rdev->flags & RADEON_IS_AGP) { rdev 293 drivers/gpu/drm/radeon/r520.c r = radeon_agp_init(rdev); rdev 295 drivers/gpu/drm/radeon/r520.c radeon_agp_disable(rdev); rdev 299 drivers/gpu/drm/radeon/r520.c r520_mc_init(rdev); rdev 300 drivers/gpu/drm/radeon/r520.c rv515_debugfs(rdev); rdev 302 drivers/gpu/drm/radeon/r520.c r = radeon_fence_driver_init(rdev); rdev 306 drivers/gpu/drm/radeon/r520.c r = radeon_bo_init(rdev); rdev 309 drivers/gpu/drm/radeon/r520.c r = rv370_pcie_gart_init(rdev); rdev 312 drivers/gpu/drm/radeon/r520.c rv515_set_safe_registers(rdev); rdev 315 drivers/gpu/drm/radeon/r520.c radeon_pm_init(rdev); rdev 317 drivers/gpu/drm/radeon/r520.c rdev->accel_working = true; rdev 318 drivers/gpu/drm/radeon/r520.c r = r520_startup(rdev); rdev 321 drivers/gpu/drm/radeon/r520.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 322 drivers/gpu/drm/radeon/r520.c r100_cp_fini(rdev); rdev 323 drivers/gpu/drm/radeon/r520.c radeon_wb_fini(rdev); rdev 324 drivers/gpu/drm/radeon/r520.c radeon_ib_pool_fini(rdev); rdev 325 drivers/gpu/drm/radeon/r520.c radeon_irq_kms_fini(rdev); rdev 326 drivers/gpu/drm/radeon/r520.c rv370_pcie_gart_fini(rdev); rdev 327 drivers/gpu/drm/radeon/r520.c radeon_agp_fini(rdev); rdev 328 drivers/gpu/drm/radeon/r520.c rdev->accel_working = false; rdev 106 drivers/gpu/drm/radeon/r600.c int r600_debugfs_mc_info_init(struct radeon_device *rdev); rdev 109 drivers/gpu/drm/radeon/r600.c int r600_mc_wait_for_idle(struct radeon_device *rdev); rdev 110 drivers/gpu/drm/radeon/r600.c static void r600_gpu_init(struct radeon_device *rdev); rdev 111 drivers/gpu/drm/radeon/r600.c void r600_fini(struct radeon_device *rdev); rdev 112 drivers/gpu/drm/radeon/r600.c void r600_irq_disable(struct radeon_device *rdev); rdev 113 drivers/gpu/drm/radeon/r600.c static void r600_pcie_gen2_enable(struct radeon_device *rdev); rdev 114 drivers/gpu/drm/radeon/r600.c extern int evergreen_rlc_resume(struct radeon_device *rdev); rdev 115 drivers/gpu/drm/radeon/r600.c extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); rdev 120 drivers/gpu/drm/radeon/r600.c u32 r600_rcu_rreg(struct radeon_device *rdev, u32 reg) rdev 125 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->rcu_idx_lock, flags); rdev 128 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); rdev 132 drivers/gpu/drm/radeon/r600.c void r600_rcu_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 136 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->rcu_idx_lock, flags); rdev 139 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); rdev 142 drivers/gpu/drm/radeon/r600.c u32 r600_uvd_ctx_rreg(struct radeon_device *rdev, u32 reg) rdev 147 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->uvd_idx_lock, flags); rdev 150 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); rdev 154 drivers/gpu/drm/radeon/r600.c void r600_uvd_ctx_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 158 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->uvd_idx_lock, flags); rdev 161 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); rdev 174 drivers/gpu/drm/radeon/r600.c int r600_get_allowed_info_register(struct radeon_device *rdev, rdev 198 drivers/gpu/drm/radeon/r600.c u32 r600_get_xclk(struct radeon_device *rdev) rdev 200 drivers/gpu/drm/radeon/r600.c return rdev->clock.spll.reference_freq; rdev 203 drivers/gpu/drm/radeon/r600.c int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) rdev 217 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RS780) rdev 227 drivers/gpu/drm/radeon/r600.c if (rdev->clock.spll.reference_freq == 10000) rdev 232 drivers/gpu/drm/radeon/r600.c r = radeon_uvd_calc_upll_dividers(rdev, vclk, dclk, 50000, 160000, rdev 238 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV670 && rdev->family < CHIP_RS780) rdev 243 drivers/gpu/drm/radeon/r600.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 251 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RS780) rdev 279 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RS780) rdev 282 drivers/gpu/drm/radeon/r600.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 299 drivers/gpu/drm/radeon/r600.c struct radeon_device *rdev = dev->dev_private; rdev 350 drivers/gpu/drm/radeon/r600.c int rv6xx_get_temp(struct radeon_device *rdev) rdev 362 drivers/gpu/drm/radeon/r600.c void r600_pm_get_dynpm_state(struct radeon_device *rdev) rdev 366 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_upclock = true; rdev 367 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_downclock = true; rdev 370 drivers/gpu/drm/radeon/r600.c if ((rdev->flags & RADEON_IS_IGP) || (rdev->family == CHIP_R600)) { rdev 373 drivers/gpu/drm/radeon/r600.c if (rdev->pm.num_power_states > 2) rdev 376 drivers/gpu/drm/radeon/r600.c switch (rdev->pm.dynpm_planned_action) { rdev 378 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = min_power_state_index; rdev 379 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 380 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_downclock = false; rdev 383 drivers/gpu/drm/radeon/r600.c if (rdev->pm.current_power_state_index == min_power_state_index) { rdev 384 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev->pm.current_power_state_index; rdev 385 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_downclock = false; rdev 387 drivers/gpu/drm/radeon/r600.c if (rdev->pm.active_crtc_count > 1) { rdev 388 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->pm.num_power_states; i++) { rdev 389 drivers/gpu/drm/radeon/r600.c if (rdev->pm.power_state[i].flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) rdev 391 drivers/gpu/drm/radeon/r600.c else if (i >= rdev->pm.current_power_state_index) { rdev 392 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev 393 drivers/gpu/drm/radeon/r600.c rdev->pm.current_power_state_index; rdev 396 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = i; rdev 401 drivers/gpu/drm/radeon/r600.c if (rdev->pm.current_power_state_index == 0) rdev 402 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev 403 drivers/gpu/drm/radeon/r600.c rdev->pm.num_power_states - 1; rdev 405 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev 406 drivers/gpu/drm/radeon/r600.c rdev->pm.current_power_state_index - 1; rdev 409 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 411 drivers/gpu/drm/radeon/r600.c if ((rdev->pm.active_crtc_count > 0) && rdev 412 drivers/gpu/drm/radeon/r600.c (rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 413 drivers/gpu/drm/radeon/r600.c clock_info[rdev->pm.requested_clock_mode_index].flags & rdev 415 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index++; rdev 419 drivers/gpu/drm/radeon/r600.c if (rdev->pm.current_power_state_index == (rdev->pm.num_power_states - 1)) { rdev 420 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev->pm.current_power_state_index; rdev 421 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_upclock = false; rdev 423 drivers/gpu/drm/radeon/r600.c if (rdev->pm.active_crtc_count > 1) { rdev 424 drivers/gpu/drm/radeon/r600.c for (i = (rdev->pm.num_power_states - 1); i >= 0; i--) { rdev 425 drivers/gpu/drm/radeon/r600.c if (rdev->pm.power_state[i].flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) rdev 427 drivers/gpu/drm/radeon/r600.c else if (i <= rdev->pm.current_power_state_index) { rdev 428 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev 429 drivers/gpu/drm/radeon/r600.c rdev->pm.current_power_state_index; rdev 432 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = i; rdev 437 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev 438 drivers/gpu/drm/radeon/r600.c rdev->pm.current_power_state_index + 1; rdev 440 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 443 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev->pm.default_power_state_index; rdev 444 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 445 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_upclock = false; rdev 456 drivers/gpu/drm/radeon/r600.c if (rdev->pm.active_crtc_count > 1) { rdev 457 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = -1; rdev 459 drivers/gpu/drm/radeon/r600.c for (i = 1; i < rdev->pm.num_power_states; i++) { rdev 460 drivers/gpu/drm/radeon/r600.c if (rdev->pm.power_state[i].flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) rdev 462 drivers/gpu/drm/radeon/r600.c else if ((rdev->pm.power_state[i].type == POWER_STATE_TYPE_PERFORMANCE) || rdev 463 drivers/gpu/drm/radeon/r600.c (rdev->pm.power_state[i].type == POWER_STATE_TYPE_BATTERY)) { rdev 464 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = i; rdev 469 drivers/gpu/drm/radeon/r600.c if (rdev->pm.requested_power_state_index == -1) rdev 470 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = 0; rdev 472 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = 1; rdev 474 drivers/gpu/drm/radeon/r600.c switch (rdev->pm.dynpm_planned_action) { rdev 476 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 477 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_downclock = false; rdev 480 drivers/gpu/drm/radeon/r600.c if (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index) { rdev 481 drivers/gpu/drm/radeon/r600.c if (rdev->pm.current_clock_mode_index == 0) { rdev 482 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 483 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_downclock = false; rdev 485 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = rdev 486 drivers/gpu/drm/radeon/r600.c rdev->pm.current_clock_mode_index - 1; rdev 488 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 489 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_downclock = false; rdev 492 drivers/gpu/drm/radeon/r600.c if ((rdev->pm.active_crtc_count > 0) && rdev 493 drivers/gpu/drm/radeon/r600.c (rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 494 drivers/gpu/drm/radeon/r600.c clock_info[rdev->pm.requested_clock_mode_index].flags & rdev 496 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index++; rdev 500 drivers/gpu/drm/radeon/r600.c if (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index) { rdev 501 drivers/gpu/drm/radeon/r600.c if (rdev->pm.current_clock_mode_index == rdev 502 drivers/gpu/drm/radeon/r600.c (rdev->pm.power_state[rdev->pm.requested_power_state_index].num_clock_modes - 1)) { rdev 503 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = rdev->pm.current_clock_mode_index; rdev 504 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_upclock = false; rdev 506 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = rdev 507 drivers/gpu/drm/radeon/r600.c rdev->pm.current_clock_mode_index + 1; rdev 509 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = rdev 510 drivers/gpu/drm/radeon/r600.c rdev->pm.power_state[rdev->pm.requested_power_state_index].num_clock_modes - 1; rdev 511 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_upclock = false; rdev 515 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_power_state_index = rdev->pm.default_power_state_index; rdev 516 drivers/gpu/drm/radeon/r600.c rdev->pm.requested_clock_mode_index = 0; rdev 517 drivers/gpu/drm/radeon/r600.c rdev->pm.dynpm_can_upclock = false; rdev 527 drivers/gpu/drm/radeon/r600.c rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 528 drivers/gpu/drm/radeon/r600.c clock_info[rdev->pm.requested_clock_mode_index].sclk, rdev 529 drivers/gpu/drm/radeon/r600.c rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 530 drivers/gpu/drm/radeon/r600.c clock_info[rdev->pm.requested_clock_mode_index].mclk, rdev 531 drivers/gpu/drm/radeon/r600.c rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 535 drivers/gpu/drm/radeon/r600.c void rs780_pm_init_profile(struct radeon_device *rdev) rdev 537 drivers/gpu/drm/radeon/r600.c if (rdev->pm.num_power_states == 2) { rdev 539 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 540 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 541 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 542 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; rdev 544 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0; rdev 545 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0; rdev 546 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 547 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 549 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0; rdev 550 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 0; rdev 551 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 552 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; rdev 554 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0; rdev 555 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1; rdev 556 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 557 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0; rdev 559 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 0; rdev 560 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0; rdev 561 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 562 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 564 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0; rdev 565 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 0; rdev 566 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 567 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; rdev 569 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0; rdev 570 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 1; rdev 571 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 572 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0; rdev 573 drivers/gpu/drm/radeon/r600.c } else if (rdev->pm.num_power_states == 3) { rdev 575 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 576 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 577 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 578 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; rdev 580 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 1; rdev 581 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1; rdev 582 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 583 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 585 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 1; rdev 586 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1; rdev 587 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 588 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; rdev 590 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1; rdev 591 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 2; rdev 592 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 593 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0; rdev 595 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 1; rdev 596 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 1; rdev 597 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 598 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 600 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 1; rdev 601 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 1; rdev 602 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 603 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; rdev 605 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 1; rdev 606 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2; rdev 607 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 608 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0; rdev 611 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 612 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 613 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 614 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; rdev 616 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 2; rdev 617 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 2; rdev 618 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 619 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 621 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 2; rdev 622 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 2; rdev 623 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 624 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; rdev 626 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 2; rdev 627 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 3; rdev 628 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 629 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0; rdev 631 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 2; rdev 632 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0; rdev 633 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 634 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 636 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 2; rdev 637 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 0; rdev 638 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 639 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; rdev 641 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2; rdev 642 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 3; rdev 643 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 644 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0; rdev 648 drivers/gpu/drm/radeon/r600.c void r600_pm_init_profile(struct radeon_device *rdev) rdev 652 drivers/gpu/drm/radeon/r600.c if (rdev->family == CHIP_R600) { rdev 655 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 656 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 657 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 658 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; rdev 660 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 661 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 662 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 663 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 665 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 666 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 667 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 668 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; rdev 670 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 671 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 672 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 673 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 0; rdev 675 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 676 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 677 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 678 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 680 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 681 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 682 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 683 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; rdev 685 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 686 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 687 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 688 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 0; rdev 690 drivers/gpu/drm/radeon/r600.c if (rdev->pm.num_power_states < 4) { rdev 692 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 693 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 694 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 695 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 2; rdev 697 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 1; rdev 698 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1; rdev 699 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 700 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 702 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 1; rdev 703 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1; rdev 704 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 705 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; rdev 707 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1; rdev 708 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1; rdev 709 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 710 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2; rdev 712 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 2; rdev 713 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 2; rdev 714 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 715 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 717 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 2; rdev 718 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 2; rdev 719 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 720 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; rdev 722 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2; rdev 723 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2; rdev 724 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 725 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2; rdev 728 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; rdev 729 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; rdev 730 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; rdev 731 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 2; rdev 733 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_MOBILITY) rdev 734 drivers/gpu/drm/radeon/r600.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); rdev 736 drivers/gpu/drm/radeon/r600.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); rdev 737 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = idx; rdev 738 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = idx; rdev 739 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; rdev 740 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; rdev 742 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = idx; rdev 743 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = idx; rdev 744 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; rdev 745 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; rdev 747 drivers/gpu/drm/radeon/r600.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); rdev 748 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = idx; rdev 749 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = idx; rdev 750 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; rdev 751 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2; rdev 753 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_MOBILITY) rdev 754 drivers/gpu/drm/radeon/r600.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); rdev 756 drivers/gpu/drm/radeon/r600.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); rdev 757 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = idx; rdev 758 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = idx; rdev 759 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; rdev 760 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; rdev 762 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = idx; rdev 763 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = idx; rdev 764 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; rdev 765 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; rdev 767 drivers/gpu/drm/radeon/r600.c idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); rdev 768 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = idx; rdev 769 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = idx; rdev 770 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; rdev 771 drivers/gpu/drm/radeon/r600.c rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2; rdev 776 drivers/gpu/drm/radeon/r600.c void r600_pm_misc(struct radeon_device *rdev) rdev 778 drivers/gpu/drm/radeon/r600.c int req_ps_idx = rdev->pm.requested_power_state_index; rdev 779 drivers/gpu/drm/radeon/r600.c int req_cm_idx = rdev->pm.requested_clock_mode_index; rdev 780 drivers/gpu/drm/radeon/r600.c struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; rdev 787 drivers/gpu/drm/radeon/r600.c if (voltage->voltage != rdev->pm.current_vddc) { rdev 788 drivers/gpu/drm/radeon/r600.c radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); rdev 789 drivers/gpu/drm/radeon/r600.c rdev->pm.current_vddc = voltage->voltage; rdev 795 drivers/gpu/drm/radeon/r600.c bool r600_gui_idle(struct radeon_device *rdev) rdev 804 drivers/gpu/drm/radeon/r600.c bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) rdev 808 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 859 drivers/gpu/drm/radeon/r600.c void r600_hpd_set_polarity(struct radeon_device *rdev, rdev 863 drivers/gpu/drm/radeon/r600.c bool connected = r600_hpd_sense(rdev, hpd); rdev 865 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 951 drivers/gpu/drm/radeon/r600.c void r600_hpd_init(struct radeon_device *rdev) rdev 953 drivers/gpu/drm/radeon/r600.c struct drm_device *dev = rdev->ddev; rdev 968 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 970 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE32(rdev)) rdev 1013 drivers/gpu/drm/radeon/r600.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); rdev 1015 drivers/gpu/drm/radeon/r600.c radeon_irq_kms_enable_hpd(rdev, enable); rdev 1018 drivers/gpu/drm/radeon/r600.c void r600_hpd_fini(struct radeon_device *rdev) rdev 1020 drivers/gpu/drm/radeon/r600.c struct drm_device *dev = rdev->ddev; rdev 1026 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 1068 drivers/gpu/drm/radeon/r600.c radeon_irq_kms_disable_hpd(rdev, disable); rdev 1074 drivers/gpu/drm/radeon/r600.c void r600_pcie_gart_tlb_flush(struct radeon_device *rdev) rdev 1080 drivers/gpu/drm/radeon/r600.c if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) && rdev 1081 drivers/gpu/drm/radeon/r600.c !(rdev->flags & RADEON_IS_AGP)) { rdev 1082 drivers/gpu/drm/radeon/r600.c void __iomem *ptr = (void *)rdev->gart.ptr; rdev 1095 drivers/gpu/drm/radeon/r600.c WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12); rdev 1096 drivers/gpu/drm/radeon/r600.c WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12); rdev 1098 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1113 drivers/gpu/drm/radeon/r600.c int r600_pcie_gart_init(struct radeon_device *rdev) rdev 1117 drivers/gpu/drm/radeon/r600.c if (rdev->gart.robj) { rdev 1122 drivers/gpu/drm/radeon/r600.c r = radeon_gart_init(rdev); rdev 1125 drivers/gpu/drm/radeon/r600.c rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; rdev 1126 drivers/gpu/drm/radeon/r600.c return radeon_gart_table_vram_alloc(rdev); rdev 1129 drivers/gpu/drm/radeon/r600.c static int r600_pcie_gart_enable(struct radeon_device *rdev) rdev 1134 drivers/gpu/drm/radeon/r600.c if (rdev->gart.robj == NULL) { rdev 1135 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 1138 drivers/gpu/drm/radeon/r600.c r = radeon_gart_table_vram_pin(rdev); rdev 1169 drivers/gpu/drm/radeon/r600.c WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); rdev 1170 drivers/gpu/drm/radeon/r600.c WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); rdev 1171 drivers/gpu/drm/radeon/r600.c WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); rdev 1175 drivers/gpu/drm/radeon/r600.c (u32)(rdev->dummy_page.addr >> 12)); rdev 1179 drivers/gpu/drm/radeon/r600.c r600_pcie_gart_tlb_flush(rdev); rdev 1181 drivers/gpu/drm/radeon/r600.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 1182 drivers/gpu/drm/radeon/r600.c (unsigned long long)rdev->gart.table_addr); rdev 1183 drivers/gpu/drm/radeon/r600.c rdev->gart.ready = true; rdev 1187 drivers/gpu/drm/radeon/r600.c static void r600_pcie_gart_disable(struct radeon_device *rdev) rdev 1219 drivers/gpu/drm/radeon/r600.c radeon_gart_table_vram_unpin(rdev); rdev 1222 drivers/gpu/drm/radeon/r600.c static void r600_pcie_gart_fini(struct radeon_device *rdev) rdev 1224 drivers/gpu/drm/radeon/r600.c radeon_gart_fini(rdev); rdev 1225 drivers/gpu/drm/radeon/r600.c r600_pcie_gart_disable(rdev); rdev 1226 drivers/gpu/drm/radeon/r600.c radeon_gart_table_vram_free(rdev); rdev 1229 drivers/gpu/drm/radeon/r600.c static void r600_agp_enable(struct radeon_device *rdev) rdev 1263 drivers/gpu/drm/radeon/r600.c int r600_mc_wait_for_idle(struct radeon_device *rdev) rdev 1268 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1278 drivers/gpu/drm/radeon/r600.c uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg) rdev 1283 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 1287 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 1291 drivers/gpu/drm/radeon/r600.c void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 1295 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 1300 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 1303 drivers/gpu/drm/radeon/r600.c static void r600_mc_program(struct radeon_device *rdev) rdev 1319 drivers/gpu/drm/radeon/r600.c rv515_mc_stop(rdev, &save); rdev 1320 drivers/gpu/drm/radeon/r600.c if (r600_mc_wait_for_idle(rdev)) { rdev 1321 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 1326 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_AGP) { rdev 1327 drivers/gpu/drm/radeon/r600.c if (rdev->mc.vram_start < rdev->mc.gtt_start) { rdev 1330 drivers/gpu/drm/radeon/r600.c rdev->mc.vram_start >> 12); rdev 1332 drivers/gpu/drm/radeon/r600.c rdev->mc.gtt_end >> 12); rdev 1336 drivers/gpu/drm/radeon/r600.c rdev->mc.gtt_start >> 12); rdev 1338 drivers/gpu/drm/radeon/r600.c rdev->mc.vram_end >> 12); rdev 1341 drivers/gpu/drm/radeon/r600.c WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start >> 12); rdev 1342 drivers/gpu/drm/radeon/r600.c WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end >> 12); rdev 1344 drivers/gpu/drm/radeon/r600.c WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12); rdev 1345 drivers/gpu/drm/radeon/r600.c tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; rdev 1346 drivers/gpu/drm/radeon/r600.c tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); rdev 1348 drivers/gpu/drm/radeon/r600.c WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); rdev 1351 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_AGP) { rdev 1352 drivers/gpu/drm/radeon/r600.c WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 22); rdev 1353 drivers/gpu/drm/radeon/r600.c WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 22); rdev 1354 drivers/gpu/drm/radeon/r600.c WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22); rdev 1360 drivers/gpu/drm/radeon/r600.c if (r600_mc_wait_for_idle(rdev)) { rdev 1361 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 1363 drivers/gpu/drm/radeon/r600.c rv515_mc_resume(rdev, &save); rdev 1366 drivers/gpu/drm/radeon/r600.c rv515_vga_render_disable(rdev); rdev 1390 drivers/gpu/drm/radeon/r600.c static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) rdev 1396 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "limiting VRAM\n"); rdev 1400 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_AGP) { rdev 1405 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "limiting VRAM\n"); rdev 1412 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "limiting VRAM\n"); rdev 1419 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, "VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used)\n", rdev 1424 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_IGP) { rdev 1428 drivers/gpu/drm/radeon/r600.c radeon_vram_location(rdev, &rdev->mc, base); rdev 1429 drivers/gpu/drm/radeon/r600.c rdev->mc.gtt_base_align = 0; rdev 1430 drivers/gpu/drm/radeon/r600.c radeon_gtt_location(rdev, mc); rdev 1434 drivers/gpu/drm/radeon/r600.c static int r600_mc_init(struct radeon_device *rdev) rdev 1442 drivers/gpu/drm/radeon/r600.c rdev->mc.vram_is_ddr = true; rdev 1467 drivers/gpu/drm/radeon/r600.c rdev->mc.vram_width = numchan * chansize; rdev 1469 drivers/gpu/drm/radeon/r600.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 1470 drivers/gpu/drm/radeon/r600.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 1472 drivers/gpu/drm/radeon/r600.c rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); rdev 1473 drivers/gpu/drm/radeon/r600.c rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); rdev 1474 drivers/gpu/drm/radeon/r600.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 1475 drivers/gpu/drm/radeon/r600.c r600_vram_gtt_location(rdev, &rdev->mc); rdev 1477 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_IGP) { rdev 1478 drivers/gpu/drm/radeon/r600.c rs690_pm_info(rdev); rdev 1479 drivers/gpu/drm/radeon/r600.c rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); rdev 1481 drivers/gpu/drm/radeon/r600.c if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { rdev 1483 drivers/gpu/drm/radeon/r600.c rdev->fastfb_working = false; rdev 1488 drivers/gpu/drm/radeon/r600.c if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL) rdev 1494 drivers/gpu/drm/radeon/r600.c if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) { rdev 1496 drivers/gpu/drm/radeon/r600.c (unsigned long long)rdev->mc.aper_base, k8_addr); rdev 1497 drivers/gpu/drm/radeon/r600.c rdev->mc.aper_base = (resource_size_t)k8_addr; rdev 1498 drivers/gpu/drm/radeon/r600.c rdev->fastfb_working = true; rdev 1504 drivers/gpu/drm/radeon/r600.c radeon_update_bandwidth_info(rdev); rdev 1508 drivers/gpu/drm/radeon/r600.c int r600_vram_scratch_init(struct radeon_device *rdev) rdev 1512 drivers/gpu/drm/radeon/r600.c if (rdev->vram_scratch.robj == NULL) { rdev 1513 drivers/gpu/drm/radeon/r600.c r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, rdev 1515 drivers/gpu/drm/radeon/r600.c 0, NULL, NULL, &rdev->vram_scratch.robj); rdev 1521 drivers/gpu/drm/radeon/r600.c r = radeon_bo_reserve(rdev->vram_scratch.robj, false); rdev 1524 drivers/gpu/drm/radeon/r600.c r = radeon_bo_pin(rdev->vram_scratch.robj, rdev 1525 drivers/gpu/drm/radeon/r600.c RADEON_GEM_DOMAIN_VRAM, &rdev->vram_scratch.gpu_addr); rdev 1527 drivers/gpu/drm/radeon/r600.c radeon_bo_unreserve(rdev->vram_scratch.robj); rdev 1530 drivers/gpu/drm/radeon/r600.c r = radeon_bo_kmap(rdev->vram_scratch.robj, rdev 1531 drivers/gpu/drm/radeon/r600.c (void **)&rdev->vram_scratch.ptr); rdev 1533 drivers/gpu/drm/radeon/r600.c radeon_bo_unpin(rdev->vram_scratch.robj); rdev 1534 drivers/gpu/drm/radeon/r600.c radeon_bo_unreserve(rdev->vram_scratch.robj); rdev 1539 drivers/gpu/drm/radeon/r600.c void r600_vram_scratch_fini(struct radeon_device *rdev) rdev 1543 drivers/gpu/drm/radeon/r600.c if (rdev->vram_scratch.robj == NULL) { rdev 1546 drivers/gpu/drm/radeon/r600.c r = radeon_bo_reserve(rdev->vram_scratch.robj, false); rdev 1548 drivers/gpu/drm/radeon/r600.c radeon_bo_kunmap(rdev->vram_scratch.robj); rdev 1549 drivers/gpu/drm/radeon/r600.c radeon_bo_unpin(rdev->vram_scratch.robj); rdev 1550 drivers/gpu/drm/radeon/r600.c radeon_bo_unreserve(rdev->vram_scratch.robj); rdev 1552 drivers/gpu/drm/radeon/r600.c radeon_bo_unref(&rdev->vram_scratch.robj); rdev 1555 drivers/gpu/drm/radeon/r600.c void r600_set_bios_scratch_engine_hung(struct radeon_device *rdev, bool hung) rdev 1567 drivers/gpu/drm/radeon/r600.c static void r600_print_gpu_status_regs(struct radeon_device *rdev) rdev 1569 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_008010_GRBM_STATUS = 0x%08X\n", rdev 1571 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_008014_GRBM_STATUS2 = 0x%08X\n", rdev 1573 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_000E50_SRBM_STATUS = 0x%08X\n", rdev 1575 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", rdev 1577 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n", rdev 1579 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n", rdev 1581 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", rdev 1583 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n", rdev 1587 drivers/gpu/drm/radeon/r600.c static bool r600_is_display_hung(struct radeon_device *rdev) rdev 1593 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->num_crtc; i++) { rdev 1601 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->num_crtc; i++) { rdev 1616 drivers/gpu/drm/radeon/r600.c u32 r600_gpu_check_soft_reset(struct radeon_device *rdev) rdev 1623 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) { rdev 1673 drivers/gpu/drm/radeon/r600.c if (r600_is_display_hung(rdev)) rdev 1685 drivers/gpu/drm/radeon/r600.c static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) rdev 1694 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask); rdev 1696 drivers/gpu/drm/radeon/r600.c r600_print_gpu_status_regs(rdev); rdev 1699 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) rdev 1716 drivers/gpu/drm/radeon/r600.c rv515_mc_stop(rdev, &save); rdev 1717 drivers/gpu/drm/radeon/r600.c if (r600_mc_wait_for_idle(rdev)) { rdev 1718 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 1722 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) rdev 1758 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) rdev 1776 drivers/gpu/drm/radeon/r600.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 1787 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, "R_008020_GRBM_SOFT_RESET=0x%08X\n", tmp); rdev 1801 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); rdev 1815 drivers/gpu/drm/radeon/r600.c rv515_mc_resume(rdev, &save); rdev 1818 drivers/gpu/drm/radeon/r600.c r600_print_gpu_status_regs(rdev); rdev 1821 drivers/gpu/drm/radeon/r600.c static void r600_gpu_pci_config_reset(struct radeon_device *rdev) rdev 1826 drivers/gpu/drm/radeon/r600.c dev_info(rdev->dev, "GPU pci config reset\n"); rdev 1831 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) rdev 1847 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) rdev 1848 drivers/gpu/drm/radeon/r600.c rv770_set_clk_bypass_mode(rdev); rdev 1850 drivers/gpu/drm/radeon/r600.c pci_clear_master(rdev->pdev); rdev 1852 drivers/gpu/drm/radeon/r600.c rv515_mc_stop(rdev, &save); rdev 1853 drivers/gpu/drm/radeon/r600.c if (r600_mc_wait_for_idle(rdev)) { rdev 1854 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 1865 drivers/gpu/drm/radeon/r600.c radeon_pci_config_reset(rdev); rdev 1875 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1882 drivers/gpu/drm/radeon/r600.c int r600_asic_reset(struct radeon_device *rdev, bool hard) rdev 1887 drivers/gpu/drm/radeon/r600.c r600_gpu_pci_config_reset(rdev); rdev 1891 drivers/gpu/drm/radeon/r600.c reset_mask = r600_gpu_check_soft_reset(rdev); rdev 1894 drivers/gpu/drm/radeon/r600.c r600_set_bios_scratch_engine_hung(rdev, true); rdev 1897 drivers/gpu/drm/radeon/r600.c r600_gpu_soft_reset(rdev, reset_mask); rdev 1899 drivers/gpu/drm/radeon/r600.c reset_mask = r600_gpu_check_soft_reset(rdev); rdev 1903 drivers/gpu/drm/radeon/r600.c r600_gpu_pci_config_reset(rdev); rdev 1905 drivers/gpu/drm/radeon/r600.c reset_mask = r600_gpu_check_soft_reset(rdev); rdev 1908 drivers/gpu/drm/radeon/r600.c r600_set_bios_scratch_engine_hung(rdev, false); rdev 1922 drivers/gpu/drm/radeon/r600.c bool r600_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 1924 drivers/gpu/drm/radeon/r600.c u32 reset_mask = r600_gpu_check_soft_reset(rdev); rdev 1929 drivers/gpu/drm/radeon/r600.c radeon_ring_lockup_update(rdev, ring); rdev 1932 drivers/gpu/drm/radeon/r600.c return radeon_ring_test_lockup(rdev, ring); rdev 1935 drivers/gpu/drm/radeon/r600.c u32 r6xx_remap_render_backend(struct radeon_device *rdev, rdev 1959 drivers/gpu/drm/radeon/r600.c if (rdev->family <= CHIP_RV740) { rdev 1990 drivers/gpu/drm/radeon/r600.c static void r600_gpu_init(struct radeon_device *rdev) rdev 2005 drivers/gpu/drm/radeon/r600.c rdev->config.r600.tiling_group_size = 256; rdev 2006 drivers/gpu/drm/radeon/r600.c switch (rdev->family) { rdev 2008 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_pipes = 4; rdev 2009 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_tile_pipes = 8; rdev 2010 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_simds = 4; rdev 2011 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_backends = 4; rdev 2012 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gprs = 256; rdev 2013 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_threads = 192; rdev 2014 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_stack_entries = 256; rdev 2015 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_hw_contexts = 8; rdev 2016 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gs_threads = 16; rdev 2017 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_size = 128; rdev 2018 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_pos_size = 16; rdev 2019 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_smx_size = 128; rdev 2020 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sq_num_cf_insts = 2; rdev 2024 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_pipes = 2; rdev 2025 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_tile_pipes = 2; rdev 2026 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_simds = 3; rdev 2027 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_backends = 1; rdev 2028 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gprs = 128; rdev 2029 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_threads = 192; rdev 2030 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_stack_entries = 128; rdev 2031 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_hw_contexts = 8; rdev 2032 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gs_threads = 4; rdev 2033 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_size = 128; rdev 2034 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_pos_size = 16; rdev 2035 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_smx_size = 128; rdev 2036 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sq_num_cf_insts = 2; rdev 2042 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_pipes = 1; rdev 2043 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_tile_pipes = 1; rdev 2044 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_simds = 2; rdev 2045 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_backends = 1; rdev 2046 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gprs = 128; rdev 2047 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_threads = 192; rdev 2048 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_stack_entries = 128; rdev 2049 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_hw_contexts = 4; rdev 2050 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gs_threads = 4; rdev 2051 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_size = 128; rdev 2052 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_pos_size = 16; rdev 2053 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_smx_size = 128; rdev 2054 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sq_num_cf_insts = 1; rdev 2057 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_pipes = 4; rdev 2058 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_tile_pipes = 4; rdev 2059 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_simds = 4; rdev 2060 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_backends = 4; rdev 2061 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gprs = 192; rdev 2062 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_threads = 192; rdev 2063 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_stack_entries = 256; rdev 2064 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_hw_contexts = 8; rdev 2065 drivers/gpu/drm/radeon/r600.c rdev->config.r600.max_gs_threads = 16; rdev 2066 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_size = 128; rdev 2067 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_pos_size = 16; rdev 2068 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sx_max_export_smx_size = 128; rdev 2069 drivers/gpu/drm/radeon/r600.c rdev->config.r600.sq_num_cf_insts = 2; rdev 2089 drivers/gpu/drm/radeon/r600.c switch (rdev->config.r600.max_tile_pipes) { rdev 2105 drivers/gpu/drm/radeon/r600.c rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes; rdev 2106 drivers/gpu/drm/radeon/r600.c rdev->config.r600.tiling_nbanks = 4 << ((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); rdev 2121 drivers/gpu/drm/radeon/r600.c tmp = rdev->config.r600.max_simds - rdev 2123 drivers/gpu/drm/radeon/r600.c rdev->config.r600.active_simds = tmp; rdev 2127 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->config.r600.max_backends; i++) rdev 2131 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->config.r600.max_backends; i++) rdev 2135 drivers/gpu/drm/radeon/r600.c tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.r600.max_backends, rdev 2138 drivers/gpu/drm/radeon/r600.c rdev->config.r600.backend_map = tmp; rdev 2140 drivers/gpu/drm/radeon/r600.c rdev->config.r600.tile_config = tiling_config; rdev 2157 drivers/gpu/drm/radeon/r600.c if (rdev->family == CHIP_RV670) rdev 2162 drivers/gpu/drm/radeon/r600.c if ((rdev->family > CHIP_R600)) rdev 2166 drivers/gpu/drm/radeon/r600.c if (((rdev->family) == CHIP_R600) || rdev 2167 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV630) || rdev 2168 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV610) || rdev 2169 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV620) || rdev 2170 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS780) || rdev 2171 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS880)) { rdev 2186 drivers/gpu/drm/radeon/r600.c if (((rdev->family) == CHIP_RV610) || rdev 2187 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV620) || rdev 2188 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS780) || rdev 2189 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS880)) { rdev 2194 drivers/gpu/drm/radeon/r600.c } else if (((rdev->family) == CHIP_R600) || rdev 2195 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV630)) { rdev 2216 drivers/gpu/drm/radeon/r600.c if ((rdev->family) == CHIP_R600) { rdev 2230 drivers/gpu/drm/radeon/r600.c } else if (((rdev->family) == CHIP_RV610) || rdev 2231 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV620) || rdev 2232 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS780) || rdev 2233 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS880)) { rdev 2250 drivers/gpu/drm/radeon/r600.c } else if (((rdev->family) == CHIP_RV630) || rdev 2251 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV635)) { rdev 2265 drivers/gpu/drm/radeon/r600.c } else if ((rdev->family) == CHIP_RV670) { rdev 2288 drivers/gpu/drm/radeon/r600.c if (((rdev->family) == CHIP_RV610) || rdev 2289 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RV620) || rdev 2290 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS780) || rdev 2291 drivers/gpu/drm/radeon/r600.c ((rdev->family) == CHIP_RS880)) { rdev 2314 drivers/gpu/drm/radeon/r600.c tmp = rdev->config.r600.max_pipes * 16; rdev 2315 drivers/gpu/drm/radeon/r600.c switch (rdev->family) { rdev 2358 drivers/gpu/drm/radeon/r600.c switch (rdev->family) { rdev 2396 drivers/gpu/drm/radeon/r600.c u32 r600_pciep_rreg(struct radeon_device *rdev, u32 reg) rdev 2401 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->pciep_idx_lock, flags); rdev 2405 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); rdev 2409 drivers/gpu/drm/radeon/r600.c void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) rdev 2413 drivers/gpu/drm/radeon/r600.c spin_lock_irqsave(&rdev->pciep_idx_lock, flags); rdev 2418 drivers/gpu/drm/radeon/r600.c spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); rdev 2424 drivers/gpu/drm/radeon/r600.c void r600_cp_stop(struct radeon_device *rdev) rdev 2426 drivers/gpu/drm/radeon/r600.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 2427 drivers/gpu/drm/radeon/r600.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 2430 drivers/gpu/drm/radeon/r600.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 2433 drivers/gpu/drm/radeon/r600.c int r600_init_microcode(struct radeon_device *rdev) rdev 2444 drivers/gpu/drm/radeon/r600.c switch (rdev->family) { rdev 2538 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_CEDAR) { rdev 2542 drivers/gpu/drm/radeon/r600.c } else if (rdev->family >= CHIP_RV770) { rdev 2555 drivers/gpu/drm/radeon/r600.c err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev); rdev 2558 drivers/gpu/drm/radeon/r600.c if (rdev->pfp_fw->size != pfp_req_size) { rdev 2560 drivers/gpu/drm/radeon/r600.c rdev->pfp_fw->size, fw_name); rdev 2566 drivers/gpu/drm/radeon/r600.c err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); rdev 2569 drivers/gpu/drm/radeon/r600.c if (rdev->me_fw->size != me_req_size) { rdev 2571 drivers/gpu/drm/radeon/r600.c rdev->me_fw->size, fw_name); rdev 2576 drivers/gpu/drm/radeon/r600.c err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev); rdev 2579 drivers/gpu/drm/radeon/r600.c if (rdev->rlc_fw->size != rlc_req_size) { rdev 2581 drivers/gpu/drm/radeon/r600.c rdev->rlc_fw->size, fw_name); rdev 2585 drivers/gpu/drm/radeon/r600.c if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_HEMLOCK)) { rdev 2587 drivers/gpu/drm/radeon/r600.c err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); rdev 2590 drivers/gpu/drm/radeon/r600.c release_firmware(rdev->smc_fw); rdev 2591 drivers/gpu/drm/radeon/r600.c rdev->smc_fw = NULL; rdev 2593 drivers/gpu/drm/radeon/r600.c } else if (rdev->smc_fw->size != smc_req_size) { rdev 2595 drivers/gpu/drm/radeon/r600.c rdev->smc_fw->size, fw_name); rdev 2605 drivers/gpu/drm/radeon/r600.c release_firmware(rdev->pfp_fw); rdev 2606 drivers/gpu/drm/radeon/r600.c rdev->pfp_fw = NULL; rdev 2607 drivers/gpu/drm/radeon/r600.c release_firmware(rdev->me_fw); rdev 2608 drivers/gpu/drm/radeon/r600.c rdev->me_fw = NULL; rdev 2609 drivers/gpu/drm/radeon/r600.c release_firmware(rdev->rlc_fw); rdev 2610 drivers/gpu/drm/radeon/r600.c rdev->rlc_fw = NULL; rdev 2611 drivers/gpu/drm/radeon/r600.c release_firmware(rdev->smc_fw); rdev 2612 drivers/gpu/drm/radeon/r600.c rdev->smc_fw = NULL; rdev 2617 drivers/gpu/drm/radeon/r600.c u32 r600_gfx_get_rptr(struct radeon_device *rdev, rdev 2622 drivers/gpu/drm/radeon/r600.c if (rdev->wb.enabled) rdev 2623 drivers/gpu/drm/radeon/r600.c rptr = rdev->wb.wb[ring->rptr_offs/4]; rdev 2630 drivers/gpu/drm/radeon/r600.c u32 r600_gfx_get_wptr(struct radeon_device *rdev, rdev 2636 drivers/gpu/drm/radeon/r600.c void r600_gfx_set_wptr(struct radeon_device *rdev, rdev 2643 drivers/gpu/drm/radeon/r600.c static int r600_cp_load_microcode(struct radeon_device *rdev) rdev 2648 drivers/gpu/drm/radeon/r600.c if (!rdev->me_fw || !rdev->pfp_fw) rdev 2651 drivers/gpu/drm/radeon/r600.c r600_cp_stop(rdev); rdev 2667 drivers/gpu/drm/radeon/r600.c fw_data = (const __be32 *)rdev->me_fw->data; rdev 2673 drivers/gpu/drm/radeon/r600.c fw_data = (const __be32 *)rdev->pfp_fw->data; rdev 2685 drivers/gpu/drm/radeon/r600.c int r600_cp_start(struct radeon_device *rdev) rdev 2687 drivers/gpu/drm/radeon/r600.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 2691 drivers/gpu/drm/radeon/r600.c r = radeon_ring_lock(rdev, ring, 7); rdev 2698 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) { rdev 2700 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, rdev->config.rv770.max_hw_contexts - 1); rdev 2703 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, rdev->config.r600.max_hw_contexts - 1); rdev 2708 drivers/gpu/drm/radeon/r600.c radeon_ring_unlock_commit(rdev, ring, false); rdev 2715 drivers/gpu/drm/radeon/r600.c int r600_cp_resume(struct radeon_device *rdev) rdev 2717 drivers/gpu/drm/radeon/r600.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 2748 drivers/gpu/drm/radeon/r600.c ((rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC)); rdev 2749 drivers/gpu/drm/radeon/r600.c WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); rdev 2750 drivers/gpu/drm/radeon/r600.c WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); rdev 2752 drivers/gpu/drm/radeon/r600.c if (rdev->wb.enabled) rdev 2765 drivers/gpu/drm/radeon/r600.c r600_cp_start(rdev); rdev 2767 drivers/gpu/drm/radeon/r600.c r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring); rdev 2773 drivers/gpu/drm/radeon/r600.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 2774 drivers/gpu/drm/radeon/r600.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 2779 drivers/gpu/drm/radeon/r600.c void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size) rdev 2790 drivers/gpu/drm/radeon/r600.c if (radeon_ring_supports_scratch_reg(rdev, ring)) { rdev 2791 drivers/gpu/drm/radeon/r600.c r = radeon_scratch_get(rdev, &ring->rptr_save_reg); rdev 2799 drivers/gpu/drm/radeon/r600.c void r600_cp_fini(struct radeon_device *rdev) rdev 2801 drivers/gpu/drm/radeon/r600.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 2802 drivers/gpu/drm/radeon/r600.c r600_cp_stop(rdev); rdev 2803 drivers/gpu/drm/radeon/r600.c radeon_ring_fini(rdev, ring); rdev 2804 drivers/gpu/drm/radeon/r600.c radeon_scratch_free(rdev, ring->rptr_save_reg); rdev 2810 drivers/gpu/drm/radeon/r600.c void r600_scratch_init(struct radeon_device *rdev) rdev 2814 drivers/gpu/drm/radeon/r600.c rdev->scratch.num_reg = 7; rdev 2815 drivers/gpu/drm/radeon/r600.c rdev->scratch.reg_base = SCRATCH_REG0; rdev 2816 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->scratch.num_reg; i++) { rdev 2817 drivers/gpu/drm/radeon/r600.c rdev->scratch.free[i] = true; rdev 2818 drivers/gpu/drm/radeon/r600.c rdev->scratch.reg[i] = rdev->scratch.reg_base + (i * 4); rdev 2822 drivers/gpu/drm/radeon/r600.c int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 2829 drivers/gpu/drm/radeon/r600.c r = radeon_scratch_get(rdev, &scratch); rdev 2835 drivers/gpu/drm/radeon/r600.c r = radeon_ring_lock(rdev, ring, 3); rdev 2838 drivers/gpu/drm/radeon/r600.c radeon_scratch_free(rdev, scratch); rdev 2844 drivers/gpu/drm/radeon/r600.c radeon_ring_unlock_commit(rdev, ring, false); rdev 2845 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2851 drivers/gpu/drm/radeon/r600.c if (i < rdev->usec_timeout) { rdev 2858 drivers/gpu/drm/radeon/r600.c radeon_scratch_free(rdev, scratch); rdev 2866 drivers/gpu/drm/radeon/r600.c void r600_fence_ring_emit(struct radeon_device *rdev, rdev 2869 drivers/gpu/drm/radeon/r600.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 2873 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) rdev 2876 drivers/gpu/drm/radeon/r600.c if (rdev->wb.use_event) { rdev 2877 drivers/gpu/drm/radeon/r600.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 2906 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, ((rdev->fence_drv[fence->ring].scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2)); rdev 2925 drivers/gpu/drm/radeon/r600.c bool r600_semaphore_ring_emit(struct radeon_device *rdev, rdev 2933 drivers/gpu/drm/radeon/r600.c if (rdev->family < CHIP_CAYMAN) rdev 2941 drivers/gpu/drm/radeon/r600.c if (emit_wait && (rdev->family >= CHIP_CEDAR)) { rdev 2963 drivers/gpu/drm/radeon/r600.c struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev, rdev 2970 drivers/gpu/drm/radeon/r600.c int ring_index = rdev->asic->copy.blit_ring_index; rdev 2971 drivers/gpu/drm/radeon/r600.c struct radeon_ring *ring = &rdev->ring[ring_index]; rdev 2980 drivers/gpu/drm/radeon/r600.c r = radeon_ring_lock(rdev, ring, num_loops * 6 + 24); rdev 2983 drivers/gpu/drm/radeon/r600.c radeon_sync_free(rdev, &sync, NULL); rdev 2987 drivers/gpu/drm/radeon/r600.c radeon_sync_resv(rdev, &sync, resv, false); rdev 2988 drivers/gpu/drm/radeon/r600.c radeon_sync_rings(rdev, &sync, ring->idx); rdev 3014 drivers/gpu/drm/radeon/r600.c r = radeon_fence_emit(rdev, &fence, ring->idx); rdev 3016 drivers/gpu/drm/radeon/r600.c radeon_ring_unlock_undo(rdev, ring); rdev 3017 drivers/gpu/drm/radeon/r600.c radeon_sync_free(rdev, &sync, NULL); rdev 3021 drivers/gpu/drm/radeon/r600.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3022 drivers/gpu/drm/radeon/r600.c radeon_sync_free(rdev, &sync, fence); rdev 3027 drivers/gpu/drm/radeon/r600.c int r600_set_surface_reg(struct radeon_device *rdev, int reg, rdev 3035 drivers/gpu/drm/radeon/r600.c void r600_clear_surface_reg(struct radeon_device *rdev, int reg) rdev 3040 drivers/gpu/drm/radeon/r600.c static void r600_uvd_init(struct radeon_device *rdev) rdev 3044 drivers/gpu/drm/radeon/r600.c if (!rdev->has_uvd) rdev 3047 drivers/gpu/drm/radeon/r600.c r = radeon_uvd_init(rdev); rdev 3049 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "failed UVD (%d) init.\n", r); rdev 3056 drivers/gpu/drm/radeon/r600.c rdev->has_uvd = 0; rdev 3059 drivers/gpu/drm/radeon/r600.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_obj = NULL; rdev 3060 drivers/gpu/drm/radeon/r600.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], 4096); rdev 3063 drivers/gpu/drm/radeon/r600.c static void r600_uvd_start(struct radeon_device *rdev) rdev 3067 drivers/gpu/drm/radeon/r600.c if (!rdev->has_uvd) rdev 3070 drivers/gpu/drm/radeon/r600.c r = uvd_v1_0_resume(rdev); rdev 3072 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "failed UVD resume (%d).\n", r); rdev 3075 drivers/gpu/drm/radeon/r600.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_UVD_INDEX); rdev 3077 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "failed initializing UVD fences (%d).\n", r); rdev 3083 drivers/gpu/drm/radeon/r600.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; rdev 3086 drivers/gpu/drm/radeon/r600.c static void r600_uvd_resume(struct radeon_device *rdev) rdev 3091 drivers/gpu/drm/radeon/r600.c if (!rdev->has_uvd || !rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size) rdev 3094 drivers/gpu/drm/radeon/r600.c ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 3095 drivers/gpu/drm/radeon/r600.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, PACKET0(UVD_NO_OP, 0)); rdev 3097 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "failed initializing UVD ring (%d).\n", r); rdev 3100 drivers/gpu/drm/radeon/r600.c r = uvd_v1_0_init(rdev); rdev 3102 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "failed initializing UVD (%d).\n", r); rdev 3107 drivers/gpu/drm/radeon/r600.c static int r600_startup(struct radeon_device *rdev) rdev 3113 drivers/gpu/drm/radeon/r600.c r600_pcie_gen2_enable(rdev); rdev 3116 drivers/gpu/drm/radeon/r600.c r = r600_vram_scratch_init(rdev); rdev 3120 drivers/gpu/drm/radeon/r600.c r600_mc_program(rdev); rdev 3122 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_AGP) { rdev 3123 drivers/gpu/drm/radeon/r600.c r600_agp_enable(rdev); rdev 3125 drivers/gpu/drm/radeon/r600.c r = r600_pcie_gart_enable(rdev); rdev 3129 drivers/gpu/drm/radeon/r600.c r600_gpu_init(rdev); rdev 3132 drivers/gpu/drm/radeon/r600.c r = radeon_wb_init(rdev); rdev 3136 drivers/gpu/drm/radeon/r600.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 3138 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 3142 drivers/gpu/drm/radeon/r600.c r600_uvd_start(rdev); rdev 3145 drivers/gpu/drm/radeon/r600.c if (!rdev->irq.installed) { rdev 3146 drivers/gpu/drm/radeon/r600.c r = radeon_irq_kms_init(rdev); rdev 3151 drivers/gpu/drm/radeon/r600.c r = r600_irq_init(rdev); rdev 3154 drivers/gpu/drm/radeon/r600.c radeon_irq_kms_fini(rdev); rdev 3157 drivers/gpu/drm/radeon/r600.c r600_irq_set(rdev); rdev 3159 drivers/gpu/drm/radeon/r600.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3160 drivers/gpu/drm/radeon/r600.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, rdev 3165 drivers/gpu/drm/radeon/r600.c r = r600_cp_load_microcode(rdev); rdev 3168 drivers/gpu/drm/radeon/r600.c r = r600_cp_resume(rdev); rdev 3172 drivers/gpu/drm/radeon/r600.c r600_uvd_resume(rdev); rdev 3174 drivers/gpu/drm/radeon/r600.c r = radeon_ib_pool_init(rdev); rdev 3176 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 3180 drivers/gpu/drm/radeon/r600.c r = radeon_audio_init(rdev); rdev 3189 drivers/gpu/drm/radeon/r600.c void r600_vga_set_state(struct radeon_device *rdev, bool state) rdev 3203 drivers/gpu/drm/radeon/r600.c int r600_resume(struct radeon_device *rdev) rdev 3212 drivers/gpu/drm/radeon/r600.c atom_asic_init(rdev->mode_info.atom_context); rdev 3214 drivers/gpu/drm/radeon/r600.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 3215 drivers/gpu/drm/radeon/r600.c radeon_pm_resume(rdev); rdev 3217 drivers/gpu/drm/radeon/r600.c rdev->accel_working = true; rdev 3218 drivers/gpu/drm/radeon/r600.c r = r600_startup(rdev); rdev 3221 drivers/gpu/drm/radeon/r600.c rdev->accel_working = false; rdev 3228 drivers/gpu/drm/radeon/r600.c int r600_suspend(struct radeon_device *rdev) rdev 3230 drivers/gpu/drm/radeon/r600.c radeon_pm_suspend(rdev); rdev 3231 drivers/gpu/drm/radeon/r600.c radeon_audio_fini(rdev); rdev 3232 drivers/gpu/drm/radeon/r600.c r600_cp_stop(rdev); rdev 3233 drivers/gpu/drm/radeon/r600.c if (rdev->has_uvd) { rdev 3234 drivers/gpu/drm/radeon/r600.c uvd_v1_0_fini(rdev); rdev 3235 drivers/gpu/drm/radeon/r600.c radeon_uvd_suspend(rdev); rdev 3237 drivers/gpu/drm/radeon/r600.c r600_irq_suspend(rdev); rdev 3238 drivers/gpu/drm/radeon/r600.c radeon_wb_disable(rdev); rdev 3239 drivers/gpu/drm/radeon/r600.c r600_pcie_gart_disable(rdev); rdev 3250 drivers/gpu/drm/radeon/r600.c int r600_init(struct radeon_device *rdev) rdev 3254 drivers/gpu/drm/radeon/r600.c if (r600_debugfs_mc_info_init(rdev)) { rdev 3258 drivers/gpu/drm/radeon/r600.c if (!radeon_get_bios(rdev)) { rdev 3259 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_AVIVO(rdev)) rdev 3263 drivers/gpu/drm/radeon/r600.c if (!rdev->is_atom_bios) { rdev 3264 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "Expecting atombios for R600 GPU\n"); rdev 3267 drivers/gpu/drm/radeon/r600.c r = radeon_atombios_init(rdev); rdev 3271 drivers/gpu/drm/radeon/r600.c if (!radeon_card_posted(rdev)) { rdev 3272 drivers/gpu/drm/radeon/r600.c if (!rdev->bios) { rdev 3273 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); rdev 3277 drivers/gpu/drm/radeon/r600.c atom_asic_init(rdev->mode_info.atom_context); rdev 3280 drivers/gpu/drm/radeon/r600.c r600_scratch_init(rdev); rdev 3282 drivers/gpu/drm/radeon/r600.c radeon_surface_init(rdev); rdev 3284 drivers/gpu/drm/radeon/r600.c radeon_get_clock_info(rdev->ddev); rdev 3286 drivers/gpu/drm/radeon/r600.c r = radeon_fence_driver_init(rdev); rdev 3289 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_AGP) { rdev 3290 drivers/gpu/drm/radeon/r600.c r = radeon_agp_init(rdev); rdev 3292 drivers/gpu/drm/radeon/r600.c radeon_agp_disable(rdev); rdev 3294 drivers/gpu/drm/radeon/r600.c r = r600_mc_init(rdev); rdev 3298 drivers/gpu/drm/radeon/r600.c r = radeon_bo_init(rdev); rdev 3302 drivers/gpu/drm/radeon/r600.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { rdev 3303 drivers/gpu/drm/radeon/r600.c r = r600_init_microcode(rdev); rdev 3311 drivers/gpu/drm/radeon/r600.c radeon_pm_init(rdev); rdev 3313 drivers/gpu/drm/radeon/r600.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; rdev 3314 drivers/gpu/drm/radeon/r600.c r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); rdev 3316 drivers/gpu/drm/radeon/r600.c r600_uvd_init(rdev); rdev 3318 drivers/gpu/drm/radeon/r600.c rdev->ih.ring_obj = NULL; rdev 3319 drivers/gpu/drm/radeon/r600.c r600_ih_ring_init(rdev, 64 * 1024); rdev 3321 drivers/gpu/drm/radeon/r600.c r = r600_pcie_gart_init(rdev); rdev 3325 drivers/gpu/drm/radeon/r600.c rdev->accel_working = true; rdev 3326 drivers/gpu/drm/radeon/r600.c r = r600_startup(rdev); rdev 3328 drivers/gpu/drm/radeon/r600.c dev_err(rdev->dev, "disabling GPU acceleration\n"); rdev 3329 drivers/gpu/drm/radeon/r600.c r600_cp_fini(rdev); rdev 3330 drivers/gpu/drm/radeon/r600.c r600_irq_fini(rdev); rdev 3331 drivers/gpu/drm/radeon/r600.c radeon_wb_fini(rdev); rdev 3332 drivers/gpu/drm/radeon/r600.c radeon_ib_pool_fini(rdev); rdev 3333 drivers/gpu/drm/radeon/r600.c radeon_irq_kms_fini(rdev); rdev 3334 drivers/gpu/drm/radeon/r600.c r600_pcie_gart_fini(rdev); rdev 3335 drivers/gpu/drm/radeon/r600.c rdev->accel_working = false; rdev 3341 drivers/gpu/drm/radeon/r600.c void r600_fini(struct radeon_device *rdev) rdev 3343 drivers/gpu/drm/radeon/r600.c radeon_pm_fini(rdev); rdev 3344 drivers/gpu/drm/radeon/r600.c radeon_audio_fini(rdev); rdev 3345 drivers/gpu/drm/radeon/r600.c r600_cp_fini(rdev); rdev 3346 drivers/gpu/drm/radeon/r600.c r600_irq_fini(rdev); rdev 3347 drivers/gpu/drm/radeon/r600.c if (rdev->has_uvd) { rdev 3348 drivers/gpu/drm/radeon/r600.c uvd_v1_0_fini(rdev); rdev 3349 drivers/gpu/drm/radeon/r600.c radeon_uvd_fini(rdev); rdev 3351 drivers/gpu/drm/radeon/r600.c radeon_wb_fini(rdev); rdev 3352 drivers/gpu/drm/radeon/r600.c radeon_ib_pool_fini(rdev); rdev 3353 drivers/gpu/drm/radeon/r600.c radeon_irq_kms_fini(rdev); rdev 3354 drivers/gpu/drm/radeon/r600.c r600_pcie_gart_fini(rdev); rdev 3355 drivers/gpu/drm/radeon/r600.c r600_vram_scratch_fini(rdev); rdev 3356 drivers/gpu/drm/radeon/r600.c radeon_agp_fini(rdev); rdev 3357 drivers/gpu/drm/radeon/r600.c radeon_gem_fini(rdev); rdev 3358 drivers/gpu/drm/radeon/r600.c radeon_fence_driver_fini(rdev); rdev 3359 drivers/gpu/drm/radeon/r600.c radeon_bo_fini(rdev); rdev 3360 drivers/gpu/drm/radeon/r600.c radeon_atombios_fini(rdev); rdev 3361 drivers/gpu/drm/radeon/r600.c kfree(rdev->bios); rdev 3362 drivers/gpu/drm/radeon/r600.c rdev->bios = NULL; rdev 3369 drivers/gpu/drm/radeon/r600.c void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 3371 drivers/gpu/drm/radeon/r600.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 3380 drivers/gpu/drm/radeon/r600.c } else if (rdev->wb.enabled) { rdev 3399 drivers/gpu/drm/radeon/r600.c int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 3407 drivers/gpu/drm/radeon/r600.c r = radeon_scratch_get(rdev, &scratch); rdev 3413 drivers/gpu/drm/radeon/r600.c r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); rdev 3422 drivers/gpu/drm/radeon/r600.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 3438 drivers/gpu/drm/radeon/r600.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 3444 drivers/gpu/drm/radeon/r600.c if (i < rdev->usec_timeout) { rdev 3452 drivers/gpu/drm/radeon/r600.c radeon_ib_free(rdev, &ib); rdev 3454 drivers/gpu/drm/radeon/r600.c radeon_scratch_free(rdev, scratch); rdev 3469 drivers/gpu/drm/radeon/r600.c void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size) rdev 3476 drivers/gpu/drm/radeon/r600.c rdev->ih.ring_size = ring_size; rdev 3477 drivers/gpu/drm/radeon/r600.c rdev->ih.ptr_mask = rdev->ih.ring_size - 1; rdev 3478 drivers/gpu/drm/radeon/r600.c rdev->ih.rptr = 0; rdev 3481 drivers/gpu/drm/radeon/r600.c int r600_ih_ring_alloc(struct radeon_device *rdev) rdev 3486 drivers/gpu/drm/radeon/r600.c if (rdev->ih.ring_obj == NULL) { rdev 3487 drivers/gpu/drm/radeon/r600.c r = radeon_bo_create(rdev, rdev->ih.ring_size, rdev 3490 drivers/gpu/drm/radeon/r600.c NULL, NULL, &rdev->ih.ring_obj); rdev 3495 drivers/gpu/drm/radeon/r600.c r = radeon_bo_reserve(rdev->ih.ring_obj, false); rdev 3498 drivers/gpu/drm/radeon/r600.c r = radeon_bo_pin(rdev->ih.ring_obj, rdev 3500 drivers/gpu/drm/radeon/r600.c &rdev->ih.gpu_addr); rdev 3502 drivers/gpu/drm/radeon/r600.c radeon_bo_unreserve(rdev->ih.ring_obj); rdev 3506 drivers/gpu/drm/radeon/r600.c r = radeon_bo_kmap(rdev->ih.ring_obj, rdev 3507 drivers/gpu/drm/radeon/r600.c (void **)&rdev->ih.ring); rdev 3508 drivers/gpu/drm/radeon/r600.c radeon_bo_unreserve(rdev->ih.ring_obj); rdev 3517 drivers/gpu/drm/radeon/r600.c void r600_ih_ring_fini(struct radeon_device *rdev) rdev 3520 drivers/gpu/drm/radeon/r600.c if (rdev->ih.ring_obj) { rdev 3521 drivers/gpu/drm/radeon/r600.c r = radeon_bo_reserve(rdev->ih.ring_obj, false); rdev 3523 drivers/gpu/drm/radeon/r600.c radeon_bo_kunmap(rdev->ih.ring_obj); rdev 3524 drivers/gpu/drm/radeon/r600.c radeon_bo_unpin(rdev->ih.ring_obj); rdev 3525 drivers/gpu/drm/radeon/r600.c radeon_bo_unreserve(rdev->ih.ring_obj); rdev 3527 drivers/gpu/drm/radeon/r600.c radeon_bo_unref(&rdev->ih.ring_obj); rdev 3528 drivers/gpu/drm/radeon/r600.c rdev->ih.ring = NULL; rdev 3529 drivers/gpu/drm/radeon/r600.c rdev->ih.ring_obj = NULL; rdev 3533 drivers/gpu/drm/radeon/r600.c void r600_rlc_stop(struct radeon_device *rdev) rdev 3536 drivers/gpu/drm/radeon/r600.c if ((rdev->family >= CHIP_RV770) && rdev 3537 drivers/gpu/drm/radeon/r600.c (rdev->family <= CHIP_RV740)) { rdev 3549 drivers/gpu/drm/radeon/r600.c static void r600_rlc_start(struct radeon_device *rdev) rdev 3554 drivers/gpu/drm/radeon/r600.c static int r600_rlc_resume(struct radeon_device *rdev) rdev 3559 drivers/gpu/drm/radeon/r600.c if (!rdev->rlc_fw) rdev 3562 drivers/gpu/drm/radeon/r600.c r600_rlc_stop(rdev); rdev 3574 drivers/gpu/drm/radeon/r600.c fw_data = (const __be32 *)rdev->rlc_fw->data; rdev 3575 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_RV770) { rdev 3588 drivers/gpu/drm/radeon/r600.c r600_rlc_start(rdev); rdev 3593 drivers/gpu/drm/radeon/r600.c static void r600_enable_interrupts(struct radeon_device *rdev) rdev 3602 drivers/gpu/drm/radeon/r600.c rdev->ih.enabled = true; rdev 3605 drivers/gpu/drm/radeon/r600.c void r600_disable_interrupts(struct radeon_device *rdev) rdev 3617 drivers/gpu/drm/radeon/r600.c rdev->ih.enabled = false; rdev 3618 drivers/gpu/drm/radeon/r600.c rdev->ih.rptr = 0; rdev 3621 drivers/gpu/drm/radeon/r600.c static void r600_disable_interrupt_state(struct radeon_device *rdev) rdev 3632 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 3643 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE32(rdev)) { rdev 3674 drivers/gpu/drm/radeon/r600.c int r600_irq_init(struct radeon_device *rdev) rdev 3681 drivers/gpu/drm/radeon/r600.c ret = r600_ih_ring_alloc(rdev); rdev 3686 drivers/gpu/drm/radeon/r600.c r600_disable_interrupts(rdev); rdev 3689 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_CEDAR) rdev 3690 drivers/gpu/drm/radeon/r600.c ret = evergreen_rlc_resume(rdev); rdev 3692 drivers/gpu/drm/radeon/r600.c ret = r600_rlc_resume(rdev); rdev 3694 drivers/gpu/drm/radeon/r600.c r600_ih_ring_fini(rdev); rdev 3700 drivers/gpu/drm/radeon/r600.c WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); rdev 3710 drivers/gpu/drm/radeon/r600.c WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8); rdev 3711 drivers/gpu/drm/radeon/r600.c rb_bufsz = order_base_2(rdev->ih.ring_size / 4); rdev 3717 drivers/gpu/drm/radeon/r600.c if (rdev->wb.enabled) rdev 3721 drivers/gpu/drm/radeon/r600.c WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC); rdev 3722 drivers/gpu/drm/radeon/r600.c WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF); rdev 3733 drivers/gpu/drm/radeon/r600.c if (rdev->msi_enabled) rdev 3738 drivers/gpu/drm/radeon/r600.c if (rdev->family >= CHIP_CEDAR) rdev 3739 drivers/gpu/drm/radeon/r600.c evergreen_disable_interrupt_state(rdev); rdev 3741 drivers/gpu/drm/radeon/r600.c r600_disable_interrupt_state(rdev); rdev 3744 drivers/gpu/drm/radeon/r600.c pci_set_master(rdev->pdev); rdev 3747 drivers/gpu/drm/radeon/r600.c r600_enable_interrupts(rdev); rdev 3752 drivers/gpu/drm/radeon/r600.c void r600_irq_suspend(struct radeon_device *rdev) rdev 3754 drivers/gpu/drm/radeon/r600.c r600_irq_disable(rdev); rdev 3755 drivers/gpu/drm/radeon/r600.c r600_rlc_stop(rdev); rdev 3758 drivers/gpu/drm/radeon/r600.c void r600_irq_fini(struct radeon_device *rdev) rdev 3760 drivers/gpu/drm/radeon/r600.c r600_irq_suspend(rdev); rdev 3761 drivers/gpu/drm/radeon/r600.c r600_ih_ring_fini(rdev); rdev 3764 drivers/gpu/drm/radeon/r600.c int r600_irq_set(struct radeon_device *rdev) rdev 3774 drivers/gpu/drm/radeon/r600.c if (!rdev->irq.installed) { rdev 3779 drivers/gpu/drm/radeon/r600.c if (!rdev->ih.enabled) { rdev 3780 drivers/gpu/drm/radeon/r600.c r600_disable_interrupts(rdev); rdev 3782 drivers/gpu/drm/radeon/r600.c r600_disable_interrupt_state(rdev); rdev 3786 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 3791 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE32(rdev)) { rdev 3810 drivers/gpu/drm/radeon/r600.c if ((rdev->family > CHIP_R600) && (rdev->family < CHIP_RV770)) { rdev 3813 drivers/gpu/drm/radeon/r600.c } else if (rdev->family >= CHIP_RV770) { rdev 3817 drivers/gpu/drm/radeon/r600.c if (rdev->irq.dpm_thermal) { rdev 3822 drivers/gpu/drm/radeon/r600.c if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { rdev 3828 drivers/gpu/drm/radeon/r600.c if (atomic_read(&rdev->irq.ring_int[R600_RING_TYPE_DMA_INDEX])) { rdev 3833 drivers/gpu/drm/radeon/r600.c if (rdev->irq.crtc_vblank_int[0] || rdev 3834 drivers/gpu/drm/radeon/r600.c atomic_read(&rdev->irq.pflip[0])) { rdev 3838 drivers/gpu/drm/radeon/r600.c if (rdev->irq.crtc_vblank_int[1] || rdev 3839 drivers/gpu/drm/radeon/r600.c atomic_read(&rdev->irq.pflip[1])) { rdev 3843 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[0]) { rdev 3847 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[1]) { rdev 3851 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[2]) { rdev 3855 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[3]) { rdev 3859 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[4]) { rdev 3863 drivers/gpu/drm/radeon/r600.c if (rdev->irq.hpd[5]) { rdev 3867 drivers/gpu/drm/radeon/r600.c if (rdev->irq.afmt[0]) { rdev 3871 drivers/gpu/drm/radeon/r600.c if (rdev->irq.afmt[1]) { rdev 3882 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 3887 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE32(rdev)) { rdev 3903 drivers/gpu/drm/radeon/r600.c if ((rdev->family > CHIP_R600) && (rdev->family < CHIP_RV770)) { rdev 3905 drivers/gpu/drm/radeon/r600.c } else if (rdev->family >= CHIP_RV770) { rdev 3915 drivers/gpu/drm/radeon/r600.c static void r600_irq_ack(struct radeon_device *rdev) rdev 3919 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 3920 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); rdev 3921 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE); rdev 3922 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE2); rdev 3923 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE32(rdev)) { rdev 3924 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET0); rdev 3925 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET1); rdev 3927 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS); rdev 3928 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status = RREG32(DCE3_HDMI1_STATUS); rdev 3931 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); rdev 3932 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE); rdev 3933 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 = 0; rdev 3934 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS); rdev 3935 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status = RREG32(HDMI1_STATUS); rdev 3937 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.d1grph_int = RREG32(D1GRPH_INTERRUPT_STATUS); rdev 3938 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.d2grph_int = RREG32(D2GRPH_INTERRUPT_STATUS); rdev 3940 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.d1grph_int & DxGRPH_PFLIP_INT_OCCURRED) rdev 3942 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.d2grph_int & DxGRPH_PFLIP_INT_OCCURRED) rdev 3944 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) rdev 3946 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) rdev 3948 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) rdev 3950 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) rdev 3952 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { rdev 3953 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 3963 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { rdev 3964 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 3974 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD3_INTERRUPT) { rdev 3975 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 3985 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD4_INTERRUPT) { rdev 3990 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE32(rdev)) { rdev 3991 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD5_INTERRUPT) { rdev 3996 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD6_INTERRUPT) { rdev 4001 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi0_status & AFMT_AZ_FORMAT_WTRIG) { rdev 4006 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi1_status & AFMT_AZ_FORMAT_WTRIG) { rdev 4012 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi0_status & HDMI0_AZ_FORMAT_WTRIG) { rdev 4017 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi1_status & HDMI0_AZ_FORMAT_WTRIG) { rdev 4018 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_DCE3(rdev)) { rdev 4031 drivers/gpu/drm/radeon/r600.c void r600_irq_disable(struct radeon_device *rdev) rdev 4033 drivers/gpu/drm/radeon/r600.c r600_disable_interrupts(rdev); rdev 4036 drivers/gpu/drm/radeon/r600.c r600_irq_ack(rdev); rdev 4037 drivers/gpu/drm/radeon/r600.c r600_disable_interrupt_state(rdev); rdev 4040 drivers/gpu/drm/radeon/r600.c static u32 r600_get_ih_wptr(struct radeon_device *rdev) rdev 4044 drivers/gpu/drm/radeon/r600.c if (rdev->wb.enabled) rdev 4045 drivers/gpu/drm/radeon/r600.c wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]); rdev 4055 drivers/gpu/drm/radeon/r600.c dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", rdev 4056 drivers/gpu/drm/radeon/r600.c wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask); rdev 4057 drivers/gpu/drm/radeon/r600.c rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask; rdev 4062 drivers/gpu/drm/radeon/r600.c return (wptr & rdev->ih.ptr_mask); rdev 4095 drivers/gpu/drm/radeon/r600.c int r600_irq_process(struct radeon_device *rdev) rdev 4105 drivers/gpu/drm/radeon/r600.c if (!rdev->ih.enabled || rdev->shutdown) rdev 4109 drivers/gpu/drm/radeon/r600.c if (!rdev->msi_enabled) rdev 4112 drivers/gpu/drm/radeon/r600.c wptr = r600_get_ih_wptr(rdev); rdev 4116 drivers/gpu/drm/radeon/r600.c if (atomic_xchg(&rdev->ih.lock, 1)) rdev 4119 drivers/gpu/drm/radeon/r600.c rptr = rdev->ih.rptr; rdev 4126 drivers/gpu/drm/radeon/r600.c r600_irq_ack(rdev); rdev 4131 drivers/gpu/drm/radeon/r600.c src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff; rdev 4132 drivers/gpu/drm/radeon/r600.c src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff; rdev 4138 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT)) rdev 4141 drivers/gpu/drm/radeon/r600.c if (rdev->irq.crtc_vblank_int[0]) { rdev 4142 drivers/gpu/drm/radeon/r600.c drm_handle_vblank(rdev->ddev, 0); rdev 4143 drivers/gpu/drm/radeon/r600.c rdev->pm.vblank_sync = true; rdev 4144 drivers/gpu/drm/radeon/r600.c wake_up(&rdev->irq.vblank_queue); rdev 4146 drivers/gpu/drm/radeon/r600.c if (atomic_read(&rdev->irq.pflip[0])) rdev 4147 drivers/gpu/drm/radeon/r600.c radeon_crtc_handle_vblank(rdev, 0); rdev 4148 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT; rdev 4153 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT)) rdev 4156 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VLINE_INTERRUPT; rdev 4168 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT)) rdev 4171 drivers/gpu/drm/radeon/r600.c if (rdev->irq.crtc_vblank_int[1]) { rdev 4172 drivers/gpu/drm/radeon/r600.c drm_handle_vblank(rdev->ddev, 1); rdev 4173 drivers/gpu/drm/radeon/r600.c rdev->pm.vblank_sync = true; rdev 4174 drivers/gpu/drm/radeon/r600.c wake_up(&rdev->irq.vblank_queue); rdev 4176 drivers/gpu/drm/radeon/r600.c if (atomic_read(&rdev->irq.pflip[1])) rdev 4177 drivers/gpu/drm/radeon/r600.c radeon_crtc_handle_vblank(rdev, 1); rdev 4178 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT; rdev 4183 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT)) rdev 4186 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VLINE_INTERRUPT; rdev 4198 drivers/gpu/drm/radeon/r600.c radeon_crtc_handle_flip(rdev, 0); rdev 4203 drivers/gpu/drm/radeon/r600.c radeon_crtc_handle_flip(rdev, 1); rdev 4208 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT)) rdev 4211 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~DC_HPD1_INTERRUPT; rdev 4216 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT)) rdev 4219 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~DC_HPD2_INTERRUPT; rdev 4224 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD3_INTERRUPT)) rdev 4227 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont &= ~DC_HPD3_INTERRUPT; rdev 4232 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD4_INTERRUPT)) rdev 4235 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont &= ~DC_HPD4_INTERRUPT; rdev 4240 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD5_INTERRUPT)) rdev 4243 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 &= ~DC_HPD5_INTERRUPT; rdev 4248 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD6_INTERRUPT)) rdev 4251 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 &= ~DC_HPD6_INTERRUPT; rdev 4264 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.hdmi0_status & HDMI0_AZ_FORMAT_WTRIG)) rdev 4267 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status &= ~HDMI0_AZ_FORMAT_WTRIG; rdev 4273 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.hdmi1_status & HDMI0_AZ_FORMAT_WTRIG)) rdev 4276 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status &= ~HDMI0_AZ_FORMAT_WTRIG; rdev 4288 drivers/gpu/drm/radeon/r600.c radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); rdev 4294 drivers/gpu/drm/radeon/r600.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 4298 drivers/gpu/drm/radeon/r600.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 4302 drivers/gpu/drm/radeon/r600.c radeon_fence_process(rdev, R600_RING_TYPE_DMA_INDEX); rdev 4306 drivers/gpu/drm/radeon/r600.c rdev->pm.dpm.thermal.high_to_low = false; rdev 4311 drivers/gpu/drm/radeon/r600.c rdev->pm.dpm.thermal.high_to_low = true; rdev 4324 drivers/gpu/drm/radeon/r600.c rptr &= rdev->ih.ptr_mask; rdev 4328 drivers/gpu/drm/radeon/r600.c schedule_delayed_work(&rdev->hotplug_work, 0); rdev 4330 drivers/gpu/drm/radeon/r600.c schedule_work(&rdev->audio_work); rdev 4331 drivers/gpu/drm/radeon/r600.c if (queue_thermal && rdev->pm.dpm_enabled) rdev 4332 drivers/gpu/drm/radeon/r600.c schedule_work(&rdev->pm.dpm.thermal.work); rdev 4333 drivers/gpu/drm/radeon/r600.c rdev->ih.rptr = rptr; rdev 4334 drivers/gpu/drm/radeon/r600.c atomic_set(&rdev->ih.lock, 0); rdev 4337 drivers/gpu/drm/radeon/r600.c wptr = r600_get_ih_wptr(rdev); rdev 4353 drivers/gpu/drm/radeon/r600.c struct radeon_device *rdev = dev->dev_private; rdev 4355 drivers/gpu/drm/radeon/r600.c DREG32_SYS(m, rdev, R_000E50_SRBM_STATUS); rdev 4356 drivers/gpu/drm/radeon/r600.c DREG32_SYS(m, rdev, VM_L2_STATUS); rdev 4365 drivers/gpu/drm/radeon/r600.c int r600_debugfs_mc_info_init(struct radeon_device *rdev) rdev 4368 drivers/gpu/drm/radeon/r600.c return radeon_debugfs_add_files(rdev, r600_mc_info_list, ARRAY_SIZE(r600_mc_info_list)); rdev 4383 drivers/gpu/drm/radeon/r600.c void r600_mmio_hdp_flush(struct radeon_device *rdev) rdev 4390 drivers/gpu/drm/radeon/r600.c if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) && rdev 4391 drivers/gpu/drm/radeon/r600.c rdev->vram_scratch.ptr && !(rdev->flags & RADEON_IS_AGP)) { rdev 4392 drivers/gpu/drm/radeon/r600.c void __iomem *ptr = (void *)rdev->vram_scratch.ptr; rdev 4401 drivers/gpu/drm/radeon/r600.c void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes) rdev 4405 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_IGP) rdev 4408 drivers/gpu/drm/radeon/r600.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 4412 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_X2(rdev)) rdev 4415 drivers/gpu/drm/radeon/r600.c radeon_gui_idle(rdev); rdev 4454 drivers/gpu/drm/radeon/r600.c int r600_get_pcie_lanes(struct radeon_device *rdev) rdev 4458 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_IGP) rdev 4461 drivers/gpu/drm/radeon/r600.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 4465 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_X2(rdev)) rdev 4468 drivers/gpu/drm/radeon/r600.c radeon_gui_idle(rdev); rdev 4491 drivers/gpu/drm/radeon/r600.c static void r600_pcie_gen2_enable(struct radeon_device *rdev) rdev 4499 drivers/gpu/drm/radeon/r600.c if (rdev->flags & RADEON_IS_IGP) rdev 4502 drivers/gpu/drm/radeon/r600.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 4506 drivers/gpu/drm/radeon/r600.c if (ASIC_IS_X2(rdev)) rdev 4510 drivers/gpu/drm/radeon/r600.c if (rdev->family <= CHIP_R600) rdev 4513 drivers/gpu/drm/radeon/r600.c if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) && rdev 4514 drivers/gpu/drm/radeon/r600.c (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT)) rdev 4526 drivers/gpu/drm/radeon/r600.c if ((rdev->family == CHIP_RV670) || rdev 4527 drivers/gpu/drm/radeon/r600.c (rdev->family == CHIP_RV620) || rdev 4528 drivers/gpu/drm/radeon/r600.c (rdev->family == CHIP_RV635)) { rdev 4551 drivers/gpu/drm/radeon/r600.c if ((rdev->family == CHIP_RV670) || rdev 4552 drivers/gpu/drm/radeon/r600.c (rdev->family == CHIP_RV620) || rdev 4553 drivers/gpu/drm/radeon/r600.c (rdev->family == CHIP_RV635)) { rdev 4578 drivers/gpu/drm/radeon/r600.c if ((rdev->family == CHIP_RV670) || rdev 4579 drivers/gpu/drm/radeon/r600.c (rdev->family == CHIP_RV620) || rdev 4580 drivers/gpu/drm/radeon/r600.c (rdev->family == CHIP_RV635)) { rdev 4613 drivers/gpu/drm/radeon/r600.c uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev) rdev 4617 drivers/gpu/drm/radeon/r600.c mutex_lock(&rdev->gpu_clock_mutex); rdev 4621 drivers/gpu/drm/radeon/r600.c mutex_unlock(&rdev->gpu_clock_mutex); rdev 713 drivers/gpu/drm/radeon/r600_cs.c if (p->rdev == NULL) rdev 890 drivers/gpu/drm/radeon/r600_cs.c crtc = drm_crtc_find(p->rdev->ddev, p->filp, crtc_id); rdev 1487 drivers/gpu/drm/radeon/r600_cs.c if (p->rdev == NULL) rdev 2002 drivers/gpu/drm/radeon/r600_cs.c if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { rdev 2280 drivers/gpu/drm/radeon/r600_cs.c if (p->rdev->family < CHIP_RV770) { rdev 2281 drivers/gpu/drm/radeon/r600_cs.c track->npipes = p->rdev->config.r600.tiling_npipes; rdev 2282 drivers/gpu/drm/radeon/r600_cs.c track->nbanks = p->rdev->config.r600.tiling_nbanks; rdev 2283 drivers/gpu/drm/radeon/r600_cs.c track->group_size = p->rdev->config.r600.tiling_group_size; rdev 2284 drivers/gpu/drm/radeon/r600_cs.c } else if (p->rdev->family <= CHIP_RV740) { rdev 2285 drivers/gpu/drm/radeon/r600_cs.c track->npipes = p->rdev->config.rv770.tiling_npipes; rdev 2286 drivers/gpu/drm/radeon/r600_cs.c track->nbanks = p->rdev->config.rv770.tiling_nbanks; rdev 2287 drivers/gpu/drm/radeon/r600_cs.c track->group_size = p->rdev->config.rv770.tiling_group_size; rdev 29 drivers/gpu/drm/radeon/r600_dma.c u32 r600_gpu_check_soft_reset(struct radeon_device *rdev); rdev 51 drivers/gpu/drm/radeon/r600_dma.c uint32_t r600_dma_get_rptr(struct radeon_device *rdev, rdev 56 drivers/gpu/drm/radeon/r600_dma.c if (rdev->wb.enabled) rdev 57 drivers/gpu/drm/radeon/r600_dma.c rptr = rdev->wb.wb[ring->rptr_offs/4]; rdev 72 drivers/gpu/drm/radeon/r600_dma.c uint32_t r600_dma_get_wptr(struct radeon_device *rdev, rdev 86 drivers/gpu/drm/radeon/r600_dma.c void r600_dma_set_wptr(struct radeon_device *rdev, rdev 99 drivers/gpu/drm/radeon/r600_dma.c void r600_dma_stop(struct radeon_device *rdev) rdev 103 drivers/gpu/drm/radeon/r600_dma.c if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) rdev 104 drivers/gpu/drm/radeon/r600_dma.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 109 drivers/gpu/drm/radeon/r600_dma.c rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; rdev 120 drivers/gpu/drm/radeon/r600_dma.c int r600_dma_resume(struct radeon_device *rdev) rdev 122 drivers/gpu/drm/radeon/r600_dma.c struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 144 drivers/gpu/drm/radeon/r600_dma.c upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); rdev 146 drivers/gpu/drm/radeon/r600_dma.c ((rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFFFFFFFC)); rdev 148 drivers/gpu/drm/radeon/r600_dma.c if (rdev->wb.enabled) rdev 164 drivers/gpu/drm/radeon/r600_dma.c if (rdev->family >= CHIP_RV770) rdev 174 drivers/gpu/drm/radeon/r600_dma.c r = radeon_ring_test(rdev, R600_RING_TYPE_DMA_INDEX, ring); rdev 180 drivers/gpu/drm/radeon/r600_dma.c if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) rdev 181 drivers/gpu/drm/radeon/r600_dma.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 193 drivers/gpu/drm/radeon/r600_dma.c void r600_dma_fini(struct radeon_device *rdev) rdev 195 drivers/gpu/drm/radeon/r600_dma.c r600_dma_stop(rdev); rdev 196 drivers/gpu/drm/radeon/r600_dma.c radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX]); rdev 208 drivers/gpu/drm/radeon/r600_dma.c bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 210 drivers/gpu/drm/radeon/r600_dma.c u32 reset_mask = r600_gpu_check_soft_reset(rdev); rdev 213 drivers/gpu/drm/radeon/r600_dma.c radeon_ring_lockup_update(rdev, ring); rdev 216 drivers/gpu/drm/radeon/r600_dma.c return radeon_ring_test_lockup(rdev, ring); rdev 230 drivers/gpu/drm/radeon/r600_dma.c int r600_dma_ring_test(struct radeon_device *rdev, rdev 244 drivers/gpu/drm/radeon/r600_dma.c gpu_addr = rdev->wb.gpu_addr + index; rdev 247 drivers/gpu/drm/radeon/r600_dma.c rdev->wb.wb[index/4] = cpu_to_le32(tmp); rdev 249 drivers/gpu/drm/radeon/r600_dma.c r = radeon_ring_lock(rdev, ring, 4); rdev 258 drivers/gpu/drm/radeon/r600_dma.c radeon_ring_unlock_commit(rdev, ring, false); rdev 260 drivers/gpu/drm/radeon/r600_dma.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 261 drivers/gpu/drm/radeon/r600_dma.c tmp = le32_to_cpu(rdev->wb.wb[index/4]); rdev 267 drivers/gpu/drm/radeon/r600_dma.c if (i < rdev->usec_timeout) { rdev 287 drivers/gpu/drm/radeon/r600_dma.c void r600_dma_fence_ring_emit(struct radeon_device *rdev, rdev 290 drivers/gpu/drm/radeon/r600_dma.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 291 drivers/gpu/drm/radeon/r600_dma.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 313 drivers/gpu/drm/radeon/r600_dma.c bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, rdev 337 drivers/gpu/drm/radeon/r600_dma.c int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 351 drivers/gpu/drm/radeon/r600_dma.c gpu_addr = rdev->wb.gpu_addr + index; rdev 353 drivers/gpu/drm/radeon/r600_dma.c r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); rdev 365 drivers/gpu/drm/radeon/r600_dma.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 367 drivers/gpu/drm/radeon/r600_dma.c radeon_ib_free(rdev, &ib); rdev 381 drivers/gpu/drm/radeon/r600_dma.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 382 drivers/gpu/drm/radeon/r600_dma.c tmp = le32_to_cpu(rdev->wb.wb[index/4]); rdev 387 drivers/gpu/drm/radeon/r600_dma.c if (i < rdev->usec_timeout) { rdev 393 drivers/gpu/drm/radeon/r600_dma.c radeon_ib_free(rdev, &ib); rdev 405 drivers/gpu/drm/radeon/r600_dma.c void r600_dma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 407 drivers/gpu/drm/radeon/r600_dma.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 409 drivers/gpu/drm/radeon/r600_dma.c if (rdev->wb.enabled) { rdev 444 drivers/gpu/drm/radeon/r600_dma.c struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, rdev 451 drivers/gpu/drm/radeon/r600_dma.c int ring_index = rdev->asic->copy.dma_ring_index; rdev 452 drivers/gpu/drm/radeon/r600_dma.c struct radeon_ring *ring = &rdev->ring[ring_index]; rdev 461 drivers/gpu/drm/radeon/r600_dma.c r = radeon_ring_lock(rdev, ring, num_loops * 4 + 8); rdev 464 drivers/gpu/drm/radeon/r600_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 468 drivers/gpu/drm/radeon/r600_dma.c radeon_sync_resv(rdev, &sync, resv, false); rdev 469 drivers/gpu/drm/radeon/r600_dma.c radeon_sync_rings(rdev, &sync, ring->idx); rdev 485 drivers/gpu/drm/radeon/r600_dma.c r = radeon_fence_emit(rdev, &fence, ring->idx); rdev 487 drivers/gpu/drm/radeon/r600_dma.c radeon_ring_unlock_undo(rdev, ring); rdev 488 drivers/gpu/drm/radeon/r600_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 492 drivers/gpu/drm/radeon/r600_dma.c radeon_ring_unlock_commit(rdev, ring, false); rdev 493 drivers/gpu/drm/radeon/r600_dma.c radeon_sync_free(rdev, &sync, fence); rdev 143 drivers/gpu/drm/radeon/r600_dpm.c void r600_dpm_print_ps_status(struct radeon_device *rdev, rdev 147 drivers/gpu/drm/radeon/r600_dpm.c if (rps == rdev->pm.dpm.current_ps) rdev 149 drivers/gpu/drm/radeon/r600_dpm.c if (rps == rdev->pm.dpm.requested_ps) rdev 151 drivers/gpu/drm/radeon/r600_dpm.c if (rps == rdev->pm.dpm.boot_ps) rdev 156 drivers/gpu/drm/radeon/r600_dpm.c u32 r600_dpm_get_vblank_time(struct radeon_device *rdev) rdev 158 drivers/gpu/drm/radeon/r600_dpm.c struct drm_device *dev = rdev->ddev; rdev 164 drivers/gpu/drm/radeon/r600_dpm.c if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { rdev 183 drivers/gpu/drm/radeon/r600_dpm.c u32 r600_dpm_get_vrefresh(struct radeon_device *rdev) rdev 185 drivers/gpu/drm/radeon/r600_dpm.c struct drm_device *dev = rdev->ddev; rdev 190 drivers/gpu/drm/radeon/r600_dpm.c if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { rdev 242 drivers/gpu/drm/radeon/r600_dpm.c void r600_gfx_clockgating_enable(struct radeon_device *rdev, bool enable) rdev 253 drivers/gpu/drm/radeon/r600_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 266 drivers/gpu/drm/radeon/r600_dpm.c void r600_dynamicpm_enable(struct radeon_device *rdev, bool enable) rdev 274 drivers/gpu/drm/radeon/r600_dpm.c void r600_enable_thermal_protection(struct radeon_device *rdev, bool enable) rdev 282 drivers/gpu/drm/radeon/r600_dpm.c void r600_enable_acpi_pm(struct radeon_device *rdev) rdev 287 drivers/gpu/drm/radeon/r600_dpm.c void r600_enable_dynamic_pcie_gen2(struct radeon_device *rdev, bool enable) rdev 295 drivers/gpu/drm/radeon/r600_dpm.c bool r600_dynamicpm_enabled(struct radeon_device *rdev) rdev 303 drivers/gpu/drm/radeon/r600_dpm.c void r600_enable_sclk_control(struct radeon_device *rdev, bool enable) rdev 311 drivers/gpu/drm/radeon/r600_dpm.c void r600_enable_mclk_control(struct radeon_device *rdev, bool enable) rdev 319 drivers/gpu/drm/radeon/r600_dpm.c void r600_enable_spll_bypass(struct radeon_device *rdev, bool enable) rdev 327 drivers/gpu/drm/radeon/r600_dpm.c void r600_wait_for_spll_change(struct radeon_device *rdev) rdev 331 drivers/gpu/drm/radeon/r600_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 338 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_bsp(struct radeon_device *rdev, u32 u, u32 p) rdev 343 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_at(struct radeon_device *rdev, rdev 351 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_tc(struct radeon_device *rdev, rdev 357 drivers/gpu/drm/radeon/r600_dpm.c void r600_select_td(struct radeon_device *rdev, rdev 370 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_vrc(struct radeon_device *rdev, u32 vrv) rdev 375 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_tpu(struct radeon_device *rdev, u32 u) rdev 380 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_tpc(struct radeon_device *rdev, u32 c) rdev 385 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_sstu(struct radeon_device *rdev, u32 u) rdev 390 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_sst(struct radeon_device *rdev, u32 t) rdev 395 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_git(struct radeon_device *rdev, u32 t) rdev 400 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_fctu(struct radeon_device *rdev, u32 u) rdev 405 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_fct(struct radeon_device *rdev, u32 t) rdev 410 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_ctxcgtt3d_rphc(struct radeon_device *rdev, u32 p) rdev 415 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_ctxcgtt3d_rsdc(struct radeon_device *rdev, u32 s) rdev 420 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_vddc3d_oorsu(struct radeon_device *rdev, u32 u) rdev 425 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_vddc3d_oorphc(struct radeon_device *rdev, u32 p) rdev 430 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_vddc3d_oorsdc(struct radeon_device *rdev, u32 s) rdev 435 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_mpll_lock_time(struct radeon_device *rdev, u32 lock_time) rdev 440 drivers/gpu/drm/radeon/r600_dpm.c void r600_set_mpll_reset_time(struct radeon_device *rdev, u32 reset_time) rdev 445 drivers/gpu/drm/radeon/r600_dpm.c void r600_engine_clock_entry_enable(struct radeon_device *rdev, rdev 456 drivers/gpu/drm/radeon/r600_dpm.c void r600_engine_clock_entry_enable_pulse_skipping(struct radeon_device *rdev, rdev 467 drivers/gpu/drm/radeon/r600_dpm.c void r600_engine_clock_entry_enable_post_divider(struct radeon_device *rdev, rdev 478 drivers/gpu/drm/radeon/r600_dpm.c void r600_engine_clock_entry_set_post_divider(struct radeon_device *rdev, rdev 485 drivers/gpu/drm/radeon/r600_dpm.c void r600_engine_clock_entry_set_reference_divider(struct radeon_device *rdev, rdev 492 drivers/gpu/drm/radeon/r600_dpm.c void r600_engine_clock_entry_set_feedback_divider(struct radeon_device *rdev, rdev 499 drivers/gpu/drm/radeon/r600_dpm.c void r600_engine_clock_entry_set_step_time(struct radeon_device *rdev, rdev 506 drivers/gpu/drm/radeon/r600_dpm.c void r600_vid_rt_set_ssu(struct radeon_device *rdev, u32 u) rdev 511 drivers/gpu/drm/radeon/r600_dpm.c void r600_vid_rt_set_vru(struct radeon_device *rdev, u32 u) rdev 516 drivers/gpu/drm/radeon/r600_dpm.c void r600_vid_rt_set_vrt(struct radeon_device *rdev, u32 rt) rdev 521 drivers/gpu/drm/radeon/r600_dpm.c void r600_voltage_control_enable_pins(struct radeon_device *rdev, rdev 529 drivers/gpu/drm/radeon/r600_dpm.c void r600_voltage_control_program_voltages(struct radeon_device *rdev, rdev 543 drivers/gpu/drm/radeon/r600_dpm.c void r600_voltage_control_deactivate_static_control(struct radeon_device *rdev, rdev 561 drivers/gpu/drm/radeon/r600_dpm.c void r600_power_level_enable(struct radeon_device *rdev, rdev 574 drivers/gpu/drm/radeon/r600_dpm.c void r600_power_level_set_voltage_index(struct radeon_device *rdev, rdev 583 drivers/gpu/drm/radeon/r600_dpm.c void r600_power_level_set_mem_clock_index(struct radeon_device *rdev, rdev 592 drivers/gpu/drm/radeon/r600_dpm.c void r600_power_level_set_eng_clock_index(struct radeon_device *rdev, rdev 601 drivers/gpu/drm/radeon/r600_dpm.c void r600_power_level_set_watermark_id(struct radeon_device *rdev, rdev 613 drivers/gpu/drm/radeon/r600_dpm.c void r600_power_level_set_pcie_gen2(struct radeon_device *rdev, rdev 624 drivers/gpu/drm/radeon/r600_dpm.c enum r600_power_level r600_power_level_get_current_index(struct radeon_device *rdev) rdev 633 drivers/gpu/drm/radeon/r600_dpm.c enum r600_power_level r600_power_level_get_target_index(struct radeon_device *rdev) rdev 642 drivers/gpu/drm/radeon/r600_dpm.c void r600_power_level_set_enter_index(struct radeon_device *rdev, rdev 649 drivers/gpu/drm/radeon/r600_dpm.c void r600_wait_for_power_level_unequal(struct radeon_device *rdev, rdev 654 drivers/gpu/drm/radeon/r600_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 655 drivers/gpu/drm/radeon/r600_dpm.c if (r600_power_level_get_target_index(rdev) != index) rdev 660 drivers/gpu/drm/radeon/r600_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 661 drivers/gpu/drm/radeon/r600_dpm.c if (r600_power_level_get_current_index(rdev) != index) rdev 667 drivers/gpu/drm/radeon/r600_dpm.c void r600_wait_for_power_level(struct radeon_device *rdev, rdev 672 drivers/gpu/drm/radeon/r600_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 673 drivers/gpu/drm/radeon/r600_dpm.c if (r600_power_level_get_target_index(rdev) == index) rdev 678 drivers/gpu/drm/radeon/r600_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 679 drivers/gpu/drm/radeon/r600_dpm.c if (r600_power_level_get_current_index(rdev) == index) rdev 685 drivers/gpu/drm/radeon/r600_dpm.c void r600_start_dpm(struct radeon_device *rdev) rdev 687 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_sclk_control(rdev, false); rdev 688 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_mclk_control(rdev, false); rdev 690 drivers/gpu/drm/radeon/r600_dpm.c r600_dynamicpm_enable(rdev, true); rdev 692 drivers/gpu/drm/radeon/r600_dpm.c radeon_wait_for_vblank(rdev, 0); rdev 693 drivers/gpu/drm/radeon/r600_dpm.c radeon_wait_for_vblank(rdev, 1); rdev 695 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_spll_bypass(rdev, true); rdev 696 drivers/gpu/drm/radeon/r600_dpm.c r600_wait_for_spll_change(rdev); rdev 697 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_spll_bypass(rdev, false); rdev 698 drivers/gpu/drm/radeon/r600_dpm.c r600_wait_for_spll_change(rdev); rdev 700 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_spll_bypass(rdev, true); rdev 701 drivers/gpu/drm/radeon/r600_dpm.c r600_wait_for_spll_change(rdev); rdev 702 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_spll_bypass(rdev, false); rdev 703 drivers/gpu/drm/radeon/r600_dpm.c r600_wait_for_spll_change(rdev); rdev 705 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_sclk_control(rdev, true); rdev 706 drivers/gpu/drm/radeon/r600_dpm.c r600_enable_mclk_control(rdev, true); rdev 709 drivers/gpu/drm/radeon/r600_dpm.c void r600_stop_dpm(struct radeon_device *rdev) rdev 711 drivers/gpu/drm/radeon/r600_dpm.c r600_dynamicpm_enable(rdev, false); rdev 714 drivers/gpu/drm/radeon/r600_dpm.c int r600_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 719 drivers/gpu/drm/radeon/r600_dpm.c void r600_dpm_post_set_power_state(struct radeon_device *rdev) rdev 739 drivers/gpu/drm/radeon/r600_dpm.c static int r600_set_thermal_temperature_range(struct radeon_device *rdev, rdev 758 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.thermal.min_temp = low_temp; rdev 759 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.thermal.max_temp = high_temp; rdev 787 drivers/gpu/drm/radeon/r600_dpm.c int r600_dpm_late_enable(struct radeon_device *rdev) rdev 791 drivers/gpu/drm/radeon/r600_dpm.c if (rdev->irq.installed && rdev 792 drivers/gpu/drm/radeon/r600_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 793 drivers/gpu/drm/radeon/r600_dpm.c ret = r600_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 796 drivers/gpu/drm/radeon/r600_dpm.c rdev->irq.dpm_thermal = true; rdev 797 drivers/gpu/drm/radeon/r600_dpm.c radeon_irq_set(rdev); rdev 845 drivers/gpu/drm/radeon/r600_dpm.c int r600_get_platform_caps(struct radeon_device *rdev) rdev 847 drivers/gpu/drm/radeon/r600_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 858 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); rdev 859 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); rdev 860 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); rdev 873 drivers/gpu/drm/radeon/r600_dpm.c int r600_parse_extended_power_table(struct radeon_device *rdev) rdev 875 drivers/gpu/drm/radeon/r600_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 895 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; rdev 896 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin); rdev 897 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed); rdev 898 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh); rdev 899 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin); rdev 900 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed); rdev 901 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh); rdev 903 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax); rdev 905 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.t_max = 10900; rdev 906 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.cycle_delay = 100000; rdev 908 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode; rdev 909 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.default_max_fan_pwm = rdev 911 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.default_fan_output_sensitivity = 4836; rdev 912 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.fan_output_sensitivity = rdev 915 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.fan.ucode_fan_control = true; rdev 926 drivers/gpu/drm/radeon/r600_dpm.c ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 935 drivers/gpu/drm/radeon/r600_dpm.c ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 938 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); rdev 946 drivers/gpu/drm/radeon/r600_dpm.c ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 949 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); rdev 950 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); rdev 958 drivers/gpu/drm/radeon/r600_dpm.c ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, rdev 961 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); rdev 962 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); rdev 963 drivers/gpu/drm/radeon/r600_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries); rdev 973 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk = rdev 976 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk = rdev 979 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = rdev 981 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = rdev 992 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = rdev 996 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) { rdev 997 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1003 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk = rdev 1005 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk = rdev 1007 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage = rdev 1012 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count = rdev 1020 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit); rdev 1021 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit); rdev 1022 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.near_tdp_limit_adjusted = rdev->pm.dpm.near_tdp_limit; rdev 1023 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit); rdev 1024 drivers/gpu/drm/radeon/r600_dpm.c if (rdev->pm.dpm.tdp_od_limit) rdev 1025 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.power_control = true; rdev 1027 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.power_control = false; rdev 1028 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.tdp_adjustment = 0; rdev 1029 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold); rdev 1030 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage); rdev 1031 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope); rdev 1039 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL); rdev 1040 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.cac_leakage_table.entries) { rdev 1041 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1046 drivers/gpu/drm/radeon/r600_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { rdev 1047 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 = rdev 1049 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 = rdev 1051 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 = rdev 1054 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc = rdev 1056 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage = rdev 1062 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries; rdev 1093 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries = rdev 1095 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) { rdev 1096 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1099 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count = rdev 1107 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = rdev 1109 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = rdev 1111 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v = rdev 1122 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.vce_states[i].evclk = rdev 1124 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.vce_states[i].ecclk = rdev 1126 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.vce_states[i].clk_idx = rdev 1128 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.vce_states[i].pstate = rdev 1147 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries = rdev 1149 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) { rdev 1150 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1153 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count = rdev 1160 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk = rdev 1162 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk = rdev 1164 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = rdev 1179 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries = rdev 1181 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) { rdev 1182 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1185 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count = rdev 1189 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk = rdev 1191 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v = rdev 1202 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table = rdev 1204 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.ppm_table) { rdev 1205 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1208 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign; rdev 1209 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->cpu_core_number = rdev 1211 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->platform_tdp = rdev 1213 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp = rdev 1215 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->platform_tdc = rdev 1217 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc = rdev 1219 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->apu_tdp = rdev 1221 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->dgpu_tdp = rdev 1223 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power = rdev 1225 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.ppm_table->tj_max = rdev 1237 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries = rdev 1239 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) { rdev 1240 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1243 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count = rdev 1247 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk = rdev 1249 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v = rdev 1260 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table = rdev 1262 drivers/gpu/drm/radeon/r600_dpm.c if (!rdev->pm.dpm.dyn_state.cac_tdp_table) { rdev 1263 drivers/gpu/drm/radeon/r600_dpm.c r600_free_extended_power_table(rdev); rdev 1270 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = rdev 1277 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255; rdev 1280 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP); rdev 1281 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp = rdev 1283 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC); rdev 1284 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit = rdev 1286 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit = rdev 1288 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage = rdev 1290 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage = rdev 1298 drivers/gpu/drm/radeon/r600_dpm.c void r600_free_extended_power_table(struct radeon_device *rdev) rdev 1300 drivers/gpu/drm/radeon/r600_dpm.c struct radeon_dpm_dynamic_state *dyn_state = &rdev->pm.dpm.dyn_state; rdev 1316 drivers/gpu/drm/radeon/r600_dpm.c enum radeon_pcie_gen r600_get_pcie_gen_support(struct radeon_device *rdev, rdev 1339 drivers/gpu/drm/radeon/r600_dpm.c u16 r600_get_pcie_lane_support(struct radeon_device *rdev, rdev 135 drivers/gpu/drm/radeon/r600_dpm.h void r600_dpm_print_ps_status(struct radeon_device *rdev, rdev 137 drivers/gpu/drm/radeon/r600_dpm.h u32 r600_dpm_get_vblank_time(struct radeon_device *rdev); rdev 138 drivers/gpu/drm/radeon/r600_dpm.h u32 r600_dpm_get_vrefresh(struct radeon_device *rdev); rdev 143 drivers/gpu/drm/radeon/r600_dpm.h void r600_gfx_clockgating_enable(struct radeon_device *rdev, bool enable); rdev 144 drivers/gpu/drm/radeon/r600_dpm.h void r600_dynamicpm_enable(struct radeon_device *rdev, bool enable); rdev 145 drivers/gpu/drm/radeon/r600_dpm.h void r600_enable_thermal_protection(struct radeon_device *rdev, bool enable); rdev 146 drivers/gpu/drm/radeon/r600_dpm.h void r600_enable_acpi_pm(struct radeon_device *rdev); rdev 147 drivers/gpu/drm/radeon/r600_dpm.h void r600_enable_dynamic_pcie_gen2(struct radeon_device *rdev, bool enable); rdev 148 drivers/gpu/drm/radeon/r600_dpm.h bool r600_dynamicpm_enabled(struct radeon_device *rdev); rdev 149 drivers/gpu/drm/radeon/r600_dpm.h void r600_enable_sclk_control(struct radeon_device *rdev, bool enable); rdev 150 drivers/gpu/drm/radeon/r600_dpm.h void r600_enable_mclk_control(struct radeon_device *rdev, bool enable); rdev 151 drivers/gpu/drm/radeon/r600_dpm.h void r600_enable_spll_bypass(struct radeon_device *rdev, bool enable); rdev 152 drivers/gpu/drm/radeon/r600_dpm.h void r600_wait_for_spll_change(struct radeon_device *rdev); rdev 153 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_bsp(struct radeon_device *rdev, u32 u, u32 p); rdev 154 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_at(struct radeon_device *rdev, rdev 157 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_tc(struct radeon_device *rdev, u32 index, u32 u_t, u32 d_t); rdev 158 drivers/gpu/drm/radeon/r600_dpm.h void r600_select_td(struct radeon_device *rdev, enum r600_td td); rdev 159 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_vrc(struct radeon_device *rdev, u32 vrv); rdev 160 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_tpu(struct radeon_device *rdev, u32 u); rdev 161 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_tpc(struct radeon_device *rdev, u32 c); rdev 162 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_sstu(struct radeon_device *rdev, u32 u); rdev 163 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_sst(struct radeon_device *rdev, u32 t); rdev 164 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_git(struct radeon_device *rdev, u32 t); rdev 165 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_fctu(struct radeon_device *rdev, u32 u); rdev 166 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_fct(struct radeon_device *rdev, u32 t); rdev 167 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_ctxcgtt3d_rphc(struct radeon_device *rdev, u32 p); rdev 168 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_ctxcgtt3d_rsdc(struct radeon_device *rdev, u32 s); rdev 169 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_vddc3d_oorsu(struct radeon_device *rdev, u32 u); rdev 170 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_vddc3d_oorphc(struct radeon_device *rdev, u32 p); rdev 171 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_vddc3d_oorsdc(struct radeon_device *rdev, u32 s); rdev 172 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_mpll_lock_time(struct radeon_device *rdev, u32 lock_time); rdev 173 drivers/gpu/drm/radeon/r600_dpm.h void r600_set_mpll_reset_time(struct radeon_device *rdev, u32 reset_time); rdev 174 drivers/gpu/drm/radeon/r600_dpm.h void r600_engine_clock_entry_enable(struct radeon_device *rdev, rdev 176 drivers/gpu/drm/radeon/r600_dpm.h void r600_engine_clock_entry_enable_pulse_skipping(struct radeon_device *rdev, rdev 178 drivers/gpu/drm/radeon/r600_dpm.h void r600_engine_clock_entry_enable_post_divider(struct radeon_device *rdev, rdev 180 drivers/gpu/drm/radeon/r600_dpm.h void r600_engine_clock_entry_set_post_divider(struct radeon_device *rdev, rdev 182 drivers/gpu/drm/radeon/r600_dpm.h void r600_engine_clock_entry_set_reference_divider(struct radeon_device *rdev, rdev 184 drivers/gpu/drm/radeon/r600_dpm.h void r600_engine_clock_entry_set_feedback_divider(struct radeon_device *rdev, rdev 186 drivers/gpu/drm/radeon/r600_dpm.h void r600_engine_clock_entry_set_step_time(struct radeon_device *rdev, rdev 188 drivers/gpu/drm/radeon/r600_dpm.h void r600_vid_rt_set_ssu(struct radeon_device *rdev, u32 u); rdev 189 drivers/gpu/drm/radeon/r600_dpm.h void r600_vid_rt_set_vru(struct radeon_device *rdev, u32 u); rdev 190 drivers/gpu/drm/radeon/r600_dpm.h void r600_vid_rt_set_vrt(struct radeon_device *rdev, u32 rt); rdev 191 drivers/gpu/drm/radeon/r600_dpm.h void r600_voltage_control_enable_pins(struct radeon_device *rdev, rdev 193 drivers/gpu/drm/radeon/r600_dpm.h void r600_voltage_control_program_voltages(struct radeon_device *rdev, rdev 195 drivers/gpu/drm/radeon/r600_dpm.h void r600_voltage_control_deactivate_static_control(struct radeon_device *rdev, rdev 197 drivers/gpu/drm/radeon/r600_dpm.h void r600_power_level_enable(struct radeon_device *rdev, rdev 199 drivers/gpu/drm/radeon/r600_dpm.h void r600_power_level_set_voltage_index(struct radeon_device *rdev, rdev 201 drivers/gpu/drm/radeon/r600_dpm.h void r600_power_level_set_mem_clock_index(struct radeon_device *rdev, rdev 203 drivers/gpu/drm/radeon/r600_dpm.h void r600_power_level_set_eng_clock_index(struct radeon_device *rdev, rdev 205 drivers/gpu/drm/radeon/r600_dpm.h void r600_power_level_set_watermark_id(struct radeon_device *rdev, rdev 208 drivers/gpu/drm/radeon/r600_dpm.h void r600_power_level_set_pcie_gen2(struct radeon_device *rdev, rdev 210 drivers/gpu/drm/radeon/r600_dpm.h enum r600_power_level r600_power_level_get_current_index(struct radeon_device *rdev); rdev 211 drivers/gpu/drm/radeon/r600_dpm.h enum r600_power_level r600_power_level_get_target_index(struct radeon_device *rdev); rdev 212 drivers/gpu/drm/radeon/r600_dpm.h void r600_power_level_set_enter_index(struct radeon_device *rdev, rdev 214 drivers/gpu/drm/radeon/r600_dpm.h void r600_wait_for_power_level_unequal(struct radeon_device *rdev, rdev 216 drivers/gpu/drm/radeon/r600_dpm.h void r600_wait_for_power_level(struct radeon_device *rdev, rdev 218 drivers/gpu/drm/radeon/r600_dpm.h void r600_start_dpm(struct radeon_device *rdev); rdev 219 drivers/gpu/drm/radeon/r600_dpm.h void r600_stop_dpm(struct radeon_device *rdev); rdev 223 drivers/gpu/drm/radeon/r600_dpm.h int r600_get_platform_caps(struct radeon_device *rdev); rdev 225 drivers/gpu/drm/radeon/r600_dpm.h int r600_parse_extended_power_table(struct radeon_device *rdev); rdev 226 drivers/gpu/drm/radeon/r600_dpm.h void r600_free_extended_power_table(struct radeon_device *rdev); rdev 228 drivers/gpu/drm/radeon/r600_dpm.h enum radeon_pcie_gen r600_get_pcie_gen_support(struct radeon_device *rdev, rdev 233 drivers/gpu/drm/radeon/r600_dpm.h u16 r600_get_pcie_lane_support(struct radeon_device *rdev, rdev 59 drivers/gpu/drm/radeon/r600_hdmi.c static struct r600_audio_pin r600_audio_status(struct radeon_device *rdev) rdev 87 drivers/gpu/drm/radeon/r600_hdmi.c dev_err(rdev->dev, "Unknown bits per sample 0x%x, using 16\n", rdev 116 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = container_of(work, struct radeon_device, rdev 118 drivers/gpu/drm/radeon/r600_hdmi.c struct drm_device *dev = rdev->ddev; rdev 119 drivers/gpu/drm/radeon/r600_hdmi.c struct r600_audio_pin audio_status = r600_audio_status(rdev); rdev 123 drivers/gpu/drm/radeon/r600_hdmi.c if (rdev->audio.pin[0].channels != audio_status.channels || rdev 124 drivers/gpu/drm/radeon/r600_hdmi.c rdev->audio.pin[0].rate != audio_status.rate || rdev 125 drivers/gpu/drm/radeon/r600_hdmi.c rdev->audio.pin[0].bits_per_sample != audio_status.bits_per_sample || rdev 126 drivers/gpu/drm/radeon/r600_hdmi.c rdev->audio.pin[0].status_bits != audio_status.status_bits || rdev 127 drivers/gpu/drm/radeon/r600_hdmi.c rdev->audio.pin[0].category_code != audio_status.category_code) { rdev 128 drivers/gpu/drm/radeon/r600_hdmi.c rdev->audio.pin[0] = audio_status; rdev 141 drivers/gpu/drm/radeon/r600_hdmi.c void r600_audio_enable(struct radeon_device *rdev, rdev 171 drivers/gpu/drm/radeon/r600_hdmi.c struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev) rdev 174 drivers/gpu/drm/radeon/r600_hdmi.c return &rdev->audio.pin[0]; rdev 181 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 184 drivers/gpu/drm/radeon/r600_hdmi.c uint32_t acr_ctl = ASIC_IS_DCE3(rdev) ? DCE3_HDMI0_ACR_PACKET_CONTROL : rdev 217 drivers/gpu/drm/radeon/r600_hdmi.c void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, rdev 247 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 265 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 298 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 314 drivers/gpu/drm/radeon/r600_hdmi.c void r600_hdmi_audio_set_dto(struct radeon_device *rdev, rdev 343 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 354 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 396 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 414 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 417 drivers/gpu/drm/radeon/r600_hdmi.c struct r600_audio_pin audio = r600_audio_status(rdev); rdev 472 drivers/gpu/drm/radeon/r600_hdmi.c struct radeon_device *rdev = dev->dev_private; rdev 481 drivers/gpu/drm/radeon/r600_hdmi.c if (!ASIC_IS_DCE3(rdev)) { rdev 514 drivers/gpu/drm/radeon/r600_hdmi.c dev_err(rdev->dev, "Invalid encoder for HDMI: 0x%X\n", rdev 521 drivers/gpu/drm/radeon/r600_hdmi.c if (rdev->irq.installed) { rdev 525 drivers/gpu/drm/radeon/r600_hdmi.c radeon_irq_kms_enable_afmt(rdev, dig->afmt->id); rdev 527 drivers/gpu/drm/radeon/r600_hdmi.c radeon_irq_kms_disable_afmt(rdev, dig->afmt->id); rdev 246 drivers/gpu/drm/radeon/radeon.h bool radeon_get_bios(struct radeon_device *rdev); rdev 256 drivers/gpu/drm/radeon/radeon.h int radeon_dummy_page_init(struct radeon_device *rdev); rdev 257 drivers/gpu/drm/radeon/radeon.h void radeon_dummy_page_fini(struct radeon_device *rdev); rdev 282 drivers/gpu/drm/radeon/radeon.h int radeon_pm_init(struct radeon_device *rdev); rdev 283 drivers/gpu/drm/radeon/radeon.h int radeon_pm_late_init(struct radeon_device *rdev); rdev 284 drivers/gpu/drm/radeon/radeon.h void radeon_pm_fini(struct radeon_device *rdev); rdev 285 drivers/gpu/drm/radeon/radeon.h void radeon_pm_compute_clocks(struct radeon_device *rdev); rdev 286 drivers/gpu/drm/radeon/radeon.h void radeon_pm_suspend(struct radeon_device *rdev); rdev 287 drivers/gpu/drm/radeon/radeon.h void radeon_pm_resume(struct radeon_device *rdev); rdev 288 drivers/gpu/drm/radeon/radeon.h void radeon_combios_get_power_modes(struct radeon_device *rdev); rdev 289 drivers/gpu/drm/radeon/radeon.h void radeon_atombios_get_power_modes(struct radeon_device *rdev); rdev 290 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_clock_dividers(struct radeon_device *rdev, rdev 295 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_memory_pll_dividers(struct radeon_device *rdev, rdev 299 drivers/gpu/drm/radeon/radeon.h void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type); rdev 300 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev, rdev 303 drivers/gpu/drm/radeon/radeon.h void radeon_atom_set_engine_dram_timings(struct radeon_device *rdev, rdev 305 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_voltage_step(struct radeon_device *rdev, rdev 307 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_max_vddc(struct radeon_device *rdev, u8 voltage_type, rdev 309 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_leakage_vddc_based_on_leakage_idx(struct radeon_device *rdev, rdev 312 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_leakage_id_from_vbios(struct radeon_device *rdev, rdev 314 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_leakage_vddc_based_on_leakage_params(struct radeon_device *rdev, rdev 318 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_voltage_evv(struct radeon_device *rdev, rdev 321 drivers/gpu/drm/radeon/radeon.h int radeon_atom_round_to_true_voltage(struct radeon_device *rdev, rdev 325 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_min_voltage(struct radeon_device *rdev, rdev 327 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_max_voltage(struct radeon_device *rdev, rdev 329 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_voltage_table(struct radeon_device *rdev, rdev 332 drivers/gpu/drm/radeon/radeon.h bool radeon_atom_is_voltage_gpio(struct radeon_device *rdev, rdev 334 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_svi2_info(struct radeon_device *rdev, rdev 337 drivers/gpu/drm/radeon/radeon.h void radeon_atom_update_memory_dll(struct radeon_device *rdev, rdev 339 drivers/gpu/drm/radeon/radeon.h void radeon_atom_set_ac_timing(struct radeon_device *rdev, rdev 341 drivers/gpu/drm/radeon/radeon.h int radeon_atom_init_mc_reg_table(struct radeon_device *rdev, rdev 344 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_memory_info(struct radeon_device *rdev, rdev 346 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_mclk_range_table(struct radeon_device *rdev, rdev 349 drivers/gpu/drm/radeon/radeon.h int radeon_atom_get_max_vddc(struct radeon_device *rdev, u8 voltage_type, rdev 351 drivers/gpu/drm/radeon/radeon.h void rs690_pm_info(struct radeon_device *rdev); rdev 360 drivers/gpu/drm/radeon/radeon.h struct radeon_device *rdev; rdev 374 drivers/gpu/drm/radeon/radeon.h struct radeon_device *rdev; rdev 383 drivers/gpu/drm/radeon/radeon.h int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring); rdev 384 drivers/gpu/drm/radeon/radeon.h int radeon_fence_driver_init(struct radeon_device *rdev); rdev 385 drivers/gpu/drm/radeon/radeon.h void radeon_fence_driver_fini(struct radeon_device *rdev); rdev 386 drivers/gpu/drm/radeon/radeon.h void radeon_fence_driver_force_completion(struct radeon_device *rdev, int ring); rdev 387 drivers/gpu/drm/radeon/radeon.h int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence **fence, int ring); rdev 388 drivers/gpu/drm/radeon/radeon.h void radeon_fence_process(struct radeon_device *rdev, int ring); rdev 392 drivers/gpu/drm/radeon/radeon.h int radeon_fence_wait_next(struct radeon_device *rdev, int ring); rdev 393 drivers/gpu/drm/radeon/radeon.h int radeon_fence_wait_empty(struct radeon_device *rdev, int ring); rdev 394 drivers/gpu/drm/radeon/radeon.h int radeon_fence_wait_any(struct radeon_device *rdev, rdev 399 drivers/gpu/drm/radeon/radeon.h unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring); rdev 507 drivers/gpu/drm/radeon/radeon.h struct radeon_device *rdev; rdev 517 drivers/gpu/drm/radeon/radeon.h int radeon_gem_debugfs_init(struct radeon_device *rdev); rdev 575 drivers/gpu/drm/radeon/radeon.h int radeon_gem_init(struct radeon_device *rdev); rdev 576 drivers/gpu/drm/radeon/radeon.h void radeon_gem_fini(struct radeon_device *rdev); rdev 577 drivers/gpu/drm/radeon/radeon.h int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size, rdev 598 drivers/gpu/drm/radeon/radeon.h int radeon_semaphore_create(struct radeon_device *rdev, rdev 600 drivers/gpu/drm/radeon/radeon.h bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring, rdev 602 drivers/gpu/drm/radeon/radeon.h bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring, rdev 604 drivers/gpu/drm/radeon/radeon.h void radeon_semaphore_free(struct radeon_device *rdev, rdev 620 drivers/gpu/drm/radeon/radeon.h int radeon_sync_resv(struct radeon_device *rdev, rdev 624 drivers/gpu/drm/radeon/radeon.h int radeon_sync_rings(struct radeon_device *rdev, rdev 627 drivers/gpu/drm/radeon/radeon.h void radeon_sync_free(struct radeon_device *rdev, struct radeon_sync *sync, rdev 658 drivers/gpu/drm/radeon/radeon.h int radeon_gart_table_ram_alloc(struct radeon_device *rdev); rdev 659 drivers/gpu/drm/radeon/radeon.h void radeon_gart_table_ram_free(struct radeon_device *rdev); rdev 660 drivers/gpu/drm/radeon/radeon.h int radeon_gart_table_vram_alloc(struct radeon_device *rdev); rdev 661 drivers/gpu/drm/radeon/radeon.h void radeon_gart_table_vram_free(struct radeon_device *rdev); rdev 662 drivers/gpu/drm/radeon/radeon.h int radeon_gart_table_vram_pin(struct radeon_device *rdev); rdev 663 drivers/gpu/drm/radeon/radeon.h void radeon_gart_table_vram_unpin(struct radeon_device *rdev); rdev 664 drivers/gpu/drm/radeon/radeon.h int radeon_gart_init(struct radeon_device *rdev); rdev 665 drivers/gpu/drm/radeon/radeon.h void radeon_gart_fini(struct radeon_device *rdev); rdev 666 drivers/gpu/drm/radeon/radeon.h void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset, rdev 668 drivers/gpu/drm/radeon/radeon.h int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, rdev 698 drivers/gpu/drm/radeon/radeon.h bool radeon_combios_sideport_present(struct radeon_device *rdev); rdev 699 drivers/gpu/drm/radeon/radeon.h bool radeon_atombios_sideport_present(struct radeon_device *rdev); rdev 711 drivers/gpu/drm/radeon/radeon.h int radeon_scratch_get(struct radeon_device *rdev, uint32_t *reg); rdev 712 drivers/gpu/drm/radeon/radeon.h void radeon_scratch_free(struct radeon_device *rdev, uint32_t reg); rdev 728 drivers/gpu/drm/radeon/radeon.h int radeon_doorbell_get(struct radeon_device *rdev, u32 *page); rdev 729 drivers/gpu/drm/radeon/radeon.h void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell); rdev 738 drivers/gpu/drm/radeon/radeon.h struct radeon_device *rdev; rdev 805 drivers/gpu/drm/radeon/radeon.h int radeon_irq_kms_init(struct radeon_device *rdev); rdev 806 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_fini(struct radeon_device *rdev); rdev 807 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring); rdev 808 drivers/gpu/drm/radeon/radeon.h bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring); rdev 809 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring); rdev 810 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc); rdev 811 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc); rdev 812 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block); rdev 813 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block); rdev 814 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask); rdev 815 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask); rdev 1005 drivers/gpu/drm/radeon/radeon.h int radeon_ib_get(struct radeon_device *rdev, int ring, rdev 1008 drivers/gpu/drm/radeon/radeon.h void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); rdev 1009 drivers/gpu/drm/radeon/radeon.h int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, rdev 1011 drivers/gpu/drm/radeon/radeon.h int radeon_ib_pool_init(struct radeon_device *rdev); rdev 1012 drivers/gpu/drm/radeon/radeon.h void radeon_ib_pool_fini(struct radeon_device *rdev); rdev 1013 drivers/gpu/drm/radeon/radeon.h int radeon_ib_ring_tests(struct radeon_device *rdev); rdev 1015 drivers/gpu/drm/radeon/radeon.h bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev, rdev 1017 drivers/gpu/drm/radeon/radeon.h void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1018 drivers/gpu/drm/radeon/radeon.h int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw); rdev 1019 drivers/gpu/drm/radeon/radeon.h int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw); rdev 1020 drivers/gpu/drm/radeon/radeon.h void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *cp, rdev 1022 drivers/gpu/drm/radeon/radeon.h void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *cp, rdev 1025 drivers/gpu/drm/radeon/radeon.h void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1026 drivers/gpu/drm/radeon/radeon.h int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1027 drivers/gpu/drm/radeon/radeon.h void radeon_ring_lockup_update(struct radeon_device *rdev, rdev 1029 drivers/gpu/drm/radeon/radeon.h bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring); rdev 1030 drivers/gpu/drm/radeon/radeon.h unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring, rdev 1032 drivers/gpu/drm/radeon/radeon.h int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, rdev 1034 drivers/gpu/drm/radeon/radeon.h int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size, rdev 1036 drivers/gpu/drm/radeon/radeon.h void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1040 drivers/gpu/drm/radeon/radeon.h void r600_dma_stop(struct radeon_device *rdev); rdev 1041 drivers/gpu/drm/radeon/radeon.h int r600_dma_resume(struct radeon_device *rdev); rdev 1042 drivers/gpu/drm/radeon/radeon.h void r600_dma_fini(struct radeon_device *rdev); rdev 1044 drivers/gpu/drm/radeon/radeon.h void cayman_dma_stop(struct radeon_device *rdev); rdev 1045 drivers/gpu/drm/radeon/radeon.h int cayman_dma_resume(struct radeon_device *rdev); rdev 1046 drivers/gpu/drm/radeon/radeon.h void cayman_dma_fini(struct radeon_device *rdev); rdev 1059 drivers/gpu/drm/radeon/radeon.h struct radeon_device *rdev; rdev 1118 drivers/gpu/drm/radeon/radeon.h int radeon_agp_init(struct radeon_device *rdev); rdev 1119 drivers/gpu/drm/radeon/radeon.h void radeon_agp_resume(struct radeon_device *rdev); rdev 1120 drivers/gpu/drm/radeon/radeon.h void radeon_agp_suspend(struct radeon_device *rdev); rdev 1121 drivers/gpu/drm/radeon/radeon.h void radeon_agp_fini(struct radeon_device *rdev); rdev 1585 drivers/gpu/drm/radeon/radeon.h void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable); rdev 1586 drivers/gpu/drm/radeon/radeon.h void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable); rdev 1656 drivers/gpu/drm/radeon/radeon.h int radeon_pm_get_type_index(struct radeon_device *rdev, rdev 1680 drivers/gpu/drm/radeon/radeon.h int radeon_uvd_init(struct radeon_device *rdev); rdev 1681 drivers/gpu/drm/radeon/radeon.h void radeon_uvd_fini(struct radeon_device *rdev); rdev 1682 drivers/gpu/drm/radeon/radeon.h int radeon_uvd_suspend(struct radeon_device *rdev); rdev 1683 drivers/gpu/drm/radeon/radeon.h int radeon_uvd_resume(struct radeon_device *rdev); rdev 1684 drivers/gpu/drm/radeon/radeon.h int radeon_uvd_get_create_msg(struct radeon_device *rdev, int ring, rdev 1686 drivers/gpu/drm/radeon/radeon.h int radeon_uvd_get_destroy_msg(struct radeon_device *rdev, int ring, rdev 1690 drivers/gpu/drm/radeon/radeon.h void radeon_uvd_free_handles(struct radeon_device *rdev, rdev 1693 drivers/gpu/drm/radeon/radeon.h void radeon_uvd_note_usage(struct radeon_device *rdev); rdev 1694 drivers/gpu/drm/radeon/radeon.h int radeon_uvd_calc_upll_dividers(struct radeon_device *rdev, rdev 1703 drivers/gpu/drm/radeon/radeon.h int radeon_uvd_send_upll_ctlreq(struct radeon_device *rdev, rdev 1723 drivers/gpu/drm/radeon/radeon.h int radeon_vce_init(struct radeon_device *rdev); rdev 1724 drivers/gpu/drm/radeon/radeon.h void radeon_vce_fini(struct radeon_device *rdev); rdev 1725 drivers/gpu/drm/radeon/radeon.h int radeon_vce_suspend(struct radeon_device *rdev); rdev 1726 drivers/gpu/drm/radeon/radeon.h int radeon_vce_resume(struct radeon_device *rdev); rdev 1727 drivers/gpu/drm/radeon/radeon.h int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring, rdev 1729 drivers/gpu/drm/radeon/radeon.h int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, rdev 1731 drivers/gpu/drm/radeon/radeon.h void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp); rdev 1732 drivers/gpu/drm/radeon/radeon.h void radeon_vce_note_usage(struct radeon_device *rdev); rdev 1735 drivers/gpu/drm/radeon/radeon.h bool radeon_vce_semaphore_emit(struct radeon_device *rdev, rdev 1739 drivers/gpu/drm/radeon/radeon.h void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 1740 drivers/gpu/drm/radeon/radeon.h void radeon_vce_fence_emit(struct radeon_device *rdev, rdev 1742 drivers/gpu/drm/radeon/radeon.h int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 1743 drivers/gpu/drm/radeon/radeon.h int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 1768 drivers/gpu/drm/radeon/radeon.h void radeon_benchmark(struct radeon_device *rdev, int test_number); rdev 1774 drivers/gpu/drm/radeon/radeon.h void radeon_test_moves(struct radeon_device *rdev); rdev 1775 drivers/gpu/drm/radeon/radeon.h void radeon_test_ring_sync(struct radeon_device *rdev, rdev 1778 drivers/gpu/drm/radeon/radeon.h void radeon_test_syncing(struct radeon_device *rdev); rdev 1802 drivers/gpu/drm/radeon/radeon.h int radeon_debugfs_add_files(struct radeon_device *rdev, rdev 1805 drivers/gpu/drm/radeon/radeon.h int radeon_debugfs_fence_init(struct radeon_device *rdev); rdev 1812 drivers/gpu/drm/radeon/radeon.h u32 (*get_rptr)(struct radeon_device *rdev, struct radeon_ring *ring); rdev 1813 drivers/gpu/drm/radeon/radeon.h u32 (*get_wptr)(struct radeon_device *rdev, struct radeon_ring *ring); rdev 1814 drivers/gpu/drm/radeon/radeon.h void (*set_wptr)(struct radeon_device *rdev, struct radeon_ring *ring); rdev 1817 drivers/gpu/drm/radeon/radeon.h int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib); rdev 1821 drivers/gpu/drm/radeon/radeon.h void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); rdev 1822 drivers/gpu/drm/radeon/radeon.h void (*emit_fence)(struct radeon_device *rdev, struct radeon_fence *fence); rdev 1823 drivers/gpu/drm/radeon/radeon.h void (*hdp_flush)(struct radeon_device *rdev, struct radeon_ring *ring); rdev 1824 drivers/gpu/drm/radeon/radeon.h bool (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp, rdev 1826 drivers/gpu/drm/radeon/radeon.h void (*vm_flush)(struct radeon_device *rdev, struct radeon_ring *ring, rdev 1830 drivers/gpu/drm/radeon/radeon.h int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1831 drivers/gpu/drm/radeon/radeon.h int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1832 drivers/gpu/drm/radeon/radeon.h bool (*is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1835 drivers/gpu/drm/radeon/radeon.h void (*ring_start)(struct radeon_device *rdev, struct radeon_ring *cp); rdev 1842 drivers/gpu/drm/radeon/radeon.h int (*init)(struct radeon_device *rdev); rdev 1843 drivers/gpu/drm/radeon/radeon.h void (*fini)(struct radeon_device *rdev); rdev 1844 drivers/gpu/drm/radeon/radeon.h int (*resume)(struct radeon_device *rdev); rdev 1845 drivers/gpu/drm/radeon/radeon.h int (*suspend)(struct radeon_device *rdev); rdev 1846 drivers/gpu/drm/radeon/radeon.h void (*vga_set_state)(struct radeon_device *rdev, bool state); rdev 1847 drivers/gpu/drm/radeon/radeon.h int (*asic_reset)(struct radeon_device *rdev, bool hard); rdev 1849 drivers/gpu/drm/radeon/radeon.h void (*mmio_hdp_flush)(struct radeon_device *rdev); rdev 1851 drivers/gpu/drm/radeon/radeon.h bool (*gui_idle)(struct radeon_device *rdev); rdev 1853 drivers/gpu/drm/radeon/radeon.h int (*mc_wait_for_idle)(struct radeon_device *rdev); rdev 1855 drivers/gpu/drm/radeon/radeon.h u32 (*get_xclk)(struct radeon_device *rdev); rdev 1857 drivers/gpu/drm/radeon/radeon.h uint64_t (*get_gpu_clock_counter)(struct radeon_device *rdev); rdev 1859 drivers/gpu/drm/radeon/radeon.h int (*get_allowed_info_register)(struct radeon_device *rdev, u32 reg, u32 *val); rdev 1862 drivers/gpu/drm/radeon/radeon.h void (*tlb_flush)(struct radeon_device *rdev); rdev 1864 drivers/gpu/drm/radeon/radeon.h void (*set_page)(struct radeon_device *rdev, unsigned i, rdev 1868 drivers/gpu/drm/radeon/radeon.h int (*init)(struct radeon_device *rdev); rdev 1869 drivers/gpu/drm/radeon/radeon.h void (*fini)(struct radeon_device *rdev); rdev 1870 drivers/gpu/drm/radeon/radeon.h void (*copy_pages)(struct radeon_device *rdev, rdev 1874 drivers/gpu/drm/radeon/radeon.h void (*write_pages)(struct radeon_device *rdev, rdev 1879 drivers/gpu/drm/radeon/radeon.h void (*set_pages)(struct radeon_device *rdev, rdev 1890 drivers/gpu/drm/radeon/radeon.h int (*set)(struct radeon_device *rdev); rdev 1891 drivers/gpu/drm/radeon/radeon.h int (*process)(struct radeon_device *rdev); rdev 1896 drivers/gpu/drm/radeon/radeon.h void (*bandwidth_update)(struct radeon_device *rdev); rdev 1898 drivers/gpu/drm/radeon/radeon.h u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc); rdev 1900 drivers/gpu/drm/radeon/radeon.h void (*wait_for_vblank)(struct radeon_device *rdev, int crtc); rdev 1911 drivers/gpu/drm/radeon/radeon.h struct radeon_fence *(*blit)(struct radeon_device *rdev, rdev 1917 drivers/gpu/drm/radeon/radeon.h struct radeon_fence *(*dma)(struct radeon_device *rdev, rdev 1924 drivers/gpu/drm/radeon/radeon.h struct radeon_fence *(*copy)(struct radeon_device *rdev, rdev 1934 drivers/gpu/drm/radeon/radeon.h int (*set_reg)(struct radeon_device *rdev, int reg, rdev 1937 drivers/gpu/drm/radeon/radeon.h void (*clear_reg)(struct radeon_device *rdev, int reg); rdev 1941 drivers/gpu/drm/radeon/radeon.h void (*init)(struct radeon_device *rdev); rdev 1942 drivers/gpu/drm/radeon/radeon.h void (*fini)(struct radeon_device *rdev); rdev 1943 drivers/gpu/drm/radeon/radeon.h bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd); rdev 1944 drivers/gpu/drm/radeon/radeon.h void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd); rdev 1948 drivers/gpu/drm/radeon/radeon.h void (*misc)(struct radeon_device *rdev); rdev 1949 drivers/gpu/drm/radeon/radeon.h void (*prepare)(struct radeon_device *rdev); rdev 1950 drivers/gpu/drm/radeon/radeon.h void (*finish)(struct radeon_device *rdev); rdev 1951 drivers/gpu/drm/radeon/radeon.h void (*init_profile)(struct radeon_device *rdev); rdev 1952 drivers/gpu/drm/radeon/radeon.h void (*get_dynpm_state)(struct radeon_device *rdev); rdev 1953 drivers/gpu/drm/radeon/radeon.h uint32_t (*get_engine_clock)(struct radeon_device *rdev); rdev 1954 drivers/gpu/drm/radeon/radeon.h void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); rdev 1955 drivers/gpu/drm/radeon/radeon.h uint32_t (*get_memory_clock)(struct radeon_device *rdev); rdev 1956 drivers/gpu/drm/radeon/radeon.h void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); rdev 1957 drivers/gpu/drm/radeon/radeon.h int (*get_pcie_lanes)(struct radeon_device *rdev); rdev 1958 drivers/gpu/drm/radeon/radeon.h void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); rdev 1959 drivers/gpu/drm/radeon/radeon.h void (*set_clock_gating)(struct radeon_device *rdev, int enable); rdev 1960 drivers/gpu/drm/radeon/radeon.h int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 1961 drivers/gpu/drm/radeon/radeon.h int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk); rdev 1962 drivers/gpu/drm/radeon/radeon.h int (*get_temperature)(struct radeon_device *rdev); rdev 1966 drivers/gpu/drm/radeon/radeon.h int (*init)(struct radeon_device *rdev); rdev 1967 drivers/gpu/drm/radeon/radeon.h void (*setup_asic)(struct radeon_device *rdev); rdev 1968 drivers/gpu/drm/radeon/radeon.h int (*enable)(struct radeon_device *rdev); rdev 1969 drivers/gpu/drm/radeon/radeon.h int (*late_enable)(struct radeon_device *rdev); rdev 1970 drivers/gpu/drm/radeon/radeon.h void (*disable)(struct radeon_device *rdev); rdev 1971 drivers/gpu/drm/radeon/radeon.h int (*pre_set_power_state)(struct radeon_device *rdev); rdev 1972 drivers/gpu/drm/radeon/radeon.h int (*set_power_state)(struct radeon_device *rdev); rdev 1973 drivers/gpu/drm/radeon/radeon.h void (*post_set_power_state)(struct radeon_device *rdev); rdev 1974 drivers/gpu/drm/radeon/radeon.h void (*display_configuration_changed)(struct radeon_device *rdev); rdev 1975 drivers/gpu/drm/radeon/radeon.h void (*fini)(struct radeon_device *rdev); rdev 1976 drivers/gpu/drm/radeon/radeon.h u32 (*get_sclk)(struct radeon_device *rdev, bool low); rdev 1977 drivers/gpu/drm/radeon/radeon.h u32 (*get_mclk)(struct radeon_device *rdev, bool low); rdev 1978 drivers/gpu/drm/radeon/radeon.h void (*print_power_state)(struct radeon_device *rdev, struct radeon_ps *ps); rdev 1979 drivers/gpu/drm/radeon/radeon.h void (*debugfs_print_current_performance_level)(struct radeon_device *rdev, struct seq_file *m); rdev 1980 drivers/gpu/drm/radeon/radeon.h int (*force_performance_level)(struct radeon_device *rdev, enum radeon_dpm_forced_level level); rdev 1981 drivers/gpu/drm/radeon/radeon.h bool (*vblank_too_short)(struct radeon_device *rdev); rdev 1982 drivers/gpu/drm/radeon/radeon.h void (*powergate_uvd)(struct radeon_device *rdev, bool gate); rdev 1983 drivers/gpu/drm/radeon/radeon.h void (*enable_bapm)(struct radeon_device *rdev, bool enable); rdev 1984 drivers/gpu/drm/radeon/radeon.h void (*fan_ctrl_set_mode)(struct radeon_device *rdev, u32 mode); rdev 1985 drivers/gpu/drm/radeon/radeon.h u32 (*fan_ctrl_get_mode)(struct radeon_device *rdev); rdev 1986 drivers/gpu/drm/radeon/radeon.h int (*set_fan_speed_percent)(struct radeon_device *rdev, u32 speed); rdev 1987 drivers/gpu/drm/radeon/radeon.h int (*get_fan_speed_percent)(struct radeon_device *rdev, u32 *speed); rdev 1988 drivers/gpu/drm/radeon/radeon.h u32 (*get_current_sclk)(struct radeon_device *rdev); rdev 1989 drivers/gpu/drm/radeon/radeon.h u32 (*get_current_mclk)(struct radeon_device *rdev); rdev 1993 drivers/gpu/drm/radeon/radeon.h void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base, bool async); rdev 1994 drivers/gpu/drm/radeon/radeon.h bool (*page_flip_pending)(struct radeon_device *rdev, int crtc); rdev 2205 drivers/gpu/drm/radeon/radeon.h void radeon_agp_disable(struct radeon_device *rdev); rdev 2206 drivers/gpu/drm/radeon/radeon.h int radeon_asic_init(struct radeon_device *rdev); rdev 2455 drivers/gpu/drm/radeon/radeon.h int radeon_device_init(struct radeon_device *rdev, rdev 2459 drivers/gpu/drm/radeon/radeon.h void radeon_device_fini(struct radeon_device *rdev); rdev 2460 drivers/gpu/drm/radeon/radeon.h int radeon_gpu_wait_for_idle(struct radeon_device *rdev); rdev 2464 drivers/gpu/drm/radeon/radeon.h uint32_t r100_mm_rreg_slow(struct radeon_device *rdev, uint32_t reg); rdev 2465 drivers/gpu/drm/radeon/radeon.h void r100_mm_wreg_slow(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 2466 drivers/gpu/drm/radeon/radeon.h static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg, rdev 2470 drivers/gpu/drm/radeon/radeon.h if ((reg < rdev->rmmio_size || reg < RADEON_MIN_MMIO_SIZE) && !always_indirect) rdev 2471 drivers/gpu/drm/radeon/radeon.h return readl(((void __iomem *)rdev->rmmio) + reg); rdev 2473 drivers/gpu/drm/radeon/radeon.h return r100_mm_rreg_slow(rdev, reg); rdev 2475 drivers/gpu/drm/radeon/radeon.h static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v, rdev 2478 drivers/gpu/drm/radeon/radeon.h if ((reg < rdev->rmmio_size || reg < RADEON_MIN_MMIO_SIZE) && !always_indirect) rdev 2479 drivers/gpu/drm/radeon/radeon.h writel(v, ((void __iomem *)rdev->rmmio) + reg); rdev 2481 drivers/gpu/drm/radeon/radeon.h r100_mm_wreg_slow(rdev, reg, v); rdev 2484 drivers/gpu/drm/radeon/radeon.h u32 r100_io_rreg(struct radeon_device *rdev, u32 reg); rdev 2485 drivers/gpu/drm/radeon/radeon.h void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2487 drivers/gpu/drm/radeon/radeon.h u32 cik_mm_rdoorbell(struct radeon_device *rdev, u32 index); rdev 2488 drivers/gpu/drm/radeon/radeon.h void cik_mm_wdoorbell(struct radeon_device *rdev, u32 index, u32 v); rdev 2508 drivers/gpu/drm/radeon/radeon.h #define RREG8(reg) readb((rdev->rmmio) + (reg)) rdev 2509 drivers/gpu/drm/radeon/radeon.h #define WREG8(reg, v) writeb(v, (rdev->rmmio) + (reg)) rdev 2510 drivers/gpu/drm/radeon/radeon.h #define RREG16(reg) readw((rdev->rmmio) + (reg)) rdev 2511 drivers/gpu/drm/radeon/radeon.h #define WREG16(reg, v) writew(v, (rdev->rmmio) + (reg)) rdev 2512 drivers/gpu/drm/radeon/radeon.h #define RREG32(reg) r100_mm_rreg(rdev, (reg), false) rdev 2513 drivers/gpu/drm/radeon/radeon.h #define RREG32_IDX(reg) r100_mm_rreg(rdev, (reg), true) rdev 2515 drivers/gpu/drm/radeon/radeon.h r100_mm_rreg(rdev, (reg), false)) rdev 2516 drivers/gpu/drm/radeon/radeon.h #define WREG32(reg, v) r100_mm_wreg(rdev, (reg), (v), false) rdev 2517 drivers/gpu/drm/radeon/radeon.h #define WREG32_IDX(reg, v) r100_mm_wreg(rdev, (reg), (v), true) rdev 2520 drivers/gpu/drm/radeon/radeon.h #define RREG32_PLL(reg) rdev->pll_rreg(rdev, (reg)) rdev 2521 drivers/gpu/drm/radeon/radeon.h #define WREG32_PLL(reg, v) rdev->pll_wreg(rdev, (reg), (v)) rdev 2522 drivers/gpu/drm/radeon/radeon.h #define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg)) rdev 2523 drivers/gpu/drm/radeon/radeon.h #define WREG32_MC(reg, v) rdev->mc_wreg(rdev, (reg), (v)) rdev 2524 drivers/gpu/drm/radeon/radeon.h #define RREG32_PCIE(reg) rv370_pcie_rreg(rdev, (reg)) rdev 2525 drivers/gpu/drm/radeon/radeon.h #define WREG32_PCIE(reg, v) rv370_pcie_wreg(rdev, (reg), (v)) rdev 2526 drivers/gpu/drm/radeon/radeon.h #define RREG32_PCIE_PORT(reg) rdev->pciep_rreg(rdev, (reg)) rdev 2527 drivers/gpu/drm/radeon/radeon.h #define WREG32_PCIE_PORT(reg, v) rdev->pciep_wreg(rdev, (reg), (v)) rdev 2528 drivers/gpu/drm/radeon/radeon.h #define RREG32_SMC(reg) tn_smc_rreg(rdev, (reg)) rdev 2529 drivers/gpu/drm/radeon/radeon.h #define WREG32_SMC(reg, v) tn_smc_wreg(rdev, (reg), (v)) rdev 2530 drivers/gpu/drm/radeon/radeon.h #define RREG32_RCU(reg) r600_rcu_rreg(rdev, (reg)) rdev 2531 drivers/gpu/drm/radeon/radeon.h #define WREG32_RCU(reg, v) r600_rcu_wreg(rdev, (reg), (v)) rdev 2532 drivers/gpu/drm/radeon/radeon.h #define RREG32_CG(reg) eg_cg_rreg(rdev, (reg)) rdev 2533 drivers/gpu/drm/radeon/radeon.h #define WREG32_CG(reg, v) eg_cg_wreg(rdev, (reg), (v)) rdev 2534 drivers/gpu/drm/radeon/radeon.h #define RREG32_PIF_PHY0(reg) eg_pif_phy0_rreg(rdev, (reg)) rdev 2535 drivers/gpu/drm/radeon/radeon.h #define WREG32_PIF_PHY0(reg, v) eg_pif_phy0_wreg(rdev, (reg), (v)) rdev 2536 drivers/gpu/drm/radeon/radeon.h #define RREG32_PIF_PHY1(reg) eg_pif_phy1_rreg(rdev, (reg)) rdev 2537 drivers/gpu/drm/radeon/radeon.h #define WREG32_PIF_PHY1(reg, v) eg_pif_phy1_wreg(rdev, (reg), (v)) rdev 2538 drivers/gpu/drm/radeon/radeon.h #define RREG32_UVD_CTX(reg) r600_uvd_ctx_rreg(rdev, (reg)) rdev 2539 drivers/gpu/drm/radeon/radeon.h #define WREG32_UVD_CTX(reg, v) r600_uvd_ctx_wreg(rdev, (reg), (v)) rdev 2540 drivers/gpu/drm/radeon/radeon.h #define RREG32_DIDT(reg) cik_didt_rreg(rdev, (reg)) rdev 2541 drivers/gpu/drm/radeon/radeon.h #define WREG32_DIDT(reg, v) cik_didt_wreg(rdev, (reg), (v)) rdev 2565 drivers/gpu/drm/radeon/radeon.h #define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg), false)) rdev 2566 drivers/gpu/drm/radeon/radeon.h #define RREG32_IO(reg) r100_io_rreg(rdev, (reg)) rdev 2567 drivers/gpu/drm/radeon/radeon.h #define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v)) rdev 2569 drivers/gpu/drm/radeon/radeon.h #define RDOORBELL32(index) cik_mm_rdoorbell(rdev, (index)) rdev 2570 drivers/gpu/drm/radeon/radeon.h #define WDOORBELL32(index, v) cik_mm_wdoorbell(rdev, (index), (v)) rdev 2580 drivers/gpu/drm/radeon/radeon.h uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg); rdev 2581 drivers/gpu/drm/radeon/radeon.h void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 2582 drivers/gpu/drm/radeon/radeon.h u32 tn_smc_rreg(struct radeon_device *rdev, u32 reg); rdev 2583 drivers/gpu/drm/radeon/radeon.h void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2584 drivers/gpu/drm/radeon/radeon.h u32 r600_rcu_rreg(struct radeon_device *rdev, u32 reg); rdev 2585 drivers/gpu/drm/radeon/radeon.h void r600_rcu_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2586 drivers/gpu/drm/radeon/radeon.h u32 eg_cg_rreg(struct radeon_device *rdev, u32 reg); rdev 2587 drivers/gpu/drm/radeon/radeon.h void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2588 drivers/gpu/drm/radeon/radeon.h u32 eg_pif_phy0_rreg(struct radeon_device *rdev, u32 reg); rdev 2589 drivers/gpu/drm/radeon/radeon.h void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2590 drivers/gpu/drm/radeon/radeon.h u32 eg_pif_phy1_rreg(struct radeon_device *rdev, u32 reg); rdev 2591 drivers/gpu/drm/radeon/radeon.h void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2592 drivers/gpu/drm/radeon/radeon.h u32 r600_uvd_ctx_rreg(struct radeon_device *rdev, u32 reg); rdev 2593 drivers/gpu/drm/radeon/radeon.h void r600_uvd_ctx_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2594 drivers/gpu/drm/radeon/radeon.h u32 cik_didt_rreg(struct radeon_device *rdev, u32 reg); rdev 2595 drivers/gpu/drm/radeon/radeon.h void cik_didt_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 2597 drivers/gpu/drm/radeon/radeon.h void r100_pll_errata_after_index(struct radeon_device *rdev); rdev 2603 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_RN50(rdev) ((rdev->pdev->device == 0x515e) || \ rdev 2604 drivers/gpu/drm/radeon/radeon.h (rdev->pdev->device == 0x5969)) rdev 2605 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_RV100(rdev) ((rdev->family == CHIP_RV100) || \ rdev 2606 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RV200) || \ rdev 2607 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RS100) || \ rdev 2608 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RS200) || \ rdev 2609 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RV250) || \ rdev 2610 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RV280) || \ rdev 2611 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RS300)) rdev 2612 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_R300(rdev) ((rdev->family == CHIP_R300) || \ rdev 2613 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RV350) || \ rdev 2614 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_R350) || \ rdev 2615 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RV380) || \ rdev 2616 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_R420) || \ rdev 2617 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_R423) || \ rdev 2618 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RV410) || \ rdev 2619 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RS400) || \ rdev 2620 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RS480)) rdev 2621 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_X2(rdev) ((rdev->ddev->pdev->device == 0x9441) || \ rdev 2622 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x9443) || \ rdev 2623 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x944B) || \ rdev 2624 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x9506) || \ rdev 2625 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x9509) || \ rdev 2626 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x950F) || \ rdev 2627 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x689C) || \ rdev 2628 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x689D)) rdev 2629 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_AVIVO(rdev) ((rdev->family >= CHIP_RS600)) rdev 2630 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE2(rdev) ((rdev->family == CHIP_RS600) || \ rdev 2631 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RS690) || \ rdev 2632 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_RS740) || \ rdev 2633 drivers/gpu/drm/radeon/radeon.h (rdev->family >= CHIP_R600)) rdev 2634 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE3(rdev) ((rdev->family >= CHIP_RV620)) rdev 2635 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE32(rdev) ((rdev->family >= CHIP_RV730)) rdev 2636 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE4(rdev) ((rdev->family >= CHIP_CEDAR)) rdev 2637 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE41(rdev) ((rdev->family >= CHIP_PALM) && \ rdev 2638 drivers/gpu/drm/radeon/radeon.h (rdev->flags & RADEON_IS_IGP)) rdev 2639 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE5(rdev) ((rdev->family >= CHIP_BARTS)) rdev 2640 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE6(rdev) ((rdev->family >= CHIP_ARUBA)) rdev 2641 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE61(rdev) ((rdev->family >= CHIP_ARUBA) && \ rdev 2642 drivers/gpu/drm/radeon/radeon.h (rdev->flags & RADEON_IS_IGP)) rdev 2643 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE64(rdev) ((rdev->family == CHIP_OLAND)) rdev 2644 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_NODCE(rdev) ((rdev->family == CHIP_HAINAN)) rdev 2645 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE)) rdev 2646 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI)) rdev 2647 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE)) rdev 2648 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI) || \ rdev 2649 drivers/gpu/drm/radeon/radeon.h (rdev->family == CHIP_MULLINS)) rdev 2651 drivers/gpu/drm/radeon/radeon.h #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \ rdev 2652 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x6850) || \ rdev 2653 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x6858) || \ rdev 2654 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x6859) || \ rdev 2655 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x6840) || \ rdev 2656 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x6841) || \ rdev 2657 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x6842) || \ rdev 2658 drivers/gpu/drm/radeon/radeon.h (rdev->ddev->pdev->device == 0x6843)) rdev 2663 drivers/gpu/drm/radeon/radeon.h #define RBIOS8(i) (rdev->bios[i]) rdev 2667 drivers/gpu/drm/radeon/radeon.h int radeon_combios_init(struct radeon_device *rdev); rdev 2668 drivers/gpu/drm/radeon/radeon.h void radeon_combios_fini(struct radeon_device *rdev); rdev 2669 drivers/gpu/drm/radeon/radeon.h int radeon_atombios_init(struct radeon_device *rdev); rdev 2670 drivers/gpu/drm/radeon/radeon.h void radeon_atombios_fini(struct radeon_device *rdev); rdev 2699 drivers/gpu/drm/radeon/radeon.h #define radeon_init(rdev) (rdev)->asic->init((rdev)) rdev 2700 drivers/gpu/drm/radeon/radeon.h #define radeon_fini(rdev) (rdev)->asic->fini((rdev)) rdev 2701 drivers/gpu/drm/radeon/radeon.h #define radeon_resume(rdev) (rdev)->asic->resume((rdev)) rdev 2702 drivers/gpu/drm/radeon/radeon.h #define radeon_suspend(rdev) (rdev)->asic->suspend((rdev)) rdev 2703 drivers/gpu/drm/radeon/radeon.h #define radeon_cs_parse(rdev, r, p) (rdev)->asic->ring[(r)]->cs_parse((p)) rdev 2704 drivers/gpu/drm/radeon/radeon.h #define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state)) rdev 2705 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev), false) rdev 2706 drivers/gpu/drm/radeon/radeon.h #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) rdev 2707 drivers/gpu/drm/radeon/radeon.h #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f)) rdev 2708 drivers/gpu/drm/radeon/radeon.h #define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e)) rdev 2709 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev)) rdev 2710 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev)) rdev 2711 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_copy_pages(rdev, ib, pe, src, count) ((rdev)->asic->vm.copy_pages((rdev), (ib), (pe), (src), (count))) rdev 2712 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_write_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.write_pages((rdev), (ib), (pe), (addr), (count), (incr), (flags))) rdev 2713 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_set_pages(rdev, ib, pe, addr, count, incr, flags) ((rdev)->asic->vm.set_pages((rdev), (ib), (pe), (addr), (count), (incr), (flags))) rdev 2714 drivers/gpu/drm/radeon/radeon.h #define radeon_asic_vm_pad_ib(rdev, ib) ((rdev)->asic->vm.pad_ib((ib))) rdev 2715 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)]->ring_start((rdev), (cp)) rdev 2716 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)]->ring_test((rdev), (cp)) rdev 2717 drivers/gpu/drm/radeon/radeon.h #define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)]->ib_test((rdev), (cp)) rdev 2718 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)]->ib_execute((rdev), (ib)) rdev 2719 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)]->ib_parse((rdev), (ib)) rdev 2720 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_is_lockup(rdev, r, cp) (rdev)->asic->ring[(r)]->is_lockup((rdev), (cp)) rdev 2721 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_vm_flush(rdev, r, vm_id, pd_addr) (rdev)->asic->ring[(r)->idx]->vm_flush((rdev), (r), (vm_id), (pd_addr)) rdev 2722 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_get_rptr(rdev, r) (rdev)->asic->ring[(r)->idx]->get_rptr((rdev), (r)) rdev 2723 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_get_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->get_wptr((rdev), (r)) rdev 2724 drivers/gpu/drm/radeon/radeon.h #define radeon_ring_set_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->set_wptr((rdev), (r)) rdev 2725 drivers/gpu/drm/radeon/radeon.h #define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev)) rdev 2726 drivers/gpu/drm/radeon/radeon.h #define radeon_irq_process(rdev) (rdev)->asic->irq.process((rdev)) rdev 2727 drivers/gpu/drm/radeon/radeon.h #define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc)) rdev 2728 drivers/gpu/drm/radeon/radeon.h #define radeon_set_backlight_level(rdev, e, l) (rdev)->asic->display.set_backlight_level((e), (l)) rdev 2729 drivers/gpu/drm/radeon/radeon.h #define radeon_get_backlight_level(rdev, e) (rdev)->asic->display.get_backlight_level((e)) rdev 2730 drivers/gpu/drm/radeon/radeon.h #define radeon_hdmi_enable(rdev, e, b) (rdev)->asic->display.hdmi_enable((e), (b)) rdev 2731 drivers/gpu/drm/radeon/radeon.h #define radeon_hdmi_setmode(rdev, e, m) (rdev)->asic->display.hdmi_setmode((e), (m)) rdev 2732 drivers/gpu/drm/radeon/radeon.h #define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)]->emit_fence((rdev), (fence)) rdev 2733 drivers/gpu/drm/radeon/radeon.h #define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)]->emit_semaphore((rdev), (cp), (semaphore), (emit_wait)) rdev 2734 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_blit(rdev, s, d, np, resv) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (resv)) rdev 2735 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_dma(rdev, s, d, np, resv) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (resv)) rdev 2736 drivers/gpu/drm/radeon/radeon.h #define radeon_copy(rdev, s, d, np, resv) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (resv)) rdev 2737 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index rdev 2738 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index rdev 2739 drivers/gpu/drm/radeon/radeon.h #define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index rdev 2740 drivers/gpu/drm/radeon/radeon.h #define radeon_get_engine_clock(rdev) (rdev)->asic->pm.get_engine_clock((rdev)) rdev 2741 drivers/gpu/drm/radeon/radeon.h #define radeon_set_engine_clock(rdev, e) (rdev)->asic->pm.set_engine_clock((rdev), (e)) rdev 2742 drivers/gpu/drm/radeon/radeon.h #define radeon_get_memory_clock(rdev) (rdev)->asic->pm.get_memory_clock((rdev)) rdev 2743 drivers/gpu/drm/radeon/radeon.h #define radeon_set_memory_clock(rdev, e) (rdev)->asic->pm.set_memory_clock((rdev), (e)) rdev 2744 drivers/gpu/drm/radeon/radeon.h #define radeon_get_pcie_lanes(rdev) (rdev)->asic->pm.get_pcie_lanes((rdev)) rdev 2745 drivers/gpu/drm/radeon/radeon.h #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) rdev 2746 drivers/gpu/drm/radeon/radeon.h #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) rdev 2747 drivers/gpu/drm/radeon/radeon.h #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) rdev 2748 drivers/gpu/drm/radeon/radeon.h #define radeon_set_vce_clocks(rdev, ev, ec) (rdev)->asic->pm.set_vce_clocks((rdev), (ev), (ec)) rdev 2749 drivers/gpu/drm/radeon/radeon.h #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) rdev 2750 drivers/gpu/drm/radeon/radeon.h #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) rdev 2751 drivers/gpu/drm/radeon/radeon.h #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) rdev 2752 drivers/gpu/drm/radeon/radeon.h #define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) rdev 2753 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev)) rdev 2754 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev)) rdev 2755 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h)) rdev 2756 drivers/gpu/drm/radeon/radeon.h #define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h)) rdev 2757 drivers/gpu/drm/radeon/radeon.h #define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev)) rdev 2758 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_misc(rdev) (rdev)->asic->pm.misc((rdev)) rdev 2759 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_prepare(rdev) (rdev)->asic->pm.prepare((rdev)) rdev 2760 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_finish(rdev) (rdev)->asic->pm.finish((rdev)) rdev 2761 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev)) rdev 2762 drivers/gpu/drm/radeon/radeon.h #define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev)) rdev 2763 drivers/gpu/drm/radeon/radeon.h #define radeon_page_flip(rdev, crtc, base, async) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base), (async)) rdev 2764 drivers/gpu/drm/radeon/radeon.h #define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc)) rdev 2765 drivers/gpu/drm/radeon/radeon.h #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc)) rdev 2766 drivers/gpu/drm/radeon/radeon.h #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev)) rdev 2767 drivers/gpu/drm/radeon/radeon.h #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev)) rdev 2768 drivers/gpu/drm/radeon/radeon.h #define radeon_get_gpu_clock_counter(rdev) (rdev)->asic->get_gpu_clock_counter((rdev)) rdev 2769 drivers/gpu/drm/radeon/radeon.h #define radeon_get_allowed_info_register(rdev, r, v) (rdev)->asic->get_allowed_info_register((rdev), (r), (v)) rdev 2770 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev)) rdev 2771 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_setup_asic(rdev) rdev->asic->dpm.setup_asic((rdev)) rdev 2772 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_enable(rdev) rdev->asic->dpm.enable((rdev)) rdev 2773 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_late_enable(rdev) rdev->asic->dpm.late_enable((rdev)) rdev 2774 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_disable(rdev) rdev->asic->dpm.disable((rdev)) rdev 2775 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_pre_set_power_state(rdev) rdev->asic->dpm.pre_set_power_state((rdev)) rdev 2776 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_set_power_state(rdev) rdev->asic->dpm.set_power_state((rdev)) rdev 2777 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_post_set_power_state(rdev) rdev->asic->dpm.post_set_power_state((rdev)) rdev 2778 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_display_configuration_changed(rdev) rdev->asic->dpm.display_configuration_changed((rdev)) rdev 2779 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_fini(rdev) rdev->asic->dpm.fini((rdev)) rdev 2780 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_sclk(rdev, l) rdev->asic->dpm.get_sclk((rdev), (l)) rdev 2781 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_mclk(rdev, l) rdev->asic->dpm.get_mclk((rdev), (l)) rdev 2782 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_print_power_state(rdev, ps) rdev->asic->dpm.print_power_state((rdev), (ps)) rdev 2783 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_debugfs_print_current_performance_level(rdev, m) rdev->asic->dpm.debugfs_print_current_performance_level((rdev), (m)) rdev 2784 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_force_performance_level(rdev, l) rdev->asic->dpm.force_performance_level((rdev), (l)) rdev 2785 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev)) rdev 2786 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g)) rdev 2787 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_enable_bapm(rdev, e) rdev->asic->dpm.enable_bapm((rdev), (e)) rdev 2788 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_current_sclk(rdev) rdev->asic->dpm.get_current_sclk((rdev)) rdev 2789 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_current_mclk(rdev) rdev->asic->dpm.get_current_mclk((rdev)) rdev 2793 drivers/gpu/drm/radeon/radeon.h extern int radeon_gpu_reset(struct radeon_device *rdev); rdev 2794 drivers/gpu/drm/radeon/radeon.h extern void radeon_pci_config_reset(struct radeon_device *rdev); rdev 2795 drivers/gpu/drm/radeon/radeon.h extern void r600_set_bios_scratch_engine_hung(struct radeon_device *rdev, bool hung); rdev 2796 drivers/gpu/drm/radeon/radeon.h extern void radeon_agp_disable(struct radeon_device *rdev); rdev 2797 drivers/gpu/drm/radeon/radeon.h extern int radeon_modeset_init(struct radeon_device *rdev); rdev 2798 drivers/gpu/drm/radeon/radeon.h extern void radeon_modeset_fini(struct radeon_device *rdev); rdev 2799 drivers/gpu/drm/radeon/radeon.h extern bool radeon_card_posted(struct radeon_device *rdev); rdev 2800 drivers/gpu/drm/radeon/radeon.h extern void radeon_update_bandwidth_info(struct radeon_device *rdev); rdev 2801 drivers/gpu/drm/radeon/radeon.h extern void radeon_update_display_priority(struct radeon_device *rdev); rdev 2802 drivers/gpu/drm/radeon/radeon.h extern bool radeon_boot_test_post_card(struct radeon_device *rdev); rdev 2803 drivers/gpu/drm/radeon/radeon.h extern void radeon_scratch_init(struct radeon_device *rdev); rdev 2804 drivers/gpu/drm/radeon/radeon.h extern void radeon_wb_fini(struct radeon_device *rdev); rdev 2805 drivers/gpu/drm/radeon/radeon.h extern int radeon_wb_init(struct radeon_device *rdev); rdev 2806 drivers/gpu/drm/radeon/radeon.h extern void radeon_wb_disable(struct radeon_device *rdev); rdev 2807 drivers/gpu/drm/radeon/radeon.h extern void radeon_surface_init(struct radeon_device *rdev); rdev 2809 drivers/gpu/drm/radeon/radeon.h extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); rdev 2810 drivers/gpu/drm/radeon/radeon.h extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); rdev 2817 drivers/gpu/drm/radeon/radeon.h extern void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base); rdev 2818 drivers/gpu/drm/radeon/radeon.h extern void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); rdev 2822 drivers/gpu/drm/radeon/radeon.h extern void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size); rdev 2823 drivers/gpu/drm/radeon/radeon.h extern void radeon_program_register_sequence(struct radeon_device *rdev, rdev 2830 drivers/gpu/drm/radeon/radeon.h int radeon_vm_manager_init(struct radeon_device *rdev); rdev 2831 drivers/gpu/drm/radeon/radeon.h void radeon_vm_manager_fini(struct radeon_device *rdev); rdev 2832 drivers/gpu/drm/radeon/radeon.h int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm); rdev 2833 drivers/gpu/drm/radeon/radeon.h void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm); rdev 2834 drivers/gpu/drm/radeon/radeon.h struct radeon_bo_list *radeon_vm_get_bos(struct radeon_device *rdev, rdev 2837 drivers/gpu/drm/radeon/radeon.h struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev, rdev 2839 drivers/gpu/drm/radeon/radeon.h void radeon_vm_flush(struct radeon_device *rdev, rdev 2842 drivers/gpu/drm/radeon/radeon.h void radeon_vm_fence(struct radeon_device *rdev, rdev 2845 drivers/gpu/drm/radeon/radeon.h uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr); rdev 2846 drivers/gpu/drm/radeon/radeon.h int radeon_vm_update_page_directory(struct radeon_device *rdev, rdev 2848 drivers/gpu/drm/radeon/radeon.h int radeon_vm_clear_freed(struct radeon_device *rdev, rdev 2850 drivers/gpu/drm/radeon/radeon.h int radeon_vm_clear_invalids(struct radeon_device *rdev, rdev 2852 drivers/gpu/drm/radeon/radeon.h int radeon_vm_bo_update(struct radeon_device *rdev, rdev 2855 drivers/gpu/drm/radeon/radeon.h void radeon_vm_bo_invalidate(struct radeon_device *rdev, rdev 2859 drivers/gpu/drm/radeon/radeon.h struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev, rdev 2862 drivers/gpu/drm/radeon/radeon.h int radeon_vm_bo_set_addr(struct radeon_device *rdev, rdev 2866 drivers/gpu/drm/radeon/radeon.h void radeon_vm_bo_rmv(struct radeon_device *rdev, rdev 2871 drivers/gpu/drm/radeon/radeon.h struct r600_audio_pin *r600_audio_get_pin(struct radeon_device *rdev); rdev 2872 drivers/gpu/drm/radeon/radeon.h struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev); rdev 2873 drivers/gpu/drm/radeon/radeon.h void r600_audio_enable(struct radeon_device *rdev, rdev 2876 drivers/gpu/drm/radeon/radeon.h void dce6_audio_enable(struct radeon_device *rdev, rdev 2883 drivers/gpu/drm/radeon/radeon.h int r600_vram_scratch_init(struct radeon_device *rdev); rdev 2884 drivers/gpu/drm/radeon/radeon.h void r600_vram_scratch_fini(struct radeon_device *rdev); rdev 2915 drivers/gpu/drm/radeon/radeon.h extern u32 r6xx_remap_render_backend(struct radeon_device *rdev, rdev 2925 drivers/gpu/drm/radeon/radeon.h extern int ni_init_microcode(struct radeon_device *rdev); rdev 2926 drivers/gpu/drm/radeon/radeon.h extern int ni_mc_load_microcode(struct radeon_device *rdev); rdev 2930 drivers/gpu/drm/radeon/radeon.h extern int radeon_acpi_init(struct radeon_device *rdev); rdev 2931 drivers/gpu/drm/radeon/radeon.h extern void radeon_acpi_fini(struct radeon_device *rdev); rdev 2932 drivers/gpu/drm/radeon/radeon.h extern bool radeon_acpi_is_pcie_performance_request_supported(struct radeon_device *rdev); rdev 2933 drivers/gpu/drm/radeon/radeon.h extern int radeon_acpi_pcie_performance_request(struct radeon_device *rdev, rdev 2935 drivers/gpu/drm/radeon/radeon.h extern int radeon_acpi_pcie_notify_device_ready(struct radeon_device *rdev); rdev 2937 drivers/gpu/drm/radeon/radeon.h static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; } rdev 2938 drivers/gpu/drm/radeon/radeon.h static inline void radeon_acpi_fini(struct radeon_device *rdev) { } rdev 2955 drivers/gpu/drm/radeon/radeon.h void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev, rdev 48 drivers/gpu/drm/radeon/radeon_acpi.c extern void radeon_pm_acpi_event_handler(struct radeon_device *rdev); rdev 358 drivers/gpu/drm/radeon/radeon_acpi.c static int radeon_atif_handler(struct radeon_device *rdev, rdev 361 drivers/gpu/drm/radeon/radeon_acpi.c struct radeon_atif *atif = &rdev->atif; rdev 378 drivers/gpu/drm/radeon/radeon_acpi.c handle = ACPI_HANDLE(&rdev->pdev->dev); rdev 393 drivers/gpu/drm/radeon/radeon_acpi.c radeon_set_backlight_level(rdev, enc, req.backlight_level); rdev 396 drivers/gpu/drm/radeon/radeon_acpi.c if (rdev->is_atom_bios) { rdev 409 drivers/gpu/drm/radeon/radeon_acpi.c if ((rdev->flags & RADEON_IS_PX) && rdev 411 drivers/gpu/drm/radeon/radeon_acpi.c pm_runtime_get_sync(rdev->ddev->dev); rdev 413 drivers/gpu/drm/radeon/radeon_acpi.c drm_helper_hpd_irq_event(rdev->ddev); rdev 414 drivers/gpu/drm/radeon/radeon_acpi.c pm_runtime_mark_last_busy(rdev->ddev->dev); rdev 415 drivers/gpu/drm/radeon/radeon_acpi.c pm_runtime_put_autosuspend(rdev->ddev->dev); rdev 549 drivers/gpu/drm/radeon/radeon_acpi.c bool radeon_acpi_is_pcie_performance_request_supported(struct radeon_device *rdev) rdev 551 drivers/gpu/drm/radeon/radeon_acpi.c struct radeon_atcs *atcs = &rdev->atcs; rdev 568 drivers/gpu/drm/radeon/radeon_acpi.c int radeon_acpi_pcie_notify_device_ready(struct radeon_device *rdev) rdev 572 drivers/gpu/drm/radeon/radeon_acpi.c struct radeon_atcs *atcs = &rdev->atcs; rdev 575 drivers/gpu/drm/radeon/radeon_acpi.c handle = ACPI_HANDLE(&rdev->pdev->dev); rdev 602 drivers/gpu/drm/radeon/radeon_acpi.c int radeon_acpi_pcie_performance_request(struct radeon_device *rdev, rdev 607 drivers/gpu/drm/radeon/radeon_acpi.c struct radeon_atcs *atcs = &rdev->atcs; rdev 615 drivers/gpu/drm/radeon/radeon_acpi.c handle = ACPI_HANDLE(&rdev->pdev->dev); rdev 624 drivers/gpu/drm/radeon/radeon_acpi.c atcs_input.client_id = rdev->pdev->devfn | (rdev->pdev->bus->number << 8); rdev 684 drivers/gpu/drm/radeon/radeon_acpi.c struct radeon_device *rdev = container_of(nb, struct radeon_device, acpi_nb); rdev 693 drivers/gpu/drm/radeon/radeon_acpi.c radeon_pm_acpi_event_handler(rdev); rdev 697 drivers/gpu/drm/radeon/radeon_acpi.c return radeon_atif_handler(rdev, entry); rdev 710 drivers/gpu/drm/radeon/radeon_acpi.c int radeon_acpi_init(struct radeon_device *rdev) rdev 713 drivers/gpu/drm/radeon/radeon_acpi.c struct radeon_atif *atif = &rdev->atif; rdev 714 drivers/gpu/drm/radeon/radeon_acpi.c struct radeon_atcs *atcs = &rdev->atcs; rdev 718 drivers/gpu/drm/radeon/radeon_acpi.c handle = ACPI_HANDLE(&rdev->pdev->dev); rdev 721 drivers/gpu/drm/radeon/radeon_acpi.c if (!ASIC_IS_AVIVO(rdev) || !rdev->bios || !handle) rdev 742 drivers/gpu/drm/radeon/radeon_acpi.c list_for_each_entry(tmp, &rdev->ddev->mode_config.encoder_list, rdev 748 drivers/gpu/drm/radeon/radeon_acpi.c if (rdev->is_atom_bios) { rdev 787 drivers/gpu/drm/radeon/radeon_acpi.c rdev->acpi_nb.notifier_call = radeon_acpi_event; rdev 788 drivers/gpu/drm/radeon/radeon_acpi.c register_acpi_notifier(&rdev->acpi_nb); rdev 800 drivers/gpu/drm/radeon/radeon_acpi.c void radeon_acpi_fini(struct radeon_device *rdev) rdev 802 drivers/gpu/drm/radeon/radeon_acpi.c unregister_acpi_notifier(&rdev->acpi_nb); rdev 131 drivers/gpu/drm/radeon/radeon_agp.c int radeon_agp_init(struct radeon_device *rdev) rdev 143 drivers/gpu/drm/radeon/radeon_agp.c ret = drm_agp_acquire(rdev->ddev); rdev 149 drivers/gpu/drm/radeon/radeon_agp.c ret = drm_agp_info(rdev->ddev, &info); rdev 151 drivers/gpu/drm/radeon/radeon_agp.c drm_agp_release(rdev->ddev); rdev 156 drivers/gpu/drm/radeon/radeon_agp.c if (rdev->ddev->agp->agp_info.aper_size < 32) { rdev 157 drivers/gpu/drm/radeon/radeon_agp.c drm_agp_release(rdev->ddev); rdev 158 drivers/gpu/drm/radeon/radeon_agp.c dev_warn(rdev->dev, "AGP aperture too small (%zuM) " rdev 160 drivers/gpu/drm/radeon/radeon_agp.c rdev->ddev->agp->agp_info.aper_size); rdev 168 drivers/gpu/drm/radeon/radeon_agp.c if (rdev->family <= CHIP_RV350) rdev 190 drivers/gpu/drm/radeon/radeon_agp.c rdev->pdev->vendor == p->chip_vendor && rdev 191 drivers/gpu/drm/radeon/radeon_agp.c rdev->pdev->device == p->chip_device && rdev 192 drivers/gpu/drm/radeon/radeon_agp.c rdev->pdev->subsystem_vendor == p->subsys_vendor && rdev 193 drivers/gpu/drm/radeon/radeon_agp.c rdev->pdev->subsystem_device == p->subsys_device) { rdev 241 drivers/gpu/drm/radeon/radeon_agp.c ret = drm_agp_enable(rdev->ddev, mode); rdev 244 drivers/gpu/drm/radeon/radeon_agp.c drm_agp_release(rdev->ddev); rdev 248 drivers/gpu/drm/radeon/radeon_agp.c rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; rdev 249 drivers/gpu/drm/radeon/radeon_agp.c rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20; rdev 250 drivers/gpu/drm/radeon/radeon_agp.c rdev->mc.gtt_start = rdev->mc.agp_base; rdev 251 drivers/gpu/drm/radeon/radeon_agp.c rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; rdev 252 drivers/gpu/drm/radeon/radeon_agp.c dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", rdev 253 drivers/gpu/drm/radeon/radeon_agp.c rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); rdev 256 drivers/gpu/drm/radeon/radeon_agp.c if (rdev->family < CHIP_R200) { rdev 265 drivers/gpu/drm/radeon/radeon_agp.c void radeon_agp_resume(struct radeon_device *rdev) rdev 269 drivers/gpu/drm/radeon/radeon_agp.c if (rdev->flags & RADEON_IS_AGP) { rdev 270 drivers/gpu/drm/radeon/radeon_agp.c r = radeon_agp_init(rdev); rdev 272 drivers/gpu/drm/radeon/radeon_agp.c dev_warn(rdev->dev, "radeon AGP reinit failed\n"); rdev 277 drivers/gpu/drm/radeon/radeon_agp.c void radeon_agp_fini(struct radeon_device *rdev) rdev 280 drivers/gpu/drm/radeon/radeon_agp.c if (rdev->ddev->agp && rdev->ddev->agp->acquired) { rdev 281 drivers/gpu/drm/radeon/radeon_agp.c drm_agp_release(rdev->ddev); rdev 286 drivers/gpu/drm/radeon/radeon_agp.c void radeon_agp_suspend(struct radeon_device *rdev) rdev 288 drivers/gpu/drm/radeon/radeon_agp.c radeon_agp_fini(rdev); rdev 54 drivers/gpu/drm/radeon/radeon_asic.c static uint32_t radeon_invalid_rreg(struct radeon_device *rdev, uint32_t reg) rdev 71 drivers/gpu/drm/radeon/radeon_asic.c static void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 86 drivers/gpu/drm/radeon/radeon_asic.c static void radeon_register_accessor_init(struct radeon_device *rdev) rdev 88 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_rreg = &radeon_invalid_rreg; rdev 89 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_wreg = &radeon_invalid_wreg; rdev 90 drivers/gpu/drm/radeon/radeon_asic.c rdev->pll_rreg = &radeon_invalid_rreg; rdev 91 drivers/gpu/drm/radeon/radeon_asic.c rdev->pll_wreg = &radeon_invalid_wreg; rdev 92 drivers/gpu/drm/radeon/radeon_asic.c rdev->pciep_rreg = &radeon_invalid_rreg; rdev 93 drivers/gpu/drm/radeon/radeon_asic.c rdev->pciep_wreg = &radeon_invalid_wreg; rdev 96 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family < CHIP_RV515) { rdev 97 drivers/gpu/drm/radeon/radeon_asic.c rdev->pcie_reg_mask = 0xff; rdev 99 drivers/gpu/drm/radeon/radeon_asic.c rdev->pcie_reg_mask = 0x7ff; rdev 102 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family <= CHIP_R580) { rdev 103 drivers/gpu/drm/radeon/radeon_asic.c rdev->pll_rreg = &r100_pll_rreg; rdev 104 drivers/gpu/drm/radeon/radeon_asic.c rdev->pll_wreg = &r100_pll_wreg; rdev 106 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family >= CHIP_R420) { rdev 107 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_rreg = &r420_mc_rreg; rdev 108 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_wreg = &r420_mc_wreg; rdev 110 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family >= CHIP_RV515) { rdev 111 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_rreg = &rv515_mc_rreg; rdev 112 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_wreg = &rv515_mc_wreg; rdev 114 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) { rdev 115 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_rreg = &rs400_mc_rreg; rdev 116 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_wreg = &rs400_mc_wreg; rdev 118 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { rdev 119 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_rreg = &rs690_mc_rreg; rdev 120 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_wreg = &rs690_mc_wreg; rdev 122 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_RS600) { rdev 123 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_rreg = &rs600_mc_rreg; rdev 124 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_wreg = &rs600_mc_wreg; rdev 126 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { rdev 127 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_rreg = &rs780_mc_rreg; rdev 128 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc_wreg = &rs780_mc_wreg; rdev 131 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family >= CHIP_BONAIRE) { rdev 132 drivers/gpu/drm/radeon/radeon_asic.c rdev->pciep_rreg = &cik_pciep_rreg; rdev 133 drivers/gpu/drm/radeon/radeon_asic.c rdev->pciep_wreg = &cik_pciep_wreg; rdev 134 drivers/gpu/drm/radeon/radeon_asic.c } else if (rdev->family >= CHIP_R600) { rdev 135 drivers/gpu/drm/radeon/radeon_asic.c rdev->pciep_rreg = &r600_pciep_rreg; rdev 136 drivers/gpu/drm/radeon/radeon_asic.c rdev->pciep_wreg = &r600_pciep_wreg; rdev 140 drivers/gpu/drm/radeon/radeon_asic.c static int radeon_invalid_get_allowed_info_register(struct radeon_device *rdev, rdev 155 drivers/gpu/drm/radeon/radeon_asic.c void radeon_agp_disable(struct radeon_device *rdev) rdev 157 drivers/gpu/drm/radeon/radeon_asic.c rdev->flags &= ~RADEON_IS_AGP; rdev 158 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family >= CHIP_R600) { rdev 160 drivers/gpu/drm/radeon/radeon_asic.c rdev->flags |= RADEON_IS_PCIE; rdev 161 drivers/gpu/drm/radeon/radeon_asic.c } else if (rdev->family >= CHIP_RV515 || rdev 162 drivers/gpu/drm/radeon/radeon_asic.c rdev->family == CHIP_RV380 || rdev 163 drivers/gpu/drm/radeon/radeon_asic.c rdev->family == CHIP_RV410 || rdev 164 drivers/gpu/drm/radeon/radeon_asic.c rdev->family == CHIP_R423) { rdev 166 drivers/gpu/drm/radeon/radeon_asic.c rdev->flags |= RADEON_IS_PCIE; rdev 167 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; rdev 168 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; rdev 169 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; rdev 172 drivers/gpu/drm/radeon/radeon_asic.c rdev->flags |= RADEON_IS_PCI; rdev 173 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; rdev 174 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; rdev 175 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->gart.set_page = &r100_pci_gart_set_page; rdev 177 drivers/gpu/drm/radeon/radeon_asic.c rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; rdev 2318 drivers/gpu/drm/radeon/radeon_asic.c int radeon_asic_init(struct radeon_device *rdev) rdev 2320 drivers/gpu/drm/radeon/radeon_asic.c radeon_register_accessor_init(rdev); rdev 2323 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->flags & RADEON_SINGLE_CRTC) rdev 2324 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 1; rdev 2326 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 2; rdev 2328 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = false; rdev 2329 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_vce = false; rdev 2331 drivers/gpu/drm/radeon/radeon_asic.c switch (rdev->family) { rdev 2337 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r100_asic; rdev 2343 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r200_asic; rdev 2349 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->flags & RADEON_IS_PCIE) rdev 2350 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r300_asic_pcie; rdev 2352 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r300_asic; rdev 2357 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r420_asic; rdev 2359 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->bios == NULL) { rdev 2360 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.get_engine_clock = &radeon_legacy_get_engine_clock; rdev 2361 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.set_engine_clock = &radeon_legacy_set_engine_clock; rdev 2362 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.get_memory_clock = &radeon_legacy_get_memory_clock; rdev 2363 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.set_memory_clock = NULL; rdev 2364 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->display.set_backlight_level = &radeon_legacy_set_backlight_level; rdev 2369 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs400_asic; rdev 2372 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs600_asic; rdev 2376 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs690_asic; rdev 2379 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rv515_asic; rdev 2386 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r520_asic; rdev 2389 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &r600_asic; rdev 2396 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rv6xx_asic; rdev 2397 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2401 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rs780_asic; rdev 2403 drivers/gpu/drm/radeon/radeon_asic.c if ((rdev->pdev->device == 0x9616)|| rdev 2404 drivers/gpu/drm/radeon/radeon_asic.c (rdev->pdev->device == 0x9611)|| rdev 2405 drivers/gpu/drm/radeon/radeon_asic.c (rdev->pdev->device == 0x9613)|| rdev 2406 drivers/gpu/drm/radeon/radeon_asic.c (rdev->pdev->device == 0x9711)|| rdev 2407 drivers/gpu/drm/radeon/radeon_asic.c (rdev->pdev->device == 0x9713)) rdev 2408 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = false; rdev 2410 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2416 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &rv770_asic; rdev 2417 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2425 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_CEDAR) rdev 2426 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 4; rdev 2428 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 6; rdev 2429 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &evergreen_asic; rdev 2430 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2435 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &sumo_asic; rdev 2436 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2442 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_CAICOS) rdev 2443 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 4; rdev 2445 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 6; rdev 2446 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &btc_asic; rdev 2447 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2450 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &cayman_asic; rdev 2452 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 6; rdev 2453 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2456 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &trinity_asic; rdev 2458 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 4; rdev 2459 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2460 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_vce = true; rdev 2461 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2469 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &si_asic; rdev 2471 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_HAINAN) rdev 2472 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 0; rdev 2473 drivers/gpu/drm/radeon/radeon_asic.c else if (rdev->family == CHIP_OLAND) rdev 2474 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 2; rdev 2476 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 6; rdev 2477 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_HAINAN) { rdev 2478 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = false; rdev 2479 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_vce = false; rdev 2481 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2482 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_vce = true; rdev 2484 drivers/gpu/drm/radeon/radeon_asic.c switch (rdev->family) { rdev 2486 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2500 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2503 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2519 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2522 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2538 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0 | rdev 2543 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2558 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2561 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2575 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2578 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = 0; rdev 2579 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2585 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &ci_asic; rdev 2586 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 6; rdev 2587 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2588 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_vce = true; rdev 2589 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_BONAIRE) { rdev 2590 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2607 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2609 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2625 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2631 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic = &kv_asic; rdev 2633 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->family == CHIP_KAVERI) { rdev 2634 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 4; rdev 2635 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2650 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2662 drivers/gpu/drm/radeon/radeon_asic.c rdev->num_crtc = 2; rdev 2663 drivers/gpu/drm/radeon/radeon_asic.c rdev->cg_flags = rdev 2678 drivers/gpu/drm/radeon/radeon_asic.c rdev->pg_flags = 0; rdev 2688 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = true; rdev 2689 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_vce = true; rdev 2696 drivers/gpu/drm/radeon/radeon_asic.c if (rdev->flags & RADEON_IS_IGP) { rdev 2697 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.get_memory_clock = NULL; rdev 2698 drivers/gpu/drm/radeon/radeon_asic.c rdev->asic->pm.set_memory_clock = NULL; rdev 2702 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_uvd = false; rdev 2704 drivers/gpu/drm/radeon/radeon_asic.c rdev->has_vce = false; rdev 34 drivers/gpu/drm/radeon/radeon_asic.h uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); rdev 35 drivers/gpu/drm/radeon/radeon_asic.h void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); rdev 36 drivers/gpu/drm/radeon/radeon_asic.h uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev); rdev 37 drivers/gpu/drm/radeon/radeon_asic.h void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); rdev 39 drivers/gpu/drm/radeon/radeon_asic.h uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); rdev 40 drivers/gpu/drm/radeon/radeon_asic.h void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); rdev 41 drivers/gpu/drm/radeon/radeon_asic.h uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); rdev 42 drivers/gpu/drm/radeon/radeon_asic.h void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); rdev 43 drivers/gpu/drm/radeon/radeon_asic.h void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); rdev 61 drivers/gpu/drm/radeon/radeon_asic.h int r100_init(struct radeon_device *rdev); rdev 62 drivers/gpu/drm/radeon/radeon_asic.h void r100_fini(struct radeon_device *rdev); rdev 63 drivers/gpu/drm/radeon/radeon_asic.h int r100_suspend(struct radeon_device *rdev); rdev 64 drivers/gpu/drm/radeon/radeon_asic.h int r100_resume(struct radeon_device *rdev); rdev 65 drivers/gpu/drm/radeon/radeon_asic.h void r100_vga_set_state(struct radeon_device *rdev, bool state); rdev 66 drivers/gpu/drm/radeon/radeon_asic.h bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); rdev 67 drivers/gpu/drm/radeon/radeon_asic.h int r100_asic_reset(struct radeon_device *rdev, bool hard); rdev 68 drivers/gpu/drm/radeon/radeon_asic.h u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); rdev 69 drivers/gpu/drm/radeon/radeon_asic.h void r100_pci_gart_tlb_flush(struct radeon_device *rdev); rdev 71 drivers/gpu/drm/radeon/radeon_asic.h void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 73 drivers/gpu/drm/radeon/radeon_asic.h void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); rdev 74 drivers/gpu/drm/radeon/radeon_asic.h int r100_irq_set(struct radeon_device *rdev); rdev 75 drivers/gpu/drm/radeon/radeon_asic.h int r100_irq_process(struct radeon_device *rdev); rdev 76 drivers/gpu/drm/radeon/radeon_asic.h void r100_fence_ring_emit(struct radeon_device *rdev, rdev 78 drivers/gpu/drm/radeon/radeon_asic.h bool r100_semaphore_ring_emit(struct radeon_device *rdev, rdev 83 drivers/gpu/drm/radeon/radeon_asic.h void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 84 drivers/gpu/drm/radeon/radeon_asic.h uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); rdev 85 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *r100_copy_blit(struct radeon_device *rdev, rdev 90 drivers/gpu/drm/radeon/radeon_asic.h int r100_set_surface_reg(struct radeon_device *rdev, int reg, rdev 93 drivers/gpu/drm/radeon/radeon_asic.h void r100_clear_surface_reg(struct radeon_device *rdev, int reg); rdev 94 drivers/gpu/drm/radeon/radeon_asic.h void r100_bandwidth_update(struct radeon_device *rdev); rdev 95 drivers/gpu/drm/radeon/radeon_asic.h void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 96 drivers/gpu/drm/radeon/radeon_asic.h int r100_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); rdev 97 drivers/gpu/drm/radeon/radeon_asic.h void r100_hpd_init(struct radeon_device *rdev); rdev 98 drivers/gpu/drm/radeon/radeon_asic.h void r100_hpd_fini(struct radeon_device *rdev); rdev 99 drivers/gpu/drm/radeon/radeon_asic.h bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); rdev 100 drivers/gpu/drm/radeon/radeon_asic.h void r100_hpd_set_polarity(struct radeon_device *rdev, rdev 102 drivers/gpu/drm/radeon/radeon_asic.h int r100_debugfs_rbbm_init(struct radeon_device *rdev); rdev 103 drivers/gpu/drm/radeon/radeon_asic.h int r100_debugfs_cp_init(struct radeon_device *rdev); rdev 104 drivers/gpu/drm/radeon/radeon_asic.h void r100_cp_disable(struct radeon_device *rdev); rdev 105 drivers/gpu/drm/radeon/radeon_asic.h int r100_cp_init(struct radeon_device *rdev, unsigned ring_size); rdev 106 drivers/gpu/drm/radeon/radeon_asic.h void r100_cp_fini(struct radeon_device *rdev); rdev 107 drivers/gpu/drm/radeon/radeon_asic.h int r100_pci_gart_init(struct radeon_device *rdev); rdev 108 drivers/gpu/drm/radeon/radeon_asic.h void r100_pci_gart_fini(struct radeon_device *rdev); rdev 109 drivers/gpu/drm/radeon/radeon_asic.h int r100_pci_gart_enable(struct radeon_device *rdev); rdev 110 drivers/gpu/drm/radeon/radeon_asic.h void r100_pci_gart_disable(struct radeon_device *rdev); rdev 111 drivers/gpu/drm/radeon/radeon_asic.h int r100_debugfs_mc_info_init(struct radeon_device *rdev); rdev 112 drivers/gpu/drm/radeon/radeon_asic.h int r100_gui_wait_for_idle(struct radeon_device *rdev); rdev 113 drivers/gpu/drm/radeon/radeon_asic.h int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 114 drivers/gpu/drm/radeon/radeon_asic.h void r100_irq_disable(struct radeon_device *rdev); rdev 115 drivers/gpu/drm/radeon/radeon_asic.h void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save); rdev 116 drivers/gpu/drm/radeon/radeon_asic.h void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save); rdev 117 drivers/gpu/drm/radeon/radeon_asic.h void r100_vram_init_sizes(struct radeon_device *rdev); rdev 118 drivers/gpu/drm/radeon/radeon_asic.h int r100_cp_reset(struct radeon_device *rdev); rdev 119 drivers/gpu/drm/radeon/radeon_asic.h void r100_vga_render_disable(struct radeon_device *rdev); rdev 120 drivers/gpu/drm/radeon/radeon_asic.h void r100_restore_sanity(struct radeon_device *rdev); rdev 131 drivers/gpu/drm/radeon/radeon_asic.h void r100_enable_bm(struct radeon_device *rdev); rdev 132 drivers/gpu/drm/radeon/radeon_asic.h void r100_set_common_regs(struct radeon_device *rdev); rdev 133 drivers/gpu/drm/radeon/radeon_asic.h void r100_bm_disable(struct radeon_device *rdev); rdev 134 drivers/gpu/drm/radeon/radeon_asic.h extern bool r100_gui_idle(struct radeon_device *rdev); rdev 135 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_pm_misc(struct radeon_device *rdev); rdev 136 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_pm_prepare(struct radeon_device *rdev); rdev 137 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_pm_finish(struct radeon_device *rdev); rdev 138 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_pm_init_profile(struct radeon_device *rdev); rdev 139 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); rdev 140 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_page_flip(struct radeon_device *rdev, int crtc, rdev 142 drivers/gpu/drm/radeon/radeon_asic.h extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc); rdev 143 drivers/gpu/drm/radeon/radeon_asic.h extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); rdev 144 drivers/gpu/drm/radeon/radeon_asic.h extern int r100_mc_wait_for_idle(struct radeon_device *rdev); rdev 146 drivers/gpu/drm/radeon/radeon_asic.h u32 r100_gfx_get_rptr(struct radeon_device *rdev, rdev 148 drivers/gpu/drm/radeon/radeon_asic.h u32 r100_gfx_get_wptr(struct radeon_device *rdev, rdev 150 drivers/gpu/drm/radeon/radeon_asic.h void r100_gfx_set_wptr(struct radeon_device *rdev, rdev 156 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *r200_copy_dma(struct radeon_device *rdev, rdev 161 drivers/gpu/drm/radeon/radeon_asic.h void r200_set_safe_registers(struct radeon_device *rdev); rdev 166 drivers/gpu/drm/radeon/radeon_asic.h extern int r300_init(struct radeon_device *rdev); rdev 167 drivers/gpu/drm/radeon/radeon_asic.h extern void r300_fini(struct radeon_device *rdev); rdev 168 drivers/gpu/drm/radeon/radeon_asic.h extern int r300_suspend(struct radeon_device *rdev); rdev 169 drivers/gpu/drm/radeon/radeon_asic.h extern int r300_resume(struct radeon_device *rdev); rdev 170 drivers/gpu/drm/radeon/radeon_asic.h extern int r300_asic_reset(struct radeon_device *rdev, bool hard); rdev 171 drivers/gpu/drm/radeon/radeon_asic.h extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); rdev 172 drivers/gpu/drm/radeon/radeon_asic.h extern void r300_fence_ring_emit(struct radeon_device *rdev, rdev 175 drivers/gpu/drm/radeon/radeon_asic.h extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); rdev 177 drivers/gpu/drm/radeon/radeon_asic.h extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 179 drivers/gpu/drm/radeon/radeon_asic.h extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); rdev 180 drivers/gpu/drm/radeon/radeon_asic.h extern int rv370_get_pcie_lanes(struct radeon_device *rdev); rdev 181 drivers/gpu/drm/radeon/radeon_asic.h extern void r300_set_reg_safe(struct radeon_device *rdev); rdev 182 drivers/gpu/drm/radeon/radeon_asic.h extern void r300_mc_program(struct radeon_device *rdev); rdev 183 drivers/gpu/drm/radeon/radeon_asic.h extern void r300_mc_init(struct radeon_device *rdev); rdev 184 drivers/gpu/drm/radeon/radeon_asic.h extern void r300_clock_startup(struct radeon_device *rdev); rdev 185 drivers/gpu/drm/radeon/radeon_asic.h extern int r300_mc_wait_for_idle(struct radeon_device *rdev); rdev 186 drivers/gpu/drm/radeon/radeon_asic.h extern int rv370_pcie_gart_init(struct radeon_device *rdev); rdev 187 drivers/gpu/drm/radeon/radeon_asic.h extern void rv370_pcie_gart_fini(struct radeon_device *rdev); rdev 188 drivers/gpu/drm/radeon/radeon_asic.h extern int rv370_pcie_gart_enable(struct radeon_device *rdev); rdev 189 drivers/gpu/drm/radeon/radeon_asic.h extern void rv370_pcie_gart_disable(struct radeon_device *rdev); rdev 190 drivers/gpu/drm/radeon/radeon_asic.h extern int r300_mc_wait_for_idle(struct radeon_device *rdev); rdev 195 drivers/gpu/drm/radeon/radeon_asic.h extern int r420_init(struct radeon_device *rdev); rdev 196 drivers/gpu/drm/radeon/radeon_asic.h extern void r420_fini(struct radeon_device *rdev); rdev 197 drivers/gpu/drm/radeon/radeon_asic.h extern int r420_suspend(struct radeon_device *rdev); rdev 198 drivers/gpu/drm/radeon/radeon_asic.h extern int r420_resume(struct radeon_device *rdev); rdev 199 drivers/gpu/drm/radeon/radeon_asic.h extern void r420_pm_init_profile(struct radeon_device *rdev); rdev 200 drivers/gpu/drm/radeon/radeon_asic.h extern u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg); rdev 201 drivers/gpu/drm/radeon/radeon_asic.h extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v); rdev 202 drivers/gpu/drm/radeon/radeon_asic.h extern int r420_debugfs_pipes_info_init(struct radeon_device *rdev); rdev 203 drivers/gpu/drm/radeon/radeon_asic.h extern void r420_pipes_init(struct radeon_device *rdev); rdev 208 drivers/gpu/drm/radeon/radeon_asic.h extern int rs400_init(struct radeon_device *rdev); rdev 209 drivers/gpu/drm/radeon/radeon_asic.h extern void rs400_fini(struct radeon_device *rdev); rdev 210 drivers/gpu/drm/radeon/radeon_asic.h extern int rs400_suspend(struct radeon_device *rdev); rdev 211 drivers/gpu/drm/radeon/radeon_asic.h extern int rs400_resume(struct radeon_device *rdev); rdev 212 drivers/gpu/drm/radeon/radeon_asic.h void rs400_gart_tlb_flush(struct radeon_device *rdev); rdev 214 drivers/gpu/drm/radeon/radeon_asic.h void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 216 drivers/gpu/drm/radeon/radeon_asic.h uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); rdev 217 drivers/gpu/drm/radeon/radeon_asic.h void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 218 drivers/gpu/drm/radeon/radeon_asic.h int rs400_gart_init(struct radeon_device *rdev); rdev 219 drivers/gpu/drm/radeon/radeon_asic.h int rs400_gart_enable(struct radeon_device *rdev); rdev 220 drivers/gpu/drm/radeon/radeon_asic.h void rs400_gart_adjust_size(struct radeon_device *rdev); rdev 221 drivers/gpu/drm/radeon/radeon_asic.h void rs400_gart_disable(struct radeon_device *rdev); rdev 222 drivers/gpu/drm/radeon/radeon_asic.h void rs400_gart_fini(struct radeon_device *rdev); rdev 223 drivers/gpu/drm/radeon/radeon_asic.h extern int rs400_mc_wait_for_idle(struct radeon_device *rdev); rdev 228 drivers/gpu/drm/radeon/radeon_asic.h extern int rs600_asic_reset(struct radeon_device *rdev, bool hard); rdev 229 drivers/gpu/drm/radeon/radeon_asic.h extern int rs600_init(struct radeon_device *rdev); rdev 230 drivers/gpu/drm/radeon/radeon_asic.h extern void rs600_fini(struct radeon_device *rdev); rdev 231 drivers/gpu/drm/radeon/radeon_asic.h extern int rs600_suspend(struct radeon_device *rdev); rdev 232 drivers/gpu/drm/radeon/radeon_asic.h extern int rs600_resume(struct radeon_device *rdev); rdev 233 drivers/gpu/drm/radeon/radeon_asic.h int rs600_irq_set(struct radeon_device *rdev); rdev 234 drivers/gpu/drm/radeon/radeon_asic.h int rs600_irq_process(struct radeon_device *rdev); rdev 235 drivers/gpu/drm/radeon/radeon_asic.h void rs600_irq_disable(struct radeon_device *rdev); rdev 236 drivers/gpu/drm/radeon/radeon_asic.h u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); rdev 237 drivers/gpu/drm/radeon/radeon_asic.h void rs600_gart_tlb_flush(struct radeon_device *rdev); rdev 239 drivers/gpu/drm/radeon/radeon_asic.h void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 241 drivers/gpu/drm/radeon/radeon_asic.h uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); rdev 242 drivers/gpu/drm/radeon/radeon_asic.h void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 243 drivers/gpu/drm/radeon/radeon_asic.h void rs600_bandwidth_update(struct radeon_device *rdev); rdev 244 drivers/gpu/drm/radeon/radeon_asic.h void rs600_hpd_init(struct radeon_device *rdev); rdev 245 drivers/gpu/drm/radeon/radeon_asic.h void rs600_hpd_fini(struct radeon_device *rdev); rdev 246 drivers/gpu/drm/radeon/radeon_asic.h bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); rdev 247 drivers/gpu/drm/radeon/radeon_asic.h void rs600_hpd_set_polarity(struct radeon_device *rdev, rdev 249 drivers/gpu/drm/radeon/radeon_asic.h extern void rs600_pm_misc(struct radeon_device *rdev); rdev 250 drivers/gpu/drm/radeon/radeon_asic.h extern void rs600_pm_prepare(struct radeon_device *rdev); rdev 251 drivers/gpu/drm/radeon/radeon_asic.h extern void rs600_pm_finish(struct radeon_device *rdev); rdev 252 drivers/gpu/drm/radeon/radeon_asic.h extern void rs600_page_flip(struct radeon_device *rdev, int crtc, rdev 254 drivers/gpu/drm/radeon/radeon_asic.h extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc); rdev 255 drivers/gpu/drm/radeon/radeon_asic.h void rs600_set_safe_registers(struct radeon_device *rdev); rdev 256 drivers/gpu/drm/radeon/radeon_asic.h extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); rdev 257 drivers/gpu/drm/radeon/radeon_asic.h extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); rdev 262 drivers/gpu/drm/radeon/radeon_asic.h int rs690_init(struct radeon_device *rdev); rdev 263 drivers/gpu/drm/radeon/radeon_asic.h void rs690_fini(struct radeon_device *rdev); rdev 264 drivers/gpu/drm/radeon/radeon_asic.h int rs690_resume(struct radeon_device *rdev); rdev 265 drivers/gpu/drm/radeon/radeon_asic.h int rs690_suspend(struct radeon_device *rdev); rdev 266 drivers/gpu/drm/radeon/radeon_asic.h uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); rdev 267 drivers/gpu/drm/radeon/radeon_asic.h void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 268 drivers/gpu/drm/radeon/radeon_asic.h void rs690_bandwidth_update(struct radeon_device *rdev); rdev 269 drivers/gpu/drm/radeon/radeon_asic.h void rs690_line_buffer_adjust(struct radeon_device *rdev, rdev 272 drivers/gpu/drm/radeon/radeon_asic.h extern int rs690_mc_wait_for_idle(struct radeon_device *rdev); rdev 283 drivers/gpu/drm/radeon/radeon_asic.h int rv515_init(struct radeon_device *rdev); rdev 284 drivers/gpu/drm/radeon/radeon_asic.h void rv515_fini(struct radeon_device *rdev); rdev 285 drivers/gpu/drm/radeon/radeon_asic.h uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); rdev 286 drivers/gpu/drm/radeon/radeon_asic.h void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 287 drivers/gpu/drm/radeon/radeon_asic.h void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); rdev 288 drivers/gpu/drm/radeon/radeon_asic.h void rv515_bandwidth_update(struct radeon_device *rdev); rdev 289 drivers/gpu/drm/radeon/radeon_asic.h int rv515_resume(struct radeon_device *rdev); rdev 290 drivers/gpu/drm/radeon/radeon_asic.h int rv515_suspend(struct radeon_device *rdev); rdev 291 drivers/gpu/drm/radeon/radeon_asic.h void rv515_bandwidth_avivo_update(struct radeon_device *rdev); rdev 292 drivers/gpu/drm/radeon/radeon_asic.h void rv515_vga_render_disable(struct radeon_device *rdev); rdev 293 drivers/gpu/drm/radeon/radeon_asic.h void rv515_set_safe_registers(struct radeon_device *rdev); rdev 294 drivers/gpu/drm/radeon/radeon_asic.h void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save); rdev 295 drivers/gpu/drm/radeon/radeon_asic.h void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save); rdev 296 drivers/gpu/drm/radeon/radeon_asic.h void rv515_clock_startup(struct radeon_device *rdev); rdev 297 drivers/gpu/drm/radeon/radeon_asic.h void rv515_debugfs(struct radeon_device *rdev); rdev 298 drivers/gpu/drm/radeon/radeon_asic.h int rv515_mc_wait_for_idle(struct radeon_device *rdev); rdev 303 drivers/gpu/drm/radeon/radeon_asic.h int r520_init(struct radeon_device *rdev); rdev 304 drivers/gpu/drm/radeon/radeon_asic.h int r520_resume(struct radeon_device *rdev); rdev 305 drivers/gpu/drm/radeon/radeon_asic.h int r520_mc_wait_for_idle(struct radeon_device *rdev); rdev 310 drivers/gpu/drm/radeon/radeon_asic.h int r600_init(struct radeon_device *rdev); rdev 311 drivers/gpu/drm/radeon/radeon_asic.h void r600_fini(struct radeon_device *rdev); rdev 312 drivers/gpu/drm/radeon/radeon_asic.h int r600_suspend(struct radeon_device *rdev); rdev 313 drivers/gpu/drm/radeon/radeon_asic.h int r600_resume(struct radeon_device *rdev); rdev 314 drivers/gpu/drm/radeon/radeon_asic.h void r600_vga_set_state(struct radeon_device *rdev, bool state); rdev 315 drivers/gpu/drm/radeon/radeon_asic.h int r600_wb_init(struct radeon_device *rdev); rdev 316 drivers/gpu/drm/radeon/radeon_asic.h void r600_wb_fini(struct radeon_device *rdev); rdev 317 drivers/gpu/drm/radeon/radeon_asic.h void r600_pcie_gart_tlb_flush(struct radeon_device *rdev); rdev 318 drivers/gpu/drm/radeon/radeon_asic.h uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg); rdev 319 drivers/gpu/drm/radeon/radeon_asic.h void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 322 drivers/gpu/drm/radeon/radeon_asic.h void r600_fence_ring_emit(struct radeon_device *rdev, rdev 324 drivers/gpu/drm/radeon/radeon_asic.h bool r600_semaphore_ring_emit(struct radeon_device *rdev, rdev 328 drivers/gpu/drm/radeon/radeon_asic.h void r600_dma_fence_ring_emit(struct radeon_device *rdev, rdev 330 drivers/gpu/drm/radeon/radeon_asic.h bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, rdev 334 drivers/gpu/drm/radeon/radeon_asic.h void r600_dma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 335 drivers/gpu/drm/radeon/radeon_asic.h bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); rdev 336 drivers/gpu/drm/radeon/radeon_asic.h bool r600_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); rdev 337 drivers/gpu/drm/radeon/radeon_asic.h int r600_asic_reset(struct radeon_device *rdev, bool hard); rdev 338 drivers/gpu/drm/radeon/radeon_asic.h int r600_set_surface_reg(struct radeon_device *rdev, int reg, rdev 341 drivers/gpu/drm/radeon/radeon_asic.h void r600_clear_surface_reg(struct radeon_device *rdev, int reg); rdev 342 drivers/gpu/drm/radeon/radeon_asic.h int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 343 drivers/gpu/drm/radeon/radeon_asic.h int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 344 drivers/gpu/drm/radeon/radeon_asic.h void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 345 drivers/gpu/drm/radeon/radeon_asic.h int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); rdev 346 drivers/gpu/drm/radeon/radeon_asic.h int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); rdev 347 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev, rdev 351 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, rdev 355 drivers/gpu/drm/radeon/radeon_asic.h void r600_hpd_init(struct radeon_device *rdev); rdev 356 drivers/gpu/drm/radeon/radeon_asic.h void r600_hpd_fini(struct radeon_device *rdev); rdev 357 drivers/gpu/drm/radeon/radeon_asic.h bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); rdev 358 drivers/gpu/drm/radeon/radeon_asic.h void r600_hpd_set_polarity(struct radeon_device *rdev, rdev 360 drivers/gpu/drm/radeon/radeon_asic.h extern void r600_mmio_hdp_flush(struct radeon_device *rdev); rdev 361 drivers/gpu/drm/radeon/radeon_asic.h extern bool r600_gui_idle(struct radeon_device *rdev); rdev 362 drivers/gpu/drm/radeon/radeon_asic.h extern void r600_pm_misc(struct radeon_device *rdev); rdev 363 drivers/gpu/drm/radeon/radeon_asic.h extern void r600_pm_init_profile(struct radeon_device *rdev); rdev 364 drivers/gpu/drm/radeon/radeon_asic.h extern void rs780_pm_init_profile(struct radeon_device *rdev); rdev 365 drivers/gpu/drm/radeon/radeon_asic.h extern uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg); rdev 366 drivers/gpu/drm/radeon/radeon_asic.h extern void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 367 drivers/gpu/drm/radeon/radeon_asic.h extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); rdev 368 drivers/gpu/drm/radeon/radeon_asic.h extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); rdev 369 drivers/gpu/drm/radeon/radeon_asic.h extern int r600_get_pcie_lanes(struct radeon_device *rdev); rdev 370 drivers/gpu/drm/radeon/radeon_asic.h bool r600_card_posted(struct radeon_device *rdev); rdev 371 drivers/gpu/drm/radeon/radeon_asic.h void r600_cp_stop(struct radeon_device *rdev); rdev 372 drivers/gpu/drm/radeon/radeon_asic.h int r600_cp_start(struct radeon_device *rdev); rdev 373 drivers/gpu/drm/radeon/radeon_asic.h void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size); rdev 374 drivers/gpu/drm/radeon/radeon_asic.h int r600_cp_resume(struct radeon_device *rdev); rdev 375 drivers/gpu/drm/radeon/radeon_asic.h void r600_cp_fini(struct radeon_device *rdev); rdev 377 drivers/gpu/drm/radeon/radeon_asic.h int r600_mc_wait_for_idle(struct radeon_device *rdev); rdev 378 drivers/gpu/drm/radeon/radeon_asic.h int r600_pcie_gart_init(struct radeon_device *rdev); rdev 379 drivers/gpu/drm/radeon/radeon_asic.h void r600_scratch_init(struct radeon_device *rdev); rdev 380 drivers/gpu/drm/radeon/radeon_asic.h int r600_init_microcode(struct radeon_device *rdev); rdev 381 drivers/gpu/drm/radeon/radeon_asic.h u32 r600_gfx_get_rptr(struct radeon_device *rdev, rdev 383 drivers/gpu/drm/radeon/radeon_asic.h u32 r600_gfx_get_wptr(struct radeon_device *rdev, rdev 385 drivers/gpu/drm/radeon/radeon_asic.h void r600_gfx_set_wptr(struct radeon_device *rdev, rdev 387 drivers/gpu/drm/radeon/radeon_asic.h int r600_get_allowed_info_register(struct radeon_device *rdev, rdev 390 drivers/gpu/drm/radeon/radeon_asic.h int r600_irq_process(struct radeon_device *rdev); rdev 391 drivers/gpu/drm/radeon/radeon_asic.h int r600_irq_init(struct radeon_device *rdev); rdev 392 drivers/gpu/drm/radeon/radeon_asic.h void r600_irq_fini(struct radeon_device *rdev); rdev 393 drivers/gpu/drm/radeon/radeon_asic.h void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size); rdev 394 drivers/gpu/drm/radeon/radeon_asic.h int r600_irq_set(struct radeon_device *rdev); rdev 395 drivers/gpu/drm/radeon/radeon_asic.h void r600_irq_suspend(struct radeon_device *rdev); rdev 396 drivers/gpu/drm/radeon/radeon_asic.h void r600_disable_interrupts(struct radeon_device *rdev); rdev 397 drivers/gpu/drm/radeon/radeon_asic.h void r600_rlc_stop(struct radeon_device *rdev); rdev 399 drivers/gpu/drm/radeon/radeon_asic.h void r600_audio_fini(struct radeon_device *rdev); rdev 407 drivers/gpu/drm/radeon/radeon_asic.h int r600_mc_wait_for_idle(struct radeon_device *rdev); rdev 408 drivers/gpu/drm/radeon/radeon_asic.h u32 r600_get_xclk(struct radeon_device *rdev); rdev 409 drivers/gpu/drm/radeon/radeon_asic.h uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); rdev 410 drivers/gpu/drm/radeon/radeon_asic.h int rv6xx_get_temp(struct radeon_device *rdev); rdev 411 drivers/gpu/drm/radeon/radeon_asic.h int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 412 drivers/gpu/drm/radeon/radeon_asic.h int r600_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 413 drivers/gpu/drm/radeon/radeon_asic.h void r600_dpm_post_set_power_state(struct radeon_device *rdev); rdev 414 drivers/gpu/drm/radeon/radeon_asic.h int r600_dpm_late_enable(struct radeon_device *rdev); rdev 416 drivers/gpu/drm/radeon/radeon_asic.h uint32_t r600_dma_get_rptr(struct radeon_device *rdev, rdev 418 drivers/gpu/drm/radeon/radeon_asic.h uint32_t r600_dma_get_wptr(struct radeon_device *rdev, rdev 420 drivers/gpu/drm/radeon/radeon_asic.h void r600_dma_set_wptr(struct radeon_device *rdev, rdev 423 drivers/gpu/drm/radeon/radeon_asic.h int rv6xx_dpm_init(struct radeon_device *rdev); rdev 424 drivers/gpu/drm/radeon/radeon_asic.h int rv6xx_dpm_enable(struct radeon_device *rdev); rdev 425 drivers/gpu/drm/radeon/radeon_asic.h void rv6xx_dpm_disable(struct radeon_device *rdev); rdev 426 drivers/gpu/drm/radeon/radeon_asic.h int rv6xx_dpm_set_power_state(struct radeon_device *rdev); rdev 427 drivers/gpu/drm/radeon/radeon_asic.h void rv6xx_setup_asic(struct radeon_device *rdev); rdev 428 drivers/gpu/drm/radeon/radeon_asic.h void rv6xx_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 429 drivers/gpu/drm/radeon/radeon_asic.h void rv6xx_dpm_fini(struct radeon_device *rdev); rdev 430 drivers/gpu/drm/radeon/radeon_asic.h u32 rv6xx_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 431 drivers/gpu/drm/radeon/radeon_asic.h u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 432 drivers/gpu/drm/radeon/radeon_asic.h void rv6xx_dpm_print_power_state(struct radeon_device *rdev, rdev 434 drivers/gpu/drm/radeon/radeon_asic.h void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 436 drivers/gpu/drm/radeon/radeon_asic.h int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, rdev 438 drivers/gpu/drm/radeon/radeon_asic.h u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev); rdev 439 drivers/gpu/drm/radeon/radeon_asic.h u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev); rdev 441 drivers/gpu/drm/radeon/radeon_asic.h int rs780_dpm_init(struct radeon_device *rdev); rdev 442 drivers/gpu/drm/radeon/radeon_asic.h int rs780_dpm_enable(struct radeon_device *rdev); rdev 443 drivers/gpu/drm/radeon/radeon_asic.h void rs780_dpm_disable(struct radeon_device *rdev); rdev 444 drivers/gpu/drm/radeon/radeon_asic.h int rs780_dpm_set_power_state(struct radeon_device *rdev); rdev 445 drivers/gpu/drm/radeon/radeon_asic.h void rs780_dpm_setup_asic(struct radeon_device *rdev); rdev 446 drivers/gpu/drm/radeon/radeon_asic.h void rs780_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 447 drivers/gpu/drm/radeon/radeon_asic.h void rs780_dpm_fini(struct radeon_device *rdev); rdev 448 drivers/gpu/drm/radeon/radeon_asic.h u32 rs780_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 449 drivers/gpu/drm/radeon/radeon_asic.h u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 450 drivers/gpu/drm/radeon/radeon_asic.h void rs780_dpm_print_power_state(struct radeon_device *rdev, rdev 452 drivers/gpu/drm/radeon/radeon_asic.h void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 454 drivers/gpu/drm/radeon/radeon_asic.h int rs780_dpm_force_performance_level(struct radeon_device *rdev, rdev 456 drivers/gpu/drm/radeon/radeon_asic.h u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev); rdev 457 drivers/gpu/drm/radeon/radeon_asic.h u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev); rdev 462 drivers/gpu/drm/radeon/radeon_asic.h int rv770_init(struct radeon_device *rdev); rdev 463 drivers/gpu/drm/radeon/radeon_asic.h void rv770_fini(struct radeon_device *rdev); rdev 464 drivers/gpu/drm/radeon/radeon_asic.h int rv770_suspend(struct radeon_device *rdev); rdev 465 drivers/gpu/drm/radeon/radeon_asic.h int rv770_resume(struct radeon_device *rdev); rdev 466 drivers/gpu/drm/radeon/radeon_asic.h void rv770_pm_misc(struct radeon_device *rdev); rdev 467 drivers/gpu/drm/radeon/radeon_asic.h void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base, rdev 469 drivers/gpu/drm/radeon/radeon_asic.h bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); rdev 470 drivers/gpu/drm/radeon/radeon_asic.h void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); rdev 471 drivers/gpu/drm/radeon/radeon_asic.h void r700_cp_stop(struct radeon_device *rdev); rdev 472 drivers/gpu/drm/radeon/radeon_asic.h void r700_cp_fini(struct radeon_device *rdev); rdev 473 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev, rdev 477 drivers/gpu/drm/radeon/radeon_asic.h u32 rv770_get_xclk(struct radeon_device *rdev); rdev 478 drivers/gpu/drm/radeon/radeon_asic.h int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 479 drivers/gpu/drm/radeon/radeon_asic.h int rv770_get_temp(struct radeon_device *rdev); rdev 481 drivers/gpu/drm/radeon/radeon_asic.h int rv770_dpm_init(struct radeon_device *rdev); rdev 482 drivers/gpu/drm/radeon/radeon_asic.h int rv770_dpm_enable(struct radeon_device *rdev); rdev 483 drivers/gpu/drm/radeon/radeon_asic.h int rv770_dpm_late_enable(struct radeon_device *rdev); rdev 484 drivers/gpu/drm/radeon/radeon_asic.h void rv770_dpm_disable(struct radeon_device *rdev); rdev 485 drivers/gpu/drm/radeon/radeon_asic.h int rv770_dpm_set_power_state(struct radeon_device *rdev); rdev 486 drivers/gpu/drm/radeon/radeon_asic.h void rv770_dpm_setup_asic(struct radeon_device *rdev); rdev 487 drivers/gpu/drm/radeon/radeon_asic.h void rv770_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 488 drivers/gpu/drm/radeon/radeon_asic.h void rv770_dpm_fini(struct radeon_device *rdev); rdev 489 drivers/gpu/drm/radeon/radeon_asic.h u32 rv770_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 490 drivers/gpu/drm/radeon/radeon_asic.h u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 491 drivers/gpu/drm/radeon/radeon_asic.h void rv770_dpm_print_power_state(struct radeon_device *rdev, rdev 493 drivers/gpu/drm/radeon/radeon_asic.h void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 495 drivers/gpu/drm/radeon/radeon_asic.h int rv770_dpm_force_performance_level(struct radeon_device *rdev, rdev 497 drivers/gpu/drm/radeon/radeon_asic.h bool rv770_dpm_vblank_too_short(struct radeon_device *rdev); rdev 498 drivers/gpu/drm/radeon/radeon_asic.h u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev); rdev 499 drivers/gpu/drm/radeon/radeon_asic.h u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev); rdev 510 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); rdev 511 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_init(struct radeon_device *rdev); rdev 512 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_fini(struct radeon_device *rdev); rdev 513 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_suspend(struct radeon_device *rdev); rdev 514 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_resume(struct radeon_device *rdev); rdev 515 drivers/gpu/drm/radeon/radeon_asic.h bool evergreen_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); rdev 516 drivers/gpu/drm/radeon/radeon_asic.h bool evergreen_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); rdev 517 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_asic_reset(struct radeon_device *rdev, bool hard); rdev 518 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_bandwidth_update(struct radeon_device *rdev); rdev 519 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 520 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_hpd_init(struct radeon_device *rdev); rdev 521 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_hpd_fini(struct radeon_device *rdev); rdev 522 drivers/gpu/drm/radeon/radeon_asic.h bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); rdev 523 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_hpd_set_polarity(struct radeon_device *rdev, rdev 525 drivers/gpu/drm/radeon/radeon_asic.h u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc); rdev 526 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_irq_set(struct radeon_device *rdev); rdev 527 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_irq_process(struct radeon_device *rdev); rdev 530 drivers/gpu/drm/radeon/radeon_asic.h extern void evergreen_pm_misc(struct radeon_device *rdev); rdev 531 drivers/gpu/drm/radeon/radeon_asic.h extern void evergreen_pm_prepare(struct radeon_device *rdev); rdev 532 drivers/gpu/drm/radeon/radeon_asic.h extern void evergreen_pm_finish(struct radeon_device *rdev); rdev 533 drivers/gpu/drm/radeon/radeon_asic.h extern void sumo_pm_init_profile(struct radeon_device *rdev); rdev 534 drivers/gpu/drm/radeon/radeon_asic.h extern void btc_pm_init_profile(struct radeon_device *rdev); rdev 535 drivers/gpu/drm/radeon/radeon_asic.h int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 536 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 537 drivers/gpu/drm/radeon/radeon_asic.h extern void evergreen_page_flip(struct radeon_device *rdev, int crtc, rdev 539 drivers/gpu/drm/radeon/radeon_asic.h extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc); rdev 540 drivers/gpu/drm/radeon/radeon_asic.h extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); rdev 541 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_disable_interrupt_state(struct radeon_device *rdev); rdev 542 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_mc_wait_for_idle(struct radeon_device *rdev); rdev 543 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, rdev 545 drivers/gpu/drm/radeon/radeon_asic.h void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, rdev 547 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, rdev 551 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_get_temp(struct radeon_device *rdev); rdev 552 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_get_allowed_info_register(struct radeon_device *rdev, rdev 554 drivers/gpu/drm/radeon/radeon_asic.h int sumo_get_temp(struct radeon_device *rdev); rdev 555 drivers/gpu/drm/radeon/radeon_asic.h int tn_get_temp(struct radeon_device *rdev); rdev 556 drivers/gpu/drm/radeon/radeon_asic.h int cypress_dpm_init(struct radeon_device *rdev); rdev 557 drivers/gpu/drm/radeon/radeon_asic.h void cypress_dpm_setup_asic(struct radeon_device *rdev); rdev 558 drivers/gpu/drm/radeon/radeon_asic.h int cypress_dpm_enable(struct radeon_device *rdev); rdev 559 drivers/gpu/drm/radeon/radeon_asic.h void cypress_dpm_disable(struct radeon_device *rdev); rdev 560 drivers/gpu/drm/radeon/radeon_asic.h int cypress_dpm_set_power_state(struct radeon_device *rdev); rdev 561 drivers/gpu/drm/radeon/radeon_asic.h void cypress_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 562 drivers/gpu/drm/radeon/radeon_asic.h void cypress_dpm_fini(struct radeon_device *rdev); rdev 563 drivers/gpu/drm/radeon/radeon_asic.h bool cypress_dpm_vblank_too_short(struct radeon_device *rdev); rdev 564 drivers/gpu/drm/radeon/radeon_asic.h int btc_dpm_init(struct radeon_device *rdev); rdev 565 drivers/gpu/drm/radeon/radeon_asic.h void btc_dpm_setup_asic(struct radeon_device *rdev); rdev 566 drivers/gpu/drm/radeon/radeon_asic.h int btc_dpm_enable(struct radeon_device *rdev); rdev 567 drivers/gpu/drm/radeon/radeon_asic.h void btc_dpm_disable(struct radeon_device *rdev); rdev 568 drivers/gpu/drm/radeon/radeon_asic.h int btc_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 569 drivers/gpu/drm/radeon/radeon_asic.h int btc_dpm_set_power_state(struct radeon_device *rdev); rdev 570 drivers/gpu/drm/radeon/radeon_asic.h void btc_dpm_post_set_power_state(struct radeon_device *rdev); rdev 571 drivers/gpu/drm/radeon/radeon_asic.h void btc_dpm_fini(struct radeon_device *rdev); rdev 572 drivers/gpu/drm/radeon/radeon_asic.h u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 573 drivers/gpu/drm/radeon/radeon_asic.h u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 574 drivers/gpu/drm/radeon/radeon_asic.h bool btc_dpm_vblank_too_short(struct radeon_device *rdev); rdev 575 drivers/gpu/drm/radeon/radeon_asic.h void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 577 drivers/gpu/drm/radeon/radeon_asic.h u32 btc_dpm_get_current_sclk(struct radeon_device *rdev); rdev 578 drivers/gpu/drm/radeon/radeon_asic.h u32 btc_dpm_get_current_mclk(struct radeon_device *rdev); rdev 579 drivers/gpu/drm/radeon/radeon_asic.h int sumo_dpm_init(struct radeon_device *rdev); rdev 580 drivers/gpu/drm/radeon/radeon_asic.h int sumo_dpm_enable(struct radeon_device *rdev); rdev 581 drivers/gpu/drm/radeon/radeon_asic.h int sumo_dpm_late_enable(struct radeon_device *rdev); rdev 582 drivers/gpu/drm/radeon/radeon_asic.h void sumo_dpm_disable(struct radeon_device *rdev); rdev 583 drivers/gpu/drm/radeon/radeon_asic.h int sumo_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 584 drivers/gpu/drm/radeon/radeon_asic.h int sumo_dpm_set_power_state(struct radeon_device *rdev); rdev 585 drivers/gpu/drm/radeon/radeon_asic.h void sumo_dpm_post_set_power_state(struct radeon_device *rdev); rdev 586 drivers/gpu/drm/radeon/radeon_asic.h void sumo_dpm_setup_asic(struct radeon_device *rdev); rdev 587 drivers/gpu/drm/radeon/radeon_asic.h void sumo_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 588 drivers/gpu/drm/radeon/radeon_asic.h void sumo_dpm_fini(struct radeon_device *rdev); rdev 589 drivers/gpu/drm/radeon/radeon_asic.h u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 590 drivers/gpu/drm/radeon/radeon_asic.h u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 591 drivers/gpu/drm/radeon/radeon_asic.h void sumo_dpm_print_power_state(struct radeon_device *rdev, rdev 593 drivers/gpu/drm/radeon/radeon_asic.h void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 595 drivers/gpu/drm/radeon/radeon_asic.h int sumo_dpm_force_performance_level(struct radeon_device *rdev, rdev 597 drivers/gpu/drm/radeon/radeon_asic.h u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev); rdev 598 drivers/gpu/drm/radeon/radeon_asic.h u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev); rdev 603 drivers/gpu/drm/radeon/radeon_asic.h void cayman_fence_ring_emit(struct radeon_device *rdev, rdev 605 drivers/gpu/drm/radeon/radeon_asic.h void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); rdev 606 drivers/gpu/drm/radeon/radeon_asic.h int cayman_init(struct radeon_device *rdev); rdev 607 drivers/gpu/drm/radeon/radeon_asic.h void cayman_fini(struct radeon_device *rdev); rdev 608 drivers/gpu/drm/radeon/radeon_asic.h int cayman_suspend(struct radeon_device *rdev); rdev 609 drivers/gpu/drm/radeon/radeon_asic.h int cayman_resume(struct radeon_device *rdev); rdev 610 drivers/gpu/drm/radeon/radeon_asic.h int cayman_asic_reset(struct radeon_device *rdev, bool hard); rdev 611 drivers/gpu/drm/radeon/radeon_asic.h void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 612 drivers/gpu/drm/radeon/radeon_asic.h int cayman_vm_init(struct radeon_device *rdev); rdev 613 drivers/gpu/drm/radeon/radeon_asic.h void cayman_vm_fini(struct radeon_device *rdev); rdev 614 drivers/gpu/drm/radeon/radeon_asic.h void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 616 drivers/gpu/drm/radeon/radeon_asic.h uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); rdev 617 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); rdev 618 drivers/gpu/drm/radeon/radeon_asic.h int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); rdev 619 drivers/gpu/drm/radeon/radeon_asic.h void cayman_dma_ring_ib_execute(struct radeon_device *rdev, rdev 621 drivers/gpu/drm/radeon/radeon_asic.h bool cayman_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); rdev 622 drivers/gpu/drm/radeon/radeon_asic.h bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); rdev 624 drivers/gpu/drm/radeon/radeon_asic.h void cayman_dma_vm_copy_pages(struct radeon_device *rdev, rdev 628 drivers/gpu/drm/radeon/radeon_asic.h void cayman_dma_vm_write_pages(struct radeon_device *rdev, rdev 633 drivers/gpu/drm/radeon/radeon_asic.h void cayman_dma_vm_set_pages(struct radeon_device *rdev, rdev 640 drivers/gpu/drm/radeon/radeon_asic.h void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 643 drivers/gpu/drm/radeon/radeon_asic.h u32 cayman_gfx_get_rptr(struct radeon_device *rdev, rdev 645 drivers/gpu/drm/radeon/radeon_asic.h u32 cayman_gfx_get_wptr(struct radeon_device *rdev, rdev 647 drivers/gpu/drm/radeon/radeon_asic.h void cayman_gfx_set_wptr(struct radeon_device *rdev, rdev 649 drivers/gpu/drm/radeon/radeon_asic.h uint32_t cayman_dma_get_rptr(struct radeon_device *rdev, rdev 651 drivers/gpu/drm/radeon/radeon_asic.h uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, rdev 653 drivers/gpu/drm/radeon/radeon_asic.h void cayman_dma_set_wptr(struct radeon_device *rdev, rdev 655 drivers/gpu/drm/radeon/radeon_asic.h int cayman_get_allowed_info_register(struct radeon_device *rdev, rdev 658 drivers/gpu/drm/radeon/radeon_asic.h int ni_dpm_init(struct radeon_device *rdev); rdev 659 drivers/gpu/drm/radeon/radeon_asic.h void ni_dpm_setup_asic(struct radeon_device *rdev); rdev 660 drivers/gpu/drm/radeon/radeon_asic.h int ni_dpm_enable(struct radeon_device *rdev); rdev 661 drivers/gpu/drm/radeon/radeon_asic.h void ni_dpm_disable(struct radeon_device *rdev); rdev 662 drivers/gpu/drm/radeon/radeon_asic.h int ni_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 663 drivers/gpu/drm/radeon/radeon_asic.h int ni_dpm_set_power_state(struct radeon_device *rdev); rdev 664 drivers/gpu/drm/radeon/radeon_asic.h void ni_dpm_post_set_power_state(struct radeon_device *rdev); rdev 665 drivers/gpu/drm/radeon/radeon_asic.h void ni_dpm_fini(struct radeon_device *rdev); rdev 666 drivers/gpu/drm/radeon/radeon_asic.h u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 667 drivers/gpu/drm/radeon/radeon_asic.h u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 668 drivers/gpu/drm/radeon/radeon_asic.h void ni_dpm_print_power_state(struct radeon_device *rdev, rdev 670 drivers/gpu/drm/radeon/radeon_asic.h void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 672 drivers/gpu/drm/radeon/radeon_asic.h int ni_dpm_force_performance_level(struct radeon_device *rdev, rdev 674 drivers/gpu/drm/radeon/radeon_asic.h bool ni_dpm_vblank_too_short(struct radeon_device *rdev); rdev 675 drivers/gpu/drm/radeon/radeon_asic.h u32 ni_dpm_get_current_sclk(struct radeon_device *rdev); rdev 676 drivers/gpu/drm/radeon/radeon_asic.h u32 ni_dpm_get_current_mclk(struct radeon_device *rdev); rdev 677 drivers/gpu/drm/radeon/radeon_asic.h int trinity_dpm_init(struct radeon_device *rdev); rdev 678 drivers/gpu/drm/radeon/radeon_asic.h int trinity_dpm_enable(struct radeon_device *rdev); rdev 679 drivers/gpu/drm/radeon/radeon_asic.h int trinity_dpm_late_enable(struct radeon_device *rdev); rdev 680 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_disable(struct radeon_device *rdev); rdev 681 drivers/gpu/drm/radeon/radeon_asic.h int trinity_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 682 drivers/gpu/drm/radeon/radeon_asic.h int trinity_dpm_set_power_state(struct radeon_device *rdev); rdev 683 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_post_set_power_state(struct radeon_device *rdev); rdev 684 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_setup_asic(struct radeon_device *rdev); rdev 685 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 686 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_fini(struct radeon_device *rdev); rdev 687 drivers/gpu/drm/radeon/radeon_asic.h u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 688 drivers/gpu/drm/radeon/radeon_asic.h u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 689 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_print_power_state(struct radeon_device *rdev, rdev 691 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 693 drivers/gpu/drm/radeon/radeon_asic.h int trinity_dpm_force_performance_level(struct radeon_device *rdev, rdev 695 drivers/gpu/drm/radeon/radeon_asic.h void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable); rdev 696 drivers/gpu/drm/radeon/radeon_asic.h u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev); rdev 697 drivers/gpu/drm/radeon/radeon_asic.h u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev); rdev 698 drivers/gpu/drm/radeon/radeon_asic.h int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); rdev 701 drivers/gpu/drm/radeon/radeon_asic.h void dce6_bandwidth_update(struct radeon_device *rdev); rdev 702 drivers/gpu/drm/radeon/radeon_asic.h void dce6_audio_fini(struct radeon_device *rdev); rdev 707 drivers/gpu/drm/radeon/radeon_asic.h void si_fence_ring_emit(struct radeon_device *rdev, rdev 709 drivers/gpu/drm/radeon/radeon_asic.h void si_pcie_gart_tlb_flush(struct radeon_device *rdev); rdev 710 drivers/gpu/drm/radeon/radeon_asic.h int si_init(struct radeon_device *rdev); rdev 711 drivers/gpu/drm/radeon/radeon_asic.h void si_fini(struct radeon_device *rdev); rdev 712 drivers/gpu/drm/radeon/radeon_asic.h int si_suspend(struct radeon_device *rdev); rdev 713 drivers/gpu/drm/radeon/radeon_asic.h int si_resume(struct radeon_device *rdev); rdev 714 drivers/gpu/drm/radeon/radeon_asic.h bool si_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); rdev 715 drivers/gpu/drm/radeon/radeon_asic.h bool si_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); rdev 716 drivers/gpu/drm/radeon/radeon_asic.h int si_asic_reset(struct radeon_device *rdev, bool hard); rdev 717 drivers/gpu/drm/radeon/radeon_asic.h void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 718 drivers/gpu/drm/radeon/radeon_asic.h int si_irq_set(struct radeon_device *rdev); rdev 719 drivers/gpu/drm/radeon/radeon_asic.h int si_irq_process(struct radeon_device *rdev); rdev 720 drivers/gpu/drm/radeon/radeon_asic.h int si_vm_init(struct radeon_device *rdev); rdev 721 drivers/gpu/drm/radeon/radeon_asic.h void si_vm_fini(struct radeon_device *rdev); rdev 722 drivers/gpu/drm/radeon/radeon_asic.h void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 724 drivers/gpu/drm/radeon/radeon_asic.h int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); rdev 725 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *si_copy_dma(struct radeon_device *rdev, rdev 730 drivers/gpu/drm/radeon/radeon_asic.h void si_dma_vm_copy_pages(struct radeon_device *rdev, rdev 734 drivers/gpu/drm/radeon/radeon_asic.h void si_dma_vm_write_pages(struct radeon_device *rdev, rdev 739 drivers/gpu/drm/radeon/radeon_asic.h void si_dma_vm_set_pages(struct radeon_device *rdev, rdev 745 drivers/gpu/drm/radeon/radeon_asic.h void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 747 drivers/gpu/drm/radeon/radeon_asic.h u32 si_get_xclk(struct radeon_device *rdev); rdev 748 drivers/gpu/drm/radeon/radeon_asic.h uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); rdev 749 drivers/gpu/drm/radeon/radeon_asic.h int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 750 drivers/gpu/drm/radeon/radeon_asic.h int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); rdev 751 drivers/gpu/drm/radeon/radeon_asic.h int si_get_temp(struct radeon_device *rdev); rdev 752 drivers/gpu/drm/radeon/radeon_asic.h int si_get_allowed_info_register(struct radeon_device *rdev, rdev 754 drivers/gpu/drm/radeon/radeon_asic.h int si_dpm_init(struct radeon_device *rdev); rdev 755 drivers/gpu/drm/radeon/radeon_asic.h void si_dpm_setup_asic(struct radeon_device *rdev); rdev 756 drivers/gpu/drm/radeon/radeon_asic.h int si_dpm_enable(struct radeon_device *rdev); rdev 757 drivers/gpu/drm/radeon/radeon_asic.h int si_dpm_late_enable(struct radeon_device *rdev); rdev 758 drivers/gpu/drm/radeon/radeon_asic.h void si_dpm_disable(struct radeon_device *rdev); rdev 759 drivers/gpu/drm/radeon/radeon_asic.h int si_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 760 drivers/gpu/drm/radeon/radeon_asic.h int si_dpm_set_power_state(struct radeon_device *rdev); rdev 761 drivers/gpu/drm/radeon/radeon_asic.h void si_dpm_post_set_power_state(struct radeon_device *rdev); rdev 762 drivers/gpu/drm/radeon/radeon_asic.h void si_dpm_fini(struct radeon_device *rdev); rdev 763 drivers/gpu/drm/radeon/radeon_asic.h void si_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 764 drivers/gpu/drm/radeon/radeon_asic.h void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 766 drivers/gpu/drm/radeon/radeon_asic.h int si_dpm_force_performance_level(struct radeon_device *rdev, rdev 768 drivers/gpu/drm/radeon/radeon_asic.h int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, rdev 770 drivers/gpu/drm/radeon/radeon_asic.h int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, rdev 772 drivers/gpu/drm/radeon/radeon_asic.h u32 si_fan_ctrl_get_mode(struct radeon_device *rdev); rdev 773 drivers/gpu/drm/radeon/radeon_asic.h void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode); rdev 774 drivers/gpu/drm/radeon/radeon_asic.h u32 si_dpm_get_current_sclk(struct radeon_device *rdev); rdev 775 drivers/gpu/drm/radeon/radeon_asic.h u32 si_dpm_get_current_mclk(struct radeon_device *rdev); rdev 778 drivers/gpu/drm/radeon/radeon_asic.h void dce8_bandwidth_update(struct radeon_device *rdev); rdev 783 drivers/gpu/drm/radeon/radeon_asic.h uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev); rdev 784 drivers/gpu/drm/radeon/radeon_asic.h u32 cik_get_xclk(struct radeon_device *rdev); rdev 785 drivers/gpu/drm/radeon/radeon_asic.h uint32_t cik_pciep_rreg(struct radeon_device *rdev, uint32_t reg); rdev 786 drivers/gpu/drm/radeon/radeon_asic.h void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); rdev 787 drivers/gpu/drm/radeon/radeon_asic.h int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 788 drivers/gpu/drm/radeon/radeon_asic.h int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); rdev 789 drivers/gpu/drm/radeon/radeon_asic.h void cik_sdma_fence_ring_emit(struct radeon_device *rdev, rdev 791 drivers/gpu/drm/radeon/radeon_asic.h bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, rdev 795 drivers/gpu/drm/radeon/radeon_asic.h void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 796 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *cik_copy_dma(struct radeon_device *rdev, rdev 800 drivers/gpu/drm/radeon/radeon_asic.h struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev, rdev 804 drivers/gpu/drm/radeon/radeon_asic.h int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 805 drivers/gpu/drm/radeon/radeon_asic.h int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 806 drivers/gpu/drm/radeon/radeon_asic.h bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); rdev 807 drivers/gpu/drm/radeon/radeon_asic.h void cik_fence_gfx_ring_emit(struct radeon_device *rdev, rdev 809 drivers/gpu/drm/radeon/radeon_asic.h void cik_fence_compute_ring_emit(struct radeon_device *rdev, rdev 811 drivers/gpu/drm/radeon/radeon_asic.h bool cik_semaphore_ring_emit(struct radeon_device *rdev, rdev 815 drivers/gpu/drm/radeon/radeon_asic.h void cik_pcie_gart_tlb_flush(struct radeon_device *rdev); rdev 816 drivers/gpu/drm/radeon/radeon_asic.h int cik_init(struct radeon_device *rdev); rdev 817 drivers/gpu/drm/radeon/radeon_asic.h void cik_fini(struct radeon_device *rdev); rdev 818 drivers/gpu/drm/radeon/radeon_asic.h int cik_suspend(struct radeon_device *rdev); rdev 819 drivers/gpu/drm/radeon/radeon_asic.h int cik_resume(struct radeon_device *rdev); rdev 820 drivers/gpu/drm/radeon/radeon_asic.h bool cik_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); rdev 821 drivers/gpu/drm/radeon/radeon_asic.h int cik_asic_reset(struct radeon_device *rdev, bool hard); rdev 822 drivers/gpu/drm/radeon/radeon_asic.h void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 823 drivers/gpu/drm/radeon/radeon_asic.h int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 824 drivers/gpu/drm/radeon/radeon_asic.h int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 825 drivers/gpu/drm/radeon/radeon_asic.h int cik_irq_set(struct radeon_device *rdev); rdev 826 drivers/gpu/drm/radeon/radeon_asic.h int cik_irq_process(struct radeon_device *rdev); rdev 827 drivers/gpu/drm/radeon/radeon_asic.h int cik_vm_init(struct radeon_device *rdev); rdev 828 drivers/gpu/drm/radeon/radeon_asic.h void cik_vm_fini(struct radeon_device *rdev); rdev 829 drivers/gpu/drm/radeon/radeon_asic.h void cik_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 832 drivers/gpu/drm/radeon/radeon_asic.h void cik_sdma_vm_copy_pages(struct radeon_device *rdev, rdev 836 drivers/gpu/drm/radeon/radeon_asic.h void cik_sdma_vm_write_pages(struct radeon_device *rdev, rdev 841 drivers/gpu/drm/radeon/radeon_asic.h void cik_sdma_vm_set_pages(struct radeon_device *rdev, rdev 848 drivers/gpu/drm/radeon/radeon_asic.h void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 850 drivers/gpu/drm/radeon/radeon_asic.h int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); rdev 851 drivers/gpu/drm/radeon/radeon_asic.h u32 cik_gfx_get_rptr(struct radeon_device *rdev, rdev 853 drivers/gpu/drm/radeon/radeon_asic.h u32 cik_gfx_get_wptr(struct radeon_device *rdev, rdev 855 drivers/gpu/drm/radeon/radeon_asic.h void cik_gfx_set_wptr(struct radeon_device *rdev, rdev 857 drivers/gpu/drm/radeon/radeon_asic.h u32 cik_compute_get_rptr(struct radeon_device *rdev, rdev 859 drivers/gpu/drm/radeon/radeon_asic.h u32 cik_compute_get_wptr(struct radeon_device *rdev, rdev 861 drivers/gpu/drm/radeon/radeon_asic.h void cik_compute_set_wptr(struct radeon_device *rdev, rdev 863 drivers/gpu/drm/radeon/radeon_asic.h u32 cik_sdma_get_rptr(struct radeon_device *rdev, rdev 865 drivers/gpu/drm/radeon/radeon_asic.h u32 cik_sdma_get_wptr(struct radeon_device *rdev, rdev 867 drivers/gpu/drm/radeon/radeon_asic.h void cik_sdma_set_wptr(struct radeon_device *rdev, rdev 869 drivers/gpu/drm/radeon/radeon_asic.h int ci_get_temp(struct radeon_device *rdev); rdev 870 drivers/gpu/drm/radeon/radeon_asic.h int kv_get_temp(struct radeon_device *rdev); rdev 871 drivers/gpu/drm/radeon/radeon_asic.h int cik_get_allowed_info_register(struct radeon_device *rdev, rdev 874 drivers/gpu/drm/radeon/radeon_asic.h int ci_dpm_init(struct radeon_device *rdev); rdev 875 drivers/gpu/drm/radeon/radeon_asic.h int ci_dpm_enable(struct radeon_device *rdev); rdev 876 drivers/gpu/drm/radeon/radeon_asic.h int ci_dpm_late_enable(struct radeon_device *rdev); rdev 877 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_disable(struct radeon_device *rdev); rdev 878 drivers/gpu/drm/radeon/radeon_asic.h int ci_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 879 drivers/gpu/drm/radeon/radeon_asic.h int ci_dpm_set_power_state(struct radeon_device *rdev); rdev 880 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_post_set_power_state(struct radeon_device *rdev); rdev 881 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_setup_asic(struct radeon_device *rdev); rdev 882 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 883 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_fini(struct radeon_device *rdev); rdev 884 drivers/gpu/drm/radeon/radeon_asic.h u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 885 drivers/gpu/drm/radeon/radeon_asic.h u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 886 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_print_power_state(struct radeon_device *rdev, rdev 888 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 890 drivers/gpu/drm/radeon/radeon_asic.h int ci_dpm_force_performance_level(struct radeon_device *rdev, rdev 892 drivers/gpu/drm/radeon/radeon_asic.h bool ci_dpm_vblank_too_short(struct radeon_device *rdev); rdev 893 drivers/gpu/drm/radeon/radeon_asic.h void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); rdev 894 drivers/gpu/drm/radeon/radeon_asic.h u32 ci_dpm_get_current_sclk(struct radeon_device *rdev); rdev 895 drivers/gpu/drm/radeon/radeon_asic.h u32 ci_dpm_get_current_mclk(struct radeon_device *rdev); rdev 897 drivers/gpu/drm/radeon/radeon_asic.h int ci_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, rdev 899 drivers/gpu/drm/radeon/radeon_asic.h int ci_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, rdev 901 drivers/gpu/drm/radeon/radeon_asic.h u32 ci_fan_ctrl_get_mode(struct radeon_device *rdev); rdev 902 drivers/gpu/drm/radeon/radeon_asic.h void ci_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode); rdev 904 drivers/gpu/drm/radeon/radeon_asic.h int kv_dpm_init(struct radeon_device *rdev); rdev 905 drivers/gpu/drm/radeon/radeon_asic.h int kv_dpm_enable(struct radeon_device *rdev); rdev 906 drivers/gpu/drm/radeon/radeon_asic.h int kv_dpm_late_enable(struct radeon_device *rdev); rdev 907 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_disable(struct radeon_device *rdev); rdev 908 drivers/gpu/drm/radeon/radeon_asic.h int kv_dpm_pre_set_power_state(struct radeon_device *rdev); rdev 909 drivers/gpu/drm/radeon/radeon_asic.h int kv_dpm_set_power_state(struct radeon_device *rdev); rdev 910 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_post_set_power_state(struct radeon_device *rdev); rdev 911 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_setup_asic(struct radeon_device *rdev); rdev 912 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_display_configuration_changed(struct radeon_device *rdev); rdev 913 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_fini(struct radeon_device *rdev); rdev 914 drivers/gpu/drm/radeon/radeon_asic.h u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low); rdev 915 drivers/gpu/drm/radeon/radeon_asic.h u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low); rdev 916 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_print_power_state(struct radeon_device *rdev, rdev 918 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 920 drivers/gpu/drm/radeon/radeon_asic.h int kv_dpm_force_performance_level(struct radeon_device *rdev, rdev 922 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); rdev 923 drivers/gpu/drm/radeon/radeon_asic.h void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable); rdev 924 drivers/gpu/drm/radeon/radeon_asic.h u32 kv_dpm_get_current_sclk(struct radeon_device *rdev); rdev 925 drivers/gpu/drm/radeon/radeon_asic.h u32 kv_dpm_get_current_mclk(struct radeon_device *rdev); rdev 928 drivers/gpu/drm/radeon/radeon_asic.h uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, rdev 930 drivers/gpu/drm/radeon/radeon_asic.h uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev, rdev 932 drivers/gpu/drm/radeon/radeon_asic.h void uvd_v1_0_set_wptr(struct radeon_device *rdev, rdev 934 drivers/gpu/drm/radeon/radeon_asic.h int uvd_v1_0_resume(struct radeon_device *rdev); rdev 936 drivers/gpu/drm/radeon/radeon_asic.h int uvd_v1_0_init(struct radeon_device *rdev); rdev 937 drivers/gpu/drm/radeon/radeon_asic.h void uvd_v1_0_fini(struct radeon_device *rdev); rdev 938 drivers/gpu/drm/radeon/radeon_asic.h int uvd_v1_0_start(struct radeon_device *rdev); rdev 939 drivers/gpu/drm/radeon/radeon_asic.h void uvd_v1_0_stop(struct radeon_device *rdev); rdev 941 drivers/gpu/drm/radeon/radeon_asic.h int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 942 drivers/gpu/drm/radeon/radeon_asic.h void uvd_v1_0_fence_emit(struct radeon_device *rdev, rdev 944 drivers/gpu/drm/radeon/radeon_asic.h int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); rdev 945 drivers/gpu/drm/radeon/radeon_asic.h bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, rdev 949 drivers/gpu/drm/radeon/radeon_asic.h void uvd_v1_0_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); rdev 952 drivers/gpu/drm/radeon/radeon_asic.h int uvd_v2_2_resume(struct radeon_device *rdev); rdev 953 drivers/gpu/drm/radeon/radeon_asic.h void uvd_v2_2_fence_emit(struct radeon_device *rdev, rdev 955 drivers/gpu/drm/radeon/radeon_asic.h bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev, rdev 961 drivers/gpu/drm/radeon/radeon_asic.h bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, rdev 967 drivers/gpu/drm/radeon/radeon_asic.h int uvd_v4_2_resume(struct radeon_device *rdev); rdev 970 drivers/gpu/drm/radeon/radeon_asic.h uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev, rdev 972 drivers/gpu/drm/radeon/radeon_asic.h uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, rdev 974 drivers/gpu/drm/radeon/radeon_asic.h void vce_v1_0_set_wptr(struct radeon_device *rdev, rdev 976 drivers/gpu/drm/radeon/radeon_asic.h int vce_v1_0_load_fw(struct radeon_device *rdev, uint32_t *data); rdev 977 drivers/gpu/drm/radeon/radeon_asic.h unsigned vce_v1_0_bo_size(struct radeon_device *rdev); rdev 978 drivers/gpu/drm/radeon/radeon_asic.h int vce_v1_0_resume(struct radeon_device *rdev); rdev 979 drivers/gpu/drm/radeon/radeon_asic.h int vce_v1_0_init(struct radeon_device *rdev); rdev 980 drivers/gpu/drm/radeon/radeon_asic.h int vce_v1_0_start(struct radeon_device *rdev); rdev 983 drivers/gpu/drm/radeon/radeon_asic.h unsigned vce_v2_0_bo_size(struct radeon_device *rdev); rdev 984 drivers/gpu/drm/radeon/radeon_asic.h int vce_v2_0_resume(struct radeon_device *rdev); rdev 52 drivers/gpu/drm/radeon/radeon_atombios.c static void radeon_lookup_i2c_gpio_quirks(struct radeon_device *rdev, rdev 57 drivers/gpu/drm/radeon/radeon_atombios.c if ((rdev->family == CHIP_R420) || rdev 58 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->family == CHIP_R423) || rdev 59 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->family == CHIP_RV410)) { rdev 69 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) { rdev 82 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE3(rdev)) { rdev 133 drivers/gpu/drm/radeon/radeon_atombios.c static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rdev, rdev 136 drivers/gpu/drm/radeon/radeon_atombios.c struct atom_context *ctx = rdev->mode_info.atom_context; rdev 156 drivers/gpu/drm/radeon/radeon_atombios.c radeon_lookup_i2c_gpio_quirks(rdev, gpio, i); rdev 170 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atombios_i2c_init(struct radeon_device *rdev) rdev 172 drivers/gpu/drm/radeon/radeon_atombios.c struct atom_context *ctx = rdev->mode_info.atom_context; rdev 189 drivers/gpu/drm/radeon/radeon_atombios.c radeon_lookup_i2c_gpio_quirks(rdev, gpio, i); rdev 195 drivers/gpu/drm/radeon/radeon_atombios.c rdev->i2c_bus[i] = radeon_i2c_create(rdev->ddev, &i2c, stmp); rdev 203 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_gpio_rec radeon_atombios_lookup_gpio(struct radeon_device *rdev, rdev 206 drivers/gpu/drm/radeon/radeon_atombios.c struct atom_context *ctx = rdev->mode_info.atom_context; rdev 241 drivers/gpu/drm/radeon/radeon_atombios.c static struct radeon_hpd radeon_atom_get_hpd_info_from_gpio(struct radeon_device *rdev, rdev 249 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE6(rdev)) rdev 251 drivers/gpu/drm/radeon/radeon_atombios.c else if (ASIC_IS_DCE4(rdev)) rdev 439 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 440 drivers/gpu/drm/radeon/radeon_atombios.c *i2c_bus = radeon_lookup_i2c_gpio(rdev, 0x93); rdev 523 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 524 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 590 drivers/gpu/drm/radeon/radeon_atombios.c if ((rdev->flags & RADEON_IS_IGP) && rdev 733 drivers/gpu/drm/radeon/radeon_atombios.c radeon_lookup_i2c_gpio(rdev, rdev 795 drivers/gpu/drm/radeon/radeon_atombios.c ddc_bus = radeon_lookup_i2c_gpio(rdev, rdev 803 drivers/gpu/drm/radeon/radeon_atombios.c gpio = radeon_atombios_lookup_gpio(rdev, rdev 805 drivers/gpu/drm/radeon/radeon_atombios.c hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio); rdev 854 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 856 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->flags & RADEON_IS_IGP) { rdev 862 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 905 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 906 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 983 drivers/gpu/drm/radeon/radeon_atombios.c radeon_lookup_i2c_gpio(rdev, rdev 1025 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) rdev 1121 drivers/gpu/drm/radeon/radeon_atombios.c static void radeon_atombios_get_dentist_vco_freq(struct radeon_device *rdev) rdev 1123 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1133 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = rdev 1140 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 1141 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1145 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *p1pll = &rdev->clock.p1pll; rdev 1146 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *p2pll = &rdev->clock.p2pll; rdev 1147 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *dcpll = &rdev->clock.dcpll; rdev 1148 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *spll = &rdev->clock.spll; rdev 1149 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_pll *mpll = &rdev->clock.mpll; rdev 1186 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_AVIVO(rdev)) rdev 1200 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) rdev 1215 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_AVIVO(rdev)) rdev 1227 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) rdev 1242 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_AVIVO(rdev)) rdev 1253 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk = rdev 1255 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk = rdev 1258 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) { rdev 1259 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = rdev 1261 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->clock.default_dispclk == 0) { rdev 1262 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE6(rdev)) rdev 1263 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 60000; /* 600 Mhz */ rdev 1264 drivers/gpu/drm/radeon/radeon_atombios.c else if (ASIC_IS_DCE5(rdev)) rdev 1265 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 54000; /* 540 Mhz */ rdev 1267 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 60000; /* 600 Mhz */ rdev 1270 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE6(rdev) && (rdev->clock.default_dispclk < 53900)) { rdev 1272 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk / 100); rdev 1273 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_dispclk = 60000; rdev 1275 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.dp_extclk = rdev 1277 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.current_dispclk = rdev->clock.default_dispclk; rdev 1281 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock); rdev 1282 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->clock.max_pixel_clock == 0) rdev 1283 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.max_pixel_clock = 40000; rdev 1286 drivers/gpu/drm/radeon/radeon_atombios.c rdev->mode_info.firmware_flags = rdev 1289 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE8(rdev)) rdev 1290 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = rdev 1292 drivers/gpu/drm/radeon/radeon_atombios.c else if (ASIC_IS_DCE5(rdev)) rdev 1293 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = rdev->clock.current_dispclk; rdev 1294 drivers/gpu/drm/radeon/radeon_atombios.c else if (ASIC_IS_DCE41(rdev)) rdev 1295 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_get_dentist_vco_freq(rdev); rdev 1297 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = rdev->clock.current_dispclk; rdev 1299 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->clock.vco_freq == 0) rdev 1300 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.vco_freq = 360000; /* 3.6 GHz */ rdev 1308 drivers/gpu/drm/radeon/radeon_atombios.c bool radeon_atombios_sideport_present(struct radeon_device *rdev) rdev 1310 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1317 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family == CHIP_RS600) rdev 1345 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 1346 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1390 drivers/gpu/drm/radeon/radeon_atombios.c bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, rdev 1394 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1430 drivers/gpu/drm/radeon/radeon_atombios.c static void radeon_atombios_get_igp_ss_overrides(struct radeon_device *rdev, rdev 1434 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1518 drivers/gpu/drm/radeon/radeon_atombios.c bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, rdev 1522 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1531 drivers/gpu/drm/radeon/radeon_atombios.c if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_MEMORY_CLOCK_SS_SUPPORT)) rdev 1535 drivers/gpu/drm/radeon/radeon_atombios.c if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_ENGINE_CLOCK_SS_SUPPORT)) rdev 1607 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->flags & RADEON_IS_IGP) rdev 1608 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_get_igp_ss_overrides(rdev, ss, id); rdev 1634 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 1635 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1741 drivers/gpu/drm/radeon/radeon_atombios.c rdev->mode_info.bios_hardcoded_edid = edid; rdev 1742 drivers/gpu/drm/radeon/radeon_atombios.c rdev->mode_info.bios_hardcoded_edid_size = edid_size; rdev 1774 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 1775 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1801 drivers/gpu/drm/radeon/radeon_atombios.c bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, rdev 1804 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1899 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_get_tv_info(struct radeon_device *rdev) rdev 1901 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1960 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 1961 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1992 drivers/gpu/drm/radeon/radeon_atombios.c tv_dac->tv_std = radeon_atombios_get_tv_info(rdev); rdev 2053 drivers/gpu/drm/radeon/radeon_atombios.c static void radeon_atombios_parse_misc_flags_1_3(struct radeon_device *rdev, rdev 2057 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].misc = misc; rdev 2058 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].misc2 = misc2; rdev 2061 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2064 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2067 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2070 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2073 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2075 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags &= rdev 2079 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2082 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2084 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_power_state_index = state_index; rdev 2085 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].default_clock_mode = rdev 2086 drivers/gpu/drm/radeon/radeon_atombios.c &rdev->pm.power_state[state_index].clock_info[0]; rdev 2088 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].flags |= rdev 2093 drivers/gpu/drm/radeon/radeon_atombios.c static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) rdev 2095 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2116 drivers/gpu/drm/radeon/radeon_atombios.c i2c_bus = radeon_lookup_i2c_gpio(rdev, power_info->info.ucOverdriveI2cLine); rdev 2117 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); rdev 2118 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.i2c_bus) { rdev 2124 drivers/gpu/drm/radeon/radeon_atombios.c i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); rdev 2132 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state = kcalloc(num_modes, rdev 2135 drivers/gpu/drm/radeon/radeon_atombios.c if (!rdev->pm.power_state) rdev 2139 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info = rdev 2142 drivers/gpu/drm/radeon/radeon_atombios.c if (!rdev->pm.power_state[state_index].clock_info) rdev 2144 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].num_clock_modes = 1; rdev 2145 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; rdev 2148 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev 2150 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev 2153 drivers/gpu/drm/radeon/radeon_atombios.c if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || rdev 2154 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) rdev 2156 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].pcie_lanes = rdev 2161 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = rdev 2163 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio = rdev 2164 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_lookup_gpio(rdev, rdev 2167 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2170 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2173 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = rdev 2175 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.vddc_id = rdev 2178 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags = RADEON_PM_STATE_SINGLE_DISPLAY_ONLY; rdev 2179 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_parse_misc_flags_1_3(rdev, state_index, misc, 0); rdev 2183 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev 2185 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev 2188 drivers/gpu/drm/radeon/radeon_atombios.c if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || rdev 2189 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) rdev 2191 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].pcie_lanes = rdev 2197 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = rdev 2199 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio = rdev 2200 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_lookup_gpio(rdev, rdev 2203 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2206 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2209 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = rdev 2211 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.vddc_id = rdev 2214 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags = RADEON_PM_STATE_SINGLE_DISPLAY_ONLY; rdev 2215 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_parse_misc_flags_1_3(rdev, state_index, misc, misc2); rdev 2219 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev 2221 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev 2224 drivers/gpu/drm/radeon/radeon_atombios.c if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || rdev 2225 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) rdev 2227 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].pcie_lanes = rdev 2233 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = rdev 2235 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio = rdev 2236 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_lookup_gpio(rdev, rdev 2239 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2242 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2245 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = rdev 2247 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.vddc_id = rdev 2250 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.vddci_enabled = rdev 2252 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.vddci_id = rdev 2256 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags = RADEON_PM_STATE_SINGLE_DISPLAY_ONLY; rdev 2257 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_parse_misc_flags_1_3(rdev, state_index, misc, misc2); rdev 2263 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.default_power_state_index == -1) { rdev 2264 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index - 1].type = rdev 2266 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_power_state_index = state_index - 1; rdev 2267 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index - 1].default_clock_mode = rdev 2268 drivers/gpu/drm/radeon/radeon_atombios.c &rdev->pm.power_state[state_index - 1].clock_info[0]; rdev 2269 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags &= rdev 2271 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].misc = 0; rdev 2272 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].misc2 = 0; rdev 2277 drivers/gpu/drm/radeon/radeon_atombios.c static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *rdev, rdev 2285 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.no_fan = true; rdev 2286 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.fan_pulses_per_revolution = rdev 2288 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.fan_pulses_per_revolution) { rdev 2289 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.fan_min_rpm = controller->ucFanMinRPM; rdev 2290 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.fan_max_rpm = controller->ucFanMaxRPM; rdev 2296 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_RV6XX; rdev 2301 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_RV770; rdev 2306 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_EVERGREEN; rdev 2311 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_SUMO; rdev 2316 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_NI; rdev 2321 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_SI; rdev 2326 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_CI; rdev 2331 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_KV; rdev 2337 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL_GPIO; rdev 2343 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_ADT7473_WITH_INTERNAL; rdev 2349 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_EMC2103_WITH_INTERNAL; rdev 2356 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL; rdev 2357 drivers/gpu/drm/radeon/radeon_atombios.c i2c_bus = radeon_lookup_i2c_gpio(rdev, controller->ucI2cLine); rdev 2358 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); rdev 2359 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.i2c_bus) { rdev 2364 drivers/gpu/drm/radeon/radeon_atombios.c i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); rdev 2376 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atombios_get_default_voltages(struct radeon_device *rdev, rdev 2379 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2402 drivers/gpu/drm/radeon/radeon_atombios.c static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 2411 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); rdev 2413 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].misc = misc; rdev 2414 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].misc2 = misc2; rdev 2415 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].pcie_lanes = rdev 2420 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2424 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2428 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2433 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2437 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags = 0; rdev 2439 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags |= rdev 2442 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2444 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_power_state_index = state_index; rdev 2445 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].default_clock_mode = rdev 2446 drivers/gpu/drm/radeon/radeon_atombios.c &rdev->pm.power_state[state_index].clock_info[mode_index - 1]; rdev 2447 drivers/gpu/drm/radeon/radeon_atombios.c if ((rdev->family >= CHIP_BARTS) && !(rdev->flags & RADEON_IS_IGP)) { rdev 2449 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_sclk = rdev->pm.power_state[state_index].clock_info[0].sclk; rdev 2450 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_mclk = rdev->pm.power_state[state_index].clock_info[0].mclk; rdev 2451 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_vddc = rdev->pm.power_state[state_index].clock_info[0].voltage.voltage; rdev 2452 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_vddci = rdev->pm.power_state[state_index].clock_info[0].voltage.vddci; rdev 2456 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) rdev 2457 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atom_get_max_voltage(rdev, rdev 2462 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[j].mclk = rdev 2463 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk; rdev 2464 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[j].sclk = rdev 2465 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk; rdev 2467 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[j].voltage.voltage = rdev 2470 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[j].voltage.vddci = rdev 2477 drivers/gpu/drm/radeon/radeon_atombios.c static bool radeon_atombios_parse_pplib_clock_info(struct radeon_device *rdev, rdev 2484 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->flags & RADEON_IS_IGP) { rdev 2485 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_PALM) { rdev 2488 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk; rdev 2492 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk; rdev 2494 drivers/gpu/drm/radeon/radeon_atombios.c } else if (rdev->family >= CHIP_BONAIRE) { rdev 2499 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].mclk = mclk; rdev 2500 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk; rdev 2501 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = rdev 2503 drivers/gpu/drm/radeon/radeon_atombios.c } else if (rdev->family >= CHIP_TAHITI) { rdev 2508 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].mclk = mclk; rdev 2509 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk; rdev 2510 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = rdev 2512 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = rdev 2514 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci = rdev 2516 drivers/gpu/drm/radeon/radeon_atombios.c } else if (rdev->family >= CHIP_CEDAR) { rdev 2521 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].mclk = mclk; rdev 2522 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk; rdev 2523 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = rdev 2525 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = rdev 2527 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci = rdev 2534 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].mclk = mclk; rdev 2535 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].sclk = sclk; rdev 2536 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = rdev 2538 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = rdev 2543 drivers/gpu/drm/radeon/radeon_atombios.c switch (rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage) { rdev 2552 drivers/gpu/drm/radeon/radeon_atombios.c if (radeon_atom_get_max_vddc(rdev, VOLTAGE_TYPE_VDDC, rdev 2553 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage, rdev 2555 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = vddc; rdev 2561 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->flags & RADEON_IS_IGP) { rdev 2563 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.power_state[state_index].clock_info[mode_index].sclk == 0) rdev 2567 drivers/gpu/drm/radeon/radeon_atombios.c if ((rdev->pm.power_state[state_index].clock_info[mode_index].mclk == 0) || rdev 2568 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->pm.power_state[state_index].clock_info[mode_index].sclk == 0)) rdev 2574 drivers/gpu/drm/radeon/radeon_atombios.c static int radeon_atombios_parse_power_table_4_5(struct radeon_device *rdev) rdev 2576 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2593 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController); rdev 2596 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state = kcalloc(power_info->pplib.ucNumStates, rdev 2599 drivers/gpu/drm/radeon/radeon_atombios.c if (!rdev->pm.power_state) rdev 2613 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[i].clock_info = rdev 2618 drivers/gpu/drm/radeon/radeon_atombios.c if (!rdev->pm.power_state[i].clock_info) rdev 2627 drivers/gpu/drm/radeon/radeon_atombios.c valid = radeon_atombios_parse_pplib_clock_info(rdev, rdev 2634 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev 2635 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk; rdev 2636 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev 2637 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk; rdev 2640 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].num_clock_modes = mode_index; rdev 2642 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_parse_pplib_non_clock_info(rdev, state_index, mode_index, rdev 2649 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.power_state[i].num_clock_modes > 1) rdev 2650 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[i].clock_info[0].flags |= rdev 2654 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.default_power_state_index == -1) { rdev 2655 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[0].type = rdev 2657 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_power_state_index = 0; rdev 2658 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[0].default_clock_mode = rdev 2659 drivers/gpu/drm/radeon/radeon_atombios.c &rdev->pm.power_state[0].clock_info[0]; rdev 2664 drivers/gpu/drm/radeon/radeon_atombios.c static int radeon_atombios_parse_power_table_6(struct radeon_device *rdev) rdev 2666 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2687 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController); rdev 2699 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state = kcalloc(state_array->ucNumEntries, rdev 2702 drivers/gpu/drm/radeon/radeon_atombios.c if (!rdev->pm.power_state) rdev 2711 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[i].clock_info = rdev 2716 drivers/gpu/drm/radeon/radeon_atombios.c if (!rdev->pm.power_state[i].clock_info) rdev 2723 drivers/gpu/drm/radeon/radeon_atombios.c valid = radeon_atombios_parse_pplib_clock_info(rdev, rdev 2730 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev 2731 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_mclk; rdev 2732 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev 2733 drivers/gpu/drm/radeon/radeon_atombios.c rdev->clock.default_sclk; rdev 2736 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].num_clock_modes = mode_index; rdev 2738 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atombios_parse_pplib_non_clock_info(rdev, state_index, mode_index, rdev 2746 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.power_state[i].num_clock_modes > 1) rdev 2747 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[i].clock_info[0].flags |= rdev 2751 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.default_power_state_index == -1) { rdev 2752 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[0].type = rdev 2754 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_power_state_index = 0; rdev 2755 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[0].default_clock_mode = rdev 2756 drivers/gpu/drm/radeon/radeon_atombios.c &rdev->pm.power_state[0].clock_info[0]; rdev 2761 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atombios_get_power_modes(struct radeon_device *rdev) rdev 2763 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2769 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_power_state_index = -1; rdev 2777 drivers/gpu/drm/radeon/radeon_atombios.c state_index = radeon_atombios_parse_power_table_1_3(rdev); rdev 2781 drivers/gpu/drm/radeon/radeon_atombios.c state_index = radeon_atombios_parse_power_table_4_5(rdev); rdev 2784 drivers/gpu/drm/radeon/radeon_atombios.c state_index = radeon_atombios_parse_power_table_6(rdev); rdev 2792 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state), GFP_KERNEL); rdev 2793 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.power_state) { rdev 2794 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[0].clock_info = rdev 2798 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.power_state[0].clock_info) { rdev 2800 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].type = rdev 2802 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].num_clock_modes = 1; rdev 2803 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; rdev 2804 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; rdev 2805 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].default_clock_mode = rdev 2806 drivers/gpu/drm/radeon/radeon_atombios.c &rdev->pm.power_state[state_index].clock_info[0]; rdev 2807 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; rdev 2808 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].pcie_lanes = 16; rdev 2809 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.default_power_state_index = state_index; rdev 2810 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[state_index].flags = 0; rdev 2816 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.num_power_states = state_index; rdev 2818 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; rdev 2819 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.current_clock_mode_index = 0; rdev 2820 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.default_power_state_index >= 0) rdev 2821 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.current_vddc = rdev 2822 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; rdev 2824 drivers/gpu/drm/radeon/radeon_atombios.c rdev->pm.current_vddc = 0; rdev 2837 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_clock_dividers(struct radeon_device *rdev, rdev 2850 drivers/gpu/drm/radeon/radeon_atombios.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 2859 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2869 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family <= CHIP_RV770) { rdev 2873 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2878 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family == CHIP_RV770) { rdev 2888 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2902 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_TAHITI) rdev 2908 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2927 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2938 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 2954 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_memory_pll_dividers(struct radeon_device *rdev, rdev 2966 drivers/gpu/drm/radeon/radeon_atombios.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 2979 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3005 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable) rdev 3012 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3015 drivers/gpu/drm/radeon/radeon_atombios.c uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev) rdev 3020 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3024 drivers/gpu/drm/radeon/radeon_atombios.c uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev) rdev 3029 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3033 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_set_engine_clock(struct radeon_device *rdev, rdev 3041 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3044 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_set_memory_clock(struct radeon_device *rdev, rdev 3050 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->flags & RADEON_IS_IGP) rdev 3055 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3058 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_set_engine_dram_timings(struct radeon_device *rdev, rdev 3074 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3077 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_update_memory_dll(struct radeon_device *rdev, rdev 3085 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3088 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_set_ac_timing(struct radeon_device *rdev, rdev 3097 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3107 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type) rdev 3113 drivers/gpu/drm/radeon/radeon_atombios.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 3141 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3144 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_max_vddc(struct radeon_device *rdev, u8 voltage_type, rdev 3151 drivers/gpu/drm/radeon/radeon_atombios.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 3162 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3171 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3183 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_leakage_vddc_based_on_leakage_idx(struct radeon_device *rdev, rdev 3187 drivers/gpu/drm/radeon/radeon_atombios.c return radeon_atom_get_max_vddc(rdev, VOLTAGE_TYPE_VDDC, leakage_idx, voltage); rdev 3190 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_leakage_id_from_vbios(struct radeon_device *rdev, rdev 3197 drivers/gpu/drm/radeon/radeon_atombios.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 3207 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3219 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_leakage_vddc_based_on_leakage_params(struct radeon_device *rdev, rdev 3234 drivers/gpu/drm/radeon/radeon_atombios.c if (!atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3239 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3250 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset + rdev 3253 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset + rdev 3256 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset + rdev 3259 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset + rdev 3262 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset + rdev 3310 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_voltage_evv(struct radeon_device *rdev, rdev 3316 drivers/gpu/drm/radeon/radeon_atombios.c u32 count = rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; rdev 3320 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == rdev 3332 drivers/gpu/drm/radeon/radeon_atombios.c cpu_to_le32(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk); rdev 3334 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3341 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev, rdev 3349 drivers/gpu/drm/radeon/radeon_atombios.c if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) rdev 3360 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3368 drivers/gpu/drm/radeon/radeon_atombios.c atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); rdev 3444 drivers/gpu/drm/radeon/radeon_atombios.c radeon_atom_is_voltage_gpio(struct radeon_device *rdev, rdev 3453 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3456 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3502 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_svi2_info(struct radeon_device *rdev, rdev 3512 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3515 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3546 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_max_voltage(struct radeon_device *rdev, rdev 3555 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3558 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3605 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_min_voltage(struct radeon_device *rdev, rdev 3614 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3617 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3655 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_voltage_step(struct radeon_device *rdev, rdev 3664 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3667 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3696 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_round_to_true_voltage(struct radeon_device *rdev, rdev 3703 drivers/gpu/drm/radeon/radeon_atombios.c if (radeon_atom_get_max_voltage(rdev, voltage_type, &max_voltage)) rdev 3705 drivers/gpu/drm/radeon/radeon_atombios.c if (radeon_atom_get_min_voltage(rdev, voltage_type, &min_voltage)) rdev 3707 drivers/gpu/drm/radeon/radeon_atombios.c if (radeon_atom_get_voltage_step(rdev, voltage_type, &voltage_step)) rdev 3722 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_voltage_table(struct radeon_device *rdev, rdev 3733 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3736 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3758 drivers/gpu/drm/radeon/radeon_atombios.c ret = radeon_atom_get_voltage_gpio_settings(rdev, rdev 3823 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_memory_info(struct radeon_device *rdev, rdev 3833 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3836 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3912 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_get_mclk_range_table(struct radeon_device *rdev, rdev 3925 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 3928 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 3985 drivers/gpu/drm/radeon/radeon_atombios.c int radeon_atom_init_mc_reg_table(struct radeon_device *rdev, rdev 3997 drivers/gpu/drm/radeon/radeon_atombios.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size, rdev 4000 drivers/gpu/drm/radeon/radeon_atombios.c (rdev->mode_info.atom_context->bios + data_offset); rdev 4078 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 4081 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) { rdev 4096 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) rdev 4099 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) { rdev 4109 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_save_bios_scratch_regs(struct radeon_device *rdev) rdev 4114 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 4120 drivers/gpu/drm/radeon/radeon_atombios.c rdev->bios_scratch[i] = RREG32(scratch_reg + (i * 4)); rdev 4123 drivers/gpu/drm/radeon/radeon_atombios.c void radeon_restore_bios_scratch_regs(struct radeon_device *rdev) rdev 4128 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 4134 drivers/gpu/drm/radeon/radeon_atombios.c WREG32(scratch_reg + (i * 4), rdev->bios_scratch[i]); rdev 4140 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 4143 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 4156 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 4169 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 4175 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) { rdev 4338 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) { rdev 4353 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 4357 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) rdev 4360 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 4398 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 4408 drivers/gpu/drm/radeon/radeon_atombios.c struct radeon_device *rdev = dev->dev_private; rdev 4412 drivers/gpu/drm/radeon/radeon_atombios.c if (ASIC_IS_DCE4(rdev)) rdev 4415 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 4481 drivers/gpu/drm/radeon/radeon_atombios.c if (rdev->family >= CHIP_R600) rdev 32 drivers/gpu/drm/radeon/radeon_audio.c void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, rdev 34 drivers/gpu/drm/radeon/radeon_audio.c void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, rdev 36 drivers/gpu/drm/radeon/radeon_audio.c void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, rdev 38 drivers/gpu/drm/radeon/radeon_audio.c u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); rdev 39 drivers/gpu/drm/radeon/radeon_audio.c void dce6_endpoint_wreg(struct radeon_device *rdev, rdev 63 drivers/gpu/drm/radeon/radeon_audio.c struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); rdev 64 drivers/gpu/drm/radeon/radeon_audio.c struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); rdev 66 drivers/gpu/drm/radeon/radeon_audio.c void r600_hdmi_audio_set_dto(struct radeon_device *rdev, rdev 68 drivers/gpu/drm/radeon/radeon_audio.c void dce3_2_audio_set_dto(struct radeon_device *rdev, rdev 70 drivers/gpu/drm/radeon/radeon_audio.c void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, rdev 72 drivers/gpu/drm/radeon/radeon_audio.c void dce4_dp_audio_set_dto(struct radeon_device *rdev, rdev 74 drivers/gpu/drm/radeon/radeon_audio.c void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, rdev 76 drivers/gpu/drm/radeon/radeon_audio.c void dce6_dp_audio_set_dto(struct radeon_device *rdev, rdev 78 drivers/gpu/drm/radeon/radeon_audio.c void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, rdev 80 drivers/gpu/drm/radeon/radeon_audio.c void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, rdev 117 drivers/gpu/drm/radeon/radeon_audio.c static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) rdev 122 drivers/gpu/drm/radeon/radeon_audio.c static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, rdev 245 drivers/gpu/drm/radeon/radeon_audio.c static void radeon_audio_enable(struct radeon_device *rdev, rdev 256 drivers/gpu/drm/radeon/radeon_audio.c if (rdev->mode_info.mode_config_initialized) { rdev 257 drivers/gpu/drm/radeon/radeon_audio.c list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { rdev 270 drivers/gpu/drm/radeon/radeon_audio.c if (rdev->audio.funcs->enable) rdev 271 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.funcs->enable(rdev, pin, enable_mask); rdev 274 drivers/gpu/drm/radeon/radeon_audio.c static void radeon_audio_interface_init(struct radeon_device *rdev) rdev 276 drivers/gpu/drm/radeon/radeon_audio.c if (ASIC_IS_DCE6(rdev)) { rdev 277 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.funcs = &dce6_funcs; rdev 278 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; rdev 279 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.dp_funcs = &dce6_dp_funcs; rdev 280 drivers/gpu/drm/radeon/radeon_audio.c } else if (ASIC_IS_DCE4(rdev)) { rdev 281 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.funcs = &dce4_funcs; rdev 282 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; rdev 283 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.dp_funcs = &dce4_dp_funcs; rdev 284 drivers/gpu/drm/radeon/radeon_audio.c } else if (ASIC_IS_DCE32(rdev)) { rdev 285 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.funcs = &dce32_funcs; rdev 286 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; rdev 287 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.dp_funcs = &dce32_dp_funcs; rdev 289 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.funcs = &r600_funcs; rdev 290 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.hdmi_funcs = &r600_hdmi_funcs; rdev 291 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.dp_funcs = 0; rdev 295 drivers/gpu/drm/radeon/radeon_audio.c static int radeon_audio_chipset_supported(struct radeon_device *rdev) rdev 297 drivers/gpu/drm/radeon/radeon_audio.c return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); rdev 300 drivers/gpu/drm/radeon/radeon_audio.c int radeon_audio_init(struct radeon_device *rdev) rdev 304 drivers/gpu/drm/radeon/radeon_audio.c if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) rdev 307 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.enabled = true; rdev 309 drivers/gpu/drm/radeon/radeon_audio.c if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ rdev 310 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.num_pins = 3; rdev 311 drivers/gpu/drm/radeon/radeon_audio.c else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ rdev 312 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.num_pins = 7; rdev 313 drivers/gpu/drm/radeon/radeon_audio.c else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ rdev 314 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.num_pins = 7; rdev 315 drivers/gpu/drm/radeon/radeon_audio.c else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ rdev 316 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.num_pins = 2; rdev 317 drivers/gpu/drm/radeon/radeon_audio.c else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ rdev 318 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.num_pins = 6; rdev 319 drivers/gpu/drm/radeon/radeon_audio.c else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ rdev 320 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.num_pins = 6; rdev 322 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.num_pins = 1; rdev 324 drivers/gpu/drm/radeon/radeon_audio.c for (i = 0; i < rdev->audio.num_pins; i++) { rdev 325 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].channels = -1; rdev 326 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].rate = -1; rdev 327 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].bits_per_sample = -1; rdev 328 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].status_bits = 0; rdev 329 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].category_code = 0; rdev 330 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].connected = false; rdev 331 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].offset = pin_offsets[i]; rdev 332 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.pin[i].id = i; rdev 335 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_interface_init(rdev); rdev 338 drivers/gpu/drm/radeon/radeon_audio.c for (i = 0; i < rdev->audio.num_pins; i++) rdev 339 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); rdev 344 drivers/gpu/drm/radeon/radeon_audio.c u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) rdev 346 drivers/gpu/drm/radeon/radeon_audio.c if (rdev->audio.funcs->endpoint_rreg) rdev 347 drivers/gpu/drm/radeon/radeon_audio.c return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); rdev 352 drivers/gpu/drm/radeon/radeon_audio.c void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, rdev 355 drivers/gpu/drm/radeon/radeon_audio.c if (rdev->audio.funcs->endpoint_wreg) rdev 356 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); rdev 421 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 425 drivers/gpu/drm/radeon/radeon_audio.c return radeon_encoder->audio->get_pin(rdev); rdev 443 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_device *rdev = dev->dev_private; rdev 447 drivers/gpu/drm/radeon/radeon_audio.c if (!radeon_audio_chipset_supported(rdev)) rdev 461 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio = rdev->audio.dp_funcs; rdev 463 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio = rdev->audio.hdmi_funcs; rdev 465 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio = rdev->audio.hdmi_funcs; rdev 471 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_enable(rdev, dig->pin, 0xf); rdev 473 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_enable(rdev, dig->pin, 0); rdev 477 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_enable(rdev, dig->pin, 0); rdev 482 drivers/gpu/drm/radeon/radeon_audio.c void radeon_audio_fini(struct radeon_device *rdev) rdev 486 drivers/gpu/drm/radeon/radeon_audio.c if (!rdev->audio.enabled) rdev 489 drivers/gpu/drm/radeon/radeon_audio.c for (i = 0; i < rdev->audio.num_pins; i++) rdev 490 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); rdev 492 drivers/gpu/drm/radeon/radeon_audio.c rdev->audio.enabled = false; rdev 497 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 502 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio->set_dto(rdev, crtc, clock); rdev 508 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 540 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, rdev 734 drivers/gpu/drm/radeon/radeon_audio.c struct radeon_device *rdev = dev->dev_private; rdev 749 drivers/gpu/drm/radeon/radeon_audio.c radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); rdev 31 drivers/gpu/drm/radeon/radeon_audio.h radeon_audio_endpoint_rreg(rdev, (block), (reg)) rdev 33 drivers/gpu/drm/radeon/radeon_audio.h radeon_audio_endpoint_wreg(rdev, (block), (reg), (v)) rdev 37 drivers/gpu/drm/radeon/radeon_audio.h u32 (*endpoint_rreg)(struct radeon_device *rdev, u32 offset, u32 reg); rdev 38 drivers/gpu/drm/radeon/radeon_audio.h void (*endpoint_wreg)(struct radeon_device *rdev, rdev 40 drivers/gpu/drm/radeon/radeon_audio.h void (*enable)(struct radeon_device *rdev, rdev 47 drivers/gpu/drm/radeon/radeon_audio.h struct r600_audio_pin* (*get_pin)(struct radeon_device *rdev); rdev 54 drivers/gpu/drm/radeon/radeon_audio.h void (*set_dto)(struct radeon_device *rdev, rdev 60 drivers/gpu/drm/radeon/radeon_audio.h void (*set_avi_packet)(struct radeon_device *rdev, u32 offset, rdev 69 drivers/gpu/drm/radeon/radeon_audio.h int radeon_audio_init(struct radeon_device *rdev); rdev 73 drivers/gpu/drm/radeon/radeon_audio.h u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, rdev 75 drivers/gpu/drm/radeon/radeon_audio.h void radeon_audio_endpoint_wreg(struct radeon_device *rdev, rdev 78 drivers/gpu/drm/radeon/radeon_audio.h void radeon_audio_fini(struct radeon_device *rdev); rdev 35 drivers/gpu/drm/radeon/radeon_benchmark.c static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, rdev 49 drivers/gpu/drm/radeon/radeon_benchmark.c fence = radeon_copy_dma(rdev, saddr, daddr, rdev 54 drivers/gpu/drm/radeon/radeon_benchmark.c fence = radeon_copy_blit(rdev, saddr, daddr, rdev 87 drivers/gpu/drm/radeon/radeon_benchmark.c static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, rdev 97 drivers/gpu/drm/radeon/radeon_benchmark.c r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj); rdev 109 drivers/gpu/drm/radeon/radeon_benchmark.c r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj); rdev 122 drivers/gpu/drm/radeon/radeon_benchmark.c if (rdev->asic->copy.dma) { rdev 123 drivers/gpu/drm/radeon/radeon_benchmark.c time = radeon_benchmark_do_move(rdev, size, saddr, daddr, rdev 133 drivers/gpu/drm/radeon/radeon_benchmark.c if (rdev->asic->copy.blit) { rdev 134 drivers/gpu/drm/radeon/radeon_benchmark.c time = radeon_benchmark_do_move(rdev, size, saddr, daddr, rdev 167 drivers/gpu/drm/radeon/radeon_benchmark.c void radeon_benchmark(struct radeon_device *rdev, int test_number) rdev 193 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT, rdev 195 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, rdev 200 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, rdev 206 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, rdev 213 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, rdev 220 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, rdev 227 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, common_modes[i], rdev 234 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, common_modes[i], rdev 241 drivers/gpu/drm/radeon/radeon_benchmark.c radeon_benchmark_move(rdev, common_modes[i], rdev 49 drivers/gpu/drm/radeon/radeon_bios.c static bool igp_read_bios_from_vram(struct radeon_device *rdev) rdev 55 drivers/gpu/drm/radeon/radeon_bios.c if (!(rdev->flags & RADEON_IS_IGP)) rdev 56 drivers/gpu/drm/radeon/radeon_bios.c if (!radeon_card_posted(rdev)) rdev 59 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = NULL; rdev 60 drivers/gpu/drm/radeon/radeon_bios.c vram_base = pci_resource_start(rdev->pdev, 0); rdev 70 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = kmalloc(size, GFP_KERNEL); rdev 71 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->bios == NULL) { rdev 75 drivers/gpu/drm/radeon/radeon_bios.c memcpy_fromio(rdev->bios, bios, size); rdev 80 drivers/gpu/drm/radeon/radeon_bios.c static bool radeon_read_bios(struct radeon_device *rdev) rdev 85 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = NULL; rdev 87 drivers/gpu/drm/radeon/radeon_bios.c bios = pci_map_rom(rdev->pdev, &size); rdev 96 drivers/gpu/drm/radeon/radeon_bios.c pci_unmap_rom(rdev->pdev, bios); rdev 99 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = kzalloc(size, GFP_KERNEL); rdev 100 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->bios == NULL) { rdev 101 drivers/gpu/drm/radeon/radeon_bios.c pci_unmap_rom(rdev->pdev, bios); rdev 104 drivers/gpu/drm/radeon/radeon_bios.c memcpy_fromio(rdev->bios, bios, size); rdev 105 drivers/gpu/drm/radeon/radeon_bios.c pci_unmap_rom(rdev->pdev, bios); rdev 109 drivers/gpu/drm/radeon/radeon_bios.c static bool radeon_read_platform_bios(struct radeon_device *rdev) rdev 114 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = NULL; rdev 116 drivers/gpu/drm/radeon/radeon_bios.c bios = pci_platform_rom(rdev->pdev, &size); rdev 124 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = kmemdup(bios, size, GFP_KERNEL); rdev 125 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->bios == NULL) { rdev 180 drivers/gpu/drm/radeon/radeon_bios.c static bool radeon_atrm_get_bios(struct radeon_device *rdev) rdev 191 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->flags & RADEON_IS_IGP) rdev 223 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = kmalloc(size, GFP_KERNEL); rdev 224 drivers/gpu/drm/radeon/radeon_bios.c if (!rdev->bios) { rdev 231 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios, rdev 238 drivers/gpu/drm/radeon/radeon_bios.c if (i == 0 || rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) { rdev 239 drivers/gpu/drm/radeon/radeon_bios.c kfree(rdev->bios); rdev 245 drivers/gpu/drm/radeon/radeon_bios.c static inline bool radeon_atrm_get_bios(struct radeon_device *rdev) rdev 251 drivers/gpu/drm/radeon/radeon_bios.c static bool ni_read_disabled_bios(struct radeon_device *rdev) rdev 268 drivers/gpu/drm/radeon/radeon_bios.c if (!ASIC_IS_NODCE(rdev)) { rdev 281 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_bios(rdev); rdev 285 drivers/gpu/drm/radeon/radeon_bios.c if (!ASIC_IS_NODCE(rdev)) { rdev 294 drivers/gpu/drm/radeon/radeon_bios.c static bool r700_read_disabled_bios(struct radeon_device *rdev) rdev 327 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->family == CHIP_RV730) { rdev 343 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_bios(rdev); rdev 346 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->family == CHIP_RV730) { rdev 363 drivers/gpu/drm/radeon/radeon_bios.c static bool r600_read_disabled_bios(struct radeon_device *rdev) rdev 422 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_bios(rdev); rdev 440 drivers/gpu/drm/radeon/radeon_bios.c static bool avivo_read_disabled_bios(struct radeon_device *rdev) rdev 486 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_bios(rdev); rdev 501 drivers/gpu/drm/radeon/radeon_bios.c static bool legacy_read_disabled_bios(struct radeon_device *rdev) rdev 514 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->flags & RADEON_IS_PCIE) rdev 523 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) { rdev 527 drivers/gpu/drm/radeon/radeon_bios.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 539 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->flags & RADEON_IS_PCIE) rdev 549 drivers/gpu/drm/radeon/radeon_bios.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 560 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) { rdev 564 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_bios(rdev); rdev 569 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->flags & RADEON_IS_PCIE) rdev 574 drivers/gpu/drm/radeon/radeon_bios.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) { rdev 578 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) { rdev 584 drivers/gpu/drm/radeon/radeon_bios.c static bool radeon_read_disabled_bios(struct radeon_device *rdev) rdev 586 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->flags & RADEON_IS_IGP) rdev 587 drivers/gpu/drm/radeon/radeon_bios.c return igp_read_bios_from_vram(rdev); rdev 588 drivers/gpu/drm/radeon/radeon_bios.c else if (rdev->family >= CHIP_BARTS) rdev 589 drivers/gpu/drm/radeon/radeon_bios.c return ni_read_disabled_bios(rdev); rdev 590 drivers/gpu/drm/radeon/radeon_bios.c else if (rdev->family >= CHIP_RV770) rdev 591 drivers/gpu/drm/radeon/radeon_bios.c return r700_read_disabled_bios(rdev); rdev 592 drivers/gpu/drm/radeon/radeon_bios.c else if (rdev->family >= CHIP_R600) rdev 593 drivers/gpu/drm/radeon/radeon_bios.c return r600_read_disabled_bios(rdev); rdev 594 drivers/gpu/drm/radeon/radeon_bios.c else if (rdev->family >= CHIP_RS600) rdev 595 drivers/gpu/drm/radeon/radeon_bios.c return avivo_read_disabled_bios(rdev); rdev 597 drivers/gpu/drm/radeon/radeon_bios.c return legacy_read_disabled_bios(rdev); rdev 601 drivers/gpu/drm/radeon/radeon_bios.c static bool radeon_acpi_vfct_bios(struct radeon_device *rdev) rdev 636 drivers/gpu/drm/radeon/radeon_bios.c vhdr->PCIBus == rdev->pdev->bus->number && rdev 637 drivers/gpu/drm/radeon/radeon_bios.c vhdr->PCIDevice == PCI_SLOT(rdev->pdev->devfn) && rdev 638 drivers/gpu/drm/radeon/radeon_bios.c vhdr->PCIFunction == PCI_FUNC(rdev->pdev->devfn) && rdev 639 drivers/gpu/drm/radeon/radeon_bios.c vhdr->VendorID == rdev->pdev->vendor && rdev 640 drivers/gpu/drm/radeon/radeon_bios.c vhdr->DeviceID == rdev->pdev->device) { rdev 641 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = kmemdup(&vbios->VbiosContent, rdev 645 drivers/gpu/drm/radeon/radeon_bios.c if (!rdev->bios) rdev 655 drivers/gpu/drm/radeon/radeon_bios.c static inline bool radeon_acpi_vfct_bios(struct radeon_device *rdev) rdev 661 drivers/gpu/drm/radeon/radeon_bios.c bool radeon_get_bios(struct radeon_device *rdev) rdev 666 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_atrm_get_bios(rdev); rdev 668 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_acpi_vfct_bios(rdev); rdev 670 drivers/gpu/drm/radeon/radeon_bios.c r = igp_read_bios_from_vram(rdev); rdev 672 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_bios(rdev); rdev 674 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_disabled_bios(rdev); rdev 676 drivers/gpu/drm/radeon/radeon_bios.c r = radeon_read_platform_bios(rdev); rdev 677 drivers/gpu/drm/radeon/radeon_bios.c if (r == false || rdev->bios == NULL) { rdev 679 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = NULL; rdev 682 drivers/gpu/drm/radeon/radeon_bios.c if (rdev->bios[0] != 0x55 || rdev->bios[1] != 0xaa) { rdev 683 drivers/gpu/drm/radeon/radeon_bios.c printk("BIOS signature incorrect %x %x\n", rdev->bios[0], rdev->bios[1]); rdev 693 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios_header_start = RBIOS16(0x48); rdev 694 drivers/gpu/drm/radeon/radeon_bios.c if (!rdev->bios_header_start) { rdev 697 drivers/gpu/drm/radeon/radeon_bios.c tmp = rdev->bios_header_start + 4; rdev 698 drivers/gpu/drm/radeon/radeon_bios.c if (!memcmp(rdev->bios + tmp, "ATOM", 4) || rdev 699 drivers/gpu/drm/radeon/radeon_bios.c !memcmp(rdev->bios + tmp, "MOTA", 4)) { rdev 700 drivers/gpu/drm/radeon/radeon_bios.c rdev->is_atom_bios = true; rdev 702 drivers/gpu/drm/radeon/radeon_bios.c rdev->is_atom_bios = false; rdev 705 drivers/gpu/drm/radeon/radeon_bios.c DRM_DEBUG("%sBIOS detected\n", rdev->is_atom_bios ? "ATOM" : "COM"); rdev 708 drivers/gpu/drm/radeon/radeon_bios.c kfree(rdev->bios); rdev 709 drivers/gpu/drm/radeon/radeon_bios.c rdev->bios = NULL; rdev 39 drivers/gpu/drm/radeon/radeon_clocks.c uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) rdev 41 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; rdev 69 drivers/gpu/drm/radeon/radeon_clocks.c uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev) rdev 71 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *mpll = &rdev->clock.mpll; rdev 105 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_device *rdev = dev->dev_private; rdev 106 drivers/gpu/drm/radeon/radeon_clocks.c struct device_node *dp = rdev->pdev->dev.of_node; rdev 108 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p1pll = &rdev->clock.p1pll; rdev 109 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p2pll = &rdev->clock.p2pll; rdev 110 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; rdev 111 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *mpll = &rdev->clock.mpll; rdev 127 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->family >= CHIP_R420) { rdev 147 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.max_pixel_clock = 35000; rdev 156 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = (*val) / 10; rdev 158 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = rdev 159 drivers/gpu/drm/radeon/radeon_clocks.c radeon_legacy_get_engine_clock(rdev); rdev 163 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = (*val) / 10; rdev 165 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = rdev 166 drivers/gpu/drm/radeon/radeon_clocks.c radeon_legacy_get_memory_clock(rdev); rdev 181 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_device *rdev = dev->dev_private; rdev 182 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p1pll = &rdev->clock.p1pll; rdev 183 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *p2pll = &rdev->clock.p2pll; rdev 184 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *dcpll = &rdev->clock.dcpll; rdev 185 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; rdev 186 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *mpll = &rdev->clock.mpll; rdev 189 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->is_atom_bios) rdev 198 drivers/gpu/drm/radeon/radeon_clocks.c if (!ASIC_IS_AVIVO(rdev)) { rdev 200 drivers/gpu/drm/radeon/radeon_clocks.c if (ASIC_IS_R300(rdev)) rdev 212 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->family < CHIP_RS600) { rdev 221 drivers/gpu/drm/radeon/radeon_clocks.c if (ASIC_IS_AVIVO(rdev)) { rdev 227 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.max_pixel_clock = 35000; rdev 229 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->flags & RADEON_IS_IGP) { rdev 246 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->family >= CHIP_R420) { rdev 270 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = rdev 271 drivers/gpu/drm/radeon/radeon_clocks.c radeon_legacy_get_engine_clock(rdev); rdev 272 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = rdev 273 drivers/gpu/drm/radeon/radeon_clocks.c radeon_legacy_get_memory_clock(rdev); rdev 278 drivers/gpu/drm/radeon/radeon_clocks.c if (ASIC_IS_AVIVO(rdev)) { rdev 339 drivers/gpu/drm/radeon/radeon_clocks.c if (!rdev->clock.default_sclk) rdev 340 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_sclk = radeon_get_engine_clock(rdev); rdev 341 drivers/gpu/drm/radeon/radeon_clocks.c if ((!rdev->clock.default_mclk) && rdev->asic->pm.get_memory_clock) rdev 342 drivers/gpu/drm/radeon/radeon_clocks.c rdev->clock.default_mclk = radeon_get_memory_clock(rdev); rdev 344 drivers/gpu/drm/radeon/radeon_clocks.c rdev->pm.current_sclk = rdev->clock.default_sclk; rdev 345 drivers/gpu/drm/radeon/radeon_clocks.c rdev->pm.current_mclk = rdev->clock.default_mclk; rdev 350 drivers/gpu/drm/radeon/radeon_clocks.c static uint32_t calc_eng_mem_clock(struct radeon_device *rdev, rdev 354 drivers/gpu/drm/radeon/radeon_clocks.c struct radeon_pll *spll = &rdev->clock.spll; rdev 389 drivers/gpu/drm/radeon/radeon_clocks.c void radeon_legacy_set_engine_clock(struct radeon_device *rdev, rdev 397 drivers/gpu/drm/radeon/radeon_clocks.c eng_clock = calc_eng_mem_clock(rdev, eng_clock, &fb_div, &post_div); rdev 475 drivers/gpu/drm/radeon/radeon_clocks.c void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) rdev 480 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 496 drivers/gpu/drm/radeon/radeon_clocks.c } else if (ASIC_IS_R300(rdev)) { rdev 497 drivers/gpu/drm/radeon/radeon_clocks.c if ((rdev->family == CHIP_RS400) || rdev 498 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RS480)) { rdev 545 drivers/gpu/drm/radeon/radeon_clocks.c } else if (rdev->family >= CHIP_RV350) { rdev 620 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->mc.vram_width == 64) { rdev 673 drivers/gpu/drm/radeon/radeon_clocks.c if (((rdev->family == CHIP_RV250) && rdev 677 drivers/gpu/drm/radeon/radeon_clocks.c || ((rdev->family == CHIP_RV100) rdev 688 drivers/gpu/drm/radeon/radeon_clocks.c if ((rdev->family == CHIP_RV200) || rdev 689 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RV250) || rdev 690 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RV280)) { rdev 695 drivers/gpu/drm/radeon/radeon_clocks.c if (((rdev->family == CHIP_RV200) || rdev 696 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RV250)) && rdev 707 drivers/gpu/drm/radeon/radeon_clocks.c if (((rdev->family == CHIP_RV200) || rdev 708 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RV250)) && rdev 740 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 750 drivers/gpu/drm/radeon/radeon_clocks.c } else if ((rdev->family == CHIP_RS400) || rdev 751 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RS480)) { rdev 789 drivers/gpu/drm/radeon/radeon_clocks.c } else if (rdev->family >= CHIP_RV350) { rdev 845 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 857 drivers/gpu/drm/radeon/radeon_clocks.c } else if ((rdev->family == CHIP_R300) || rdev 858 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_R350)) { rdev 870 drivers/gpu/drm/radeon/radeon_clocks.c if ((rdev->family == CHIP_R300) || rdev 871 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_R350)) { rdev 880 drivers/gpu/drm/radeon/radeon_clocks.c if (rdev->flags & RADEON_IS_IGP) { rdev 888 drivers/gpu/drm/radeon/radeon_clocks.c if ((rdev->family == CHIP_RV200) || rdev 889 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RV250) || rdev 890 drivers/gpu/drm/radeon/radeon_clocks.c (rdev->family == CHIP_RV280)) { rdev 135 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 139 drivers/gpu/drm/radeon/radeon_combios.c if (!rdev->bios) rdev 364 drivers/gpu/drm/radeon/radeon_combios.c size = RBIOS8(rdev->bios_header_start + 0x6); rdev 367 drivers/gpu/drm/radeon/radeon_combios.c offset = RBIOS16(rdev->bios_header_start + check_offset); rdev 372 drivers/gpu/drm/radeon/radeon_combios.c bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev) rdev 377 drivers/gpu/drm/radeon/radeon_combios.c edid_info = combios_get_table_offset(rdev->ddev, COMBIOS_HARDCODED_EDID_TABLE); rdev 381 drivers/gpu/drm/radeon/radeon_combios.c raw = rdev->bios + edid_info; rdev 394 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.bios_hardcoded_edid = edid; rdev 395 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.bios_hardcoded_edid_size = size; rdev 401 drivers/gpu/drm/radeon/radeon_combios.c radeon_bios_get_hardcoded_edid(struct radeon_device *rdev) rdev 405 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->mode_info.bios_hardcoded_edid) { rdev 406 drivers/gpu/drm/radeon/radeon_combios.c edid = kmalloc(rdev->mode_info.bios_hardcoded_edid_size, GFP_KERNEL); rdev 409 drivers/gpu/drm/radeon/radeon_combios.c (unsigned char *)rdev->mode_info.bios_hardcoded_edid, rdev 410 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.bios_hardcoded_edid_size); rdev 417 drivers/gpu/drm/radeon/radeon_combios.c static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev, rdev 465 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_RS300 || rdev 466 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_RS400 || rdev 467 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_RS480) rdev 469 drivers/gpu/drm/radeon/radeon_combios.c else if (rdev->family == CHIP_R300 || rdev 470 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_R350) { rdev 477 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_R200 || rdev 478 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_R300 || rdev 479 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_R350) { rdev 482 drivers/gpu/drm/radeon/radeon_combios.c } else if (rdev->family == CHIP_RS300 || rdev 483 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_RS400 || rdev 484 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_RS480) rdev 486 drivers/gpu/drm/radeon/radeon_combios.c else if (rdev->family >= CHIP_RV350) { rdev 556 drivers/gpu/drm/radeon/radeon_combios.c switch (rdev->family) { rdev 645 drivers/gpu/drm/radeon/radeon_combios.c static struct radeon_i2c_bus_rec radeon_combios_get_i2c_info_from_table(struct radeon_device *rdev) rdev 647 drivers/gpu/drm/radeon/radeon_combios.c struct drm_device *dev = rdev->ddev; rdev 664 drivers/gpu/drm/radeon/radeon_combios.c i2c = combios_setup_i2c_bus(rdev, DDC_MONID, rdev 673 drivers/gpu/drm/radeon/radeon_combios.c void radeon_combios_i2c_init(struct radeon_device *rdev) rdev 675 drivers/gpu/drm/radeon/radeon_combios.c struct drm_device *dev = rdev->ddev; rdev 690 drivers/gpu/drm/radeon/radeon_combios.c i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 691 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[0] = radeon_i2c_create(dev, &i2c, "DVI_DDC"); rdev 693 drivers/gpu/drm/radeon/radeon_combios.c i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 694 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[1] = radeon_i2c_create(dev, &i2c, "VGA_DDC"); rdev 701 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[2] = radeon_i2c_create(dev, &i2c, "MM_I2C"); rdev 703 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_R300 || rdev 704 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_R350) { rdev 706 drivers/gpu/drm/radeon/radeon_combios.c } else if (rdev->family == CHIP_RS300 || rdev 707 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_RS400 || rdev 708 drivers/gpu/drm/radeon/radeon_combios.c rdev->family == CHIP_RS480) { rdev 710 drivers/gpu/drm/radeon/radeon_combios.c i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); rdev 711 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); rdev 714 drivers/gpu/drm/radeon/radeon_combios.c i2c = radeon_combios_get_i2c_info_from_table(rdev); rdev 716 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "GPIOPAD_MASK"); rdev 717 drivers/gpu/drm/radeon/radeon_combios.c } else if ((rdev->family == CHIP_R200) || rdev 718 drivers/gpu/drm/radeon/radeon_combios.c (rdev->family >= CHIP_R300)) { rdev 720 drivers/gpu/drm/radeon/radeon_combios.c i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev 721 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); rdev 724 drivers/gpu/drm/radeon/radeon_combios.c i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev 725 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); rdev 727 drivers/gpu/drm/radeon/radeon_combios.c i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); rdev 728 drivers/gpu/drm/radeon/radeon_combios.c rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "CRT2_DDC"); rdev 734 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 736 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *p1pll = &rdev->clock.p1pll; rdev 737 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *p2pll = &rdev->clock.p2pll; rdev 738 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *spll = &rdev->clock.spll; rdev 739 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_pll *mpll = &rdev->clock.mpll; rdev 802 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.default_sclk = sclk; rdev 803 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.default_mclk = mclk; rdev 806 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16); rdev 808 drivers/gpu/drm/radeon/radeon_combios.c rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */ rdev 815 drivers/gpu/drm/radeon/radeon_combios.c bool radeon_combios_sideport_present(struct radeon_device *rdev) rdev 817 drivers/gpu/drm/radeon/radeon_combios.c struct drm_device *dev = rdev->ddev; rdev 821 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_RS400) rdev 854 drivers/gpu/drm/radeon/radeon_combios.c static void radeon_legacy_get_primary_dac_info_from_table(struct radeon_device *rdev, rdev 857 drivers/gpu/drm/radeon/radeon_combios.c p_dac->ps2_pdac_adj = default_primarydac_adj[rdev->family]; rdev 866 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 912 drivers/gpu/drm/radeon/radeon_combios.c radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac); rdev 918 drivers/gpu/drm/radeon/radeon_combios.c radeon_combios_get_tv_info(struct radeon_device *rdev) rdev 920 drivers/gpu/drm/radeon/radeon_combios.c struct drm_device *dev = rdev->ddev; rdev 1001 drivers/gpu/drm/radeon/radeon_combios.c static void radeon_legacy_get_tv_dac_info_from_table(struct radeon_device *rdev, rdev 1004 drivers/gpu/drm/radeon/radeon_combios.c tv_dac->ps2_tvdac_adj = default_tvdac_adj[rdev->family]; rdev 1005 drivers/gpu/drm/radeon/radeon_combios.c if ((rdev->flags & RADEON_IS_MOBILITY) && (rdev->family == CHIP_RV250)) rdev 1017 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 1062 drivers/gpu/drm/radeon/radeon_combios.c tv_dac->tv_std = radeon_combios_get_tv_info(rdev); rdev 1097 drivers/gpu/drm/radeon/radeon_combios.c radeon_legacy_get_tv_dac_info_from_table(rdev, tv_dac); rdev 1104 drivers/gpu/drm/radeon/radeon_combios.c *rdev) rdev 1176 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 1288 drivers/gpu/drm/radeon/radeon_combios.c lvds = radeon_legacy_get_lvds_info_from_regs(rdev); rdev 1321 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 1326 drivers/gpu/drm/radeon/radeon_combios.c default_tmds_pll[rdev->family][i].value; rdev 1327 drivers/gpu/drm/radeon/radeon_combios.c tmds->tmds_pll[i].freq = default_tmds_pll[rdev->family][i].freq; rdev 1337 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 1390 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 1394 drivers/gpu/drm/radeon/radeon_combios.c i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev 1395 drivers/gpu/drm/radeon/radeon_combios.c tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); rdev 1398 drivers/gpu/drm/radeon/radeon_combios.c switch (rdev->mode_info.connector_table) { rdev 1414 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 1421 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->flags & RADEON_IS_IGP) { rdev 1422 drivers/gpu/drm/radeon/radeon_combios.c i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev 1423 drivers/gpu/drm/radeon/radeon_combios.c tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); rdev 1441 drivers/gpu/drm/radeon/radeon_combios.c i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0); rdev 1442 drivers/gpu/drm/radeon/radeon_combios.c tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); rdev 1456 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 1460 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = radeon_connector_table; rdev 1461 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->mode_info.connector_table == CT_NONE) { rdev 1465 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_POWERBOOK_VGA; rdev 1469 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_POWERBOOK_INTERNAL; rdev 1476 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; rdev 1479 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; rdev 1485 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; rdev 1493 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_IBOOK; rdev 1496 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_MAC_G4_SILVER; rdev 1499 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_EMAC; rdev 1502 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_MINI_INTERNAL; rdev 1505 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_MINI_EXTERNAL; rdev 1509 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_IMAC_G5_ISIGHT; rdev 1510 drivers/gpu/drm/radeon/radeon_combios.c } else if ((rdev->pdev->device == 0x4a48) && rdev 1511 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pdev->subsystem_vendor == 0x1002) && rdev 1512 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pdev->subsystem_device == 0x4a48)) { rdev 1514 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_MAC_X800; rdev 1517 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pdev->device == 0x4150) && rdev 1518 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pdev->subsystem_vendor == 0x1002) && rdev 1519 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pdev->subsystem_device == 0x4150)) { rdev 1521 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_MAC_G5_9600; rdev 1522 drivers/gpu/drm/radeon/radeon_combios.c } else if ((rdev->pdev->device == 0x4c66) && rdev 1523 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pdev->subsystem_vendor == 0x1002) && rdev 1524 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pdev->subsystem_device == 0x4c66)) { rdev 1526 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_SAM440EP; rdev 1530 drivers/gpu/drm/radeon/radeon_combios.c if (ASIC_IS_RN50(rdev)) rdev 1531 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_RN50_POWER; rdev 1534 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table = CT_GENERIC; rdev 1537 drivers/gpu/drm/radeon/radeon_combios.c switch (rdev->mode_info.connector_table) { rdev 1540 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1542 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 1544 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1557 drivers/gpu/drm/radeon/radeon_combios.c } else if (rdev->flags & RADEON_IS_MOBILITY) { rdev 1559 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0); rdev 1574 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1589 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 1610 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1625 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { rdev 1644 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1646 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 1658 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1685 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1687 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 1699 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1734 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1736 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 1748 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1782 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1784 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 1796 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1823 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1825 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); rdev 1860 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1862 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); rdev 1896 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1898 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev 1910 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 1937 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1939 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1951 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); rdev 1978 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 1980 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 1991 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); rdev 2005 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 2007 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 2026 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev 2047 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 2049 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 2068 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 2102 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 2104 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0); rdev 2116 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 2135 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 2163 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 2165 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 2184 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 2211 drivers/gpu/drm/radeon/radeon_combios.c rdev->mode_info.connector_table); rdev 2273 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 2276 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->flags & RADEON_IS_IGP) { rdev 2308 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 2331 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = radeon_combios_get_i2c_info_from_table(rdev); rdev 2333 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, ddc_type, 0, 0); rdev 2511 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); rdev 2531 drivers/gpu/drm/radeon/radeon_combios.c ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); rdev 2547 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->flags & RADEON_IS_MOBILITY || rdev->flags & RADEON_IS_IGP) { rdev 2566 drivers/gpu/drm/radeon/radeon_combios.c combios_setup_i2c_bus(rdev, rdev 2570 drivers/gpu/drm/radeon/radeon_combios.c radeon_i2c_add(rdev, &ddc_i2c, "LCD"); rdev 2574 drivers/gpu/drm/radeon/radeon_combios.c combios_setup_i2c_bus(rdev, rdev 2578 drivers/gpu/drm/radeon/radeon_combios.c radeon_i2c_add(rdev, &ddc_i2c, "LCD"); rdev 2582 drivers/gpu/drm/radeon/radeon_combios.c combios_setup_i2c_bus(rdev, ddc_type, 0, 0); rdev 2601 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { rdev 2637 drivers/gpu/drm/radeon/radeon_combios.c void radeon_combios_get_power_modes(struct radeon_device *rdev) rdev 2639 drivers/gpu/drm/radeon/radeon_combios.c struct drm_device *dev = rdev->ddev; rdev 2645 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.default_power_state_index = -1; rdev 2648 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state = kcalloc(2, sizeof(struct radeon_power_state), rdev 2650 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->pm.power_state) { rdev 2652 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[0].clock_info = rdev 2655 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[1].clock_info = rdev 2658 drivers/gpu/drm/radeon/radeon_combios.c if (!rdev->pm.power_state[0].clock_info || rdev 2659 drivers/gpu/drm/radeon/radeon_combios.c !rdev->pm.power_state[1].clock_info) rdev 2697 drivers/gpu/drm/radeon/radeon_combios.c i2c_bus = combios_setup_i2c_bus(rdev, gpio, 1 << clk_bit, 1 << data_bit); rdev 2699 drivers/gpu/drm/radeon/radeon_combios.c i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0); rdev 2700 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); rdev 2701 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->pm.i2c_bus) { rdev 2706 drivers/gpu/drm/radeon/radeon_combios.c i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); rdev 2716 drivers/gpu/drm/radeon/radeon_combios.c i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev 2717 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); rdev 2718 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->pm.i2c_bus) { rdev 2723 drivers/gpu/drm/radeon/radeon_combios.c i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); rdev 2730 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->flags & RADEON_IS_MOBILITY) { rdev 2736 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].num_clock_modes = 1; rdev 2737 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2); rdev 2738 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6); rdev 2739 drivers/gpu/drm/radeon/radeon_combios.c if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || rdev 2740 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) rdev 2742 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].type = rdev 2747 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].misc = misc; rdev 2748 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].misc2 = misc2; rdev 2750 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO; rdev 2752 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2755 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = rdev 2757 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = true; rdev 2759 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg = rdev 2762 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp); rdev 2767 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg = rdev 2770 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp); rdev 2772 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = false; rdev 2777 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 0; rdev 2780 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 33; rdev 2783 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 66; rdev 2786 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 99; rdev 2789 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 132; rdev 2793 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; rdev 2795 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].pcie_lanes = rdev 2797 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].flags = RADEON_PM_STATE_SINGLE_DISPLAY_ONLY; rdev 2808 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].type = rdev 2810 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].num_clock_modes = 1; rdev 2811 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; rdev 2812 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; rdev 2813 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0]; rdev 2815 drivers/gpu/drm/radeon/radeon_combios.c (rdev->pm.power_state[0].clock_info[0].voltage.type == VOLTAGE_GPIO)) rdev 2816 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage = rdev 2817 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[0].clock_info[0].voltage; rdev 2819 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; rdev 2820 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].pcie_lanes = 16; rdev 2821 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.power_state[state_index].flags = 0; rdev 2822 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.default_power_state_index = state_index; rdev 2823 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.num_power_states = state_index + 1; rdev 2825 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; rdev 2826 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.current_clock_mode_index = 0; rdev 2830 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.default_power_state_index = state_index; rdev 2831 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.num_power_states = 0; rdev 2833 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; rdev 2834 drivers/gpu/drm/radeon/radeon_combios.c rdev->pm.current_clock_mode_index = 0; rdev 2887 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 2898 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->flags & RADEON_IS_IGP) { rdev 3017 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3096 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3187 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3198 drivers/gpu/drm/radeon/radeon_combios.c if (ASIC_IS_R300(rdev)) rdev 3234 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3265 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3272 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->flags & RADEON_IS_IGP) rdev 3282 drivers/gpu/drm/radeon/radeon_combios.c if ((rdev->family < CHIP_R200) && rdev 3283 drivers/gpu/drm/radeon/radeon_combios.c !ASIC_IS_RN50(rdev)) rdev 3294 drivers/gpu/drm/radeon/radeon_combios.c if ((rdev->family < CHIP_R200) rdev 3295 drivers/gpu/drm/radeon/radeon_combios.c && !ASIC_IS_RN50(rdev)) { rdev 3327 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3331 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->bios == NULL) rdev 3349 drivers/gpu/drm/radeon/radeon_combios.c if (!(rdev->flags & RADEON_IS_IGP)) { rdev 3374 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_RS480 && rdev 3375 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_vendor == 0x103c && rdev 3376 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_device == 0x308b) rdev 3382 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_RS480 && rdev 3383 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_vendor == 0x103c && rdev 3384 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_device == 0x30a4) rdev 3390 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_RS480 && rdev 3391 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_vendor == 0x103c && rdev 3392 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_device == 0x30ae) rdev 3398 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_RS480 && rdev 3399 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_vendor == 0x103c && rdev 3400 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_device == 0x280a) rdev 3405 drivers/gpu/drm/radeon/radeon_combios.c if (rdev->family == CHIP_RS400 && rdev 3406 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_vendor == 0x1179 && rdev 3407 drivers/gpu/drm/radeon/radeon_combios.c rdev->pdev->subsystem_device == 0xff31) rdev 3419 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3444 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3463 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3564 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 3599 drivers/gpu/drm/radeon/radeon_combios.c struct radeon_device *rdev = dev->dev_private; rdev 53 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 73 drivers/gpu/drm/radeon/radeon_connectors.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); rdev 95 drivers/gpu/drm/radeon/radeon_connectors.c radeon_hpd_sense(rdev, radeon_connector->hpd.hpd) && rdev 123 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 159 drivers/gpu/drm/radeon/radeon_connectors.c else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { rdev 176 drivers/gpu/drm/radeon/radeon_connectors.c if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) { rdev 247 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 262 drivers/gpu/drm/radeon/radeon_connectors.c if (rdev->is_atom_bios) rdev 300 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 341 drivers/gpu/drm/radeon/radeon_connectors.c if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) rdev 344 drivers/gpu/drm/radeon/radeon_connectors.c if (rdev->is_atom_bios) { rdev 348 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev); rdev 351 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev); rdev 555 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 559 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.coherent_mode_property) { rdev 581 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.audio_property) { rdev 596 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.dither_property) { rdev 611 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.underscan_property) { rdev 625 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.underscan_hborder_property) { rdev 639 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.underscan_vborder_property) { rdev 653 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.tv_std_property) { rdev 665 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { rdev 677 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.load_detect_property) { rdev 687 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.tmds_pll_property) { rdev 702 drivers/gpu/drm/radeon/radeon_connectors.c if (rdev->is_atom_bios) rdev 742 drivers/gpu/drm/radeon/radeon_connectors.c if (property == rdev->mode_info.output_csc_property) { rdev 878 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 900 drivers/gpu/drm/radeon/radeon_connectors.c if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) rdev 1008 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1012 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->clock / 10) > rdev->clock.max_pixel_clock) rdev 1022 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1092 drivers/gpu/drm/radeon/radeon_connectors.c if ((!rdev->is_atom_bios) && rdev 1094 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.bios_hardcoded_edid_size) { rdev 1127 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1136 drivers/gpu/drm/radeon/radeon_connectors.c if (rdev->family >= CHIP_RS600) rdev 1211 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1216 drivers/gpu/drm/radeon/radeon_connectors.c if (rdev->family >= CHIP_R600 rdev 1218 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) rdev 1244 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1279 drivers/gpu/drm/radeon/radeon_connectors.c schedule_delayed_work(&rdev->hotplug_work, rdev 1294 drivers/gpu/drm/radeon/radeon_connectors.c if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && rdev 1335 drivers/gpu/drm/radeon/radeon_connectors.c if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { rdev 1411 drivers/gpu/drm/radeon/radeon_connectors.c if ((!rdev->is_atom_bios) && rdev 1413 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.bios_hardcoded_edid_size) { rdev 1482 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1489 drivers/gpu/drm/radeon/radeon_connectors.c (rdev->family == CHIP_RV100) && rdev 1498 drivers/gpu/drm/radeon/radeon_connectors.c else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { rdev 1510 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->clock / 10) > rdev->clock.max_pixel_clock) rdev 1642 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1644 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev) && rdev 1645 drivers/gpu/drm/radeon/radeon_connectors.c (rdev->clock.default_dispclk >= 53900) && rdev 1657 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1692 drivers/gpu/drm/radeon/radeon_connectors.c if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0)) rdev 1725 drivers/gpu/drm/radeon/radeon_connectors.c if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { rdev 1770 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1806 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { rdev 1867 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 1937 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); rdev 1949 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 1967 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 1972 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev)) rdev 1974 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.output_csc_property, rdev 1987 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_property, rdev 1990 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_hborder_property, rdev 1993 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_vborder_property, rdev 2001 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.dither_property, rdev 2006 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.audio_property, rdev 2010 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev)) rdev 2012 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.output_csc_property, rdev 2024 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2048 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2054 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2056 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_AVIVO(rdev)) rdev 2060 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev)) rdev 2062 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.output_csc_property, rdev 2073 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2079 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2081 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_AVIVO(rdev)) rdev 2085 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev)) rdev 2087 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.output_csc_property, rdev 2104 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2110 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.coherent_mode_property, rdev 2112 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_AVIVO(rdev)) { rdev 2114 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_property, rdev 2117 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_hborder_property, rdev 2120 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_vborder_property, rdev 2123 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.dither_property, rdev 2129 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { rdev 2131 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.audio_property, rdev 2138 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2141 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev)) rdev 2143 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.output_csc_property, rdev 2161 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2166 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.coherent_mode_property, rdev 2168 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_AVIVO(rdev)) { rdev 2170 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_property, rdev 2173 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_hborder_property, rdev 2176 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_vborder_property, rdev 2179 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.dither_property, rdev 2185 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { rdev 2187 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.audio_property, rdev 2191 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev)) rdev 2193 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.output_csc_property, rdev 2211 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2219 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.coherent_mode_property, rdev 2221 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_AVIVO(rdev)) { rdev 2223 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_property, rdev 2226 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_hborder_property, rdev 2229 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.underscan_vborder_property, rdev 2232 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.dither_property, rdev 2238 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) { rdev 2240 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.audio_property, rdev 2244 drivers/gpu/drm/radeon/radeon_connectors.c if (ASIC_IS_DCE5(rdev)) rdev 2246 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.output_csc_property, rdev 2261 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2281 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2284 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.tv_std_property, rdev 2285 drivers/gpu/drm/radeon/radeon_connectors.c radeon_atombios_get_tv_info(rdev)); rdev 2300 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2344 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 2384 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2390 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2401 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2407 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2419 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2426 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2447 drivers/gpu/drm/radeon/radeon_connectors.c if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) rdev 2450 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.load_detect_property, rdev 2453 drivers/gpu/drm/radeon/radeon_connectors.c rdev->mode_info.tv_std_property, rdev 2454 drivers/gpu/drm/radeon/radeon_connectors.c radeon_combios_get_tv_info(rdev)); rdev 2464 drivers/gpu/drm/radeon/radeon_connectors.c radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); rdev 2491 drivers/gpu/drm/radeon/radeon_connectors.c struct radeon_device *rdev = dev->dev_private; rdev 2495 drivers/gpu/drm/radeon/radeon_connectors.c if (!ASIC_IS_DCE5(rdev)) rdev 133 drivers/gpu/drm/radeon/radeon_cs.c (i <= 0 || pci_find_capability(p->rdev->ddev->pdev, rdev 135 drivers/gpu/drm/radeon/radeon_cs.c p->rdev->family == CHIP_RS780 || rdev 136 drivers/gpu/drm/radeon/radeon_cs.c p->rdev->family == CHIP_RS880)) { rdev 196 drivers/gpu/drm/radeon/radeon_cs.c p->vm_bos = radeon_vm_get_bos(p->rdev, p->ib.vm, rdev 201 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_bo_list_validate(p->rdev, &p->ticket, &p->validated, p->ring); rdev 221 drivers/gpu/drm/radeon/radeon_cs.c if (p->rdev->family >= CHIP_TAHITI) { rdev 230 drivers/gpu/drm/radeon/radeon_cs.c if (p->rdev->family >= CHIP_CAYMAN) { rdev 235 drivers/gpu/drm/radeon/radeon_cs.c } else if (p->rdev->family >= CHIP_RV770) { rdev 261 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_sync_resv(p->rdev, &p->ib.sync, resv, rdev 347 drivers/gpu/drm/radeon/radeon_cs.c if (!p->rdev || !(p->rdev->flags & RADEON_IS_AGP)) rdev 369 drivers/gpu/drm/radeon/radeon_cs.c if (p->rdev) { rdev 371 drivers/gpu/drm/radeon/radeon_cs.c !p->rdev->vm_manager.enabled) { rdev 381 drivers/gpu/drm/radeon/radeon_cs.c if (p->rdev->asic->ring[p->ring]->cs_parse == NULL) { rdev 386 drivers/gpu/drm/radeon/radeon_cs.c if (p->rdev->asic->ring[p->ring]->ib_parse == NULL) { rdev 456 drivers/gpu/drm/radeon/radeon_cs.c radeon_ib_free(parser->rdev, &parser->ib); rdev 457 drivers/gpu/drm/radeon/radeon_cs.c radeon_ib_free(parser->rdev, &parser->const_ib); rdev 460 drivers/gpu/drm/radeon/radeon_cs.c static int radeon_cs_ib_chunk(struct radeon_device *rdev, rdev 471 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_cs_parse(rdev, parser->ring, parser); rdev 485 drivers/gpu/drm/radeon/radeon_cs.c radeon_uvd_note_usage(rdev); rdev 488 drivers/gpu/drm/radeon/radeon_cs.c radeon_vce_note_usage(rdev); rdev 490 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_ib_schedule(rdev, &parser->ib, NULL, true); rdev 500 drivers/gpu/drm/radeon/radeon_cs.c struct radeon_device *rdev = p->rdev; rdev 504 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_vm_update_page_directory(rdev, vm); rdev 508 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_vm_clear_freed(rdev, vm); rdev 517 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_vm_bo_update(rdev, vm->ib_bo_va, rdev 518 drivers/gpu/drm/radeon/radeon_cs.c &rdev->ring_tmp_bo.bo->tbo.mem); rdev 528 drivers/gpu/drm/radeon/radeon_cs.c dev_err(rdev->dev, "bo %p not in vm %p\n", bo, vm); rdev 532 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_vm_bo_update(rdev, bo_va, &bo->tbo.mem); rdev 539 drivers/gpu/drm/radeon/radeon_cs.c return radeon_vm_clear_invalids(rdev, vm); rdev 542 drivers/gpu/drm/radeon/radeon_cs.c static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, rdev 555 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_ring_ib_parse(rdev, parser->ring, &parser->const_ib); rdev 561 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_ring_ib_parse(rdev, parser->ring, &parser->ib); rdev 567 drivers/gpu/drm/radeon/radeon_cs.c radeon_uvd_note_usage(rdev); rdev 582 drivers/gpu/drm/radeon/radeon_cs.c if ((rdev->family >= CHIP_TAHITI) && rdev 584 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib, true); rdev 586 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_ib_schedule(rdev, &parser->ib, NULL, true); rdev 594 drivers/gpu/drm/radeon/radeon_cs.c static int radeon_cs_handle_lockup(struct radeon_device *rdev, int r) rdev 597 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_gpu_reset(rdev); rdev 604 drivers/gpu/drm/radeon/radeon_cs.c static int radeon_cs_ib_fill(struct radeon_device *rdev, struct radeon_cs_parser *parser) rdev 617 drivers/gpu/drm/radeon/radeon_cs.c if ((rdev->family >= CHIP_TAHITI) && rdev 624 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_ib_get(rdev, parser->ring, &parser->const_ib, rdev 646 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_ib_get(rdev, parser->ring, &parser->ib, rdev 662 drivers/gpu/drm/radeon/radeon_cs.c struct radeon_device *rdev = dev->dev_private; rdev 666 drivers/gpu/drm/radeon/radeon_cs.c down_read(&rdev->exclusive_lock); rdev 667 drivers/gpu/drm/radeon/radeon_cs.c if (!rdev->accel_working) { rdev 668 drivers/gpu/drm/radeon/radeon_cs.c up_read(&rdev->exclusive_lock); rdev 671 drivers/gpu/drm/radeon/radeon_cs.c if (rdev->in_reset) { rdev 672 drivers/gpu/drm/radeon/radeon_cs.c up_read(&rdev->exclusive_lock); rdev 673 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_gpu_reset(rdev); rdev 681 drivers/gpu/drm/radeon/radeon_cs.c parser.rdev = rdev; rdev 682 drivers/gpu/drm/radeon/radeon_cs.c parser.dev = rdev->dev; rdev 683 drivers/gpu/drm/radeon/radeon_cs.c parser.family = rdev->family; rdev 688 drivers/gpu/drm/radeon/radeon_cs.c up_read(&rdev->exclusive_lock); rdev 689 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_cs_handle_lockup(rdev, r); rdev 693 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_cs_ib_fill(rdev, &parser); rdev 702 drivers/gpu/drm/radeon/radeon_cs.c up_read(&rdev->exclusive_lock); rdev 703 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_cs_handle_lockup(rdev, r); rdev 709 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_cs_ib_chunk(rdev, &parser); rdev 713 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_cs_ib_vm_chunk(rdev, &parser); rdev 719 drivers/gpu/drm/radeon/radeon_cs.c up_read(&rdev->exclusive_lock); rdev 720 drivers/gpu/drm/radeon/radeon_cs.c r = radeon_cs_handle_lockup(rdev, r); rdev 737 drivers/gpu/drm/radeon/radeon_cs.c struct radeon_device *rdev = p->rdev; rdev 753 drivers/gpu/drm/radeon/radeon_cs.c if (rdev->family < CHIP_R600) { rdev 34 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; rdev 38 drivers/gpu/drm/radeon/radeon_cursor.c if (ASIC_IS_DCE4(rdev)) { rdev 45 drivers/gpu/drm/radeon/radeon_cursor.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 65 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; rdev 67 drivers/gpu/drm/radeon/radeon_cursor.c if (ASIC_IS_DCE4(rdev)) { rdev 71 drivers/gpu/drm/radeon/radeon_cursor.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 93 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; rdev 98 drivers/gpu/drm/radeon/radeon_cursor.c if (ASIC_IS_DCE4(rdev)) { rdev 107 drivers/gpu/drm/radeon/radeon_cursor.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 108 drivers/gpu/drm/radeon/radeon_cursor.c if (rdev->family >= CHIP_RV770) { rdev 147 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; rdev 154 drivers/gpu/drm/radeon/radeon_cursor.c if (ASIC_IS_AVIVO(rdev)) { rdev 165 drivers/gpu/drm/radeon/radeon_cursor.c if (!ASIC_IS_AVIVO(rdev)) { rdev 172 drivers/gpu/drm/radeon/radeon_cursor.c if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE6(rdev)) { rdev 217 drivers/gpu/drm/radeon/radeon_cursor.c if (ASIC_IS_DCE4(rdev)) { rdev 222 drivers/gpu/drm/radeon/radeon_cursor.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 285 drivers/gpu/drm/radeon/radeon_cursor.c struct radeon_device *rdev = crtc->dev->dev_private; rdev 317 drivers/gpu/drm/radeon/radeon_cursor.c ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, rdev 159 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = dev->dev_private; rdev 161 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_PX) rdev 166 drivers/gpu/drm/radeon/radeon_device.c static void radeon_device_handle_px_quirks(struct radeon_device *rdev) rdev 172 drivers/gpu/drm/radeon/radeon_device.c if (rdev->pdev->vendor == p->chip_vendor && rdev 173 drivers/gpu/drm/radeon/radeon_device.c rdev->pdev->device == p->chip_device && rdev 174 drivers/gpu/drm/radeon/radeon_device.c rdev->pdev->subsystem_vendor == p->subsys_vendor && rdev 175 drivers/gpu/drm/radeon/radeon_device.c rdev->pdev->subsystem_device == p->subsys_device) { rdev 176 drivers/gpu/drm/radeon/radeon_device.c rdev->px_quirk_flags = p->px_quirk_flags; rdev 182 drivers/gpu/drm/radeon/radeon_device.c if (rdev->px_quirk_flags & RADEON_PX_QUIRK_DISABLE_PX) rdev 183 drivers/gpu/drm/radeon/radeon_device.c rdev->flags &= ~RADEON_IS_PX; rdev 188 drivers/gpu/drm/radeon/radeon_device.c rdev->flags &= ~RADEON_IS_PX; rdev 201 drivers/gpu/drm/radeon/radeon_device.c void radeon_program_register_sequence(struct radeon_device *rdev, rdev 227 drivers/gpu/drm/radeon/radeon_device.c void radeon_pci_config_reset(struct radeon_device *rdev) rdev 229 drivers/gpu/drm/radeon/radeon_device.c pci_write_config_dword(rdev->pdev, 0x7c, RADEON_ASIC_RESET_DATA); rdev 239 drivers/gpu/drm/radeon/radeon_device.c void radeon_surface_init(struct radeon_device *rdev) rdev 242 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family < CHIP_R600) { rdev 246 drivers/gpu/drm/radeon/radeon_device.c if (rdev->surface_regs[i].bo) rdev 247 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_get_surface_reg(rdev->surface_regs[i].bo); rdev 249 drivers/gpu/drm/radeon/radeon_device.c radeon_clear_surface_reg(rdev, i); rdev 266 drivers/gpu/drm/radeon/radeon_device.c void radeon_scratch_init(struct radeon_device *rdev) rdev 271 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family < CHIP_R300) { rdev 272 drivers/gpu/drm/radeon/radeon_device.c rdev->scratch.num_reg = 5; rdev 274 drivers/gpu/drm/radeon/radeon_device.c rdev->scratch.num_reg = 7; rdev 276 drivers/gpu/drm/radeon/radeon_device.c rdev->scratch.reg_base = RADEON_SCRATCH_REG0; rdev 277 drivers/gpu/drm/radeon/radeon_device.c for (i = 0; i < rdev->scratch.num_reg; i++) { rdev 278 drivers/gpu/drm/radeon/radeon_device.c rdev->scratch.free[i] = true; rdev 279 drivers/gpu/drm/radeon/radeon_device.c rdev->scratch.reg[i] = rdev->scratch.reg_base + (i * 4); rdev 292 drivers/gpu/drm/radeon/radeon_device.c int radeon_scratch_get(struct radeon_device *rdev, uint32_t *reg) rdev 296 drivers/gpu/drm/radeon/radeon_device.c for (i = 0; i < rdev->scratch.num_reg; i++) { rdev 297 drivers/gpu/drm/radeon/radeon_device.c if (rdev->scratch.free[i]) { rdev 298 drivers/gpu/drm/radeon/radeon_device.c rdev->scratch.free[i] = false; rdev 299 drivers/gpu/drm/radeon/radeon_device.c *reg = rdev->scratch.reg[i]; rdev 314 drivers/gpu/drm/radeon/radeon_device.c void radeon_scratch_free(struct radeon_device *rdev, uint32_t reg) rdev 318 drivers/gpu/drm/radeon/radeon_device.c for (i = 0; i < rdev->scratch.num_reg; i++) { rdev 319 drivers/gpu/drm/radeon/radeon_device.c if (rdev->scratch.reg[i] == reg) { rdev 320 drivers/gpu/drm/radeon/radeon_device.c rdev->scratch.free[i] = true; rdev 337 drivers/gpu/drm/radeon/radeon_device.c static int radeon_doorbell_init(struct radeon_device *rdev) rdev 340 drivers/gpu/drm/radeon/radeon_device.c rdev->doorbell.base = pci_resource_start(rdev->pdev, 2); rdev 341 drivers/gpu/drm/radeon/radeon_device.c rdev->doorbell.size = pci_resource_len(rdev->pdev, 2); rdev 343 drivers/gpu/drm/radeon/radeon_device.c rdev->doorbell.num_doorbells = min_t(u32, rdev->doorbell.size / sizeof(u32), RADEON_MAX_DOORBELLS); rdev 344 drivers/gpu/drm/radeon/radeon_device.c if (rdev->doorbell.num_doorbells == 0) rdev 347 drivers/gpu/drm/radeon/radeon_device.c rdev->doorbell.ptr = ioremap(rdev->doorbell.base, rdev->doorbell.num_doorbells * sizeof(u32)); rdev 348 drivers/gpu/drm/radeon/radeon_device.c if (rdev->doorbell.ptr == NULL) { rdev 351 drivers/gpu/drm/radeon/radeon_device.c DRM_INFO("doorbell mmio base: 0x%08X\n", (uint32_t)rdev->doorbell.base); rdev 352 drivers/gpu/drm/radeon/radeon_device.c DRM_INFO("doorbell mmio size: %u\n", (unsigned)rdev->doorbell.size); rdev 354 drivers/gpu/drm/radeon/radeon_device.c memset(&rdev->doorbell.used, 0, sizeof(rdev->doorbell.used)); rdev 366 drivers/gpu/drm/radeon/radeon_device.c static void radeon_doorbell_fini(struct radeon_device *rdev) rdev 368 drivers/gpu/drm/radeon/radeon_device.c iounmap(rdev->doorbell.ptr); rdev 369 drivers/gpu/drm/radeon/radeon_device.c rdev->doorbell.ptr = NULL; rdev 381 drivers/gpu/drm/radeon/radeon_device.c int radeon_doorbell_get(struct radeon_device *rdev, u32 *doorbell) rdev 383 drivers/gpu/drm/radeon/radeon_device.c unsigned long offset = find_first_zero_bit(rdev->doorbell.used, rdev->doorbell.num_doorbells); rdev 384 drivers/gpu/drm/radeon/radeon_device.c if (offset < rdev->doorbell.num_doorbells) { rdev 385 drivers/gpu/drm/radeon/radeon_device.c __set_bit(offset, rdev->doorbell.used); rdev 401 drivers/gpu/drm/radeon/radeon_device.c void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell) rdev 403 drivers/gpu/drm/radeon/radeon_device.c if (doorbell < rdev->doorbell.num_doorbells) rdev 404 drivers/gpu/drm/radeon/radeon_device.c __clear_bit(doorbell, rdev->doorbell.used); rdev 421 drivers/gpu/drm/radeon/radeon_device.c void radeon_wb_disable(struct radeon_device *rdev) rdev 423 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.enabled = false; rdev 434 drivers/gpu/drm/radeon/radeon_device.c void radeon_wb_fini(struct radeon_device *rdev) rdev 436 drivers/gpu/drm/radeon/radeon_device.c radeon_wb_disable(rdev); rdev 437 drivers/gpu/drm/radeon/radeon_device.c if (rdev->wb.wb_obj) { rdev 438 drivers/gpu/drm/radeon/radeon_device.c if (!radeon_bo_reserve(rdev->wb.wb_obj, false)) { rdev 439 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_kunmap(rdev->wb.wb_obj); rdev 440 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_unpin(rdev->wb.wb_obj); rdev 441 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_unreserve(rdev->wb.wb_obj); rdev 443 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_unref(&rdev->wb.wb_obj); rdev 444 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.wb = NULL; rdev 445 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.wb_obj = NULL; rdev 458 drivers/gpu/drm/radeon/radeon_device.c int radeon_wb_init(struct radeon_device *rdev) rdev 462 drivers/gpu/drm/radeon/radeon_device.c if (rdev->wb.wb_obj == NULL) { rdev 463 drivers/gpu/drm/radeon/radeon_device.c r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, rdev 465 drivers/gpu/drm/radeon/radeon_device.c &rdev->wb.wb_obj); rdev 467 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); rdev 470 drivers/gpu/drm/radeon/radeon_device.c r = radeon_bo_reserve(rdev->wb.wb_obj, false); rdev 472 drivers/gpu/drm/radeon/radeon_device.c radeon_wb_fini(rdev); rdev 475 drivers/gpu/drm/radeon/radeon_device.c r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT, rdev 476 drivers/gpu/drm/radeon/radeon_device.c &rdev->wb.gpu_addr); rdev 478 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_unreserve(rdev->wb.wb_obj); rdev 479 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r); rdev 480 drivers/gpu/drm/radeon/radeon_device.c radeon_wb_fini(rdev); rdev 483 drivers/gpu/drm/radeon/radeon_device.c r = radeon_bo_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb); rdev 484 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_unreserve(rdev->wb.wb_obj); rdev 486 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "(%d) map WB bo failed\n", r); rdev 487 drivers/gpu/drm/radeon/radeon_device.c radeon_wb_fini(rdev); rdev 493 drivers/gpu/drm/radeon/radeon_device.c memset((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE); rdev 495 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.use_event = false; rdev 498 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.enabled = false; rdev 500 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_AGP) { rdev 502 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.enabled = false; rdev 503 drivers/gpu/drm/radeon/radeon_device.c } else if (rdev->family < CHIP_R300) { rdev 505 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.enabled = false; rdev 507 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.enabled = true; rdev 509 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_R600) { rdev 510 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.use_event = true; rdev 515 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_PALM) { rdev 516 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.enabled = true; rdev 517 drivers/gpu/drm/radeon/radeon_device.c rdev->wb.use_event = true; rdev 520 drivers/gpu/drm/radeon/radeon_device.c dev_info(rdev->dev, "WB %sabled\n", rdev->wb.enabled ? "en" : "dis"); rdev 566 drivers/gpu/drm/radeon/radeon_device.c void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base) rdev 571 drivers/gpu/drm/radeon/radeon_device.c if (mc->mc_vram_size > (rdev->mc.mc_mask - base + 1)) { rdev 572 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); rdev 577 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_start <= mc->gtt_end) { rdev 578 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); rdev 585 drivers/gpu/drm/radeon/radeon_device.c dev_info(rdev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n", rdev 602 drivers/gpu/drm/radeon/radeon_device.c void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) rdev 606 drivers/gpu/drm/radeon/radeon_device.c size_af = ((rdev->mc.mc_mask - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align; rdev 610 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "limiting GTT\n"); rdev 616 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "limiting GTT\n"); rdev 622 drivers/gpu/drm/radeon/radeon_device.c dev_info(rdev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n", rdev 655 drivers/gpu/drm/radeon/radeon_device.c bool radeon_card_posted(struct radeon_device *rdev) rdev 660 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_BONAIRE && rdev 666 drivers/gpu/drm/radeon/radeon_device.c (rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) && rdev 667 drivers/gpu/drm/radeon/radeon_device.c (rdev->family < CHIP_R600)) rdev 670 drivers/gpu/drm/radeon/radeon_device.c if (ASIC_IS_NODCE(rdev)) rdev 674 drivers/gpu/drm/radeon/radeon_device.c if (ASIC_IS_DCE4(rdev)) { rdev 677 drivers/gpu/drm/radeon/radeon_device.c if (rdev->num_crtc >= 4) { rdev 681 drivers/gpu/drm/radeon/radeon_device.c if (rdev->num_crtc >= 6) { rdev 687 drivers/gpu/drm/radeon/radeon_device.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 703 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_R600) rdev 723 drivers/gpu/drm/radeon/radeon_device.c void radeon_update_bandwidth_info(struct radeon_device *rdev) rdev 726 drivers/gpu/drm/radeon/radeon_device.c u32 sclk = rdev->pm.current_sclk; rdev 727 drivers/gpu/drm/radeon/radeon_device.c u32 mclk = rdev->pm.current_mclk; rdev 731 drivers/gpu/drm/radeon/radeon_device.c rdev->pm.sclk.full = dfixed_const(sclk); rdev 732 drivers/gpu/drm/radeon/radeon_device.c rdev->pm.sclk.full = dfixed_div(rdev->pm.sclk, a); rdev 733 drivers/gpu/drm/radeon/radeon_device.c rdev->pm.mclk.full = dfixed_const(mclk); rdev 734 drivers/gpu/drm/radeon/radeon_device.c rdev->pm.mclk.full = dfixed_div(rdev->pm.mclk, a); rdev 736 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_IGP) { rdev 739 drivers/gpu/drm/radeon/radeon_device.c rdev->pm.core_bandwidth.full = dfixed_div(rdev->pm.sclk, a); rdev 752 drivers/gpu/drm/radeon/radeon_device.c bool radeon_boot_test_post_card(struct radeon_device *rdev) rdev 754 drivers/gpu/drm/radeon/radeon_device.c if (radeon_card_posted(rdev)) rdev 757 drivers/gpu/drm/radeon/radeon_device.c if (rdev->bios) { rdev 759 drivers/gpu/drm/radeon/radeon_device.c if (rdev->is_atom_bios) rdev 760 drivers/gpu/drm/radeon/radeon_device.c atom_asic_init(rdev->mode_info.atom_context); rdev 762 drivers/gpu/drm/radeon/radeon_device.c radeon_combios_asic_init(rdev->ddev); rdev 765 drivers/gpu/drm/radeon/radeon_device.c dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); rdev 780 drivers/gpu/drm/radeon/radeon_device.c int radeon_dummy_page_init(struct radeon_device *rdev) rdev 782 drivers/gpu/drm/radeon/radeon_device.c if (rdev->dummy_page.page) rdev 784 drivers/gpu/drm/radeon/radeon_device.c rdev->dummy_page.page = alloc_page(GFP_DMA32 | GFP_KERNEL | __GFP_ZERO); rdev 785 drivers/gpu/drm/radeon/radeon_device.c if (rdev->dummy_page.page == NULL) rdev 787 drivers/gpu/drm/radeon/radeon_device.c rdev->dummy_page.addr = pci_map_page(rdev->pdev, rdev->dummy_page.page, rdev 789 drivers/gpu/drm/radeon/radeon_device.c if (pci_dma_mapping_error(rdev->pdev, rdev->dummy_page.addr)) { rdev 790 drivers/gpu/drm/radeon/radeon_device.c dev_err(&rdev->pdev->dev, "Failed to DMA MAP the dummy page\n"); rdev 791 drivers/gpu/drm/radeon/radeon_device.c __free_page(rdev->dummy_page.page); rdev 792 drivers/gpu/drm/radeon/radeon_device.c rdev->dummy_page.page = NULL; rdev 795 drivers/gpu/drm/radeon/radeon_device.c rdev->dummy_page.entry = radeon_gart_get_page_entry(rdev->dummy_page.addr, rdev 807 drivers/gpu/drm/radeon/radeon_device.c void radeon_dummy_page_fini(struct radeon_device *rdev) rdev 809 drivers/gpu/drm/radeon/radeon_device.c if (rdev->dummy_page.page == NULL) rdev 811 drivers/gpu/drm/radeon/radeon_device.c pci_unmap_page(rdev->pdev, rdev->dummy_page.addr, rdev 813 drivers/gpu/drm/radeon/radeon_device.c __free_page(rdev->dummy_page.page); rdev 814 drivers/gpu/drm/radeon/radeon_device.c rdev->dummy_page.page = NULL; rdev 838 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 841 drivers/gpu/drm/radeon/radeon_device.c r = rdev->pll_rreg(rdev, reg); rdev 856 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 858 drivers/gpu/drm/radeon/radeon_device.c rdev->pll_wreg(rdev, reg, val); rdev 872 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 875 drivers/gpu/drm/radeon/radeon_device.c r = rdev->mc_rreg(rdev, reg); rdev 890 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 892 drivers/gpu/drm/radeon/radeon_device.c rdev->mc_wreg(rdev, reg, val); rdev 906 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 922 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 940 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 956 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = info->dev->dev_private; rdev 973 drivers/gpu/drm/radeon/radeon_device.c int radeon_atombios_init(struct radeon_device *rdev) rdev 981 drivers/gpu/drm/radeon/radeon_device.c rdev->mode_info.atom_card_info = atom_card_info; rdev 982 drivers/gpu/drm/radeon/radeon_device.c atom_card_info->dev = rdev->ddev; rdev 986 drivers/gpu/drm/radeon/radeon_device.c if (rdev->rio_mem) { rdev 999 drivers/gpu/drm/radeon/radeon_device.c rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios); rdev 1000 drivers/gpu/drm/radeon/radeon_device.c if (!rdev->mode_info.atom_context) { rdev 1001 drivers/gpu/drm/radeon/radeon_device.c radeon_atombios_fini(rdev); rdev 1005 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->mode_info.atom_context->mutex); rdev 1006 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->mode_info.atom_context->scratch_mutex); rdev 1007 drivers/gpu/drm/radeon/radeon_device.c radeon_atom_initialize_bios_scratch_regs(rdev->ddev); rdev 1008 drivers/gpu/drm/radeon/radeon_device.c atom_allocate_fb_scratch(rdev->mode_info.atom_context); rdev 1021 drivers/gpu/drm/radeon/radeon_device.c void radeon_atombios_fini(struct radeon_device *rdev) rdev 1023 drivers/gpu/drm/radeon/radeon_device.c if (rdev->mode_info.atom_context) { rdev 1024 drivers/gpu/drm/radeon/radeon_device.c kfree(rdev->mode_info.atom_context->scratch); rdev 1026 drivers/gpu/drm/radeon/radeon_device.c kfree(rdev->mode_info.atom_context); rdev 1027 drivers/gpu/drm/radeon/radeon_device.c rdev->mode_info.atom_context = NULL; rdev 1028 drivers/gpu/drm/radeon/radeon_device.c kfree(rdev->mode_info.atom_card_info); rdev 1029 drivers/gpu/drm/radeon/radeon_device.c rdev->mode_info.atom_card_info = NULL; rdev 1048 drivers/gpu/drm/radeon/radeon_device.c int radeon_combios_init(struct radeon_device *rdev) rdev 1050 drivers/gpu/drm/radeon/radeon_device.c radeon_combios_initialize_bios_scratch_regs(rdev->ddev); rdev 1062 drivers/gpu/drm/radeon/radeon_device.c void radeon_combios_fini(struct radeon_device *rdev) rdev 1078 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = cookie; rdev 1079 drivers/gpu/drm/radeon/radeon_device.c radeon_vga_set_state(rdev, state); rdev 1124 drivers/gpu/drm/radeon/radeon_device.c static void radeon_check_arguments(struct radeon_device *rdev) rdev 1128 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n", rdev 1134 drivers/gpu/drm/radeon/radeon_device.c radeon_gart_size = radeon_gart_size_auto(rdev->family); rdev 1138 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "gart size (%d) too small\n", rdev 1140 drivers/gpu/drm/radeon/radeon_device.c radeon_gart_size = radeon_gart_size_auto(rdev->family); rdev 1142 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n", rdev 1144 drivers/gpu/drm/radeon/radeon_device.c radeon_gart_size = radeon_gart_size_auto(rdev->family); rdev 1146 drivers/gpu/drm/radeon/radeon_device.c rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20; rdev 1158 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: " rdev 1165 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", rdev 1171 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "VM size (%d) too small, min is 1GB\n", rdev 1180 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "VM size (%d) too large, max is 1TB\n", rdev 1201 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "VM page table size (%d) too small\n", rdev 1208 drivers/gpu/drm/radeon/radeon_device.c dev_warn(rdev->dev, "VM page table size (%d) too large\n", rdev 1287 drivers/gpu/drm/radeon/radeon_device.c int radeon_device_init(struct radeon_device *rdev, rdev 1296 drivers/gpu/drm/radeon/radeon_device.c rdev->shutdown = false; rdev 1297 drivers/gpu/drm/radeon/radeon_device.c rdev->dev = &pdev->dev; rdev 1298 drivers/gpu/drm/radeon/radeon_device.c rdev->ddev = ddev; rdev 1299 drivers/gpu/drm/radeon/radeon_device.c rdev->pdev = pdev; rdev 1300 drivers/gpu/drm/radeon/radeon_device.c rdev->flags = flags; rdev 1301 drivers/gpu/drm/radeon/radeon_device.c rdev->family = flags & RADEON_FAMILY_MASK; rdev 1302 drivers/gpu/drm/radeon/radeon_device.c rdev->is_atom_bios = false; rdev 1303 drivers/gpu/drm/radeon/radeon_device.c rdev->usec_timeout = RADEON_MAX_USEC_TIMEOUT; rdev 1304 drivers/gpu/drm/radeon/radeon_device.c rdev->mc.gtt_size = 512 * 1024 * 1024; rdev 1305 drivers/gpu/drm/radeon/radeon_device.c rdev->accel_working = false; rdev 1308 drivers/gpu/drm/radeon/radeon_device.c rdev->ring[i].idx = i; rdev 1310 drivers/gpu/drm/radeon/radeon_device.c rdev->fence_context = dma_fence_context_alloc(RADEON_NUM_RINGS); rdev 1313 drivers/gpu/drm/radeon/radeon_device.c radeon_family_name[rdev->family], pdev->vendor, pdev->device, rdev 1318 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->ring_lock); rdev 1319 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->dc_hw_i2c_mutex); rdev 1320 drivers/gpu/drm/radeon/radeon_device.c atomic_set(&rdev->ih.lock, 0); rdev 1321 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->gem.mutex); rdev 1322 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->pm.mutex); rdev 1323 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->gpu_clock_mutex); rdev 1324 drivers/gpu/drm/radeon/radeon_device.c mutex_init(&rdev->srbm_mutex); rdev 1325 drivers/gpu/drm/radeon/radeon_device.c init_rwsem(&rdev->pm.mclk_lock); rdev 1326 drivers/gpu/drm/radeon/radeon_device.c init_rwsem(&rdev->exclusive_lock); rdev 1327 drivers/gpu/drm/radeon/radeon_device.c init_waitqueue_head(&rdev->irq.vblank_queue); rdev 1328 drivers/gpu/drm/radeon/radeon_device.c r = radeon_gem_init(rdev); rdev 1332 drivers/gpu/drm/radeon/radeon_device.c radeon_check_arguments(rdev); rdev 1336 drivers/gpu/drm/radeon/radeon_device.c rdev->vm_manager.max_pfn = radeon_vm_size << 18; rdev 1339 drivers/gpu/drm/radeon/radeon_device.c r = radeon_asic_init(rdev); rdev 1346 drivers/gpu/drm/radeon/radeon_device.c if ((rdev->family >= CHIP_RS400) && rdev 1347 drivers/gpu/drm/radeon/radeon_device.c (rdev->flags & RADEON_IS_IGP)) { rdev 1348 drivers/gpu/drm/radeon/radeon_device.c rdev->flags &= ~RADEON_IS_AGP; rdev 1351 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) { rdev 1352 drivers/gpu/drm/radeon/radeon_device.c radeon_agp_disable(rdev); rdev 1359 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_CAYMAN) rdev 1360 drivers/gpu/drm/radeon/radeon_device.c rdev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ rdev 1361 drivers/gpu/drm/radeon/radeon_device.c else if (rdev->family >= CHIP_CEDAR) rdev 1362 drivers/gpu/drm/radeon/radeon_device.c rdev->mc.mc_mask = 0xfffffffffULL; /* 36 bit MC */ rdev 1364 drivers/gpu/drm/radeon/radeon_device.c rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */ rdev 1373 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_AGP) rdev 1375 drivers/gpu/drm/radeon/radeon_device.c if ((rdev->flags & RADEON_IS_PCI) && rdev 1376 drivers/gpu/drm/radeon/radeon_device.c (rdev->family <= CHIP_RS740)) rdev 1379 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family == CHIP_CEDAR) rdev 1383 drivers/gpu/drm/radeon/radeon_device.c r = dma_set_mask_and_coherent(&rdev->pdev->dev, DMA_BIT_MASK(dma_bits)); rdev 1388 drivers/gpu/drm/radeon/radeon_device.c rdev->need_swiotlb = drm_need_swiotlb(dma_bits); rdev 1392 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->mmio_idx_lock); rdev 1393 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->smc_idx_lock); rdev 1394 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->pll_idx_lock); rdev 1395 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->mc_idx_lock); rdev 1396 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->pcie_idx_lock); rdev 1397 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->pciep_idx_lock); rdev 1398 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->pif_idx_lock); rdev 1399 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->cg_idx_lock); rdev 1400 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->uvd_idx_lock); rdev 1401 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->rcu_idx_lock); rdev 1402 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->didt_idx_lock); rdev 1403 drivers/gpu/drm/radeon/radeon_device.c spin_lock_init(&rdev->end_idx_lock); rdev 1404 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_BONAIRE) { rdev 1405 drivers/gpu/drm/radeon/radeon_device.c rdev->rmmio_base = pci_resource_start(rdev->pdev, 5); rdev 1406 drivers/gpu/drm/radeon/radeon_device.c rdev->rmmio_size = pci_resource_len(rdev->pdev, 5); rdev 1408 drivers/gpu/drm/radeon/radeon_device.c rdev->rmmio_base = pci_resource_start(rdev->pdev, 2); rdev 1409 drivers/gpu/drm/radeon/radeon_device.c rdev->rmmio_size = pci_resource_len(rdev->pdev, 2); rdev 1411 drivers/gpu/drm/radeon/radeon_device.c rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size); rdev 1412 drivers/gpu/drm/radeon/radeon_device.c if (rdev->rmmio == NULL) rdev 1416 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_BONAIRE) rdev 1417 drivers/gpu/drm/radeon/radeon_device.c radeon_doorbell_init(rdev); rdev 1421 drivers/gpu/drm/radeon/radeon_device.c if (pci_resource_flags(rdev->pdev, i) & IORESOURCE_IO) { rdev 1422 drivers/gpu/drm/radeon/radeon_device.c rdev->rio_mem_size = pci_resource_len(rdev->pdev, i); rdev 1423 drivers/gpu/drm/radeon/radeon_device.c rdev->rio_mem = pci_iomap(rdev->pdev, i, rdev->rio_mem_size); rdev 1427 drivers/gpu/drm/radeon/radeon_device.c if (rdev->rio_mem == NULL) rdev 1430 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_PX) rdev 1431 drivers/gpu/drm/radeon/radeon_device.c radeon_device_handle_px_quirks(rdev); rdev 1436 drivers/gpu/drm/radeon/radeon_device.c vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); rdev 1438 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_PX) rdev 1440 drivers/gpu/drm/radeon/radeon_device.c if (!pci_is_thunderbolt_attached(rdev->pdev)) rdev 1441 drivers/gpu/drm/radeon/radeon_device.c vga_switcheroo_register_client(rdev->pdev, rdev 1444 drivers/gpu/drm/radeon/radeon_device.c vga_switcheroo_init_domain_pm_ops(rdev->dev, &rdev->vga_pm_domain); rdev 1446 drivers/gpu/drm/radeon/radeon_device.c r = radeon_init(rdev); rdev 1450 drivers/gpu/drm/radeon/radeon_device.c r = radeon_gem_debugfs_init(rdev); rdev 1455 drivers/gpu/drm/radeon/radeon_device.c r = radeon_mst_debugfs_init(rdev); rdev 1460 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_AGP && !rdev->accel_working) { rdev 1464 drivers/gpu/drm/radeon/radeon_device.c radeon_asic_reset(rdev); rdev 1465 drivers/gpu/drm/radeon/radeon_device.c radeon_fini(rdev); rdev 1466 drivers/gpu/drm/radeon/radeon_device.c radeon_agp_disable(rdev); rdev 1467 drivers/gpu/drm/radeon/radeon_device.c r = radeon_init(rdev); rdev 1472 drivers/gpu/drm/radeon/radeon_device.c r = radeon_ib_ring_tests(rdev); rdev 1481 drivers/gpu/drm/radeon/radeon_device.c if (rdev->pm.dpm_enabled && rdev 1482 drivers/gpu/drm/radeon/radeon_device.c (rdev->pm.pm_method == PM_METHOD_DPM) && rdev 1483 drivers/gpu/drm/radeon/radeon_device.c (rdev->family == CHIP_TURKS) && rdev 1484 drivers/gpu/drm/radeon/radeon_device.c (rdev->flags & RADEON_IS_MOBILITY)) { rdev 1485 drivers/gpu/drm/radeon/radeon_device.c mutex_lock(&rdev->pm.mutex); rdev 1486 drivers/gpu/drm/radeon/radeon_device.c radeon_dpm_disable(rdev); rdev 1487 drivers/gpu/drm/radeon/radeon_device.c radeon_dpm_enable(rdev); rdev 1488 drivers/gpu/drm/radeon/radeon_device.c mutex_unlock(&rdev->pm.mutex); rdev 1492 drivers/gpu/drm/radeon/radeon_device.c if (rdev->accel_working) rdev 1493 drivers/gpu/drm/radeon/radeon_device.c radeon_test_moves(rdev); rdev 1498 drivers/gpu/drm/radeon/radeon_device.c if (rdev->accel_working) rdev 1499 drivers/gpu/drm/radeon/radeon_device.c radeon_test_syncing(rdev); rdev 1504 drivers/gpu/drm/radeon/radeon_device.c if (rdev->accel_working) rdev 1505 drivers/gpu/drm/radeon/radeon_device.c radeon_benchmark(rdev, radeon_benchmarking); rdev 1516 drivers/gpu/drm/radeon/radeon_device.c vga_switcheroo_fini_domain_pm_ops(rdev->dev); rdev 1528 drivers/gpu/drm/radeon/radeon_device.c void radeon_device_fini(struct radeon_device *rdev) rdev 1531 drivers/gpu/drm/radeon/radeon_device.c rdev->shutdown = true; rdev 1533 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_evict_vram(rdev); rdev 1534 drivers/gpu/drm/radeon/radeon_device.c radeon_fini(rdev); rdev 1535 drivers/gpu/drm/radeon/radeon_device.c if (!pci_is_thunderbolt_attached(rdev->pdev)) rdev 1536 drivers/gpu/drm/radeon/radeon_device.c vga_switcheroo_unregister_client(rdev->pdev); rdev 1537 drivers/gpu/drm/radeon/radeon_device.c if (rdev->flags & RADEON_IS_PX) rdev 1538 drivers/gpu/drm/radeon/radeon_device.c vga_switcheroo_fini_domain_pm_ops(rdev->dev); rdev 1539 drivers/gpu/drm/radeon/radeon_device.c vga_client_register(rdev->pdev, NULL, NULL, NULL); rdev 1540 drivers/gpu/drm/radeon/radeon_device.c if (rdev->rio_mem) rdev 1541 drivers/gpu/drm/radeon/radeon_device.c pci_iounmap(rdev->pdev, rdev->rio_mem); rdev 1542 drivers/gpu/drm/radeon/radeon_device.c rdev->rio_mem = NULL; rdev 1543 drivers/gpu/drm/radeon/radeon_device.c iounmap(rdev->rmmio); rdev 1544 drivers/gpu/drm/radeon/radeon_device.c rdev->rmmio = NULL; rdev 1545 drivers/gpu/drm/radeon/radeon_device.c if (rdev->family >= CHIP_BONAIRE) rdev 1546 drivers/gpu/drm/radeon/radeon_device.c radeon_doorbell_fini(rdev); rdev 1566 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev; rdev 1575 drivers/gpu/drm/radeon/radeon_device.c rdev = dev->dev_private; rdev 1609 drivers/gpu/drm/radeon/radeon_device.c if (!radeon_fbdev_robj_is_fb(rdev, robj)) { rdev 1618 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_evict_vram(rdev); rdev 1622 drivers/gpu/drm/radeon/radeon_device.c r = radeon_fence_wait_empty(rdev, i); rdev 1625 drivers/gpu/drm/radeon/radeon_device.c radeon_fence_driver_force_completion(rdev, i); rdev 1629 drivers/gpu/drm/radeon/radeon_device.c radeon_save_bios_scratch_regs(rdev); rdev 1631 drivers/gpu/drm/radeon/radeon_device.c radeon_suspend(rdev); rdev 1632 drivers/gpu/drm/radeon/radeon_device.c radeon_hpd_fini(rdev); rdev 1637 drivers/gpu/drm/radeon/radeon_device.c radeon_bo_evict_vram(rdev); rdev 1639 drivers/gpu/drm/radeon/radeon_device.c radeon_agp_suspend(rdev); rdev 1642 drivers/gpu/drm/radeon/radeon_device.c if (freeze && rdev->family >= CHIP_CEDAR && !(rdev->flags & RADEON_IS_IGP)) { rdev 1643 drivers/gpu/drm/radeon/radeon_device.c rdev->asic->asic_reset(rdev, true); rdev 1653 drivers/gpu/drm/radeon/radeon_device.c radeon_fbdev_set_suspend(rdev, 1); rdev 1671 drivers/gpu/drm/radeon/radeon_device.c struct radeon_device *rdev = dev->dev_private; rdev 1691 drivers/gpu/drm/radeon/radeon_device.c radeon_agp_resume(rdev); rdev 1692 drivers/gpu/drm/radeon/radeon_device.c radeon_resume(rdev); rdev 1694 drivers/gpu/drm/radeon/radeon_device.c r = radeon_ib_ring_tests(rdev); rdev 1698 drivers/gpu/drm/radeon/radeon_device.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 1700 drivers/gpu/drm/radeon/radeon_device.c r = radeon_pm_late_init(rdev); rdev 1702 drivers/gpu/drm/radeon/radeon_device.c rdev->pm.dpm_enabled = false; rdev 1707 drivers/gpu/drm/radeon/radeon_device.c radeon_pm_resume(rdev); rdev 1710 drivers/gpu/drm/radeon/radeon_device.c radeon_restore_bios_scratch_regs(rdev); rdev 1723 drivers/gpu/drm/radeon/radeon_device.c ASIC_IS_AVIVO(rdev) ? rdev 1734 drivers/gpu/drm/radeon/radeon_device.c if (rdev->is_atom_bios) { rdev 1735 drivers/gpu/drm/radeon/radeon_device.c radeon_atom_encoder_init(rdev); rdev 1736 drivers/gpu/drm/radeon/radeon_device.c radeon_atom_disp_eng_pll_init(rdev); rdev 1738 drivers/gpu/drm/radeon/radeon_device.c if (rdev->mode_info.bl_encoder) { rdev 1739 drivers/gpu/drm/radeon/radeon_device.c u8 bl_level = radeon_get_backlight_level(rdev, rdev 1740 drivers/gpu/drm/radeon/radeon_device.c rdev->mode_info.bl_encoder); rdev 1741 drivers/gpu/drm/radeon/radeon_device.c radeon_set_backlight_level(rdev, rdev->mode_info.bl_encoder, rdev 1746 drivers/gpu/drm/radeon/radeon_device.c radeon_hpd_init(rdev); rdev 1761 drivers/gpu/drm/radeon/radeon_device.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) rdev 1762 drivers/gpu/drm/radeon/radeon_device.c radeon_pm_compute_clocks(rdev); rdev 1765 drivers/gpu/drm/radeon/radeon_device.c radeon_fbdev_set_suspend(rdev, 0); rdev 1780 drivers/gpu/drm/radeon/radeon_device.c int radeon_gpu_reset(struct radeon_device *rdev) rdev 1790 drivers/gpu/drm/radeon/radeon_device.c down_write(&rdev->exclusive_lock); rdev 1792 drivers/gpu/drm/radeon/radeon_device.c if (!rdev->needs_reset) { rdev 1793 drivers/gpu/drm/radeon/radeon_device.c up_write(&rdev->exclusive_lock); rdev 1797 drivers/gpu/drm/radeon/radeon_device.c atomic_inc(&rdev->gpu_reset_counter); rdev 1799 drivers/gpu/drm/radeon/radeon_device.c radeon_save_bios_scratch_regs(rdev); rdev 1801 drivers/gpu/drm/radeon/radeon_device.c resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); rdev 1802 drivers/gpu/drm/radeon/radeon_device.c radeon_suspend(rdev); rdev 1803 drivers/gpu/drm/radeon/radeon_device.c radeon_hpd_fini(rdev); rdev 1806 drivers/gpu/drm/radeon/radeon_device.c ring_sizes[i] = radeon_ring_backup(rdev, &rdev->ring[i], rdev 1810 drivers/gpu/drm/radeon/radeon_device.c dev_info(rdev->dev, "Saved %d dwords of commands " rdev 1815 drivers/gpu/drm/radeon/radeon_device.c r = radeon_asic_reset(rdev); rdev 1817 drivers/gpu/drm/radeon/radeon_device.c dev_info(rdev->dev, "GPU reset succeeded, trying to resume\n"); rdev 1818 drivers/gpu/drm/radeon/radeon_device.c radeon_resume(rdev); rdev 1821 drivers/gpu/drm/radeon/radeon_device.c radeon_restore_bios_scratch_regs(rdev); rdev 1825 drivers/gpu/drm/radeon/radeon_device.c radeon_ring_restore(rdev, &rdev->ring[i], rdev 1828 drivers/gpu/drm/radeon/radeon_device.c radeon_fence_driver_force_completion(rdev, i); rdev 1833 drivers/gpu/drm/radeon/radeon_device.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 1835 drivers/gpu/drm/radeon/radeon_device.c r = radeon_pm_late_init(rdev); rdev 1837 drivers/gpu/drm/radeon/radeon_device.c rdev->pm.dpm_enabled = false; rdev 1842 drivers/gpu/drm/radeon/radeon_device.c radeon_pm_resume(rdev); rdev 1846 drivers/gpu/drm/radeon/radeon_device.c if (rdev->is_atom_bios) { rdev 1847 drivers/gpu/drm/radeon/radeon_device.c radeon_atom_encoder_init(rdev); rdev 1848 drivers/gpu/drm/radeon/radeon_device.c radeon_atom_disp_eng_pll_init(rdev); rdev 1850 drivers/gpu/drm/radeon/radeon_device.c if (rdev->mode_info.bl_encoder) { rdev 1851 drivers/gpu/drm/radeon/radeon_device.c u8 bl_level = radeon_get_backlight_level(rdev, rdev 1852 drivers/gpu/drm/radeon/radeon_device.c rdev->mode_info.bl_encoder); rdev 1853 drivers/gpu/drm/radeon/radeon_device.c radeon_set_backlight_level(rdev, rdev->mode_info.bl_encoder, rdev 1858 drivers/gpu/drm/radeon/radeon_device.c radeon_hpd_init(rdev); rdev 1860 drivers/gpu/drm/radeon/radeon_device.c ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); rdev 1862 drivers/gpu/drm/radeon/radeon_device.c rdev->in_reset = true; rdev 1863 drivers/gpu/drm/radeon/radeon_device.c rdev->needs_reset = false; rdev 1865 drivers/gpu/drm/radeon/radeon_device.c downgrade_write(&rdev->exclusive_lock); rdev 1867 drivers/gpu/drm/radeon/radeon_device.c drm_helper_resume_force_mode(rdev->ddev); rdev 1870 drivers/gpu/drm/radeon/radeon_device.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) rdev 1871 drivers/gpu/drm/radeon/radeon_device.c radeon_pm_compute_clocks(rdev); rdev 1874 drivers/gpu/drm/radeon/radeon_device.c r = radeon_ib_ring_tests(rdev); rdev 1879 drivers/gpu/drm/radeon/radeon_device.c dev_info(rdev->dev, "GPU reset failed\n"); rdev 1882 drivers/gpu/drm/radeon/radeon_device.c rdev->needs_reset = r == -EAGAIN; rdev 1883 drivers/gpu/drm/radeon/radeon_device.c rdev->in_reset = false; rdev 1885 drivers/gpu/drm/radeon/radeon_device.c up_read(&rdev->exclusive_lock); rdev 1893 drivers/gpu/drm/radeon/radeon_device.c int radeon_debugfs_add_files(struct radeon_device *rdev, rdev 1899 drivers/gpu/drm/radeon/radeon_device.c for (i = 0; i < rdev->debugfs_count; i++) { rdev 1900 drivers/gpu/drm/radeon/radeon_device.c if (rdev->debugfs[i].files == files) { rdev 1906 drivers/gpu/drm/radeon/radeon_device.c i = rdev->debugfs_count + 1; rdev 1913 drivers/gpu/drm/radeon/radeon_device.c rdev->debugfs[rdev->debugfs_count].files = files; rdev 1914 drivers/gpu/drm/radeon/radeon_device.c rdev->debugfs[rdev->debugfs_count].num_files = nfiles; rdev 1915 drivers/gpu/drm/radeon/radeon_device.c rdev->debugfs_count = i; rdev 1918 drivers/gpu/drm/radeon/radeon_device.c rdev->ddev->primary->debugfs_root, rdev 1919 drivers/gpu/drm/radeon/radeon_device.c rdev->ddev->primary); rdev 52 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 90 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 124 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 183 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_DCE8(rdev)) { rdev 196 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 223 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 228 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_DCE5(rdev)) rdev 230 drivers/gpu/drm/radeon/radeon_display.c else if (ASIC_IS_DCE4(rdev)) rdev 232 drivers/gpu/drm/radeon/radeon_display.c else if (ASIC_IS_AVIVO(rdev)) rdev 284 drivers/gpu/drm/radeon/radeon_display.c void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id) rdev 286 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 304 drivers/gpu/drm/radeon/radeon_display.c if ((radeon_use_pflipirq == 2) && ASIC_IS_DCE4(rdev)) rdev 307 drivers/gpu/drm/radeon/radeon_display.c spin_lock_irqsave(&rdev->ddev->event_lock, flags); rdev 313 drivers/gpu/drm/radeon/radeon_display.c spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); rdev 317 drivers/gpu/drm/radeon/radeon_display.c update_pending = radeon_page_flip_pending(rdev, crtc_id); rdev 339 drivers/gpu/drm/radeon/radeon_display.c radeon_get_crtc_scanoutpos(rdev->ddev, crtc_id, rdev 342 drivers/gpu/drm/radeon/radeon_display.c &rdev->mode_info.crtcs[crtc_id]->base.hwmode)) && rdev 343 drivers/gpu/drm/radeon/radeon_display.c ((vpos >= 0 && hpos < 0) || (hpos >= 0 && !ASIC_IS_AVIVO(rdev)))) { rdev 352 drivers/gpu/drm/radeon/radeon_display.c spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); rdev 354 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc_handle_flip(rdev, crtc_id); rdev 365 drivers/gpu/drm/radeon/radeon_display.c void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) rdev 367 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 375 drivers/gpu/drm/radeon/radeon_display.c spin_lock_irqsave(&rdev->ddev->event_lock, flags); rdev 382 drivers/gpu/drm/radeon/radeon_display.c spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); rdev 394 drivers/gpu/drm/radeon/radeon_display.c spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); rdev 397 drivers/gpu/drm/radeon/radeon_display.c radeon_irq_kms_pflip_irq_put(rdev, work->crtc_id); rdev 412 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = work->rdev; rdev 413 drivers/gpu/drm/radeon/radeon_display.c struct drm_device *dev = rdev->ddev; rdev 414 drivers/gpu/drm/radeon/radeon_display.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[work->crtc_id]; rdev 421 drivers/gpu/drm/radeon/radeon_display.c down_read(&rdev->exclusive_lock); rdev 426 drivers/gpu/drm/radeon/radeon_display.c if (fence && fence->rdev == rdev) { rdev 429 drivers/gpu/drm/radeon/radeon_display.c up_read(&rdev->exclusive_lock); rdev 431 drivers/gpu/drm/radeon/radeon_display.c r = radeon_gpu_reset(rdev); rdev 433 drivers/gpu/drm/radeon/radeon_display.c down_read(&rdev->exclusive_lock); rdev 461 drivers/gpu/drm/radeon/radeon_display.c (!ASIC_IS_AVIVO(rdev) || rdev 470 drivers/gpu/drm/radeon/radeon_display.c radeon_irq_kms_pflip_irq_get(rdev, radeon_crtc->crtc_id); rdev 473 drivers/gpu/drm/radeon/radeon_display.c radeon_page_flip(rdev, radeon_crtc->crtc_id, work->base, work->async); rdev 477 drivers/gpu/drm/radeon/radeon_display.c up_read(&rdev->exclusive_lock); rdev 488 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 505 drivers/gpu/drm/radeon/radeon_display.c work->rdev = rdev; rdev 531 drivers/gpu/drm/radeon/radeon_display.c ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, &base); rdev 542 drivers/gpu/drm/radeon/radeon_display.c if (!ASIC_IS_AVIVO(rdev)) { rdev 548 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_R300(rdev)) { rdev 623 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev; rdev 645 drivers/gpu/drm/radeon/radeon_display.c rdev = dev->dev_private; rdev 648 drivers/gpu/drm/radeon/radeon_display.c if (active && !rdev->have_disp_power_ref) { rdev 649 drivers/gpu/drm/radeon/radeon_display.c rdev->have_disp_power_ref = true; rdev 654 drivers/gpu/drm/radeon/radeon_display.c if (!active && rdev->have_disp_power_ref) { rdev 656 drivers/gpu/drm/radeon/radeon_display.c rdev->have_disp_power_ref = false; rdev 675 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 688 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.crtcs[index] = radeon_crtc; rdev 690 drivers/gpu/drm/radeon/radeon_display.c if (rdev->family >= CHIP_BONAIRE) { rdev 712 drivers/gpu/drm/radeon/radeon_display.c if (rdev->is_atom_bios && (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom)) rdev 846 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 849 drivers/gpu/drm/radeon/radeon_display.c if (rdev->bios) { rdev 850 drivers/gpu/drm/radeon/radeon_display.c if (rdev->is_atom_bios) { rdev 860 drivers/gpu/drm/radeon/radeon_display.c if (!ASIC_IS_AVIVO(rdev)) rdev 1399 drivers/gpu/drm/radeon/radeon_display.c static int radeon_modeset_create_props(struct radeon_device *rdev) rdev 1403 drivers/gpu/drm/radeon/radeon_display.c if (rdev->is_atom_bios) { rdev 1404 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.coherent_mode_property = rdev 1405 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_range(rdev->ddev, 0 , "coherent", 0, 1); rdev 1406 drivers/gpu/drm/radeon/radeon_display.c if (!rdev->mode_info.coherent_mode_property) rdev 1410 drivers/gpu/drm/radeon/radeon_display.c if (!ASIC_IS_AVIVO(rdev)) { rdev 1412 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.tmds_pll_property = rdev 1413 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_enum(rdev->ddev, 0, rdev 1418 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.load_detect_property = rdev 1419 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_range(rdev->ddev, 0, "load detection", 0, 1); rdev 1420 drivers/gpu/drm/radeon/radeon_display.c if (!rdev->mode_info.load_detect_property) rdev 1423 drivers/gpu/drm/radeon/radeon_display.c drm_mode_create_scaling_mode_property(rdev->ddev); rdev 1426 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.tv_std_property = rdev 1427 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_enum(rdev->ddev, 0, rdev 1432 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.underscan_property = rdev 1433 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_enum(rdev->ddev, 0, rdev 1437 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.underscan_hborder_property = rdev 1438 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_range(rdev->ddev, 0, rdev 1440 drivers/gpu/drm/radeon/radeon_display.c if (!rdev->mode_info.underscan_hborder_property) rdev 1443 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.underscan_vborder_property = rdev 1444 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_range(rdev->ddev, 0, rdev 1446 drivers/gpu/drm/radeon/radeon_display.c if (!rdev->mode_info.underscan_vborder_property) rdev 1450 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.audio_property = rdev 1451 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_enum(rdev->ddev, 0, rdev 1456 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.dither_property = rdev 1457 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_enum(rdev->ddev, 0, rdev 1462 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.output_csc_property = rdev 1463 drivers/gpu/drm/radeon/radeon_display.c drm_property_create_enum(rdev->ddev, 0, rdev 1470 drivers/gpu/drm/radeon/radeon_display.c void radeon_update_display_priority(struct radeon_device *rdev) rdev 1480 drivers/gpu/drm/radeon/radeon_display.c if ((ASIC_IS_R300(rdev) || (rdev->family == CHIP_RV515)) && rdev 1481 drivers/gpu/drm/radeon/radeon_display.c !(rdev->flags & RADEON_IS_IGP)) rdev 1482 drivers/gpu/drm/radeon/radeon_display.c rdev->disp_priority = 2; rdev 1484 drivers/gpu/drm/radeon/radeon_display.c rdev->disp_priority = 0; rdev 1486 drivers/gpu/drm/radeon/radeon_display.c rdev->disp_priority = radeon_disp_priority; rdev 1493 drivers/gpu/drm/radeon/radeon_display.c static void radeon_afmt_init(struct radeon_device *rdev) rdev 1498 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[i] = NULL; rdev 1500 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_NODCE(rdev)) { rdev 1502 drivers/gpu/drm/radeon/radeon_display.c } else if (ASIC_IS_DCE4(rdev)) { rdev 1518 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_DCE8(rdev)) rdev 1520 drivers/gpu/drm/radeon/radeon_display.c else if (ASIC_IS_DCE6(rdev)) rdev 1522 drivers/gpu/drm/radeon/radeon_display.c else if (ASIC_IS_DCE5(rdev)) rdev 1524 drivers/gpu/drm/radeon/radeon_display.c else if (ASIC_IS_DCE41(rdev)) rdev 1531 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[i] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL); rdev 1532 drivers/gpu/drm/radeon/radeon_display.c if (rdev->mode_info.afmt[i]) { rdev 1533 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[i]->offset = eg_offsets[i]; rdev 1534 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[i]->id = i; rdev 1537 drivers/gpu/drm/radeon/radeon_display.c } else if (ASIC_IS_DCE3(rdev)) { rdev 1539 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL); rdev 1540 drivers/gpu/drm/radeon/radeon_display.c if (rdev->mode_info.afmt[0]) { rdev 1541 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[0]->offset = DCE3_HDMI_OFFSET0; rdev 1542 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[0]->id = 0; rdev 1544 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL); rdev 1545 drivers/gpu/drm/radeon/radeon_display.c if (rdev->mode_info.afmt[1]) { rdev 1546 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[1]->offset = DCE3_HDMI_OFFSET1; rdev 1547 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[1]->id = 1; rdev 1549 drivers/gpu/drm/radeon/radeon_display.c } else if (ASIC_IS_DCE2(rdev)) { rdev 1551 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL); rdev 1552 drivers/gpu/drm/radeon/radeon_display.c if (rdev->mode_info.afmt[0]) { rdev 1553 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[0]->offset = DCE2_HDMI_OFFSET0; rdev 1554 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[0]->id = 0; rdev 1557 drivers/gpu/drm/radeon/radeon_display.c if (rdev->family >= CHIP_R600) { rdev 1558 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL); rdev 1559 drivers/gpu/drm/radeon/radeon_display.c if (rdev->mode_info.afmt[1]) { rdev 1560 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[1]->offset = DCE2_HDMI_OFFSET1; rdev 1561 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[1]->id = 1; rdev 1567 drivers/gpu/drm/radeon/radeon_display.c static void radeon_afmt_fini(struct radeon_device *rdev) rdev 1572 drivers/gpu/drm/radeon/radeon_display.c kfree(rdev->mode_info.afmt[i]); rdev 1573 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.afmt[i] = NULL; rdev 1577 drivers/gpu/drm/radeon/radeon_display.c int radeon_modeset_init(struct radeon_device *rdev) rdev 1582 drivers/gpu/drm/radeon/radeon_display.c drm_mode_config_init(rdev->ddev); rdev 1583 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.mode_config_initialized = true; rdev 1585 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.funcs = &radeon_mode_funcs; rdev 1587 drivers/gpu/drm/radeon/radeon_display.c if (radeon_use_pflipirq == 2 && rdev->family >= CHIP_R600) rdev 1588 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.async_page_flip = true; rdev 1590 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_DCE5(rdev)) { rdev 1591 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.max_width = 16384; rdev 1592 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.max_height = 16384; rdev 1593 drivers/gpu/drm/radeon/radeon_display.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 1594 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.max_width = 8192; rdev 1595 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.max_height = 8192; rdev 1597 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.max_width = 4096; rdev 1598 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.max_height = 4096; rdev 1601 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.preferred_depth = 24; rdev 1602 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.prefer_shadow = 1; rdev 1604 drivers/gpu/drm/radeon/radeon_display.c rdev->ddev->mode_config.fb_base = rdev->mc.aper_base; rdev 1606 drivers/gpu/drm/radeon/radeon_display.c ret = radeon_modeset_create_props(rdev); rdev 1612 drivers/gpu/drm/radeon/radeon_display.c radeon_i2c_init(rdev); rdev 1615 drivers/gpu/drm/radeon/radeon_display.c if (!rdev->is_atom_bios) { rdev 1617 drivers/gpu/drm/radeon/radeon_display.c radeon_combios_check_hardcoded_edid(rdev); rdev 1621 drivers/gpu/drm/radeon/radeon_display.c for (i = 0; i < rdev->num_crtc; i++) { rdev 1622 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc_init(rdev->ddev, i); rdev 1626 drivers/gpu/drm/radeon/radeon_display.c ret = radeon_setup_enc_conn(rdev->ddev); rdev 1632 drivers/gpu/drm/radeon/radeon_display.c if (rdev->is_atom_bios) { rdev 1633 drivers/gpu/drm/radeon/radeon_display.c radeon_atom_encoder_init(rdev); rdev 1634 drivers/gpu/drm/radeon/radeon_display.c radeon_atom_disp_eng_pll_init(rdev); rdev 1638 drivers/gpu/drm/radeon/radeon_display.c radeon_hpd_init(rdev); rdev 1641 drivers/gpu/drm/radeon/radeon_display.c radeon_afmt_init(rdev); rdev 1643 drivers/gpu/drm/radeon/radeon_display.c radeon_fbdev_init(rdev); rdev 1644 drivers/gpu/drm/radeon/radeon_display.c drm_kms_helper_poll_init(rdev->ddev); rdev 1647 drivers/gpu/drm/radeon/radeon_display.c ret = radeon_pm_late_init(rdev); rdev 1652 drivers/gpu/drm/radeon/radeon_display.c void radeon_modeset_fini(struct radeon_device *rdev) rdev 1654 drivers/gpu/drm/radeon/radeon_display.c if (rdev->mode_info.mode_config_initialized) { rdev 1655 drivers/gpu/drm/radeon/radeon_display.c drm_kms_helper_poll_fini(rdev->ddev); rdev 1656 drivers/gpu/drm/radeon/radeon_display.c radeon_hpd_fini(rdev); rdev 1657 drivers/gpu/drm/radeon/radeon_display.c drm_helper_force_disable_all(rdev->ddev); rdev 1658 drivers/gpu/drm/radeon/radeon_display.c radeon_fbdev_fini(rdev); rdev 1659 drivers/gpu/drm/radeon/radeon_display.c radeon_afmt_fini(rdev); rdev 1660 drivers/gpu/drm/radeon/radeon_display.c drm_mode_config_cleanup(rdev->ddev); rdev 1661 drivers/gpu/drm/radeon/radeon_display.c rdev->mode_info.mode_config_initialized = false; rdev 1664 drivers/gpu/drm/radeon/radeon_display.c kfree(rdev->mode_info.bios_hardcoded_edid); rdev 1667 drivers/gpu/drm/radeon/radeon_display.c radeon_i2c_fini(rdev); rdev 1687 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 1726 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_AVIVO(rdev) && rdev 1821 drivers/gpu/drm/radeon/radeon_display.c struct radeon_device *rdev = dev->dev_private; rdev 1829 drivers/gpu/drm/radeon/radeon_display.c if (ASIC_IS_DCE4(rdev)) { rdev 1872 drivers/gpu/drm/radeon/radeon_display.c } else if (ASIC_IS_AVIVO(rdev)) { rdev 1951 drivers/gpu/drm/radeon/radeon_display.c vbl_start -= rdev->mode_info.crtcs[pipe]->lb_vblank_lead_lines; rdev 60 drivers/gpu/drm/radeon/radeon_dp_auxch.c struct radeon_device *rdev = dev->dev_private; rdev 33 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 71 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 167 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 303 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 305 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_fb_add_connector(rdev, connector); rdev 315 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 318 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_fb_remove_connector(rdev, connector); rdev 355 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 373 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss, rdev 382 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 391 drivers/gpu/drm/radeon/radeon_dp_mst.c if (!ASIC_IS_DCE5(rdev)) { rdev 493 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_atom_release_dig_encoder(rdev, mst_enc->fe); rdev 604 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 622 drivers/gpu/drm/radeon/radeon_dp_mst.c switch (rdev->num_crtc) { rdev 668 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_device *rdev = dev->dev_private; rdev 675 drivers/gpu/drm/radeon/radeon_dp_mst.c if (!ASIC_IS_DCE5(rdev)) rdev 785 drivers/gpu/drm/radeon/radeon_dp_mst.c int radeon_mst_debugfs_init(struct radeon_device *rdev) rdev 788 drivers/gpu/drm/radeon/radeon_dp_mst.c return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1); rdev 46 drivers/gpu/drm/radeon/radeon_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 53 drivers/gpu/drm/radeon/radeon_encoders.c if (rdev->family >= CHIP_R600) rdev 91 drivers/gpu/drm/radeon/radeon_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 102 drivers/gpu/drm/radeon/radeon_encoders.c if ((rdev->family == CHIP_RS300) || rdev 103 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->family == CHIP_RS400) || rdev 104 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->family == CHIP_RS480)) rdev 106 drivers/gpu/drm/radeon/radeon_encoders.c else if (ASIC_IS_AVIVO(rdev)) rdev 112 drivers/gpu/drm/radeon/radeon_encoders.c if (ASIC_IS_AVIVO(rdev)) rdev 122 drivers/gpu/drm/radeon/radeon_encoders.c if (ASIC_IS_AVIVO(rdev)) rdev 130 drivers/gpu/drm/radeon/radeon_encoders.c if (ASIC_IS_AVIVO(rdev)) rdev 136 drivers/gpu/drm/radeon/radeon_encoders.c if ((rdev->family == CHIP_RS300) || rdev 137 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->family == CHIP_RS400) || rdev 138 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->family == CHIP_RS480)) rdev 140 drivers/gpu/drm/radeon/radeon_encoders.c else if (ASIC_IS_AVIVO(rdev)) rdev 147 drivers/gpu/drm/radeon/radeon_encoders.c if ((rdev->family == CHIP_RS600) || rdev 148 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->family == CHIP_RS690) || rdev 149 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->family == CHIP_RS740)) rdev 151 drivers/gpu/drm/radeon/radeon_encoders.c else if (ASIC_IS_AVIVO(rdev)) rdev 168 drivers/gpu/drm/radeon/radeon_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 181 drivers/gpu/drm/radeon/radeon_encoders.c if ((rdev->pdev->device == 0x9583) && rdev 182 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->pdev->subsystem_vendor == 0x1734) && rdev 183 drivers/gpu/drm/radeon/radeon_encoders.c (rdev->pdev->subsystem_device == 0x1107)) rdev 188 drivers/gpu/drm/radeon/radeon_encoders.c else if (rdev->family < CHIP_R600) rdev 196 drivers/gpu/drm/radeon/radeon_encoders.c if (rdev->is_atom_bios) rdev 327 drivers/gpu/drm/radeon/radeon_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 339 drivers/gpu/drm/radeon/radeon_encoders.c if (ASIC_IS_AVIVO(rdev)) { rdev 354 drivers/gpu/drm/radeon/radeon_encoders.c if (ASIC_IS_AVIVO(rdev)) { rdev 373 drivers/gpu/drm/radeon/radeon_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 391 drivers/gpu/drm/radeon/radeon_encoders.c if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { rdev 416 drivers/gpu/drm/radeon/radeon_encoders.c if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { rdev 48 drivers/gpu/drm/radeon/radeon_fb.c struct radeon_device *rdev; rdev 55 drivers/gpu/drm/radeon/radeon_fb.c struct radeon_device *rdev = rfbdev->rdev; rdev 56 drivers/gpu/drm/radeon/radeon_fb.c int ret = pm_runtime_get_sync(rdev->ddev->dev); rdev 58 drivers/gpu/drm/radeon/radeon_fb.c pm_runtime_mark_last_busy(rdev->ddev->dev); rdev 59 drivers/gpu/drm/radeon/radeon_fb.c pm_runtime_put_autosuspend(rdev->ddev->dev); rdev 69 drivers/gpu/drm/radeon/radeon_fb.c struct radeon_device *rdev = rfbdev->rdev; rdev 71 drivers/gpu/drm/radeon/radeon_fb.c pm_runtime_mark_last_busy(rdev->ddev->dev); rdev 72 drivers/gpu/drm/radeon/radeon_fb.c pm_runtime_put_autosuspend(rdev->ddev->dev); rdev 87 drivers/gpu/drm/radeon/radeon_fb.c int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled) rdev 90 drivers/gpu/drm/radeon/radeon_fb.c int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; rdev 130 drivers/gpu/drm/radeon/radeon_fb.c struct radeon_device *rdev = rfbdev->rdev; rdev 140 drivers/gpu/drm/radeon/radeon_fb.c info = drm_get_format_info(rdev->ddev, mode_cmd); rdev 144 drivers/gpu/drm/radeon/radeon_fb.c mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp, rdev 147 drivers/gpu/drm/radeon/radeon_fb.c if (rdev->family >= CHIP_R600) rdev 151 drivers/gpu/drm/radeon/radeon_fb.c ret = radeon_gem_object_create(rdev, aligned_size, 0, rdev 180 drivers/gpu/drm/radeon/radeon_fb.c dev_err(rdev->dev, "FB failed to set tiling flags\n"); rdev 189 drivers/gpu/drm/radeon/radeon_fb.c ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, rdev 216 drivers/gpu/drm/radeon/radeon_fb.c struct radeon_device *rdev = rfbdev->rdev; rdev 229 drivers/gpu/drm/radeon/radeon_fb.c if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) rdev 253 drivers/gpu/drm/radeon/radeon_fb.c ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj); rdev 268 drivers/gpu/drm/radeon/radeon_fb.c tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; rdev 269 drivers/gpu/drm/radeon/radeon_fb.c info->fix.smem_start = rdev->mc.aper_base + tmp; rdev 277 drivers/gpu/drm/radeon/radeon_fb.c info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base; rdev 278 drivers/gpu/drm/radeon/radeon_fb.c info->apertures->ranges[0].size = rdev->mc.aper_size; rdev 288 drivers/gpu/drm/radeon/radeon_fb.c DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); rdev 293 drivers/gpu/drm/radeon/radeon_fb.c vga_switcheroo_client_fb_set(rdev->ddev->pdev, info); rdev 330 drivers/gpu/drm/radeon/radeon_fb.c int radeon_fbdev_init(struct radeon_device *rdev) rdev 337 drivers/gpu/drm/radeon/radeon_fb.c if (list_empty(&rdev->ddev->mode_config.connector_list)) rdev 341 drivers/gpu/drm/radeon/radeon_fb.c if (rdev->mc.real_vram_size <= (8*1024*1024)) rdev 343 drivers/gpu/drm/radeon/radeon_fb.c else if (ASIC_IS_RN50(rdev) || rdev 344 drivers/gpu/drm/radeon/radeon_fb.c rdev->mc.real_vram_size <= (32*1024*1024)) rdev 351 drivers/gpu/drm/radeon/radeon_fb.c rfbdev->rdev = rdev; rdev 352 drivers/gpu/drm/radeon/radeon_fb.c rdev->mode_info.rfbdev = rfbdev; rdev 354 drivers/gpu/drm/radeon/radeon_fb.c drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper, rdev 357 drivers/gpu/drm/radeon/radeon_fb.c ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper, rdev 367 drivers/gpu/drm/radeon/radeon_fb.c drm_helper_disable_unused_functions(rdev->ddev); rdev 382 drivers/gpu/drm/radeon/radeon_fb.c void radeon_fbdev_fini(struct radeon_device *rdev) rdev 384 drivers/gpu/drm/radeon/radeon_fb.c if (!rdev->mode_info.rfbdev) rdev 387 drivers/gpu/drm/radeon/radeon_fb.c radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev); rdev 388 drivers/gpu/drm/radeon/radeon_fb.c kfree(rdev->mode_info.rfbdev); rdev 389 drivers/gpu/drm/radeon/radeon_fb.c rdev->mode_info.rfbdev = NULL; rdev 392 drivers/gpu/drm/radeon/radeon_fb.c void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) rdev 394 drivers/gpu/drm/radeon/radeon_fb.c if (rdev->mode_info.rfbdev) rdev 395 drivers/gpu/drm/radeon/radeon_fb.c drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state); rdev 398 drivers/gpu/drm/radeon/radeon_fb.c bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj) rdev 400 drivers/gpu/drm/radeon/radeon_fb.c if (!rdev->mode_info.rfbdev) rdev 403 drivers/gpu/drm/radeon/radeon_fb.c if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->fb.obj[0])) rdev 408 drivers/gpu/drm/radeon/radeon_fb.c void radeon_fb_add_connector(struct radeon_device *rdev, struct drm_connector *connector) rdev 410 drivers/gpu/drm/radeon/radeon_fb.c if (rdev->mode_info.rfbdev) rdev 411 drivers/gpu/drm/radeon/radeon_fb.c drm_fb_helper_add_one_connector(&rdev->mode_info.rfbdev->helper, connector); rdev 414 drivers/gpu/drm/radeon/radeon_fb.c void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector *connector) rdev 416 drivers/gpu/drm/radeon/radeon_fb.c if (rdev->mode_info.rfbdev) rdev 417 drivers/gpu/drm/radeon/radeon_fb.c drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector); rdev 68 drivers/gpu/drm/radeon/radeon_fence.c static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) rdev 70 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; rdev 71 drivers/gpu/drm/radeon/radeon_fence.c if (likely(rdev->wb.enabled || !drv->scratch_reg)) { rdev 89 drivers/gpu/drm/radeon/radeon_fence.c static u32 radeon_fence_read(struct radeon_device *rdev, int ring) rdev 91 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; rdev 94 drivers/gpu/drm/radeon/radeon_fence.c if (likely(rdev->wb.enabled || !drv->scratch_reg)) { rdev 114 drivers/gpu/drm/radeon/radeon_fence.c static void radeon_fence_schedule_check(struct radeon_device *rdev, int ring) rdev 121 drivers/gpu/drm/radeon/radeon_fence.c &rdev->fence_drv[ring].lockup_work, rdev 135 drivers/gpu/drm/radeon/radeon_fence.c int radeon_fence_emit(struct radeon_device *rdev, rdev 146 drivers/gpu/drm/radeon/radeon_fence.c (*fence)->rdev = rdev; rdev 147 drivers/gpu/drm/radeon/radeon_fence.c (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; rdev 151 drivers/gpu/drm/radeon/radeon_fence.c &rdev->fence_queue.lock, rdev 152 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_context + ring, rdev 154 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_ring_emit(rdev, ring, *fence); rdev 155 drivers/gpu/drm/radeon/radeon_fence.c trace_radeon_fence_emit(rdev->ddev, ring, (*fence)->seq); rdev 156 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_schedule_check(rdev, ring); rdev 178 drivers/gpu/drm/radeon/radeon_fence.c seq = atomic64_read(&fence->rdev->fence_drv[fence->ring].last_seq); rdev 187 drivers/gpu/drm/radeon/radeon_fence.c radeon_irq_kms_sw_irq_put(fence->rdev, fence->ring); rdev 188 drivers/gpu/drm/radeon/radeon_fence.c __remove_wait_queue(&fence->rdev->fence_queue, &fence->fence_wake); rdev 205 drivers/gpu/drm/radeon/radeon_fence.c static bool radeon_fence_activity(struct radeon_device *rdev, int ring) rdev 232 drivers/gpu/drm/radeon/radeon_fence.c last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq); rdev 234 drivers/gpu/drm/radeon/radeon_fence.c last_emitted = rdev->fence_drv[ring].sync_seq[ring]; rdev 235 drivers/gpu/drm/radeon/radeon_fence.c seq = radeon_fence_read(rdev, ring); rdev 259 drivers/gpu/drm/radeon/radeon_fence.c } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq); rdev 262 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_schedule_check(rdev, ring); rdev 278 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_device *rdev; rdev 283 drivers/gpu/drm/radeon/radeon_fence.c rdev = fence_drv->rdev; rdev 284 drivers/gpu/drm/radeon/radeon_fence.c ring = fence_drv - &rdev->fence_drv[0]; rdev 286 drivers/gpu/drm/radeon/radeon_fence.c if (!down_read_trylock(&rdev->exclusive_lock)) { rdev 288 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_schedule_check(rdev, ring); rdev 292 drivers/gpu/drm/radeon/radeon_fence.c if (fence_drv->delayed_irq && rdev->ddev->irq_enabled) { rdev 296 drivers/gpu/drm/radeon/radeon_fence.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 297 drivers/gpu/drm/radeon/radeon_fence.c radeon_irq_set(rdev); rdev 298 drivers/gpu/drm/radeon/radeon_fence.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 301 drivers/gpu/drm/radeon/radeon_fence.c if (radeon_fence_activity(rdev, ring)) rdev 302 drivers/gpu/drm/radeon/radeon_fence.c wake_up_all(&rdev->fence_queue); rdev 304 drivers/gpu/drm/radeon/radeon_fence.c else if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) { rdev 307 drivers/gpu/drm/radeon/radeon_fence.c dev_warn(rdev->dev, "GPU lockup (current fence id " rdev 313 drivers/gpu/drm/radeon/radeon_fence.c rdev->needs_reset = true; rdev 314 drivers/gpu/drm/radeon/radeon_fence.c wake_up_all(&rdev->fence_queue); rdev 316 drivers/gpu/drm/radeon/radeon_fence.c up_read(&rdev->exclusive_lock); rdev 328 drivers/gpu/drm/radeon/radeon_fence.c void radeon_fence_process(struct radeon_device *rdev, int ring) rdev 330 drivers/gpu/drm/radeon/radeon_fence.c if (radeon_fence_activity(rdev, ring)) rdev 331 drivers/gpu/drm/radeon/radeon_fence.c wake_up_all(&rdev->fence_queue); rdev 348 drivers/gpu/drm/radeon/radeon_fence.c static bool radeon_fence_seq_signaled(struct radeon_device *rdev, rdev 351 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { rdev 355 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_process(rdev, ring); rdev 356 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { rdev 365 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_device *rdev = fence->rdev; rdev 369 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { rdev 373 drivers/gpu/drm/radeon/radeon_fence.c if (down_read_trylock(&rdev->exclusive_lock)) { rdev 374 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_process(rdev, ring); rdev 375 drivers/gpu/drm/radeon/radeon_fence.c up_read(&rdev->exclusive_lock); rdev 377 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { rdev 395 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_device *rdev = fence->rdev; rdev 397 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq) rdev 400 drivers/gpu/drm/radeon/radeon_fence.c if (down_read_trylock(&rdev->exclusive_lock)) { rdev 401 drivers/gpu/drm/radeon/radeon_fence.c radeon_irq_kms_sw_irq_get(rdev, fence->ring); rdev 403 drivers/gpu/drm/radeon/radeon_fence.c if (radeon_fence_activity(rdev, fence->ring)) rdev 404 drivers/gpu/drm/radeon/radeon_fence.c wake_up_all_locked(&rdev->fence_queue); rdev 407 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq) { rdev 408 drivers/gpu/drm/radeon/radeon_fence.c radeon_irq_kms_sw_irq_put(rdev, fence->ring); rdev 409 drivers/gpu/drm/radeon/radeon_fence.c up_read(&rdev->exclusive_lock); rdev 413 drivers/gpu/drm/radeon/radeon_fence.c up_read(&rdev->exclusive_lock); rdev 416 drivers/gpu/drm/radeon/radeon_fence.c if (radeon_irq_kms_sw_irq_get_delayed(rdev, fence->ring)) rdev 417 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[fence->ring].delayed_irq = true; rdev 418 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_schedule_check(rdev, fence->ring); rdev 424 drivers/gpu/drm/radeon/radeon_fence.c __add_wait_queue(&rdev->fence_queue, &fence->fence_wake); rdev 444 drivers/gpu/drm/radeon/radeon_fence.c if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) { rdev 466 drivers/gpu/drm/radeon/radeon_fence.c static bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq) rdev 471 drivers/gpu/drm/radeon/radeon_fence.c if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) rdev 494 drivers/gpu/drm/radeon/radeon_fence.c static long radeon_fence_wait_seq_timeout(struct radeon_device *rdev, rdev 501 drivers/gpu/drm/radeon/radeon_fence.c if (radeon_fence_any_seq_signaled(rdev, target_seq)) rdev 509 drivers/gpu/drm/radeon/radeon_fence.c trace_radeon_fence_wait_begin(rdev->ddev, i, target_seq[i]); rdev 510 drivers/gpu/drm/radeon/radeon_fence.c radeon_irq_kms_sw_irq_get(rdev, i); rdev 514 drivers/gpu/drm/radeon/radeon_fence.c r = wait_event_interruptible_timeout(rdev->fence_queue, ( rdev 515 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_any_seq_signaled(rdev, target_seq) rdev 516 drivers/gpu/drm/radeon/radeon_fence.c || rdev->needs_reset), timeout); rdev 518 drivers/gpu/drm/radeon/radeon_fence.c r = wait_event_timeout(rdev->fence_queue, ( rdev 519 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_any_seq_signaled(rdev, target_seq) rdev 520 drivers/gpu/drm/radeon/radeon_fence.c || rdev->needs_reset), timeout); rdev 523 drivers/gpu/drm/radeon/radeon_fence.c if (rdev->needs_reset) rdev 530 drivers/gpu/drm/radeon/radeon_fence.c radeon_irq_kms_sw_irq_put(rdev, i); rdev 531 drivers/gpu/drm/radeon/radeon_fence.c trace_radeon_fence_wait_end(rdev->ddev, i, target_seq[i]); rdev 566 drivers/gpu/drm/radeon/radeon_fence.c r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, timeout); rdev 611 drivers/gpu/drm/radeon/radeon_fence.c int radeon_fence_wait_any(struct radeon_device *rdev, rdev 634 drivers/gpu/drm/radeon/radeon_fence.c r = radeon_fence_wait_seq_timeout(rdev, seq, intr, MAX_SCHEDULE_TIMEOUT); rdev 651 drivers/gpu/drm/radeon/radeon_fence.c int radeon_fence_wait_next(struct radeon_device *rdev, int ring) rdev 656 drivers/gpu/drm/radeon/radeon_fence.c seq[ring] = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL; rdev 657 drivers/gpu/drm/radeon/radeon_fence.c if (seq[ring] >= rdev->fence_drv[ring].sync_seq[ring]) { rdev 662 drivers/gpu/drm/radeon/radeon_fence.c r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT); rdev 678 drivers/gpu/drm/radeon/radeon_fence.c int radeon_fence_wait_empty(struct radeon_device *rdev, int ring) rdev 683 drivers/gpu/drm/radeon/radeon_fence.c seq[ring] = rdev->fence_drv[ring].sync_seq[ring]; rdev 687 drivers/gpu/drm/radeon/radeon_fence.c r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT); rdev 692 drivers/gpu/drm/radeon/radeon_fence.c dev_err(rdev->dev, "error waiting for ring[%d] to become idle (%ld)\n", rdev 739 drivers/gpu/drm/radeon/radeon_fence.c unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring) rdev 746 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_process(rdev, ring); rdev 747 drivers/gpu/drm/radeon/radeon_fence.c emitted = rdev->fence_drv[ring].sync_seq[ring] rdev 748 drivers/gpu/drm/radeon/radeon_fence.c - atomic64_read(&rdev->fence_drv[ring].last_seq); rdev 780 drivers/gpu/drm/radeon/radeon_fence.c fdrv = &fence->rdev->fence_drv[dst_ring]; rdev 811 drivers/gpu/drm/radeon/radeon_fence.c src = &fence->rdev->fence_drv[fence->ring]; rdev 812 drivers/gpu/drm/radeon/radeon_fence.c dst = &fence->rdev->fence_drv[dst_ring]; rdev 833 drivers/gpu/drm/radeon/radeon_fence.c int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring) rdev 838 drivers/gpu/drm/radeon/radeon_fence.c radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg); rdev 839 drivers/gpu/drm/radeon/radeon_fence.c if (rdev->wb.use_event || !radeon_ring_supports_scratch_reg(rdev, &rdev->ring[ring])) { rdev 840 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].scratch_reg = 0; rdev 843 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; rdev 844 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + rdev 849 drivers/gpu/drm/radeon/radeon_fence.c index = ALIGN(rdev->uvd_fw->size, 8); rdev 850 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + index; rdev 851 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + index; rdev 855 drivers/gpu/drm/radeon/radeon_fence.c r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg); rdev 857 drivers/gpu/drm/radeon/radeon_fence.c dev_err(rdev->dev, "fence failed to get scratch register\n"); rdev 861 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].scratch_reg - rdev 862 drivers/gpu/drm/radeon/radeon_fence.c rdev->scratch.reg_base; rdev 863 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; rdev 864 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index; rdev 866 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring); rdev 867 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].initialized = true; rdev 868 drivers/gpu/drm/radeon/radeon_fence.c dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n", rdev 869 drivers/gpu/drm/radeon/radeon_fence.c ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr); rdev 883 drivers/gpu/drm/radeon/radeon_fence.c static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring) rdev 887 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].scratch_reg = -1; rdev 888 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = NULL; rdev 889 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = 0; rdev 891 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].sync_seq[i] = 0; rdev 892 drivers/gpu/drm/radeon/radeon_fence.c atomic64_set(&rdev->fence_drv[ring].last_seq, 0); rdev 893 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].initialized = false; rdev 894 drivers/gpu/drm/radeon/radeon_fence.c INIT_DELAYED_WORK(&rdev->fence_drv[ring].lockup_work, rdev 896 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].rdev = rdev; rdev 911 drivers/gpu/drm/radeon/radeon_fence.c int radeon_fence_driver_init(struct radeon_device *rdev) rdev 915 drivers/gpu/drm/radeon/radeon_fence.c init_waitqueue_head(&rdev->fence_queue); rdev 917 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_driver_init_ring(rdev, ring); rdev 919 drivers/gpu/drm/radeon/radeon_fence.c if (radeon_debugfs_fence_init(rdev)) { rdev 920 drivers/gpu/drm/radeon/radeon_fence.c dev_err(rdev->dev, "fence debugfs file creation failed\n"); rdev 933 drivers/gpu/drm/radeon/radeon_fence.c void radeon_fence_driver_fini(struct radeon_device *rdev) rdev 937 drivers/gpu/drm/radeon/radeon_fence.c mutex_lock(&rdev->ring_lock); rdev 939 drivers/gpu/drm/radeon/radeon_fence.c if (!rdev->fence_drv[ring].initialized) rdev 941 drivers/gpu/drm/radeon/radeon_fence.c r = radeon_fence_wait_empty(rdev, ring); rdev 944 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_driver_force_completion(rdev, ring); rdev 946 drivers/gpu/drm/radeon/radeon_fence.c cancel_delayed_work_sync(&rdev->fence_drv[ring].lockup_work); rdev 947 drivers/gpu/drm/radeon/radeon_fence.c wake_up_all(&rdev->fence_queue); rdev 948 drivers/gpu/drm/radeon/radeon_fence.c radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg); rdev 949 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].initialized = false; rdev 951 drivers/gpu/drm/radeon/radeon_fence.c mutex_unlock(&rdev->ring_lock); rdev 963 drivers/gpu/drm/radeon/radeon_fence.c void radeon_fence_driver_force_completion(struct radeon_device *rdev, int ring) rdev 965 drivers/gpu/drm/radeon/radeon_fence.c if (rdev->fence_drv[ring].initialized) { rdev 966 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_write(rdev, rdev->fence_drv[ring].sync_seq[ring], ring); rdev 967 drivers/gpu/drm/radeon/radeon_fence.c cancel_delayed_work_sync(&rdev->fence_drv[ring].lockup_work); rdev 980 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_device *rdev = dev->dev_private; rdev 984 drivers/gpu/drm/radeon/radeon_fence.c if (!rdev->fence_drv[i].initialized) rdev 987 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_process(rdev, i); rdev 991 drivers/gpu/drm/radeon/radeon_fence.c (unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq)); rdev 993 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[i].sync_seq[i]); rdev 996 drivers/gpu/drm/radeon/radeon_fence.c if (i != j && rdev->fence_drv[j].initialized) rdev 998 drivers/gpu/drm/radeon/radeon_fence.c j, rdev->fence_drv[i].sync_seq[j]); rdev 1013 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_device *rdev = dev->dev_private; rdev 1015 drivers/gpu/drm/radeon/radeon_fence.c down_read(&rdev->exclusive_lock); rdev 1016 drivers/gpu/drm/radeon/radeon_fence.c seq_printf(m, "%d\n", rdev->needs_reset); rdev 1017 drivers/gpu/drm/radeon/radeon_fence.c rdev->needs_reset = true; rdev 1018 drivers/gpu/drm/radeon/radeon_fence.c wake_up_all(&rdev->fence_queue); rdev 1019 drivers/gpu/drm/radeon/radeon_fence.c up_read(&rdev->exclusive_lock); rdev 1030 drivers/gpu/drm/radeon/radeon_fence.c int radeon_debugfs_fence_init(struct radeon_device *rdev) rdev 1033 drivers/gpu/drm/radeon/radeon_fence.c return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 2); rdev 1083 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_device *rdev = fence->rdev; rdev 1104 drivers/gpu/drm/radeon/radeon_fence.c if (rdev->needs_reset) { rdev 71 drivers/gpu/drm/radeon/radeon_gart.c int radeon_gart_table_ram_alloc(struct radeon_device *rdev) rdev 75 drivers/gpu/drm/radeon/radeon_gart.c ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size, rdev 76 drivers/gpu/drm/radeon/radeon_gart.c &rdev->gart.table_addr); rdev 81 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || rdev 82 drivers/gpu/drm/radeon/radeon_gart.c rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { rdev 84 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.table_size >> PAGE_SHIFT); rdev 87 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.ptr = ptr; rdev 88 drivers/gpu/drm/radeon/radeon_gart.c memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size); rdev 101 drivers/gpu/drm/radeon/radeon_gart.c void radeon_gart_table_ram_free(struct radeon_device *rdev) rdev 103 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.ptr == NULL) { rdev 107 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || rdev 108 drivers/gpu/drm/radeon/radeon_gart.c rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { rdev 109 drivers/gpu/drm/radeon/radeon_gart.c set_memory_wb((unsigned long)rdev->gart.ptr, rdev 110 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.table_size >> PAGE_SHIFT); rdev 113 drivers/gpu/drm/radeon/radeon_gart.c pci_free_consistent(rdev->pdev, rdev->gart.table_size, rdev 114 drivers/gpu/drm/radeon/radeon_gart.c (void *)rdev->gart.ptr, rdev 115 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.table_addr); rdev 116 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.ptr = NULL; rdev 117 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.table_addr = 0; rdev 130 drivers/gpu/drm/radeon/radeon_gart.c int radeon_gart_table_vram_alloc(struct radeon_device *rdev) rdev 134 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.robj == NULL) { rdev 135 drivers/gpu/drm/radeon/radeon_gart.c r = radeon_bo_create(rdev, rdev->gart.table_size, rdev 137 drivers/gpu/drm/radeon/radeon_gart.c 0, NULL, NULL, &rdev->gart.robj); rdev 155 drivers/gpu/drm/radeon/radeon_gart.c int radeon_gart_table_vram_pin(struct radeon_device *rdev) rdev 160 drivers/gpu/drm/radeon/radeon_gart.c r = radeon_bo_reserve(rdev->gart.robj, false); rdev 163 drivers/gpu/drm/radeon/radeon_gart.c r = radeon_bo_pin(rdev->gart.robj, rdev 166 drivers/gpu/drm/radeon/radeon_gart.c radeon_bo_unreserve(rdev->gart.robj); rdev 169 drivers/gpu/drm/radeon/radeon_gart.c r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr); rdev 171 drivers/gpu/drm/radeon/radeon_gart.c radeon_bo_unpin(rdev->gart.robj); rdev 172 drivers/gpu/drm/radeon/radeon_gart.c radeon_bo_unreserve(rdev->gart.robj); rdev 173 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.table_addr = gpu_addr; rdev 181 drivers/gpu/drm/radeon/radeon_gart.c for (i = 0; i < rdev->gart.num_gpu_pages; i++) rdev 182 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_set_page(rdev, i, rdev->gart.pages_entry[i]); rdev 184 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_tlb_flush(rdev); rdev 198 drivers/gpu/drm/radeon/radeon_gart.c void radeon_gart_table_vram_unpin(struct radeon_device *rdev) rdev 202 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.robj == NULL) { rdev 205 drivers/gpu/drm/radeon/radeon_gart.c r = radeon_bo_reserve(rdev->gart.robj, false); rdev 207 drivers/gpu/drm/radeon/radeon_gart.c radeon_bo_kunmap(rdev->gart.robj); rdev 208 drivers/gpu/drm/radeon/radeon_gart.c radeon_bo_unpin(rdev->gart.robj); rdev 209 drivers/gpu/drm/radeon/radeon_gart.c radeon_bo_unreserve(rdev->gart.robj); rdev 210 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.ptr = NULL; rdev 223 drivers/gpu/drm/radeon/radeon_gart.c void radeon_gart_table_vram_free(struct radeon_device *rdev) rdev 225 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.robj == NULL) { rdev 228 drivers/gpu/drm/radeon/radeon_gart.c radeon_bo_unref(&rdev->gart.robj); rdev 244 drivers/gpu/drm/radeon/radeon_gart.c void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset, rdev 251 drivers/gpu/drm/radeon/radeon_gart.c if (!rdev->gart.ready) { rdev 258 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.pages[p]) { rdev 259 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages[p] = NULL; rdev 261 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages_entry[t] = rdev->dummy_page.entry; rdev 262 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.ptr) { rdev 263 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_set_page(rdev, t, rdev 264 drivers/gpu/drm/radeon/radeon_gart.c rdev->dummy_page.entry); rdev 269 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.ptr) { rdev 271 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_tlb_flush(rdev); rdev 289 drivers/gpu/drm/radeon/radeon_gart.c int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, rdev 298 drivers/gpu/drm/radeon/radeon_gart.c if (!rdev->gart.ready) { rdev 306 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages[p] = pagelist[i]; rdev 310 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages_entry[t] = page_entry; rdev 311 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.ptr) { rdev 312 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_set_page(rdev, t, page_entry); rdev 317 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.ptr) { rdev 319 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_tlb_flush(rdev); rdev 332 drivers/gpu/drm/radeon/radeon_gart.c int radeon_gart_init(struct radeon_device *rdev) rdev 336 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.pages) { rdev 344 drivers/gpu/drm/radeon/radeon_gart.c r = radeon_dummy_page_init(rdev); rdev 348 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; rdev 349 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE; rdev 351 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); rdev 353 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages = vzalloc(array_size(sizeof(void *), rdev 354 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.num_cpu_pages)); rdev 355 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.pages == NULL) { rdev 356 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_fini(rdev); rdev 359 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages_entry = vmalloc(array_size(sizeof(uint64_t), rdev 360 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.num_gpu_pages)); rdev 361 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.pages_entry == NULL) { rdev 362 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_fini(rdev); rdev 366 drivers/gpu/drm/radeon/radeon_gart.c for (i = 0; i < rdev->gart.num_gpu_pages; i++) rdev 367 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages_entry[i] = rdev->dummy_page.entry; rdev 378 drivers/gpu/drm/radeon/radeon_gart.c void radeon_gart_fini(struct radeon_device *rdev) rdev 380 drivers/gpu/drm/radeon/radeon_gart.c if (rdev->gart.ready) { rdev 382 drivers/gpu/drm/radeon/radeon_gart.c radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages); rdev 384 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.ready = false; rdev 385 drivers/gpu/drm/radeon/radeon_gart.c vfree(rdev->gart.pages); rdev 386 drivers/gpu/drm/radeon/radeon_gart.c vfree(rdev->gart.pages_entry); rdev 387 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages = NULL; rdev 388 drivers/gpu/drm/radeon/radeon_gart.c rdev->gart.pages_entry = NULL; rdev 390 drivers/gpu/drm/radeon/radeon_gart.c radeon_dummy_page_fini(rdev); rdev 47 drivers/gpu/drm/radeon/radeon_gem.c int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size, rdev 65 drivers/gpu/drm/radeon/radeon_gem.c max_size = rdev->mc.gtt_size - rdev->gart_pin_size; rdev 73 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, rdev 89 drivers/gpu/drm/radeon/radeon_gem.c mutex_lock(&rdev->gem.mutex); rdev 90 drivers/gpu/drm/radeon/radeon_gem.c list_add_tail(&robj->list, &rdev->gem.objects); rdev 91 drivers/gpu/drm/radeon/radeon_gem.c mutex_unlock(&rdev->gem.mutex); rdev 133 drivers/gpu/drm/radeon/radeon_gem.c int radeon_gem_init(struct radeon_device *rdev) rdev 135 drivers/gpu/drm/radeon/radeon_gem.c INIT_LIST_HEAD(&rdev->gem.objects); rdev 139 drivers/gpu/drm/radeon/radeon_gem.c void radeon_gem_fini(struct radeon_device *rdev) rdev 141 drivers/gpu/drm/radeon/radeon_gem.c radeon_bo_force_delete(rdev); rdev 151 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = rbo->rdev; rdev 157 drivers/gpu/drm/radeon/radeon_gem.c if ((rdev->family < CHIP_CAYMAN) || rdev 158 drivers/gpu/drm/radeon/radeon_gem.c (!rdev->accel_working)) { rdev 169 drivers/gpu/drm/radeon/radeon_gem.c bo_va = radeon_vm_bo_add(rdev, vm, rbo); rdev 182 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = rbo->rdev; rdev 188 drivers/gpu/drm/radeon/radeon_gem.c if ((rdev->family < CHIP_CAYMAN) || rdev 189 drivers/gpu/drm/radeon/radeon_gem.c (!rdev->accel_working)) { rdev 195 drivers/gpu/drm/radeon/radeon_gem.c dev_err(rdev->dev, "leaking bo va because " rdev 202 drivers/gpu/drm/radeon/radeon_gem.c radeon_vm_bo_rmv(rdev, bo_va); rdev 208 drivers/gpu/drm/radeon/radeon_gem.c static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r) rdev 211 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gpu_reset(rdev); rdev 224 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 228 drivers/gpu/drm/radeon/radeon_gem.c man = &rdev->mman.bdev.man[TTM_PL_VRAM]; rdev 231 drivers/gpu/drm/radeon/radeon_gem.c args->vram_visible = rdev->mc.visible_vram_size; rdev 232 drivers/gpu/drm/radeon/radeon_gem.c args->vram_visible -= rdev->vram_pin_size; rdev 233 drivers/gpu/drm/radeon/radeon_gem.c args->gart_size = rdev->mc.gtt_size; rdev 234 drivers/gpu/drm/radeon/radeon_gem.c args->gart_size -= rdev->gart_pin_size; rdev 258 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 264 drivers/gpu/drm/radeon/radeon_gem.c down_read(&rdev->exclusive_lock); rdev 267 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_object_create(rdev, args->size, args->alignment, rdev 271 drivers/gpu/drm/radeon/radeon_gem.c up_read(&rdev->exclusive_lock); rdev 272 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_handle_lockup(rdev, r); rdev 279 drivers/gpu/drm/radeon/radeon_gem.c up_read(&rdev->exclusive_lock); rdev 280 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_handle_lockup(rdev, r); rdev 284 drivers/gpu/drm/radeon/radeon_gem.c up_read(&rdev->exclusive_lock); rdev 292 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 312 drivers/gpu/drm/radeon/radeon_gem.c if (rdev->family < CHIP_R600) rdev 323 drivers/gpu/drm/radeon/radeon_gem.c down_read(&rdev->exclusive_lock); rdev 326 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_object_create(rdev, args->size, 0, rdev 366 drivers/gpu/drm/radeon/radeon_gem.c up_read(&rdev->exclusive_lock); rdev 373 drivers/gpu/drm/radeon/radeon_gem.c up_read(&rdev->exclusive_lock); rdev 374 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_handle_lockup(rdev, r); rdev 384 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 392 drivers/gpu/drm/radeon/radeon_gem.c down_read(&rdev->exclusive_lock); rdev 397 drivers/gpu/drm/radeon/radeon_gem.c up_read(&rdev->exclusive_lock); rdev 405 drivers/gpu/drm/radeon/radeon_gem.c up_read(&rdev->exclusive_lock); rdev 406 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_handle_lockup(robj->rdev, r); rdev 469 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 491 drivers/gpu/drm/radeon/radeon_gem.c if (rdev->asic->mmio_hdp_flush && rdev 493 drivers/gpu/drm/radeon/radeon_gem.c robj->rdev->asic->mmio_hdp_flush(rdev); rdev 495 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_handle_lockup(rdev, r); rdev 549 drivers/gpu/drm/radeon/radeon_gem.c static void radeon_gem_va_update_vm(struct radeon_device *rdev, rdev 565 drivers/gpu/drm/radeon/radeon_gem.c vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list); rdev 582 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_vm_clear_freed(rdev, bo_va->vm); rdev 587 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_vm_bo_update(rdev, bo_va, &bo_va->bo->tbo.mem); rdev 607 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 614 drivers/gpu/drm/radeon/radeon_gem.c if (!rdev->vm_manager.enabled) { rdev 689 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags); rdev 692 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0); rdev 698 drivers/gpu/drm/radeon/radeon_gem.c radeon_gem_va_update_vm(rdev, bo_va); rdev 753 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 758 drivers/gpu/drm/radeon/radeon_gem.c args->pitch = radeon_align_pitch(rdev, args->width, rdev 763 drivers/gpu/drm/radeon/radeon_gem.c r = radeon_gem_object_create(rdev, args->size, 0, rdev 784 drivers/gpu/drm/radeon/radeon_gem.c struct radeon_device *rdev = dev->dev_private; rdev 788 drivers/gpu/drm/radeon/radeon_gem.c mutex_lock(&rdev->gem.mutex); rdev 789 drivers/gpu/drm/radeon/radeon_gem.c list_for_each_entry(rbo, &rdev->gem.objects, list) { rdev 811 drivers/gpu/drm/radeon/radeon_gem.c mutex_unlock(&rdev->gem.mutex); rdev 820 drivers/gpu/drm/radeon/radeon_gem.c int radeon_gem_debugfs_init(struct radeon_device *rdev) rdev 823 drivers/gpu/drm/radeon/radeon_gem.c return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1); rdev 96 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 107 drivers/gpu/drm/radeon/radeon_i2c.c if ((rdev->family >= CHIP_R200) && !ASIC_IS_AVIVO(rdev)) { rdev 110 drivers/gpu/drm/radeon/radeon_i2c.c if (rdev->family >= CHIP_RV350) rdev 112 drivers/gpu/drm/radeon/radeon_i2c.c else if ((rdev->family == CHIP_R300) || rdev 113 drivers/gpu/drm/radeon/radeon_i2c.c (rdev->family == CHIP_R350)) rdev 118 drivers/gpu/drm/radeon/radeon_i2c.c mutex_lock(&rdev->dc_hw_i2c_mutex); rdev 126 drivers/gpu/drm/radeon/radeon_i2c.c mutex_unlock(&rdev->dc_hw_i2c_mutex); rdev 131 drivers/gpu/drm/radeon/radeon_i2c.c if (ASIC_IS_DCE3(rdev) && rec->hw_capable) { rdev 166 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 185 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 200 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 214 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 227 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 239 drivers/gpu/drm/radeon/radeon_i2c.c static u32 radeon_get_i2c_prescale(struct radeon_device *rdev) rdev 241 drivers/gpu/drm/radeon/radeon_i2c.c u32 sclk = rdev->pm.current_sclk; rdev 247 drivers/gpu/drm/radeon/radeon_i2c.c switch (rdev->family) { rdev 290 drivers/gpu/drm/radeon/radeon_i2c.c if (rdev->family == CHIP_R520) rdev 333 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 341 drivers/gpu/drm/radeon/radeon_i2c.c mutex_lock(&rdev->dc_hw_i2c_mutex); rdev 343 drivers/gpu/drm/radeon/radeon_i2c.c mutex_lock(&rdev->pm.mutex); rdev 345 drivers/gpu/drm/radeon/radeon_i2c.c prescale = radeon_get_i2c_prescale(rdev); rdev 353 drivers/gpu/drm/radeon/radeon_i2c.c if (rdev->is_atom_bios) { rdev 367 drivers/gpu/drm/radeon/radeon_i2c.c switch (rdev->family) { rdev 567 drivers/gpu/drm/radeon/radeon_i2c.c if (rdev->is_atom_bios) { rdev 573 drivers/gpu/drm/radeon/radeon_i2c.c mutex_unlock(&rdev->pm.mutex); rdev 574 drivers/gpu/drm/radeon/radeon_i2c.c mutex_unlock(&rdev->dc_hw_i2c_mutex); rdev 586 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 594 drivers/gpu/drm/radeon/radeon_i2c.c mutex_lock(&rdev->dc_hw_i2c_mutex); rdev 596 drivers/gpu/drm/radeon/radeon_i2c.c mutex_lock(&rdev->pm.mutex); rdev 598 drivers/gpu/drm/radeon/radeon_i2c.c prescale = radeon_get_i2c_prescale(rdev); rdev 809 drivers/gpu/drm/radeon/radeon_i2c.c mutex_unlock(&rdev->pm.mutex); rdev 810 drivers/gpu/drm/radeon/radeon_i2c.c mutex_unlock(&rdev->dc_hw_i2c_mutex); rdev 819 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = i2c->dev->dev_private; rdev 825 drivers/gpu/drm/radeon/radeon_i2c.c switch (rdev->family) { rdev 915 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_device *rdev = dev->dev_private; rdev 937 drivers/gpu/drm/radeon/radeon_i2c.c ((rdev->family <= CHIP_RS480) || rdev 938 drivers/gpu/drm/radeon/radeon_i2c.c ((rdev->family >= CHIP_RV515) && (rdev->family <= CHIP_R580))))) { rdev 948 drivers/gpu/drm/radeon/radeon_i2c.c ASIC_IS_DCE3(rdev)) { rdev 994 drivers/gpu/drm/radeon/radeon_i2c.c void radeon_i2c_init(struct radeon_device *rdev) rdev 999 drivers/gpu/drm/radeon/radeon_i2c.c if (rdev->is_atom_bios) rdev 1000 drivers/gpu/drm/radeon/radeon_i2c.c radeon_atombios_i2c_init(rdev); rdev 1002 drivers/gpu/drm/radeon/radeon_i2c.c radeon_combios_i2c_init(rdev); rdev 1006 drivers/gpu/drm/radeon/radeon_i2c.c void radeon_i2c_fini(struct radeon_device *rdev) rdev 1011 drivers/gpu/drm/radeon/radeon_i2c.c if (rdev->i2c_bus[i]) { rdev 1012 drivers/gpu/drm/radeon/radeon_i2c.c radeon_i2c_destroy(rdev->i2c_bus[i]); rdev 1013 drivers/gpu/drm/radeon/radeon_i2c.c rdev->i2c_bus[i] = NULL; rdev 1019 drivers/gpu/drm/radeon/radeon_i2c.c void radeon_i2c_add(struct radeon_device *rdev, rdev 1023 drivers/gpu/drm/radeon/radeon_i2c.c struct drm_device *dev = rdev->ddev; rdev 1027 drivers/gpu/drm/radeon/radeon_i2c.c if (!rdev->i2c_bus[i]) { rdev 1028 drivers/gpu/drm/radeon/radeon_i2c.c rdev->i2c_bus[i] = radeon_i2c_create(dev, rec, name); rdev 1035 drivers/gpu/drm/radeon/radeon_i2c.c struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, rdev 1041 drivers/gpu/drm/radeon/radeon_i2c.c if (rdev->i2c_bus[i] && rdev 1042 drivers/gpu/drm/radeon/radeon_i2c.c (rdev->i2c_bus[i]->rec.i2c_id == i2c_bus->i2c_id)) { rdev 1043 drivers/gpu/drm/radeon/radeon_i2c.c return rdev->i2c_bus[i]; rdev 44 drivers/gpu/drm/radeon/radeon_ib.c static int radeon_debugfs_sa_init(struct radeon_device *rdev); rdev 58 drivers/gpu/drm/radeon/radeon_ib.c int radeon_ib_get(struct radeon_device *rdev, int ring, rdev 64 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256); rdev 66 drivers/gpu/drm/radeon/radeon_ib.c dev_err(rdev->dev, "failed to get a new IB (%d)\n", r); rdev 97 drivers/gpu/drm/radeon/radeon_ib.c void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib) rdev 99 drivers/gpu/drm/radeon/radeon_ib.c radeon_sync_free(rdev, &ib->sync, ib->fence); rdev 100 drivers/gpu/drm/radeon/radeon_ib.c radeon_sa_bo_free(rdev, &ib->sa_bo, ib->fence); rdev 125 drivers/gpu/drm/radeon/radeon_ib.c int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, rdev 128 drivers/gpu/drm/radeon/radeon_ib.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 133 drivers/gpu/drm/radeon/radeon_ib.c dev_err(rdev->dev, "couldn't schedule ib\n"); rdev 138 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_ring_lock(rdev, ring, 64 + RADEON_NUM_SYNCS * 8); rdev 140 drivers/gpu/drm/radeon/radeon_ib.c dev_err(rdev->dev, "scheduling IB failed (%d).\n", r); rdev 147 drivers/gpu/drm/radeon/radeon_ib.c vm_id_fence = radeon_vm_grab_id(rdev, ib->vm, ib->ring); rdev 152 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_sync_rings(rdev, &ib->sync, ib->ring); rdev 154 drivers/gpu/drm/radeon/radeon_ib.c dev_err(rdev->dev, "failed to sync rings (%d)\n", r); rdev 155 drivers/gpu/drm/radeon/radeon_ib.c radeon_ring_unlock_undo(rdev, ring); rdev 160 drivers/gpu/drm/radeon/radeon_ib.c radeon_vm_flush(rdev, ib->vm, ib->ring, rdev 164 drivers/gpu/drm/radeon/radeon_ib.c radeon_ring_ib_execute(rdev, const_ib->ring, const_ib); rdev 165 drivers/gpu/drm/radeon/radeon_ib.c radeon_sync_free(rdev, &const_ib->sync, NULL); rdev 167 drivers/gpu/drm/radeon/radeon_ib.c radeon_ring_ib_execute(rdev, ib->ring, ib); rdev 168 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_fence_emit(rdev, &ib->fence, ib->ring); rdev 170 drivers/gpu/drm/radeon/radeon_ib.c dev_err(rdev->dev, "failed to emit fence for new IB (%d)\n", r); rdev 171 drivers/gpu/drm/radeon/radeon_ib.c radeon_ring_unlock_undo(rdev, ring); rdev 179 drivers/gpu/drm/radeon/radeon_ib.c radeon_vm_fence(rdev, ib->vm, ib->fence); rdev 181 drivers/gpu/drm/radeon/radeon_ib.c radeon_ring_unlock_commit(rdev, ring, hdp_flush); rdev 194 drivers/gpu/drm/radeon/radeon_ib.c int radeon_ib_pool_init(struct radeon_device *rdev) rdev 198 drivers/gpu/drm/radeon/radeon_ib.c if (rdev->ib_pool_ready) { rdev 202 drivers/gpu/drm/radeon/radeon_ib.c if (rdev->family >= CHIP_BONAIRE) { rdev 203 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo, rdev 212 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo, rdev 221 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_sa_bo_manager_start(rdev, &rdev->ring_tmp_bo); rdev 226 drivers/gpu/drm/radeon/radeon_ib.c rdev->ib_pool_ready = true; rdev 227 drivers/gpu/drm/radeon/radeon_ib.c if (radeon_debugfs_sa_init(rdev)) { rdev 228 drivers/gpu/drm/radeon/radeon_ib.c dev_err(rdev->dev, "failed to register debugfs file for SA\n"); rdev 241 drivers/gpu/drm/radeon/radeon_ib.c void radeon_ib_pool_fini(struct radeon_device *rdev) rdev 243 drivers/gpu/drm/radeon/radeon_ib.c if (rdev->ib_pool_ready) { rdev 244 drivers/gpu/drm/radeon/radeon_ib.c radeon_sa_bo_manager_suspend(rdev, &rdev->ring_tmp_bo); rdev 245 drivers/gpu/drm/radeon/radeon_ib.c radeon_sa_bo_manager_fini(rdev, &rdev->ring_tmp_bo); rdev 246 drivers/gpu/drm/radeon/radeon_ib.c rdev->ib_pool_ready = false; rdev 260 drivers/gpu/drm/radeon/radeon_ib.c int radeon_ib_ring_tests(struct radeon_device *rdev) rdev 266 drivers/gpu/drm/radeon/radeon_ib.c struct radeon_ring *ring = &rdev->ring[i]; rdev 271 drivers/gpu/drm/radeon/radeon_ib.c r = radeon_ib_test(rdev, i, ring); rdev 273 drivers/gpu/drm/radeon/radeon_ib.c radeon_fence_driver_force_completion(rdev, i); rdev 275 drivers/gpu/drm/radeon/radeon_ib.c rdev->needs_reset = false; rdev 280 drivers/gpu/drm/radeon/radeon_ib.c rdev->accel_working = false; rdev 301 drivers/gpu/drm/radeon/radeon_ib.c struct radeon_device *rdev = dev->dev_private; rdev 303 drivers/gpu/drm/radeon/radeon_ib.c radeon_sa_bo_dump_debug_info(&rdev->ring_tmp_bo, m); rdev 315 drivers/gpu/drm/radeon/radeon_ib.c static int radeon_debugfs_sa_init(struct radeon_device *rdev) rdev 318 drivers/gpu/drm/radeon/radeon_ib.c return radeon_debugfs_add_files(rdev, radeon_debugfs_sa_list, 1); rdev 58 drivers/gpu/drm/radeon/radeon_irq_kms.c struct radeon_device *rdev = dev->dev_private; rdev 61 drivers/gpu/drm/radeon/radeon_irq_kms.c ret = radeon_irq_process(rdev); rdev 83 drivers/gpu/drm/radeon/radeon_irq_kms.c struct radeon_device *rdev = container_of(work, struct radeon_device, rdev 85 drivers/gpu/drm/radeon/radeon_irq_kms.c struct drm_device *dev = rdev->ddev; rdev 91 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->mode_info.mode_config_initialized) rdev 104 drivers/gpu/drm/radeon/radeon_irq_kms.c struct radeon_device *rdev = container_of(work, struct radeon_device, rdev 106 drivers/gpu/drm/radeon/radeon_irq_kms.c struct drm_device *dev = rdev->ddev; rdev 124 drivers/gpu/drm/radeon/radeon_irq_kms.c struct radeon_device *rdev = dev->dev_private; rdev 128 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 131 drivers/gpu/drm/radeon/radeon_irq_kms.c atomic_set(&rdev->irq.ring_int[i], 0); rdev 132 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.dpm_thermal = false; rdev 134 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] = false; rdev 136 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.crtc_vblank_int[i] = false; rdev 137 drivers/gpu/drm/radeon/radeon_irq_kms.c atomic_set(&rdev->irq.pflip[i], 0); rdev 138 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.afmt[i] = false; rdev 140 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 141 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 143 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_process(rdev); rdev 156 drivers/gpu/drm/radeon/radeon_irq_kms.c struct radeon_device *rdev = dev->dev_private; rdev 158 drivers/gpu/drm/radeon/radeon_irq_kms.c if (ASIC_IS_AVIVO(rdev)) rdev 175 drivers/gpu/drm/radeon/radeon_irq_kms.c struct radeon_device *rdev = dev->dev_private; rdev 179 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev == NULL) { rdev 182 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 185 drivers/gpu/drm/radeon/radeon_irq_kms.c atomic_set(&rdev->irq.ring_int[i], 0); rdev 186 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.dpm_thermal = false; rdev 188 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] = false; rdev 190 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.crtc_vblank_int[i] = false; rdev 191 drivers/gpu/drm/radeon/radeon_irq_kms.c atomic_set(&rdev->irq.pflip[i], 0); rdev 192 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.afmt[i] = false; rdev 194 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 195 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 208 drivers/gpu/drm/radeon/radeon_irq_kms.c static bool radeon_msi_ok(struct radeon_device *rdev) rdev 211 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->family < CHIP_RV380) rdev 215 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->flags & RADEON_IS_AGP) rdev 223 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->family < CHIP_BONAIRE) { rdev 224 drivers/gpu/drm/radeon/radeon_irq_kms.c dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n"); rdev 225 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->pdev->no_64bit_msi = 1; rdev 236 drivers/gpu/drm/radeon/radeon_irq_kms.c if ((rdev->pdev->device == 0x791f) && rdev 237 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_vendor == 0x103c) && rdev 238 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_device == 0x30c2)) rdev 242 drivers/gpu/drm/radeon/radeon_irq_kms.c if ((rdev->pdev->device == 0x791f) && rdev 243 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_vendor == 0x1028) && rdev 244 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_device == 0x01fc)) rdev 248 drivers/gpu/drm/radeon/radeon_irq_kms.c if ((rdev->pdev->device == 0x791f) && rdev 249 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_vendor == 0x1028) && rdev 250 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_device == 0x01fd)) rdev 254 drivers/gpu/drm/radeon/radeon_irq_kms.c if ((rdev->pdev->device == 0x791f) && rdev 255 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_vendor == 0x107b) && rdev 256 drivers/gpu/drm/radeon/radeon_irq_kms.c (rdev->pdev->subsystem_device == 0x0185)) rdev 260 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->family == CHIP_RS690) rdev 267 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->family == CHIP_RV515) rdev 269 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->flags & RADEON_IS_IGP) { rdev 271 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->family >= CHIP_PALM) rdev 288 drivers/gpu/drm/radeon/radeon_irq_kms.c int radeon_irq_kms_init(struct radeon_device *rdev) rdev 292 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_init(&rdev->irq.lock); rdev 295 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->ddev->vblank_disable_immediate = true; rdev 297 drivers/gpu/drm/radeon/radeon_irq_kms.c r = drm_vblank_init(rdev->ddev, rdev->num_crtc); rdev 303 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->msi_enabled = 0; rdev 305 drivers/gpu/drm/radeon/radeon_irq_kms.c if (radeon_msi_ok(rdev)) { rdev 306 drivers/gpu/drm/radeon/radeon_irq_kms.c int ret = pci_enable_msi(rdev->pdev); rdev 308 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->msi_enabled = 1; rdev 309 drivers/gpu/drm/radeon/radeon_irq_kms.c dev_info(rdev->dev, "radeon: using MSI.\n"); rdev 313 drivers/gpu/drm/radeon/radeon_irq_kms.c INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func); rdev 314 drivers/gpu/drm/radeon/radeon_irq_kms.c INIT_WORK(&rdev->dp_work, radeon_dp_work_func); rdev 315 drivers/gpu/drm/radeon/radeon_irq_kms.c INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi); rdev 317 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.installed = true; rdev 318 drivers/gpu/drm/radeon/radeon_irq_kms.c r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq); rdev 320 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.installed = false; rdev 321 drivers/gpu/drm/radeon/radeon_irq_kms.c flush_delayed_work(&rdev->hotplug_work); rdev 336 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_fini(struct radeon_device *rdev) rdev 338 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->irq.installed) { rdev 339 drivers/gpu/drm/radeon/radeon_irq_kms.c drm_irq_uninstall(rdev->ddev); rdev 340 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.installed = false; rdev 341 drivers/gpu/drm/radeon/radeon_irq_kms.c if (rdev->msi_enabled) rdev 342 drivers/gpu/drm/radeon/radeon_irq_kms.c pci_disable_msi(rdev->pdev); rdev 343 drivers/gpu/drm/radeon/radeon_irq_kms.c flush_delayed_work(&rdev->hotplug_work); rdev 357 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring) rdev 361 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 364 drivers/gpu/drm/radeon/radeon_irq_kms.c if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) { rdev 365 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 366 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 367 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 381 drivers/gpu/drm/radeon/radeon_irq_kms.c bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring) rdev 383 drivers/gpu/drm/radeon/radeon_irq_kms.c return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1; rdev 396 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring) rdev 400 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 403 drivers/gpu/drm/radeon/radeon_irq_kms.c if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) { rdev 404 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 405 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 406 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 419 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc) rdev 423 drivers/gpu/drm/radeon/radeon_irq_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) rdev 426 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 429 drivers/gpu/drm/radeon/radeon_irq_kms.c if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) { rdev 430 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 431 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 432 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 445 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc) rdev 449 drivers/gpu/drm/radeon/radeon_irq_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) rdev 452 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 455 drivers/gpu/drm/radeon/radeon_irq_kms.c if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) { rdev 456 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 457 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 458 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 470 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block) rdev 474 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 477 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 478 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.afmt[block] = true; rdev 479 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 480 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 492 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block) rdev 496 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 499 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 500 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.afmt[block] = false; rdev 501 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 502 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 513 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask) rdev 518 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 521 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 523 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); rdev 524 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 525 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 536 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) rdev 541 drivers/gpu/drm/radeon/radeon_irq_kms.c if (!rdev->ddev->irq_enabled) rdev 544 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 546 drivers/gpu/drm/radeon/radeon_irq_kms.c rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); rdev 547 drivers/gpu/drm/radeon/radeon_irq_kms.c radeon_irq_set(rdev); rdev 548 drivers/gpu/drm/radeon/radeon_irq_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 568 drivers/gpu/drm/radeon/radeon_irq_kms.c void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev, rdev 63 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 65 drivers/gpu/drm/radeon/radeon_kms.c if (rdev == NULL) rdev 68 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->rmmio == NULL) rdev 76 drivers/gpu/drm/radeon/radeon_kms.c radeon_acpi_fini(rdev); rdev 78 drivers/gpu/drm/radeon/radeon_kms.c radeon_modeset_fini(rdev); rdev 79 drivers/gpu/drm/radeon/radeon_kms.c radeon_device_fini(rdev); rdev 87 drivers/gpu/drm/radeon/radeon_kms.c kfree(rdev); rdev 106 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev; rdev 109 drivers/gpu/drm/radeon/radeon_kms.c rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL); rdev 110 drivers/gpu/drm/radeon/radeon_kms.c if (rdev == NULL) { rdev 113 drivers/gpu/drm/radeon/radeon_kms.c dev->dev_private = (void *)rdev; rdev 136 drivers/gpu/drm/radeon/radeon_kms.c r = radeon_device_init(rdev, dev, dev->pdev, flags); rdev 146 drivers/gpu/drm/radeon/radeon_kms.c r = radeon_modeset_init(rdev); rdev 154 drivers/gpu/drm/radeon/radeon_kms.c acpi_status = radeon_acpi_init(rdev); rdev 193 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 195 drivers/gpu/drm/radeon/radeon_kms.c mutex_lock(&rdev->gem.mutex); rdev 206 drivers/gpu/drm/radeon/radeon_kms.c mutex_unlock(&rdev->gem.mutex); rdev 226 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 228 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_mode_info *minfo = &rdev->mode_info; rdev 243 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->num_gb_pipes; rdev 246 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->num_z_pipes; rdev 250 drivers/gpu/drm/radeon/radeon_kms.c if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) rdev 253 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->accel_working; rdev 260 drivers/gpu/drm/radeon/radeon_kms.c for (i = 0, found = 0; i < rdev->num_crtc; i++) { rdev 275 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family == CHIP_HAWAII) { rdev 276 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->accel_working) { rdev 277 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->new_fw) rdev 285 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->accel_working; rdev 289 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 290 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.tile_config; rdev 291 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 292 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.tile_config; rdev 293 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CAYMAN) rdev 294 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cayman.tile_config; rdev 295 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CEDAR) rdev 296 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.evergreen.tile_config; rdev 297 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_RV770) rdev 298 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.rv770.tile_config; rdev 299 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_R600) rdev 300 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.r600.tile_config; rdev 321 drivers/gpu/drm/radeon/radeon_kms.c radeon_set_filp_rights(dev, &rdev->hyperz_filp, filp, value); rdev 333 drivers/gpu/drm/radeon/radeon_kms.c radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, value); rdev 337 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->asic->get_xclk) rdev 338 drivers/gpu/drm/radeon/radeon_kms.c *value = radeon_get_xclk(rdev) * 10; rdev 340 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->clock.spll.reference_freq * 10; rdev 343 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 344 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.max_backends_per_se * rdev 345 drivers/gpu/drm/radeon/radeon_kms.c rdev->config.cik.max_shader_engines; rdev 346 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 347 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.max_backends_per_se * rdev 348 drivers/gpu/drm/radeon/radeon_kms.c rdev->config.si.max_shader_engines; rdev 349 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CAYMAN) rdev 350 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cayman.max_backends_per_se * rdev 351 drivers/gpu/drm/radeon/radeon_kms.c rdev->config.cayman.max_shader_engines; rdev 352 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CEDAR) rdev 353 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.evergreen.max_backends; rdev 354 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_RV770) rdev 355 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.rv770.max_backends; rdev 356 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_R600) rdev 357 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.r600.max_backends; rdev 363 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 364 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.max_tile_pipes; rdev 365 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 366 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.max_tile_pipes; rdev 367 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CAYMAN) rdev 368 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cayman.max_tile_pipes; rdev 369 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CEDAR) rdev 370 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.evergreen.max_tile_pipes; rdev 371 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_RV770) rdev 372 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.rv770.max_tile_pipes; rdev 373 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_R600) rdev 374 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.r600.max_tile_pipes; rdev 383 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 384 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.backend_map; rdev 385 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 386 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.backend_map; rdev 387 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CAYMAN) rdev 388 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cayman.backend_map; rdev 389 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CEDAR) rdev 390 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.evergreen.backend_map; rdev 391 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_RV770) rdev 392 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.rv770.backend_map; rdev 393 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_R600) rdev 394 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.r600.backend_map; rdev 401 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family < CHIP_CAYMAN) rdev 407 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family < CHIP_CAYMAN) rdev 412 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 413 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.max_cu_per_sh; rdev 414 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 415 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.max_cu_per_sh; rdev 416 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CAYMAN) rdev 417 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cayman.max_pipes_per_simd; rdev 418 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CEDAR) rdev 419 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.evergreen.max_pipes; rdev 420 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_RV770) rdev 421 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.rv770.max_pipes; rdev 422 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_R600) rdev 423 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.r600.max_pipes; rdev 429 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family < CHIP_R600) { rdev 435 drivers/gpu/drm/radeon/radeon_kms.c value64 = radeon_get_gpu_clock_counter(rdev); rdev 438 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 439 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.max_shader_engines; rdev 440 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 441 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.max_shader_engines; rdev 442 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CAYMAN) rdev 443 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cayman.max_shader_engines; rdev 444 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CEDAR) rdev 445 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.evergreen.num_ses; rdev 450 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 451 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.max_sh_per_se; rdev 452 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 453 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.max_sh_per_se; rdev 458 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->fastfb_working; rdev 468 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready; rdev 471 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->ring[R600_RING_TYPE_DMA_INDEX].ready; rdev 472 drivers/gpu/drm/radeon/radeon_kms.c *value |= rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX].ready; rdev 475 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->ring[R600_RING_TYPE_UVD_INDEX].ready; rdev 478 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->ring[TN_RING_TYPE_VCE1_INDEX].ready; rdev 485 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) { rdev 486 drivers/gpu/drm/radeon/radeon_kms.c value = rdev->config.cik.tile_mode_array; rdev 488 drivers/gpu/drm/radeon/radeon_kms.c } else if (rdev->family >= CHIP_TAHITI) { rdev 489 drivers/gpu/drm/radeon/radeon_kms.c value = rdev->config.si.tile_mode_array; rdev 497 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) { rdev 498 drivers/gpu/drm/radeon/radeon_kms.c value = rdev->config.cik.macrotile_mode_array; rdev 509 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) { rdev 510 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.backend_enable_mask; rdev 511 drivers/gpu/drm/radeon/radeon_kms.c } else if (rdev->family >= CHIP_TAHITI) { rdev 512 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.backend_enable_mask; rdev 518 drivers/gpu/drm/radeon/radeon_kms.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev 519 drivers/gpu/drm/radeon/radeon_kms.c rdev->pm.dpm_enabled) rdev 520 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10; rdev 522 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->pm.default_sclk * 10; rdev 525 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->vce.fw_version; rdev 528 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->vce.fb_version; rdev 533 drivers/gpu/drm/radeon/radeon_kms.c value64 = atomic64_read(&rdev->num_bytes_moved); rdev 538 drivers/gpu/drm/radeon/radeon_kms.c value64 = atomic64_read(&rdev->vram_usage); rdev 543 drivers/gpu/drm/radeon/radeon_kms.c value64 = atomic64_read(&rdev->gtt_usage); rdev 546 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_BONAIRE) rdev 547 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cik.active_cus; rdev 548 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_TAHITI) rdev 549 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.si.active_cus; rdev 550 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CAYMAN) rdev 551 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.cayman.active_simds; rdev 552 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_CEDAR) rdev 553 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.evergreen.active_simds; rdev 554 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_RV770) rdev 555 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.rv770.active_simds; rdev 556 drivers/gpu/drm/radeon/radeon_kms.c else if (rdev->family >= CHIP_R600) rdev 557 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->config.r600.active_simds; rdev 563 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->asic->pm.get_temperature) rdev 564 drivers/gpu/drm/radeon/radeon_kms.c *value = radeon_get_temperature(rdev); rdev 570 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->pm.dpm_enabled) rdev 571 drivers/gpu/drm/radeon/radeon_kms.c *value = radeon_dpm_get_current_sclk(rdev) / 100; rdev 573 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->pm.current_sclk / 100; rdev 577 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->pm.dpm_enabled) rdev 578 drivers/gpu/drm/radeon/radeon_kms.c *value = radeon_dpm_get_current_mclk(rdev) / 100; rdev 580 drivers/gpu/drm/radeon/radeon_kms.c *value = rdev->pm.current_mclk / 100; rdev 587 drivers/gpu/drm/radeon/radeon_kms.c if (radeon_get_allowed_info_register(rdev, *value, value)) rdev 594 drivers/gpu/drm/radeon/radeon_kms.c *value = atomic_read(&rdev->gpu_reset_counter); rdev 635 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 645 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_CAYMAN) { rdev 655 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->accel_working) { rdev 657 drivers/gpu/drm/radeon/radeon_kms.c r = radeon_vm_init(rdev, vm); rdev 663 drivers/gpu/drm/radeon/radeon_kms.c r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); rdev 665 drivers/gpu/drm/radeon/radeon_kms.c radeon_vm_fini(rdev, vm); rdev 672 drivers/gpu/drm/radeon/radeon_kms.c vm->ib_bo_va = radeon_vm_bo_add(rdev, vm, rdev 673 drivers/gpu/drm/radeon/radeon_kms.c rdev->ring_tmp_bo.bo); rdev 674 drivers/gpu/drm/radeon/radeon_kms.c r = radeon_vm_bo_set_addr(rdev, vm->ib_bo_va, rdev 679 drivers/gpu/drm/radeon/radeon_kms.c radeon_vm_fini(rdev, vm); rdev 705 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 709 drivers/gpu/drm/radeon/radeon_kms.c mutex_lock(&rdev->gem.mutex); rdev 710 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->hyperz_filp == file_priv) rdev 711 drivers/gpu/drm/radeon/radeon_kms.c rdev->hyperz_filp = NULL; rdev 712 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->cmask_filp == file_priv) rdev 713 drivers/gpu/drm/radeon/radeon_kms.c rdev->cmask_filp = NULL; rdev 714 drivers/gpu/drm/radeon/radeon_kms.c mutex_unlock(&rdev->gem.mutex); rdev 716 drivers/gpu/drm/radeon/radeon_kms.c radeon_uvd_free_handles(rdev, file_priv); rdev 717 drivers/gpu/drm/radeon/radeon_kms.c radeon_vce_free_handles(rdev, file_priv); rdev 720 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) { rdev 725 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->accel_working) { rdev 726 drivers/gpu/drm/radeon/radeon_kms.c r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); rdev 729 drivers/gpu/drm/radeon/radeon_kms.c radeon_vm_bo_rmv(rdev, vm->ib_bo_va); rdev 730 drivers/gpu/drm/radeon/radeon_kms.c radeon_bo_unreserve(rdev->ring_tmp_bo.bo); rdev 732 drivers/gpu/drm/radeon/radeon_kms.c radeon_vm_fini(rdev, vm); rdev 758 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 760 drivers/gpu/drm/radeon/radeon_kms.c if (pipe >= rdev->num_crtc) { rdev 773 drivers/gpu/drm/radeon/radeon_kms.c if (rdev->mode_info.crtcs[pipe]) { rdev 778 drivers/gpu/drm/radeon/radeon_kms.c count = radeon_get_vblank_counter(rdev, pipe); rdev 786 drivers/gpu/drm/radeon/radeon_kms.c &rdev->mode_info.crtcs[pipe]->base.hwmode); rdev 787 drivers/gpu/drm/radeon/radeon_kms.c } while (count != radeon_get_vblank_counter(rdev, pipe)); rdev 807 drivers/gpu/drm/radeon/radeon_kms.c count = radeon_get_vblank_counter(rdev, pipe); rdev 825 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 829 drivers/gpu/drm/radeon/radeon_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) { rdev 834 drivers/gpu/drm/radeon/radeon_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 835 drivers/gpu/drm/radeon/radeon_kms.c rdev->irq.crtc_vblank_int[crtc] = true; rdev 836 drivers/gpu/drm/radeon/radeon_kms.c r = radeon_irq_set(rdev); rdev 837 drivers/gpu/drm/radeon/radeon_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 851 drivers/gpu/drm/radeon/radeon_kms.c struct radeon_device *rdev = dev->dev_private; rdev 854 drivers/gpu/drm/radeon/radeon_kms.c if (crtc < 0 || crtc >= rdev->num_crtc) { rdev 859 drivers/gpu/drm/radeon/radeon_kms.c spin_lock_irqsave(&rdev->irq.lock, irqflags); rdev 860 drivers/gpu/drm/radeon/radeon_kms.c rdev->irq.crtc_vblank_int[crtc] = false; rdev 861 drivers/gpu/drm/radeon/radeon_kms.c radeon_irq_set(rdev); rdev 862 drivers/gpu/drm/radeon/radeon_kms.c spin_unlock_irqrestore(&rdev->irq.lock, irqflags); rdev 41 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 53 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 76 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if ((rdev->family == CHIP_RS100) || rdev 77 drivers/gpu/drm/radeon/radeon_legacy_crtc.c (rdev->family == CHIP_RS200)) { rdev 215 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 230 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 241 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 257 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 301 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 322 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (rdev->flags & RADEON_SINGLE_CRTC) rdev 329 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_pm_compute_clocks(rdev); rdev 355 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_pm_compute_clocks(rdev); rdev 378 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 471 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_crtc->legacy_display_base_addr = rdev->mc.vram_start; rdev 484 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (ASIC_IS_R300(rdev)) rdev 491 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (ASIC_IS_R300(rdev)) rdev 500 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (ASIC_IS_R300(rdev)) { rdev 548 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (ASIC_IS_R300(rdev)) { rdev 568 drivers/gpu/drm/radeon/radeon_legacy_crtc.c radeon_bandwidth_update(rdev); rdev 576 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 672 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if ((rdev->family == CHIP_RS400) || (rdev->family == CHIP_RS480)) rdev 703 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if ((rdev->family == CHIP_RS400) || (rdev->family == CHIP_RS480)) rdev 736 drivers/gpu/drm/radeon/radeon_legacy_crtc.c struct radeon_device *rdev = dev->dev_private; rdev 774 drivers/gpu/drm/radeon/radeon_legacy_crtc.c pll = &rdev->clock.p2pll; rdev 776 drivers/gpu/drm/radeon/radeon_legacy_crtc.c pll = &rdev->clock.p1pll; rdev 797 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (!rdev->is_atom_bios) { rdev 927 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (rdev->flags & RADEON_IS_MOBILITY) { rdev 940 drivers/gpu/drm/radeon/radeon_legacy_crtc.c r100_pll_errata_after_index(rdev); rdev 961 drivers/gpu/drm/radeon/radeon_legacy_crtc.c r100_pll_errata_after_index(rdev); rdev 963 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (ASIC_IS_R300(rdev) || rdev 964 drivers/gpu/drm/radeon/radeon_legacy_crtc.c (rdev->family == CHIP_RS300) || rdev 965 drivers/gpu/drm/radeon/radeon_legacy_crtc.c (rdev->family == CHIP_RS400) || rdev 966 drivers/gpu/drm/radeon/radeon_legacy_crtc.c (rdev->family == CHIP_RS480)) { rdev 56 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 68 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) { rdev 84 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if ((rdev->mode_info.connector_table == CT_IBOOK) || rdev 85 drivers/gpu/drm/radeon/radeon_legacy_encoders.c (rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) || rdev 86 drivers/gpu/drm/radeon/radeon_legacy_encoders.c (rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) || rdev 87 drivers/gpu/drm/radeon/radeon_legacy_encoders.c (rdev->mode_info.connector_table == CT_POWERBOOK_VGA)) rdev 135 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 144 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 149 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) { rdev 163 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 165 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 174 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 177 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 188 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 199 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) { rdev 224 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) rdev 228 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 234 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) rdev 244 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_RV410) rdev 247 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 283 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 296 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 300 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) { rdev 357 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 375 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 425 drivers/gpu/drm/radeon/radeon_legacy_encoders.c pdata->negative = (rdev->family != CHIP_RV200 && rdev 426 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family != CHIP_RV250 && rdev 427 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family != CHIP_RV280 && rdev 428 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family != CHIP_RV350); rdev 438 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) { rdev 451 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->mode_info.bl_encoder = radeon_encoder; rdev 463 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 469 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) { rdev 522 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 549 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (!(rdev->flags & RADEON_SINGLE_CRTC)) rdev 554 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 563 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 565 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 574 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 578 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 589 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 597 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { rdev 606 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { rdev 635 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 645 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 655 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_RN50(rdev)) { rdev 681 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) rdev 683 drivers/gpu/drm/radeon/radeon_legacy_encoders.c else if (ASIC_IS_RV100(rdev)) rdev 734 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 751 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 760 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 762 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 771 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 775 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 786 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 796 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_RV280) { rdev 815 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev) || (rdev->family == CHIP_RV280)) { rdev 828 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200 || rdev 829 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family == CHIP_R100 || rdev 830 drivers/gpu/drm/radeon/radeon_legacy_encoders.c ASIC_IS_R300(rdev)) rdev 855 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { rdev 864 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { rdev 875 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 898 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 917 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 926 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 928 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 937 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 940 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 951 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 958 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) { rdev 975 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 991 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if ((rdev->family == CHIP_R200) || ASIC_IS_R300(rdev)) { rdev 1000 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if ((rdev->family == CHIP_R200) || ASIC_IS_R300(rdev)) { rdev 1009 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1041 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1050 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200) rdev 1062 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200) { rdev 1070 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R420 || rdev 1071 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family == CHIP_R423 || rdev 1072 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family == CHIP_RV410) rdev 1087 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200) rdev 1095 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R420 || rdev 1096 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family == CHIP_R423 || rdev 1097 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family == CHIP_RV410) rdev 1111 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200) { rdev 1117 drivers/gpu/drm/radeon/radeon_legacy_encoders.c else if (!(rdev->flags & RADEON_SINGLE_CRTC)) rdev 1122 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1131 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 1133 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1142 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = encoder->dev->dev_private; rdev 1146 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1157 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1169 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family != CHIP_R200) { rdev 1171 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R420 || rdev 1172 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family == CHIP_R423 || rdev 1173 drivers/gpu/drm/radeon/radeon_legacy_encoders.c rdev->family == CHIP_RV410) { rdev 1213 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1216 drivers/gpu/drm/radeon/radeon_legacy_encoders.c } else if (rdev->family != CHIP_R200) rdev 1218 drivers/gpu/drm/radeon/radeon_legacy_encoders.c else if (rdev->family == CHIP_R200) rdev 1221 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family >= CHIP_R200) rdev 1231 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) rdev 1236 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1241 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family >= CHIP_R200) { rdev 1247 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1251 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family >= CHIP_R200) { rdev 1263 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1266 drivers/gpu/drm/radeon/radeon_legacy_encoders.c } else if (rdev->family == CHIP_R200) { rdev 1272 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1275 drivers/gpu/drm/radeon/radeon_legacy_encoders.c } else if (rdev->family == CHIP_R200) { rdev 1285 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1288 drivers/gpu/drm/radeon/radeon_legacy_encoders.c } else if (rdev->family != CHIP_R200) rdev 1290 drivers/gpu/drm/radeon/radeon_legacy_encoders.c else if (rdev->family == CHIP_R200) rdev 1293 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family >= CHIP_R200) rdev 1299 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1310 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1381 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1386 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) rdev 1445 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1535 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1576 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->family == CHIP_R200) { rdev 1585 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 1588 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1604 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 1613 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1639 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) rdev 1651 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1664 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->flags & RADEON_SINGLE_CRTC) { rdev 1668 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (ASIC_IS_R300(rdev)) { rdev 1701 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1710 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1724 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1728 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1747 drivers/gpu/drm/radeon/radeon_legacy_encoders.c struct radeon_device *rdev = dev->dev_private; rdev 1767 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->flags & RADEON_SINGLE_CRTC) rdev 1785 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1801 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1810 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (rdev->is_atom_bios) rdev 1819 drivers/gpu/drm/radeon/radeon_legacy_encoders.c if (!rdev->is_atom_bios) rdev 241 drivers/gpu/drm/radeon/radeon_legacy_tv.c struct radeon_device *rdev = dev->dev_private; rdev 249 drivers/gpu/drm/radeon/radeon_legacy_tv.c pll = &rdev->clock.p2pll; rdev 251 drivers/gpu/drm/radeon/radeon_legacy_tv.c pll = &rdev->clock.p1pll; rdev 281 drivers/gpu/drm/radeon/radeon_legacy_tv.c struct radeon_device *rdev = dev->dev_private; rdev 305 drivers/gpu/drm/radeon/radeon_legacy_tv.c struct radeon_device *rdev = dev->dev_private; rdev 327 drivers/gpu/drm/radeon/radeon_legacy_tv.c struct radeon_device *rdev = dev->dev_private; rdev 390 drivers/gpu/drm/radeon/radeon_legacy_tv.c struct radeon_device *rdev = dev->dev_private; rdev 417 drivers/gpu/drm/radeon/radeon_legacy_tv.c struct radeon_device *rdev = dev->dev_private; rdev 529 drivers/gpu/drm/radeon/radeon_legacy_tv.c struct radeon_device *rdev = dev->dev_private; rdev 557 drivers/gpu/drm/radeon/radeon_legacy_tv.c if (!ASIC_IS_R300(rdev)) rdev 718 drivers/gpu/drm/radeon/radeon_mode.h radeon_combios_get_tv_info(struct radeon_device *rdev); rdev 720 drivers/gpu/drm/radeon/radeon_mode.h radeon_atombios_get_tv_info(struct radeon_device *rdev); rdev 721 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev, rdev 767 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_atom_encoder_init(struct radeon_device *rdev); rdev 768 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev); rdev 781 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_i2c_init(struct radeon_device *rdev); rdev 782 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_i2c_fini(struct radeon_device *rdev); rdev 783 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_combios_i2c_init(struct radeon_device *rdev); rdev 784 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_atombios_i2c_init(struct radeon_device *rdev); rdev 785 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_i2c_add(struct radeon_device *rdev, rdev 788 drivers/gpu/drm/radeon/radeon_mode.h extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, rdev 806 drivers/gpu/drm/radeon/radeon_mode.h extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, rdev 809 drivers/gpu/drm/radeon/radeon_mode.h extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, rdev 812 drivers/gpu/drm/radeon/radeon_mode.h extern struct radeon_gpio_rec radeon_atombios_lookup_gpio(struct radeon_device *rdev, rdev 884 drivers/gpu/drm/radeon/radeon_mode.h extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); rdev 886 drivers/gpu/drm/radeon/radeon_mode.h radeon_bios_get_hardcoded_edid(struct radeon_device *rdev); rdev 918 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev); rdev 919 drivers/gpu/drm/radeon/radeon_mode.h extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev); rdev 954 drivers/gpu/drm/radeon/radeon_mode.h void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); rdev 977 drivers/gpu/drm/radeon/radeon_mode.h int radeon_fbdev_init(struct radeon_device *rdev); rdev 978 drivers/gpu/drm/radeon/radeon_mode.h void radeon_fbdev_fini(struct radeon_device *rdev); rdev 979 drivers/gpu/drm/radeon/radeon_mode.h void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); rdev 980 drivers/gpu/drm/radeon/radeon_mode.h bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); rdev 982 drivers/gpu/drm/radeon/radeon_mode.h void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id); rdev 984 drivers/gpu/drm/radeon/radeon_mode.h void radeon_fb_add_connector(struct radeon_device *rdev, struct drm_connector *connector); rdev 985 drivers/gpu/drm/radeon/radeon_mode.h void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector *connector); rdev 987 drivers/gpu/drm/radeon/radeon_mode.h void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id); rdev 989 drivers/gpu/drm/radeon/radeon_mode.h int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled); rdev 995 drivers/gpu/drm/radeon/radeon_mode.h int radeon_mst_debugfs_init(struct radeon_device *rdev); rdev 1001 drivers/gpu/drm/radeon/radeon_mode.h void radeon_atom_release_dig_encoder(struct radeon_device *rdev, int enc_idx); rdev 44 drivers/gpu/drm/radeon/radeon_object.c int radeon_ttm_init(struct radeon_device *rdev); rdev 45 drivers/gpu/drm/radeon/radeon_object.c void radeon_ttm_fini(struct radeon_device *rdev); rdev 56 drivers/gpu/drm/radeon/radeon_object.c struct radeon_device *rdev = bo->rdev; rdev 62 drivers/gpu/drm/radeon/radeon_object.c atomic64_add(size, &rdev->gtt_usage); rdev 64 drivers/gpu/drm/radeon/radeon_object.c atomic64_sub(size, &rdev->gtt_usage); rdev 68 drivers/gpu/drm/radeon/radeon_object.c atomic64_add(size, &rdev->vram_usage); rdev 70 drivers/gpu/drm/radeon/radeon_object.c atomic64_sub(size, &rdev->vram_usage); rdev 83 drivers/gpu/drm/radeon/radeon_object.c mutex_lock(&bo->rdev->gem.mutex); rdev 85 drivers/gpu/drm/radeon/radeon_object.c mutex_unlock(&bo->rdev->gem.mutex); rdev 112 drivers/gpu/drm/radeon/radeon_object.c rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size) { rdev 114 drivers/gpu/drm/radeon/radeon_object.c rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; rdev 133 drivers/gpu/drm/radeon/radeon_object.c (rbo->rdev->flags & RADEON_IS_AGP)) { rdev 152 drivers/gpu/drm/radeon/radeon_object.c rbo->rdev->flags & RADEON_IS_AGP) { rdev 177 drivers/gpu/drm/radeon/radeon_object.c rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; rdev 183 drivers/gpu/drm/radeon/radeon_object.c int radeon_bo_create(struct radeon_device *rdev, rdev 206 drivers/gpu/drm/radeon/radeon_object.c acc_size = ttm_bo_dma_acc_size(&rdev->mman.bdev, size, rdev 212 drivers/gpu/drm/radeon/radeon_object.c drm_gem_private_object_init(rdev->ddev, &bo->tbo.base, size); rdev 213 drivers/gpu/drm/radeon/radeon_object.c bo->rdev = rdev; rdev 223 drivers/gpu/drm/radeon/radeon_object.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 229 drivers/gpu/drm/radeon/radeon_object.c if (rdev->family >= CHIP_RV610 && rdev->family <= CHIP_RV635) rdev 261 drivers/gpu/drm/radeon/radeon_object.c down_read(&rdev->pm.mclk_lock); rdev 262 drivers/gpu/drm/radeon/radeon_object.c r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type, rdev 265 drivers/gpu/drm/radeon/radeon_object.c up_read(&rdev->pm.mclk_lock); rdev 346 drivers/gpu/drm/radeon/radeon_object.c domain_start = bo->rdev->mc.vram_start; rdev 348 drivers/gpu/drm/radeon/radeon_object.c domain_start = bo->rdev->mc.gtt_start; rdev 365 drivers/gpu/drm/radeon/radeon_object.c (!max_offset || max_offset > bo->rdev->mc.visible_vram_size)) rdev 367 drivers/gpu/drm/radeon/radeon_object.c bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; rdev 380 drivers/gpu/drm/radeon/radeon_object.c bo->rdev->vram_pin_size += radeon_bo_size(bo); rdev 382 drivers/gpu/drm/radeon/radeon_object.c bo->rdev->gart_pin_size += radeon_bo_size(bo); rdev 384 drivers/gpu/drm/radeon/radeon_object.c dev_err(bo->rdev->dev, "%p pin failed\n", bo); rdev 400 drivers/gpu/drm/radeon/radeon_object.c dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo); rdev 413 drivers/gpu/drm/radeon/radeon_object.c bo->rdev->vram_pin_size -= radeon_bo_size(bo); rdev 415 drivers/gpu/drm/radeon/radeon_object.c bo->rdev->gart_pin_size -= radeon_bo_size(bo); rdev 417 drivers/gpu/drm/radeon/radeon_object.c dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); rdev 422 drivers/gpu/drm/radeon/radeon_object.c int radeon_bo_evict_vram(struct radeon_device *rdev) rdev 426 drivers/gpu/drm/radeon/radeon_object.c if (rdev->flags & RADEON_IS_IGP) { rdev 427 drivers/gpu/drm/radeon/radeon_object.c if (rdev->mc.igp_sideport_enabled == false) rdev 432 drivers/gpu/drm/radeon/radeon_object.c return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM); rdev 435 drivers/gpu/drm/radeon/radeon_object.c void radeon_bo_force_delete(struct radeon_device *rdev) rdev 439 drivers/gpu/drm/radeon/radeon_object.c if (list_empty(&rdev->gem.objects)) { rdev 442 drivers/gpu/drm/radeon/radeon_object.c dev_err(rdev->dev, "Userspace still has active objects !\n"); rdev 443 drivers/gpu/drm/radeon/radeon_object.c list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { rdev 444 drivers/gpu/drm/radeon/radeon_object.c dev_err(rdev->dev, "%p %p %lu %lu force free\n", rdev 447 drivers/gpu/drm/radeon/radeon_object.c mutex_lock(&bo->rdev->gem.mutex); rdev 449 drivers/gpu/drm/radeon/radeon_object.c mutex_unlock(&bo->rdev->gem.mutex); rdev 455 drivers/gpu/drm/radeon/radeon_object.c int radeon_bo_init(struct radeon_device *rdev) rdev 458 drivers/gpu/drm/radeon/radeon_object.c arch_io_reserve_memtype_wc(rdev->mc.aper_base, rdev 459 drivers/gpu/drm/radeon/radeon_object.c rdev->mc.aper_size); rdev 462 drivers/gpu/drm/radeon/radeon_object.c if (!rdev->fastfb_working) { rdev 463 drivers/gpu/drm/radeon/radeon_object.c rdev->mc.vram_mtrr = arch_phys_wc_add(rdev->mc.aper_base, rdev 464 drivers/gpu/drm/radeon/radeon_object.c rdev->mc.aper_size); rdev 467 drivers/gpu/drm/radeon/radeon_object.c rdev->mc.mc_vram_size >> 20, rdev 468 drivers/gpu/drm/radeon/radeon_object.c (unsigned long long)rdev->mc.aper_size >> 20); rdev 470 drivers/gpu/drm/radeon/radeon_object.c rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S'); rdev 471 drivers/gpu/drm/radeon/radeon_object.c return radeon_ttm_init(rdev); rdev 474 drivers/gpu/drm/radeon/radeon_object.c void radeon_bo_fini(struct radeon_device *rdev) rdev 476 drivers/gpu/drm/radeon/radeon_object.c radeon_ttm_fini(rdev); rdev 477 drivers/gpu/drm/radeon/radeon_object.c arch_phys_wc_del(rdev->mc.vram_mtrr); rdev 478 drivers/gpu/drm/radeon/radeon_object.c arch_io_free_memtype_wc(rdev->mc.aper_base, rdev->mc.aper_size); rdev 483 drivers/gpu/drm/radeon/radeon_object.c static u64 radeon_bo_get_threshold_for_moves(struct radeon_device *rdev) rdev 485 drivers/gpu/drm/radeon/radeon_object.c u64 real_vram_size = rdev->mc.real_vram_size; rdev 486 drivers/gpu/drm/radeon/radeon_object.c u64 vram_usage = atomic64_read(&rdev->vram_usage); rdev 533 drivers/gpu/drm/radeon/radeon_object.c int radeon_bo_list_validate(struct radeon_device *rdev, rdev 542 drivers/gpu/drm/radeon/radeon_object.c u64 bytes_moved_threshold = radeon_bo_get_threshold_for_moves(rdev); rdev 578 drivers/gpu/drm/radeon/radeon_object.c initial_bytes_moved = atomic64_read(&rdev->num_bytes_moved); rdev 580 drivers/gpu/drm/radeon/radeon_object.c bytes_moved += atomic64_read(&rdev->num_bytes_moved) - rdev 607 drivers/gpu/drm/radeon/radeon_object.c struct radeon_device *rdev = bo->rdev; rdev 619 drivers/gpu/drm/radeon/radeon_object.c reg = &rdev->surface_regs[bo->surface_reg]; rdev 627 drivers/gpu/drm/radeon/radeon_object.c reg = &rdev->surface_regs[i]; rdev 641 drivers/gpu/drm/radeon/radeon_object.c reg = &rdev->surface_regs[steal]; rdev 654 drivers/gpu/drm/radeon/radeon_object.c radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch, rdev 662 drivers/gpu/drm/radeon/radeon_object.c struct radeon_device *rdev = bo->rdev; rdev 668 drivers/gpu/drm/radeon/radeon_object.c reg = &rdev->surface_regs[bo->surface_reg]; rdev 669 drivers/gpu/drm/radeon/radeon_object.c radeon_clear_surface_reg(rdev, bo->surface_reg); rdev 678 drivers/gpu/drm/radeon/radeon_object.c struct radeon_device *rdev = bo->rdev; rdev 681 drivers/gpu/drm/radeon/radeon_object.c if (rdev->family >= CHIP_CEDAR) { rdev 787 drivers/gpu/drm/radeon/radeon_object.c radeon_vm_bo_invalidate(rbo->rdev, rbo); rdev 800 drivers/gpu/drm/radeon/radeon_object.c struct radeon_device *rdev; rdev 809 drivers/gpu/drm/radeon/radeon_object.c rdev = rbo->rdev; rdev 815 drivers/gpu/drm/radeon/radeon_object.c if ((offset + size) <= rdev->mc.visible_vram_size) rdev 824 drivers/gpu/drm/radeon/radeon_object.c lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT; rdev 841 drivers/gpu/drm/radeon/radeon_object.c if ((offset + size) > rdev->mc.visible_vram_size) rdev 71 drivers/gpu/drm/radeon/radeon_object.h dev_err(bo->rdev->dev, "%p reserve failed\n", bo); rdev 125 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_bo_create(struct radeon_device *rdev, rdev 139 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_bo_evict_vram(struct radeon_device *rdev); rdev 140 drivers/gpu/drm/radeon/radeon_object.h extern void radeon_bo_force_delete(struct radeon_device *rdev); rdev 141 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_bo_init(struct radeon_device *rdev); rdev 142 drivers/gpu/drm/radeon/radeon_object.h extern void radeon_bo_fini(struct radeon_device *rdev); rdev 143 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_bo_list_validate(struct radeon_device *rdev, rdev 174 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_sa_bo_manager_init(struct radeon_device *rdev, rdev 178 drivers/gpu/drm/radeon/radeon_object.h extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev, rdev 180 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_sa_bo_manager_start(struct radeon_device *rdev, rdev 182 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev, rdev 184 drivers/gpu/drm/radeon/radeon_object.h extern int radeon_sa_bo_new(struct radeon_device *rdev, rdev 188 drivers/gpu/drm/radeon/radeon_object.h extern void radeon_sa_bo_free(struct radeon_device *rdev, rdev 50 drivers/gpu/drm/radeon/radeon_pm.c static int radeon_debugfs_pm_init(struct radeon_device *rdev); rdev 51 drivers/gpu/drm/radeon/radeon_pm.c static bool radeon_pm_in_vbl(struct radeon_device *rdev); rdev 52 drivers/gpu/drm/radeon/radeon_pm.c static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish); rdev 53 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_update_profile(struct radeon_device *rdev); rdev 54 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_set_clocks(struct radeon_device *rdev); rdev 56 drivers/gpu/drm/radeon/radeon_pm.c int radeon_pm_get_type_index(struct radeon_device *rdev, rdev 63 drivers/gpu/drm/radeon/radeon_pm.c for (i = 0; i < rdev->pm.num_power_states; i++) { rdev 64 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.power_state[i].type == ps_type) { rdev 71 drivers/gpu/drm/radeon/radeon_pm.c return rdev->pm.default_power_state_index; rdev 74 drivers/gpu/drm/radeon/radeon_pm.c void radeon_pm_acpi_event_handler(struct radeon_device *rdev) rdev 76 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 77 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 79 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.ac_power = true; rdev 81 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.ac_power = false; rdev 82 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->family == CHIP_ARUBA) { rdev 83 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.enable_bapm) rdev 84 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); rdev 86 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 87 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { rdev 88 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.profile == PM_PROFILE_AUTO) { rdev 89 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 90 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_update_profile(rdev); rdev 91 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 92 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 97 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_update_profile(struct radeon_device *rdev) rdev 99 drivers/gpu/drm/radeon/radeon_pm.c switch (rdev->pm.profile) { rdev 101 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; rdev 105 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count > 1) rdev 106 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; rdev 108 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; rdev 110 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count > 1) rdev 111 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; rdev 113 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; rdev 117 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count > 1) rdev 118 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; rdev 120 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; rdev 123 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count > 1) rdev 124 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; rdev 126 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; rdev 129 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count > 1) rdev 130 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; rdev 132 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; rdev 136 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count == 0) { rdev 137 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.requested_power_state_index = rdev 138 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; rdev 139 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.requested_clock_mode_index = rdev 140 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; rdev 142 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.requested_power_state_index = rdev 143 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; rdev 144 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.requested_clock_mode_index = rdev 145 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; rdev 149 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_unmap_vram_bos(struct radeon_device *rdev) rdev 153 drivers/gpu/drm/radeon/radeon_pm.c if (list_empty(&rdev->gem.objects)) rdev 156 drivers/gpu/drm/radeon/radeon_pm.c list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { rdev 162 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_sync_with_vblank(struct radeon_device *rdev) rdev 164 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtcs) { rdev 165 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.vblank_sync = false; rdev 167 drivers/gpu/drm/radeon/radeon_pm.c rdev->irq.vblank_queue, rdev->pm.vblank_sync, rdev 172 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_set_power_state(struct radeon_device *rdev) rdev 177 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && rdev 178 drivers/gpu/drm/radeon/radeon_pm.c (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) rdev 181 drivers/gpu/drm/radeon/radeon_pm.c if (radeon_gui_idle(rdev)) { rdev 182 drivers/gpu/drm/radeon/radeon_pm.c sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 183 drivers/gpu/drm/radeon/radeon_pm.c clock_info[rdev->pm.requested_clock_mode_index].sclk; rdev 184 drivers/gpu/drm/radeon/radeon_pm.c if (sclk > rdev->pm.default_sclk) rdev 185 drivers/gpu/drm/radeon/radeon_pm.c sclk = rdev->pm.default_sclk; rdev 191 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && rdev 192 drivers/gpu/drm/radeon/radeon_pm.c (rdev->family >= CHIP_BARTS) && rdev 193 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.active_crtc_count && rdev 194 drivers/gpu/drm/radeon/radeon_pm.c ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || rdev 195 drivers/gpu/drm/radeon/radeon_pm.c (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) rdev 196 drivers/gpu/drm/radeon/radeon_pm.c mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 197 drivers/gpu/drm/radeon/radeon_pm.c clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; rdev 199 drivers/gpu/drm/radeon/radeon_pm.c mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. rdev 200 drivers/gpu/drm/radeon/radeon_pm.c clock_info[rdev->pm.requested_clock_mode_index].mclk; rdev 202 drivers/gpu/drm/radeon/radeon_pm.c if (mclk > rdev->pm.default_mclk) rdev 203 drivers/gpu/drm/radeon/radeon_pm.c mclk = rdev->pm.default_mclk; rdev 206 drivers/gpu/drm/radeon/radeon_pm.c if (sclk < rdev->pm.current_sclk) rdev 209 drivers/gpu/drm/radeon/radeon_pm.c radeon_sync_with_vblank(rdev); rdev 211 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DYNPM) { rdev 212 drivers/gpu/drm/radeon/radeon_pm.c if (!radeon_pm_in_vbl(rdev)) rdev 216 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_prepare(rdev); rdev 220 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_misc(rdev); rdev 223 drivers/gpu/drm/radeon/radeon_pm.c if (sclk != rdev->pm.current_sclk) { rdev 224 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_debug_check_in_vbl(rdev, false); rdev 225 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_engine_clock(rdev, sclk); rdev 226 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_debug_check_in_vbl(rdev, true); rdev 227 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_sclk = sclk; rdev 232 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { rdev 233 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_debug_check_in_vbl(rdev, false); rdev 234 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_memory_clock(rdev, mclk); rdev 235 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_debug_check_in_vbl(rdev, true); rdev 236 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_mclk = mclk; rdev 242 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_misc(rdev); rdev 244 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_finish(rdev); rdev 246 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; rdev 247 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; rdev 252 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_set_clocks(struct radeon_device *rdev) rdev 258 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && rdev 259 drivers/gpu/drm/radeon/radeon_pm.c (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) rdev 262 drivers/gpu/drm/radeon/radeon_pm.c down_write(&rdev->pm.mclk_lock); rdev 263 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->ring_lock); rdev 267 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_ring *ring = &rdev->ring[i]; rdev 271 drivers/gpu/drm/radeon/radeon_pm.c r = radeon_fence_wait_empty(rdev, i); rdev 274 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->ring_lock); rdev 275 drivers/gpu/drm/radeon/radeon_pm.c up_write(&rdev->pm.mclk_lock); rdev 280 drivers/gpu/drm/radeon/radeon_pm.c radeon_unmap_vram_bos(rdev); rdev 282 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->irq.installed) { rdev 284 drivers/gpu/drm/radeon/radeon_pm.c drm_for_each_crtc(crtc, rdev->ddev) { rdev 285 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtcs & (1 << i)) { rdev 288 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.req_vblank |= (1 << i); rdev 297 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_power_state(rdev); rdev 299 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->irq.installed) { rdev 301 drivers/gpu/drm/radeon/radeon_pm.c drm_for_each_crtc(crtc, rdev->ddev) { rdev 302 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.req_vblank & (1 << i)) { rdev 303 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.req_vblank &= ~(1 << i); rdev 311 drivers/gpu/drm/radeon/radeon_pm.c radeon_update_bandwidth_info(rdev); rdev 312 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count) rdev 313 drivers/gpu/drm/radeon/radeon_pm.c radeon_bandwidth_update(rdev); rdev 315 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; rdev 317 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->ring_lock); rdev 318 drivers/gpu/drm/radeon/radeon_pm.c up_write(&rdev->pm.mclk_lock); rdev 321 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_print_states(struct radeon_device *rdev) rdev 327 drivers/gpu/drm/radeon/radeon_pm.c DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); rdev 328 drivers/gpu/drm/radeon/radeon_pm.c for (i = 0; i < rdev->pm.num_power_states; i++) { rdev 329 drivers/gpu/drm/radeon/radeon_pm.c power_state = &rdev->pm.power_state[i]; rdev 332 drivers/gpu/drm/radeon/radeon_pm.c if (i == rdev->pm.default_power_state_index) rdev 334 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) rdev 341 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->flags & RADEON_IS_IGP) rdev 360 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 361 drivers/gpu/drm/radeon/radeon_pm.c int cp = rdev->pm.profile; rdev 376 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 379 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->flags & RADEON_IS_PX) && rdev 383 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 384 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_PROFILE) { rdev 386 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile = PM_PROFILE_DEFAULT; rdev 388 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile = PM_PROFILE_AUTO; rdev 390 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile = PM_PROFILE_LOW; rdev 392 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile = PM_PROFILE_MID; rdev 394 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile = PM_PROFILE_HIGH; rdev 399 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_update_profile(rdev); rdev 400 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 405 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 415 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 416 drivers/gpu/drm/radeon/radeon_pm.c int pm = rdev->pm.pm_method; rdev 429 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 432 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->flags & RADEON_IS_PX) && rdev 439 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DPM) { rdev 445 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 446 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_DYNPM; rdev 447 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; rdev 448 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; rdev 449 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 451 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 453 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; rdev 454 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; rdev 455 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 456 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 457 drivers/gpu/drm/radeon/radeon_pm.c cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); rdev 462 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks(rdev); rdev 472 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 473 drivers/gpu/drm/radeon/radeon_pm.c enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; rdev 486 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 488 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 490 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; rdev 492 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; rdev 494 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; rdev 496 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 500 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 503 drivers/gpu/drm/radeon/radeon_pm.c if (!(rdev->flags & RADEON_IS_PX) || rdev 505 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks(rdev); rdev 516 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 517 drivers/gpu/drm/radeon/radeon_pm.c enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; rdev 519 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->flags & RADEON_IS_PX) && rdev 534 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = ddev->dev_private; rdev 539 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->flags & RADEON_IS_PX) && rdev 543 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 554 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.force_performance_level) { rdev 555 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.thermal_active) { rdev 559 drivers/gpu/drm/radeon/radeon_pm.c ret = radeon_dpm_force_performance_level(rdev, level); rdev 564 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 573 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev_get_drvdata(dev); rdev 576 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.fan_ctrl_get_mode) rdev 577 drivers/gpu/drm/radeon/radeon_pm.c pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev); rdev 588 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev_get_drvdata(dev); rdev 592 drivers/gpu/drm/radeon/radeon_pm.c if(!rdev->asic->dpm.fan_ctrl_set_mode) rdev 601 drivers/gpu/drm/radeon/radeon_pm.c rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC); rdev 604 drivers/gpu/drm/radeon/radeon_pm.c rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); rdev 629 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev_get_drvdata(dev); rdev 639 drivers/gpu/drm/radeon/radeon_pm.c err = rdev->asic->dpm.set_fan_speed_percent(rdev, value); rdev 650 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev_get_drvdata(dev); rdev 654 drivers/gpu/drm/radeon/radeon_pm.c err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed); rdev 674 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev_get_drvdata(dev); rdev 675 drivers/gpu/drm/radeon/radeon_pm.c struct drm_device *ddev = rdev->ddev; rdev 679 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->flags & RADEON_IS_PX) && rdev 683 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_temperature) rdev 684 drivers/gpu/drm/radeon/radeon_pm.c temp = radeon_get_temperature(rdev); rdev 695 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev_get_drvdata(dev); rdev 700 drivers/gpu/drm/radeon/radeon_pm.c temp = rdev->pm.dpm.thermal.min_temp; rdev 702 drivers/gpu/drm/radeon/radeon_pm.c temp = rdev->pm.dpm.thermal.max_temp; rdev 731 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev_get_drvdata(dev); rdev 735 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method != PM_METHOD_DPM && rdev 745 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.no_fan && rdev 753 drivers/gpu/drm/radeon/radeon_pm.c if ((!rdev->asic->dpm.get_fan_speed_percent && rdev 755 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->asic->dpm.fan_ctrl_get_mode && rdev 759 drivers/gpu/drm/radeon/radeon_pm.c if ((!rdev->asic->dpm.set_fan_speed_percent && rdev 761 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->asic->dpm.fan_ctrl_set_mode && rdev 766 drivers/gpu/drm/radeon/radeon_pm.c if ((!rdev->asic->dpm.set_fan_speed_percent && rdev 767 drivers/gpu/drm/radeon/radeon_pm.c !rdev->asic->dpm.get_fan_speed_percent) && rdev 785 drivers/gpu/drm/radeon/radeon_pm.c static int radeon_hwmon_init(struct radeon_device *rdev) rdev 789 drivers/gpu/drm/radeon/radeon_pm.c switch (rdev->pm.int_thermal_type) { rdev 798 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_temperature == NULL) rdev 800 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, rdev 801 drivers/gpu/drm/radeon/radeon_pm.c "radeon", rdev, rdev 803 drivers/gpu/drm/radeon/radeon_pm.c if (IS_ERR(rdev->pm.int_hwmon_dev)) { rdev 804 drivers/gpu/drm/radeon/radeon_pm.c err = PTR_ERR(rdev->pm.int_hwmon_dev); rdev 805 drivers/gpu/drm/radeon/radeon_pm.c dev_err(rdev->dev, rdev 816 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_hwmon_fini(struct radeon_device *rdev) rdev 818 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.int_hwmon_dev) rdev 819 drivers/gpu/drm/radeon/radeon_pm.c hwmon_device_unregister(rdev->pm.int_hwmon_dev); rdev 824 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = rdev 830 drivers/gpu/drm/radeon/radeon_pm.c if (!rdev->pm.dpm_enabled) rdev 833 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_temperature) { rdev 834 drivers/gpu/drm/radeon/radeon_pm.c int temp = radeon_get_temperature(rdev); rdev 836 drivers/gpu/drm/radeon/radeon_pm.c if (temp < rdev->pm.dpm.thermal.min_temp) rdev 838 drivers/gpu/drm/radeon/radeon_pm.c dpm_state = rdev->pm.dpm.user_state; rdev 840 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.thermal.high_to_low) rdev 842 drivers/gpu/drm/radeon/radeon_pm.c dpm_state = rdev->pm.dpm.user_state; rdev 844 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 846 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.thermal_active = true; rdev 848 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.thermal_active = false; rdev 849 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.state = dpm_state; rdev 850 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 852 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks(rdev); rdev 855 drivers/gpu/drm/radeon/radeon_pm.c static bool radeon_dpm_single_display(struct radeon_device *rdev) rdev 857 drivers/gpu/drm/radeon/radeon_pm.c bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? rdev 861 drivers/gpu/drm/radeon/radeon_pm.c if (single_display && rdev->asic->dpm.vblank_too_short) { rdev 862 drivers/gpu/drm/radeon/radeon_pm.c if (radeon_dpm_vblank_too_short(rdev)) rdev 869 drivers/gpu/drm/radeon/radeon_pm.c if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120)) rdev 875 drivers/gpu/drm/radeon/radeon_pm.c static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev, rdev 881 drivers/gpu/drm/radeon/radeon_pm.c bool single_display = radeon_dpm_single_display(rdev); rdev 894 drivers/gpu/drm/radeon/radeon_pm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 895 drivers/gpu/drm/radeon/radeon_pm.c ps = &rdev->pm.dpm.ps[i]; rdev 928 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.uvd_ps) rdev 929 drivers/gpu/drm/radeon/radeon_pm.c return rdev->pm.dpm.uvd_ps; rdev 949 drivers/gpu/drm/radeon/radeon_pm.c return rdev->pm.dpm.boot_ps; rdev 978 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.uvd_ps) { rdev 979 drivers/gpu/drm/radeon/radeon_pm.c return rdev->pm.dpm.uvd_ps; rdev 1002 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) rdev 1008 drivers/gpu/drm/radeon/radeon_pm.c bool single_display = radeon_dpm_single_display(rdev); rdev 1011 drivers/gpu/drm/radeon/radeon_pm.c if (!rdev->pm.dpm_enabled) rdev 1014 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { rdev 1016 drivers/gpu/drm/radeon/radeon_pm.c if ((!rdev->pm.dpm.thermal_active) && rdev 1017 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->pm.dpm.uvd_active)) rdev 1018 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.state = rdev->pm.dpm.user_state; rdev 1020 drivers/gpu/drm/radeon/radeon_pm.c dpm_state = rdev->pm.dpm.state; rdev 1022 drivers/gpu/drm/radeon/radeon_pm.c ps = radeon_dpm_pick_power_state(rdev, dpm_state); rdev 1024 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.requested_ps = ps; rdev 1029 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { rdev 1031 drivers/gpu/drm/radeon/radeon_pm.c if (ps->vce_active != rdev->pm.dpm.vce_active) rdev 1034 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.single_display != single_display) rdev 1036 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) { rdev 1040 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { rdev 1042 drivers/gpu/drm/radeon/radeon_pm.c radeon_bandwidth_update(rdev); rdev 1044 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_display_configuration_changed(rdev); rdev 1045 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; rdev 1046 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; rdev 1054 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.new_active_crtcs == rdev 1055 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_active_crtcs) { rdev 1058 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->pm.dpm.current_active_crtc_count > 1) && rdev 1059 drivers/gpu/drm/radeon/radeon_pm.c (rdev->pm.dpm.new_active_crtc_count > 1)) { rdev 1061 drivers/gpu/drm/radeon/radeon_pm.c radeon_bandwidth_update(rdev); rdev 1063 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_display_configuration_changed(rdev); rdev 1064 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; rdev 1065 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; rdev 1075 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); rdev 1077 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); rdev 1080 drivers/gpu/drm/radeon/radeon_pm.c down_write(&rdev->pm.mclk_lock); rdev 1081 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->ring_lock); rdev 1084 drivers/gpu/drm/radeon/radeon_pm.c ps->vce_active = rdev->pm.dpm.vce_active; rdev 1086 drivers/gpu/drm/radeon/radeon_pm.c ret = radeon_dpm_pre_set_power_state(rdev); rdev 1091 drivers/gpu/drm/radeon/radeon_pm.c radeon_bandwidth_update(rdev); rdev 1093 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_display_configuration_changed(rdev); rdev 1097 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_ring *ring = &rdev->ring[i]; rdev 1099 drivers/gpu/drm/radeon/radeon_pm.c radeon_fence_wait_empty(rdev, i); rdev 1103 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_set_power_state(rdev); rdev 1106 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; rdev 1108 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_post_set_power_state(rdev); rdev 1110 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; rdev 1111 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; rdev 1112 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.single_display = single_display; rdev 1114 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.force_performance_level) { rdev 1115 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm.thermal_active) { rdev 1116 drivers/gpu/drm/radeon/radeon_pm.c enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; rdev 1118 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW); rdev 1120 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.forced_level = level; rdev 1123 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); rdev 1128 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->ring_lock); rdev 1129 drivers/gpu/drm/radeon/radeon_pm.c up_write(&rdev->pm.mclk_lock); rdev 1132 drivers/gpu/drm/radeon/radeon_pm.c void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable) rdev 1136 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.powergate_uvd) { rdev 1137 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1140 drivers/gpu/drm/radeon/radeon_pm.c enable |= rdev->pm.dpm.sd > 0; rdev 1141 drivers/gpu/drm/radeon/radeon_pm.c enable |= rdev->pm.dpm.hd > 0; rdev 1143 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_powergate_uvd(rdev, !enable); rdev 1144 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1147 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1148 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.uvd_active = true; rdev 1151 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) rdev 1153 drivers/gpu/drm/radeon/radeon_pm.c else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) rdev 1155 drivers/gpu/drm/radeon/radeon_pm.c else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) rdev 1157 drivers/gpu/drm/radeon/radeon_pm.c else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) rdev 1162 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.state = dpm_state; rdev 1163 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1165 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1166 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.uvd_active = false; rdev 1167 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1170 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks(rdev); rdev 1174 drivers/gpu/drm/radeon/radeon_pm.c void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable) rdev 1177 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1178 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.vce_active = true; rdev 1180 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; rdev 1181 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1183 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1184 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.vce_active = false; rdev 1185 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1188 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks(rdev); rdev 1191 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_suspend_old(struct radeon_device *rdev) rdev 1193 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1194 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DYNPM) { rdev 1195 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) rdev 1196 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; rdev 1198 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1200 drivers/gpu/drm/radeon/radeon_pm.c cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); rdev 1203 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_suspend_dpm(struct radeon_device *rdev) rdev 1205 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1207 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_disable(rdev); rdev 1209 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; rdev 1210 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm_enabled = false; rdev 1211 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1214 drivers/gpu/drm/radeon/radeon_pm.c void radeon_pm_suspend(struct radeon_device *rdev) rdev 1216 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 1217 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_suspend_dpm(rdev); rdev 1219 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_suspend_old(rdev); rdev 1222 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_resume_old(struct radeon_device *rdev) rdev 1225 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->family >= CHIP_BARTS) && rdev 1226 drivers/gpu/drm/radeon/radeon_pm.c (rdev->family <= CHIP_CAYMAN) && rdev 1227 drivers/gpu/drm/radeon/radeon_pm.c rdev->mc_fw) { rdev 1228 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddc) rdev 1229 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, rdev 1231 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddci) rdev 1232 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, rdev 1234 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_sclk) rdev 1235 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_engine_clock(rdev, rdev->pm.default_sclk); rdev 1236 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_mclk) rdev 1237 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_memory_clock(rdev, rdev->pm.default_mclk); rdev 1240 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1241 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; rdev 1242 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_clock_mode_index = 0; rdev 1243 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_sclk = rdev->pm.default_sclk; rdev 1244 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_mclk = rdev->pm.default_mclk; rdev 1245 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.power_state) { rdev 1246 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; rdev 1247 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.vddci; rdev 1249 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DYNPM rdev 1250 drivers/gpu/drm/radeon/radeon_pm.c && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { rdev 1251 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; rdev 1252 drivers/gpu/drm/radeon/radeon_pm.c schedule_delayed_work(&rdev->pm.dynpm_idle_work, rdev 1255 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1256 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks(rdev); rdev 1259 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_resume_dpm(struct radeon_device *rdev) rdev 1264 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1265 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; rdev 1266 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_setup_asic(rdev); rdev 1267 drivers/gpu/drm/radeon/radeon_pm.c ret = radeon_dpm_enable(rdev); rdev 1268 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1271 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm_enabled = true; rdev 1276 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->family >= CHIP_BARTS) && rdev 1277 drivers/gpu/drm/radeon/radeon_pm.c (rdev->family <= CHIP_CAYMAN) && rdev 1278 drivers/gpu/drm/radeon/radeon_pm.c rdev->mc_fw) { rdev 1279 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddc) rdev 1280 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, rdev 1282 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddci) rdev 1283 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, rdev 1285 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_sclk) rdev 1286 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_engine_clock(rdev, rdev->pm.default_sclk); rdev 1287 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_mclk) rdev 1288 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_memory_clock(rdev, rdev->pm.default_mclk); rdev 1292 drivers/gpu/drm/radeon/radeon_pm.c void radeon_pm_resume(struct radeon_device *rdev) rdev 1294 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 1295 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_resume_dpm(rdev); rdev 1297 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_resume_old(rdev); rdev 1300 drivers/gpu/drm/radeon/radeon_pm.c static int radeon_pm_init_old(struct radeon_device *rdev) rdev 1304 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile = PM_PROFILE_DEFAULT; rdev 1305 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; rdev 1306 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; rdev 1307 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_can_upclock = true; rdev 1308 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_can_downclock = true; rdev 1309 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_sclk = rdev->clock.default_sclk; rdev 1310 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_mclk = rdev->clock.default_mclk; rdev 1311 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_sclk = rdev->clock.default_sclk; rdev 1312 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_mclk = rdev->clock.default_mclk; rdev 1313 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; rdev 1315 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->bios) { rdev 1316 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->is_atom_bios) rdev 1317 drivers/gpu/drm/radeon/radeon_pm.c radeon_atombios_get_power_modes(rdev); rdev 1319 drivers/gpu/drm/radeon/radeon_pm.c radeon_combios_get_power_modes(rdev); rdev 1320 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_print_states(rdev); rdev 1321 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_init_profile(rdev); rdev 1323 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->family >= CHIP_BARTS) && rdev 1324 drivers/gpu/drm/radeon/radeon_pm.c (rdev->family <= CHIP_CAYMAN) && rdev 1325 drivers/gpu/drm/radeon/radeon_pm.c rdev->mc_fw) { rdev 1326 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddc) rdev 1327 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, rdev 1329 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddci) rdev 1330 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, rdev 1332 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_sclk) rdev 1333 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_engine_clock(rdev, rdev->pm.default_sclk); rdev 1334 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_mclk) rdev 1335 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_memory_clock(rdev, rdev->pm.default_mclk); rdev 1340 drivers/gpu/drm/radeon/radeon_pm.c ret = radeon_hwmon_init(rdev); rdev 1344 drivers/gpu/drm/radeon/radeon_pm.c INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); rdev 1346 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.num_power_states > 1) { rdev 1347 drivers/gpu/drm/radeon/radeon_pm.c if (radeon_debugfs_pm_init(rdev)) { rdev 1357 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_dpm_print_power_states(struct radeon_device *rdev) rdev 1361 drivers/gpu/drm/radeon/radeon_pm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 1363 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); rdev 1367 drivers/gpu/drm/radeon/radeon_pm.c static int radeon_pm_init_dpm(struct radeon_device *rdev) rdev 1372 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; rdev 1373 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; rdev 1374 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; rdev 1375 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_sclk = rdev->clock.default_sclk; rdev 1376 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.default_mclk = rdev->clock.default_mclk; rdev 1377 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_sclk = rdev->clock.default_sclk; rdev 1378 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.current_mclk = rdev->clock.default_mclk; rdev 1379 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; rdev 1381 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->bios && rdev->is_atom_bios) rdev 1382 drivers/gpu/drm/radeon/radeon_pm.c radeon_atombios_get_power_modes(rdev); rdev 1387 drivers/gpu/drm/radeon/radeon_pm.c ret = radeon_hwmon_init(rdev); rdev 1391 drivers/gpu/drm/radeon/radeon_pm.c INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); rdev 1392 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1393 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_init(rdev); rdev 1394 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; rdev 1396 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_print_power_states(rdev); rdev 1397 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_setup_asic(rdev); rdev 1398 drivers/gpu/drm/radeon/radeon_pm.c ret = radeon_dpm_enable(rdev); rdev 1399 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1402 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm_enabled = true; rdev 1404 drivers/gpu/drm/radeon/radeon_pm.c if (radeon_debugfs_pm_init(rdev)) { rdev 1413 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm_enabled = false; rdev 1414 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->family >= CHIP_BARTS) && rdev 1415 drivers/gpu/drm/radeon/radeon_pm.c (rdev->family <= CHIP_CAYMAN) && rdev 1416 drivers/gpu/drm/radeon/radeon_pm.c rdev->mc_fw) { rdev 1417 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddc) rdev 1418 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, rdev 1420 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_vddci) rdev 1421 drivers/gpu/drm/radeon/radeon_pm.c radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, rdev 1423 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_sclk) rdev 1424 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_engine_clock(rdev, rdev->pm.default_sclk); rdev 1425 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.default_mclk) rdev 1426 drivers/gpu/drm/radeon/radeon_pm.c radeon_set_memory_clock(rdev, rdev->pm.default_mclk); rdev 1448 drivers/gpu/drm/radeon/radeon_pm.c int radeon_pm_init(struct radeon_device *rdev) rdev 1455 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pdev->vendor == p->chip_vendor && rdev 1456 drivers/gpu/drm/radeon/radeon_pm.c rdev->pdev->device == p->chip_device && rdev 1457 drivers/gpu/drm/radeon/radeon_pm.c rdev->pdev->subsystem_vendor == p->subsys_vendor && rdev 1458 drivers/gpu/drm/radeon/radeon_pm.c rdev->pdev->subsystem_device == p->subsys_device) { rdev 1466 drivers/gpu/drm/radeon/radeon_pm.c switch (rdev->family) { rdev 1476 drivers/gpu/drm/radeon/radeon_pm.c if (!rdev->rlc_fw) rdev 1477 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1478 drivers/gpu/drm/radeon/radeon_pm.c else if ((rdev->family >= CHIP_RV770) && rdev 1479 drivers/gpu/drm/radeon/radeon_pm.c (!(rdev->flags & RADEON_IS_IGP)) && rdev 1480 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->smc_fw)) rdev 1481 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1483 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_DPM; rdev 1485 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1514 drivers/gpu/drm/radeon/radeon_pm.c if (!rdev->rlc_fw) rdev 1515 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1516 drivers/gpu/drm/radeon/radeon_pm.c else if ((rdev->family >= CHIP_RV770) && rdev 1517 drivers/gpu/drm/radeon/radeon_pm.c (!(rdev->flags & RADEON_IS_IGP)) && rdev 1518 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->smc_fw)) rdev 1519 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1521 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1523 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1525 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_DPM; rdev 1529 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.pm_method = PM_METHOD_PROFILE; rdev 1533 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 1534 drivers/gpu/drm/radeon/radeon_pm.c return radeon_pm_init_dpm(rdev); rdev 1536 drivers/gpu/drm/radeon/radeon_pm.c return radeon_pm_init_old(rdev); rdev 1539 drivers/gpu/drm/radeon/radeon_pm.c int radeon_pm_late_init(struct radeon_device *rdev) rdev 1543 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DPM) { rdev 1544 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dpm_enabled) { rdev 1545 drivers/gpu/drm/radeon/radeon_pm.c if (!rdev->pm.sysfs_initialized) { rdev 1546 drivers/gpu/drm/radeon/radeon_pm.c ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); rdev 1549 drivers/gpu/drm/radeon/radeon_pm.c ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); rdev 1553 drivers/gpu/drm/radeon/radeon_pm.c ret = device_create_file(rdev->dev, &dev_attr_power_profile); rdev 1556 drivers/gpu/drm/radeon/radeon_pm.c ret = device_create_file(rdev->dev, &dev_attr_power_method); rdev 1559 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.sysfs_initialized = true; rdev 1562 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1563 drivers/gpu/drm/radeon/radeon_pm.c ret = radeon_dpm_late_enable(rdev); rdev 1564 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1566 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm_enabled = false; rdev 1572 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks(rdev); rdev 1576 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->pm.num_power_states > 1) && rdev 1577 drivers/gpu/drm/radeon/radeon_pm.c (!rdev->pm.sysfs_initialized)) { rdev 1579 drivers/gpu/drm/radeon/radeon_pm.c ret = device_create_file(rdev->dev, &dev_attr_power_profile); rdev 1582 drivers/gpu/drm/radeon/radeon_pm.c ret = device_create_file(rdev->dev, &dev_attr_power_method); rdev 1586 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.sysfs_initialized = true; rdev 1592 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_fini_old(struct radeon_device *rdev) rdev 1594 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.num_power_states > 1) { rdev 1595 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1596 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_PROFILE) { rdev 1597 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.profile = PM_PROFILE_DEFAULT; rdev 1598 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_update_profile(rdev); rdev 1599 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 1600 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { rdev 1602 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; rdev 1603 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; rdev 1604 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 1606 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1608 drivers/gpu/drm/radeon/radeon_pm.c cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); rdev 1610 drivers/gpu/drm/radeon/radeon_pm.c device_remove_file(rdev->dev, &dev_attr_power_profile); rdev 1611 drivers/gpu/drm/radeon/radeon_pm.c device_remove_file(rdev->dev, &dev_attr_power_method); rdev 1614 drivers/gpu/drm/radeon/radeon_pm.c radeon_hwmon_fini(rdev); rdev 1615 drivers/gpu/drm/radeon/radeon_pm.c kfree(rdev->pm.power_state); rdev 1618 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_fini_dpm(struct radeon_device *rdev) rdev 1620 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.num_power_states > 1) { rdev 1621 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1622 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_disable(rdev); rdev 1623 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1625 drivers/gpu/drm/radeon/radeon_pm.c device_remove_file(rdev->dev, &dev_attr_power_dpm_state); rdev 1626 drivers/gpu/drm/radeon/radeon_pm.c device_remove_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); rdev 1628 drivers/gpu/drm/radeon/radeon_pm.c device_remove_file(rdev->dev, &dev_attr_power_profile); rdev 1629 drivers/gpu/drm/radeon/radeon_pm.c device_remove_file(rdev->dev, &dev_attr_power_method); rdev 1631 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_fini(rdev); rdev 1633 drivers/gpu/drm/radeon/radeon_pm.c radeon_hwmon_fini(rdev); rdev 1634 drivers/gpu/drm/radeon/radeon_pm.c kfree(rdev->pm.power_state); rdev 1637 drivers/gpu/drm/radeon/radeon_pm.c void radeon_pm_fini(struct radeon_device *rdev) rdev 1639 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 1640 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_fini_dpm(rdev); rdev 1642 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_fini_old(rdev); rdev 1645 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_compute_clocks_old(struct radeon_device *rdev) rdev 1647 drivers/gpu/drm/radeon/radeon_pm.c struct drm_device *ddev = rdev->ddev; rdev 1651 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.num_power_states < 2) rdev 1654 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1656 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.active_crtcs = 0; rdev 1657 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.active_crtc_count = 0; rdev 1658 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { rdev 1663 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); rdev 1664 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.active_crtc_count++; rdev 1669 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_PROFILE) { rdev 1670 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_update_profile(rdev); rdev 1671 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 1672 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { rdev 1673 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { rdev 1674 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtc_count > 1) { rdev 1675 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { rdev 1676 drivers/gpu/drm/radeon/radeon_pm.c cancel_delayed_work(&rdev->pm.dynpm_idle_work); rdev 1678 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; rdev 1679 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; rdev 1680 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_get_dynpm_state(rdev); rdev 1681 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 1685 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.active_crtc_count == 1) { rdev 1688 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { rdev 1689 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; rdev 1690 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; rdev 1691 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_get_dynpm_state(rdev); rdev 1692 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 1694 drivers/gpu/drm/radeon/radeon_pm.c schedule_delayed_work(&rdev->pm.dynpm_idle_work, rdev 1696 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { rdev 1697 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; rdev 1698 drivers/gpu/drm/radeon/radeon_pm.c schedule_delayed_work(&rdev->pm.dynpm_idle_work, rdev 1703 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { rdev 1704 drivers/gpu/drm/radeon/radeon_pm.c cancel_delayed_work(&rdev->pm.dynpm_idle_work); rdev 1706 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; rdev 1707 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; rdev 1708 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_get_dynpm_state(rdev); rdev 1709 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 1715 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1718 drivers/gpu/drm/radeon/radeon_pm.c static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev) rdev 1720 drivers/gpu/drm/radeon/radeon_pm.c struct drm_device *ddev = rdev->ddev; rdev 1724 drivers/gpu/drm/radeon/radeon_pm.c if (!rdev->pm.dpm_enabled) rdev 1727 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1730 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.new_active_crtcs = 0; rdev 1731 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.new_active_crtc_count = 0; rdev 1732 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { rdev 1737 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); rdev 1738 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.new_active_crtc_count++; rdev 1745 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.ac_power = true; rdev 1747 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dpm.ac_power = false; rdev 1749 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_change_power_state_locked(rdev); rdev 1751 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1755 drivers/gpu/drm/radeon/radeon_pm.c void radeon_pm_compute_clocks(struct radeon_device *rdev) rdev 1757 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 1758 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks_dpm(rdev); rdev 1760 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_compute_clocks_old(rdev); rdev 1763 drivers/gpu/drm/radeon/radeon_pm.c static bool radeon_pm_in_vbl(struct radeon_device *rdev) rdev 1771 drivers/gpu/drm/radeon/radeon_pm.c for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) { rdev 1772 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.active_crtcs & (1 << crtc)) { rdev 1773 drivers/gpu/drm/radeon/radeon_pm.c vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev, rdev 1777 drivers/gpu/drm/radeon/radeon_pm.c &rdev->mode_info.crtcs[crtc]->base.hwmode); rdev 1787 drivers/gpu/drm/radeon/radeon_pm.c static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish) rdev 1790 drivers/gpu/drm/radeon/radeon_pm.c bool in_vbl = radeon_pm_in_vbl(rdev); rdev 1800 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev; rdev 1802 drivers/gpu/drm/radeon/radeon_pm.c rdev = container_of(work, struct radeon_device, rdev 1805 drivers/gpu/drm/radeon/radeon_pm.c resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); rdev 1806 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1807 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { rdev 1812 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_ring *ring = &rdev->ring[i]; rdev 1815 drivers/gpu/drm/radeon/radeon_pm.c not_processed += radeon_fence_count_emitted(rdev, i); rdev 1822 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { rdev 1823 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; rdev 1824 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && rdev 1825 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_can_upclock) { rdev 1826 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = rdev 1828 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_action_timeout = jiffies + rdev 1832 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { rdev 1833 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; rdev 1834 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && rdev 1835 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_can_downclock) { rdev 1836 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_planned_action = rdev 1838 drivers/gpu/drm/radeon/radeon_pm.c rdev->pm.dynpm_action_timeout = jiffies + rdev 1846 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && rdev 1847 drivers/gpu/drm/radeon/radeon_pm.c jiffies > rdev->pm.dynpm_action_timeout) { rdev 1848 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_get_dynpm_state(rdev); rdev 1849 drivers/gpu/drm/radeon/radeon_pm.c radeon_pm_set_clocks(rdev); rdev 1852 drivers/gpu/drm/radeon/radeon_pm.c schedule_delayed_work(&rdev->pm.dynpm_idle_work, rdev 1855 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1856 drivers/gpu/drm/radeon/radeon_pm.c ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); rdev 1868 drivers/gpu/drm/radeon/radeon_pm.c struct radeon_device *rdev = dev->dev_private; rdev 1869 drivers/gpu/drm/radeon/radeon_pm.c struct drm_device *ddev = rdev->ddev; rdev 1871 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->flags & RADEON_IS_PX) && rdev 1874 drivers/gpu/drm/radeon/radeon_pm.c } else if (rdev->pm.dpm_enabled) { rdev 1875 drivers/gpu/drm/radeon/radeon_pm.c mutex_lock(&rdev->pm.mutex); rdev 1876 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->dpm.debugfs_print_current_performance_level) rdev 1877 drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_debugfs_print_current_performance_level(rdev, m); rdev 1880 drivers/gpu/drm/radeon/radeon_pm.c mutex_unlock(&rdev->pm.mutex); rdev 1882 drivers/gpu/drm/radeon/radeon_pm.c seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); rdev 1884 drivers/gpu/drm/radeon/radeon_pm.c if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) rdev 1885 drivers/gpu/drm/radeon/radeon_pm.c seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); rdev 1887 drivers/gpu/drm/radeon/radeon_pm.c seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); rdev 1888 drivers/gpu/drm/radeon/radeon_pm.c seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); rdev 1889 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_memory_clock) rdev 1890 drivers/gpu/drm/radeon/radeon_pm.c seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); rdev 1891 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->pm.current_vddc) rdev 1892 drivers/gpu/drm/radeon/radeon_pm.c seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); rdev 1893 drivers/gpu/drm/radeon/radeon_pm.c if (rdev->asic->pm.get_pcie_lanes) rdev 1894 drivers/gpu/drm/radeon/radeon_pm.c seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); rdev 1905 drivers/gpu/drm/radeon/radeon_pm.c static int radeon_debugfs_pm_init(struct radeon_device *rdev) rdev 1908 drivers/gpu/drm/radeon/radeon_pm.c return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); rdev 67 drivers/gpu/drm/radeon/radeon_prime.c struct radeon_device *rdev = dev->dev_private; rdev 72 drivers/gpu/drm/radeon/radeon_prime.c ret = radeon_bo_create(rdev, attach->dmabuf->size, PAGE_SIZE, false, rdev 78 drivers/gpu/drm/radeon/radeon_prime.c mutex_lock(&rdev->gem.mutex); rdev 79 drivers/gpu/drm/radeon/radeon_prime.c list_add_tail(&bo->list, &rdev->gem.objects); rdev 80 drivers/gpu/drm/radeon/radeon_prime.c mutex_unlock(&rdev->gem.mutex); rdev 49 drivers/gpu/drm/radeon/radeon_ring.c static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring); rdev 61 drivers/gpu/drm/radeon/radeon_ring.c bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev, rdev 82 drivers/gpu/drm/radeon/radeon_ring.c void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring) rdev 84 drivers/gpu/drm/radeon/radeon_ring.c uint32_t rptr = radeon_ring_get_rptr(rdev, ring); rdev 94 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_lockup_update(rdev, ring); rdev 108 drivers/gpu/drm/radeon/radeon_ring.c int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw) rdev 117 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_free_size(rdev, ring); rdev 120 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_free_size(rdev, ring); rdev 124 drivers/gpu/drm/radeon/radeon_ring.c r = radeon_fence_wait_next(rdev, ring->idx); rdev 144 drivers/gpu/drm/radeon/radeon_ring.c int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw) rdev 148 drivers/gpu/drm/radeon/radeon_ring.c mutex_lock(&rdev->ring_lock); rdev 149 drivers/gpu/drm/radeon/radeon_ring.c r = radeon_ring_alloc(rdev, ring, ndw); rdev 151 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 168 drivers/gpu/drm/radeon/radeon_ring.c void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring, rdev 174 drivers/gpu/drm/radeon/radeon_ring.c if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush) rdev 175 drivers/gpu/drm/radeon/radeon_ring.c rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring); rdev 184 drivers/gpu/drm/radeon/radeon_ring.c if (hdp_flush && rdev->asic->mmio_hdp_flush) rdev 185 drivers/gpu/drm/radeon/radeon_ring.c rdev->asic->mmio_hdp_flush(rdev); rdev 186 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_set_wptr(rdev, ring); rdev 199 drivers/gpu/drm/radeon/radeon_ring.c void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring, rdev 202 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_commit(rdev, ring, hdp_flush); rdev 203 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 225 drivers/gpu/drm/radeon/radeon_ring.c void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring) rdev 228 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 238 drivers/gpu/drm/radeon/radeon_ring.c void radeon_ring_lockup_update(struct radeon_device *rdev, rdev 241 drivers/gpu/drm/radeon/radeon_ring.c atomic_set(&ring->last_rptr, radeon_ring_get_rptr(rdev, ring)); rdev 251 drivers/gpu/drm/radeon/radeon_ring.c bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 253 drivers/gpu/drm/radeon/radeon_ring.c uint32_t rptr = radeon_ring_get_rptr(rdev, ring); rdev 259 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_lockup_update(rdev, ring); rdev 265 drivers/gpu/drm/radeon/radeon_ring.c dev_err(rdev->dev, "ring %d stalled for more than %llumsec\n", rdev 281 drivers/gpu/drm/radeon/radeon_ring.c unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring, rdev 287 drivers/gpu/drm/radeon/radeon_ring.c mutex_lock(&rdev->ring_lock); rdev 291 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 296 drivers/gpu/drm/radeon/radeon_ring.c if (!radeon_fence_count_emitted(rdev, ring->idx)) { rdev 297 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 304 drivers/gpu/drm/radeon/radeon_ring.c else if (rdev->wb.enabled) rdev 308 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 316 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 323 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 331 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 345 drivers/gpu/drm/radeon/radeon_ring.c int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, rdev 354 drivers/gpu/drm/radeon/radeon_ring.c r = radeon_ring_lock(rdev, ring, size); rdev 362 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_unlock_commit(rdev, ring, false); rdev 379 drivers/gpu/drm/radeon/radeon_ring.c int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size, rdev 389 drivers/gpu/drm/radeon/radeon_ring.c r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true, rdev 393 drivers/gpu/drm/radeon/radeon_ring.c dev_err(rdev->dev, "(%d) ring create failed\n", r); rdev 403 drivers/gpu/drm/radeon/radeon_ring.c dev_err(rdev->dev, "(%d) ring pin failed\n", r); rdev 410 drivers/gpu/drm/radeon/radeon_ring.c dev_err(rdev->dev, "(%d) ring map failed\n", r); rdev 416 drivers/gpu/drm/radeon/radeon_ring.c if (rdev->wb.enabled) { rdev 418 drivers/gpu/drm/radeon/radeon_ring.c ring->next_rptr_gpu_addr = rdev->wb.gpu_addr + index; rdev 419 drivers/gpu/drm/radeon/radeon_ring.c ring->next_rptr_cpu_addr = &rdev->wb.wb[index/4]; rdev 421 drivers/gpu/drm/radeon/radeon_ring.c if (radeon_debugfs_ring_init(rdev, ring)) { rdev 424 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_lockup_update(rdev, ring); rdev 436 drivers/gpu/drm/radeon/radeon_ring.c void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring) rdev 441 drivers/gpu/drm/radeon/radeon_ring.c mutex_lock(&rdev->ring_lock); rdev 446 drivers/gpu/drm/radeon/radeon_ring.c mutex_unlock(&rdev->ring_lock); rdev 468 drivers/gpu/drm/radeon/radeon_ring.c struct radeon_device *rdev = dev->dev_private; rdev 470 drivers/gpu/drm/radeon/radeon_ring.c struct radeon_ring *ring = &rdev->ring[ridx]; rdev 475 drivers/gpu/drm/radeon/radeon_ring.c radeon_ring_free_size(rdev, ring); rdev 478 drivers/gpu/drm/radeon/radeon_ring.c wptr = radeon_ring_get_wptr(rdev, ring); rdev 482 drivers/gpu/drm/radeon/radeon_ring.c rptr = radeon_ring_get_rptr(rdev, ring); rdev 543 drivers/gpu/drm/radeon/radeon_ring.c static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring) rdev 552 drivers/gpu/drm/radeon/radeon_ring.c if (&rdev->ring[ridx] != ring) rdev 555 drivers/gpu/drm/radeon/radeon_ring.c r = radeon_debugfs_add_files(rdev, info, 1); rdev 50 drivers/gpu/drm/radeon/radeon_sa.c int radeon_sa_bo_manager_init(struct radeon_device *rdev, rdev 67 drivers/gpu/drm/radeon/radeon_sa.c r = radeon_bo_create(rdev, size, align, true, rdev 70 drivers/gpu/drm/radeon/radeon_sa.c dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r); rdev 77 drivers/gpu/drm/radeon/radeon_sa.c void radeon_sa_bo_manager_fini(struct radeon_device *rdev, rdev 86 drivers/gpu/drm/radeon/radeon_sa.c dev_err(rdev->dev, "sa_manager is not empty, clearing anyway\n"); rdev 96 drivers/gpu/drm/radeon/radeon_sa.c int radeon_sa_bo_manager_start(struct radeon_device *rdev, rdev 102 drivers/gpu/drm/radeon/radeon_sa.c dev_err(rdev->dev, "no bo for sa manager\n"); rdev 109 drivers/gpu/drm/radeon/radeon_sa.c dev_err(rdev->dev, "(%d) failed to reserve manager bo\n", r); rdev 115 drivers/gpu/drm/radeon/radeon_sa.c dev_err(rdev->dev, "(%d) failed to pin manager bo\n", r); rdev 123 drivers/gpu/drm/radeon/radeon_sa.c int radeon_sa_bo_manager_suspend(struct radeon_device *rdev, rdev 129 drivers/gpu/drm/radeon/radeon_sa.c dev_err(rdev->dev, "no bo for sa manager\n"); rdev 312 drivers/gpu/drm/radeon/radeon_sa.c int radeon_sa_bo_new(struct radeon_device *rdev, rdev 356 drivers/gpu/drm/radeon/radeon_sa.c r = radeon_fence_wait_any(rdev, fences, false); rdev 376 drivers/gpu/drm/radeon/radeon_sa.c void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo, rdev 34 drivers/gpu/drm/radeon/radeon_semaphore.c int radeon_semaphore_create(struct radeon_device *rdev, rdev 43 drivers/gpu/drm/radeon/radeon_semaphore.c r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, rdev 58 drivers/gpu/drm/radeon/radeon_semaphore.c bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ridx, rdev 61 drivers/gpu/drm/radeon/radeon_semaphore.c struct radeon_ring *ring = &rdev->ring[ridx]; rdev 65 drivers/gpu/drm/radeon/radeon_semaphore.c if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, false)) { rdev 75 drivers/gpu/drm/radeon/radeon_semaphore.c bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ridx, rdev 78 drivers/gpu/drm/radeon/radeon_semaphore.c struct radeon_ring *ring = &rdev->ring[ridx]; rdev 82 drivers/gpu/drm/radeon/radeon_semaphore.c if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, true)) { rdev 92 drivers/gpu/drm/radeon/radeon_semaphore.c void radeon_semaphore_free(struct radeon_device *rdev, rdev 100 drivers/gpu/drm/radeon/radeon_semaphore.c dev_err(rdev->dev, "semaphore %p has more waiters than signalers," rdev 103 drivers/gpu/drm/radeon/radeon_semaphore.c radeon_sa_bo_free(rdev, &(*semaphore)->sa_bo, fence); rdev 88 drivers/gpu/drm/radeon/radeon_sync.c int radeon_sync_resv(struct radeon_device *rdev, rdev 102 drivers/gpu/drm/radeon/radeon_sync.c if (fence && fence->rdev == rdev) rdev 115 drivers/gpu/drm/radeon/radeon_sync.c if (fence && fence->rdev == rdev) rdev 136 drivers/gpu/drm/radeon/radeon_sync.c int radeon_sync_rings(struct radeon_device *rdev, rdev 152 drivers/gpu/drm/radeon/radeon_sync.c if (!rdev->ring[i].ready) { rdev 153 drivers/gpu/drm/radeon/radeon_sync.c dev_err(rdev->dev, "Syncing to a disabled ring!"); rdev 164 drivers/gpu/drm/radeon/radeon_sync.c r = radeon_semaphore_create(rdev, &semaphore); rdev 171 drivers/gpu/drm/radeon/radeon_sync.c r = radeon_ring_alloc(rdev, &rdev->ring[i], 16); rdev 176 drivers/gpu/drm/radeon/radeon_sync.c if (!radeon_semaphore_emit_signal(rdev, i, semaphore)) { rdev 178 drivers/gpu/drm/radeon/radeon_sync.c radeon_ring_undo(&rdev->ring[i]); rdev 186 drivers/gpu/drm/radeon/radeon_sync.c if (!radeon_semaphore_emit_wait(rdev, ring, semaphore)) { rdev 188 drivers/gpu/drm/radeon/radeon_sync.c radeon_ring_undo(&rdev->ring[i]); rdev 195 drivers/gpu/drm/radeon/radeon_sync.c radeon_ring_commit(rdev, &rdev->ring[i], false); rdev 211 drivers/gpu/drm/radeon/radeon_sync.c void radeon_sync_free(struct radeon_device *rdev, rdev 218 drivers/gpu/drm/radeon/radeon_sync.c radeon_semaphore_free(rdev, &sync->semaphores[i], fence); rdev 35 drivers/gpu/drm/radeon/radeon_test.c static void radeon_do_test_moves(struct radeon_device *rdev, int flag) rdev 45 drivers/gpu/drm/radeon/radeon_test.c ring = radeon_copy_dma_ring_index(rdev); rdev 48 drivers/gpu/drm/radeon/radeon_test.c ring = radeon_copy_blit_ring_index(rdev); rdev 60 drivers/gpu/drm/radeon/radeon_test.c n = rdev->mc.gtt_size - rdev->gart_pin_size; rdev 70 drivers/gpu/drm/radeon/radeon_test.c r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, rdev 90 drivers/gpu/drm/radeon/radeon_test.c r = radeon_bo_create(rdev, size, PAGE_SIZE, true, rdev 121 drivers/gpu/drm/radeon/radeon_test.c fence = radeon_copy_dma(rdev, gtt_addr, vram_addr, rdev 125 drivers/gpu/drm/radeon/radeon_test.c fence = radeon_copy_blit(rdev, gtt_addr, vram_addr, rdev 158 drivers/gpu/drm/radeon/radeon_test.c (gtt_addr - rdev->mc.gtt_start + rdev 161 drivers/gpu/drm/radeon/radeon_test.c (vram_addr - rdev->mc.vram_start + rdev 172 drivers/gpu/drm/radeon/radeon_test.c fence = radeon_copy_dma(rdev, vram_addr, gtt_addr, rdev 176 drivers/gpu/drm/radeon/radeon_test.c fence = radeon_copy_blit(rdev, vram_addr, gtt_addr, rdev 209 drivers/gpu/drm/radeon/radeon_test.c (vram_addr - rdev->mc.vram_start + rdev 212 drivers/gpu/drm/radeon/radeon_test.c (gtt_addr - rdev->mc.gtt_start + rdev 222 drivers/gpu/drm/radeon/radeon_test.c gtt_addr - rdev->mc.gtt_start); rdev 254 drivers/gpu/drm/radeon/radeon_test.c void radeon_test_moves(struct radeon_device *rdev) rdev 256 drivers/gpu/drm/radeon/radeon_test.c if (rdev->asic->copy.dma) rdev 257 drivers/gpu/drm/radeon/radeon_test.c radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA); rdev 258 drivers/gpu/drm/radeon/radeon_test.c if (rdev->asic->copy.blit) rdev 259 drivers/gpu/drm/radeon/radeon_test.c radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT); rdev 262 drivers/gpu/drm/radeon/radeon_test.c static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, rdev 270 drivers/gpu/drm/radeon/radeon_test.c r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL); rdev 276 drivers/gpu/drm/radeon/radeon_test.c r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence); rdev 284 drivers/gpu/drm/radeon/radeon_test.c r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL); rdev 290 drivers/gpu/drm/radeon/radeon_test.c r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence); rdev 297 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ring, 64); rdev 302 drivers/gpu/drm/radeon/radeon_test.c r = radeon_fence_emit(rdev, fence, ring->idx); rdev 305 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_undo(rdev, ring); rdev 308 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ring, false); rdev 313 drivers/gpu/drm/radeon/radeon_test.c void radeon_test_ring_sync(struct radeon_device *rdev, rdev 321 drivers/gpu/drm/radeon/radeon_test.c r = radeon_semaphore_create(rdev, &semaphore); rdev 327 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringA, 64); rdev 332 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); rdev 333 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringA, false); rdev 335 drivers/gpu/drm/radeon/radeon_test.c r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1); rdev 339 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringA, 64); rdev 344 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); rdev 345 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringA, false); rdev 347 drivers/gpu/drm/radeon/radeon_test.c r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2); rdev 358 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringB, 64); rdev 363 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); rdev 364 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringB, false); rdev 379 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringB, 64); rdev 384 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore); rdev 385 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringB, false); rdev 394 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_free(rdev, &semaphore, NULL); rdev 406 drivers/gpu/drm/radeon/radeon_test.c static void radeon_test_ring_sync2(struct radeon_device *rdev, rdev 416 drivers/gpu/drm/radeon/radeon_test.c r = radeon_semaphore_create(rdev, &semaphore); rdev 422 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringA, 64); rdev 427 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore); rdev 428 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringA, false); rdev 430 drivers/gpu/drm/radeon/radeon_test.c r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA); rdev 434 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringB, 64); rdev 439 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore); rdev 440 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringB, false); rdev 441 drivers/gpu/drm/radeon/radeon_test.c r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB); rdev 456 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringC, 64); rdev 461 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); rdev 462 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringC, false); rdev 482 drivers/gpu/drm/radeon/radeon_test.c r = radeon_ring_lock(rdev, ringC, 64); rdev 487 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); rdev 488 drivers/gpu/drm/radeon/radeon_test.c radeon_ring_unlock_commit(rdev, ringC, false); rdev 504 drivers/gpu/drm/radeon/radeon_test.c radeon_semaphore_free(rdev, &semaphore, NULL); rdev 526 drivers/gpu/drm/radeon/radeon_test.c void radeon_test_syncing(struct radeon_device *rdev) rdev 531 drivers/gpu/drm/radeon/radeon_test.c struct radeon_ring *ringA = &rdev->ring[i]; rdev 536 drivers/gpu/drm/radeon/radeon_test.c struct radeon_ring *ringB = &rdev->ring[j]; rdev 544 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync(rdev, ringA, ringB); rdev 547 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync(rdev, ringB, ringA); rdev 550 drivers/gpu/drm/radeon/radeon_test.c struct radeon_ring *ringC = &rdev->ring[k]; rdev 561 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync2(rdev, ringA, ringB, ringC); rdev 564 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync2(rdev, ringA, ringC, ringB); rdev 567 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync2(rdev, ringB, ringA, ringC); rdev 570 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync2(rdev, ringB, ringC, ringA); rdev 573 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync2(rdev, ringC, ringA, ringB); rdev 576 drivers/gpu/drm/radeon/radeon_test.c radeon_test_ring_sync2(rdev, ringC, ringB, ringA); rdev 43 drivers/gpu/drm/radeon/radeon_trace.h p->rdev, p->ring); rdev 56 drivers/gpu/drm/radeon/radeon_ttm.c static int radeon_ttm_debugfs_init(struct radeon_device *rdev); rdev 57 drivers/gpu/drm/radeon/radeon_ttm.c static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); rdev 62 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 65 drivers/gpu/drm/radeon/radeon_ttm.c rdev = container_of(mman, struct radeon_device, mman); rdev 66 drivers/gpu/drm/radeon/radeon_ttm.c return rdev; rdev 77 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 79 drivers/gpu/drm/radeon/radeon_ttm.c rdev = radeon_get_rdev(bdev); rdev 90 drivers/gpu/drm/radeon/radeon_ttm.c man->gpu_offset = rdev->mc.gtt_start; rdev 95 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->flags & RADEON_IS_AGP) { rdev 96 drivers/gpu/drm/radeon/radeon_ttm.c if (!rdev->ddev->agp) { rdev 101 drivers/gpu/drm/radeon/radeon_ttm.c if (!rdev->ddev->agp->cant_use_aperture) rdev 112 drivers/gpu/drm/radeon/radeon_ttm.c man->gpu_offset = rdev->mc.vram_start; rdev 146 drivers/gpu/drm/radeon/radeon_ttm.c if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) rdev 148 drivers/gpu/drm/radeon/radeon_ttm.c else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && rdev 149 drivers/gpu/drm/radeon/radeon_ttm.c bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { rdev 150 drivers/gpu/drm/radeon/radeon_ttm.c unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; rdev 206 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 212 drivers/gpu/drm/radeon/radeon_ttm.c rdev = radeon_get_rdev(bo->bdev); rdev 213 drivers/gpu/drm/radeon/radeon_ttm.c ridx = radeon_copy_ring_index(rdev); rdev 219 drivers/gpu/drm/radeon/radeon_ttm.c old_start += rdev->mc.vram_start; rdev 222 drivers/gpu/drm/radeon/radeon_ttm.c old_start += rdev->mc.gtt_start; rdev 230 drivers/gpu/drm/radeon/radeon_ttm.c new_start += rdev->mc.vram_start; rdev 233 drivers/gpu/drm/radeon/radeon_ttm.c new_start += rdev->mc.gtt_start; rdev 239 drivers/gpu/drm/radeon/radeon_ttm.c if (!rdev->ring[ridx].ready) { rdev 247 drivers/gpu/drm/radeon/radeon_ttm.c fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); rdev 343 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 357 drivers/gpu/drm/radeon/radeon_ttm.c rdev = radeon_get_rdev(bo->bdev); rdev 370 drivers/gpu/drm/radeon/radeon_ttm.c if (!rdev->ring[radeon_copy_ring_index(rdev)].ready || rdev 371 drivers/gpu/drm/radeon/radeon_ttm.c rdev->asic->copy.copy == NULL) { rdev 398 drivers/gpu/drm/radeon/radeon_ttm.c atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved); rdev 405 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = radeon_get_rdev(bdev); rdev 420 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->flags & RADEON_IS_AGP) { rdev 423 drivers/gpu/drm/radeon/radeon_ttm.c mem->bus.base = rdev->mc.agp_base; rdev 424 drivers/gpu/drm/radeon/radeon_ttm.c mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; rdev 431 drivers/gpu/drm/radeon/radeon_ttm.c if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size) rdev 433 drivers/gpu/drm/radeon/radeon_ttm.c mem->bus.base = rdev->mc.aper_base; rdev 458 drivers/gpu/drm/radeon/radeon_ttm.c rdev->ddev->hose->dense_mem_base; rdev 476 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 487 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = radeon_get_rdev(ttm->bdev); rdev 530 drivers/gpu/drm/radeon/radeon_ttm.c nents = dma_map_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction); rdev 549 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = radeon_get_rdev(ttm->bdev); rdev 562 drivers/gpu/drm/radeon/radeon_ttm.c dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction); rdev 596 drivers/gpu/drm/radeon/radeon_ttm.c r = radeon_gart_bind(gtt->rdev, gtt->offset, ttm->num_pages, rdev 610 drivers/gpu/drm/radeon/radeon_ttm.c radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages); rdev 635 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 638 drivers/gpu/drm/radeon/radeon_ttm.c rdev = radeon_get_rdev(bo->bdev); rdev 640 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->flags & RADEON_IS_AGP) { rdev 641 drivers/gpu/drm/radeon/radeon_ttm.c return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, rdev 651 drivers/gpu/drm/radeon/radeon_ttm.c gtt->rdev = rdev; rdev 670 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 690 drivers/gpu/drm/radeon/radeon_ttm.c rdev = radeon_get_rdev(ttm->bdev); rdev 692 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->flags & RADEON_IS_AGP) { rdev 698 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->need_swiotlb && swiotlb_nr_tbl()) { rdev 699 drivers/gpu/drm/radeon/radeon_ttm.c return ttm_dma_populate(>t->ttm, rdev->dev, ctx); rdev 703 drivers/gpu/drm/radeon/radeon_ttm.c return ttm_populate_and_map_pages(rdev->dev, >t->ttm, ctx); rdev 708 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 721 drivers/gpu/drm/radeon/radeon_ttm.c rdev = radeon_get_rdev(ttm->bdev); rdev 723 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->flags & RADEON_IS_AGP) { rdev 730 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->need_swiotlb && swiotlb_nr_tbl()) { rdev 731 drivers/gpu/drm/radeon/radeon_ttm.c ttm_dma_unpopulate(>t->ttm, rdev->dev); rdev 736 drivers/gpu/drm/radeon/radeon_ttm.c ttm_unmap_and_unpopulate_pages(rdev->dev, >t->ttm); rdev 789 drivers/gpu/drm/radeon/radeon_ttm.c int radeon_ttm_init(struct radeon_device *rdev) rdev 794 drivers/gpu/drm/radeon/radeon_ttm.c r = ttm_bo_device_init(&rdev->mman.bdev, rdev 796 drivers/gpu/drm/radeon/radeon_ttm.c rdev->ddev->anon_inode->i_mapping, rdev 797 drivers/gpu/drm/radeon/radeon_ttm.c dma_addressing_limited(&rdev->pdev->dev)); rdev 802 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mman.initialized = true; rdev 803 drivers/gpu/drm/radeon/radeon_ttm.c r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, rdev 804 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mc.real_vram_size >> PAGE_SHIFT); rdev 810 drivers/gpu/drm/radeon/radeon_ttm.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 812 drivers/gpu/drm/radeon/radeon_ttm.c r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, rdev 814 drivers/gpu/drm/radeon/radeon_ttm.c NULL, &rdev->stolen_vga_memory); rdev 818 drivers/gpu/drm/radeon/radeon_ttm.c r = radeon_bo_reserve(rdev->stolen_vga_memory, false); rdev 821 drivers/gpu/drm/radeon/radeon_ttm.c r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); rdev 822 drivers/gpu/drm/radeon/radeon_ttm.c radeon_bo_unreserve(rdev->stolen_vga_memory); rdev 824 drivers/gpu/drm/radeon/radeon_ttm.c radeon_bo_unref(&rdev->stolen_vga_memory); rdev 828 drivers/gpu/drm/radeon/radeon_ttm.c (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); rdev 829 drivers/gpu/drm/radeon/radeon_ttm.c r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, rdev 830 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mc.gtt_size >> PAGE_SHIFT); rdev 836 drivers/gpu/drm/radeon/radeon_ttm.c (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); rdev 838 drivers/gpu/drm/radeon/radeon_ttm.c r = radeon_ttm_debugfs_init(rdev); rdev 846 drivers/gpu/drm/radeon/radeon_ttm.c void radeon_ttm_fini(struct radeon_device *rdev) rdev 850 drivers/gpu/drm/radeon/radeon_ttm.c if (!rdev->mman.initialized) rdev 852 drivers/gpu/drm/radeon/radeon_ttm.c radeon_ttm_debugfs_fini(rdev); rdev 853 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->stolen_vga_memory) { rdev 854 drivers/gpu/drm/radeon/radeon_ttm.c r = radeon_bo_reserve(rdev->stolen_vga_memory, false); rdev 856 drivers/gpu/drm/radeon/radeon_ttm.c radeon_bo_unpin(rdev->stolen_vga_memory); rdev 857 drivers/gpu/drm/radeon/radeon_ttm.c radeon_bo_unreserve(rdev->stolen_vga_memory); rdev 859 drivers/gpu/drm/radeon/radeon_ttm.c radeon_bo_unref(&rdev->stolen_vga_memory); rdev 861 drivers/gpu/drm/radeon/radeon_ttm.c ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM); rdev 862 drivers/gpu/drm/radeon/radeon_ttm.c ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT); rdev 863 drivers/gpu/drm/radeon/radeon_ttm.c ttm_bo_device_release(&rdev->mman.bdev); rdev 864 drivers/gpu/drm/radeon/radeon_ttm.c radeon_gart_fini(rdev); rdev 865 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mman.initialized = false; rdev 871 drivers/gpu/drm/radeon/radeon_ttm.c void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) rdev 875 drivers/gpu/drm/radeon/radeon_ttm.c if (!rdev->mman.initialized) rdev 878 drivers/gpu/drm/radeon/radeon_ttm.c man = &rdev->mman.bdev.man[TTM_PL_VRAM]; rdev 889 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev; rdev 896 drivers/gpu/drm/radeon/radeon_ttm.c rdev = radeon_get_rdev(bo->bdev); rdev 897 drivers/gpu/drm/radeon/radeon_ttm.c down_read(&rdev->pm.mclk_lock); rdev 899 drivers/gpu/drm/radeon/radeon_ttm.c up_read(&rdev->pm.mclk_lock); rdev 907 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = file_priv->minor->dev->dev_private; rdev 909 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev == NULL) { rdev 912 drivers/gpu/drm/radeon/radeon_ttm.c r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev); rdev 932 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = dev->dev_private; rdev 933 drivers/gpu/drm/radeon/radeon_ttm.c struct ttm_mem_type_manager *man = &rdev->mman.bdev.man[ttm_pl]; rdev 955 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = inode->i_private; rdev 956 drivers/gpu/drm/radeon/radeon_ttm.c i_size_write(inode, rdev->mc.mc_vram_size); rdev 964 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = f->private_data; rdev 975 drivers/gpu/drm/radeon/radeon_ttm.c if (*pos >= rdev->mc.mc_vram_size) rdev 978 drivers/gpu/drm/radeon/radeon_ttm.c spin_lock_irqsave(&rdev->mmio_idx_lock, flags); rdev 980 drivers/gpu/drm/radeon/radeon_ttm.c if (rdev->family >= CHIP_CEDAR) rdev 983 drivers/gpu/drm/radeon/radeon_ttm.c spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); rdev 1007 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = inode->i_private; rdev 1008 drivers/gpu/drm/radeon/radeon_ttm.c i_size_write(inode, rdev->mc.gtt_size); rdev 1016 drivers/gpu/drm/radeon/radeon_ttm.c struct radeon_device *rdev = f->private_data; rdev 1027 drivers/gpu/drm/radeon/radeon_ttm.c if (p >= rdev->gart.num_cpu_pages) rdev 1030 drivers/gpu/drm/radeon/radeon_ttm.c page = rdev->gart.pages[p]; rdev 1036 drivers/gpu/drm/radeon/radeon_ttm.c kunmap(rdev->gart.pages[p]); rdev 1061 drivers/gpu/drm/radeon/radeon_ttm.c static int radeon_ttm_debugfs_init(struct radeon_device *rdev) rdev 1066 drivers/gpu/drm/radeon/radeon_ttm.c struct drm_minor *minor = rdev->ddev->primary; rdev 1069 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, rdev 1070 drivers/gpu/drm/radeon/radeon_ttm.c root, rdev, rdev 1073 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO, rdev 1074 drivers/gpu/drm/radeon/radeon_ttm.c root, rdev, &radeon_ttm_gtt_fops); rdev 1079 drivers/gpu/drm/radeon/radeon_ttm.c if (!(rdev->need_swiotlb && swiotlb_nr_tbl())) rdev 1083 drivers/gpu/drm/radeon/radeon_ttm.c return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count); rdev 1090 drivers/gpu/drm/radeon/radeon_ttm.c static void radeon_ttm_debugfs_fini(struct radeon_device *rdev) rdev 1094 drivers/gpu/drm/radeon/radeon_ttm.c debugfs_remove(rdev->mman.vram); rdev 1095 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mman.vram = NULL; rdev 1097 drivers/gpu/drm/radeon/radeon_ttm.c debugfs_remove(rdev->mman.gtt); rdev 1098 drivers/gpu/drm/radeon/radeon_ttm.c rdev->mman.gtt = NULL; rdev 66 drivers/gpu/drm/radeon/radeon_uvd.c int radeon_uvd_init(struct radeon_device *rdev) rdev 72 drivers/gpu/drm/radeon/radeon_uvd.c INIT_DELAYED_WORK(&rdev->uvd.idle_work, radeon_uvd_idle_work_handler); rdev 74 drivers/gpu/drm/radeon/radeon_uvd.c switch (rdev->family) { rdev 137 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.fw_header_present = false; rdev 138 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.max_handles = RADEON_DEFAULT_UVD_HANDLES; rdev 141 drivers/gpu/drm/radeon/radeon_uvd.c r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev); rdev 143 drivers/gpu/drm/radeon/radeon_uvd.c dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n", rdev 146 drivers/gpu/drm/radeon/radeon_uvd.c struct common_firmware_header *hdr = (void *)rdev->uvd_fw->data; rdev 149 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_ucode_validate(rdev->uvd_fw); rdev 153 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.fw_header_present = true; rdev 166 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.max_handles = RADEON_MAX_UVD_HANDLES; rdev 176 drivers/gpu/drm/radeon/radeon_uvd.c r = request_firmware(&rdev->uvd_fw, legacy_fw_name, rdev->dev); rdev 178 drivers/gpu/drm/radeon/radeon_uvd.c dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n", rdev 184 drivers/gpu/drm/radeon/radeon_uvd.c bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 8) + rdev 186 drivers/gpu/drm/radeon/radeon_uvd.c RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles; rdev 187 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true, rdev 189 drivers/gpu/drm/radeon/radeon_uvd.c NULL, &rdev->uvd.vcpu_bo); rdev 191 drivers/gpu/drm/radeon/radeon_uvd.c dev_err(rdev->dev, "(%d) failed to allocate UVD bo\n", r); rdev 195 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_bo_reserve(rdev->uvd.vcpu_bo, false); rdev 197 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unref(&rdev->uvd.vcpu_bo); rdev 198 drivers/gpu/drm/radeon/radeon_uvd.c dev_err(rdev->dev, "(%d) failed to reserve UVD bo\n", r); rdev 202 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_bo_pin(rdev->uvd.vcpu_bo, RADEON_GEM_DOMAIN_VRAM, rdev 203 drivers/gpu/drm/radeon/radeon_uvd.c &rdev->uvd.gpu_addr); rdev 205 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unreserve(rdev->uvd.vcpu_bo); rdev 206 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unref(&rdev->uvd.vcpu_bo); rdev 207 drivers/gpu/drm/radeon/radeon_uvd.c dev_err(rdev->dev, "(%d) UVD bo pin failed\n", r); rdev 211 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_bo_kmap(rdev->uvd.vcpu_bo, &rdev->uvd.cpu_addr); rdev 213 drivers/gpu/drm/radeon/radeon_uvd.c dev_err(rdev->dev, "(%d) UVD map failed\n", r); rdev 217 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unreserve(rdev->uvd.vcpu_bo); rdev 219 drivers/gpu/drm/radeon/radeon_uvd.c for (i = 0; i < rdev->uvd.max_handles; ++i) { rdev 220 drivers/gpu/drm/radeon/radeon_uvd.c atomic_set(&rdev->uvd.handles[i], 0); rdev 221 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.filp[i] = NULL; rdev 222 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.img_size[i] = 0; rdev 228 drivers/gpu/drm/radeon/radeon_uvd.c void radeon_uvd_fini(struct radeon_device *rdev) rdev 232 drivers/gpu/drm/radeon/radeon_uvd.c if (rdev->uvd.vcpu_bo == NULL) rdev 235 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_bo_reserve(rdev->uvd.vcpu_bo, false); rdev 237 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_kunmap(rdev->uvd.vcpu_bo); rdev 238 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unpin(rdev->uvd.vcpu_bo); rdev 239 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unreserve(rdev->uvd.vcpu_bo); rdev 242 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unref(&rdev->uvd.vcpu_bo); rdev 244 drivers/gpu/drm/radeon/radeon_uvd.c radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX]); rdev 246 drivers/gpu/drm/radeon/radeon_uvd.c release_firmware(rdev->uvd_fw); rdev 249 drivers/gpu/drm/radeon/radeon_uvd.c int radeon_uvd_suspend(struct radeon_device *rdev) rdev 253 drivers/gpu/drm/radeon/radeon_uvd.c if (rdev->uvd.vcpu_bo == NULL) rdev 256 drivers/gpu/drm/radeon/radeon_uvd.c for (i = 0; i < rdev->uvd.max_handles; ++i) { rdev 257 drivers/gpu/drm/radeon/radeon_uvd.c uint32_t handle = atomic_read(&rdev->uvd.handles[i]); rdev 261 drivers/gpu/drm/radeon/radeon_uvd.c radeon_uvd_note_usage(rdev); rdev 263 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_uvd_get_destroy_msg(rdev, rdev 273 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.filp[i] = NULL; rdev 274 drivers/gpu/drm/radeon/radeon_uvd.c atomic_set(&rdev->uvd.handles[i], 0); rdev 281 drivers/gpu/drm/radeon/radeon_uvd.c int radeon_uvd_resume(struct radeon_device *rdev) rdev 286 drivers/gpu/drm/radeon/radeon_uvd.c if (rdev->uvd.vcpu_bo == NULL) rdev 289 drivers/gpu/drm/radeon/radeon_uvd.c memcpy(rdev->uvd.cpu_addr, rdev->uvd_fw->data, rdev->uvd_fw->size); rdev 291 drivers/gpu/drm/radeon/radeon_uvd.c size = radeon_bo_size(rdev->uvd.vcpu_bo); rdev 292 drivers/gpu/drm/radeon/radeon_uvd.c size -= rdev->uvd_fw->size; rdev 294 drivers/gpu/drm/radeon/radeon_uvd.c ptr = rdev->uvd.cpu_addr; rdev 295 drivers/gpu/drm/radeon/radeon_uvd.c ptr += rdev->uvd_fw->size; rdev 328 drivers/gpu/drm/radeon/radeon_uvd.c void radeon_uvd_free_handles(struct radeon_device *rdev, struct drm_file *filp) rdev 331 drivers/gpu/drm/radeon/radeon_uvd.c for (i = 0; i < rdev->uvd.max_handles; ++i) { rdev 332 drivers/gpu/drm/radeon/radeon_uvd.c uint32_t handle = atomic_read(&rdev->uvd.handles[i]); rdev 333 drivers/gpu/drm/radeon/radeon_uvd.c if (handle != 0 && rdev->uvd.filp[i] == filp) { rdev 336 drivers/gpu/drm/radeon/radeon_uvd.c radeon_uvd_note_usage(rdev); rdev 338 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_uvd_get_destroy_msg(rdev, rdev 348 drivers/gpu/drm/radeon/radeon_uvd.c rdev->uvd.filp[i] = NULL; rdev 349 drivers/gpu/drm/radeon/radeon_uvd.c atomic_set(&rdev->uvd.handles[i], 0); rdev 454 drivers/gpu/drm/radeon/radeon_uvd.c if (p->rdev->family >= CHIP_PALM) rdev 516 drivers/gpu/drm/radeon/radeon_uvd.c for (i = 0; i < p->rdev->uvd.max_handles; ++i) { rdev 517 drivers/gpu/drm/radeon/radeon_uvd.c if (atomic_read(&p->rdev->uvd.handles[i]) == handle) { rdev 522 drivers/gpu/drm/radeon/radeon_uvd.c if (!atomic_cmpxchg(&p->rdev->uvd.handles[i], 0, handle)) { rdev 523 drivers/gpu/drm/radeon/radeon_uvd.c p->rdev->uvd.filp[i] = p->filp; rdev 524 drivers/gpu/drm/radeon/radeon_uvd.c p->rdev->uvd.img_size[i] = img_size; rdev 542 drivers/gpu/drm/radeon/radeon_uvd.c for (i = 0; i < p->rdev->uvd.max_handles; ++i) { rdev 543 drivers/gpu/drm/radeon/radeon_uvd.c if (atomic_read(&p->rdev->uvd.handles[i]) == handle) { rdev 544 drivers/gpu/drm/radeon/radeon_uvd.c if (p->rdev->uvd.filp[i] != p->filp) { rdev 557 drivers/gpu/drm/radeon/radeon_uvd.c for (i = 0; i < p->rdev->uvd.max_handles; ++i) rdev 558 drivers/gpu/drm/radeon/radeon_uvd.c atomic_cmpxchg(&p->rdev->uvd.handles[i], handle, 0); rdev 625 drivers/gpu/drm/radeon/radeon_uvd.c (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) { rdev 740 drivers/gpu/drm/radeon/radeon_uvd.c static int radeon_uvd_send_msg(struct radeon_device *rdev, rdev 747 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_ib_get(rdev, ring, &ib, NULL, 64); rdev 763 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 768 drivers/gpu/drm/radeon/radeon_uvd.c radeon_ib_free(rdev, &ib); rdev 777 drivers/gpu/drm/radeon/radeon_uvd.c int radeon_uvd_get_create_msg(struct radeon_device *rdev, int ring, rdev 781 drivers/gpu/drm/radeon/radeon_uvd.c uint64_t offs = radeon_bo_size(rdev->uvd.vcpu_bo) - rdev 784 drivers/gpu/drm/radeon/radeon_uvd.c uint32_t *msg = rdev->uvd.cpu_addr + offs; rdev 785 drivers/gpu/drm/radeon/radeon_uvd.c uint64_t addr = rdev->uvd.gpu_addr + offs; rdev 789 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_bo_reserve(rdev->uvd.vcpu_bo, true); rdev 808 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_uvd_send_msg(rdev, ring, addr, fence); rdev 809 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unreserve(rdev->uvd.vcpu_bo); rdev 813 drivers/gpu/drm/radeon/radeon_uvd.c int radeon_uvd_get_destroy_msg(struct radeon_device *rdev, int ring, rdev 817 drivers/gpu/drm/radeon/radeon_uvd.c uint64_t offs = radeon_bo_size(rdev->uvd.vcpu_bo) - rdev 820 drivers/gpu/drm/radeon/radeon_uvd.c uint32_t *msg = rdev->uvd.cpu_addr + offs; rdev 821 drivers/gpu/drm/radeon/radeon_uvd.c uint64_t addr = rdev->uvd.gpu_addr + offs; rdev 825 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_bo_reserve(rdev->uvd.vcpu_bo, true); rdev 837 drivers/gpu/drm/radeon/radeon_uvd.c r = radeon_uvd_send_msg(rdev, ring, addr, fence); rdev 838 drivers/gpu/drm/radeon/radeon_uvd.c radeon_bo_unreserve(rdev->uvd.vcpu_bo); rdev 851 drivers/gpu/drm/radeon/radeon_uvd.c static void radeon_uvd_count_handles(struct radeon_device *rdev, rdev 859 drivers/gpu/drm/radeon/radeon_uvd.c for (i = 0; i < rdev->uvd.max_handles; ++i) { rdev 860 drivers/gpu/drm/radeon/radeon_uvd.c if (!atomic_read(&rdev->uvd.handles[i])) rdev 863 drivers/gpu/drm/radeon/radeon_uvd.c if (rdev->uvd.img_size[i] >= 720*576) rdev 872 drivers/gpu/drm/radeon/radeon_uvd.c struct radeon_device *rdev = rdev 875 drivers/gpu/drm/radeon/radeon_uvd.c if (radeon_fence_count_emitted(rdev, R600_RING_TYPE_UVD_INDEX) == 0) { rdev 876 drivers/gpu/drm/radeon/radeon_uvd.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 877 drivers/gpu/drm/radeon/radeon_uvd.c radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd, rdev 878 drivers/gpu/drm/radeon/radeon_uvd.c &rdev->pm.dpm.hd); rdev 879 drivers/gpu/drm/radeon/radeon_uvd.c radeon_dpm_enable_uvd(rdev, false); rdev 881 drivers/gpu/drm/radeon/radeon_uvd.c radeon_set_uvd_clocks(rdev, 0, 0); rdev 884 drivers/gpu/drm/radeon/radeon_uvd.c schedule_delayed_work(&rdev->uvd.idle_work, rdev 889 drivers/gpu/drm/radeon/radeon_uvd.c void radeon_uvd_note_usage(struct radeon_device *rdev) rdev 892 drivers/gpu/drm/radeon/radeon_uvd.c bool set_clocks = !cancel_delayed_work_sync(&rdev->uvd.idle_work); rdev 893 drivers/gpu/drm/radeon/radeon_uvd.c set_clocks &= schedule_delayed_work(&rdev->uvd.idle_work, rdev 896 drivers/gpu/drm/radeon/radeon_uvd.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 898 drivers/gpu/drm/radeon/radeon_uvd.c radeon_uvd_count_handles(rdev, &sd, &hd); rdev 899 drivers/gpu/drm/radeon/radeon_uvd.c if ((rdev->pm.dpm.sd != sd) || rdev 900 drivers/gpu/drm/radeon/radeon_uvd.c (rdev->pm.dpm.hd != hd)) { rdev 901 drivers/gpu/drm/radeon/radeon_uvd.c rdev->pm.dpm.sd = sd; rdev 902 drivers/gpu/drm/radeon/radeon_uvd.c rdev->pm.dpm.hd = hd; rdev 909 drivers/gpu/drm/radeon/radeon_uvd.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 910 drivers/gpu/drm/radeon/radeon_uvd.c radeon_dpm_enable_uvd(rdev, true); rdev 912 drivers/gpu/drm/radeon/radeon_uvd.c radeon_set_uvd_clocks(rdev, 53300, 40000); rdev 959 drivers/gpu/drm/radeon/radeon_uvd.c int radeon_uvd_calc_upll_dividers(struct radeon_device *rdev, rdev 969 drivers/gpu/drm/radeon/radeon_uvd.c unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; rdev 1022 drivers/gpu/drm/radeon/radeon_uvd.c int radeon_uvd_send_upll_ctlreq(struct radeon_device *rdev, rdev 56 drivers/gpu/drm/radeon/radeon_vce.c int radeon_vce_init(struct radeon_device *rdev) rdev 65 drivers/gpu/drm/radeon/radeon_vce.c INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler); rdev 67 drivers/gpu/drm/radeon/radeon_vce.c switch (rdev->family) { rdev 88 drivers/gpu/drm/radeon/radeon_vce.c r = request_firmware(&rdev->vce_fw, fw_name, rdev->dev); rdev 90 drivers/gpu/drm/radeon/radeon_vce.c dev_err(rdev->dev, "radeon_vce: Can't load firmware \"%s\"\n", rdev 97 drivers/gpu/drm/radeon/radeon_vce.c size = rdev->vce_fw->size - strlen(fw_version) - 9; rdev 98 drivers/gpu/drm/radeon/radeon_vce.c c = rdev->vce_fw->data; rdev 112 drivers/gpu/drm/radeon/radeon_vce.c size = rdev->vce_fw->size - strlen(fb_version) - 3; rdev 113 drivers/gpu/drm/radeon/radeon_vce.c c = rdev->vce_fw->data; rdev 122 drivers/gpu/drm/radeon/radeon_vce.c if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1) rdev 126 drivers/gpu/drm/radeon/radeon_vce.c start, mid, end, rdev->vce.fb_version); rdev 128 drivers/gpu/drm/radeon/radeon_vce.c rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8); rdev 131 drivers/gpu/drm/radeon/radeon_vce.c if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) && rdev 132 drivers/gpu/drm/radeon/radeon_vce.c (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) && rdev 133 drivers/gpu/drm/radeon/radeon_vce.c (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8)))) rdev 138 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->family < CHIP_BONAIRE) rdev 139 drivers/gpu/drm/radeon/radeon_vce.c size = vce_v1_0_bo_size(rdev); rdev 141 drivers/gpu/drm/radeon/radeon_vce.c size = vce_v2_0_bo_size(rdev); rdev 142 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_create(rdev, size, PAGE_SIZE, true, rdev 144 drivers/gpu/drm/radeon/radeon_vce.c &rdev->vce.vcpu_bo); rdev 146 drivers/gpu/drm/radeon/radeon_vce.c dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r); rdev 150 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_reserve(rdev->vce.vcpu_bo, false); rdev 152 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unref(&rdev->vce.vcpu_bo); rdev 153 drivers/gpu/drm/radeon/radeon_vce.c dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r); rdev 157 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM, rdev 158 drivers/gpu/drm/radeon/radeon_vce.c &rdev->vce.gpu_addr); rdev 159 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unreserve(rdev->vce.vcpu_bo); rdev 161 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unref(&rdev->vce.vcpu_bo); rdev 162 drivers/gpu/drm/radeon/radeon_vce.c dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r); rdev 167 drivers/gpu/drm/radeon/radeon_vce.c atomic_set(&rdev->vce.handles[i], 0); rdev 168 drivers/gpu/drm/radeon/radeon_vce.c rdev->vce.filp[i] = NULL; rdev 181 drivers/gpu/drm/radeon/radeon_vce.c void radeon_vce_fini(struct radeon_device *rdev) rdev 183 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->vce.vcpu_bo == NULL) rdev 186 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unref(&rdev->vce.vcpu_bo); rdev 188 drivers/gpu/drm/radeon/radeon_vce.c release_firmware(rdev->vce_fw); rdev 197 drivers/gpu/drm/radeon/radeon_vce.c int radeon_vce_suspend(struct radeon_device *rdev) rdev 201 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->vce.vcpu_bo == NULL) rdev 205 drivers/gpu/drm/radeon/radeon_vce.c if (atomic_read(&rdev->vce.handles[i])) rdev 221 drivers/gpu/drm/radeon/radeon_vce.c int radeon_vce_resume(struct radeon_device *rdev) rdev 226 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->vce.vcpu_bo == NULL) rdev 229 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_reserve(rdev->vce.vcpu_bo, false); rdev 231 drivers/gpu/drm/radeon/radeon_vce.c dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r); rdev 235 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr); rdev 237 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unreserve(rdev->vce.vcpu_bo); rdev 238 drivers/gpu/drm/radeon/radeon_vce.c dev_err(rdev->dev, "(%d) VCE map failed\n", r); rdev 242 drivers/gpu/drm/radeon/radeon_vce.c memset(cpu_addr, 0, radeon_bo_size(rdev->vce.vcpu_bo)); rdev 243 drivers/gpu/drm/radeon/radeon_vce.c if (rdev->family < CHIP_BONAIRE) rdev 244 drivers/gpu/drm/radeon/radeon_vce.c r = vce_v1_0_load_fw(rdev, cpu_addr); rdev 246 drivers/gpu/drm/radeon/radeon_vce.c memcpy(cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size); rdev 248 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_kunmap(rdev->vce.vcpu_bo); rdev 250 drivers/gpu/drm/radeon/radeon_vce.c radeon_bo_unreserve(rdev->vce.vcpu_bo); rdev 264 drivers/gpu/drm/radeon/radeon_vce.c struct radeon_device *rdev = rdev 267 drivers/gpu/drm/radeon/radeon_vce.c if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) && rdev 268 drivers/gpu/drm/radeon/radeon_vce.c (radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) { rdev 269 drivers/gpu/drm/radeon/radeon_vce.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 270 drivers/gpu/drm/radeon/radeon_vce.c radeon_dpm_enable_vce(rdev, false); rdev 272 drivers/gpu/drm/radeon/radeon_vce.c radeon_set_vce_clocks(rdev, 0, 0); rdev 275 drivers/gpu/drm/radeon/radeon_vce.c schedule_delayed_work(&rdev->vce.idle_work, rdev 287 drivers/gpu/drm/radeon/radeon_vce.c void radeon_vce_note_usage(struct radeon_device *rdev) rdev 290 drivers/gpu/drm/radeon/radeon_vce.c bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work); rdev 291 drivers/gpu/drm/radeon/radeon_vce.c set_clocks &= schedule_delayed_work(&rdev->vce.idle_work, rdev 294 drivers/gpu/drm/radeon/radeon_vce.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 300 drivers/gpu/drm/radeon/radeon_vce.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 301 drivers/gpu/drm/radeon/radeon_vce.c radeon_dpm_enable_vce(rdev, true); rdev 303 drivers/gpu/drm/radeon/radeon_vce.c radeon_set_vce_clocks(rdev, 53300, 40000); rdev 316 drivers/gpu/drm/radeon/radeon_vce.c void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp) rdev 320 drivers/gpu/drm/radeon/radeon_vce.c uint32_t handle = atomic_read(&rdev->vce.handles[i]); rdev 321 drivers/gpu/drm/radeon/radeon_vce.c if (!handle || rdev->vce.filp[i] != filp) rdev 324 drivers/gpu/drm/radeon/radeon_vce.c radeon_vce_note_usage(rdev); rdev 326 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX, rdev 331 drivers/gpu/drm/radeon/radeon_vce.c rdev->vce.filp[i] = NULL; rdev 332 drivers/gpu/drm/radeon/radeon_vce.c atomic_set(&rdev->vce.handles[i], 0); rdev 346 drivers/gpu/drm/radeon/radeon_vce.c int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring, rdev 354 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4); rdev 390 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 398 drivers/gpu/drm/radeon/radeon_vce.c radeon_ib_free(rdev, &ib); rdev 413 drivers/gpu/drm/radeon/radeon_vce.c int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, rdev 421 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4); rdev 447 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 455 drivers/gpu/drm/radeon/radeon_vce.c radeon_ib_free(rdev, &ib); rdev 528 drivers/gpu/drm/radeon/radeon_vce.c if (atomic_read(&p->rdev->vce.handles[i]) == handle) { rdev 529 drivers/gpu/drm/radeon/radeon_vce.c if (p->rdev->vce.filp[i] != p->filp) { rdev 539 drivers/gpu/drm/radeon/radeon_vce.c if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { rdev 540 drivers/gpu/drm/radeon/radeon_vce.c p->rdev->vce.filp[i] = p->filp; rdev 541 drivers/gpu/drm/radeon/radeon_vce.c p->rdev->vce.img_size[i] = 0; rdev 588 drivers/gpu/drm/radeon/radeon_vce.c size = &p->rdev->vce.img_size[session_idx]; rdev 680 drivers/gpu/drm/radeon/radeon_vce.c atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0); rdev 695 drivers/gpu/drm/radeon/radeon_vce.c bool radeon_vce_semaphore_emit(struct radeon_device *rdev, rdev 719 drivers/gpu/drm/radeon/radeon_vce.c void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 721 drivers/gpu/drm/radeon/radeon_vce.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 735 drivers/gpu/drm/radeon/radeon_vce.c void radeon_vce_fence_emit(struct radeon_device *rdev, rdev 738 drivers/gpu/drm/radeon/radeon_vce.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 739 drivers/gpu/drm/radeon/radeon_vce.c uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 756 drivers/gpu/drm/radeon/radeon_vce.c int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 758 drivers/gpu/drm/radeon/radeon_vce.c uint32_t rptr = vce_v1_0_get_rptr(rdev, ring); rdev 762 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_ring_lock(rdev, ring, 16); rdev 769 drivers/gpu/drm/radeon/radeon_vce.c radeon_ring_unlock_commit(rdev, ring, false); rdev 771 drivers/gpu/drm/radeon/radeon_vce.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 772 drivers/gpu/drm/radeon/radeon_vce.c if (vce_v1_0_get_rptr(rdev, ring) != rptr) rdev 777 drivers/gpu/drm/radeon/radeon_vce.c if (i < rdev->usec_timeout) { rdev 796 drivers/gpu/drm/radeon/radeon_vce.c int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 801 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_vce_get_create_msg(rdev, ring->idx, 1, NULL); rdev 807 drivers/gpu/drm/radeon/radeon_vce.c r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence); rdev 60 drivers/gpu/drm/radeon/radeon_vm.c static unsigned radeon_vm_num_pdes(struct radeon_device *rdev) rdev 62 drivers/gpu/drm/radeon/radeon_vm.c return rdev->vm_manager.max_pfn >> radeon_vm_block_size; rdev 72 drivers/gpu/drm/radeon/radeon_vm.c static unsigned radeon_vm_directory_size(struct radeon_device *rdev) rdev 74 drivers/gpu/drm/radeon/radeon_vm.c return RADEON_GPU_PAGE_ALIGN(radeon_vm_num_pdes(rdev) * 8); rdev 85 drivers/gpu/drm/radeon/radeon_vm.c int radeon_vm_manager_init(struct radeon_device *rdev) rdev 89 drivers/gpu/drm/radeon/radeon_vm.c if (!rdev->vm_manager.enabled) { rdev 90 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_asic_vm_init(rdev); rdev 94 drivers/gpu/drm/radeon/radeon_vm.c rdev->vm_manager.enabled = true; rdev 106 drivers/gpu/drm/radeon/radeon_vm.c void radeon_vm_manager_fini(struct radeon_device *rdev) rdev 110 drivers/gpu/drm/radeon/radeon_vm.c if (!rdev->vm_manager.enabled) rdev 114 drivers/gpu/drm/radeon/radeon_vm.c radeon_fence_unref(&rdev->vm_manager.active[i]); rdev 115 drivers/gpu/drm/radeon/radeon_vm.c radeon_asic_vm_fini(rdev); rdev 116 drivers/gpu/drm/radeon/radeon_vm.c rdev->vm_manager.enabled = false; rdev 128 drivers/gpu/drm/radeon/radeon_vm.c struct radeon_bo_list *radeon_vm_get_bos(struct radeon_device *rdev, rdev 177 drivers/gpu/drm/radeon/radeon_vm.c struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev, rdev 188 drivers/gpu/drm/radeon/radeon_vm.c vm_id->last_id_use == rdev->vm_manager.active[vm_id->id]) rdev 195 drivers/gpu/drm/radeon/radeon_vm.c for (i = 1; i < rdev->vm_manager.nvm; ++i) { rdev 196 drivers/gpu/drm/radeon/radeon_vm.c struct radeon_fence *fence = rdev->vm_manager.active[i]; rdev 215 drivers/gpu/drm/radeon/radeon_vm.c return rdev->vm_manager.active[choices[i]]; rdev 236 drivers/gpu/drm/radeon/radeon_vm.c void radeon_vm_flush(struct radeon_device *rdev, rdev 250 drivers/gpu/drm/radeon/radeon_vm.c radeon_ring_vm_flush(rdev, &rdev->ring[ring], rdev 268 drivers/gpu/drm/radeon/radeon_vm.c void radeon_vm_fence(struct radeon_device *rdev, rdev 274 drivers/gpu/drm/radeon/radeon_vm.c radeon_fence_unref(&rdev->vm_manager.active[vm_id]); rdev 275 drivers/gpu/drm/radeon/radeon_vm.c rdev->vm_manager.active[vm_id] = radeon_fence_ref(fence); rdev 319 drivers/gpu/drm/radeon/radeon_vm.c struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev, rdev 359 drivers/gpu/drm/radeon/radeon_vm.c static void radeon_vm_set_pages(struct radeon_device *rdev, rdev 368 drivers/gpu/drm/radeon/radeon_vm.c uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8; rdev 369 drivers/gpu/drm/radeon/radeon_vm.c radeon_asic_vm_copy_pages(rdev, ib, pe, src, count); rdev 372 drivers/gpu/drm/radeon/radeon_vm.c radeon_asic_vm_write_pages(rdev, ib, pe, addr, rdev 376 drivers/gpu/drm/radeon/radeon_vm.c radeon_asic_vm_set_pages(rdev, ib, pe, addr, rdev 387 drivers/gpu/drm/radeon/radeon_vm.c static int radeon_vm_clear_bo(struct radeon_device *rdev, rdev 407 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256); rdev 413 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0); rdev 414 drivers/gpu/drm/radeon/radeon_vm.c radeon_asic_vm_pad_ib(rdev, &ib); rdev 417 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 425 drivers/gpu/drm/radeon/radeon_vm.c radeon_ib_free(rdev, &ib); rdev 446 drivers/gpu/drm/radeon/radeon_vm.c int radeon_vm_bo_set_addr(struct radeon_device *rdev, rdev 466 drivers/gpu/drm/radeon/radeon_vm.c if (last_pfn >= rdev->vm_manager.max_pfn) { rdev 467 drivers/gpu/drm/radeon/radeon_vm.c dev_err(rdev->dev, "va above limit (0x%08X >= 0x%08X)\n", rdev 468 drivers/gpu/drm/radeon/radeon_vm.c last_pfn, rdev->vm_manager.max_pfn); rdev 487 drivers/gpu/drm/radeon/radeon_vm.c dev_err(rdev->dev, "bo %p va 0x%010Lx conflict with " rdev 533 drivers/gpu/drm/radeon/radeon_vm.c BUG_ON(eoffset >= radeon_vm_num_pdes(rdev)); rdev 550 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_bo_create(rdev, RADEON_VM_PTE_COUNT * 8, rdev 557 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_vm_clear_bo(rdev, pt); rdev 595 drivers/gpu/drm/radeon/radeon_vm.c uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr) rdev 600 drivers/gpu/drm/radeon/radeon_vm.c result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT]; rdev 641 drivers/gpu/drm/radeon/radeon_vm.c int radeon_vm_update_page_directory(struct radeon_device *rdev, rdev 662 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4); rdev 685 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_set_pages(rdev, &ib, last_pde, rdev 699 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_set_pages(rdev, &ib, last_pde, last_pt, count, rdev 703 drivers/gpu/drm/radeon/radeon_vm.c radeon_asic_vm_pad_ib(rdev, &ib); rdev 705 drivers/gpu/drm/radeon/radeon_vm.c radeon_sync_resv(rdev, &ib.sync, pd->tbo.base.resv, true); rdev 707 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 709 drivers/gpu/drm/radeon/radeon_vm.c radeon_ib_free(rdev, &ib); rdev 715 drivers/gpu/drm/radeon/radeon_vm.c radeon_ib_free(rdev, &ib); rdev 732 drivers/gpu/drm/radeon/radeon_vm.c static void radeon_vm_frag_ptes(struct radeon_device *rdev, rdev 757 drivers/gpu/drm/radeon/radeon_vm.c uint64_t frag_flags = ((rdev->family == CHIP_CAYMAN) || rdev 758 drivers/gpu/drm/radeon/radeon_vm.c (rdev->family == CHIP_ARUBA)) ? rdev 760 drivers/gpu/drm/radeon/radeon_vm.c uint64_t frag_align = ((rdev->family == CHIP_CAYMAN) || rdev 761 drivers/gpu/drm/radeon/radeon_vm.c (rdev->family == CHIP_ARUBA)) ? 0x200 : 0x80; rdev 773 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_set_pages(rdev, ib, pe_start, addr, count, rdev 781 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_set_pages(rdev, ib, pe_start, addr, count, rdev 788 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_set_pages(rdev, ib, frag_start, addr, count, rdev 795 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_set_pages(rdev, ib, frag_end, addr, count, rdev 814 drivers/gpu/drm/radeon/radeon_vm.c static int radeon_vm_update_ptes(struct radeon_device *rdev, rdev 833 drivers/gpu/drm/radeon/radeon_vm.c radeon_sync_resv(rdev, &ib->sync, pt->tbo.base.resv, true); rdev 849 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_frag_ptes(rdev, ib, last_pte, rdev 866 drivers/gpu/drm/radeon/radeon_vm.c radeon_vm_frag_ptes(rdev, ib, last_pte, rdev 912 drivers/gpu/drm/radeon/radeon_vm.c int radeon_vm_bo_update(struct radeon_device *rdev, rdev 924 drivers/gpu/drm/radeon/radeon_vm.c dev_err(rdev->dev, "bo %p don't has a mapping in vm %p\n", rdev 959 drivers/gpu/drm/radeon/radeon_vm.c addr += rdev->vm_manager.vram_base_offset; rdev 1000 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4); rdev 1012 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_vm_update_ptes(rdev, vm, &ib, bo_va->it.start, rdev 1016 drivers/gpu/drm/radeon/radeon_vm.c radeon_ib_free(rdev, &ib); rdev 1020 drivers/gpu/drm/radeon/radeon_vm.c radeon_asic_vm_pad_ib(rdev, &ib); rdev 1023 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_ib_schedule(rdev, &ib, NULL, false); rdev 1025 drivers/gpu/drm/radeon/radeon_vm.c radeon_ib_free(rdev, &ib); rdev 1032 drivers/gpu/drm/radeon/radeon_vm.c radeon_ib_free(rdev, &ib); rdev 1048 drivers/gpu/drm/radeon/radeon_vm.c int radeon_vm_clear_freed(struct radeon_device *rdev, rdev 1060 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_vm_bo_update(rdev, bo_va, NULL); rdev 1086 drivers/gpu/drm/radeon/radeon_vm.c int radeon_vm_clear_invalids(struct radeon_device *rdev, rdev 1098 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_vm_bo_update(rdev, bo_va, NULL); rdev 1119 drivers/gpu/drm/radeon/radeon_vm.c void radeon_vm_bo_rmv(struct radeon_device *rdev, rdev 1153 drivers/gpu/drm/radeon/radeon_vm.c void radeon_vm_bo_invalidate(struct radeon_device *rdev, rdev 1175 drivers/gpu/drm/radeon/radeon_vm.c int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm) rdev 1195 drivers/gpu/drm/radeon/radeon_vm.c pd_size = radeon_vm_directory_size(rdev); rdev 1196 drivers/gpu/drm/radeon/radeon_vm.c pd_entries = radeon_vm_num_pdes(rdev); rdev 1206 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_bo_create(rdev, pd_size, align, true, rdev 1212 drivers/gpu/drm/radeon/radeon_vm.c r = radeon_vm_clear_bo(rdev, vm->page_directory); rdev 1231 drivers/gpu/drm/radeon/radeon_vm.c void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm) rdev 1237 drivers/gpu/drm/radeon/radeon_vm.c dev_err(rdev->dev, "still active bo inside vm\n"); rdev 1256 drivers/gpu/drm/radeon/radeon_vm.c for (i = 0; i < radeon_vm_num_pdes(rdev); i++) rdev 41 drivers/gpu/drm/radeon/rs400.c static int rs400_debugfs_pcie_gart_info_init(struct radeon_device *rdev); rdev 43 drivers/gpu/drm/radeon/rs400.c void rs400_gart_adjust_size(struct radeon_device *rdev) rdev 46 drivers/gpu/drm/radeon/rs400.c switch (rdev->mc.gtt_size/(1024*1024)) { rdev 57 drivers/gpu/drm/radeon/rs400.c (unsigned)(rdev->mc.gtt_size >> 20)); rdev 60 drivers/gpu/drm/radeon/rs400.c rdev->mc.gtt_size = 32 * 1024 * 1024; rdev 65 drivers/gpu/drm/radeon/rs400.c void rs400_gart_tlb_flush(struct radeon_device *rdev) rdev 68 drivers/gpu/drm/radeon/rs400.c unsigned int timeout = rdev->usec_timeout; rdev 81 drivers/gpu/drm/radeon/rs400.c int rs400_gart_init(struct radeon_device *rdev) rdev 85 drivers/gpu/drm/radeon/rs400.c if (rdev->gart.ptr) { rdev 90 drivers/gpu/drm/radeon/rs400.c switch(rdev->mc.gtt_size / (1024 * 1024)) { rdev 103 drivers/gpu/drm/radeon/rs400.c r = radeon_gart_init(rdev); rdev 106 drivers/gpu/drm/radeon/rs400.c if (rs400_debugfs_pcie_gart_info_init(rdev)) rdev 108 drivers/gpu/drm/radeon/rs400.c rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; rdev 109 drivers/gpu/drm/radeon/rs400.c return radeon_gart_table_ram_alloc(rdev); rdev 112 drivers/gpu/drm/radeon/rs400.c int rs400_gart_enable(struct radeon_device *rdev) rdev 121 drivers/gpu/drm/radeon/rs400.c switch(rdev->mc.gtt_size / (1024 * 1024)) { rdev 147 drivers/gpu/drm/radeon/rs400.c if (rdev->family == CHIP_RS690 || (rdev->family == CHIP_RS740)) { rdev 154 drivers/gpu/drm/radeon/rs400.c tmp = REG_SET(RS690_MC_AGP_TOP, rdev->mc.gtt_end >> 16); rdev 155 drivers/gpu/drm/radeon/rs400.c tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16); rdev 156 drivers/gpu/drm/radeon/rs400.c if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) { rdev 166 drivers/gpu/drm/radeon/rs400.c tmp = (u32)rdev->gart.table_addr & 0xfffff000; rdev 167 drivers/gpu/drm/radeon/rs400.c tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; rdev 180 drivers/gpu/drm/radeon/rs400.c if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) { rdev 191 drivers/gpu/drm/radeon/rs400.c rs400_gart_tlb_flush(rdev); rdev 193 drivers/gpu/drm/radeon/rs400.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 194 drivers/gpu/drm/radeon/rs400.c (unsigned long long)rdev->gart.table_addr); rdev 195 drivers/gpu/drm/radeon/rs400.c rdev->gart.ready = true; rdev 199 drivers/gpu/drm/radeon/rs400.c void rs400_gart_disable(struct radeon_device *rdev) rdev 209 drivers/gpu/drm/radeon/rs400.c void rs400_gart_fini(struct radeon_device *rdev) rdev 211 drivers/gpu/drm/radeon/rs400.c radeon_gart_fini(rdev); rdev 212 drivers/gpu/drm/radeon/rs400.c rs400_gart_disable(rdev); rdev 213 drivers/gpu/drm/radeon/rs400.c radeon_gart_table_ram_free(rdev); rdev 235 drivers/gpu/drm/radeon/rs400.c void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 238 drivers/gpu/drm/radeon/rs400.c u32 *gtt = rdev->gart.ptr; rdev 242 drivers/gpu/drm/radeon/rs400.c int rs400_mc_wait_for_idle(struct radeon_device *rdev) rdev 247 drivers/gpu/drm/radeon/rs400.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 258 drivers/gpu/drm/radeon/rs400.c static void rs400_gpu_init(struct radeon_device *rdev) rdev 261 drivers/gpu/drm/radeon/rs400.c r420_pipes_init(rdev); rdev 262 drivers/gpu/drm/radeon/rs400.c if (rs400_mc_wait_for_idle(rdev)) { rdev 268 drivers/gpu/drm/radeon/rs400.c static void rs400_mc_init(struct radeon_device *rdev) rdev 272 drivers/gpu/drm/radeon/rs400.c rs400_gart_adjust_size(rdev); rdev 273 drivers/gpu/drm/radeon/rs400.c rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev); rdev 275 drivers/gpu/drm/radeon/rs400.c rdev->mc.vram_is_ddr = true; rdev 276 drivers/gpu/drm/radeon/rs400.c rdev->mc.vram_width = 128; rdev 277 drivers/gpu/drm/radeon/rs400.c r100_vram_init_sizes(rdev); rdev 279 drivers/gpu/drm/radeon/rs400.c radeon_vram_location(rdev, &rdev->mc, base); rdev 280 drivers/gpu/drm/radeon/rs400.c rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1; rdev 281 drivers/gpu/drm/radeon/rs400.c radeon_gtt_location(rdev, &rdev->mc); rdev 282 drivers/gpu/drm/radeon/rs400.c radeon_update_bandwidth_info(rdev); rdev 285 drivers/gpu/drm/radeon/rs400.c uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg) rdev 290 drivers/gpu/drm/radeon/rs400.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 294 drivers/gpu/drm/radeon/rs400.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 298 drivers/gpu/drm/radeon/rs400.c void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 302 drivers/gpu/drm/radeon/rs400.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 306 drivers/gpu/drm/radeon/rs400.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 314 drivers/gpu/drm/radeon/rs400.c struct radeon_device *rdev = dev->dev_private; rdev 323 drivers/gpu/drm/radeon/rs400.c if (rdev->family == CHIP_RS690 || (rdev->family == CHIP_RS740)) { rdev 384 drivers/gpu/drm/radeon/rs400.c static int rs400_debugfs_pcie_gart_info_init(struct radeon_device *rdev) rdev 387 drivers/gpu/drm/radeon/rs400.c return radeon_debugfs_add_files(rdev, rs400_gart_info_list, 1); rdev 393 drivers/gpu/drm/radeon/rs400.c static void rs400_mc_program(struct radeon_device *rdev) rdev 398 drivers/gpu/drm/radeon/rs400.c r100_mc_stop(rdev, &save); rdev 401 drivers/gpu/drm/radeon/rs400.c if (rs400_mc_wait_for_idle(rdev)) rdev 402 drivers/gpu/drm/radeon/rs400.c dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n"); rdev 404 drivers/gpu/drm/radeon/rs400.c S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | rdev 405 drivers/gpu/drm/radeon/rs400.c S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16)); rdev 407 drivers/gpu/drm/radeon/rs400.c r100_mc_resume(rdev, &save); rdev 410 drivers/gpu/drm/radeon/rs400.c static int rs400_startup(struct radeon_device *rdev) rdev 414 drivers/gpu/drm/radeon/rs400.c r100_set_common_regs(rdev); rdev 416 drivers/gpu/drm/radeon/rs400.c rs400_mc_program(rdev); rdev 418 drivers/gpu/drm/radeon/rs400.c r300_clock_startup(rdev); rdev 420 drivers/gpu/drm/radeon/rs400.c rs400_gpu_init(rdev); rdev 421 drivers/gpu/drm/radeon/rs400.c r100_enable_bm(rdev); rdev 424 drivers/gpu/drm/radeon/rs400.c r = rs400_gart_enable(rdev); rdev 429 drivers/gpu/drm/radeon/rs400.c r = radeon_wb_init(rdev); rdev 433 drivers/gpu/drm/radeon/rs400.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 435 drivers/gpu/drm/radeon/rs400.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 440 drivers/gpu/drm/radeon/rs400.c if (!rdev->irq.installed) { rdev 441 drivers/gpu/drm/radeon/rs400.c r = radeon_irq_kms_init(rdev); rdev 446 drivers/gpu/drm/radeon/rs400.c r100_irq_set(rdev); rdev 447 drivers/gpu/drm/radeon/rs400.c rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 449 drivers/gpu/drm/radeon/rs400.c r = r100_cp_init(rdev, 1024 * 1024); rdev 451 drivers/gpu/drm/radeon/rs400.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 455 drivers/gpu/drm/radeon/rs400.c r = radeon_ib_pool_init(rdev); rdev 457 drivers/gpu/drm/radeon/rs400.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 464 drivers/gpu/drm/radeon/rs400.c int rs400_resume(struct radeon_device *rdev) rdev 469 drivers/gpu/drm/radeon/rs400.c rs400_gart_disable(rdev); rdev 471 drivers/gpu/drm/radeon/rs400.c r300_clock_startup(rdev); rdev 473 drivers/gpu/drm/radeon/rs400.c rs400_mc_program(rdev); rdev 475 drivers/gpu/drm/radeon/rs400.c if (radeon_asic_reset(rdev)) { rdev 476 drivers/gpu/drm/radeon/rs400.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 481 drivers/gpu/drm/radeon/rs400.c radeon_combios_asic_init(rdev->ddev); rdev 483 drivers/gpu/drm/radeon/rs400.c r300_clock_startup(rdev); rdev 485 drivers/gpu/drm/radeon/rs400.c radeon_surface_init(rdev); rdev 487 drivers/gpu/drm/radeon/rs400.c rdev->accel_working = true; rdev 488 drivers/gpu/drm/radeon/rs400.c r = rs400_startup(rdev); rdev 490 drivers/gpu/drm/radeon/rs400.c rdev->accel_working = false; rdev 495 drivers/gpu/drm/radeon/rs400.c int rs400_suspend(struct radeon_device *rdev) rdev 497 drivers/gpu/drm/radeon/rs400.c radeon_pm_suspend(rdev); rdev 498 drivers/gpu/drm/radeon/rs400.c r100_cp_disable(rdev); rdev 499 drivers/gpu/drm/radeon/rs400.c radeon_wb_disable(rdev); rdev 500 drivers/gpu/drm/radeon/rs400.c r100_irq_disable(rdev); rdev 501 drivers/gpu/drm/radeon/rs400.c rs400_gart_disable(rdev); rdev 505 drivers/gpu/drm/radeon/rs400.c void rs400_fini(struct radeon_device *rdev) rdev 507 drivers/gpu/drm/radeon/rs400.c radeon_pm_fini(rdev); rdev 508 drivers/gpu/drm/radeon/rs400.c r100_cp_fini(rdev); rdev 509 drivers/gpu/drm/radeon/rs400.c radeon_wb_fini(rdev); rdev 510 drivers/gpu/drm/radeon/rs400.c radeon_ib_pool_fini(rdev); rdev 511 drivers/gpu/drm/radeon/rs400.c radeon_gem_fini(rdev); rdev 512 drivers/gpu/drm/radeon/rs400.c rs400_gart_fini(rdev); rdev 513 drivers/gpu/drm/radeon/rs400.c radeon_irq_kms_fini(rdev); rdev 514 drivers/gpu/drm/radeon/rs400.c radeon_fence_driver_fini(rdev); rdev 515 drivers/gpu/drm/radeon/rs400.c radeon_bo_fini(rdev); rdev 516 drivers/gpu/drm/radeon/rs400.c radeon_atombios_fini(rdev); rdev 517 drivers/gpu/drm/radeon/rs400.c kfree(rdev->bios); rdev 518 drivers/gpu/drm/radeon/rs400.c rdev->bios = NULL; rdev 521 drivers/gpu/drm/radeon/rs400.c int rs400_init(struct radeon_device *rdev) rdev 526 drivers/gpu/drm/radeon/rs400.c r100_vga_render_disable(rdev); rdev 528 drivers/gpu/drm/radeon/rs400.c radeon_scratch_init(rdev); rdev 530 drivers/gpu/drm/radeon/rs400.c radeon_surface_init(rdev); rdev 533 drivers/gpu/drm/radeon/rs400.c r100_restore_sanity(rdev); rdev 535 drivers/gpu/drm/radeon/rs400.c if (!radeon_get_bios(rdev)) { rdev 536 drivers/gpu/drm/radeon/rs400.c if (ASIC_IS_AVIVO(rdev)) rdev 539 drivers/gpu/drm/radeon/rs400.c if (rdev->is_atom_bios) { rdev 540 drivers/gpu/drm/radeon/rs400.c dev_err(rdev->dev, "Expecting combios for RS400/RS480 GPU\n"); rdev 543 drivers/gpu/drm/radeon/rs400.c r = radeon_combios_init(rdev); rdev 548 drivers/gpu/drm/radeon/rs400.c if (radeon_asic_reset(rdev)) { rdev 549 drivers/gpu/drm/radeon/rs400.c dev_warn(rdev->dev, rdev 555 drivers/gpu/drm/radeon/rs400.c if (radeon_boot_test_post_card(rdev) == false) rdev 559 drivers/gpu/drm/radeon/rs400.c radeon_get_clock_info(rdev->ddev); rdev 561 drivers/gpu/drm/radeon/rs400.c rs400_mc_init(rdev); rdev 563 drivers/gpu/drm/radeon/rs400.c r = radeon_fence_driver_init(rdev); rdev 567 drivers/gpu/drm/radeon/rs400.c r = radeon_bo_init(rdev); rdev 570 drivers/gpu/drm/radeon/rs400.c r = rs400_gart_init(rdev); rdev 573 drivers/gpu/drm/radeon/rs400.c r300_set_reg_safe(rdev); rdev 576 drivers/gpu/drm/radeon/rs400.c radeon_pm_init(rdev); rdev 578 drivers/gpu/drm/radeon/rs400.c rdev->accel_working = true; rdev 579 drivers/gpu/drm/radeon/rs400.c r = rs400_startup(rdev); rdev 582 drivers/gpu/drm/radeon/rs400.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 583 drivers/gpu/drm/radeon/rs400.c r100_cp_fini(rdev); rdev 584 drivers/gpu/drm/radeon/rs400.c radeon_wb_fini(rdev); rdev 585 drivers/gpu/drm/radeon/rs400.c radeon_ib_pool_fini(rdev); rdev 586 drivers/gpu/drm/radeon/rs400.c rs400_gart_fini(rdev); rdev 587 drivers/gpu/drm/radeon/rs400.c radeon_irq_kms_fini(rdev); rdev 588 drivers/gpu/drm/radeon/rs400.c rdev->accel_working = false; rdev 52 drivers/gpu/drm/radeon/rs600.c static void rs600_gpu_init(struct radeon_device *rdev); rdev 53 drivers/gpu/drm/radeon/rs600.c int rs600_mc_wait_for_idle(struct radeon_device *rdev); rdev 61 drivers/gpu/drm/radeon/rs600.c static bool avivo_is_in_vblank(struct radeon_device *rdev, int crtc) rdev 69 drivers/gpu/drm/radeon/rs600.c static bool avivo_is_counter_moving(struct radeon_device *rdev, int crtc) rdev 90 drivers/gpu/drm/radeon/rs600.c void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) rdev 94 drivers/gpu/drm/radeon/rs600.c if (crtc >= rdev->num_crtc) rdev 103 drivers/gpu/drm/radeon/rs600.c while (avivo_is_in_vblank(rdev, crtc)) { rdev 105 drivers/gpu/drm/radeon/rs600.c if (!avivo_is_counter_moving(rdev, crtc)) rdev 110 drivers/gpu/drm/radeon/rs600.c while (!avivo_is_in_vblank(rdev, crtc)) { rdev 112 drivers/gpu/drm/radeon/rs600.c if (!avivo_is_counter_moving(rdev, crtc)) rdev 118 drivers/gpu/drm/radeon/rs600.c void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) rdev 120 drivers/gpu/drm/radeon/rs600.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 137 drivers/gpu/drm/radeon/rs600.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 149 drivers/gpu/drm/radeon/rs600.c bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc_id) rdev 151 drivers/gpu/drm/radeon/rs600.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 161 drivers/gpu/drm/radeon/rs600.c struct radeon_device *rdev = dev->dev_private; rdev 222 drivers/gpu/drm/radeon/rs600.c void rs600_pm_misc(struct radeon_device *rdev) rdev 224 drivers/gpu/drm/radeon/rs600.c int requested_index = rdev->pm.requested_power_state_index; rdev 225 drivers/gpu/drm/radeon/rs600.c struct radeon_power_state *ps = &rdev->pm.power_state[requested_index]; rdev 251 drivers/gpu/drm/radeon/rs600.c radeon_atom_set_voltage(rdev, voltage->vddc_id, SET_VOLTAGE_TYPE_ASIC_VDDC); rdev 305 drivers/gpu/drm/radeon/rs600.c if ((rdev->flags & RADEON_IS_PCIE) && rdev 306 drivers/gpu/drm/radeon/rs600.c !(rdev->flags & RADEON_IS_IGP) && rdev 307 drivers/gpu/drm/radeon/rs600.c rdev->asic->pm.set_pcie_lanes && rdev 309 drivers/gpu/drm/radeon/rs600.c rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) { rdev 310 drivers/gpu/drm/radeon/rs600.c radeon_set_pcie_lanes(rdev, rdev 316 drivers/gpu/drm/radeon/rs600.c void rs600_pm_prepare(struct radeon_device *rdev) rdev 318 drivers/gpu/drm/radeon/rs600.c struct drm_device *ddev = rdev->ddev; rdev 334 drivers/gpu/drm/radeon/rs600.c void rs600_pm_finish(struct radeon_device *rdev) rdev 336 drivers/gpu/drm/radeon/rs600.c struct drm_device *ddev = rdev->ddev; rdev 353 drivers/gpu/drm/radeon/rs600.c bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) rdev 375 drivers/gpu/drm/radeon/rs600.c void rs600_hpd_set_polarity(struct radeon_device *rdev, rdev 379 drivers/gpu/drm/radeon/rs600.c bool connected = rs600_hpd_sense(rdev, hpd); rdev 403 drivers/gpu/drm/radeon/rs600.c void rs600_hpd_init(struct radeon_device *rdev) rdev 405 drivers/gpu/drm/radeon/rs600.c struct drm_device *dev = rdev->ddev; rdev 425 drivers/gpu/drm/radeon/rs600.c radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); rdev 427 drivers/gpu/drm/radeon/rs600.c radeon_irq_kms_enable_hpd(rdev, enable); rdev 430 drivers/gpu/drm/radeon/rs600.c void rs600_hpd_fini(struct radeon_device *rdev) rdev 432 drivers/gpu/drm/radeon/rs600.c struct drm_device *dev = rdev->ddev; rdev 453 drivers/gpu/drm/radeon/rs600.c radeon_irq_kms_disable_hpd(rdev, disable); rdev 456 drivers/gpu/drm/radeon/rs600.c int rs600_asic_reset(struct radeon_device *rdev, bool hard) rdev 467 drivers/gpu/drm/radeon/rs600.c rv515_mc_stop(rdev, &save); rdev 469 drivers/gpu/drm/radeon/rs600.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 477 drivers/gpu/drm/radeon/rs600.c pci_save_state(rdev->pdev); rdev 479 drivers/gpu/drm/radeon/rs600.c pci_clear_master(rdev->pdev); rdev 489 drivers/gpu/drm/radeon/rs600.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 497 drivers/gpu/drm/radeon/rs600.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 505 drivers/gpu/drm/radeon/rs600.c dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); rdev 507 drivers/gpu/drm/radeon/rs600.c pci_restore_state(rdev->pdev); rdev 510 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "failed to reset GPU\n"); rdev 513 drivers/gpu/drm/radeon/rs600.c dev_info(rdev->dev, "GPU reset succeed\n"); rdev 514 drivers/gpu/drm/radeon/rs600.c rv515_mc_resume(rdev, &save); rdev 521 drivers/gpu/drm/radeon/rs600.c void rs600_gart_tlb_flush(struct radeon_device *rdev) rdev 539 drivers/gpu/drm/radeon/rs600.c static int rs600_gart_init(struct radeon_device *rdev) rdev 543 drivers/gpu/drm/radeon/rs600.c if (rdev->gart.robj) { rdev 548 drivers/gpu/drm/radeon/rs600.c r = radeon_gart_init(rdev); rdev 552 drivers/gpu/drm/radeon/rs600.c rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; rdev 553 drivers/gpu/drm/radeon/rs600.c return radeon_gart_table_vram_alloc(rdev); rdev 556 drivers/gpu/drm/radeon/rs600.c static int rs600_gart_enable(struct radeon_device *rdev) rdev 561 drivers/gpu/drm/radeon/rs600.c if (rdev->gart.robj == NULL) { rdev 562 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 565 drivers/gpu/drm/radeon/rs600.c r = radeon_gart_table_vram_pin(rdev); rdev 598 drivers/gpu/drm/radeon/rs600.c rdev->gart.table_addr); rdev 599 drivers/gpu/drm/radeon/rs600.c WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start); rdev 600 drivers/gpu/drm/radeon/rs600.c WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end); rdev 604 drivers/gpu/drm/radeon/rs600.c WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start); rdev 605 drivers/gpu/drm/radeon/rs600.c WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end); rdev 612 drivers/gpu/drm/radeon/rs600.c rs600_gart_tlb_flush(rdev); rdev 614 drivers/gpu/drm/radeon/rs600.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 615 drivers/gpu/drm/radeon/rs600.c (unsigned long long)rdev->gart.table_addr); rdev 616 drivers/gpu/drm/radeon/rs600.c rdev->gart.ready = true; rdev 620 drivers/gpu/drm/radeon/rs600.c static void rs600_gart_disable(struct radeon_device *rdev) rdev 628 drivers/gpu/drm/radeon/rs600.c radeon_gart_table_vram_unpin(rdev); rdev 631 drivers/gpu/drm/radeon/rs600.c static void rs600_gart_fini(struct radeon_device *rdev) rdev 633 drivers/gpu/drm/radeon/rs600.c radeon_gart_fini(rdev); rdev 634 drivers/gpu/drm/radeon/rs600.c rs600_gart_disable(rdev); rdev 635 drivers/gpu/drm/radeon/rs600.c radeon_gart_table_vram_free(rdev); rdev 653 drivers/gpu/drm/radeon/rs600.c void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, rdev 656 drivers/gpu/drm/radeon/rs600.c void __iomem *ptr = (void *)rdev->gart.ptr; rdev 660 drivers/gpu/drm/radeon/rs600.c int rs600_irq_set(struct radeon_device *rdev) rdev 669 drivers/gpu/drm/radeon/rs600.c if (ASIC_IS_DCE2(rdev)) rdev 675 drivers/gpu/drm/radeon/rs600.c if (!rdev->irq.installed) { rdev 680 drivers/gpu/drm/radeon/rs600.c if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { rdev 683 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.crtc_vblank_int[0] || rdev 684 drivers/gpu/drm/radeon/rs600.c atomic_read(&rdev->irq.pflip[0])) { rdev 687 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.crtc_vblank_int[1] || rdev 688 drivers/gpu/drm/radeon/rs600.c atomic_read(&rdev->irq.pflip[1])) { rdev 691 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.hpd[0]) { rdev 694 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.hpd[1]) { rdev 697 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.afmt[0]) { rdev 704 drivers/gpu/drm/radeon/rs600.c if (ASIC_IS_DCE2(rdev)) rdev 713 drivers/gpu/drm/radeon/rs600.c static inline u32 rs600_irq_ack(struct radeon_device *rdev) rdev 720 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); rdev 721 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 725 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 729 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 734 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 740 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.disp_int = 0; rdev 743 drivers/gpu/drm/radeon/rs600.c if (ASIC_IS_DCE2(rdev)) { rdev 744 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.hdmi0_status = RREG32(R_007404_HDMI0_STATUS) & rdev 746 drivers/gpu/drm/radeon/rs600.c if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev->irq.stat_regs.r500.hdmi0_status)) { rdev 752 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.hdmi0_status = 0; rdev 760 drivers/gpu/drm/radeon/rs600.c void rs600_irq_disable(struct radeon_device *rdev) rdev 769 drivers/gpu/drm/radeon/rs600.c rs600_irq_ack(rdev); rdev 772 drivers/gpu/drm/radeon/rs600.c int rs600_irq_process(struct radeon_device *rdev) rdev 778 drivers/gpu/drm/radeon/rs600.c status = rs600_irq_ack(rdev); rdev 780 drivers/gpu/drm/radeon/rs600.c !rdev->irq.stat_regs.r500.disp_int && rdev 781 drivers/gpu/drm/radeon/rs600.c !rdev->irq.stat_regs.r500.hdmi0_status) { rdev 785 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.disp_int || rdev 786 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.hdmi0_status) { rdev 789 drivers/gpu/drm/radeon/rs600.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 792 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 793 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.crtc_vblank_int[0]) { rdev 794 drivers/gpu/drm/radeon/rs600.c drm_handle_vblank(rdev->ddev, 0); rdev 795 drivers/gpu/drm/radeon/rs600.c rdev->pm.vblank_sync = true; rdev 796 drivers/gpu/drm/radeon/rs600.c wake_up(&rdev->irq.vblank_queue); rdev 798 drivers/gpu/drm/radeon/rs600.c if (atomic_read(&rdev->irq.pflip[0])) rdev 799 drivers/gpu/drm/radeon/rs600.c radeon_crtc_handle_vblank(rdev, 0); rdev 801 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 802 drivers/gpu/drm/radeon/rs600.c if (rdev->irq.crtc_vblank_int[1]) { rdev 803 drivers/gpu/drm/radeon/rs600.c drm_handle_vblank(rdev->ddev, 1); rdev 804 drivers/gpu/drm/radeon/rs600.c rdev->pm.vblank_sync = true; rdev 805 drivers/gpu/drm/radeon/rs600.c wake_up(&rdev->irq.vblank_queue); rdev 807 drivers/gpu/drm/radeon/rs600.c if (atomic_read(&rdev->irq.pflip[1])) rdev 808 drivers/gpu/drm/radeon/rs600.c radeon_crtc_handle_vblank(rdev, 1); rdev 810 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 814 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { rdev 818 drivers/gpu/drm/radeon/rs600.c if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev->irq.stat_regs.r500.hdmi0_status)) { rdev 822 drivers/gpu/drm/radeon/rs600.c status = rs600_irq_ack(rdev); rdev 825 drivers/gpu/drm/radeon/rs600.c schedule_delayed_work(&rdev->hotplug_work, 0); rdev 827 drivers/gpu/drm/radeon/rs600.c schedule_work(&rdev->audio_work); rdev 828 drivers/gpu/drm/radeon/rs600.c if (rdev->msi_enabled) { rdev 829 drivers/gpu/drm/radeon/rs600.c switch (rdev->family) { rdev 845 drivers/gpu/drm/radeon/rs600.c u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc) rdev 853 drivers/gpu/drm/radeon/rs600.c int rs600_mc_wait_for_idle(struct radeon_device *rdev) rdev 857 drivers/gpu/drm/radeon/rs600.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 865 drivers/gpu/drm/radeon/rs600.c static void rs600_gpu_init(struct radeon_device *rdev) rdev 867 drivers/gpu/drm/radeon/rs600.c r420_pipes_init(rdev); rdev 869 drivers/gpu/drm/radeon/rs600.c if (rs600_mc_wait_for_idle(rdev)) rdev 870 drivers/gpu/drm/radeon/rs600.c dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rdev 873 drivers/gpu/drm/radeon/rs600.c static void rs600_mc_init(struct radeon_device *rdev) rdev 877 drivers/gpu/drm/radeon/rs600.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 878 drivers/gpu/drm/radeon/rs600.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 879 drivers/gpu/drm/radeon/rs600.c rdev->mc.vram_is_ddr = true; rdev 880 drivers/gpu/drm/radeon/rs600.c rdev->mc.vram_width = 128; rdev 881 drivers/gpu/drm/radeon/rs600.c rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); rdev 882 drivers/gpu/drm/radeon/rs600.c rdev->mc.mc_vram_size = rdev->mc.real_vram_size; rdev 883 drivers/gpu/drm/radeon/rs600.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 884 drivers/gpu/drm/radeon/rs600.c rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); rdev 887 drivers/gpu/drm/radeon/rs600.c radeon_vram_location(rdev, &rdev->mc, base); rdev 888 drivers/gpu/drm/radeon/rs600.c rdev->mc.gtt_base_align = 0; rdev 889 drivers/gpu/drm/radeon/rs600.c radeon_gtt_location(rdev, &rdev->mc); rdev 890 drivers/gpu/drm/radeon/rs600.c radeon_update_bandwidth_info(rdev); rdev 893 drivers/gpu/drm/radeon/rs600.c void rs600_bandwidth_update(struct radeon_device *rdev) rdev 900 drivers/gpu/drm/radeon/rs600.c if (!rdev->mode_info.mode_config_initialized) rdev 903 drivers/gpu/drm/radeon/rs600.c radeon_update_display_priority(rdev); rdev 905 drivers/gpu/drm/radeon/rs600.c if (rdev->mode_info.crtcs[0]->base.enabled) rdev 906 drivers/gpu/drm/radeon/rs600.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; rdev 907 drivers/gpu/drm/radeon/rs600.c if (rdev->mode_info.crtcs[1]->base.enabled) rdev 908 drivers/gpu/drm/radeon/rs600.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; rdev 910 drivers/gpu/drm/radeon/rs600.c rs690_line_buffer_adjust(rdev, mode0, mode1); rdev 912 drivers/gpu/drm/radeon/rs600.c if (rdev->disp_priority == 2) { rdev 924 drivers/gpu/drm/radeon/rs600.c uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg) rdev 929 drivers/gpu/drm/radeon/rs600.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 933 drivers/gpu/drm/radeon/rs600.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 937 drivers/gpu/drm/radeon/rs600.c void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 941 drivers/gpu/drm/radeon/rs600.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 945 drivers/gpu/drm/radeon/rs600.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 948 drivers/gpu/drm/radeon/rs600.c static void rs600_debugfs(struct radeon_device *rdev) rdev 950 drivers/gpu/drm/radeon/rs600.c if (r100_debugfs_rbbm_init(rdev)) rdev 954 drivers/gpu/drm/radeon/rs600.c void rs600_set_safe_registers(struct radeon_device *rdev) rdev 956 drivers/gpu/drm/radeon/rs600.c rdev->config.r300.reg_safe_bm = rs600_reg_safe_bm; rdev 957 drivers/gpu/drm/radeon/rs600.c rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs600_reg_safe_bm); rdev 960 drivers/gpu/drm/radeon/rs600.c static void rs600_mc_program(struct radeon_device *rdev) rdev 965 drivers/gpu/drm/radeon/rs600.c rv515_mc_stop(rdev, &save); rdev 968 drivers/gpu/drm/radeon/rs600.c if (rs600_mc_wait_for_idle(rdev)) rdev 969 drivers/gpu/drm/radeon/rs600.c dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rdev 977 drivers/gpu/drm/radeon/rs600.c S_000004_MC_FB_START(rdev->mc.vram_start >> 16) | rdev 978 drivers/gpu/drm/radeon/rs600.c S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16)); rdev 980 drivers/gpu/drm/radeon/rs600.c S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); rdev 982 drivers/gpu/drm/radeon/rs600.c rv515_mc_resume(rdev, &save); rdev 985 drivers/gpu/drm/radeon/rs600.c static int rs600_startup(struct radeon_device *rdev) rdev 989 drivers/gpu/drm/radeon/rs600.c rs600_mc_program(rdev); rdev 991 drivers/gpu/drm/radeon/rs600.c rv515_clock_startup(rdev); rdev 993 drivers/gpu/drm/radeon/rs600.c rs600_gpu_init(rdev); rdev 996 drivers/gpu/drm/radeon/rs600.c r = rs600_gart_enable(rdev); rdev 1001 drivers/gpu/drm/radeon/rs600.c r = radeon_wb_init(rdev); rdev 1005 drivers/gpu/drm/radeon/rs600.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 1007 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 1012 drivers/gpu/drm/radeon/rs600.c if (!rdev->irq.installed) { rdev 1013 drivers/gpu/drm/radeon/rs600.c r = radeon_irq_kms_init(rdev); rdev 1018 drivers/gpu/drm/radeon/rs600.c rs600_irq_set(rdev); rdev 1019 drivers/gpu/drm/radeon/rs600.c rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 1021 drivers/gpu/drm/radeon/rs600.c r = r100_cp_init(rdev, 1024 * 1024); rdev 1023 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 1027 drivers/gpu/drm/radeon/rs600.c r = radeon_ib_pool_init(rdev); rdev 1029 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 1033 drivers/gpu/drm/radeon/rs600.c r = radeon_audio_init(rdev); rdev 1035 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "failed initializing audio\n"); rdev 1042 drivers/gpu/drm/radeon/rs600.c int rs600_resume(struct radeon_device *rdev) rdev 1047 drivers/gpu/drm/radeon/rs600.c rs600_gart_disable(rdev); rdev 1049 drivers/gpu/drm/radeon/rs600.c rv515_clock_startup(rdev); rdev 1051 drivers/gpu/drm/radeon/rs600.c if (radeon_asic_reset(rdev)) { rdev 1052 drivers/gpu/drm/radeon/rs600.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 1057 drivers/gpu/drm/radeon/rs600.c atom_asic_init(rdev->mode_info.atom_context); rdev 1059 drivers/gpu/drm/radeon/rs600.c rv515_clock_startup(rdev); rdev 1061 drivers/gpu/drm/radeon/rs600.c radeon_surface_init(rdev); rdev 1063 drivers/gpu/drm/radeon/rs600.c rdev->accel_working = true; rdev 1064 drivers/gpu/drm/radeon/rs600.c r = rs600_startup(rdev); rdev 1066 drivers/gpu/drm/radeon/rs600.c rdev->accel_working = false; rdev 1071 drivers/gpu/drm/radeon/rs600.c int rs600_suspend(struct radeon_device *rdev) rdev 1073 drivers/gpu/drm/radeon/rs600.c radeon_pm_suspend(rdev); rdev 1074 drivers/gpu/drm/radeon/rs600.c radeon_audio_fini(rdev); rdev 1075 drivers/gpu/drm/radeon/rs600.c r100_cp_disable(rdev); rdev 1076 drivers/gpu/drm/radeon/rs600.c radeon_wb_disable(rdev); rdev 1077 drivers/gpu/drm/radeon/rs600.c rs600_irq_disable(rdev); rdev 1078 drivers/gpu/drm/radeon/rs600.c rs600_gart_disable(rdev); rdev 1082 drivers/gpu/drm/radeon/rs600.c void rs600_fini(struct radeon_device *rdev) rdev 1084 drivers/gpu/drm/radeon/rs600.c radeon_pm_fini(rdev); rdev 1085 drivers/gpu/drm/radeon/rs600.c radeon_audio_fini(rdev); rdev 1086 drivers/gpu/drm/radeon/rs600.c r100_cp_fini(rdev); rdev 1087 drivers/gpu/drm/radeon/rs600.c radeon_wb_fini(rdev); rdev 1088 drivers/gpu/drm/radeon/rs600.c radeon_ib_pool_fini(rdev); rdev 1089 drivers/gpu/drm/radeon/rs600.c radeon_gem_fini(rdev); rdev 1090 drivers/gpu/drm/radeon/rs600.c rs600_gart_fini(rdev); rdev 1091 drivers/gpu/drm/radeon/rs600.c radeon_irq_kms_fini(rdev); rdev 1092 drivers/gpu/drm/radeon/rs600.c radeon_fence_driver_fini(rdev); rdev 1093 drivers/gpu/drm/radeon/rs600.c radeon_bo_fini(rdev); rdev 1094 drivers/gpu/drm/radeon/rs600.c radeon_atombios_fini(rdev); rdev 1095 drivers/gpu/drm/radeon/rs600.c kfree(rdev->bios); rdev 1096 drivers/gpu/drm/radeon/rs600.c rdev->bios = NULL; rdev 1099 drivers/gpu/drm/radeon/rs600.c int rs600_init(struct radeon_device *rdev) rdev 1104 drivers/gpu/drm/radeon/rs600.c rv515_vga_render_disable(rdev); rdev 1106 drivers/gpu/drm/radeon/rs600.c radeon_scratch_init(rdev); rdev 1108 drivers/gpu/drm/radeon/rs600.c radeon_surface_init(rdev); rdev 1110 drivers/gpu/drm/radeon/rs600.c r100_restore_sanity(rdev); rdev 1112 drivers/gpu/drm/radeon/rs600.c if (!radeon_get_bios(rdev)) { rdev 1113 drivers/gpu/drm/radeon/rs600.c if (ASIC_IS_AVIVO(rdev)) rdev 1116 drivers/gpu/drm/radeon/rs600.c if (rdev->is_atom_bios) { rdev 1117 drivers/gpu/drm/radeon/rs600.c r = radeon_atombios_init(rdev); rdev 1121 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "Expecting atombios for RS600 GPU\n"); rdev 1125 drivers/gpu/drm/radeon/rs600.c if (radeon_asic_reset(rdev)) { rdev 1126 drivers/gpu/drm/radeon/rs600.c dev_warn(rdev->dev, rdev 1132 drivers/gpu/drm/radeon/rs600.c if (radeon_boot_test_post_card(rdev) == false) rdev 1136 drivers/gpu/drm/radeon/rs600.c radeon_get_clock_info(rdev->ddev); rdev 1138 drivers/gpu/drm/radeon/rs600.c rs600_mc_init(rdev); rdev 1139 drivers/gpu/drm/radeon/rs600.c rs600_debugfs(rdev); rdev 1141 drivers/gpu/drm/radeon/rs600.c r = radeon_fence_driver_init(rdev); rdev 1145 drivers/gpu/drm/radeon/rs600.c r = radeon_bo_init(rdev); rdev 1148 drivers/gpu/drm/radeon/rs600.c r = rs600_gart_init(rdev); rdev 1151 drivers/gpu/drm/radeon/rs600.c rs600_set_safe_registers(rdev); rdev 1154 drivers/gpu/drm/radeon/rs600.c radeon_pm_init(rdev); rdev 1156 drivers/gpu/drm/radeon/rs600.c rdev->accel_working = true; rdev 1157 drivers/gpu/drm/radeon/rs600.c r = rs600_startup(rdev); rdev 1160 drivers/gpu/drm/radeon/rs600.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 1161 drivers/gpu/drm/radeon/rs600.c r100_cp_fini(rdev); rdev 1162 drivers/gpu/drm/radeon/rs600.c radeon_wb_fini(rdev); rdev 1163 drivers/gpu/drm/radeon/rs600.c radeon_ib_pool_fini(rdev); rdev 1164 drivers/gpu/drm/radeon/rs600.c rs600_gart_fini(rdev); rdev 1165 drivers/gpu/drm/radeon/rs600.c radeon_irq_kms_fini(rdev); rdev 1166 drivers/gpu/drm/radeon/rs600.c rdev->accel_working = false; rdev 37 drivers/gpu/drm/radeon/rs690.c int rs690_mc_wait_for_idle(struct radeon_device *rdev) rdev 42 drivers/gpu/drm/radeon/rs690.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 52 drivers/gpu/drm/radeon/rs690.c static void rs690_gpu_init(struct radeon_device *rdev) rdev 55 drivers/gpu/drm/radeon/rs690.c r420_pipes_init(rdev); rdev 56 drivers/gpu/drm/radeon/rs690.c if (rs690_mc_wait_for_idle(rdev)) { rdev 66 drivers/gpu/drm/radeon/rs690.c void rs690_pm_info(struct radeon_device *rdev) rdev 74 drivers/gpu/drm/radeon/rs690.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, NULL, rdev 76 drivers/gpu/drm/radeon/rs690.c info = (union igp_info *)(rdev->mode_info.atom_context->bios + data_offset); rdev 82 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info.ulBootUpMemoryClock)); rdev 83 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); rdev 85 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock)); rdev 86 drivers/gpu/drm/radeon/rs690.c else if (rdev->clock.default_mclk) { rdev 87 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); rdev 88 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp); rdev 90 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(400); rdev 91 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_clk.full = dfixed_const(le16_to_cpu(info->info.usFSBClock)); rdev 92 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_width.full = dfixed_const(info->info.ucHTLinkWidth); rdev 96 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpSidePortClock)); rdev 97 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); rdev 99 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpUMAClock)); rdev 100 drivers/gpu/drm/radeon/rs690.c else if (rdev->clock.default_mclk) rdev 101 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); rdev 103 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(66700); rdev 104 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp); rdev 105 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_clk.full = dfixed_const(le32_to_cpu(info->info_v2.ulHTLinkFreq)); rdev 106 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_clk.full = dfixed_div(rdev->pm.igp_ht_link_clk, tmp); rdev 107 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_width.full = dfixed_const(le16_to_cpu(info->info_v2.usMinHTLinkWidth)); rdev 111 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_sideport_mclk.full = dfixed_const(200); rdev 112 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(200); rdev 113 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_clk.full = dfixed_const(1000); rdev 114 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_width.full = dfixed_const(8); rdev 120 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_sideport_mclk.full = dfixed_const(200); rdev 121 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_system_mclk.full = dfixed_const(200); rdev 122 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_clk.full = dfixed_const(1000); rdev 123 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_width.full = dfixed_const(8); rdev 129 drivers/gpu/drm/radeon/rs690.c rdev->pm.k8_bandwidth.full = dfixed_mul(rdev->pm.igp_system_mclk, tmp); rdev 134 drivers/gpu/drm/radeon/rs690.c rdev->pm.ht_bandwidth.full = dfixed_mul(rdev->pm.igp_ht_link_clk, rdev 135 drivers/gpu/drm/radeon/rs690.c rdev->pm.igp_ht_link_width); rdev 136 drivers/gpu/drm/radeon/rs690.c rdev->pm.ht_bandwidth.full = dfixed_div(rdev->pm.ht_bandwidth, tmp); rdev 137 drivers/gpu/drm/radeon/rs690.c if (tmp.full < rdev->pm.max_bandwidth.full) { rdev 139 drivers/gpu/drm/radeon/rs690.c rdev->pm.max_bandwidth.full = tmp.full; rdev 145 drivers/gpu/drm/radeon/rs690.c rdev->pm.sideport_bandwidth.full = dfixed_mul(rdev->pm.igp_sideport_mclk, tmp); rdev 147 drivers/gpu/drm/radeon/rs690.c rdev->pm.sideport_bandwidth.full = dfixed_div(rdev->pm.sideport_bandwidth, tmp); rdev 150 drivers/gpu/drm/radeon/rs690.c static void rs690_mc_init(struct radeon_device *rdev) rdev 156 drivers/gpu/drm/radeon/rs690.c rs400_gart_adjust_size(rdev); rdev 157 drivers/gpu/drm/radeon/rs690.c rdev->mc.vram_is_ddr = true; rdev 158 drivers/gpu/drm/radeon/rs690.c rdev->mc.vram_width = 128; rdev 159 drivers/gpu/drm/radeon/rs690.c rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); rdev 160 drivers/gpu/drm/radeon/rs690.c rdev->mc.mc_vram_size = rdev->mc.real_vram_size; rdev 161 drivers/gpu/drm/radeon/rs690.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 162 drivers/gpu/drm/radeon/rs690.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 163 drivers/gpu/drm/radeon/rs690.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 166 drivers/gpu/drm/radeon/rs690.c rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); rdev 171 drivers/gpu/drm/radeon/rs690.c if (rdev->mc.igp_sideport_enabled && rdev 172 drivers/gpu/drm/radeon/rs690.c (rdev->mc.real_vram_size == (384 * 1024 * 1024))) { rdev 174 drivers/gpu/drm/radeon/rs690.c rdev->mc.real_vram_size -= 128 * 1024 * 1024; rdev 175 drivers/gpu/drm/radeon/rs690.c rdev->mc.mc_vram_size = rdev->mc.real_vram_size; rdev 179 drivers/gpu/drm/radeon/rs690.c rdev->fastfb_working = false; rdev 184 drivers/gpu/drm/radeon/rs690.c if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL) rdev 190 drivers/gpu/drm/radeon/rs690.c if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) { rdev 192 drivers/gpu/drm/radeon/rs690.c (unsigned long long)rdev->mc.aper_base, k8_addr); rdev 193 drivers/gpu/drm/radeon/rs690.c rdev->mc.aper_base = (resource_size_t)k8_addr; rdev 194 drivers/gpu/drm/radeon/rs690.c rdev->fastfb_working = true; rdev 198 drivers/gpu/drm/radeon/rs690.c rs690_pm_info(rdev); rdev 199 drivers/gpu/drm/radeon/rs690.c radeon_vram_location(rdev, &rdev->mc, base); rdev 200 drivers/gpu/drm/radeon/rs690.c rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1; rdev 201 drivers/gpu/drm/radeon/rs690.c radeon_gtt_location(rdev, &rdev->mc); rdev 202 drivers/gpu/drm/radeon/rs690.c radeon_update_bandwidth_info(rdev); rdev 205 drivers/gpu/drm/radeon/rs690.c void rs690_line_buffer_adjust(struct radeon_device *rdev, rdev 253 drivers/gpu/drm/radeon/rs690.c rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); rdev 256 drivers/gpu/drm/radeon/rs690.c rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); rdev 272 drivers/gpu/drm/radeon/rs690.c static void rs690_crtc_bandwidth_compute(struct radeon_device *rdev, rdev 290 drivers/gpu/drm/radeon/rs690.c if (((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880)) && rdev 291 drivers/gpu/drm/radeon/rs690.c (rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) rdev 292 drivers/gpu/drm/radeon/rs690.c selected_sclk = radeon_dpm_get_sclk(rdev, low); rdev 294 drivers/gpu/drm/radeon/rs690.c selected_sclk = rdev->pm.current_sclk; rdev 303 drivers/gpu/drm/radeon/rs690.c core_bandwidth.full = dfixed_div(rdev->pm.sclk, a); rdev 366 drivers/gpu/drm/radeon/rs690.c if (rdev->mc.igp_sideport_enabled) { rdev 367 drivers/gpu/drm/radeon/rs690.c if (max_bandwidth.full > rdev->pm.sideport_bandwidth.full && rdev 368 drivers/gpu/drm/radeon/rs690.c rdev->pm.sideport_bandwidth.full) rdev 369 drivers/gpu/drm/radeon/rs690.c max_bandwidth = rdev->pm.sideport_bandwidth; rdev 372 drivers/gpu/drm/radeon/rs690.c b.full = dfixed_div(rdev->pm.igp_sideport_mclk, a); rdev 376 drivers/gpu/drm/radeon/rs690.c if (max_bandwidth.full > rdev->pm.k8_bandwidth.full && rdev 377 drivers/gpu/drm/radeon/rs690.c rdev->pm.k8_bandwidth.full) rdev 378 drivers/gpu/drm/radeon/rs690.c max_bandwidth = rdev->pm.k8_bandwidth; rdev 379 drivers/gpu/drm/radeon/rs690.c if (max_bandwidth.full > rdev->pm.ht_bandwidth.full && rdev 380 drivers/gpu/drm/radeon/rs690.c rdev->pm.ht_bandwidth.full) rdev 381 drivers/gpu/drm/radeon/rs690.c max_bandwidth = rdev->pm.ht_bandwidth; rdev 460 drivers/gpu/drm/radeon/rs690.c static void rs690_compute_mode_priority(struct radeon_device *rdev, rdev 523 drivers/gpu/drm/radeon/rs690.c if (rdev->disp_priority == 2) { rdev 552 drivers/gpu/drm/radeon/rs690.c if (rdev->disp_priority == 2) rdev 579 drivers/gpu/drm/radeon/rs690.c if (rdev->disp_priority == 2) rdev 584 drivers/gpu/drm/radeon/rs690.c void rs690_bandwidth_update(struct radeon_device *rdev) rdev 594 drivers/gpu/drm/radeon/rs690.c if (!rdev->mode_info.mode_config_initialized) rdev 597 drivers/gpu/drm/radeon/rs690.c radeon_update_display_priority(rdev); rdev 599 drivers/gpu/drm/radeon/rs690.c if (rdev->mode_info.crtcs[0]->base.enabled) rdev 600 drivers/gpu/drm/radeon/rs690.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; rdev 601 drivers/gpu/drm/radeon/rs690.c if (rdev->mode_info.crtcs[1]->base.enabled) rdev 602 drivers/gpu/drm/radeon/rs690.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; rdev 608 drivers/gpu/drm/radeon/rs690.c if ((rdev->disp_priority == 2) && rdev 609 drivers/gpu/drm/radeon/rs690.c ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740))) { rdev 619 drivers/gpu/drm/radeon/rs690.c rs690_line_buffer_adjust(rdev, mode0, mode1); rdev 621 drivers/gpu/drm/radeon/rs690.c if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) rdev 623 drivers/gpu/drm/radeon/rs690.c if ((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880)) rdev 626 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false); rdev 627 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false); rdev 629 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, true); rdev 630 drivers/gpu/drm/radeon/rs690.c rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, true); rdev 636 drivers/gpu/drm/radeon/rs690.c rs690_compute_mode_priority(rdev, rdev 640 drivers/gpu/drm/radeon/rs690.c rs690_compute_mode_priority(rdev, rdev 651 drivers/gpu/drm/radeon/rs690.c uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg) rdev 656 drivers/gpu/drm/radeon/rs690.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 660 drivers/gpu/drm/radeon/rs690.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 664 drivers/gpu/drm/radeon/rs690.c void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 668 drivers/gpu/drm/radeon/rs690.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 673 drivers/gpu/drm/radeon/rs690.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 676 drivers/gpu/drm/radeon/rs690.c static void rs690_mc_program(struct radeon_device *rdev) rdev 681 drivers/gpu/drm/radeon/rs690.c rv515_mc_stop(rdev, &save); rdev 684 drivers/gpu/drm/radeon/rs690.c if (rs690_mc_wait_for_idle(rdev)) rdev 685 drivers/gpu/drm/radeon/rs690.c dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rdev 688 drivers/gpu/drm/radeon/rs690.c S_000100_MC_FB_START(rdev->mc.vram_start >> 16) | rdev 689 drivers/gpu/drm/radeon/rs690.c S_000100_MC_FB_TOP(rdev->mc.vram_end >> 16)); rdev 691 drivers/gpu/drm/radeon/rs690.c S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); rdev 693 drivers/gpu/drm/radeon/rs690.c rv515_mc_resume(rdev, &save); rdev 696 drivers/gpu/drm/radeon/rs690.c static int rs690_startup(struct radeon_device *rdev) rdev 700 drivers/gpu/drm/radeon/rs690.c rs690_mc_program(rdev); rdev 702 drivers/gpu/drm/radeon/rs690.c rv515_clock_startup(rdev); rdev 704 drivers/gpu/drm/radeon/rs690.c rs690_gpu_init(rdev); rdev 707 drivers/gpu/drm/radeon/rs690.c r = rs400_gart_enable(rdev); rdev 712 drivers/gpu/drm/radeon/rs690.c r = radeon_wb_init(rdev); rdev 716 drivers/gpu/drm/radeon/rs690.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 718 drivers/gpu/drm/radeon/rs690.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 723 drivers/gpu/drm/radeon/rs690.c if (!rdev->irq.installed) { rdev 724 drivers/gpu/drm/radeon/rs690.c r = radeon_irq_kms_init(rdev); rdev 729 drivers/gpu/drm/radeon/rs690.c rs600_irq_set(rdev); rdev 730 drivers/gpu/drm/radeon/rs690.c rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 732 drivers/gpu/drm/radeon/rs690.c r = r100_cp_init(rdev, 1024 * 1024); rdev 734 drivers/gpu/drm/radeon/rs690.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 738 drivers/gpu/drm/radeon/rs690.c r = radeon_ib_pool_init(rdev); rdev 740 drivers/gpu/drm/radeon/rs690.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 744 drivers/gpu/drm/radeon/rs690.c r = radeon_audio_init(rdev); rdev 746 drivers/gpu/drm/radeon/rs690.c dev_err(rdev->dev, "failed initializing audio\n"); rdev 753 drivers/gpu/drm/radeon/rs690.c int rs690_resume(struct radeon_device *rdev) rdev 758 drivers/gpu/drm/radeon/rs690.c rs400_gart_disable(rdev); rdev 760 drivers/gpu/drm/radeon/rs690.c rv515_clock_startup(rdev); rdev 762 drivers/gpu/drm/radeon/rs690.c if (radeon_asic_reset(rdev)) { rdev 763 drivers/gpu/drm/radeon/rs690.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 768 drivers/gpu/drm/radeon/rs690.c atom_asic_init(rdev->mode_info.atom_context); rdev 770 drivers/gpu/drm/radeon/rs690.c rv515_clock_startup(rdev); rdev 772 drivers/gpu/drm/radeon/rs690.c radeon_surface_init(rdev); rdev 774 drivers/gpu/drm/radeon/rs690.c rdev->accel_working = true; rdev 775 drivers/gpu/drm/radeon/rs690.c r = rs690_startup(rdev); rdev 777 drivers/gpu/drm/radeon/rs690.c rdev->accel_working = false; rdev 782 drivers/gpu/drm/radeon/rs690.c int rs690_suspend(struct radeon_device *rdev) rdev 784 drivers/gpu/drm/radeon/rs690.c radeon_pm_suspend(rdev); rdev 785 drivers/gpu/drm/radeon/rs690.c radeon_audio_fini(rdev); rdev 786 drivers/gpu/drm/radeon/rs690.c r100_cp_disable(rdev); rdev 787 drivers/gpu/drm/radeon/rs690.c radeon_wb_disable(rdev); rdev 788 drivers/gpu/drm/radeon/rs690.c rs600_irq_disable(rdev); rdev 789 drivers/gpu/drm/radeon/rs690.c rs400_gart_disable(rdev); rdev 793 drivers/gpu/drm/radeon/rs690.c void rs690_fini(struct radeon_device *rdev) rdev 795 drivers/gpu/drm/radeon/rs690.c radeon_pm_fini(rdev); rdev 796 drivers/gpu/drm/radeon/rs690.c radeon_audio_fini(rdev); rdev 797 drivers/gpu/drm/radeon/rs690.c r100_cp_fini(rdev); rdev 798 drivers/gpu/drm/radeon/rs690.c radeon_wb_fini(rdev); rdev 799 drivers/gpu/drm/radeon/rs690.c radeon_ib_pool_fini(rdev); rdev 800 drivers/gpu/drm/radeon/rs690.c radeon_gem_fini(rdev); rdev 801 drivers/gpu/drm/radeon/rs690.c rs400_gart_fini(rdev); rdev 802 drivers/gpu/drm/radeon/rs690.c radeon_irq_kms_fini(rdev); rdev 803 drivers/gpu/drm/radeon/rs690.c radeon_fence_driver_fini(rdev); rdev 804 drivers/gpu/drm/radeon/rs690.c radeon_bo_fini(rdev); rdev 805 drivers/gpu/drm/radeon/rs690.c radeon_atombios_fini(rdev); rdev 806 drivers/gpu/drm/radeon/rs690.c kfree(rdev->bios); rdev 807 drivers/gpu/drm/radeon/rs690.c rdev->bios = NULL; rdev 810 drivers/gpu/drm/radeon/rs690.c int rs690_init(struct radeon_device *rdev) rdev 815 drivers/gpu/drm/radeon/rs690.c rv515_vga_render_disable(rdev); rdev 817 drivers/gpu/drm/radeon/rs690.c radeon_scratch_init(rdev); rdev 819 drivers/gpu/drm/radeon/rs690.c radeon_surface_init(rdev); rdev 821 drivers/gpu/drm/radeon/rs690.c r100_restore_sanity(rdev); rdev 824 drivers/gpu/drm/radeon/rs690.c if (!radeon_get_bios(rdev)) { rdev 825 drivers/gpu/drm/radeon/rs690.c if (ASIC_IS_AVIVO(rdev)) rdev 828 drivers/gpu/drm/radeon/rs690.c if (rdev->is_atom_bios) { rdev 829 drivers/gpu/drm/radeon/rs690.c r = radeon_atombios_init(rdev); rdev 833 drivers/gpu/drm/radeon/rs690.c dev_err(rdev->dev, "Expecting atombios for RV515 GPU\n"); rdev 837 drivers/gpu/drm/radeon/rs690.c if (radeon_asic_reset(rdev)) { rdev 838 drivers/gpu/drm/radeon/rs690.c dev_warn(rdev->dev, rdev 844 drivers/gpu/drm/radeon/rs690.c if (radeon_boot_test_post_card(rdev) == false) rdev 848 drivers/gpu/drm/radeon/rs690.c radeon_get_clock_info(rdev->ddev); rdev 850 drivers/gpu/drm/radeon/rs690.c rs690_mc_init(rdev); rdev 851 drivers/gpu/drm/radeon/rs690.c rv515_debugfs(rdev); rdev 853 drivers/gpu/drm/radeon/rs690.c r = radeon_fence_driver_init(rdev); rdev 857 drivers/gpu/drm/radeon/rs690.c r = radeon_bo_init(rdev); rdev 860 drivers/gpu/drm/radeon/rs690.c r = rs400_gart_init(rdev); rdev 863 drivers/gpu/drm/radeon/rs690.c rs600_set_safe_registers(rdev); rdev 866 drivers/gpu/drm/radeon/rs690.c radeon_pm_init(rdev); rdev 868 drivers/gpu/drm/radeon/rs690.c rdev->accel_working = true; rdev 869 drivers/gpu/drm/radeon/rs690.c r = rs690_startup(rdev); rdev 872 drivers/gpu/drm/radeon/rs690.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 873 drivers/gpu/drm/radeon/rs690.c r100_cp_fini(rdev); rdev 874 drivers/gpu/drm/radeon/rs690.c radeon_wb_fini(rdev); rdev 875 drivers/gpu/drm/radeon/rs690.c radeon_ib_pool_fini(rdev); rdev 876 drivers/gpu/drm/radeon/rs690.c rs400_gart_fini(rdev); rdev 877 drivers/gpu/drm/radeon/rs690.c radeon_irq_kms_fini(rdev); rdev 878 drivers/gpu/drm/radeon/rs690.c rdev->accel_working = false; rdev 43 drivers/gpu/drm/radeon/rs780_dpm.c static struct igp_power_info *rs780_get_pi(struct radeon_device *rdev) rdev 45 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rdev->pm.dpm.priv; rdev 50 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_get_pm_mode_parameters(struct radeon_device *rdev) rdev 52 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 53 drivers/gpu/drm/radeon/rs780_dpm.c struct radeon_mode_info *minfo = &rdev->mode_info; rdev 62 drivers/gpu/drm/radeon/rs780_dpm.c for (i = 0; i < rdev->num_crtc; i++) { rdev 74 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_voltage_scaling_enable(struct radeon_device *rdev, bool enable); rdev 76 drivers/gpu/drm/radeon/rs780_dpm.c static int rs780_initialize_dpm_power_state(struct radeon_device *rdev, rdev 83 drivers/gpu/drm/radeon/rs780_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 88 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div); rdev 89 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_set_feedback_divider(rdev, 0, dividers.fb_div); rdev 90 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_set_post_divider(rdev, 0, dividers.post_div); rdev 93 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_enable_post_divider(rdev, 0, true); rdev 95 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_enable_post_divider(rdev, 0, false); rdev 97 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_set_step_time(rdev, 0, R600_SST_DFLT); rdev 98 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_enable_pulse_skipping(rdev, 0, false); rdev 100 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_enable(rdev, 0, true); rdev 102 drivers/gpu/drm/radeon/rs780_dpm.c r600_engine_clock_entry_enable(rdev, i, false); rdev 104 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_mclk_control(rdev, false); rdev 105 drivers/gpu/drm/radeon/rs780_dpm.c r600_voltage_control_enable_pins(rdev, 0); rdev 110 drivers/gpu/drm/radeon/rs780_dpm.c static int rs780_initialize_dpm_parameters(struct radeon_device *rdev, rdev 116 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_bsp(rdev, R600_BSU_DFLT, R600_BSP_DFLT); rdev 118 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_at(rdev, 0, 0, 0, 0); rdev 120 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_git(rdev, R600_GICST_DFLT); rdev 123 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_tc(rdev, i, 0, 0); rdev 125 drivers/gpu/drm/radeon/rs780_dpm.c r600_select_td(rdev, R600_TD_DFLT); rdev 126 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_vrc(rdev, 0); rdev 128 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_tpu(rdev, R600_TPU_DFLT); rdev 129 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_tpc(rdev, R600_TPC_DFLT); rdev 131 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_sstu(rdev, R600_SSTU_DFLT); rdev 132 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_sst(rdev, R600_SST_DFLT); rdev 134 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_fctu(rdev, R600_FCTU_DFLT); rdev 135 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_fct(rdev, R600_FCT_DFLT); rdev 137 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_vddc3d_oorsu(rdev, R600_VDDC3DOORSU_DFLT); rdev 138 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_vddc3d_oorphc(rdev, R600_VDDC3DOORPHC_DFLT); rdev 139 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_vddc3d_oorsdc(rdev, R600_VDDC3DOORSDC_DFLT); rdev 140 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_ctxcgtt3d_rphc(rdev, R600_CTXCGTT3DRPHC_DFLT); rdev 141 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_ctxcgtt3d_rsdc(rdev, R600_CTXCGTT3DRSDC_DFLT); rdev 143 drivers/gpu/drm/radeon/rs780_dpm.c r600_vid_rt_set_vru(rdev, R600_VRU_DFLT); rdev 144 drivers/gpu/drm/radeon/rs780_dpm.c r600_vid_rt_set_vrt(rdev, R600_VOLTAGERESPONSETIME_DFLT); rdev 145 drivers/gpu/drm/radeon/rs780_dpm.c r600_vid_rt_set_ssu(rdev, R600_SPLLSTEPUNIT_DFLT); rdev 147 drivers/gpu/drm/radeon/rs780_dpm.c ret = rs780_initialize_dpm_power_state(rdev, boot_ps); rdev 149 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_LOW, 0); rdev 150 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_MEDIUM, 0); rdev 151 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_HIGH, 0); rdev 153 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); rdev 154 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, 0); rdev 155 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_HIGH, 0); rdev 157 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); rdev 158 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, 0); rdev 159 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_HIGH, 0); rdev 161 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_LOW, R600_DISPLAY_WATERMARK_HIGH); rdev 162 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_MEDIUM, R600_DISPLAY_WATERMARK_HIGH); rdev 163 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_HIGH, R600_DISPLAY_WATERMARK_HIGH); rdev 165 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_CTXSW, false); rdev 166 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false); rdev 167 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false); rdev 168 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); rdev 170 drivers/gpu/drm/radeon/rs780_dpm.c r600_power_level_set_enter_index(rdev, R600_POWER_LEVEL_LOW); rdev 172 drivers/gpu/drm/radeon/rs780_dpm.c r600_set_vrc(rdev, RS780_CGFTV_DFLT); rdev 177 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_start_dpm(struct radeon_device *rdev) rdev 179 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_sclk_control(rdev, false); rdev 180 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_mclk_control(rdev, false); rdev 182 drivers/gpu/drm/radeon/rs780_dpm.c r600_dynamicpm_enable(rdev, true); rdev 184 drivers/gpu/drm/radeon/rs780_dpm.c radeon_wait_for_vblank(rdev, 0); rdev 185 drivers/gpu/drm/radeon/rs780_dpm.c radeon_wait_for_vblank(rdev, 1); rdev 187 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_spll_bypass(rdev, true); rdev 188 drivers/gpu/drm/radeon/rs780_dpm.c r600_wait_for_spll_change(rdev); rdev 189 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_spll_bypass(rdev, false); rdev 190 drivers/gpu/drm/radeon/rs780_dpm.c r600_wait_for_spll_change(rdev); rdev 192 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_spll_bypass(rdev, true); rdev 193 drivers/gpu/drm/radeon/rs780_dpm.c r600_wait_for_spll_change(rdev); rdev 194 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_spll_bypass(rdev, false); rdev 195 drivers/gpu/drm/radeon/rs780_dpm.c r600_wait_for_spll_change(rdev); rdev 197 drivers/gpu/drm/radeon/rs780_dpm.c r600_enable_sclk_control(rdev, true); rdev 201 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_preset_ranges_slow_clk_fbdiv_en(struct radeon_device *rdev) rdev 211 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_preset_starting_fbdiv(struct radeon_device *rdev) rdev 224 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_voltage_scaling_init(struct radeon_device *rdev) rdev 226 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 227 drivers/gpu/drm/radeon/rs780_dpm.c struct drm_device *dev = rdev->ddev; rdev 278 drivers/gpu/drm/radeon/rs780_dpm.c rs780_voltage_scaling_enable(rdev, true); rdev 305 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_clk_scaling_enable(struct radeon_device *rdev, bool enable) rdev 315 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_voltage_scaling_enable(struct radeon_device *rdev, bool enable) rdev 323 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_set_engine_clock_wfc(struct radeon_device *rdev) rdev 338 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_set_engine_clock_sc(struct radeon_device *rdev) rdev 349 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_set_engine_clock_tdc(struct radeon_device *rdev) rdev 354 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_set_engine_clock_ssc(struct radeon_device *rdev) rdev 364 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_program_at(struct radeon_device *rdev) rdev 366 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 375 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_disable_vbios_powersaving(struct radeon_device *rdev) rdev 380 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_force_voltage(struct radeon_device *rdev, u16 voltage) rdev 382 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); rdev 407 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_force_fbdiv(struct radeon_device *rdev, u32 fb_div) rdev 409 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); rdev 427 drivers/gpu/drm/radeon/rs780_dpm.c static int rs780_set_engine_clock_scaling(struct radeon_device *rdev, rdev 440 drivers/gpu/drm/radeon/rs780_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 445 drivers/gpu/drm/radeon/rs780_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 450 drivers/gpu/drm/radeon/rs780_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 461 drivers/gpu/drm/radeon/rs780_dpm.c rs780_force_fbdiv(rdev, max_dividers.fb_div); rdev 475 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_set_engine_clock_spc(struct radeon_device *rdev, rdev 481 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 494 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_activate_engine_clk_scaling(struct radeon_device *rdev, rdev 508 drivers/gpu/drm/radeon/rs780_dpm.c rs780_clk_scaling_enable(rdev, true); rdev 511 drivers/gpu/drm/radeon/rs780_dpm.c static u32 rs780_get_voltage_for_vddc_level(struct radeon_device *rdev, rdev 514 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 524 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_enable_voltage_scaling(struct radeon_device *rdev, rdev 528 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 537 drivers/gpu/drm/radeon/rs780_dpm.c vddc_high = rs780_get_voltage_for_vddc_level(rdev, rdev 539 drivers/gpu/drm/radeon/rs780_dpm.c vddc_low = rs780_get_voltage_for_vddc_level(rdev, rdev 565 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 579 drivers/gpu/drm/radeon/rs780_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 582 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 596 drivers/gpu/drm/radeon/rs780_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 599 drivers/gpu/drm/radeon/rs780_dpm.c int rs780_dpm_enable(struct radeon_device *rdev) rdev 601 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 602 drivers/gpu/drm/radeon/rs780_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 605 drivers/gpu/drm/radeon/rs780_dpm.c rs780_get_pm_mode_parameters(rdev); rdev 606 drivers/gpu/drm/radeon/rs780_dpm.c rs780_disable_vbios_powersaving(rdev); rdev 608 drivers/gpu/drm/radeon/rs780_dpm.c if (r600_dynamicpm_enabled(rdev)) rdev 610 drivers/gpu/drm/radeon/rs780_dpm.c ret = rs780_initialize_dpm_parameters(rdev, boot_ps); rdev 613 drivers/gpu/drm/radeon/rs780_dpm.c rs780_start_dpm(rdev); rdev 615 drivers/gpu/drm/radeon/rs780_dpm.c rs780_preset_ranges_slow_clk_fbdiv_en(rdev); rdev 616 drivers/gpu/drm/radeon/rs780_dpm.c rs780_preset_starting_fbdiv(rdev); rdev 618 drivers/gpu/drm/radeon/rs780_dpm.c rs780_voltage_scaling_init(rdev); rdev 619 drivers/gpu/drm/radeon/rs780_dpm.c rs780_clk_scaling_enable(rdev, true); rdev 620 drivers/gpu/drm/radeon/rs780_dpm.c rs780_set_engine_clock_sc(rdev); rdev 621 drivers/gpu/drm/radeon/rs780_dpm.c rs780_set_engine_clock_wfc(rdev); rdev 622 drivers/gpu/drm/radeon/rs780_dpm.c rs780_program_at(rdev); rdev 623 drivers/gpu/drm/radeon/rs780_dpm.c rs780_set_engine_clock_tdc(rdev); rdev 624 drivers/gpu/drm/radeon/rs780_dpm.c rs780_set_engine_clock_ssc(rdev); rdev 627 drivers/gpu/drm/radeon/rs780_dpm.c r600_gfx_clockgating_enable(rdev, true); rdev 632 drivers/gpu/drm/radeon/rs780_dpm.c void rs780_dpm_disable(struct radeon_device *rdev) rdev 634 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 636 drivers/gpu/drm/radeon/rs780_dpm.c r600_dynamicpm_enable(rdev, false); rdev 638 drivers/gpu/drm/radeon/rs780_dpm.c rs780_clk_scaling_enable(rdev, false); rdev 639 drivers/gpu/drm/radeon/rs780_dpm.c rs780_voltage_scaling_enable(rdev, false); rdev 642 drivers/gpu/drm/radeon/rs780_dpm.c r600_gfx_clockgating_enable(rdev, false); rdev 644 drivers/gpu/drm/radeon/rs780_dpm.c if (rdev->irq.installed && rdev 645 drivers/gpu/drm/radeon/rs780_dpm.c (rdev->pm.int_thermal_type == THERMAL_TYPE_RV6XX)) { rdev 646 drivers/gpu/drm/radeon/rs780_dpm.c rdev->irq.dpm_thermal = false; rdev 647 drivers/gpu/drm/radeon/rs780_dpm.c radeon_irq_set(rdev); rdev 651 drivers/gpu/drm/radeon/rs780_dpm.c int rs780_dpm_set_power_state(struct radeon_device *rdev) rdev 653 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 654 drivers/gpu/drm/radeon/rs780_dpm.c struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; rdev 655 drivers/gpu/drm/radeon/rs780_dpm.c struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; rdev 658 drivers/gpu/drm/radeon/rs780_dpm.c rs780_get_pm_mode_parameters(rdev); rdev 660 drivers/gpu/drm/radeon/rs780_dpm.c rs780_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 663 drivers/gpu/drm/radeon/rs780_dpm.c rs780_force_voltage(rdev, pi->max_voltage); rdev 667 drivers/gpu/drm/radeon/rs780_dpm.c ret = rs780_set_engine_clock_scaling(rdev, new_ps, old_ps); rdev 670 drivers/gpu/drm/radeon/rs780_dpm.c rs780_set_engine_clock_spc(rdev, new_ps, old_ps); rdev 672 drivers/gpu/drm/radeon/rs780_dpm.c rs780_activate_engine_clk_scaling(rdev, new_ps, old_ps); rdev 675 drivers/gpu/drm/radeon/rs780_dpm.c rs780_enable_voltage_scaling(rdev, new_ps); rdev 677 drivers/gpu/drm/radeon/rs780_dpm.c rs780_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 682 drivers/gpu/drm/radeon/rs780_dpm.c void rs780_dpm_setup_asic(struct radeon_device *rdev) rdev 687 drivers/gpu/drm/radeon/rs780_dpm.c void rs780_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 689 drivers/gpu/drm/radeon/rs780_dpm.c rs780_get_pm_mode_parameters(rdev); rdev 690 drivers/gpu/drm/radeon/rs780_dpm.c rs780_program_at(rdev); rdev 719 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 744 drivers/gpu/drm/radeon/rs780_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 746 drivers/gpu/drm/radeon/rs780_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 749 drivers/gpu/drm/radeon/rs780_dpm.c static void rs780_parse_pplib_clock_info(struct radeon_device *rdev, rdev 784 drivers/gpu/drm/radeon/rs780_dpm.c ps->sclk_low = rdev->clock.default_sclk; rdev 785 drivers/gpu/drm/radeon/rs780_dpm.c ps->sclk_high = rdev->clock.default_sclk; rdev 791 drivers/gpu/drm/radeon/rs780_dpm.c static int rs780_parse_power_table(struct radeon_device *rdev) rdev 793 drivers/gpu/drm/radeon/rs780_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 809 drivers/gpu/drm/radeon/rs780_dpm.c rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, rdev 812 drivers/gpu/drm/radeon/rs780_dpm.c if (!rdev->pm.dpm.ps) rdev 833 drivers/gpu/drm/radeon/rs780_dpm.c kfree(rdev->pm.dpm.ps); rdev 836 drivers/gpu/drm/radeon/rs780_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 837 drivers/gpu/drm/radeon/rs780_dpm.c rs780_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 840 drivers/gpu/drm/radeon/rs780_dpm.c rs780_parse_pplib_clock_info(rdev, rdev 841 drivers/gpu/drm/radeon/rs780_dpm.c &rdev->pm.dpm.ps[i], rdev 845 drivers/gpu/drm/radeon/rs780_dpm.c rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates; rdev 849 drivers/gpu/drm/radeon/rs780_dpm.c int rs780_dpm_init(struct radeon_device *rdev) rdev 861 drivers/gpu/drm/radeon/rs780_dpm.c rdev->pm.dpm.priv = pi; rdev 863 drivers/gpu/drm/radeon/rs780_dpm.c ret = r600_get_platform_caps(rdev); rdev 867 drivers/gpu/drm/radeon/rs780_dpm.c ret = rs780_parse_power_table(rdev); rdev 874 drivers/gpu/drm/radeon/rs780_dpm.c if (atom_parse_data_header(rdev->mode_info.atom_context, index, NULL, rdev 876 drivers/gpu/drm/radeon/rs780_dpm.c info = (union igp_info *)(rdev->mode_info.atom_context->bios + data_offset); rdev 936 drivers/gpu/drm/radeon/rs780_dpm.c radeon_dpm_fini(rdev); rdev 940 drivers/gpu/drm/radeon/rs780_dpm.c void rs780_dpm_print_power_state(struct radeon_device *rdev, rdev 952 drivers/gpu/drm/radeon/rs780_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 955 drivers/gpu/drm/radeon/rs780_dpm.c void rs780_dpm_fini(struct radeon_device *rdev) rdev 959 drivers/gpu/drm/radeon/rs780_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 960 drivers/gpu/drm/radeon/rs780_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 962 drivers/gpu/drm/radeon/rs780_dpm.c kfree(rdev->pm.dpm.ps); rdev 963 drivers/gpu/drm/radeon/rs780_dpm.c kfree(rdev->pm.dpm.priv); rdev 966 drivers/gpu/drm/radeon/rs780_dpm.c u32 rs780_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 968 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_ps *requested_state = rs780_get_ps(rdev->pm.dpm.requested_ps); rdev 976 drivers/gpu/drm/radeon/rs780_dpm.c u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 978 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 983 drivers/gpu/drm/radeon/rs780_dpm.c void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 986 drivers/gpu/drm/radeon/rs780_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 993 drivers/gpu/drm/radeon/rs780_dpm.c u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / rdev 1008 drivers/gpu/drm/radeon/rs780_dpm.c u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev) rdev 1015 drivers/gpu/drm/radeon/rs780_dpm.c u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / rdev 1022 drivers/gpu/drm/radeon/rs780_dpm.c u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev) rdev 1024 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 1029 drivers/gpu/drm/radeon/rs780_dpm.c int rs780_dpm_force_performance_level(struct radeon_device *rdev, rdev 1032 drivers/gpu/drm/radeon/rs780_dpm.c struct igp_power_info *pi = rs780_get_pi(rdev); rdev 1033 drivers/gpu/drm/radeon/rs780_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 1038 drivers/gpu/drm/radeon/rs780_dpm.c rs780_clk_scaling_enable(rdev, false); rdev 1039 drivers/gpu/drm/radeon/rs780_dpm.c rs780_voltage_scaling_enable(rdev, false); rdev 1043 drivers/gpu/drm/radeon/rs780_dpm.c rs780_force_voltage(rdev, pi->max_voltage); rdev 1045 drivers/gpu/drm/radeon/rs780_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 1050 drivers/gpu/drm/radeon/rs780_dpm.c rs780_force_fbdiv(rdev, dividers.fb_div); rdev 1052 drivers/gpu/drm/radeon/rs780_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 1057 drivers/gpu/drm/radeon/rs780_dpm.c rs780_force_fbdiv(rdev, dividers.fb_div); rdev 1060 drivers/gpu/drm/radeon/rs780_dpm.c rs780_force_voltage(rdev, pi->min_voltage); rdev 1063 drivers/gpu/drm/radeon/rs780_dpm.c rs780_force_voltage(rdev, pi->max_voltage); rdev 1067 drivers/gpu/drm/radeon/rs780_dpm.c rs780_clk_scaling_enable(rdev, true); rdev 1071 drivers/gpu/drm/radeon/rs780_dpm.c rs780_voltage_scaling_enable(rdev, true); rdev 1072 drivers/gpu/drm/radeon/rs780_dpm.c rs780_enable_voltage_scaling(rdev, rps); rdev 1076 drivers/gpu/drm/radeon/rs780_dpm.c rdev->pm.dpm.forced_level = level; rdev 43 drivers/gpu/drm/radeon/rv515.c static int rv515_debugfs_pipes_info_init(struct radeon_device *rdev); rdev 44 drivers/gpu/drm/radeon/rv515.c static int rv515_debugfs_ga_info_init(struct radeon_device *rdev); rdev 45 drivers/gpu/drm/radeon/rv515.c static void rv515_gpu_init(struct radeon_device *rdev); rdev 46 drivers/gpu/drm/radeon/rv515.c int rv515_mc_wait_for_idle(struct radeon_device *rdev); rdev 54 drivers/gpu/drm/radeon/rv515.c void rv515_debugfs(struct radeon_device *rdev) rdev 56 drivers/gpu/drm/radeon/rv515.c if (r100_debugfs_rbbm_init(rdev)) { rdev 59 drivers/gpu/drm/radeon/rv515.c if (rv515_debugfs_pipes_info_init(rdev)) { rdev 62 drivers/gpu/drm/radeon/rv515.c if (rv515_debugfs_ga_info_init(rdev)) { rdev 67 drivers/gpu/drm/radeon/rv515.c void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring) rdev 71 drivers/gpu/drm/radeon/rv515.c r = radeon_ring_lock(rdev, ring, 64); rdev 90 drivers/gpu/drm/radeon/rv515.c radeon_ring_write(ring, (1 << rdev->num_gb_pipes) - 1); rdev 132 drivers/gpu/drm/radeon/rv515.c radeon_ring_unlock_commit(rdev, ring, false); rdev 135 drivers/gpu/drm/radeon/rv515.c int rv515_mc_wait_for_idle(struct radeon_device *rdev) rdev 140 drivers/gpu/drm/radeon/rv515.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 151 drivers/gpu/drm/radeon/rv515.c void rv515_vga_render_disable(struct radeon_device *rdev) rdev 157 drivers/gpu/drm/radeon/rv515.c static void rv515_gpu_init(struct radeon_device *rdev) rdev 161 drivers/gpu/drm/radeon/rv515.c if (r100_gui_wait_for_idle(rdev)) { rdev 164 drivers/gpu/drm/radeon/rv515.c rv515_vga_render_disable(rdev); rdev 165 drivers/gpu/drm/radeon/rv515.c r420_pipes_init(rdev); rdev 172 drivers/gpu/drm/radeon/rv515.c if (r100_gui_wait_for_idle(rdev)) { rdev 175 drivers/gpu/drm/radeon/rv515.c if (rv515_mc_wait_for_idle(rdev)) { rdev 180 drivers/gpu/drm/radeon/rv515.c static void rv515_vram_get_type(struct radeon_device *rdev) rdev 184 drivers/gpu/drm/radeon/rv515.c rdev->mc.vram_width = 128; rdev 185 drivers/gpu/drm/radeon/rv515.c rdev->mc.vram_is_ddr = true; rdev 189 drivers/gpu/drm/radeon/rv515.c rdev->mc.vram_width = 64; rdev 192 drivers/gpu/drm/radeon/rv515.c rdev->mc.vram_width = 128; rdev 195 drivers/gpu/drm/radeon/rv515.c rdev->mc.vram_width = 128; rdev 200 drivers/gpu/drm/radeon/rv515.c static void rv515_mc_init(struct radeon_device *rdev) rdev 203 drivers/gpu/drm/radeon/rv515.c rv515_vram_get_type(rdev); rdev 204 drivers/gpu/drm/radeon/rv515.c r100_vram_init_sizes(rdev); rdev 205 drivers/gpu/drm/radeon/rv515.c radeon_vram_location(rdev, &rdev->mc, 0); rdev 206 drivers/gpu/drm/radeon/rv515.c rdev->mc.gtt_base_align = 0; rdev 207 drivers/gpu/drm/radeon/rv515.c if (!(rdev->flags & RADEON_IS_AGP)) rdev 208 drivers/gpu/drm/radeon/rv515.c radeon_gtt_location(rdev, &rdev->mc); rdev 209 drivers/gpu/drm/radeon/rv515.c radeon_update_bandwidth_info(rdev); rdev 212 drivers/gpu/drm/radeon/rv515.c uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg) rdev 217 drivers/gpu/drm/radeon/rv515.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 221 drivers/gpu/drm/radeon/rv515.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 226 drivers/gpu/drm/radeon/rv515.c void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) rdev 230 drivers/gpu/drm/radeon/rv515.c spin_lock_irqsave(&rdev->mc_idx_lock, flags); rdev 234 drivers/gpu/drm/radeon/rv515.c spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); rdev 242 drivers/gpu/drm/radeon/rv515.c struct radeon_device *rdev = dev->dev_private; rdev 260 drivers/gpu/drm/radeon/rv515.c struct radeon_device *rdev = dev->dev_private; rdev 265 drivers/gpu/drm/radeon/rv515.c radeon_asic_reset(rdev); rdev 280 drivers/gpu/drm/radeon/rv515.c static int rv515_debugfs_pipes_info_init(struct radeon_device *rdev) rdev 283 drivers/gpu/drm/radeon/rv515.c return radeon_debugfs_add_files(rdev, rv515_pipes_info_list, 1); rdev 289 drivers/gpu/drm/radeon/rv515.c static int rv515_debugfs_ga_info_init(struct radeon_device *rdev) rdev 292 drivers/gpu/drm/radeon/rv515.c return radeon_debugfs_add_files(rdev, rv515_ga_info_list, 1); rdev 298 drivers/gpu/drm/radeon/rv515.c void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save) rdev 309 drivers/gpu/drm/radeon/rv515.c for (i = 0; i < rdev->num_crtc; i++) { rdev 315 drivers/gpu/drm/radeon/rv515.c radeon_wait_for_vblank(rdev, i); rdev 322 drivers/gpu/drm/radeon/rv515.c frame_count = radeon_get_vblank_counter(rdev, i); rdev 323 drivers/gpu/drm/radeon/rv515.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 324 drivers/gpu/drm/radeon/rv515.c if (radeon_get_vblank_counter(rdev, i) != frame_count) rdev 342 drivers/gpu/drm/radeon/rv515.c radeon_mc_wait_for_idle(rdev); rdev 344 drivers/gpu/drm/radeon/rv515.c if (rdev->family >= CHIP_R600) { rdev 345 drivers/gpu/drm/radeon/rv515.c if (rdev->family >= CHIP_RV770) rdev 354 drivers/gpu/drm/radeon/rv515.c if (rdev->family >= CHIP_RV770) rdev 364 drivers/gpu/drm/radeon/rv515.c for (i = 0; i < rdev->num_crtc; i++) { rdev 380 drivers/gpu/drm/radeon/rv515.c void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save) rdev 386 drivers/gpu/drm/radeon/rv515.c for (i = 0; i < rdev->num_crtc; i++) { rdev 387 drivers/gpu/drm/radeon/rv515.c if (rdev->family >= CHIP_RV770) { rdev 390 drivers/gpu/drm/radeon/rv515.c upper_32_bits(rdev->mc.vram_start)); rdev 392 drivers/gpu/drm/radeon/rv515.c upper_32_bits(rdev->mc.vram_start)); rdev 395 drivers/gpu/drm/radeon/rv515.c upper_32_bits(rdev->mc.vram_start)); rdev 397 drivers/gpu/drm/radeon/rv515.c upper_32_bits(rdev->mc.vram_start)); rdev 401 drivers/gpu/drm/radeon/rv515.c (u32)rdev->mc.vram_start); rdev 403 drivers/gpu/drm/radeon/rv515.c (u32)rdev->mc.vram_start); rdev 405 drivers/gpu/drm/radeon/rv515.c WREG32(R_000310_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start); rdev 408 drivers/gpu/drm/radeon/rv515.c for (i = 0; i < rdev->num_crtc; i++) { rdev 426 drivers/gpu/drm/radeon/rv515.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 435 drivers/gpu/drm/radeon/rv515.c if (rdev->family >= CHIP_R600) { rdev 437 drivers/gpu/drm/radeon/rv515.c if (rdev->family >= CHIP_RV770) rdev 442 drivers/gpu/drm/radeon/rv515.c if (rdev->family >= CHIP_RV770) rdev 450 drivers/gpu/drm/radeon/rv515.c for (i = 0; i < rdev->num_crtc; i++) { rdev 456 drivers/gpu/drm/radeon/rv515.c frame_count = radeon_get_vblank_counter(rdev, i); rdev 457 drivers/gpu/drm/radeon/rv515.c for (j = 0; j < rdev->usec_timeout; j++) { rdev 458 drivers/gpu/drm/radeon/rv515.c if (radeon_get_vblank_counter(rdev, i) != frame_count) rdev 470 drivers/gpu/drm/radeon/rv515.c static void rv515_mc_program(struct radeon_device *rdev) rdev 475 drivers/gpu/drm/radeon/rv515.c rv515_mc_stop(rdev, &save); rdev 478 drivers/gpu/drm/radeon/rv515.c if (rv515_mc_wait_for_idle(rdev)) rdev 479 drivers/gpu/drm/radeon/rv515.c dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); rdev 481 drivers/gpu/drm/radeon/rv515.c WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size); rdev 484 drivers/gpu/drm/radeon/rv515.c S_000001_MC_FB_START(rdev->mc.vram_start >> 16) | rdev 485 drivers/gpu/drm/radeon/rv515.c S_000001_MC_FB_TOP(rdev->mc.vram_end >> 16)); rdev 487 drivers/gpu/drm/radeon/rv515.c S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); rdev 488 drivers/gpu/drm/radeon/rv515.c if (rdev->flags & RADEON_IS_AGP) { rdev 490 drivers/gpu/drm/radeon/rv515.c S_000002_MC_AGP_START(rdev->mc.gtt_start >> 16) | rdev 491 drivers/gpu/drm/radeon/rv515.c S_000002_MC_AGP_TOP(rdev->mc.gtt_end >> 16)); rdev 492 drivers/gpu/drm/radeon/rv515.c WREG32_MC(R_000003_MC_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); rdev 494 drivers/gpu/drm/radeon/rv515.c S_000004_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base))); rdev 501 drivers/gpu/drm/radeon/rv515.c rv515_mc_resume(rdev, &save); rdev 504 drivers/gpu/drm/radeon/rv515.c void rv515_clock_startup(struct radeon_device *rdev) rdev 507 drivers/gpu/drm/radeon/rv515.c radeon_atom_set_clock_gating(rdev, 1); rdev 517 drivers/gpu/drm/radeon/rv515.c static int rv515_startup(struct radeon_device *rdev) rdev 521 drivers/gpu/drm/radeon/rv515.c rv515_mc_program(rdev); rdev 523 drivers/gpu/drm/radeon/rv515.c rv515_clock_startup(rdev); rdev 525 drivers/gpu/drm/radeon/rv515.c rv515_gpu_init(rdev); rdev 528 drivers/gpu/drm/radeon/rv515.c if (rdev->flags & RADEON_IS_PCIE) { rdev 529 drivers/gpu/drm/radeon/rv515.c r = rv370_pcie_gart_enable(rdev); rdev 535 drivers/gpu/drm/radeon/rv515.c r = radeon_wb_init(rdev); rdev 539 drivers/gpu/drm/radeon/rv515.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 541 drivers/gpu/drm/radeon/rv515.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 546 drivers/gpu/drm/radeon/rv515.c if (!rdev->irq.installed) { rdev 547 drivers/gpu/drm/radeon/rv515.c r = radeon_irq_kms_init(rdev); rdev 552 drivers/gpu/drm/radeon/rv515.c rs600_irq_set(rdev); rdev 553 drivers/gpu/drm/radeon/rv515.c rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); rdev 555 drivers/gpu/drm/radeon/rv515.c r = r100_cp_init(rdev, 1024 * 1024); rdev 557 drivers/gpu/drm/radeon/rv515.c dev_err(rdev->dev, "failed initializing CP (%d).\n", r); rdev 561 drivers/gpu/drm/radeon/rv515.c r = radeon_ib_pool_init(rdev); rdev 563 drivers/gpu/drm/radeon/rv515.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 570 drivers/gpu/drm/radeon/rv515.c int rv515_resume(struct radeon_device *rdev) rdev 575 drivers/gpu/drm/radeon/rv515.c if (rdev->flags & RADEON_IS_PCIE) rdev 576 drivers/gpu/drm/radeon/rv515.c rv370_pcie_gart_disable(rdev); rdev 578 drivers/gpu/drm/radeon/rv515.c rv515_clock_startup(rdev); rdev 580 drivers/gpu/drm/radeon/rv515.c if (radeon_asic_reset(rdev)) { rdev 581 drivers/gpu/drm/radeon/rv515.c dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", rdev 586 drivers/gpu/drm/radeon/rv515.c atom_asic_init(rdev->mode_info.atom_context); rdev 588 drivers/gpu/drm/radeon/rv515.c rv515_clock_startup(rdev); rdev 590 drivers/gpu/drm/radeon/rv515.c radeon_surface_init(rdev); rdev 592 drivers/gpu/drm/radeon/rv515.c rdev->accel_working = true; rdev 593 drivers/gpu/drm/radeon/rv515.c r = rv515_startup(rdev); rdev 595 drivers/gpu/drm/radeon/rv515.c rdev->accel_working = false; rdev 600 drivers/gpu/drm/radeon/rv515.c int rv515_suspend(struct radeon_device *rdev) rdev 602 drivers/gpu/drm/radeon/rv515.c radeon_pm_suspend(rdev); rdev 603 drivers/gpu/drm/radeon/rv515.c r100_cp_disable(rdev); rdev 604 drivers/gpu/drm/radeon/rv515.c radeon_wb_disable(rdev); rdev 605 drivers/gpu/drm/radeon/rv515.c rs600_irq_disable(rdev); rdev 606 drivers/gpu/drm/radeon/rv515.c if (rdev->flags & RADEON_IS_PCIE) rdev 607 drivers/gpu/drm/radeon/rv515.c rv370_pcie_gart_disable(rdev); rdev 611 drivers/gpu/drm/radeon/rv515.c void rv515_set_safe_registers(struct radeon_device *rdev) rdev 613 drivers/gpu/drm/radeon/rv515.c rdev->config.r300.reg_safe_bm = rv515_reg_safe_bm; rdev 614 drivers/gpu/drm/radeon/rv515.c rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rv515_reg_safe_bm); rdev 617 drivers/gpu/drm/radeon/rv515.c void rv515_fini(struct radeon_device *rdev) rdev 619 drivers/gpu/drm/radeon/rv515.c radeon_pm_fini(rdev); rdev 620 drivers/gpu/drm/radeon/rv515.c r100_cp_fini(rdev); rdev 621 drivers/gpu/drm/radeon/rv515.c radeon_wb_fini(rdev); rdev 622 drivers/gpu/drm/radeon/rv515.c radeon_ib_pool_fini(rdev); rdev 623 drivers/gpu/drm/radeon/rv515.c radeon_gem_fini(rdev); rdev 624 drivers/gpu/drm/radeon/rv515.c rv370_pcie_gart_fini(rdev); rdev 625 drivers/gpu/drm/radeon/rv515.c radeon_agp_fini(rdev); rdev 626 drivers/gpu/drm/radeon/rv515.c radeon_irq_kms_fini(rdev); rdev 627 drivers/gpu/drm/radeon/rv515.c radeon_fence_driver_fini(rdev); rdev 628 drivers/gpu/drm/radeon/rv515.c radeon_bo_fini(rdev); rdev 629 drivers/gpu/drm/radeon/rv515.c radeon_atombios_fini(rdev); rdev 630 drivers/gpu/drm/radeon/rv515.c kfree(rdev->bios); rdev 631 drivers/gpu/drm/radeon/rv515.c rdev->bios = NULL; rdev 634 drivers/gpu/drm/radeon/rv515.c int rv515_init(struct radeon_device *rdev) rdev 639 drivers/gpu/drm/radeon/rv515.c radeon_scratch_init(rdev); rdev 641 drivers/gpu/drm/radeon/rv515.c radeon_surface_init(rdev); rdev 644 drivers/gpu/drm/radeon/rv515.c r100_restore_sanity(rdev); rdev 646 drivers/gpu/drm/radeon/rv515.c if (!radeon_get_bios(rdev)) { rdev 647 drivers/gpu/drm/radeon/rv515.c if (ASIC_IS_AVIVO(rdev)) rdev 650 drivers/gpu/drm/radeon/rv515.c if (rdev->is_atom_bios) { rdev 651 drivers/gpu/drm/radeon/rv515.c r = radeon_atombios_init(rdev); rdev 655 drivers/gpu/drm/radeon/rv515.c dev_err(rdev->dev, "Expecting atombios for RV515 GPU\n"); rdev 659 drivers/gpu/drm/radeon/rv515.c if (radeon_asic_reset(rdev)) { rdev 660 drivers/gpu/drm/radeon/rv515.c dev_warn(rdev->dev, rdev 666 drivers/gpu/drm/radeon/rv515.c if (radeon_boot_test_post_card(rdev) == false) rdev 669 drivers/gpu/drm/radeon/rv515.c radeon_get_clock_info(rdev->ddev); rdev 671 drivers/gpu/drm/radeon/rv515.c if (rdev->flags & RADEON_IS_AGP) { rdev 672 drivers/gpu/drm/radeon/rv515.c r = radeon_agp_init(rdev); rdev 674 drivers/gpu/drm/radeon/rv515.c radeon_agp_disable(rdev); rdev 678 drivers/gpu/drm/radeon/rv515.c rv515_mc_init(rdev); rdev 679 drivers/gpu/drm/radeon/rv515.c rv515_debugfs(rdev); rdev 681 drivers/gpu/drm/radeon/rv515.c r = radeon_fence_driver_init(rdev); rdev 685 drivers/gpu/drm/radeon/rv515.c r = radeon_bo_init(rdev); rdev 688 drivers/gpu/drm/radeon/rv515.c r = rv370_pcie_gart_init(rdev); rdev 691 drivers/gpu/drm/radeon/rv515.c rv515_set_safe_registers(rdev); rdev 694 drivers/gpu/drm/radeon/rv515.c radeon_pm_init(rdev); rdev 696 drivers/gpu/drm/radeon/rv515.c rdev->accel_working = true; rdev 697 drivers/gpu/drm/radeon/rv515.c r = rv515_startup(rdev); rdev 700 drivers/gpu/drm/radeon/rv515.c dev_err(rdev->dev, "Disabling GPU acceleration\n"); rdev 701 drivers/gpu/drm/radeon/rv515.c r100_cp_fini(rdev); rdev 702 drivers/gpu/drm/radeon/rv515.c radeon_wb_fini(rdev); rdev 703 drivers/gpu/drm/radeon/rv515.c radeon_ib_pool_fini(rdev); rdev 704 drivers/gpu/drm/radeon/rv515.c radeon_irq_kms_fini(rdev); rdev 705 drivers/gpu/drm/radeon/rv515.c rv370_pcie_gart_fini(rdev); rdev 706 drivers/gpu/drm/radeon/rv515.c radeon_agp_fini(rdev); rdev 707 drivers/gpu/drm/radeon/rv515.c rdev->accel_working = false; rdev 712 drivers/gpu/drm/radeon/rv515.c void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *crtc) rdev 955 drivers/gpu/drm/radeon/rv515.c static void rv515_crtc_bandwidth_compute(struct radeon_device *rdev, rdev 974 drivers/gpu/drm/radeon/rv515.c if ((rdev->family >= CHIP_RV610) && rdev 975 drivers/gpu/drm/radeon/rv515.c (rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) rdev 976 drivers/gpu/drm/radeon/rv515.c selected_sclk = radeon_dpm_get_sclk(rdev, low); rdev 978 drivers/gpu/drm/radeon/rv515.c selected_sclk = rdev->pm.current_sclk; rdev 1111 drivers/gpu/drm/radeon/rv515.c static void rv515_compute_mode_priority(struct radeon_device *rdev, rdev 1174 drivers/gpu/drm/radeon/rv515.c if (rdev->disp_priority == 2) { rdev 1203 drivers/gpu/drm/radeon/rv515.c if (rdev->disp_priority == 2) rdev 1230 drivers/gpu/drm/radeon/rv515.c if (rdev->disp_priority == 2) rdev 1235 drivers/gpu/drm/radeon/rv515.c void rv515_bandwidth_avivo_update(struct radeon_device *rdev) rdev 1245 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[0]->base.enabled) rdev 1246 drivers/gpu/drm/radeon/rv515.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; rdev 1247 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[1]->base.enabled) rdev 1248 drivers/gpu/drm/radeon/rv515.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; rdev 1249 drivers/gpu/drm/radeon/rv515.c rs690_line_buffer_adjust(rdev, mode0, mode1); rdev 1251 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false); rdev 1252 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false); rdev 1254 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, false); rdev 1255 drivers/gpu/drm/radeon/rv515.c rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, false); rdev 1261 drivers/gpu/drm/radeon/rv515.c rv515_compute_mode_priority(rdev, rdev 1265 drivers/gpu/drm/radeon/rv515.c rv515_compute_mode_priority(rdev, rdev 1276 drivers/gpu/drm/radeon/rv515.c void rv515_bandwidth_update(struct radeon_device *rdev) rdev 1282 drivers/gpu/drm/radeon/rv515.c if (!rdev->mode_info.mode_config_initialized) rdev 1285 drivers/gpu/drm/radeon/rv515.c radeon_update_display_priority(rdev); rdev 1287 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[0]->base.enabled) rdev 1288 drivers/gpu/drm/radeon/rv515.c mode0 = &rdev->mode_info.crtcs[0]->base.mode; rdev 1289 drivers/gpu/drm/radeon/rv515.c if (rdev->mode_info.crtcs[1]->base.enabled) rdev 1290 drivers/gpu/drm/radeon/rv515.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; rdev 1296 drivers/gpu/drm/radeon/rv515.c if ((rdev->disp_priority == 2) && rdev 1297 drivers/gpu/drm/radeon/rv515.c (rdev->family == CHIP_RV515)) { rdev 1307 drivers/gpu/drm/radeon/rv515.c rv515_bandwidth_avivo_update(rdev); rdev 33 drivers/gpu/drm/radeon/rv6xx_dpm.c static u32 rv6xx_scale_count_given_unit(struct radeon_device *rdev, rdev 43 drivers/gpu/drm/radeon/rv6xx_dpm.c static struct rv6xx_power_info *rv6xx_get_pi(struct radeon_device *rdev) rdev 45 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rdev->pm.dpm.priv; rdev 50 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_force_pcie_gen1(struct radeon_device *rdev) rdev 63 drivers/gpu/drm/radeon/rv6xx_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 74 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_pcie_gen2_support(struct radeon_device *rdev) rdev 87 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 100 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_l0s(struct radeon_device *rdev) rdev 109 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_l1(struct radeon_device *rdev) rdev 121 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_pll_sleep_in_l1(struct radeon_device *rdev) rdev 138 drivers/gpu/drm/radeon/rv6xx_dpm.c static int rv6xx_convert_clock_to_stepping(struct radeon_device *rdev, rdev 144 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 159 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_output_stepping(struct radeon_device *rdev, rdev 162 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 163 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; rdev 165 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 spll_step_count = rv6xx_scale_count_given_unit(rdev, rdev 170 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_enable(rdev, step_index, true); rdev 171 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_enable_pulse_skipping(rdev, step_index, false); rdev 174 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_enable_post_divider(rdev, step_index, false); rdev 179 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_enable_post_divider(rdev, step_index, true); rdev 180 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_set_post_divider(rdev, step_index, (hi_len << 4) | lo_len); rdev 186 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_set_reference_divider(rdev, step_index, rdev 188 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_set_feedback_divider(rdev, step_index, fb_divider); rdev 189 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_set_step_time(rdev, step_index, spll_step_count); rdev 193 drivers/gpu/drm/radeon/rv6xx_dpm.c static struct rv6xx_sclk_stepping rv6xx_next_vco_step(struct radeon_device *rdev, rdev 209 drivers/gpu/drm/radeon/rv6xx_dpm.c static bool rv6xx_can_step_post_div(struct radeon_device *rdev, rdev 218 drivers/gpu/drm/radeon/rv6xx_dpm.c static struct rv6xx_sclk_stepping rv6xx_next_post_div_step(struct radeon_device *rdev, rdev 224 drivers/gpu/drm/radeon/rv6xx_dpm.c while (rv6xx_can_step_post_div(rdev, &next, target)) rdev 230 drivers/gpu/drm/radeon/rv6xx_dpm.c static bool rv6xx_reached_stepping_target(struct radeon_device *rdev, rdev 239 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_generate_steps(struct radeon_device *rdev, rdev 248 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_convert_clock_to_stepping(rdev, low, &cur); rdev 249 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_convert_clock_to_stepping(rdev, high, &target); rdev 251 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_output_stepping(rdev, step_index++, &cur); rdev 261 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rv6xx_can_step_post_div(rdev, &cur, &target)) rdev 262 drivers/gpu/drm/radeon/rv6xx_dpm.c next = rv6xx_next_post_div_step(rdev, &cur, &target); rdev 264 drivers/gpu/drm/radeon/rv6xx_dpm.c next = rv6xx_next_vco_step(rdev, &cur, increasing_vco, R600_VCOSTEPPCT_DFLT); rdev 266 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rv6xx_reached_stepping_target(rdev, &next, &target, increasing_vco)) { rdev 268 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_next_vco_step(rdev, &target, !increasing_vco, R600_ENDINGVCOSTEPPCT_DFLT); rdev 271 drivers/gpu/drm/radeon/rv6xx_dpm.c if (!rv6xx_reached_stepping_target(rdev, &tiny, &cur, !increasing_vco)) rdev 272 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_output_stepping(rdev, step_index++, &tiny); rdev 281 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_output_stepping(rdev, step_index++, &final_vco); rdev 284 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_output_stepping(rdev, step_index++, &target); rdev 287 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_output_stepping(rdev, step_index++, &next); rdev 296 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_generate_single_step(struct radeon_device *rdev, rdev 301 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_convert_clock_to_stepping(rdev, clock, &step); rdev 302 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_output_stepping(rdev, index, &step); rdev 305 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_invalidate_intermediate_steps_range(struct radeon_device *rdev, rdev 311 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_engine_clock_entry_enable(rdev, step_index, false); rdev 314 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_engine_spread_spectrum_clk_s(struct radeon_device *rdev, rdev 321 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_engine_spread_spectrum_clk_v(struct radeon_device *rdev, rdev 328 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_engine_spread_spectrum(struct radeon_device *rdev, rdev 339 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_memory_spread_spectrum_clk_s(struct radeon_device *rdev, rdev 345 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_memory_spread_spectrum_clk_v(struct radeon_device *rdev, rdev 351 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_memory_spread_spectrum(struct radeon_device *rdev, rdev 360 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_dynamic_spread_spectrum(struct radeon_device *rdev, rdev 369 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_memory_clock_entry_enable_post_divider(struct radeon_device *rdev, rdev 379 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_memory_clock_entry_set_post_divider(struct radeon_device *rdev, rdev 386 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_memory_clock_entry_set_feedback_divider(struct radeon_device *rdev, rdev 393 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_memory_clock_entry_set_reference_divider(struct radeon_device *rdev, rdev 400 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_vid_response_set_brt(struct radeon_device *rdev, u32 rt) rdev 405 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_engine_feedback_and_reference_sync(struct radeon_device *rdev) rdev 417 drivers/gpu/drm/radeon/rv6xx_dpm.c static u32 rv6xx_scale_count_given_unit(struct radeon_device *rdev, rdev 425 drivers/gpu/drm/radeon/rv6xx_dpm.c static u32 rv6xx_compute_count_for_delay(struct radeon_device *rdev, rdev 428 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; rdev 430 drivers/gpu/drm/radeon/rv6xx_dpm.c return rv6xx_scale_count_given_unit(rdev, delay_us * (ref_clk / 100), unit); rdev 433 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_calculate_engine_speed_stepping_parameters(struct radeon_device *rdev, rdev 436 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 450 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_calculate_memory_clock_stepping_parameters(struct radeon_device *rdev, rdev 453 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 480 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_calculate_voltage_stepping_parameters(struct radeon_device *rdev, rdev 483 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 548 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_engine_spread_spectrum(struct radeon_device *rdev, rdev 551 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; rdev 552 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 557 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_engine_spread_spectrum(rdev, level, false); rdev 560 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, clock, false, ÷rs) == 0) { rdev 564 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 575 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_engine_spread_spectrum_clk_v(rdev, level, clk_v); rdev 576 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_engine_spread_spectrum_clk_s(rdev, level, clk_s); rdev 577 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_engine_spread_spectrum(rdev, level, true); rdev 583 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry(struct radeon_device *rdev) rdev 585 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 587 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_engine_spread_spectrum(rdev, rdev 591 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_engine_spread_spectrum(rdev, rdev 597 drivers/gpu/drm/radeon/rv6xx_dpm.c static int rv6xx_program_mclk_stepping_entry(struct radeon_device *rdev, rdev 602 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, clock, false, ÷rs)) rdev 606 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_memory_clock_entry_set_reference_divider(rdev, entry, dividers.ref_div); rdev 607 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_memory_clock_entry_set_feedback_divider(rdev, entry, dividers.fb_div); rdev 608 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_memory_clock_entry_set_post_divider(rdev, entry, dividers.post_div); rdev 611 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_memory_clock_entry_enable_post_divider(rdev, entry, true); rdev 613 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_memory_clock_entry_enable_post_divider(rdev, entry, false); rdev 618 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_mclk_stepping_parameters_except_lowest_entry(struct radeon_device *rdev) rdev 620 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 625 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_mclk_stepping_entry(rdev, i, rdev 630 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_find_memory_clock_with_highest_vco(struct radeon_device *rdev, rdev 636 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 640 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, rdev 652 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_mclk_spread_spectrum_parameters(struct radeon_device *rdev) rdev 654 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 655 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.mpll.reference_freq; rdev 660 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_memory_spread_spectrum(rdev, false); rdev 663 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_find_memory_clock_with_highest_vco(rdev, rdev 669 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_find_memory_clock_with_highest_vco(rdev, rdev 675 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_find_memory_clock_with_highest_vco(rdev, rdev 682 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 693 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_memory_spread_spectrum_clk_v(rdev, clk_v); rdev 694 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_memory_spread_spectrum_clk_s(rdev, clk_s); rdev 695 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_memory_spread_spectrum(rdev, true); rdev 701 drivers/gpu/drm/radeon/rv6xx_dpm.c static int rv6xx_program_voltage_stepping_entry(struct radeon_device *rdev, rdev 707 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = radeon_atom_get_voltage_gpio_settings(rdev, voltage, rdev 713 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_voltage_control_program_voltages(rdev, entry, set_pins); rdev 718 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_voltage_stepping_parameters_except_lowest_entry(struct radeon_device *rdev) rdev 720 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 724 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_stepping_entry(rdev, i, rdev 729 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_backbias_stepping_parameters_except_lowest_entry(struct radeon_device *rdev) rdev 731 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 744 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry(struct radeon_device *rdev) rdev 746 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 748 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_engine_spread_spectrum(rdev, rdev 753 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_mclk_stepping_parameters_lowest_entry(struct radeon_device *rdev) rdev 755 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 758 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_mclk_stepping_entry(rdev, 0, rdev 762 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_voltage_stepping_parameters_lowest_entry(struct radeon_device *rdev) rdev 764 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 766 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_stepping_entry(rdev, 0, rdev 771 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_backbias_stepping_parameters_lowest_entry(struct radeon_device *rdev) rdev 773 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 781 drivers/gpu/drm/radeon/rv6xx_dpm.c static u32 calculate_memory_refresh_rate(struct radeon_device *rdev, rdev 794 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_memory_timing_parameters(struct radeon_device *rdev) rdev 796 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 808 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_atom_set_engine_dram_timings(rdev, high_clock, 0); rdev 817 drivers/gpu/drm/radeon/rv6xx_dpm.c (POWERMODE0(calculate_memory_refresh_rate(rdev, rdev 819 drivers/gpu/drm/radeon/rv6xx_dpm.c POWERMODE1(calculate_memory_refresh_rate(rdev, rdev 821 drivers/gpu/drm/radeon/rv6xx_dpm.c POWERMODE2(calculate_memory_refresh_rate(rdev, rdev 823 drivers/gpu/drm/radeon/rv6xx_dpm.c POWERMODE3(calculate_memory_refresh_rate(rdev, rdev 828 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_mpll_timing_parameters(struct radeon_device *rdev) rdev 830 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 832 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_mpll_lock_time(rdev, R600_MPLLLOCKTIME_DFLT * rdev 834 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_mpll_reset_time(rdev, R600_MPLLRESETTIME_DFLT); rdev 837 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_bsp(struct radeon_device *rdev) rdev 839 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 840 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 ref_clk = rdev->clock.spll.reference_freq; rdev 847 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_bsp(rdev, pi->bsu, pi->bsp); rdev 850 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_at(struct radeon_device *rdev) rdev 852 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 854 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_at(rdev, rdev 861 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_git(struct radeon_device *rdev) rdev 863 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_git(rdev, R600_GICST_DFLT); rdev 866 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_tp(struct radeon_device *rdev) rdev 871 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_tc(rdev, i, r600_utc[i], r600_dtc[i]); rdev 873 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_select_td(rdev, R600_TD_DFLT); rdev 876 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_vc(struct radeon_device *rdev) rdev 878 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_vrc(rdev, R600_VRC_DFLT); rdev 881 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_clear_vc(struct radeon_device *rdev) rdev 883 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_vrc(rdev, 0); rdev 886 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_tpp(struct radeon_device *rdev) rdev 888 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_tpu(rdev, R600_TPU_DFLT); rdev 889 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_tpc(rdev, R600_TPC_DFLT); rdev 892 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_sstp(struct radeon_device *rdev) rdev 894 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_sstu(rdev, R600_SSTU_DFLT); rdev 895 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_sst(rdev, R600_SST_DFLT); rdev 898 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_fcp(struct radeon_device *rdev) rdev 900 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_fctu(rdev, R600_FCTU_DFLT); rdev 901 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_fct(rdev, R600_FCT_DFLT); rdev 904 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_vddc3d_parameters(struct radeon_device *rdev) rdev 906 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_vddc3d_oorsu(rdev, R600_VDDC3DOORSU_DFLT); rdev 907 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_vddc3d_oorphc(rdev, R600_VDDC3DOORPHC_DFLT); rdev 908 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_vddc3d_oorsdc(rdev, R600_VDDC3DOORSDC_DFLT); rdev 909 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_ctxcgtt3d_rphc(rdev, R600_CTXCGTT3DRPHC_DFLT); rdev 910 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_ctxcgtt3d_rsdc(rdev, R600_CTXCGTT3DRSDC_DFLT); rdev 913 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_voltage_timing_parameters(struct radeon_device *rdev) rdev 917 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_vid_rt_set_vru(rdev, R600_VRU_DFLT); rdev 919 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_vid_rt_set_vrt(rdev, rdev 920 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_compute_count_for_delay(rdev, rdev 921 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.voltage_response_time, rdev 924 drivers/gpu/drm/radeon/rv6xx_dpm.c rt = rv6xx_compute_count_for_delay(rdev, rdev 925 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.backbias_response_time, rdev 928 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_vid_response_set_brt(rdev, (rt + 0x1F) >> 5); rdev 931 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_engine_speed_parameters(struct radeon_device *rdev) rdev 933 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_vid_rt_set_ssu(rdev, R600_SPLLSTEPUNIT_DFLT); rdev 934 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_engine_feedback_and_reference_sync(rdev); rdev 937 drivers/gpu/drm/radeon/rv6xx_dpm.c static u64 rv6xx_get_master_voltage_mask(struct radeon_device *rdev) rdev 939 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 947 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = radeon_atom_get_voltage_gpio_settings(rdev, rdev 959 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_voltage_gpio_pins(struct radeon_device *rdev) rdev 961 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_voltage_control_enable_pins(rdev, rdev 962 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_get_master_voltage_mask(rdev)); rdev 965 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_static_voltage_control(struct radeon_device *rdev, rdev 972 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_atom_set_voltage(rdev, rdev 976 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_voltage_control_deactivate_static_control(rdev, rdev 977 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_get_master_voltage_mask(rdev)); rdev 980 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_display_gap(struct radeon_device *rdev, bool enable) rdev 996 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_power_level_enter_state(struct radeon_device *rdev) rdev 998 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_enter_index(rdev, R600_POWER_LEVEL_MEDIUM); rdev 1018 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_calculate_ap(struct radeon_device *rdev, rdev 1021 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1045 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_calculate_stepping_parameters(struct radeon_device *rdev, rdev 1050 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_calculate_engine_speed_stepping_parameters(rdev, new_state); rdev 1051 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_calculate_memory_clock_stepping_parameters(rdev, new_state); rdev 1052 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_calculate_voltage_stepping_parameters(rdev, new_state); rdev 1053 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_calculate_ap(rdev, new_state); rdev 1056 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_stepping_parameters_except_lowest_entry(struct radeon_device *rdev) rdev 1058 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1060 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_mclk_stepping_parameters_except_lowest_entry(rdev); rdev 1062 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_stepping_parameters_except_lowest_entry(rdev); rdev 1063 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_backbias_stepping_parameters_except_lowest_entry(rdev); rdev 1064 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry(rdev); rdev 1065 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_mclk_spread_spectrum_parameters(rdev); rdev 1066 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_memory_timing_parameters(rdev); rdev 1069 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_stepping_parameters_lowest_entry(struct radeon_device *rdev) rdev 1071 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1073 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_mclk_stepping_parameters_lowest_entry(rdev); rdev 1075 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_stepping_parameters_lowest_entry(rdev); rdev 1076 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_backbias_stepping_parameters_lowest_entry(rdev); rdev 1077 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry(rdev); rdev 1080 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_power_level_low(struct radeon_device *rdev) rdev 1082 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1084 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_LOW, rdev 1086 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_LOW, rdev 1088 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_LOW, rdev 1090 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_LOW, rdev 1092 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_LOW, rdev 1096 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_power_level_low_to_lowest_state(struct radeon_device *rdev) rdev 1098 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1100 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_LOW, 0); rdev 1101 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); rdev 1102 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_LOW, 0); rdev 1104 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_LOW, rdev 1107 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_LOW, rdev 1112 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_power_level_medium(struct radeon_device *rdev) rdev 1114 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1116 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1118 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1120 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1122 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1124 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1128 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_power_level_medium_for_transition(struct radeon_device *rdev) rdev 1130 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1132 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_mclk_stepping_entry(rdev, rdev 1136 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_MEDIUM, 1); rdev 1138 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1140 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1143 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1146 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_MEDIUM, false); rdev 1148 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_MEDIUM, rdev 1152 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_power_level_high(struct radeon_device *rdev) rdev 1154 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1156 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_voltage_index(rdev, R600_POWER_LEVEL_HIGH, rdev 1158 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_mem_clock_index(rdev, R600_POWER_LEVEL_HIGH, rdev 1160 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_eng_clock_index(rdev, R600_POWER_LEVEL_HIGH, rdev 1163 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_watermark_id(rdev, R600_POWER_LEVEL_HIGH, rdev 1166 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_set_pcie_gen2(rdev, R600_POWER_LEVEL_HIGH, rdev 1170 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_backbias(struct radeon_device *rdev, bool enable) rdev 1180 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_program_display_gap(struct radeon_device *rdev) rdev 1185 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.new_active_crtcs & 1) { rdev 1188 drivers/gpu/drm/radeon/rv6xx_dpm.c } else if (rdev->pm.dpm.new_active_crtcs & 2) { rdev 1198 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_sw_voltage_to_safe(struct radeon_device *rdev, rdev 1209 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_stepping_entry(rdev, R600_POWER_LEVEL_CTXSW, rdev 1216 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_sw_voltage_to_low(struct radeon_device *rdev, rdev 1221 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_stepping_entry(rdev, R600_POWER_LEVEL_CTXSW, rdev 1228 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_safe_backbias(struct radeon_device *rdev, rdev 1242 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_safe_pcie_gen2(struct radeon_device *rdev, rdev 1251 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_force_pcie_gen1(rdev); rdev 1254 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_dynamic_voltage_control(struct radeon_device *rdev, rdev 1263 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_dynamic_backbias_control(struct radeon_device *rdev, rdev 1272 drivers/gpu/drm/radeon/rv6xx_dpm.c static int rv6xx_step_sw_voltage(struct radeon_device *rdev, rdev 1281 drivers/gpu/drm/radeon/rv6xx_dpm.c if ((radeon_atom_get_voltage_step(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, rdev 1283 drivers/gpu/drm/radeon/rv6xx_dpm.c (radeon_atom_round_to_true_voltage(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, rdev 1285 drivers/gpu/drm/radeon/rv6xx_dpm.c (radeon_atom_round_to_true_voltage(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, rdev 1296 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_stepping_entry(rdev, R600_POWER_LEVEL_CTXSW, rdev 1298 drivers/gpu/drm/radeon/rv6xx_dpm.c msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000); rdev 1304 drivers/gpu/drm/radeon/rv6xx_dpm.c static int rv6xx_step_voltage_if_increasing(struct radeon_device *rdev, rdev 1312 drivers/gpu/drm/radeon/rv6xx_dpm.c return rv6xx_step_sw_voltage(rdev, rdev 1319 drivers/gpu/drm/radeon/rv6xx_dpm.c static int rv6xx_step_voltage_if_decreasing(struct radeon_device *rdev, rdev 1327 drivers/gpu/drm/radeon/rv6xx_dpm.c return rv6xx_step_sw_voltage(rdev, rdev 1334 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_high(struct radeon_device *rdev) rdev 1336 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1340 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, true); rdev 1343 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_medium(struct radeon_device *rdev) rdev 1345 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1348 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true); rdev 1351 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_dpm_event_sources(struct radeon_device *rdev, u32 sources) rdev 1353 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1388 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_auto_throttle_source(struct radeon_device *rdev, rdev 1392 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1397 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 1402 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 1408 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_thermal_protection(struct radeon_device *rdev, rdev 1411 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1414 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_enable_thermal_protection(rdev, enable); rdev 1417 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_generate_transition_stepping(struct radeon_device *rdev, rdev 1423 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1425 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_steps(rdev, rdev 1431 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_generate_low_step(struct radeon_device *rdev, rdev 1435 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1438 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_single_step(rdev, rdev 1443 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_invalidate_intermediate_steps(struct radeon_device *rdev) rdev 1445 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1447 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_invalidate_intermediate_steps_range(rdev, 0, rdev 1451 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_generate_stepping_table(struct radeon_device *rdev, rdev 1455 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1459 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_steps(rdev, rdev 1464 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_steps(rdev, rdev 1471 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_spread_spectrum(struct radeon_device *rdev, rdev 1475 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_spread_spectrum(rdev, true); rdev 1477 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_LOW, false); rdev 1478 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_MEDIUM, false); rdev 1479 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_engine_spread_spectrum(rdev, R600_POWER_LEVEL_HIGH, false); rdev 1480 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_spread_spectrum(rdev, false); rdev 1481 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_memory_spread_spectrum(rdev, false); rdev 1485 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_reset_lvtm_data_sync(struct radeon_device *rdev) rdev 1487 drivers/gpu/drm/radeon/rv6xx_dpm.c if (ASIC_IS_DCE3(rdev)) rdev 1493 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_enable_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 1500 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_bif_dynamic_pcie_gen2(rdev, true); rdev 1501 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_pcie_gen2_support(rdev); rdev 1502 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_enable_dynamic_pcie_gen2(rdev, true); rdev 1505 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_force_pcie_gen1(rdev); rdev 1506 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_bif_dynamic_pcie_gen2(rdev, false); rdev 1507 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_enable_dynamic_pcie_gen2(rdev, false); rdev 1511 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 1525 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 1528 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 1542 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 1545 drivers/gpu/drm/radeon/rv6xx_dpm.c int rv6xx_dpm_enable(struct radeon_device *rdev) rdev 1547 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1548 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 1550 drivers/gpu/drm/radeon/rv6xx_dpm.c if (r600_dynamicpm_enabled(rdev)) rdev 1553 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 1554 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_backbias(rdev, true); rdev 1557 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_spread_spectrum(rdev, true); rdev 1559 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_mpll_timing_parameters(rdev); rdev 1560 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_bsp(rdev); rdev 1561 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_git(rdev); rdev 1562 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_tp(rdev); rdev 1563 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_tpp(rdev); rdev 1564 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_sstp(rdev); rdev 1565 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_fcp(rdev); rdev 1566 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_vddc3d_parameters(rdev); rdev 1567 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_timing_parameters(rdev); rdev 1568 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_engine_speed_parameters(rdev); rdev 1570 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_display_gap(rdev, true); rdev 1572 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_display_gap(rdev, false); rdev 1574 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_enter_state(rdev); rdev 1576 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_calculate_stepping_parameters(rdev, boot_ps); rdev 1579 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_voltage_gpio_pins(rdev); rdev 1581 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_stepping_table(rdev, boot_ps); rdev 1583 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_stepping_parameters_except_lowest_entry(rdev); rdev 1584 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_stepping_parameters_lowest_entry(rdev); rdev 1586 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_low(rdev); rdev 1587 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_medium(rdev); rdev 1588 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_high(rdev); rdev 1589 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_vc(rdev); rdev 1590 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_at(rdev); rdev 1592 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); rdev 1593 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true); rdev 1594 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, true); rdev 1596 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); rdev 1598 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_start_dpm(rdev); rdev 1601 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_static_voltage_control(rdev, boot_ps, false); rdev 1604 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_pcie_gen2(rdev, boot_ps, true); rdev 1607 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_gfx_clockgating_enable(rdev, true); rdev 1612 drivers/gpu/drm/radeon/rv6xx_dpm.c void rv6xx_dpm_disable(struct radeon_device *rdev) rdev 1614 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1615 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 1617 drivers/gpu/drm/radeon/rv6xx_dpm.c if (!r600_dynamicpm_enabled(rdev)) rdev 1620 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); rdev 1621 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true); rdev 1622 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_display_gap(rdev, false); rdev 1623 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_clear_vc(rdev); rdev 1624 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_at(rdev, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF); rdev 1627 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_enable_thermal_protection(rdev, false); rdev 1629 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); rdev 1630 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false); rdev 1631 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false); rdev 1633 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 1634 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_backbias(rdev, false); rdev 1636 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_spread_spectrum(rdev, false); rdev 1639 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_static_voltage_control(rdev, boot_ps, true); rdev 1642 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_pcie_gen2(rdev, boot_ps, false); rdev 1644 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->irq.installed && rdev 1645 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1646 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->irq.dpm_thermal = false; rdev 1647 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_irq_set(rdev); rdev 1651 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_gfx_clockgating_enable(rdev, false); rdev 1653 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_stop_dpm(rdev); rdev 1656 drivers/gpu/drm/radeon/rv6xx_dpm.c int rv6xx_dpm_set_power_state(struct radeon_device *rdev) rdev 1658 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 1659 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; rdev 1660 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; rdev 1665 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 1667 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_clear_vc(rdev); rdev 1668 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); rdev 1669 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_at(rdev, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF); rdev 1672 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_enable_thermal_protection(rdev, false); rdev 1674 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); rdev 1675 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false); rdev 1676 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false); rdev 1678 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_transition_stepping(rdev, new_ps, old_ps); rdev 1679 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_medium_for_transition(rdev); rdev 1682 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_sw_voltage_to_safe(rdev, new_ps, old_ps); rdev 1683 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 1684 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_sw_voltage_to_low(rdev, old_ps); rdev 1687 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 1688 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_safe_backbias(rdev, new_ps, old_ps); rdev 1691 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_safe_pcie_gen2(rdev, new_ps, old_ps); rdev 1694 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_voltage_control(rdev, false); rdev 1696 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 1697 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_backbias_control(rdev, false); rdev 1700 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 1701 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_step_voltage_if_increasing(rdev, new_ps, old_ps); rdev 1702 drivers/gpu/drm/radeon/rv6xx_dpm.c msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000); rdev 1705 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, true); rdev 1706 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, false); rdev 1707 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_wait_for_power_level_unequal(rdev, R600_POWER_LEVEL_LOW); rdev 1709 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_low_step(rdev, new_ps); rdev 1710 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_invalidate_intermediate_steps(rdev); rdev 1711 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_calculate_stepping_parameters(rdev, new_ps); rdev 1712 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_stepping_parameters_lowest_entry(rdev); rdev 1713 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_low_to_lowest_state(rdev); rdev 1715 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); rdev 1716 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); rdev 1717 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false); rdev 1720 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) { rdev 1721 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = rv6xx_step_voltage_if_decreasing(rdev, new_ps, old_ps); rdev 1725 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_voltage_control(rdev, true); rdev 1728 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 1729 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_backbias_control(rdev, true); rdev 1732 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_dynamic_pcie_gen2(rdev, new_ps, true); rdev 1734 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_reset_lvtm_data_sync(rdev); rdev 1736 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_generate_stepping_table(rdev, new_ps); rdev 1737 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_stepping_parameters_except_lowest_entry(rdev); rdev 1738 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_low(rdev); rdev 1739 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_medium(rdev); rdev 1740 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_power_level_high(rdev); rdev 1741 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_medium(rdev); rdev 1742 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_high(rdev); rdev 1745 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_thermal_protection(rdev, true); rdev 1746 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_vc(rdev); rdev 1747 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_at(rdev); rdev 1749 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 1754 drivers/gpu/drm/radeon/rv6xx_dpm.c void rv6xx_setup_asic(struct radeon_device *rdev) rdev 1756 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_enable_acpi_pm(rdev); rdev 1759 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L0s) rdev 1760 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_l0s(rdev); rdev 1761 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L1) rdev 1762 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_l1(rdev); rdev 1763 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1) rdev 1764 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_pll_sleep_in_l1(rdev); rdev 1768 drivers/gpu/drm/radeon/rv6xx_dpm.c void rv6xx_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 1770 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_display_gap(rdev); rdev 1794 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 1811 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 1813 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 1816 drivers/gpu/drm/radeon/rv6xx_dpm.c static void rv6xx_parse_pplib_clock_info(struct radeon_device *rdev, rdev 1850 drivers/gpu/drm/radeon/rv6xx_dpm.c if (radeon_atom_get_max_vddc(rdev, 0, 0, &vddc) == 0) rdev 1856 drivers/gpu/drm/radeon/rv6xx_dpm.c if ((rdev->family == CHIP_RV610) || (rdev->family == CHIP_RV630)) { rdev 1865 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); rdev 1866 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->mclk = rdev->clock.default_mclk; rdev 1867 drivers/gpu/drm/radeon/rv6xx_dpm.c pl->sclk = rdev->clock.default_sclk; rdev 1872 drivers/gpu/drm/radeon/rv6xx_dpm.c static int rv6xx_parse_power_table(struct radeon_device *rdev) rdev 1874 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1890 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, rdev 1893 drivers/gpu/drm/radeon/rv6xx_dpm.c if (!rdev->pm.dpm.ps) rdev 1910 drivers/gpu/drm/radeon/rv6xx_dpm.c kfree(rdev->pm.dpm.ps); rdev 1913 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 1914 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 1922 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_parse_pplib_clock_info(rdev, rdev 1923 drivers/gpu/drm/radeon/rv6xx_dpm.c &rdev->pm.dpm.ps[i], j, rdev 1928 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates; rdev 1932 drivers/gpu/drm/radeon/rv6xx_dpm.c int rv6xx_dpm_init(struct radeon_device *rdev) rdev 1942 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.priv = pi; rdev 1944 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = r600_get_platform_caps(rdev); rdev 1948 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = rv6xx_parse_power_table(rdev); rdev 1952 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.voltage_response_time == 0) rdev 1953 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; rdev 1954 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->pm.dpm.backbias_response_time == 0) rdev 1955 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; rdev 1957 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 1964 drivers/gpu/drm/radeon/rv6xx_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, rdev 1971 drivers/gpu/drm/radeon/rv6xx_dpm.c if (rdev->family >= CHIP_RV670) rdev 1977 drivers/gpu/drm/radeon/rv6xx_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0); rdev 1981 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 1983 drivers/gpu/drm/radeon/rv6xx_dpm.c pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 1997 drivers/gpu/drm/radeon/rv6xx_dpm.c (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE)) rdev 2007 drivers/gpu/drm/radeon/rv6xx_dpm.c void rv6xx_dpm_print_power_state(struct radeon_device *rdev, rdev 2025 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 2028 drivers/gpu/drm/radeon/rv6xx_dpm.c void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 2031 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 2054 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev) rdev 2056 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 2077 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev) rdev 2079 drivers/gpu/drm/radeon/rv6xx_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 2099 drivers/gpu/drm/radeon/rv6xx_dpm.c void rv6xx_dpm_fini(struct radeon_device *rdev) rdev 2103 drivers/gpu/drm/radeon/rv6xx_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 2104 drivers/gpu/drm/radeon/rv6xx_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 2106 drivers/gpu/drm/radeon/rv6xx_dpm.c kfree(rdev->pm.dpm.ps); rdev 2107 drivers/gpu/drm/radeon/rv6xx_dpm.c kfree(rdev->pm.dpm.priv); rdev 2110 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 rv6xx_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 2112 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_ps *requested_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); rdev 2120 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 2122 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_ps *requested_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps); rdev 2130 drivers/gpu/drm/radeon/rv6xx_dpm.c int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, rdev 2133 drivers/gpu/drm/radeon/rv6xx_dpm.c struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); rdev 2143 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_clear_vc(rdev); rdev 2144 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true); rdev 2145 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_set_at(rdev, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF); rdev 2146 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_wait_for_power_level(rdev, R600_POWER_LEVEL_LOW); rdev 2147 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_HIGH, false); rdev 2148 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false); rdev 2149 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_medium(rdev); rdev 2150 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_enable_high(rdev); rdev 2152 drivers/gpu/drm/radeon/rv6xx_dpm.c r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, false); rdev 2153 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_vc(rdev); rdev 2154 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_program_at(rdev); rdev 2156 drivers/gpu/drm/radeon/rv6xx_dpm.c rdev->pm.dpm.forced_level = level; rdev 37 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); rdev 39 drivers/gpu/drm/radeon/rv730_dpm.c int rv730_populate_sclk_value(struct radeon_device *rdev, rdev 43 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 51 drivers/gpu/drm/radeon/rv730_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 56 drivers/gpu/drm/radeon/rv730_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 94 drivers/gpu/drm/radeon/rv730_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 118 drivers/gpu/drm/radeon/rv730_dpm.c int rv730_populate_mclk_value(struct radeon_device *rdev, rdev 122 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 134 drivers/gpu/drm/radeon/rv730_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, rdev 169 drivers/gpu/drm/radeon/rv730_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 171 drivers/gpu/drm/radeon/rv730_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; rdev 197 drivers/gpu/drm/radeon/rv730_dpm.c void rv730_read_clock_registers(struct radeon_device *rdev) rdev 199 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 228 drivers/gpu/drm/radeon/rv730_dpm.c int rv730_populate_smc_acpi_state(struct radeon_device *rdev, rdev 231 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 245 drivers/gpu/drm/radeon/rv730_dpm.c rv770_populate_vddc_value(rdev, pi->acpi_vddc, rdev 252 drivers/gpu/drm/radeon/rv730_dpm.c rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, rdev 310 drivers/gpu/drm/radeon/rv730_dpm.c rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); rdev 318 drivers/gpu/drm/radeon/rv730_dpm.c int rv730_populate_smc_initial_state(struct radeon_device *rdev, rdev 323 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 361 drivers/gpu/drm/radeon/rv730_dpm.c rv770_get_seq_value(rdev, &initial_state->low); rdev 363 drivers/gpu/drm/radeon/rv730_dpm.c rv770_populate_vddc_value(rdev, rdev 366 drivers/gpu/drm/radeon/rv730_dpm.c rv770_populate_initial_mvdd_value(rdev, rdev 392 drivers/gpu/drm/radeon/rv730_dpm.c void rv730_program_memory_timing_parameters(struct radeon_device *rdev, rdev 405 drivers/gpu/drm/radeon/rv730_dpm.c (POWERMODE1(rv770_calculate_memory_refresh_rate(rdev, state->low.sclk)) | rdev 406 drivers/gpu/drm/radeon/rv730_dpm.c POWERMODE2(rv770_calculate_memory_refresh_rate(rdev, state->medium.sclk)) | rdev 407 drivers/gpu/drm/radeon/rv730_dpm.c POWERMODE3(rv770_calculate_memory_refresh_rate(rdev, state->high.sclk))); rdev 414 drivers/gpu/drm/radeon/rv730_dpm.c radeon_atom_set_engine_dram_timings(rdev, rdev 424 drivers/gpu/drm/radeon/rv730_dpm.c radeon_atom_set_engine_dram_timings(rdev, rdev 434 drivers/gpu/drm/radeon/rv730_dpm.c radeon_atom_set_engine_dram_timings(rdev, rdev 450 drivers/gpu/drm/radeon/rv730_dpm.c void rv730_start_dpm(struct radeon_device *rdev) rdev 459 drivers/gpu/drm/radeon/rv730_dpm.c void rv730_stop_dpm(struct radeon_device *rdev) rdev 463 drivers/gpu/drm/radeon/rv730_dpm.c result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_TwoLevelsDisabled); rdev 475 drivers/gpu/drm/radeon/rv730_dpm.c void rv730_program_dcodt(struct radeon_device *rdev, bool use_dcodt) rdev 477 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 494 drivers/gpu/drm/radeon/rv730_dpm.c void rv730_get_odt_values(struct radeon_device *rdev) rdev 496 drivers/gpu/drm/radeon/rv730_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 31 drivers/gpu/drm/radeon/rv740_dpm.c struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); rdev 120 drivers/gpu/drm/radeon/rv740_dpm.c int rv740_populate_sclk_value(struct radeon_device *rdev, u32 engine_clock, rdev 123 drivers/gpu/drm/radeon/rv740_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 131 drivers/gpu/drm/radeon/rv740_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 136 drivers/gpu/drm/radeon/rv740_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 162 drivers/gpu/drm/radeon/rv740_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 186 drivers/gpu/drm/radeon/rv740_dpm.c int rv740_populate_mclk_value(struct radeon_device *rdev, rdev 190 drivers/gpu/drm/radeon/rv740_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 204 drivers/gpu/drm/radeon/rv740_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, rdev 209 drivers/gpu/drm/radeon/rv740_dpm.c ibias = rv770_map_clkf_to_ibias(rdev, dividers.whole_fb_div); rdev 249 drivers/gpu/drm/radeon/rv740_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 251 drivers/gpu/drm/radeon/rv740_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; rdev 284 drivers/gpu/drm/radeon/rv740_dpm.c void rv740_read_clock_registers(struct radeon_device *rdev) rdev 286 drivers/gpu/drm/radeon/rv740_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 314 drivers/gpu/drm/radeon/rv740_dpm.c int rv740_populate_smc_acpi_state(struct radeon_device *rdev, rdev 317 drivers/gpu/drm/radeon/rv740_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 333 drivers/gpu/drm/radeon/rv740_dpm.c rv770_populate_vddc_value(rdev, pi->acpi_vddc, rdev 341 drivers/gpu/drm/radeon/rv740_dpm.c rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, rdev 391 drivers/gpu/drm/radeon/rv740_dpm.c rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); rdev 396 drivers/gpu/drm/radeon/rv740_dpm.c void rv740_enable_mclk_spread_spectrum(struct radeon_device *rdev, rdev 46 drivers/gpu/drm/radeon/rv770.c static void rv770_gpu_init(struct radeon_device *rdev); rdev 47 drivers/gpu/drm/radeon/rv770.c void rv770_fini(struct radeon_device *rdev); rdev 48 drivers/gpu/drm/radeon/rv770.c static void rv770_pcie_gen2_enable(struct radeon_device *rdev); rdev 49 drivers/gpu/drm/radeon/rv770.c int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); rdev 51 drivers/gpu/drm/radeon/rv770.c int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) rdev 57 drivers/gpu/drm/radeon/rv770.c if (rdev->family == CHIP_RV740) rdev 58 drivers/gpu/drm/radeon/rv770.c return evergreen_set_uvd_clocks(rdev, vclk, dclk); rdev 71 drivers/gpu/drm/radeon/rv770.c r = radeon_uvd_calc_upll_dividers(rdev, vclk, dclk, 50000, 160000, rdev 91 drivers/gpu/drm/radeon/rv770.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 122 drivers/gpu/drm/radeon/rv770.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 720 drivers/gpu/drm/radeon/rv770.c static void rv770_init_golden_registers(struct radeon_device *rdev) rdev 722 drivers/gpu/drm/radeon/rv770.c switch (rdev->family) { rdev 724 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 727 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 730 drivers/gpu/drm/radeon/rv770.c if (rdev->pdev->device == 0x994e) rdev 731 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 735 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 738 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 743 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 746 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 749 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 752 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 757 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 760 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 763 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 766 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 771 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 774 drivers/gpu/drm/radeon/rv770.c radeon_program_register_sequence(rdev, rdev 794 drivers/gpu/drm/radeon/rv770.c u32 rv770_get_xclk(struct radeon_device *rdev) rdev 796 drivers/gpu/drm/radeon/rv770.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 808 drivers/gpu/drm/radeon/rv770.c void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) rdev 810 drivers/gpu/drm/radeon/rv770.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 834 drivers/gpu/drm/radeon/rv770.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 846 drivers/gpu/drm/radeon/rv770.c bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc_id) rdev 848 drivers/gpu/drm/radeon/rv770.c struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rdev 856 drivers/gpu/drm/radeon/rv770.c int rv770_get_temp(struct radeon_device *rdev) rdev 875 drivers/gpu/drm/radeon/rv770.c void rv770_pm_misc(struct radeon_device *rdev) rdev 877 drivers/gpu/drm/radeon/rv770.c int req_ps_idx = rdev->pm.requested_power_state_index; rdev 878 drivers/gpu/drm/radeon/rv770.c int req_cm_idx = rdev->pm.requested_clock_mode_index; rdev 879 drivers/gpu/drm/radeon/rv770.c struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; rdev 886 drivers/gpu/drm/radeon/rv770.c if (voltage->voltage != rdev->pm.current_vddc) { rdev 887 drivers/gpu/drm/radeon/rv770.c radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); rdev 888 drivers/gpu/drm/radeon/rv770.c rdev->pm.current_vddc = voltage->voltage; rdev 897 drivers/gpu/drm/radeon/rv770.c static int rv770_pcie_gart_enable(struct radeon_device *rdev) rdev 902 drivers/gpu/drm/radeon/rv770.c if (rdev->gart.robj == NULL) { rdev 903 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 906 drivers/gpu/drm/radeon/rv770.c r = radeon_gart_table_vram_pin(rdev); rdev 923 drivers/gpu/drm/radeon/rv770.c if (rdev->family == CHIP_RV740) rdev 929 drivers/gpu/drm/radeon/rv770.c WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); rdev 930 drivers/gpu/drm/radeon/rv770.c WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); rdev 931 drivers/gpu/drm/radeon/rv770.c WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); rdev 935 drivers/gpu/drm/radeon/rv770.c (u32)(rdev->dummy_page.addr >> 12)); rdev 939 drivers/gpu/drm/radeon/rv770.c r600_pcie_gart_tlb_flush(rdev); rdev 941 drivers/gpu/drm/radeon/rv770.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 942 drivers/gpu/drm/radeon/rv770.c (unsigned long long)rdev->gart.table_addr); rdev 943 drivers/gpu/drm/radeon/rv770.c rdev->gart.ready = true; rdev 947 drivers/gpu/drm/radeon/rv770.c static void rv770_pcie_gart_disable(struct radeon_device *rdev) rdev 970 drivers/gpu/drm/radeon/rv770.c radeon_gart_table_vram_unpin(rdev); rdev 973 drivers/gpu/drm/radeon/rv770.c static void rv770_pcie_gart_fini(struct radeon_device *rdev) rdev 975 drivers/gpu/drm/radeon/rv770.c radeon_gart_fini(rdev); rdev 976 drivers/gpu/drm/radeon/rv770.c rv770_pcie_gart_disable(rdev); rdev 977 drivers/gpu/drm/radeon/rv770.c radeon_gart_table_vram_free(rdev); rdev 981 drivers/gpu/drm/radeon/rv770.c static void rv770_agp_enable(struct radeon_device *rdev) rdev 1008 drivers/gpu/drm/radeon/rv770.c static void rv770_mc_program(struct radeon_device *rdev) rdev 1027 drivers/gpu/drm/radeon/rv770.c rv515_mc_stop(rdev, &save); rdev 1028 drivers/gpu/drm/radeon/rv770.c if (r600_mc_wait_for_idle(rdev)) { rdev 1029 drivers/gpu/drm/radeon/rv770.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 1034 drivers/gpu/drm/radeon/rv770.c if (rdev->flags & RADEON_IS_AGP) { rdev 1035 drivers/gpu/drm/radeon/rv770.c if (rdev->mc.vram_start < rdev->mc.gtt_start) { rdev 1038 drivers/gpu/drm/radeon/rv770.c rdev->mc.vram_start >> 12); rdev 1040 drivers/gpu/drm/radeon/rv770.c rdev->mc.gtt_end >> 12); rdev 1044 drivers/gpu/drm/radeon/rv770.c rdev->mc.gtt_start >> 12); rdev 1046 drivers/gpu/drm/radeon/rv770.c rdev->mc.vram_end >> 12); rdev 1050 drivers/gpu/drm/radeon/rv770.c rdev->mc.vram_start >> 12); rdev 1052 drivers/gpu/drm/radeon/rv770.c rdev->mc.vram_end >> 12); rdev 1054 drivers/gpu/drm/radeon/rv770.c WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12); rdev 1055 drivers/gpu/drm/radeon/rv770.c tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; rdev 1056 drivers/gpu/drm/radeon/rv770.c tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); rdev 1058 drivers/gpu/drm/radeon/rv770.c WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); rdev 1061 drivers/gpu/drm/radeon/rv770.c if (rdev->flags & RADEON_IS_AGP) { rdev 1062 drivers/gpu/drm/radeon/rv770.c WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16); rdev 1063 drivers/gpu/drm/radeon/rv770.c WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16); rdev 1064 drivers/gpu/drm/radeon/rv770.c WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22); rdev 1070 drivers/gpu/drm/radeon/rv770.c if (r600_mc_wait_for_idle(rdev)) { rdev 1071 drivers/gpu/drm/radeon/rv770.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 1073 drivers/gpu/drm/radeon/rv770.c rv515_mc_resume(rdev, &save); rdev 1076 drivers/gpu/drm/radeon/rv770.c rv515_vga_render_disable(rdev); rdev 1083 drivers/gpu/drm/radeon/rv770.c void r700_cp_stop(struct radeon_device *rdev) rdev 1085 drivers/gpu/drm/radeon/rv770.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 1086 drivers/gpu/drm/radeon/rv770.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 1089 drivers/gpu/drm/radeon/rv770.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 1092 drivers/gpu/drm/radeon/rv770.c static int rv770_cp_load_microcode(struct radeon_device *rdev) rdev 1097 drivers/gpu/drm/radeon/rv770.c if (!rdev->me_fw || !rdev->pfp_fw) rdev 1100 drivers/gpu/drm/radeon/rv770.c r700_cp_stop(rdev); rdev 1113 drivers/gpu/drm/radeon/rv770.c fw_data = (const __be32 *)rdev->pfp_fw->data; rdev 1119 drivers/gpu/drm/radeon/rv770.c fw_data = (const __be32 *)rdev->me_fw->data; rdev 1130 drivers/gpu/drm/radeon/rv770.c void r700_cp_fini(struct radeon_device *rdev) rdev 1132 drivers/gpu/drm/radeon/rv770.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 1133 drivers/gpu/drm/radeon/rv770.c r700_cp_stop(rdev); rdev 1134 drivers/gpu/drm/radeon/rv770.c radeon_ring_fini(rdev, ring); rdev 1135 drivers/gpu/drm/radeon/rv770.c radeon_scratch_free(rdev, ring->rptr_save_reg); rdev 1138 drivers/gpu/drm/radeon/rv770.c void rv770_set_clk_bypass_mode(struct radeon_device *rdev) rdev 1142 drivers/gpu/drm/radeon/rv770.c if (rdev->flags & RADEON_IS_IGP) rdev 1150 drivers/gpu/drm/radeon/rv770.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1160 drivers/gpu/drm/radeon/rv770.c if ((rdev->family == CHIP_RV710) || (rdev->family == CHIP_RV730)) rdev 1170 drivers/gpu/drm/radeon/rv770.c static void rv770_gpu_init(struct radeon_device *rdev) rdev 1194 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.tiling_group_size = 256; rdev 1195 drivers/gpu/drm/radeon/rv770.c switch (rdev->family) { rdev 1197 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_pipes = 4; rdev 1198 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_tile_pipes = 8; rdev 1199 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_simds = 10; rdev 1200 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_backends = 4; rdev 1201 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gprs = 256; rdev 1202 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_threads = 248; rdev 1203 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_stack_entries = 512; rdev 1204 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_hw_contexts = 8; rdev 1205 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gs_threads = 16 * 2; rdev 1206 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_size = 128; rdev 1207 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_pos_size = 16; rdev 1208 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_smx_size = 112; rdev 1209 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sq_num_cf_insts = 2; rdev 1211 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_num_of_sets = 7; rdev 1212 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_prim_fifo_size = 0xF9; rdev 1213 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; rdev 1214 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130; rdev 1217 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_pipes = 2; rdev 1218 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_tile_pipes = 4; rdev 1219 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_simds = 8; rdev 1220 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_backends = 2; rdev 1221 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gprs = 128; rdev 1222 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_threads = 248; rdev 1223 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_stack_entries = 256; rdev 1224 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_hw_contexts = 8; rdev 1225 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gs_threads = 16 * 2; rdev 1226 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_size = 256; rdev 1227 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_pos_size = 32; rdev 1228 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_smx_size = 224; rdev 1229 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sq_num_cf_insts = 2; rdev 1231 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_num_of_sets = 7; rdev 1232 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_prim_fifo_size = 0xf9; rdev 1233 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; rdev 1234 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130; rdev 1235 drivers/gpu/drm/radeon/rv770.c if (rdev->config.rv770.sx_max_export_pos_size > 16) { rdev 1236 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_pos_size -= 16; rdev 1237 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_smx_size += 16; rdev 1241 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_pipes = 2; rdev 1242 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_tile_pipes = 2; rdev 1243 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_simds = 2; rdev 1244 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_backends = 1; rdev 1245 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gprs = 256; rdev 1246 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_threads = 192; rdev 1247 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_stack_entries = 256; rdev 1248 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_hw_contexts = 4; rdev 1249 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gs_threads = 8 * 2; rdev 1250 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_size = 128; rdev 1251 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_pos_size = 16; rdev 1252 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_smx_size = 112; rdev 1253 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sq_num_cf_insts = 1; rdev 1255 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_num_of_sets = 7; rdev 1256 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_prim_fifo_size = 0x40; rdev 1257 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; rdev 1258 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130; rdev 1261 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_pipes = 4; rdev 1262 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_tile_pipes = 4; rdev 1263 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_simds = 8; rdev 1264 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_backends = 4; rdev 1265 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gprs = 256; rdev 1266 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_threads = 248; rdev 1267 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_stack_entries = 512; rdev 1268 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_hw_contexts = 8; rdev 1269 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.max_gs_threads = 16 * 2; rdev 1270 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_size = 256; rdev 1271 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_pos_size = 32; rdev 1272 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_smx_size = 224; rdev 1273 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sq_num_cf_insts = 2; rdev 1275 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_num_of_sets = 7; rdev 1276 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_prim_fifo_size = 0x100; rdev 1277 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; rdev 1278 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sc_earlyz_tile_fifo_fize = 0x130; rdev 1280 drivers/gpu/drm/radeon/rv770.c if (rdev->config.rv770.sx_max_export_pos_size > 16) { rdev 1281 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_pos_size -= 16; rdev 1282 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.sx_max_export_smx_size += 16; rdev 1320 drivers/gpu/drm/radeon/rv770.c tmp = rdev->config.rv770.max_simds - rdev 1322 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.active_simds = tmp; rdev 1324 drivers/gpu/drm/radeon/rv770.c switch (rdev->config.rv770.max_tile_pipes) { rdev 1339 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes; rdev 1343 drivers/gpu/drm/radeon/rv770.c for (i = 0; i < rdev->config.rv770.max_backends; i++) rdev 1347 drivers/gpu/drm/radeon/rv770.c for (i = 0; i < rdev->config.rv770.max_backends; i++) rdev 1351 drivers/gpu/drm/radeon/rv770.c tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.rv770.max_backends, rdev 1354 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.backend_map = tmp; rdev 1356 drivers/gpu/drm/radeon/rv770.c if (rdev->family == CHIP_RV770) rdev 1364 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3); rdev 1377 drivers/gpu/drm/radeon/rv770.c rdev->config.rv770.tile_config = gb_tiling_config; rdev 1384 drivers/gpu/drm/radeon/rv770.c if (rdev->family == CHIP_RV730) { rdev 1415 drivers/gpu/drm/radeon/rv770.c smx_dc_ctl0 |= CACHE_DEPTH((rdev->config.rv770.sx_num_of_sets * 64) - 1); rdev 1418 drivers/gpu/drm/radeon/rv770.c if (rdev->family != CHIP_RV740) rdev 1424 drivers/gpu/drm/radeon/rv770.c if (rdev->family != CHIP_RV770) rdev 1429 drivers/gpu/drm/radeon/rv770.c switch (rdev->family) { rdev 1442 drivers/gpu/drm/radeon/rv770.c if (rdev->family != CHIP_RV770) { rdev 1448 drivers/gpu/drm/radeon/rv770.c WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) | rdev 1449 drivers/gpu/drm/radeon/rv770.c POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) | rdev 1450 drivers/gpu/drm/radeon/rv770.c SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1))); rdev 1452 drivers/gpu/drm/radeon/rv770.c WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) | rdev 1453 drivers/gpu/drm/radeon/rv770.c SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | rdev 1454 drivers/gpu/drm/radeon/rv770.c SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize))); rdev 1464 drivers/gpu/drm/radeon/rv770.c sq_ms_fifo_sizes = (CACHE_FIFO_SIZE(16 * rdev->config.rv770.sq_num_cf_insts) | rdev 1467 drivers/gpu/drm/radeon/rv770.c switch (rdev->family) { rdev 1495 drivers/gpu/drm/radeon/rv770.c if (rdev->family == CHIP_RV710) rdev 1501 drivers/gpu/drm/radeon/rv770.c WREG32(SQ_GPR_RESOURCE_MGMT_1, (NUM_PS_GPRS((rdev->config.rv770.max_gprs * 24)/64) | rdev 1502 drivers/gpu/drm/radeon/rv770.c NUM_VS_GPRS((rdev->config.rv770.max_gprs * 24)/64) | rdev 1503 drivers/gpu/drm/radeon/rv770.c NUM_CLAUSE_TEMP_GPRS(((rdev->config.rv770.max_gprs * 24)/64)/2))); rdev 1505 drivers/gpu/drm/radeon/rv770.c WREG32(SQ_GPR_RESOURCE_MGMT_2, (NUM_GS_GPRS((rdev->config.rv770.max_gprs * 7)/64) | rdev 1506 drivers/gpu/drm/radeon/rv770.c NUM_ES_GPRS((rdev->config.rv770.max_gprs * 7)/64))); rdev 1508 drivers/gpu/drm/radeon/rv770.c sq_thread_resource_mgmt = (NUM_PS_THREADS((rdev->config.rv770.max_threads * 4)/8) | rdev 1509 drivers/gpu/drm/radeon/rv770.c NUM_VS_THREADS((rdev->config.rv770.max_threads * 2)/8) | rdev 1510 drivers/gpu/drm/radeon/rv770.c NUM_ES_THREADS((rdev->config.rv770.max_threads * 1)/8)); rdev 1511 drivers/gpu/drm/radeon/rv770.c if (((rdev->config.rv770.max_threads * 1) / 8) > rdev->config.rv770.max_gs_threads) rdev 1512 drivers/gpu/drm/radeon/rv770.c sq_thread_resource_mgmt |= NUM_GS_THREADS(rdev->config.rv770.max_gs_threads); rdev 1514 drivers/gpu/drm/radeon/rv770.c sq_thread_resource_mgmt |= NUM_GS_THREADS((rdev->config.rv770.max_gs_threads * 1)/8); rdev 1517 drivers/gpu/drm/radeon/rv770.c WREG32(SQ_STACK_RESOURCE_MGMT_1, (NUM_PS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4) | rdev 1518 drivers/gpu/drm/radeon/rv770.c NUM_VS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4))); rdev 1520 drivers/gpu/drm/radeon/rv770.c WREG32(SQ_STACK_RESOURCE_MGMT_2, (NUM_GS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4) | rdev 1521 drivers/gpu/drm/radeon/rv770.c NUM_ES_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4))); rdev 1523 drivers/gpu/drm/radeon/rv770.c sq_dyn_gpr_size_simd_ab_0 = (SIMDA_RING0((rdev->config.rv770.max_gprs * 38)/64) | rdev 1524 drivers/gpu/drm/radeon/rv770.c SIMDA_RING1((rdev->config.rv770.max_gprs * 38)/64) | rdev 1525 drivers/gpu/drm/radeon/rv770.c SIMDB_RING0((rdev->config.rv770.max_gprs * 38)/64) | rdev 1526 drivers/gpu/drm/radeon/rv770.c SIMDB_RING1((rdev->config.rv770.max_gprs * 38)/64)); rdev 1540 drivers/gpu/drm/radeon/rv770.c if (rdev->family == CHIP_RV710) rdev 1547 drivers/gpu/drm/radeon/rv770.c switch (rdev->family) { rdev 1560 drivers/gpu/drm/radeon/rv770.c num_gs_verts_per_thread = rdev->config.rv770.max_pipes * 16; rdev 1606 drivers/gpu/drm/radeon/rv770.c void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) rdev 1612 drivers/gpu/drm/radeon/rv770.c dev_warn(rdev->dev, "limiting VRAM\n"); rdev 1616 drivers/gpu/drm/radeon/rv770.c if (rdev->flags & RADEON_IS_AGP) { rdev 1621 drivers/gpu/drm/radeon/rv770.c dev_warn(rdev->dev, "limiting VRAM\n"); rdev 1628 drivers/gpu/drm/radeon/rv770.c dev_warn(rdev->dev, "limiting VRAM\n"); rdev 1635 drivers/gpu/drm/radeon/rv770.c dev_info(rdev->dev, "VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used)\n", rdev 1639 drivers/gpu/drm/radeon/rv770.c radeon_vram_location(rdev, &rdev->mc, 0); rdev 1640 drivers/gpu/drm/radeon/rv770.c rdev->mc.gtt_base_align = 0; rdev 1641 drivers/gpu/drm/radeon/rv770.c radeon_gtt_location(rdev, mc); rdev 1645 drivers/gpu/drm/radeon/rv770.c static int rv770_mc_init(struct radeon_device *rdev) rdev 1651 drivers/gpu/drm/radeon/rv770.c rdev->mc.vram_is_ddr = true; rdev 1676 drivers/gpu/drm/radeon/rv770.c rdev->mc.vram_width = numchan * chansize; rdev 1678 drivers/gpu/drm/radeon/rv770.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 1679 drivers/gpu/drm/radeon/rv770.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 1681 drivers/gpu/drm/radeon/rv770.c rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); rdev 1682 drivers/gpu/drm/radeon/rv770.c rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); rdev 1683 drivers/gpu/drm/radeon/rv770.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 1684 drivers/gpu/drm/radeon/rv770.c r700_vram_gtt_location(rdev, &rdev->mc); rdev 1685 drivers/gpu/drm/radeon/rv770.c radeon_update_bandwidth_info(rdev); rdev 1690 drivers/gpu/drm/radeon/rv770.c static void rv770_uvd_init(struct radeon_device *rdev) rdev 1694 drivers/gpu/drm/radeon/rv770.c if (!rdev->has_uvd) rdev 1697 drivers/gpu/drm/radeon/rv770.c r = radeon_uvd_init(rdev); rdev 1699 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "failed UVD (%d) init.\n", r); rdev 1706 drivers/gpu/drm/radeon/rv770.c rdev->has_uvd = 0; rdev 1709 drivers/gpu/drm/radeon/rv770.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_obj = NULL; rdev 1710 drivers/gpu/drm/radeon/rv770.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], 4096); rdev 1713 drivers/gpu/drm/radeon/rv770.c static void rv770_uvd_start(struct radeon_device *rdev) rdev 1717 drivers/gpu/drm/radeon/rv770.c if (!rdev->has_uvd) rdev 1720 drivers/gpu/drm/radeon/rv770.c r = uvd_v2_2_resume(rdev); rdev 1722 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "failed UVD resume (%d).\n", r); rdev 1725 drivers/gpu/drm/radeon/rv770.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_UVD_INDEX); rdev 1727 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "failed initializing UVD fences (%d).\n", r); rdev 1733 drivers/gpu/drm/radeon/rv770.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; rdev 1736 drivers/gpu/drm/radeon/rv770.c static void rv770_uvd_resume(struct radeon_device *rdev) rdev 1741 drivers/gpu/drm/radeon/rv770.c if (!rdev->has_uvd || !rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size) rdev 1744 drivers/gpu/drm/radeon/rv770.c ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 1745 drivers/gpu/drm/radeon/rv770.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, PACKET0(UVD_NO_OP, 0)); rdev 1747 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "failed initializing UVD ring (%d).\n", r); rdev 1750 drivers/gpu/drm/radeon/rv770.c r = uvd_v1_0_init(rdev); rdev 1752 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "failed initializing UVD (%d).\n", r); rdev 1757 drivers/gpu/drm/radeon/rv770.c static int rv770_startup(struct radeon_device *rdev) rdev 1763 drivers/gpu/drm/radeon/rv770.c rv770_pcie_gen2_enable(rdev); rdev 1766 drivers/gpu/drm/radeon/rv770.c r = r600_vram_scratch_init(rdev); rdev 1770 drivers/gpu/drm/radeon/rv770.c rv770_mc_program(rdev); rdev 1772 drivers/gpu/drm/radeon/rv770.c if (rdev->flags & RADEON_IS_AGP) { rdev 1773 drivers/gpu/drm/radeon/rv770.c rv770_agp_enable(rdev); rdev 1775 drivers/gpu/drm/radeon/rv770.c r = rv770_pcie_gart_enable(rdev); rdev 1780 drivers/gpu/drm/radeon/rv770.c rv770_gpu_init(rdev); rdev 1783 drivers/gpu/drm/radeon/rv770.c r = radeon_wb_init(rdev); rdev 1787 drivers/gpu/drm/radeon/rv770.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 1789 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 1793 drivers/gpu/drm/radeon/rv770.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_DMA_INDEX); rdev 1795 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 1799 drivers/gpu/drm/radeon/rv770.c rv770_uvd_start(rdev); rdev 1802 drivers/gpu/drm/radeon/rv770.c if (!rdev->irq.installed) { rdev 1803 drivers/gpu/drm/radeon/rv770.c r = radeon_irq_kms_init(rdev); rdev 1808 drivers/gpu/drm/radeon/rv770.c r = r600_irq_init(rdev); rdev 1811 drivers/gpu/drm/radeon/rv770.c radeon_irq_kms_fini(rdev); rdev 1814 drivers/gpu/drm/radeon/rv770.c r600_irq_set(rdev); rdev 1816 drivers/gpu/drm/radeon/rv770.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 1817 drivers/gpu/drm/radeon/rv770.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, rdev 1822 drivers/gpu/drm/radeon/rv770.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 1823 drivers/gpu/drm/radeon/rv770.c r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, rdev 1828 drivers/gpu/drm/radeon/rv770.c r = rv770_cp_load_microcode(rdev); rdev 1831 drivers/gpu/drm/radeon/rv770.c r = r600_cp_resume(rdev); rdev 1835 drivers/gpu/drm/radeon/rv770.c r = r600_dma_resume(rdev); rdev 1839 drivers/gpu/drm/radeon/rv770.c rv770_uvd_resume(rdev); rdev 1841 drivers/gpu/drm/radeon/rv770.c r = radeon_ib_pool_init(rdev); rdev 1843 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 1847 drivers/gpu/drm/radeon/rv770.c r = radeon_audio_init(rdev); rdev 1856 drivers/gpu/drm/radeon/rv770.c int rv770_resume(struct radeon_device *rdev) rdev 1865 drivers/gpu/drm/radeon/rv770.c atom_asic_init(rdev->mode_info.atom_context); rdev 1868 drivers/gpu/drm/radeon/rv770.c rv770_init_golden_registers(rdev); rdev 1870 drivers/gpu/drm/radeon/rv770.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 1871 drivers/gpu/drm/radeon/rv770.c radeon_pm_resume(rdev); rdev 1873 drivers/gpu/drm/radeon/rv770.c rdev->accel_working = true; rdev 1874 drivers/gpu/drm/radeon/rv770.c r = rv770_startup(rdev); rdev 1877 drivers/gpu/drm/radeon/rv770.c rdev->accel_working = false; rdev 1885 drivers/gpu/drm/radeon/rv770.c int rv770_suspend(struct radeon_device *rdev) rdev 1887 drivers/gpu/drm/radeon/rv770.c radeon_pm_suspend(rdev); rdev 1888 drivers/gpu/drm/radeon/rv770.c radeon_audio_fini(rdev); rdev 1889 drivers/gpu/drm/radeon/rv770.c if (rdev->has_uvd) { rdev 1890 drivers/gpu/drm/radeon/rv770.c uvd_v1_0_fini(rdev); rdev 1891 drivers/gpu/drm/radeon/rv770.c radeon_uvd_suspend(rdev); rdev 1893 drivers/gpu/drm/radeon/rv770.c r700_cp_stop(rdev); rdev 1894 drivers/gpu/drm/radeon/rv770.c r600_dma_stop(rdev); rdev 1895 drivers/gpu/drm/radeon/rv770.c r600_irq_suspend(rdev); rdev 1896 drivers/gpu/drm/radeon/rv770.c radeon_wb_disable(rdev); rdev 1897 drivers/gpu/drm/radeon/rv770.c rv770_pcie_gart_disable(rdev); rdev 1908 drivers/gpu/drm/radeon/rv770.c int rv770_init(struct radeon_device *rdev) rdev 1913 drivers/gpu/drm/radeon/rv770.c if (!radeon_get_bios(rdev)) { rdev 1914 drivers/gpu/drm/radeon/rv770.c if (ASIC_IS_AVIVO(rdev)) rdev 1918 drivers/gpu/drm/radeon/rv770.c if (!rdev->is_atom_bios) { rdev 1919 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "Expecting atombios for R600 GPU\n"); rdev 1922 drivers/gpu/drm/radeon/rv770.c r = radeon_atombios_init(rdev); rdev 1926 drivers/gpu/drm/radeon/rv770.c if (!radeon_card_posted(rdev)) { rdev 1927 drivers/gpu/drm/radeon/rv770.c if (!rdev->bios) { rdev 1928 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); rdev 1932 drivers/gpu/drm/radeon/rv770.c atom_asic_init(rdev->mode_info.atom_context); rdev 1935 drivers/gpu/drm/radeon/rv770.c rv770_init_golden_registers(rdev); rdev 1937 drivers/gpu/drm/radeon/rv770.c r600_scratch_init(rdev); rdev 1939 drivers/gpu/drm/radeon/rv770.c radeon_surface_init(rdev); rdev 1941 drivers/gpu/drm/radeon/rv770.c radeon_get_clock_info(rdev->ddev); rdev 1943 drivers/gpu/drm/radeon/rv770.c r = radeon_fence_driver_init(rdev); rdev 1947 drivers/gpu/drm/radeon/rv770.c if (rdev->flags & RADEON_IS_AGP) { rdev 1948 drivers/gpu/drm/radeon/rv770.c r = radeon_agp_init(rdev); rdev 1950 drivers/gpu/drm/radeon/rv770.c radeon_agp_disable(rdev); rdev 1952 drivers/gpu/drm/radeon/rv770.c r = rv770_mc_init(rdev); rdev 1956 drivers/gpu/drm/radeon/rv770.c r = radeon_bo_init(rdev); rdev 1960 drivers/gpu/drm/radeon/rv770.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) { rdev 1961 drivers/gpu/drm/radeon/rv770.c r = r600_init_microcode(rdev); rdev 1969 drivers/gpu/drm/radeon/rv770.c radeon_pm_init(rdev); rdev 1971 drivers/gpu/drm/radeon/rv770.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; rdev 1972 drivers/gpu/drm/radeon/rv770.c r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); rdev 1974 drivers/gpu/drm/radeon/rv770.c rdev->ring[R600_RING_TYPE_DMA_INDEX].ring_obj = NULL; rdev 1975 drivers/gpu/drm/radeon/rv770.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_DMA_INDEX], 64 * 1024); rdev 1977 drivers/gpu/drm/radeon/rv770.c rv770_uvd_init(rdev); rdev 1979 drivers/gpu/drm/radeon/rv770.c rdev->ih.ring_obj = NULL; rdev 1980 drivers/gpu/drm/radeon/rv770.c r600_ih_ring_init(rdev, 64 * 1024); rdev 1982 drivers/gpu/drm/radeon/rv770.c r = r600_pcie_gart_init(rdev); rdev 1986 drivers/gpu/drm/radeon/rv770.c rdev->accel_working = true; rdev 1987 drivers/gpu/drm/radeon/rv770.c r = rv770_startup(rdev); rdev 1989 drivers/gpu/drm/radeon/rv770.c dev_err(rdev->dev, "disabling GPU acceleration\n"); rdev 1990 drivers/gpu/drm/radeon/rv770.c r700_cp_fini(rdev); rdev 1991 drivers/gpu/drm/radeon/rv770.c r600_dma_fini(rdev); rdev 1992 drivers/gpu/drm/radeon/rv770.c r600_irq_fini(rdev); rdev 1993 drivers/gpu/drm/radeon/rv770.c radeon_wb_fini(rdev); rdev 1994 drivers/gpu/drm/radeon/rv770.c radeon_ib_pool_fini(rdev); rdev 1995 drivers/gpu/drm/radeon/rv770.c radeon_irq_kms_fini(rdev); rdev 1996 drivers/gpu/drm/radeon/rv770.c rv770_pcie_gart_fini(rdev); rdev 1997 drivers/gpu/drm/radeon/rv770.c rdev->accel_working = false; rdev 2003 drivers/gpu/drm/radeon/rv770.c void rv770_fini(struct radeon_device *rdev) rdev 2005 drivers/gpu/drm/radeon/rv770.c radeon_pm_fini(rdev); rdev 2006 drivers/gpu/drm/radeon/rv770.c r700_cp_fini(rdev); rdev 2007 drivers/gpu/drm/radeon/rv770.c r600_dma_fini(rdev); rdev 2008 drivers/gpu/drm/radeon/rv770.c r600_irq_fini(rdev); rdev 2009 drivers/gpu/drm/radeon/rv770.c radeon_wb_fini(rdev); rdev 2010 drivers/gpu/drm/radeon/rv770.c radeon_ib_pool_fini(rdev); rdev 2011 drivers/gpu/drm/radeon/rv770.c radeon_irq_kms_fini(rdev); rdev 2012 drivers/gpu/drm/radeon/rv770.c uvd_v1_0_fini(rdev); rdev 2013 drivers/gpu/drm/radeon/rv770.c radeon_uvd_fini(rdev); rdev 2014 drivers/gpu/drm/radeon/rv770.c rv770_pcie_gart_fini(rdev); rdev 2015 drivers/gpu/drm/radeon/rv770.c r600_vram_scratch_fini(rdev); rdev 2016 drivers/gpu/drm/radeon/rv770.c radeon_gem_fini(rdev); rdev 2017 drivers/gpu/drm/radeon/rv770.c radeon_fence_driver_fini(rdev); rdev 2018 drivers/gpu/drm/radeon/rv770.c radeon_agp_fini(rdev); rdev 2019 drivers/gpu/drm/radeon/rv770.c radeon_bo_fini(rdev); rdev 2020 drivers/gpu/drm/radeon/rv770.c radeon_atombios_fini(rdev); rdev 2021 drivers/gpu/drm/radeon/rv770.c kfree(rdev->bios); rdev 2022 drivers/gpu/drm/radeon/rv770.c rdev->bios = NULL; rdev 2025 drivers/gpu/drm/radeon/rv770.c static void rv770_pcie_gen2_enable(struct radeon_device *rdev) rdev 2033 drivers/gpu/drm/radeon/rv770.c if (rdev->flags & RADEON_IS_IGP) rdev 2036 drivers/gpu/drm/radeon/rv770.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 2040 drivers/gpu/drm/radeon/rv770.c if (ASIC_IS_X2(rdev)) rdev 2043 drivers/gpu/drm/radeon/rv770.c if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) && rdev 2044 drivers/gpu/drm/radeon/rv770.c (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT)) rdev 42 drivers/gpu/drm/radeon/rv770_dma.c struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev, rdev 49 drivers/gpu/drm/radeon/rv770_dma.c int ring_index = rdev->asic->copy.dma_ring_index; rdev 50 drivers/gpu/drm/radeon/rv770_dma.c struct radeon_ring *ring = &rdev->ring[ring_index]; rdev 59 drivers/gpu/drm/radeon/rv770_dma.c r = radeon_ring_lock(rdev, ring, num_loops * 5 + 8); rdev 62 drivers/gpu/drm/radeon/rv770_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 66 drivers/gpu/drm/radeon/rv770_dma.c radeon_sync_resv(rdev, &sync, resv, false); rdev 67 drivers/gpu/drm/radeon/rv770_dma.c radeon_sync_rings(rdev, &sync, ring->idx); rdev 83 drivers/gpu/drm/radeon/rv770_dma.c r = radeon_fence_emit(rdev, &fence, ring->idx); rdev 85 drivers/gpu/drm/radeon/rv770_dma.c radeon_ring_unlock_undo(rdev, ring); rdev 86 drivers/gpu/drm/radeon/rv770_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 90 drivers/gpu/drm/radeon/rv770_dma.c radeon_ring_unlock_commit(rdev, ring, false); rdev 91 drivers/gpu/drm/radeon/rv770_dma.c radeon_sync_free(rdev, &sync, fence); rdev 54 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev) rdev 56 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rdev->pm.dpm.priv; rdev 61 drivers/gpu/drm/radeon/rv770_dpm.c struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev) rdev 63 drivers/gpu/drm/radeon/rv770_dpm.c struct evergreen_power_info *pi = rdev->pm.dpm.priv; rdev 68 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 71 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 91 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_enable_l0s(struct radeon_device *rdev) rdev 100 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_enable_l1(struct radeon_device *rdev) rdev 112 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_enable_pll_sleep_in_l1(struct radeon_device *rdev) rdev 129 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_gfx_clock_gating_enable(struct radeon_device *rdev, rdev 142 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_mg_clock_gating_enable(struct radeon_device *rdev, rdev 145 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 150 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV770) rdev 166 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_restore_cgcg(struct radeon_device *rdev) rdev 179 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_start_dpm(struct radeon_device *rdev) rdev 188 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_stop_dpm(struct radeon_device *rdev) rdev 192 drivers/gpu/drm/radeon/rv770_dpm.c result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_TwoLevelsDisabled); rdev 204 drivers/gpu/drm/radeon/rv770_dpm.c bool rv770_dpm_enabled(struct radeon_device *rdev) rdev 212 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_enable_thermal_protection(struct radeon_device *rdev, rdev 221 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_enable_acpi_pm(struct radeon_device *rdev) rdev 226 drivers/gpu/drm/radeon/rv770_dpm.c u8 rv770_get_seq_value(struct radeon_device *rdev, rdev 234 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_read_smc_soft_register(struct radeon_device *rdev, rdev 237 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 239 drivers/gpu/drm/radeon/rv770_dpm.c return rv770_read_smc_sram_dword(rdev, rdev 245 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_write_smc_soft_register(struct radeon_device *rdev, rdev 248 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 250 drivers/gpu/drm/radeon/rv770_dpm.c return rv770_write_smc_sram_dword(rdev, rdev 255 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_populate_smc_t(struct radeon_device *rdev, rdev 260 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 301 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_populate_smc_sp(struct radeon_device *rdev, rdev 305 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 370 drivers/gpu/drm/radeon/rv770_dpm.c u32 rv770_map_clkf_to_ibias(struct radeon_device *rdev, u32 clkf) rdev 385 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_populate_mclk_value(struct radeon_device *rdev, rdev 389 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 403 drivers/gpu/drm/radeon/rv770_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; rdev 409 drivers/gpu/drm/radeon/rv770_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, rdev 425 drivers/gpu/drm/radeon/rv770_dpm.c ibias = rv770_map_clkf_to_ibias(rdev, clkf); rdev 449 drivers/gpu/drm/radeon/rv770_dpm.c ibias = rv770_map_clkf_to_ibias(rdev, clkf); rdev 483 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_populate_sclk_value(struct radeon_device *rdev, rdev 487 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 500 drivers/gpu/drm/radeon/rv770_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 505 drivers/gpu/drm/radeon/rv770_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 541 drivers/gpu/drm/radeon/rv770_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 565 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc, rdev 568 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 591 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, rdev 594 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 613 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_convert_power_level_to_smc(struct radeon_device *rdev, rdev 618 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 627 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV740) rdev 628 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv740_populate_sclk_value(rdev, pl->sclk, rdev 630 drivers/gpu/drm/radeon/rv770_dpm.c else if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 631 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv730_populate_sclk_value(rdev, pl->sclk, rdev 634 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_populate_sclk_value(rdev, pl->sclk, rdev 639 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV740) { rdev 652 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv740_populate_mclk_value(rdev, pl->sclk, rdev 654 drivers/gpu/drm/radeon/rv770_dpm.c } else if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 655 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv730_populate_mclk_value(rdev, pl->sclk, rdev 658 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_populate_mclk_value(rdev, pl->sclk, rdev 663 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_populate_vddc_value(rdev, pl->vddc, rdev 668 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); rdev 673 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_convert_power_state_to_smc(struct radeon_device *rdev, rdev 683 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_convert_power_level_to_smc(rdev, rdev 690 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_convert_power_level_to_smc(rdev, rdev 697 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_convert_power_level_to_smc(rdev, rdev 708 drivers/gpu/drm/radeon/rv770_dpm.c smc_state->levels[0].seqValue = rv770_get_seq_value(rdev, rdev 710 drivers/gpu/drm/radeon/rv770_dpm.c smc_state->levels[1].seqValue = rv770_get_seq_value(rdev, rdev 712 drivers/gpu/drm/radeon/rv770_dpm.c smc_state->levels[2].seqValue = rv770_get_seq_value(rdev, rdev 715 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_smc_sp(rdev, radeon_state, smc_state); rdev 717 drivers/gpu/drm/radeon/rv770_dpm.c return rv770_populate_smc_t(rdev, radeon_state, smc_state); rdev 721 drivers/gpu/drm/radeon/rv770_dpm.c u32 rv770_calculate_memory_refresh_rate(struct radeon_device *rdev, rdev 738 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_program_memory_timing_parameters(struct radeon_device *rdev, rdev 742 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 752 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_set_engine_dram_timings(rdev, high_clock, rdev 763 drivers/gpu/drm/radeon/rv770_dpm.c POWERMODE0(rv770_calculate_memory_refresh_rate(rdev, pi->boot_sclk)) | rdev 764 drivers/gpu/drm/radeon/rv770_dpm.c POWERMODE1(rv770_calculate_memory_refresh_rate(rdev, state->low.sclk)) | rdev 765 drivers/gpu/drm/radeon/rv770_dpm.c POWERMODE2(rv770_calculate_memory_refresh_rate(rdev, state->medium.sclk)) | rdev 766 drivers/gpu/drm/radeon/rv770_dpm.c POWERMODE3(rv770_calculate_memory_refresh_rate(rdev, state->high.sclk)); rdev 770 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_enable_backbias(struct radeon_device *rdev, rdev 779 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_enable_spread_spectrum(struct radeon_device *rdev, rdev 782 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 789 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV740) rdev 790 drivers/gpu/drm/radeon/rv770_dpm.c rv740_enable_mclk_spread_spectrum(rdev, true); rdev 799 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV740) rdev 800 drivers/gpu/drm/radeon/rv770_dpm.c rv740_enable_mclk_spread_spectrum(rdev, false); rdev 804 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_program_mpll_timing_parameters(struct radeon_device *rdev) rdev 806 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 808 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV770) && !pi->mem_gddr5) { rdev 815 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_setup_bsp(struct radeon_device *rdev) rdev 817 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 818 drivers/gpu/drm/radeon/rv770_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 839 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_program_git(struct radeon_device *rdev) rdev 844 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_program_tp(struct radeon_device *rdev) rdev 862 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_program_tpp(struct radeon_device *rdev) rdev 867 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_program_sstp(struct radeon_device *rdev) rdev 872 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_program_engine_speed_parameters(struct radeon_device *rdev) rdev 877 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_enable_display_gap(struct radeon_device *rdev) rdev 887 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_program_vc(struct radeon_device *rdev) rdev 889 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 894 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_clear_vc(struct radeon_device *rdev) rdev 899 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_upload_firmware(struct radeon_device *rdev) rdev 901 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 904 drivers/gpu/drm/radeon/rv770_dpm.c rv770_reset_smc(rdev); rdev 905 drivers/gpu/drm/radeon/rv770_dpm.c rv770_stop_smc_clock(rdev); rdev 907 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_load_smc_ucode(rdev, pi->sram_end); rdev 914 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_populate_smc_acpi_state(struct radeon_device *rdev, rdev 917 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 941 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_vddc_value(rdev, pi->acpi_vddc, rdev 955 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, rdev 997 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); rdev 1005 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_populate_initial_mvdd_value(struct radeon_device *rdev, rdev 1008 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1022 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_populate_smc_initial_state(struct radeon_device *rdev, rdev 1027 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1068 drivers/gpu/drm/radeon/rv770_dpm.c rv770_get_seq_value(rdev, &initial_state->low); rdev 1070 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_vddc_value(rdev, rdev 1073 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_initial_mvdd_value(rdev, rdev 1090 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV740) { rdev 1113 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_populate_smc_vddc_table(struct radeon_device *rdev, rdev 1116 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1142 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_populate_smc_mvdd_table(struct radeon_device *rdev, rdev 1145 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1161 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_init_smc_table(struct radeon_device *rdev, rdev 1164 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1173 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_smc_vddc_table(rdev, table); rdev 1174 drivers/gpu/drm/radeon/rv770_dpm.c rv770_populate_smc_mvdd_table(rdev, table); rdev 1176 drivers/gpu/drm/radeon/rv770_dpm.c switch (rdev->pm.int_thermal_type) { rdev 1190 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) { rdev 1193 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT) rdev 1196 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT) rdev 1200 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 1206 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 1207 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv730_populate_smc_initial_state(rdev, radeon_boot_state, table); rdev 1209 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_populate_smc_initial_state(rdev, radeon_boot_state, table); rdev 1213 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV740) rdev 1214 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv740_populate_smc_acpi_state(rdev, table); rdev 1215 drivers/gpu/drm/radeon/rv770_dpm.c else if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 1216 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv730_populate_smc_acpi_state(rdev, table); rdev 1218 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_populate_smc_acpi_state(rdev, table); rdev 1224 drivers/gpu/drm/radeon/rv770_dpm.c return rv770_copy_bytes_to_smc(rdev, rdev 1231 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_construct_vddc_table(struct radeon_device *rdev) rdev 1233 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1239 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_get_min_voltage(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, &min); rdev 1240 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_get_max_voltage(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, &max); rdev 1241 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_get_voltage_step(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, &step); rdev 1252 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_get_voltage_gpio_settings(rdev, rdev 1282 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_get_mvdd_pin_configuration(struct radeon_device *rdev) rdev 1284 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1287 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_get_voltage_gpio_settings(rdev, rdev 1294 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_get_voltage_gpio_settings(rdev, rdev 1303 drivers/gpu/drm/radeon/rv770_dpm.c u8 rv770_get_memory_module_index(struct radeon_device *rdev) rdev 1308 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_get_mvdd_configuration(struct radeon_device *rdev) rdev 1310 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1314 drivers/gpu/drm/radeon/rv770_dpm.c memory_module_index = rv770_get_memory_module_index(rdev); rdev 1316 drivers/gpu/drm/radeon/rv770_dpm.c if (radeon_atom_get_memory_info(rdev, memory_module_index, &memory_info)) { rdev 1329 drivers/gpu/drm/radeon/rv770_dpm.c return rv770_get_mvdd_pin_configuration(rdev); rdev 1332 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_enable_voltage_control(struct radeon_device *rdev, rdev 1341 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_program_display_gap(struct radeon_device *rdev) rdev 1346 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.new_active_crtcs & 1) { rdev 1349 drivers/gpu/drm/radeon/rv770_dpm.c } else if (rdev->pm.dpm.new_active_crtcs & 2) { rdev 1359 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_enable_dynamic_pcie_gen2(struct radeon_device *rdev, rdev 1362 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_bif_dynamic_pcie_gen2(rdev, enable); rdev 1370 drivers/gpu/drm/radeon/rv770_dpm.c static void r7xx_program_memory_timing_parameters(struct radeon_device *rdev, rdev 1373 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || rdev 1374 drivers/gpu/drm/radeon/rv770_dpm.c (rdev->family == CHIP_RV710) || rdev 1375 drivers/gpu/drm/radeon/rv770_dpm.c (rdev->family == CHIP_RV740)) rdev 1376 drivers/gpu/drm/radeon/rv770_dpm.c rv730_program_memory_timing_parameters(rdev, radeon_new_state); rdev 1378 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_memory_timing_parameters(rdev, radeon_new_state); rdev 1381 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_upload_sw_state(struct radeon_device *rdev, rdev 1384 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1390 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_convert_power_state_to_smc(rdev, radeon_new_state, &state); rdev 1394 drivers/gpu/drm/radeon/rv770_dpm.c return rv770_copy_bytes_to_smc(rdev, address, (const u8 *)&state, rdev 1399 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_halt_smc(struct radeon_device *rdev) rdev 1401 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_Halt) != PPSMC_Result_OK) rdev 1404 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_wait_for_smc_inactive(rdev) != PPSMC_Result_OK) rdev 1410 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_resume_smc(struct radeon_device *rdev) rdev 1412 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_Resume) != PPSMC_Result_OK) rdev 1417 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_set_sw_state(struct radeon_device *rdev) rdev 1419 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToSwState) != PPSMC_Result_OK) rdev 1424 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_set_boot_state(struct radeon_device *rdev) rdev 1426 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToInitialState) != PPSMC_Result_OK) rdev 1431 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 1445 drivers/gpu/drm/radeon/rv770_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 1448 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 1462 drivers/gpu/drm/radeon/rv770_dpm.c radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); rdev 1465 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_restrict_performance_levels_before_switch(struct radeon_device *rdev) rdev 1467 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, (PPSMC_Msg)(PPSMC_MSG_NoForcedLevel)) != PPSMC_Result_OK) rdev 1470 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, (PPSMC_Msg)(PPSMC_MSG_TwoLevelsDisabled)) != PPSMC_Result_OK) rdev 1476 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_dpm_force_performance_level(struct radeon_device *rdev, rdev 1482 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_ZeroLevelsDisabled) != PPSMC_Result_OK) rdev 1486 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK) rdev 1490 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK) rdev 1495 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_send_msg_to_smc(rdev, msg) != PPSMC_Result_OK) rdev 1498 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.forced_level = level; rdev 1503 drivers/gpu/drm/radeon/rv770_dpm.c void r7xx_start_smc(struct radeon_device *rdev) rdev 1505 drivers/gpu/drm/radeon/rv770_dpm.c rv770_start_smc(rdev); rdev 1506 drivers/gpu/drm/radeon/rv770_dpm.c rv770_start_smc_clock(rdev); rdev 1510 drivers/gpu/drm/radeon/rv770_dpm.c void r7xx_stop_smc(struct radeon_device *rdev) rdev 1512 drivers/gpu/drm/radeon/rv770_dpm.c rv770_reset_smc(rdev); rdev 1513 drivers/gpu/drm/radeon/rv770_dpm.c rv770_stop_smc_clock(rdev); rdev 1516 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_read_clock_registers(struct radeon_device *rdev) rdev 1518 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1543 drivers/gpu/drm/radeon/rv770_dpm.c static void r7xx_read_clock_registers(struct radeon_device *rdev) rdev 1545 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family == CHIP_RV740) rdev 1546 drivers/gpu/drm/radeon/rv770_dpm.c rv740_read_clock_registers(rdev); rdev 1547 drivers/gpu/drm/radeon/rv770_dpm.c else if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 1548 drivers/gpu/drm/radeon/rv770_dpm.c rv730_read_clock_registers(rdev); rdev 1550 drivers/gpu/drm/radeon/rv770_dpm.c rv770_read_clock_registers(rdev); rdev 1553 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_read_voltage_smio_registers(struct radeon_device *rdev) rdev 1555 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1561 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_reset_smio_status(struct radeon_device *rdev) rdev 1563 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1589 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_get_memory_type(struct radeon_device *rdev) rdev 1591 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1604 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_get_pcie_gen2_status(struct radeon_device *rdev) rdev 1606 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1627 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_enter_ulp_state(struct radeon_device *rdev) rdev 1629 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1646 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_exit_ulp_state(struct radeon_device *rdev) rdev 1648 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1656 drivers/gpu/drm/radeon/rv770_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1669 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_get_mclk_odt_threshold(struct radeon_device *rdev) rdev 1671 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1677 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) { rdev 1678 drivers/gpu/drm/radeon/rv770_dpm.c memory_module_index = rv770_get_memory_module_index(rdev); rdev 1680 drivers/gpu/drm/radeon/rv770_dpm.c if (radeon_atom_get_memory_info(rdev, memory_module_index, &memory_info)) rdev 1689 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_get_max_vddc(struct radeon_device *rdev) rdev 1691 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1694 drivers/gpu/drm/radeon/rv770_dpm.c if (radeon_atom_get_max_vddc(rdev, 0, 0, &vddc)) rdev 1700 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_program_response_times(struct radeon_device *rdev) rdev 1707 drivers/gpu/drm/radeon/rv770_dpm.c voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time; rdev 1708 drivers/gpu/drm/radeon/rv770_dpm.c backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time; rdev 1719 drivers/gpu/drm/radeon/rv770_dpm.c reference_clock = radeon_get_xclk(rdev); rdev 1726 drivers/gpu/drm/radeon/rv770_dpm.c rv770_write_smc_soft_register(rdev, rdev 1728 drivers/gpu/drm/radeon/rv770_dpm.c rv770_write_smc_soft_register(rdev, rdev 1730 drivers/gpu/drm/radeon/rv770_dpm.c rv770_write_smc_soft_register(rdev, rdev 1732 drivers/gpu/drm/radeon/rv770_dpm.c rv770_write_smc_soft_register(rdev, rdev 1737 drivers/gpu/drm/radeon/rv770_dpm.c rv770_write_smc_soft_register(rdev, rdev 1743 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_program_dcodt_before_state_switch(struct radeon_device *rdev, rdev 1747 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1768 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 1769 drivers/gpu/drm/radeon/rv770_dpm.c rv730_program_dcodt(rdev, new_use_dc); rdev 1772 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_program_dcodt_after_state_switch(struct radeon_device *rdev, rdev 1776 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1797 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 1798 drivers/gpu/drm/radeon/rv770_dpm.c rv730_program_dcodt(rdev, new_use_dc); rdev 1801 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_retrieve_odt_values(struct radeon_device *rdev) rdev 1803 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1808 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 1809 drivers/gpu/drm/radeon/rv770_dpm.c rv730_get_odt_values(rdev); rdev 1812 drivers/gpu/drm/radeon/rv770_dpm.c static void rv770_set_dpm_event_sources(struct radeon_device *rdev, u32 sources) rdev 1814 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1849 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_enable_auto_throttle_source(struct radeon_device *rdev, rdev 1853 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1858 drivers/gpu/drm/radeon/rv770_dpm.c rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 1863 drivers/gpu/drm/radeon/rv770_dpm.c rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 1868 drivers/gpu/drm/radeon/rv770_dpm.c static int rv770_set_thermal_temperature_range(struct radeon_device *rdev, rdev 1887 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.thermal.min_temp = low_temp; rdev 1888 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.thermal.max_temp = high_temp; rdev 1893 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_dpm_enable(struct radeon_device *rdev) rdev 1895 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 1896 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 1900 drivers/gpu/drm/radeon/rv770_dpm.c rv770_restore_cgcg(rdev); rdev 1902 drivers/gpu/drm/radeon/rv770_dpm.c if (rv770_dpm_enabled(rdev)) rdev 1906 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_voltage_control(rdev, true); rdev 1907 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_construct_vddc_table(rdev); rdev 1915 drivers/gpu/drm/radeon/rv770_dpm.c rv770_retrieve_odt_values(rdev); rdev 1918 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_get_mvdd_configuration(rdev); rdev 1925 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) rdev 1926 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_backbias(rdev, true); rdev 1928 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_spread_spectrum(rdev, true); rdev 1931 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_thermal_protection(rdev, true); rdev 1933 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_mpll_timing_parameters(rdev); rdev 1934 drivers/gpu/drm/radeon/rv770_dpm.c rv770_setup_bsp(rdev); rdev 1935 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_git(rdev); rdev 1936 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_tp(rdev); rdev 1937 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_tpp(rdev); rdev 1938 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_sstp(rdev); rdev 1939 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_engine_speed_parameters(rdev); rdev 1940 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_display_gap(rdev); rdev 1941 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_vc(rdev); rdev 1944 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_dynamic_pcie_gen2(rdev, true); rdev 1946 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_upload_firmware(rdev); rdev 1951 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_init_smc_table(rdev, boot_ps); rdev 1957 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_response_times(rdev); rdev 1958 drivers/gpu/drm/radeon/rv770_dpm.c r7xx_start_smc(rdev); rdev 1960 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 1961 drivers/gpu/drm/radeon/rv770_dpm.c rv730_start_dpm(rdev); rdev 1963 drivers/gpu/drm/radeon/rv770_dpm.c rv770_start_dpm(rdev); rdev 1966 drivers/gpu/drm/radeon/rv770_dpm.c rv770_gfx_clock_gating_enable(rdev, true); rdev 1969 drivers/gpu/drm/radeon/rv770_dpm.c rv770_mg_clock_gating_enable(rdev, true); rdev 1971 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); rdev 1976 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_dpm_late_enable(struct radeon_device *rdev) rdev 1980 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->irq.installed && rdev 1981 drivers/gpu/drm/radeon/rv770_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1984 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 1987 drivers/gpu/drm/radeon/rv770_dpm.c rdev->irq.dpm_thermal = true; rdev 1988 drivers/gpu/drm/radeon/rv770_dpm.c radeon_irq_set(rdev); rdev 1989 drivers/gpu/drm/radeon/rv770_dpm.c result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_EnableThermalInterrupt); rdev 1998 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_dpm_disable(struct radeon_device *rdev) rdev 2000 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2002 drivers/gpu/drm/radeon/rv770_dpm.c if (!rv770_dpm_enabled(rdev)) rdev 2005 drivers/gpu/drm/radeon/rv770_dpm.c rv770_clear_vc(rdev); rdev 2008 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_thermal_protection(rdev, false); rdev 2010 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_spread_spectrum(rdev, false); rdev 2013 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_dynamic_pcie_gen2(rdev, false); rdev 2015 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->irq.installed && rdev 2016 drivers/gpu/drm/radeon/rv770_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 2017 drivers/gpu/drm/radeon/rv770_dpm.c rdev->irq.dpm_thermal = false; rdev 2018 drivers/gpu/drm/radeon/rv770_dpm.c radeon_irq_set(rdev); rdev 2022 drivers/gpu/drm/radeon/rv770_dpm.c rv770_gfx_clock_gating_enable(rdev, false); rdev 2025 drivers/gpu/drm/radeon/rv770_dpm.c rv770_mg_clock_gating_enable(rdev, false); rdev 2027 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV730) || (rdev->family == CHIP_RV710)) rdev 2028 drivers/gpu/drm/radeon/rv770_dpm.c rv730_stop_dpm(rdev); rdev 2030 drivers/gpu/drm/radeon/rv770_dpm.c rv770_stop_dpm(rdev); rdev 2032 drivers/gpu/drm/radeon/rv770_dpm.c r7xx_stop_smc(rdev); rdev 2033 drivers/gpu/drm/radeon/rv770_dpm.c rv770_reset_smio_status(rdev); rdev 2036 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_dpm_set_power_state(struct radeon_device *rdev) rdev 2038 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2039 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; rdev 2040 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; rdev 2043 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_restrict_performance_levels_before_switch(rdev); rdev 2048 drivers/gpu/drm/radeon/rv770_dpm.c rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 2049 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_halt_smc(rdev); rdev 2054 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_upload_sw_state(rdev, new_ps); rdev 2059 drivers/gpu/drm/radeon/rv770_dpm.c r7xx_program_memory_timing_parameters(rdev, new_ps); rdev 2061 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_dcodt_before_state_switch(rdev, new_ps, old_ps); rdev 2062 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_resume_smc(rdev); rdev 2067 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv770_set_sw_state(rdev); rdev 2073 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_dcodt_after_state_switch(rdev, new_ps, old_ps); rdev 2074 drivers/gpu/drm/radeon/rv770_dpm.c rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 2080 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_dpm_reset_asic(struct radeon_device *rdev) rdev 2082 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2083 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 2085 drivers/gpu/drm/radeon/rv770_dpm.c rv770_restrict_performance_levels_before_switch(rdev); rdev 2087 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_dcodt_before_state_switch(rdev, boot_ps, boot_ps); rdev 2088 drivers/gpu/drm/radeon/rv770_dpm.c rv770_set_boot_state(rdev); rdev 2090 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_dcodt_after_state_switch(rdev, boot_ps, boot_ps); rdev 2094 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_dpm_setup_asic(struct radeon_device *rdev) rdev 2096 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2098 drivers/gpu/drm/radeon/rv770_dpm.c r7xx_read_clock_registers(rdev); rdev 2099 drivers/gpu/drm/radeon/rv770_dpm.c rv770_read_voltage_smio_registers(rdev); rdev 2100 drivers/gpu/drm/radeon/rv770_dpm.c rv770_get_memory_type(rdev); rdev 2102 drivers/gpu/drm/radeon/rv770_dpm.c rv770_get_mclk_odt_threshold(rdev); rdev 2103 drivers/gpu/drm/radeon/rv770_dpm.c rv770_get_pcie_gen2_status(rdev); rdev 2105 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_acpi_pm(rdev); rdev 2108 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L0s) rdev 2109 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_l0s(rdev); rdev 2110 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L1) rdev 2111 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_l1(rdev); rdev 2112 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1) rdev 2113 drivers/gpu/drm/radeon/rv770_dpm.c rv770_enable_pll_sleep_in_l1(rdev); rdev 2117 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 2119 drivers/gpu/drm/radeon/rv770_dpm.c rv770_program_display_gap(rdev); rdev 2143 drivers/gpu/drm/radeon/rv770_dpm.c static void rv7xx_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 2168 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 2170 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 2173 drivers/gpu/drm/radeon/rv770_dpm.c static void rv7xx_parse_pplib_clock_info(struct radeon_device *rdev, rdev 2177 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2178 drivers/gpu/drm/radeon/rv770_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2196 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family >= CHIP_CEDAR) { rdev 2226 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family >= CHIP_CEDAR) rdev 2235 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family >= CHIP_BARTS) { rdev 2250 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); rdev 2251 drivers/gpu/drm/radeon/rv770_dpm.c pl->mclk = rdev->clock.default_mclk; rdev 2252 drivers/gpu/drm/radeon/rv770_dpm.c pl->sclk = rdev->clock.default_sclk; rdev 2259 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; rdev 2260 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; rdev 2261 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; rdev 2262 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; rdev 2266 drivers/gpu/drm/radeon/rv770_dpm.c int rv7xx_parse_power_table(struct radeon_device *rdev) rdev 2268 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 2284 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, rdev 2287 drivers/gpu/drm/radeon/rv770_dpm.c if (!rdev->pm.dpm.ps) rdev 2304 drivers/gpu/drm/radeon/rv770_dpm.c kfree(rdev->pm.dpm.ps); rdev 2307 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 2308 drivers/gpu/drm/radeon/rv770_dpm.c rv7xx_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 2317 drivers/gpu/drm/radeon/rv770_dpm.c rv7xx_parse_pplib_clock_info(rdev, rdev 2318 drivers/gpu/drm/radeon/rv770_dpm.c &rdev->pm.dpm.ps[i], j, rdev 2323 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates; rdev 2327 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_get_engine_memory_ss(struct radeon_device *rdev) rdev 2329 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 2332 drivers/gpu/drm/radeon/rv770_dpm.c pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 2334 drivers/gpu/drm/radeon/rv770_dpm.c pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 2343 drivers/gpu/drm/radeon/rv770_dpm.c int rv770_dpm_init(struct radeon_device *rdev) rdev 2352 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.priv = pi; rdev 2354 drivers/gpu/drm/radeon/rv770_dpm.c rv770_get_max_vddc(rdev); rdev 2360 drivers/gpu/drm/radeon/rv770_dpm.c ret = r600_get_platform_caps(rdev); rdev 2364 drivers/gpu/drm/radeon/rv770_dpm.c ret = rv7xx_parse_power_table(rdev); rdev 2368 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.voltage_response_time == 0) rdev 2369 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; rdev 2370 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.dpm.backbias_response_time == 0) rdev 2371 drivers/gpu/drm/radeon/rv770_dpm.c rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; rdev 2373 drivers/gpu/drm/radeon/rv770_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 2389 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0); rdev 2392 drivers/gpu/drm/radeon/rv770_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0); rdev 2394 drivers/gpu/drm/radeon/rv770_dpm.c rv770_get_engine_memory_ss(rdev); rdev 2409 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE) rdev 2416 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->flags & RADEON_IS_MOBILITY) rdev 2432 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_dpm_print_power_state(struct radeon_device *rdev, rdev 2441 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family >= CHIP_CEDAR) { rdev 2462 drivers/gpu/drm/radeon/rv770_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 2465 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 2468 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 2485 drivers/gpu/drm/radeon/rv770_dpm.c if (rdev->family >= CHIP_CEDAR) { rdev 2495 drivers/gpu/drm/radeon/rv770_dpm.c u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev) rdev 2497 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 2517 drivers/gpu/drm/radeon/rv770_dpm.c u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev) rdev 2519 drivers/gpu/drm/radeon/rv770_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 2539 drivers/gpu/drm/radeon/rv770_dpm.c void rv770_dpm_fini(struct radeon_device *rdev) rdev 2543 drivers/gpu/drm/radeon/rv770_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 2544 drivers/gpu/drm/radeon/rv770_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 2546 drivers/gpu/drm/radeon/rv770_dpm.c kfree(rdev->pm.dpm.ps); rdev 2547 drivers/gpu/drm/radeon/rv770_dpm.c kfree(rdev->pm.dpm.priv); rdev 2550 drivers/gpu/drm/radeon/rv770_dpm.c u32 rv770_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 2552 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps); rdev 2560 drivers/gpu/drm/radeon/rv770_dpm.c u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 2562 drivers/gpu/drm/radeon/rv770_dpm.c struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps); rdev 2570 drivers/gpu/drm/radeon/rv770_dpm.c bool rv770_dpm_vblank_too_short(struct radeon_device *rdev) rdev 2572 drivers/gpu/drm/radeon/rv770_dpm.c u32 vblank_time = r600_dpm_get_vblank_time(rdev); rdev 2577 drivers/gpu/drm/radeon/rv770_dpm.c if ((rdev->family == CHIP_RV770) && rdev 2578 drivers/gpu/drm/radeon/rv770_dpm.c !(rdev->flags & RADEON_IS_MOBILITY)) rdev 180 drivers/gpu/drm/radeon/rv770_dpm.h int rv730_populate_sclk_value(struct radeon_device *rdev, rdev 183 drivers/gpu/drm/radeon/rv770_dpm.h int rv730_populate_mclk_value(struct radeon_device *rdev, rdev 186 drivers/gpu/drm/radeon/rv770_dpm.h void rv730_read_clock_registers(struct radeon_device *rdev); rdev 187 drivers/gpu/drm/radeon/rv770_dpm.h int rv730_populate_smc_acpi_state(struct radeon_device *rdev, rdev 189 drivers/gpu/drm/radeon/rv770_dpm.h int rv730_populate_smc_initial_state(struct radeon_device *rdev, rdev 192 drivers/gpu/drm/radeon/rv770_dpm.h void rv730_program_memory_timing_parameters(struct radeon_device *rdev, rdev 194 drivers/gpu/drm/radeon/rv770_dpm.h void rv730_power_gating_enable(struct radeon_device *rdev, rdev 196 drivers/gpu/drm/radeon/rv770_dpm.h void rv730_start_dpm(struct radeon_device *rdev); rdev 197 drivers/gpu/drm/radeon/rv770_dpm.h void rv730_stop_dpm(struct radeon_device *rdev); rdev 198 drivers/gpu/drm/radeon/rv770_dpm.h void rv730_program_dcodt(struct radeon_device *rdev, bool use_dcodt); rdev 199 drivers/gpu/drm/radeon/rv770_dpm.h void rv730_get_odt_values(struct radeon_device *rdev); rdev 202 drivers/gpu/drm/radeon/rv770_dpm.h int rv740_populate_sclk_value(struct radeon_device *rdev, u32 engine_clock, rdev 204 drivers/gpu/drm/radeon/rv770_dpm.h int rv740_populate_mclk_value(struct radeon_device *rdev, rdev 207 drivers/gpu/drm/radeon/rv770_dpm.h void rv740_read_clock_registers(struct radeon_device *rdev); rdev 208 drivers/gpu/drm/radeon/rv770_dpm.h int rv740_populate_smc_acpi_state(struct radeon_device *rdev, rdev 210 drivers/gpu/drm/radeon/rv770_dpm.h void rv740_enable_mclk_spread_spectrum(struct radeon_device *rdev, rdev 217 drivers/gpu/drm/radeon/rv770_dpm.h u32 rv770_map_clkf_to_ibias(struct radeon_device *rdev, u32 clkf); rdev 218 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc, rdev 220 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, rdev 222 drivers/gpu/drm/radeon/rv770_dpm.h u8 rv770_get_seq_value(struct radeon_device *rdev, rdev 224 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_populate_initial_mvdd_value(struct radeon_device *rdev, rdev 226 drivers/gpu/drm/radeon/rv770_dpm.h u32 rv770_calculate_memory_refresh_rate(struct radeon_device *rdev, rdev 228 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_program_response_times(struct radeon_device *rdev); rdev 229 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_populate_smc_sp(struct radeon_device *rdev, rdev 232 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_populate_smc_t(struct radeon_device *rdev, rdev 235 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_read_voltage_smio_registers(struct radeon_device *rdev); rdev 236 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_get_memory_type(struct radeon_device *rdev); rdev 237 drivers/gpu/drm/radeon/rv770_dpm.h void r7xx_start_smc(struct radeon_device *rdev); rdev 238 drivers/gpu/drm/radeon/rv770_dpm.h u8 rv770_get_memory_module_index(struct radeon_device *rdev); rdev 239 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_get_max_vddc(struct radeon_device *rdev); rdev 240 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_get_pcie_gen2_status(struct radeon_device *rdev); rdev 241 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_enable_acpi_pm(struct radeon_device *rdev); rdev 242 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_restore_cgcg(struct radeon_device *rdev); rdev 243 drivers/gpu/drm/radeon/rv770_dpm.h bool rv770_dpm_enabled(struct radeon_device *rdev); rdev 244 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_enable_voltage_control(struct radeon_device *rdev, rdev 246 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_enable_backbias(struct radeon_device *rdev, rdev 248 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_enable_thermal_protection(struct radeon_device *rdev, rdev 250 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_enable_auto_throttle_source(struct radeon_device *rdev, rdev 253 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_setup_bsp(struct radeon_device *rdev); rdev 254 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_program_git(struct radeon_device *rdev); rdev 255 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_program_tp(struct radeon_device *rdev); rdev 256 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_program_tpp(struct radeon_device *rdev); rdev 257 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_program_sstp(struct radeon_device *rdev); rdev 258 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_program_engine_speed_parameters(struct radeon_device *rdev); rdev 259 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_program_vc(struct radeon_device *rdev); rdev 260 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_clear_vc(struct radeon_device *rdev); rdev 261 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_upload_firmware(struct radeon_device *rdev); rdev 262 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_stop_dpm(struct radeon_device *rdev); rdev 263 drivers/gpu/drm/radeon/rv770_dpm.h void r7xx_stop_smc(struct radeon_device *rdev); rdev 264 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_reset_smio_status(struct radeon_device *rdev); rdev 265 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_restrict_performance_levels_before_switch(struct radeon_device *rdev); rdev 266 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_dpm_force_performance_level(struct radeon_device *rdev, rdev 268 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_halt_smc(struct radeon_device *rdev); rdev 269 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_resume_smc(struct radeon_device *rdev); rdev 270 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_set_sw_state(struct radeon_device *rdev); rdev 271 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_set_boot_state(struct radeon_device *rdev); rdev 272 drivers/gpu/drm/radeon/rv770_dpm.h int rv7xx_parse_power_table(struct radeon_device *rdev); rdev 273 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 276 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 279 drivers/gpu/drm/radeon/rv770_dpm.h void rv770_get_engine_memory_ss(struct radeon_device *rdev); rdev 282 drivers/gpu/drm/radeon/rv770_dpm.h int rv770_write_smc_soft_register(struct radeon_device *rdev, rdev 277 drivers/gpu/drm/radeon/rv770_smc.c static int rv770_set_smc_sram_address(struct radeon_device *rdev, rdev 295 drivers/gpu/drm/radeon/rv770_smc.c int rv770_copy_bytes_to_smc(struct radeon_device *rdev, rdev 311 drivers/gpu/drm/radeon/rv770_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 316 drivers/gpu/drm/radeon/rv770_smc.c ret = rv770_set_smc_sram_address(rdev, addr, limit); rdev 331 drivers/gpu/drm/radeon/rv770_smc.c ret = rv770_set_smc_sram_address(rdev, addr, limit); rdev 349 drivers/gpu/drm/radeon/rv770_smc.c ret = rv770_set_smc_sram_address(rdev, addr, limit); rdev 357 drivers/gpu/drm/radeon/rv770_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 362 drivers/gpu/drm/radeon/rv770_smc.c static int rv770_program_interrupt_vectors(struct radeon_device *rdev, rdev 392 drivers/gpu/drm/radeon/rv770_smc.c void rv770_start_smc(struct radeon_device *rdev) rdev 397 drivers/gpu/drm/radeon/rv770_smc.c void rv770_reset_smc(struct radeon_device *rdev) rdev 402 drivers/gpu/drm/radeon/rv770_smc.c void rv770_stop_smc_clock(struct radeon_device *rdev) rdev 407 drivers/gpu/drm/radeon/rv770_smc.c void rv770_start_smc_clock(struct radeon_device *rdev) rdev 412 drivers/gpu/drm/radeon/rv770_smc.c bool rv770_is_smc_running(struct radeon_device *rdev) rdev 424 drivers/gpu/drm/radeon/rv770_smc.c PPSMC_Result rv770_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg) rdev 430 drivers/gpu/drm/radeon/rv770_smc.c if (!rv770_is_smc_running(rdev)) rdev 435 drivers/gpu/drm/radeon/rv770_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 450 drivers/gpu/drm/radeon/rv770_smc.c PPSMC_Result rv770_wait_for_smc_inactive(struct radeon_device *rdev) rdev 455 drivers/gpu/drm/radeon/rv770_smc.c if (!rv770_is_smc_running(rdev)) rdev 458 drivers/gpu/drm/radeon/rv770_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 467 drivers/gpu/drm/radeon/rv770_smc.c static void rv770_clear_smc_sram(struct radeon_device *rdev, u16 limit) rdev 472 drivers/gpu/drm/radeon/rv770_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 474 drivers/gpu/drm/radeon/rv770_smc.c rv770_set_smc_sram_address(rdev, i, limit); rdev 477 drivers/gpu/drm/radeon/rv770_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 480 drivers/gpu/drm/radeon/rv770_smc.c int rv770_load_smc_ucode(struct radeon_device *rdev, rdev 491 drivers/gpu/drm/radeon/rv770_smc.c if (!rdev->smc_fw) rdev 494 drivers/gpu/drm/radeon/rv770_smc.c rv770_clear_smc_sram(rdev, limit); rdev 496 drivers/gpu/drm/radeon/rv770_smc.c switch (rdev->family) { rdev 588 drivers/gpu/drm/radeon/rv770_smc.c ucode_data = (const u8 *)rdev->smc_fw->data; rdev 589 drivers/gpu/drm/radeon/rv770_smc.c ret = rv770_copy_bytes_to_smc(rdev, ucode_start_address, rdev 595 drivers/gpu/drm/radeon/rv770_smc.c ret = rv770_program_interrupt_vectors(rdev, int_vect_start_address, rdev 603 drivers/gpu/drm/radeon/rv770_smc.c int rv770_read_smc_sram_dword(struct radeon_device *rdev, rdev 609 drivers/gpu/drm/radeon/rv770_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 610 drivers/gpu/drm/radeon/rv770_smc.c ret = rv770_set_smc_sram_address(rdev, smc_address, limit); rdev 613 drivers/gpu/drm/radeon/rv770_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 618 drivers/gpu/drm/radeon/rv770_smc.c int rv770_write_smc_sram_dword(struct radeon_device *rdev, rdev 624 drivers/gpu/drm/radeon/rv770_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 625 drivers/gpu/drm/radeon/rv770_smc.c ret = rv770_set_smc_sram_address(rdev, smc_address, limit); rdev 628 drivers/gpu/drm/radeon/rv770_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 190 drivers/gpu/drm/radeon/rv770_smc.h int rv770_copy_bytes_to_smc(struct radeon_device *rdev, rdev 193 drivers/gpu/drm/radeon/rv770_smc.h void rv770_start_smc(struct radeon_device *rdev); rdev 194 drivers/gpu/drm/radeon/rv770_smc.h void rv770_reset_smc(struct radeon_device *rdev); rdev 195 drivers/gpu/drm/radeon/rv770_smc.h void rv770_stop_smc_clock(struct radeon_device *rdev); rdev 196 drivers/gpu/drm/radeon/rv770_smc.h void rv770_start_smc_clock(struct radeon_device *rdev); rdev 197 drivers/gpu/drm/radeon/rv770_smc.h bool rv770_is_smc_running(struct radeon_device *rdev); rdev 198 drivers/gpu/drm/radeon/rv770_smc.h PPSMC_Result rv770_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg); rdev 199 drivers/gpu/drm/radeon/rv770_smc.h PPSMC_Result rv770_wait_for_smc_inactive(struct radeon_device *rdev); rdev 200 drivers/gpu/drm/radeon/rv770_smc.h int rv770_read_smc_sram_dword(struct radeon_device *rdev, rdev 202 drivers/gpu/drm/radeon/rv770_smc.h int rv770_write_smc_sram_dword(struct radeon_device *rdev, rdev 204 drivers/gpu/drm/radeon/rv770_smc.h int rv770_load_smc_ucode(struct radeon_device *rdev, rdev 125 drivers/gpu/drm/radeon/si.c static u32 si_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh); rdev 126 drivers/gpu/drm/radeon/si.c static void si_pcie_gen3_enable(struct radeon_device *rdev); rdev 127 drivers/gpu/drm/radeon/si.c static void si_program_aspm(struct radeon_device *rdev); rdev 128 drivers/gpu/drm/radeon/si.c extern void sumo_rlc_fini(struct radeon_device *rdev); rdev 129 drivers/gpu/drm/radeon/si.c extern int sumo_rlc_init(struct radeon_device *rdev); rdev 130 drivers/gpu/drm/radeon/si.c extern int r600_ih_ring_alloc(struct radeon_device *rdev); rdev 131 drivers/gpu/drm/radeon/si.c extern void r600_ih_ring_fini(struct radeon_device *rdev); rdev 132 drivers/gpu/drm/radeon/si.c extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); rdev 133 drivers/gpu/drm/radeon/si.c extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); rdev 134 drivers/gpu/drm/radeon/si.c extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); rdev 135 drivers/gpu/drm/radeon/si.c extern u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev); rdev 136 drivers/gpu/drm/radeon/si.c extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); rdev 137 drivers/gpu/drm/radeon/si.c extern bool evergreen_is_display_hung(struct radeon_device *rdev); rdev 138 drivers/gpu/drm/radeon/si.c static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, rdev 140 drivers/gpu/drm/radeon/si.c static void si_init_pg(struct radeon_device *rdev); rdev 141 drivers/gpu/drm/radeon/si.c static void si_init_cg(struct radeon_device *rdev); rdev 142 drivers/gpu/drm/radeon/si.c static void si_fini_pg(struct radeon_device *rdev); rdev 143 drivers/gpu/drm/radeon/si.c static void si_fini_cg(struct radeon_device *rdev); rdev 144 drivers/gpu/drm/radeon/si.c static void si_rlc_stop(struct radeon_device *rdev); rdev 1233 drivers/gpu/drm/radeon/si.c static void si_init_golden_registers(struct radeon_device *rdev) rdev 1235 drivers/gpu/drm/radeon/si.c switch (rdev->family) { rdev 1237 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1240 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1243 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1246 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1251 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1254 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1257 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1262 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1265 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1268 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1271 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1276 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1279 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1282 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1287 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1290 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1293 drivers/gpu/drm/radeon/si.c radeon_program_register_sequence(rdev, rdev 1312 drivers/gpu/drm/radeon/si.c int si_get_allowed_info_register(struct radeon_device *rdev, rdev 1343 drivers/gpu/drm/radeon/si.c u32 si_get_xclk(struct radeon_device *rdev) rdev 1345 drivers/gpu/drm/radeon/si.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 1360 drivers/gpu/drm/radeon/si.c int si_get_temp(struct radeon_device *rdev) rdev 1576 drivers/gpu/drm/radeon/si.c int si_mc_load_microcode(struct radeon_device *rdev) rdev 1585 drivers/gpu/drm/radeon/si.c if (!rdev->mc_fw) rdev 1588 drivers/gpu/drm/radeon/si.c if (rdev->new_fw) { rdev 1590 drivers/gpu/drm/radeon/si.c (const struct mc_firmware_header_v1_0 *)rdev->mc_fw->data; rdev 1595 drivers/gpu/drm/radeon/si.c (rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); rdev 1598 drivers/gpu/drm/radeon/si.c (rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 1600 drivers/gpu/drm/radeon/si.c ucode_size = rdev->mc_fw->size / 4; rdev 1602 drivers/gpu/drm/radeon/si.c switch (rdev->family) { rdev 1625 drivers/gpu/drm/radeon/si.c fw_data = (const __be32 *)rdev->mc_fw->data; rdev 1637 drivers/gpu/drm/radeon/si.c if (rdev->new_fw) { rdev 1647 drivers/gpu/drm/radeon/si.c if (rdev->new_fw) rdev 1659 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1664 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 1674 drivers/gpu/drm/radeon/si.c static int si_init_microcode(struct radeon_device *rdev) rdev 1689 drivers/gpu/drm/radeon/si.c switch (rdev->family) { rdev 1703 drivers/gpu/drm/radeon/si.c if ((rdev->pdev->revision == 0x81) && rdev 1704 drivers/gpu/drm/radeon/si.c ((rdev->pdev->device == 0x6810) || rdev 1705 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6811))) rdev 1718 drivers/gpu/drm/radeon/si.c if (((rdev->pdev->device == 0x6820) && rdev 1719 drivers/gpu/drm/radeon/si.c ((rdev->pdev->revision == 0x81) || rdev 1720 drivers/gpu/drm/radeon/si.c (rdev->pdev->revision == 0x83))) || rdev 1721 drivers/gpu/drm/radeon/si.c ((rdev->pdev->device == 0x6821) && rdev 1722 drivers/gpu/drm/radeon/si.c ((rdev->pdev->revision == 0x83) || rdev 1723 drivers/gpu/drm/radeon/si.c (rdev->pdev->revision == 0x87))) || rdev 1724 drivers/gpu/drm/radeon/si.c ((rdev->pdev->revision == 0x87) && rdev 1725 drivers/gpu/drm/radeon/si.c ((rdev->pdev->device == 0x6823) || rdev 1726 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x682b)))) rdev 1739 drivers/gpu/drm/radeon/si.c if (((rdev->pdev->revision == 0x81) && rdev 1740 drivers/gpu/drm/radeon/si.c ((rdev->pdev->device == 0x6600) || rdev 1741 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6604) || rdev 1742 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6605) || rdev 1743 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6610))) || rdev 1744 drivers/gpu/drm/radeon/si.c ((rdev->pdev->revision == 0x83) && rdev 1745 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6610))) rdev 1757 drivers/gpu/drm/radeon/si.c if (((rdev->pdev->revision == 0x81) && rdev 1758 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6660)) || rdev 1759 drivers/gpu/drm/radeon/si.c ((rdev->pdev->revision == 0x83) && rdev 1760 drivers/gpu/drm/radeon/si.c ((rdev->pdev->device == 0x6660) || rdev 1761 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6663) || rdev 1762 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6665) || rdev 1763 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6667)))) rdev 1765 drivers/gpu/drm/radeon/si.c else if ((rdev->pdev->revision == 0xc3) && rdev 1766 drivers/gpu/drm/radeon/si.c (rdev->pdev->device == 0x6665)) rdev 1786 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev); rdev 1789 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev); rdev 1792 drivers/gpu/drm/radeon/si.c if (rdev->pfp_fw->size != pfp_req_size) { rdev 1794 drivers/gpu/drm/radeon/si.c rdev->pfp_fw->size, fw_name); rdev 1799 drivers/gpu/drm/radeon/si.c err = radeon_ucode_validate(rdev->pfp_fw); rdev 1810 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); rdev 1813 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->me_fw, fw_name, rdev->dev); rdev 1816 drivers/gpu/drm/radeon/si.c if (rdev->me_fw->size != me_req_size) { rdev 1818 drivers/gpu/drm/radeon/si.c rdev->me_fw->size, fw_name); rdev 1822 drivers/gpu/drm/radeon/si.c err = radeon_ucode_validate(rdev->me_fw); rdev 1833 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev); rdev 1836 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev); rdev 1839 drivers/gpu/drm/radeon/si.c if (rdev->ce_fw->size != ce_req_size) { rdev 1841 drivers/gpu/drm/radeon/si.c rdev->ce_fw->size, fw_name); rdev 1845 drivers/gpu/drm/radeon/si.c err = radeon_ucode_validate(rdev->ce_fw); rdev 1856 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev); rdev 1859 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev); rdev 1862 drivers/gpu/drm/radeon/si.c if (rdev->rlc_fw->size != rlc_req_size) { rdev 1864 drivers/gpu/drm/radeon/si.c rdev->rlc_fw->size, fw_name); rdev 1868 drivers/gpu/drm/radeon/si.c err = radeon_ucode_validate(rdev->rlc_fw); rdev 1882 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); rdev 1885 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); rdev 1888 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); rdev 1892 drivers/gpu/drm/radeon/si.c if ((rdev->mc_fw->size != mc_req_size) && rdev 1893 drivers/gpu/drm/radeon/si.c (rdev->mc_fw->size != mc2_req_size)) { rdev 1895 drivers/gpu/drm/radeon/si.c rdev->mc_fw->size, fw_name); rdev 1898 drivers/gpu/drm/radeon/si.c DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size); rdev 1900 drivers/gpu/drm/radeon/si.c err = radeon_ucode_validate(rdev->mc_fw); rdev 1916 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); rdev 1919 drivers/gpu/drm/radeon/si.c err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); rdev 1922 drivers/gpu/drm/radeon/si.c release_firmware(rdev->smc_fw); rdev 1923 drivers/gpu/drm/radeon/si.c rdev->smc_fw = NULL; rdev 1925 drivers/gpu/drm/radeon/si.c } else if (rdev->smc_fw->size != smc_req_size) { rdev 1927 drivers/gpu/drm/radeon/si.c rdev->smc_fw->size, fw_name); rdev 1931 drivers/gpu/drm/radeon/si.c err = radeon_ucode_validate(rdev->smc_fw); rdev 1942 drivers/gpu/drm/radeon/si.c rdev->new_fw = false; rdev 1947 drivers/gpu/drm/radeon/si.c rdev->new_fw = true; rdev 1954 drivers/gpu/drm/radeon/si.c release_firmware(rdev->pfp_fw); rdev 1955 drivers/gpu/drm/radeon/si.c rdev->pfp_fw = NULL; rdev 1956 drivers/gpu/drm/radeon/si.c release_firmware(rdev->me_fw); rdev 1957 drivers/gpu/drm/radeon/si.c rdev->me_fw = NULL; rdev 1958 drivers/gpu/drm/radeon/si.c release_firmware(rdev->ce_fw); rdev 1959 drivers/gpu/drm/radeon/si.c rdev->ce_fw = NULL; rdev 1960 drivers/gpu/drm/radeon/si.c release_firmware(rdev->rlc_fw); rdev 1961 drivers/gpu/drm/radeon/si.c rdev->rlc_fw = NULL; rdev 1962 drivers/gpu/drm/radeon/si.c release_firmware(rdev->mc_fw); rdev 1963 drivers/gpu/drm/radeon/si.c rdev->mc_fw = NULL; rdev 1964 drivers/gpu/drm/radeon/si.c release_firmware(rdev->smc_fw); rdev 1965 drivers/gpu/drm/radeon/si.c rdev->smc_fw = NULL; rdev 1971 drivers/gpu/drm/radeon/si.c static u32 dce6_line_buffer_adjust(struct radeon_device *rdev, rdev 2009 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 2030 drivers/gpu/drm/radeon/si.c static u32 si_get_number_of_dram_channels(struct radeon_device *rdev) rdev 2298 drivers/gpu/drm/radeon/si.c static void dce6_program_watermarks(struct radeon_device *rdev, rdev 2323 drivers/gpu/drm/radeon/si.c if (rdev->family == CHIP_ARUBA) rdev 2324 drivers/gpu/drm/radeon/si.c dram_channels = evergreen_get_number_of_dram_channels(rdev); rdev 2326 drivers/gpu/drm/radeon/si.c dram_channels = si_get_number_of_dram_channels(rdev); rdev 2329 drivers/gpu/drm/radeon/si.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 2331 drivers/gpu/drm/radeon/si.c radeon_dpm_get_mclk(rdev, false) * 10; rdev 2333 drivers/gpu/drm/radeon/si.c radeon_dpm_get_sclk(rdev, false) * 10; rdev 2335 drivers/gpu/drm/radeon/si.c wm_high.yclk = rdev->pm.current_mclk * 10; rdev 2336 drivers/gpu/drm/radeon/si.c wm_high.sclk = rdev->pm.current_sclk * 10; rdev 2356 drivers/gpu/drm/radeon/si.c if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { rdev 2358 drivers/gpu/drm/radeon/si.c radeon_dpm_get_mclk(rdev, true) * 10; rdev 2360 drivers/gpu/drm/radeon/si.c radeon_dpm_get_sclk(rdev, true) * 10; rdev 2362 drivers/gpu/drm/radeon/si.c wm_low.yclk = rdev->pm.current_mclk * 10; rdev 2363 drivers/gpu/drm/radeon/si.c wm_low.sclk = rdev->pm.current_sclk * 10; rdev 2392 drivers/gpu/drm/radeon/si.c (rdev->disp_priority == 2)) { rdev 2400 drivers/gpu/drm/radeon/si.c (rdev->disp_priority == 2)) { rdev 2464 drivers/gpu/drm/radeon/si.c void dce6_bandwidth_update(struct radeon_device *rdev) rdev 2471 drivers/gpu/drm/radeon/si.c if (!rdev->mode_info.mode_config_initialized) rdev 2474 drivers/gpu/drm/radeon/si.c radeon_update_display_priority(rdev); rdev 2476 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->num_crtc; i++) { rdev 2477 drivers/gpu/drm/radeon/si.c if (rdev->mode_info.crtcs[i]->base.enabled) rdev 2480 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->num_crtc; i += 2) { rdev 2481 drivers/gpu/drm/radeon/si.c mode0 = &rdev->mode_info.crtcs[i]->base.mode; rdev 2482 drivers/gpu/drm/radeon/si.c mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; rdev 2483 drivers/gpu/drm/radeon/si.c lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); rdev 2484 drivers/gpu/drm/radeon/si.c dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); rdev 2485 drivers/gpu/drm/radeon/si.c lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); rdev 2486 drivers/gpu/drm/radeon/si.c dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i+1], lb_size, num_heads); rdev 2493 drivers/gpu/drm/radeon/si.c static void si_tiling_mode_table_init(struct radeon_device *rdev) rdev 2495 drivers/gpu/drm/radeon/si.c u32 *tile = rdev->config.si.tile_mode_array; rdev 2497 drivers/gpu/drm/radeon/si.c ARRAY_SIZE(rdev->config.si.tile_mode_array); rdev 2500 drivers/gpu/drm/radeon/si.c switch (rdev->config.si.mem_row_size_in_kb) { rdev 2516 drivers/gpu/drm/radeon/si.c switch(rdev->family) { rdev 2947 drivers/gpu/drm/radeon/si.c DRM_ERROR("unknown asic: 0x%x\n", rdev->family); rdev 2951 drivers/gpu/drm/radeon/si.c static void si_select_se_sh(struct radeon_device *rdev, rdev 2978 drivers/gpu/drm/radeon/si.c static u32 si_get_cu_enabled(struct radeon_device *rdev, u32 cu_per_sh) rdev 2996 drivers/gpu/drm/radeon/si.c static void si_setup_spi(struct radeon_device *rdev, rdev 3005 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, i, j); rdev 3007 drivers/gpu/drm/radeon/si.c active_cu = si_get_cu_enabled(rdev, cu_per_sh); rdev 3020 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 3023 drivers/gpu/drm/radeon/si.c static u32 si_get_rb_disabled(struct radeon_device *rdev, rdev 3043 drivers/gpu/drm/radeon/si.c static void si_setup_rb(struct radeon_device *rdev, rdev 3054 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, i, j); rdev 3055 drivers/gpu/drm/radeon/si.c data = si_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); rdev 3059 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 3068 drivers/gpu/drm/radeon/si.c rdev->config.si.backend_enable_mask = enabled_rbs; rdev 3071 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, i, 0xffffffff); rdev 3090 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 3093 drivers/gpu/drm/radeon/si.c static void si_gpu_init(struct radeon_device *rdev) rdev 3102 drivers/gpu/drm/radeon/si.c switch (rdev->family) { rdev 3104 drivers/gpu/drm/radeon/si.c rdev->config.si.max_shader_engines = 2; rdev 3105 drivers/gpu/drm/radeon/si.c rdev->config.si.max_tile_pipes = 12; rdev 3106 drivers/gpu/drm/radeon/si.c rdev->config.si.max_cu_per_sh = 8; rdev 3107 drivers/gpu/drm/radeon/si.c rdev->config.si.max_sh_per_se = 2; rdev 3108 drivers/gpu/drm/radeon/si.c rdev->config.si.max_backends_per_se = 4; rdev 3109 drivers/gpu/drm/radeon/si.c rdev->config.si.max_texture_channel_caches = 12; rdev 3110 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gprs = 256; rdev 3111 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gs_threads = 32; rdev 3112 drivers/gpu/drm/radeon/si.c rdev->config.si.max_hw_contexts = 8; rdev 3114 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_frontend = 0x20; rdev 3115 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_backend = 0x100; rdev 3116 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_hiz_tile_fifo_size = 0x30; rdev 3117 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_earlyz_tile_fifo_size = 0x130; rdev 3121 drivers/gpu/drm/radeon/si.c rdev->config.si.max_shader_engines = 2; rdev 3122 drivers/gpu/drm/radeon/si.c rdev->config.si.max_tile_pipes = 8; rdev 3123 drivers/gpu/drm/radeon/si.c rdev->config.si.max_cu_per_sh = 5; rdev 3124 drivers/gpu/drm/radeon/si.c rdev->config.si.max_sh_per_se = 2; rdev 3125 drivers/gpu/drm/radeon/si.c rdev->config.si.max_backends_per_se = 4; rdev 3126 drivers/gpu/drm/radeon/si.c rdev->config.si.max_texture_channel_caches = 8; rdev 3127 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gprs = 256; rdev 3128 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gs_threads = 32; rdev 3129 drivers/gpu/drm/radeon/si.c rdev->config.si.max_hw_contexts = 8; rdev 3131 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_frontend = 0x20; rdev 3132 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_backend = 0x100; rdev 3133 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_hiz_tile_fifo_size = 0x30; rdev 3134 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_earlyz_tile_fifo_size = 0x130; rdev 3139 drivers/gpu/drm/radeon/si.c rdev->config.si.max_shader_engines = 1; rdev 3140 drivers/gpu/drm/radeon/si.c rdev->config.si.max_tile_pipes = 4; rdev 3141 drivers/gpu/drm/radeon/si.c rdev->config.si.max_cu_per_sh = 5; rdev 3142 drivers/gpu/drm/radeon/si.c rdev->config.si.max_sh_per_se = 2; rdev 3143 drivers/gpu/drm/radeon/si.c rdev->config.si.max_backends_per_se = 4; rdev 3144 drivers/gpu/drm/radeon/si.c rdev->config.si.max_texture_channel_caches = 4; rdev 3145 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gprs = 256; rdev 3146 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gs_threads = 32; rdev 3147 drivers/gpu/drm/radeon/si.c rdev->config.si.max_hw_contexts = 8; rdev 3149 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_frontend = 0x20; rdev 3150 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_backend = 0x40; rdev 3151 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_hiz_tile_fifo_size = 0x30; rdev 3152 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_earlyz_tile_fifo_size = 0x130; rdev 3156 drivers/gpu/drm/radeon/si.c rdev->config.si.max_shader_engines = 1; rdev 3157 drivers/gpu/drm/radeon/si.c rdev->config.si.max_tile_pipes = 4; rdev 3158 drivers/gpu/drm/radeon/si.c rdev->config.si.max_cu_per_sh = 6; rdev 3159 drivers/gpu/drm/radeon/si.c rdev->config.si.max_sh_per_se = 1; rdev 3160 drivers/gpu/drm/radeon/si.c rdev->config.si.max_backends_per_se = 2; rdev 3161 drivers/gpu/drm/radeon/si.c rdev->config.si.max_texture_channel_caches = 4; rdev 3162 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gprs = 256; rdev 3163 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gs_threads = 16; rdev 3164 drivers/gpu/drm/radeon/si.c rdev->config.si.max_hw_contexts = 8; rdev 3166 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_frontend = 0x20; rdev 3167 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_backend = 0x40; rdev 3168 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_hiz_tile_fifo_size = 0x30; rdev 3169 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_earlyz_tile_fifo_size = 0x130; rdev 3173 drivers/gpu/drm/radeon/si.c rdev->config.si.max_shader_engines = 1; rdev 3174 drivers/gpu/drm/radeon/si.c rdev->config.si.max_tile_pipes = 4; rdev 3175 drivers/gpu/drm/radeon/si.c rdev->config.si.max_cu_per_sh = 5; rdev 3176 drivers/gpu/drm/radeon/si.c rdev->config.si.max_sh_per_se = 1; rdev 3177 drivers/gpu/drm/radeon/si.c rdev->config.si.max_backends_per_se = 1; rdev 3178 drivers/gpu/drm/radeon/si.c rdev->config.si.max_texture_channel_caches = 2; rdev 3179 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gprs = 256; rdev 3180 drivers/gpu/drm/radeon/si.c rdev->config.si.max_gs_threads = 16; rdev 3181 drivers/gpu/drm/radeon/si.c rdev->config.si.max_hw_contexts = 8; rdev 3183 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_frontend = 0x20; rdev 3184 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_prim_fifo_size_backend = 0x40; rdev 3185 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_hiz_tile_fifo_size = 0x30; rdev 3186 drivers/gpu/drm/radeon/si.c rdev->config.si.sc_earlyz_tile_fifo_size = 0x130; rdev 3204 drivers/gpu/drm/radeon/si.c evergreen_fix_pci_max_read_req_size(rdev); rdev 3211 drivers/gpu/drm/radeon/si.c rdev->config.si.num_tile_pipes = rdev->config.si.max_tile_pipes; rdev 3212 drivers/gpu/drm/radeon/si.c rdev->config.si.mem_max_burst_length_bytes = 256; rdev 3214 drivers/gpu/drm/radeon/si.c rdev->config.si.mem_row_size_in_kb = (4 * (1 << (8 + tmp))) / 1024; rdev 3215 drivers/gpu/drm/radeon/si.c if (rdev->config.si.mem_row_size_in_kb > 4) rdev 3216 drivers/gpu/drm/radeon/si.c rdev->config.si.mem_row_size_in_kb = 4; rdev 3218 drivers/gpu/drm/radeon/si.c rdev->config.si.shader_engine_tile_size = 32; rdev 3219 drivers/gpu/drm/radeon/si.c rdev->config.si.num_gpus = 1; rdev 3220 drivers/gpu/drm/radeon/si.c rdev->config.si.multi_gpu_tile_size = 64; rdev 3224 drivers/gpu/drm/radeon/si.c switch (rdev->config.si.mem_row_size_in_kb) { rdev 3244 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config = 0; rdev 3245 drivers/gpu/drm/radeon/si.c switch (rdev->config.si.num_tile_pipes) { rdev 3247 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= (0 << 0); rdev 3250 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= (1 << 0); rdev 3253 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= (2 << 0); rdev 3258 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= (3 << 0); rdev 3263 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= 0 << 4; rdev 3266 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= 1 << 4; rdev 3270 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= 2 << 4; rdev 3273 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= rdev 3275 drivers/gpu/drm/radeon/si.c rdev->config.si.tile_config |= rdev 3284 drivers/gpu/drm/radeon/si.c if (rdev->has_uvd) { rdev 3290 drivers/gpu/drm/radeon/si.c si_tiling_mode_table_init(rdev); rdev 3292 drivers/gpu/drm/radeon/si.c si_setup_rb(rdev, rdev->config.si.max_shader_engines, rdev 3293 drivers/gpu/drm/radeon/si.c rdev->config.si.max_sh_per_se, rdev 3294 drivers/gpu/drm/radeon/si.c rdev->config.si.max_backends_per_se); rdev 3296 drivers/gpu/drm/radeon/si.c si_setup_spi(rdev, rdev->config.si.max_shader_engines, rdev 3297 drivers/gpu/drm/radeon/si.c rdev->config.si.max_sh_per_se, rdev 3298 drivers/gpu/drm/radeon/si.c rdev->config.si.max_cu_per_sh); rdev 3300 drivers/gpu/drm/radeon/si.c rdev->config.si.active_cus = 0; rdev 3301 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->config.si.max_shader_engines; i++) { rdev 3302 drivers/gpu/drm/radeon/si.c for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { rdev 3303 drivers/gpu/drm/radeon/si.c rdev->config.si.active_cus += rdev 3304 drivers/gpu/drm/radeon/si.c hweight32(si_get_cu_active_bitmap(rdev, i, j)); rdev 3318 drivers/gpu/drm/radeon/si.c WREG32(PA_SC_FIFO_SIZE, (SC_FRONTEND_PRIM_FIFO_SIZE(rdev->config.si.sc_prim_fifo_size_frontend) | rdev 3319 drivers/gpu/drm/radeon/si.c SC_BACKEND_PRIM_FIFO_SIZE(rdev->config.si.sc_prim_fifo_size_backend) | rdev 3320 drivers/gpu/drm/radeon/si.c SC_HIZ_TILE_FIFO_SIZE(rdev->config.si.sc_hiz_tile_fifo_size) | rdev 3321 drivers/gpu/drm/radeon/si.c SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.si.sc_earlyz_tile_fifo_size))); rdev 3362 drivers/gpu/drm/radeon/si.c static void si_scratch_init(struct radeon_device *rdev) rdev 3366 drivers/gpu/drm/radeon/si.c rdev->scratch.num_reg = 7; rdev 3367 drivers/gpu/drm/radeon/si.c rdev->scratch.reg_base = SCRATCH_REG0; rdev 3368 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->scratch.num_reg; i++) { rdev 3369 drivers/gpu/drm/radeon/si.c rdev->scratch.free[i] = true; rdev 3370 drivers/gpu/drm/radeon/si.c rdev->scratch.reg[i] = rdev->scratch.reg_base + (i * 4); rdev 3374 drivers/gpu/drm/radeon/si.c void si_fence_ring_emit(struct radeon_device *rdev, rdev 3377 drivers/gpu/drm/radeon/si.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 3378 drivers/gpu/drm/radeon/si.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 3404 drivers/gpu/drm/radeon/si.c void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 3406 drivers/gpu/drm/radeon/si.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 3424 drivers/gpu/drm/radeon/si.c } else if (rdev->wb.enabled) { rdev 3464 drivers/gpu/drm/radeon/si.c static void si_cp_enable(struct radeon_device *rdev, bool enable) rdev 3469 drivers/gpu/drm/radeon/si.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 3470 drivers/gpu/drm/radeon/si.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); rdev 3473 drivers/gpu/drm/radeon/si.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 3474 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false; rdev 3475 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; rdev 3480 drivers/gpu/drm/radeon/si.c static int si_cp_load_microcode(struct radeon_device *rdev) rdev 3484 drivers/gpu/drm/radeon/si.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw) rdev 3487 drivers/gpu/drm/radeon/si.c si_cp_enable(rdev, false); rdev 3489 drivers/gpu/drm/radeon/si.c if (rdev->new_fw) { rdev 3491 drivers/gpu/drm/radeon/si.c (const struct gfx_firmware_header_v1_0 *)rdev->pfp_fw->data; rdev 3493 drivers/gpu/drm/radeon/si.c (const struct gfx_firmware_header_v1_0 *)rdev->ce_fw->data; rdev 3495 drivers/gpu/drm/radeon/si.c (const struct gfx_firmware_header_v1_0 *)rdev->me_fw->data; rdev 3505 drivers/gpu/drm/radeon/si.c (rdev->pfp_fw->data + le32_to_cpu(pfp_hdr->header.ucode_array_offset_bytes)); rdev 3514 drivers/gpu/drm/radeon/si.c (rdev->ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); rdev 3523 drivers/gpu/drm/radeon/si.c (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); rdev 3533 drivers/gpu/drm/radeon/si.c fw_data = (const __be32 *)rdev->pfp_fw->data; rdev 3540 drivers/gpu/drm/radeon/si.c fw_data = (const __be32 *)rdev->ce_fw->data; rdev 3547 drivers/gpu/drm/radeon/si.c fw_data = (const __be32 *)rdev->me_fw->data; rdev 3561 drivers/gpu/drm/radeon/si.c static int si_cp_start(struct radeon_device *rdev) rdev 3563 drivers/gpu/drm/radeon/si.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3566 drivers/gpu/drm/radeon/si.c r = radeon_ring_lock(rdev, ring, 7 + 4); rdev 3575 drivers/gpu/drm/radeon/si.c radeon_ring_write(ring, rdev->config.si.max_hw_contexts - 1); rdev 3585 drivers/gpu/drm/radeon/si.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3587 drivers/gpu/drm/radeon/si.c si_cp_enable(rdev, true); rdev 3589 drivers/gpu/drm/radeon/si.c r = radeon_ring_lock(rdev, ring, si_default_size + 10); rdev 3614 drivers/gpu/drm/radeon/si.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3617 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[i]; rdev 3618 drivers/gpu/drm/radeon/si.c r = radeon_ring_lock(rdev, ring, 2); rdev 3624 drivers/gpu/drm/radeon/si.c radeon_ring_unlock_commit(rdev, ring, false); rdev 3630 drivers/gpu/drm/radeon/si.c static void si_cp_fini(struct radeon_device *rdev) rdev 3633 drivers/gpu/drm/radeon/si.c si_cp_enable(rdev, false); rdev 3635 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3636 drivers/gpu/drm/radeon/si.c radeon_ring_fini(rdev, ring); rdev 3637 drivers/gpu/drm/radeon/si.c radeon_scratch_free(rdev, ring->rptr_save_reg); rdev 3639 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 3640 drivers/gpu/drm/radeon/si.c radeon_ring_fini(rdev, ring); rdev 3641 drivers/gpu/drm/radeon/si.c radeon_scratch_free(rdev, ring->rptr_save_reg); rdev 3643 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 3644 drivers/gpu/drm/radeon/si.c radeon_ring_fini(rdev, ring); rdev 3645 drivers/gpu/drm/radeon/si.c radeon_scratch_free(rdev, ring->rptr_save_reg); rdev 3648 drivers/gpu/drm/radeon/si.c static int si_cp_resume(struct radeon_device *rdev) rdev 3655 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, false); rdev 3664 drivers/gpu/drm/radeon/si.c WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); rdev 3668 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 3682 drivers/gpu/drm/radeon/si.c WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); rdev 3683 drivers/gpu/drm/radeon/si.c WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); rdev 3685 drivers/gpu/drm/radeon/si.c if (rdev->wb.enabled) rdev 3699 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 3713 drivers/gpu/drm/radeon/si.c WREG32(CP_RB1_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFFFFFFFC); rdev 3714 drivers/gpu/drm/radeon/si.c WREG32(CP_RB1_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFF); rdev 3723 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 3737 drivers/gpu/drm/radeon/si.c WREG32(CP_RB2_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFFFFFFFC); rdev 3738 drivers/gpu/drm/radeon/si.c WREG32(CP_RB2_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFF); rdev 3746 drivers/gpu/drm/radeon/si.c si_cp_start(rdev); rdev 3747 drivers/gpu/drm/radeon/si.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = true; rdev 3748 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = true; rdev 3749 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = true; rdev 3750 drivers/gpu/drm/radeon/si.c r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]); rdev 3752 drivers/gpu/drm/radeon/si.c rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; rdev 3753 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false; rdev 3754 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; rdev 3757 drivers/gpu/drm/radeon/si.c r = radeon_ring_test(rdev, CAYMAN_RING_TYPE_CP1_INDEX, &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]); rdev 3759 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false; rdev 3761 drivers/gpu/drm/radeon/si.c r = radeon_ring_test(rdev, CAYMAN_RING_TYPE_CP2_INDEX, &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]); rdev 3763 drivers/gpu/drm/radeon/si.c rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; rdev 3766 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, true); rdev 3768 drivers/gpu/drm/radeon/si.c if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) rdev 3769 drivers/gpu/drm/radeon/si.c radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size); rdev 3774 drivers/gpu/drm/radeon/si.c u32 si_gpu_check_soft_reset(struct radeon_device *rdev) rdev 3838 drivers/gpu/drm/radeon/si.c if (evergreen_is_display_hung(rdev)) rdev 3855 drivers/gpu/drm/radeon/si.c static void si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) rdev 3864 drivers/gpu/drm/radeon/si.c dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask); rdev 3866 drivers/gpu/drm/radeon/si.c evergreen_print_gpu_status_regs(rdev); rdev 3867 drivers/gpu/drm/radeon/si.c dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", rdev 3869 drivers/gpu/drm/radeon/si.c dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", rdev 3873 drivers/gpu/drm/radeon/si.c si_fini_pg(rdev); rdev 3874 drivers/gpu/drm/radeon/si.c si_fini_cg(rdev); rdev 3877 drivers/gpu/drm/radeon/si.c si_rlc_stop(rdev); rdev 3897 drivers/gpu/drm/radeon/si.c evergreen_mc_stop(rdev, &save); rdev 3898 drivers/gpu/drm/radeon/si.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 3899 drivers/gpu/drm/radeon/si.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 3953 drivers/gpu/drm/radeon/si.c dev_info(rdev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); rdev 3967 drivers/gpu/drm/radeon/si.c dev_info(rdev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); rdev 3981 drivers/gpu/drm/radeon/si.c evergreen_mc_resume(rdev, &save); rdev 3984 drivers/gpu/drm/radeon/si.c evergreen_print_gpu_status_regs(rdev); rdev 3987 drivers/gpu/drm/radeon/si.c static void si_set_clk_bypass_mode(struct radeon_device *rdev) rdev 3999 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4014 drivers/gpu/drm/radeon/si.c static void si_spll_powerdown(struct radeon_device *rdev) rdev 4035 drivers/gpu/drm/radeon/si.c static void si_gpu_pci_config_reset(struct radeon_device *rdev) rdev 4040 drivers/gpu/drm/radeon/si.c dev_info(rdev->dev, "GPU pci config reset\n"); rdev 4045 drivers/gpu/drm/radeon/si.c si_fini_pg(rdev); rdev 4046 drivers/gpu/drm/radeon/si.c si_fini_cg(rdev); rdev 4061 drivers/gpu/drm/radeon/si.c si_rlc_stop(rdev); rdev 4066 drivers/gpu/drm/radeon/si.c evergreen_mc_stop(rdev, &save); rdev 4067 drivers/gpu/drm/radeon/si.c if (evergreen_mc_wait_for_idle(rdev)) { rdev 4068 drivers/gpu/drm/radeon/si.c dev_warn(rdev->dev, "Wait for MC idle timed out !\n"); rdev 4072 drivers/gpu/drm/radeon/si.c si_set_clk_bypass_mode(rdev); rdev 4074 drivers/gpu/drm/radeon/si.c si_spll_powerdown(rdev); rdev 4076 drivers/gpu/drm/radeon/si.c pci_clear_master(rdev->pdev); rdev 4078 drivers/gpu/drm/radeon/si.c radeon_pci_config_reset(rdev); rdev 4080 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 4087 drivers/gpu/drm/radeon/si.c int si_asic_reset(struct radeon_device *rdev, bool hard) rdev 4092 drivers/gpu/drm/radeon/si.c si_gpu_pci_config_reset(rdev); rdev 4096 drivers/gpu/drm/radeon/si.c reset_mask = si_gpu_check_soft_reset(rdev); rdev 4099 drivers/gpu/drm/radeon/si.c r600_set_bios_scratch_engine_hung(rdev, true); rdev 4102 drivers/gpu/drm/radeon/si.c si_gpu_soft_reset(rdev, reset_mask); rdev 4104 drivers/gpu/drm/radeon/si.c reset_mask = si_gpu_check_soft_reset(rdev); rdev 4108 drivers/gpu/drm/radeon/si.c si_gpu_pci_config_reset(rdev); rdev 4110 drivers/gpu/drm/radeon/si.c reset_mask = si_gpu_check_soft_reset(rdev); rdev 4113 drivers/gpu/drm/radeon/si.c r600_set_bios_scratch_engine_hung(rdev, false); rdev 4127 drivers/gpu/drm/radeon/si.c bool si_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 4129 drivers/gpu/drm/radeon/si.c u32 reset_mask = si_gpu_check_soft_reset(rdev); rdev 4134 drivers/gpu/drm/radeon/si.c radeon_ring_lockup_update(rdev, ring); rdev 4137 drivers/gpu/drm/radeon/si.c return radeon_ring_test_lockup(rdev, ring); rdev 4141 drivers/gpu/drm/radeon/si.c static void si_mc_program(struct radeon_device *rdev) rdev 4157 drivers/gpu/drm/radeon/si.c evergreen_mc_stop(rdev, &save); rdev 4158 drivers/gpu/drm/radeon/si.c if (radeon_mc_wait_for_idle(rdev)) { rdev 4159 drivers/gpu/drm/radeon/si.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 4161 drivers/gpu/drm/radeon/si.c if (!ASIC_IS_NODCE(rdev)) rdev 4166 drivers/gpu/drm/radeon/si.c rdev->mc.vram_start >> 12); rdev 4168 drivers/gpu/drm/radeon/si.c rdev->mc.vram_end >> 12); rdev 4170 drivers/gpu/drm/radeon/si.c rdev->vram_scratch.gpu_addr >> 12); rdev 4171 drivers/gpu/drm/radeon/si.c tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16; rdev 4172 drivers/gpu/drm/radeon/si.c tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); rdev 4175 drivers/gpu/drm/radeon/si.c WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); rdev 4181 drivers/gpu/drm/radeon/si.c if (radeon_mc_wait_for_idle(rdev)) { rdev 4182 drivers/gpu/drm/radeon/si.c dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); rdev 4184 drivers/gpu/drm/radeon/si.c evergreen_mc_resume(rdev, &save); rdev 4185 drivers/gpu/drm/radeon/si.c if (!ASIC_IS_NODCE(rdev)) { rdev 4188 drivers/gpu/drm/radeon/si.c rv515_vga_render_disable(rdev); rdev 4192 drivers/gpu/drm/radeon/si.c void si_vram_gtt_location(struct radeon_device *rdev, rdev 4197 drivers/gpu/drm/radeon/si.c dev_warn(rdev->dev, "limiting VRAM\n"); rdev 4201 drivers/gpu/drm/radeon/si.c radeon_vram_location(rdev, &rdev->mc, 0); rdev 4202 drivers/gpu/drm/radeon/si.c rdev->mc.gtt_base_align = 0; rdev 4203 drivers/gpu/drm/radeon/si.c radeon_gtt_location(rdev, mc); rdev 4206 drivers/gpu/drm/radeon/si.c static int si_mc_init(struct radeon_device *rdev) rdev 4212 drivers/gpu/drm/radeon/si.c rdev->mc.vram_is_ddr = true; rdev 4252 drivers/gpu/drm/radeon/si.c rdev->mc.vram_width = numchan * chansize; rdev 4254 drivers/gpu/drm/radeon/si.c rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev 4255 drivers/gpu/drm/radeon/si.c rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); rdev 4264 drivers/gpu/drm/radeon/si.c rdev->mc.mc_vram_size = tmp * 1024ULL * 1024ULL; rdev 4265 drivers/gpu/drm/radeon/si.c rdev->mc.real_vram_size = rdev->mc.mc_vram_size; rdev 4266 drivers/gpu/drm/radeon/si.c rdev->mc.visible_vram_size = rdev->mc.aper_size; rdev 4267 drivers/gpu/drm/radeon/si.c si_vram_gtt_location(rdev, &rdev->mc); rdev 4268 drivers/gpu/drm/radeon/si.c radeon_update_bandwidth_info(rdev); rdev 4276 drivers/gpu/drm/radeon/si.c void si_pcie_gart_tlb_flush(struct radeon_device *rdev) rdev 4285 drivers/gpu/drm/radeon/si.c static int si_pcie_gart_enable(struct radeon_device *rdev) rdev 4289 drivers/gpu/drm/radeon/si.c if (rdev->gart.robj == NULL) { rdev 4290 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "No VRAM object for PCIE GART.\n"); rdev 4293 drivers/gpu/drm/radeon/si.c r = radeon_gart_table_vram_pin(rdev); rdev 4316 drivers/gpu/drm/radeon/si.c WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); rdev 4317 drivers/gpu/drm/radeon/si.c WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); rdev 4318 drivers/gpu/drm/radeon/si.c WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); rdev 4320 drivers/gpu/drm/radeon/si.c (u32)(rdev->dummy_page.addr >> 12)); rdev 4332 drivers/gpu/drm/radeon/si.c WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn - 1); rdev 4340 drivers/gpu/drm/radeon/si.c rdev->vm_manager.saved_table_addr[i]); rdev 4343 drivers/gpu/drm/radeon/si.c rdev->vm_manager.saved_table_addr[i]); rdev 4348 drivers/gpu/drm/radeon/si.c (u32)(rdev->dummy_page.addr >> 12)); rdev 4365 drivers/gpu/drm/radeon/si.c si_pcie_gart_tlb_flush(rdev); rdev 4367 drivers/gpu/drm/radeon/si.c (unsigned)(rdev->mc.gtt_size >> 20), rdev 4368 drivers/gpu/drm/radeon/si.c (unsigned long long)rdev->gart.table_addr); rdev 4369 drivers/gpu/drm/radeon/si.c rdev->gart.ready = true; rdev 4373 drivers/gpu/drm/radeon/si.c static void si_pcie_gart_disable(struct radeon_device *rdev) rdev 4383 drivers/gpu/drm/radeon/si.c rdev->vm_manager.saved_table_addr[i] = RREG32(reg); rdev 4400 drivers/gpu/drm/radeon/si.c radeon_gart_table_vram_unpin(rdev); rdev 4403 drivers/gpu/drm/radeon/si.c static void si_pcie_gart_fini(struct radeon_device *rdev) rdev 4405 drivers/gpu/drm/radeon/si.c si_pcie_gart_disable(rdev); rdev 4406 drivers/gpu/drm/radeon/si.c radeon_gart_table_vram_free(rdev); rdev 4407 drivers/gpu/drm/radeon/si.c radeon_gart_fini(rdev); rdev 4457 drivers/gpu/drm/radeon/si.c static int si_vm_packet3_ce_check(struct radeon_device *rdev, rdev 4530 drivers/gpu/drm/radeon/si.c static int si_vm_packet3_gfx_check(struct radeon_device *rdev, rdev 4648 drivers/gpu/drm/radeon/si.c static int si_vm_packet3_compute_check(struct radeon_device *rdev, rdev 4736 drivers/gpu/drm/radeon/si.c int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib) rdev 4749 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "Packet0 not allowed!\n"); rdev 4758 drivers/gpu/drm/radeon/si.c ret = si_vm_packet3_ce_check(rdev, ib->ptr, &pkt); rdev 4762 drivers/gpu/drm/radeon/si.c ret = si_vm_packet3_gfx_check(rdev, ib->ptr, &pkt); rdev 4766 drivers/gpu/drm/radeon/si.c ret = si_vm_packet3_compute_check(rdev, ib->ptr, &pkt); rdev 4769 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "Non-PM4 ring %d !\n", ib->ring); rdev 4777 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "Unknown packet type %d !\n", pkt.type); rdev 4798 drivers/gpu/drm/radeon/si.c int si_vm_init(struct radeon_device *rdev) rdev 4801 drivers/gpu/drm/radeon/si.c rdev->vm_manager.nvm = 16; rdev 4803 drivers/gpu/drm/radeon/si.c rdev->vm_manager.vram_base_offset = 0; rdev 4808 drivers/gpu/drm/radeon/si.c void si_vm_fini(struct radeon_device *rdev) rdev 4821 drivers/gpu/drm/radeon/si.c static void si_vm_decode_fault(struct radeon_device *rdev, rdev 4829 drivers/gpu/drm/radeon/si.c if (rdev->family == CHIP_TAHITI) { rdev 5076 drivers/gpu/drm/radeon/si.c void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 5128 drivers/gpu/drm/radeon/si.c static void si_wait_for_rlc_serdes(struct radeon_device *rdev) rdev 5132 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 5138 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 5145 drivers/gpu/drm/radeon/si.c static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, rdev 5163 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 5171 drivers/gpu/drm/radeon/si.c static void si_set_uvd_dcm(struct radeon_device *rdev, rdev 5192 drivers/gpu/drm/radeon/si.c void si_init_uvd_internal_cg(struct radeon_device *rdev) rdev 5197 drivers/gpu/drm/radeon/si.c si_set_uvd_dcm(rdev, false); rdev 5205 drivers/gpu/drm/radeon/si.c static u32 si_halt_rlc(struct radeon_device *rdev) rdev 5215 drivers/gpu/drm/radeon/si.c si_wait_for_rlc_serdes(rdev); rdev 5221 drivers/gpu/drm/radeon/si.c static void si_update_rlc(struct radeon_device *rdev, u32 rlc) rdev 5230 drivers/gpu/drm/radeon/si.c static void si_enable_dma_pg(struct radeon_device *rdev, bool enable) rdev 5235 drivers/gpu/drm/radeon/si.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_SDMA)) rdev 5243 drivers/gpu/drm/radeon/si.c static void si_init_dma_pg(struct radeon_device *rdev) rdev 5254 drivers/gpu/drm/radeon/si.c static void si_enable_gfx_cgpg(struct radeon_device *rdev, rdev 5259 drivers/gpu/drm/radeon/si.c if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG)) { rdev 5279 drivers/gpu/drm/radeon/si.c static void si_init_gfx_cgpg(struct radeon_device *rdev) rdev 5283 drivers/gpu/drm/radeon/si.c WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); rdev 5289 drivers/gpu/drm/radeon/si.c WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); rdev 5299 drivers/gpu/drm/radeon/si.c static u32 si_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh) rdev 5304 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, se, sh); rdev 5307 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 5314 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->config.si.max_cu_per_sh; i ++) { rdev 5322 drivers/gpu/drm/radeon/si.c static void si_init_ao_cu_mask(struct radeon_device *rdev) rdev 5328 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->config.si.max_shader_engines; i++) { rdev 5329 drivers/gpu/drm/radeon/si.c for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { rdev 5333 drivers/gpu/drm/radeon/si.c for (k = 0; k < rdev->config.si.max_cu_per_sh; k++) { rdev 5334 drivers/gpu/drm/radeon/si.c if (si_get_cu_active_bitmap(rdev, i, j) & mask) { rdev 5355 drivers/gpu/drm/radeon/si.c static void si_enable_cgcg(struct radeon_device *rdev, rdev 5362 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CGCG)) { rdev 5363 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, true); rdev 5367 drivers/gpu/drm/radeon/si.c tmp = si_halt_rlc(rdev); rdev 5373 drivers/gpu/drm/radeon/si.c si_wait_for_rlc_serdes(rdev); rdev 5375 drivers/gpu/drm/radeon/si.c si_update_rlc(rdev, tmp); rdev 5381 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, false); rdev 5395 drivers/gpu/drm/radeon/si.c static void si_enable_mgcg(struct radeon_device *rdev, rdev 5400 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_MGCG)) { rdev 5406 drivers/gpu/drm/radeon/si.c if (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CP_LS) { rdev 5418 drivers/gpu/drm/radeon/si.c tmp = si_halt_rlc(rdev); rdev 5424 drivers/gpu/drm/radeon/si.c si_update_rlc(rdev, tmp); rdev 5441 drivers/gpu/drm/radeon/si.c tmp = si_halt_rlc(rdev); rdev 5447 drivers/gpu/drm/radeon/si.c si_update_rlc(rdev, tmp); rdev 5451 drivers/gpu/drm/radeon/si.c static void si_enable_uvd_mgcg(struct radeon_device *rdev, rdev 5456 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_UVD_MGCG)) { rdev 5496 drivers/gpu/drm/radeon/si.c static void si_enable_mc_ls(struct radeon_device *rdev, rdev 5504 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_MC_LS)) rdev 5513 drivers/gpu/drm/radeon/si.c static void si_enable_mc_mgcg(struct radeon_device *rdev, rdev 5521 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_MC_MGCG)) rdev 5530 drivers/gpu/drm/radeon/si.c static void si_enable_dma_mgcg(struct radeon_device *rdev, rdev 5536 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_SDMA_MGCG)) { rdev 5567 drivers/gpu/drm/radeon/si.c static void si_enable_bif_mgls(struct radeon_device *rdev, rdev 5574 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_BIF_LS)) rdev 5585 drivers/gpu/drm/radeon/si.c static void si_enable_hdp_mgcg(struct radeon_device *rdev, rdev 5592 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_HDP_MGCG)) rdev 5601 drivers/gpu/drm/radeon/si.c static void si_enable_hdp_ls(struct radeon_device *rdev, rdev 5608 drivers/gpu/drm/radeon/si.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_HDP_LS)) rdev 5617 drivers/gpu/drm/radeon/si.c static void si_update_cg(struct radeon_device *rdev, rdev 5621 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, false); rdev 5624 drivers/gpu/drm/radeon/si.c si_enable_mgcg(rdev, true); rdev 5625 drivers/gpu/drm/radeon/si.c si_enable_cgcg(rdev, true); rdev 5627 drivers/gpu/drm/radeon/si.c si_enable_cgcg(rdev, false); rdev 5628 drivers/gpu/drm/radeon/si.c si_enable_mgcg(rdev, false); rdev 5630 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, true); rdev 5634 drivers/gpu/drm/radeon/si.c si_enable_mc_mgcg(rdev, enable); rdev 5635 drivers/gpu/drm/radeon/si.c si_enable_mc_ls(rdev, enable); rdev 5639 drivers/gpu/drm/radeon/si.c si_enable_dma_mgcg(rdev, enable); rdev 5643 drivers/gpu/drm/radeon/si.c si_enable_bif_mgls(rdev, enable); rdev 5647 drivers/gpu/drm/radeon/si.c if (rdev->has_uvd) { rdev 5648 drivers/gpu/drm/radeon/si.c si_enable_uvd_mgcg(rdev, enable); rdev 5653 drivers/gpu/drm/radeon/si.c si_enable_hdp_mgcg(rdev, enable); rdev 5654 drivers/gpu/drm/radeon/si.c si_enable_hdp_ls(rdev, enable); rdev 5658 drivers/gpu/drm/radeon/si.c static void si_init_cg(struct radeon_device *rdev) rdev 5660 drivers/gpu/drm/radeon/si.c si_update_cg(rdev, (RADEON_CG_BLOCK_GFX | rdev 5665 drivers/gpu/drm/radeon/si.c if (rdev->has_uvd) { rdev 5666 drivers/gpu/drm/radeon/si.c si_update_cg(rdev, RADEON_CG_BLOCK_UVD, true); rdev 5667 drivers/gpu/drm/radeon/si.c si_init_uvd_internal_cg(rdev); rdev 5671 drivers/gpu/drm/radeon/si.c static void si_fini_cg(struct radeon_device *rdev) rdev 5673 drivers/gpu/drm/radeon/si.c if (rdev->has_uvd) { rdev 5674 drivers/gpu/drm/radeon/si.c si_update_cg(rdev, RADEON_CG_BLOCK_UVD, false); rdev 5676 drivers/gpu/drm/radeon/si.c si_update_cg(rdev, (RADEON_CG_BLOCK_GFX | rdev 5683 drivers/gpu/drm/radeon/si.c u32 si_get_csb_size(struct radeon_device *rdev) rdev 5689 drivers/gpu/drm/radeon/si.c if (rdev->rlc.cs_data == NULL) rdev 5697 drivers/gpu/drm/radeon/si.c for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { rdev 5715 drivers/gpu/drm/radeon/si.c void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer) rdev 5721 drivers/gpu/drm/radeon/si.c if (rdev->rlc.cs_data == NULL) rdev 5733 drivers/gpu/drm/radeon/si.c for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) { rdev 5749 drivers/gpu/drm/radeon/si.c switch (rdev->family) { rdev 5775 drivers/gpu/drm/radeon/si.c static void si_init_pg(struct radeon_device *rdev) rdev 5777 drivers/gpu/drm/radeon/si.c if (rdev->pg_flags) { rdev 5778 drivers/gpu/drm/radeon/si.c if (rdev->pg_flags & RADEON_PG_SUPPORT_SDMA) { rdev 5779 drivers/gpu/drm/radeon/si.c si_init_dma_pg(rdev); rdev 5781 drivers/gpu/drm/radeon/si.c si_init_ao_cu_mask(rdev); rdev 5782 drivers/gpu/drm/radeon/si.c if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) { rdev 5783 drivers/gpu/drm/radeon/si.c si_init_gfx_cgpg(rdev); rdev 5785 drivers/gpu/drm/radeon/si.c WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); rdev 5786 drivers/gpu/drm/radeon/si.c WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); rdev 5788 drivers/gpu/drm/radeon/si.c si_enable_dma_pg(rdev, true); rdev 5789 drivers/gpu/drm/radeon/si.c si_enable_gfx_cgpg(rdev, true); rdev 5791 drivers/gpu/drm/radeon/si.c WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8); rdev 5792 drivers/gpu/drm/radeon/si.c WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); rdev 5796 drivers/gpu/drm/radeon/si.c static void si_fini_pg(struct radeon_device *rdev) rdev 5798 drivers/gpu/drm/radeon/si.c if (rdev->pg_flags) { rdev 5799 drivers/gpu/drm/radeon/si.c si_enable_dma_pg(rdev, false); rdev 5800 drivers/gpu/drm/radeon/si.c si_enable_gfx_cgpg(rdev, false); rdev 5807 drivers/gpu/drm/radeon/si.c void si_rlc_reset(struct radeon_device *rdev) rdev 5819 drivers/gpu/drm/radeon/si.c static void si_rlc_stop(struct radeon_device *rdev) rdev 5823 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, false); rdev 5825 drivers/gpu/drm/radeon/si.c si_wait_for_rlc_serdes(rdev); rdev 5828 drivers/gpu/drm/radeon/si.c static void si_rlc_start(struct radeon_device *rdev) rdev 5832 drivers/gpu/drm/radeon/si.c si_enable_gui_idle_interrupt(rdev, true); rdev 5837 drivers/gpu/drm/radeon/si.c static bool si_lbpw_supported(struct radeon_device *rdev) rdev 5848 drivers/gpu/drm/radeon/si.c static void si_enable_lbpw(struct radeon_device *rdev, bool enable) rdev 5860 drivers/gpu/drm/radeon/si.c si_select_se_sh(rdev, 0xffffffff, 0xffffffff); rdev 5865 drivers/gpu/drm/radeon/si.c static int si_rlc_resume(struct radeon_device *rdev) rdev 5869 drivers/gpu/drm/radeon/si.c if (!rdev->rlc_fw) rdev 5872 drivers/gpu/drm/radeon/si.c si_rlc_stop(rdev); rdev 5874 drivers/gpu/drm/radeon/si.c si_rlc_reset(rdev); rdev 5876 drivers/gpu/drm/radeon/si.c si_init_pg(rdev); rdev 5878 drivers/gpu/drm/radeon/si.c si_init_cg(rdev); rdev 5890 drivers/gpu/drm/radeon/si.c if (rdev->new_fw) { rdev 5892 drivers/gpu/drm/radeon/si.c (const struct rlc_firmware_header_v1_0 *)rdev->rlc_fw->data; rdev 5895 drivers/gpu/drm/radeon/si.c (rdev->rlc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 5905 drivers/gpu/drm/radeon/si.c (const __be32 *)rdev->rlc_fw->data; rdev 5913 drivers/gpu/drm/radeon/si.c si_enable_lbpw(rdev, si_lbpw_supported(rdev)); rdev 5915 drivers/gpu/drm/radeon/si.c si_rlc_start(rdev); rdev 5920 drivers/gpu/drm/radeon/si.c static void si_enable_interrupts(struct radeon_device *rdev) rdev 5929 drivers/gpu/drm/radeon/si.c rdev->ih.enabled = true; rdev 5932 drivers/gpu/drm/radeon/si.c static void si_disable_interrupts(struct radeon_device *rdev) rdev 5944 drivers/gpu/drm/radeon/si.c rdev->ih.enabled = false; rdev 5945 drivers/gpu/drm/radeon/si.c rdev->ih.rptr = 0; rdev 5948 drivers/gpu/drm/radeon/si.c static void si_disable_interrupt_state(struct radeon_device *rdev) rdev 5964 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->num_crtc; i++) rdev 5966 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->num_crtc; i++) rdev 5969 drivers/gpu/drm/radeon/si.c if (!ASIC_IS_NODCE(rdev)) { rdev 5978 drivers/gpu/drm/radeon/si.c static int si_irq_init(struct radeon_device *rdev) rdev 5985 drivers/gpu/drm/radeon/si.c ret = r600_ih_ring_alloc(rdev); rdev 5990 drivers/gpu/drm/radeon/si.c si_disable_interrupts(rdev); rdev 5993 drivers/gpu/drm/radeon/si.c ret = si_rlc_resume(rdev); rdev 5995 drivers/gpu/drm/radeon/si.c r600_ih_ring_fini(rdev); rdev 6001 drivers/gpu/drm/radeon/si.c WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); rdev 6011 drivers/gpu/drm/radeon/si.c WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8); rdev 6012 drivers/gpu/drm/radeon/si.c rb_bufsz = order_base_2(rdev->ih.ring_size / 4); rdev 6018 drivers/gpu/drm/radeon/si.c if (rdev->wb.enabled) rdev 6022 drivers/gpu/drm/radeon/si.c WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC); rdev 6023 drivers/gpu/drm/radeon/si.c WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF); rdev 6034 drivers/gpu/drm/radeon/si.c if (rdev->msi_enabled) rdev 6039 drivers/gpu/drm/radeon/si.c si_disable_interrupt_state(rdev); rdev 6041 drivers/gpu/drm/radeon/si.c pci_set_master(rdev->pdev); rdev 6044 drivers/gpu/drm/radeon/si.c si_enable_interrupts(rdev); rdev 6050 drivers/gpu/drm/radeon/si.c int si_irq_set(struct radeon_device *rdev) rdev 6059 drivers/gpu/drm/radeon/si.c if (!rdev->irq.installed) { rdev 6064 drivers/gpu/drm/radeon/si.c if (!rdev->ih.enabled) { rdev 6065 drivers/gpu/drm/radeon/si.c si_disable_interrupts(rdev); rdev 6067 drivers/gpu/drm/radeon/si.c si_disable_interrupt_state(rdev); rdev 6081 drivers/gpu/drm/radeon/si.c if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { rdev 6085 drivers/gpu/drm/radeon/si.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP1_INDEX])) { rdev 6089 drivers/gpu/drm/radeon/si.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP2_INDEX])) { rdev 6093 drivers/gpu/drm/radeon/si.c if (atomic_read(&rdev->irq.ring_int[R600_RING_TYPE_DMA_INDEX])) { rdev 6098 drivers/gpu/drm/radeon/si.c if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_DMA1_INDEX])) { rdev 6112 drivers/gpu/drm/radeon/si.c if (rdev->irq.dpm_thermal) { rdev 6117 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->num_crtc; i++) { rdev 6119 drivers/gpu/drm/radeon/si.c rdev, INT_MASK + crtc_offsets[i], VBLANK_INT_MASK, rdev 6120 drivers/gpu/drm/radeon/si.c rdev->irq.crtc_vblank_int[i] || rdev 6121 drivers/gpu/drm/radeon/si.c atomic_read(&rdev->irq.pflip[i]), "vblank", i); rdev 6124 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->num_crtc; i++) rdev 6127 drivers/gpu/drm/radeon/si.c if (!ASIC_IS_NODCE(rdev)) { rdev 6130 drivers/gpu/drm/radeon/si.c rdev, DC_HPDx_INT_CONTROL(i), rdev 6132 drivers/gpu/drm/radeon/si.c rdev->irq.hpd[i], "HPD", i); rdev 6145 drivers/gpu/drm/radeon/si.c static inline void si_irq_ack(struct radeon_device *rdev) rdev 6148 drivers/gpu/drm/radeon/si.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; rdev 6149 drivers/gpu/drm/radeon/si.c u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int; rdev 6151 drivers/gpu/drm/radeon/si.c if (ASIC_IS_NODCE(rdev)) rdev 6156 drivers/gpu/drm/radeon/si.c if (i < rdev->num_crtc) rdev 6161 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->num_crtc; i += 2) { rdev 6189 drivers/gpu/drm/radeon/si.c static void si_irq_disable(struct radeon_device *rdev) rdev 6191 drivers/gpu/drm/radeon/si.c si_disable_interrupts(rdev); rdev 6194 drivers/gpu/drm/radeon/si.c si_irq_ack(rdev); rdev 6195 drivers/gpu/drm/radeon/si.c si_disable_interrupt_state(rdev); rdev 6198 drivers/gpu/drm/radeon/si.c static void si_irq_suspend(struct radeon_device *rdev) rdev 6200 drivers/gpu/drm/radeon/si.c si_irq_disable(rdev); rdev 6201 drivers/gpu/drm/radeon/si.c si_rlc_stop(rdev); rdev 6204 drivers/gpu/drm/radeon/si.c static void si_irq_fini(struct radeon_device *rdev) rdev 6206 drivers/gpu/drm/radeon/si.c si_irq_suspend(rdev); rdev 6207 drivers/gpu/drm/radeon/si.c r600_ih_ring_fini(rdev); rdev 6210 drivers/gpu/drm/radeon/si.c static inline u32 si_get_ih_wptr(struct radeon_device *rdev) rdev 6214 drivers/gpu/drm/radeon/si.c if (rdev->wb.enabled) rdev 6215 drivers/gpu/drm/radeon/si.c wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]); rdev 6225 drivers/gpu/drm/radeon/si.c dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", rdev 6226 drivers/gpu/drm/radeon/si.c wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask); rdev 6227 drivers/gpu/drm/radeon/si.c rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask; rdev 6232 drivers/gpu/drm/radeon/si.c return (wptr & rdev->ih.ptr_mask); rdev 6245 drivers/gpu/drm/radeon/si.c int si_irq_process(struct radeon_device *rdev) rdev 6247 drivers/gpu/drm/radeon/si.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; rdev 6260 drivers/gpu/drm/radeon/si.c if (!rdev->ih.enabled || rdev->shutdown) rdev 6263 drivers/gpu/drm/radeon/si.c wptr = si_get_ih_wptr(rdev); rdev 6267 drivers/gpu/drm/radeon/si.c if (atomic_xchg(&rdev->ih.lock, 1)) rdev 6270 drivers/gpu/drm/radeon/si.c rptr = rdev->ih.rptr; rdev 6277 drivers/gpu/drm/radeon/si.c si_irq_ack(rdev); rdev 6282 drivers/gpu/drm/radeon/si.c src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff; rdev 6283 drivers/gpu/drm/radeon/si.c src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff; rdev 6284 drivers/gpu/drm/radeon/si.c ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) & 0xff; rdev 6299 drivers/gpu/drm/radeon/si.c if (rdev->irq.crtc_vblank_int[crtc_idx]) { rdev 6300 drivers/gpu/drm/radeon/si.c drm_handle_vblank(rdev->ddev, crtc_idx); rdev 6301 drivers/gpu/drm/radeon/si.c rdev->pm.vblank_sync = true; rdev 6302 drivers/gpu/drm/radeon/si.c wake_up(&rdev->irq.vblank_queue); rdev 6304 drivers/gpu/drm/radeon/si.c if (atomic_read(&rdev->irq.pflip[crtc_idx])) { rdev 6305 drivers/gpu/drm/radeon/si.c radeon_crtc_handle_vblank(rdev, rdev 6335 drivers/gpu/drm/radeon/si.c radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1); rdev 6368 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); rdev 6378 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); rdev 6379 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", rdev 6381 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", rdev 6383 drivers/gpu/drm/radeon/si.c si_vm_decode_fault(rdev, status, addr); rdev 6386 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 6389 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX); rdev 6392 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP2_INDEX); rdev 6398 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 6401 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX); rdev 6404 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP2_INDEX); rdev 6410 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, R600_RING_TYPE_DMA_INDEX); rdev 6414 drivers/gpu/drm/radeon/si.c rdev->pm.dpm.thermal.high_to_low = false; rdev 6419 drivers/gpu/drm/radeon/si.c rdev->pm.dpm.thermal.high_to_low = true; rdev 6427 drivers/gpu/drm/radeon/si.c radeon_fence_process(rdev, CAYMAN_RING_TYPE_DMA1_INDEX); rdev 6436 drivers/gpu/drm/radeon/si.c rptr &= rdev->ih.ptr_mask; rdev 6440 drivers/gpu/drm/radeon/si.c schedule_work(&rdev->dp_work); rdev 6442 drivers/gpu/drm/radeon/si.c schedule_delayed_work(&rdev->hotplug_work, 0); rdev 6443 drivers/gpu/drm/radeon/si.c if (queue_thermal && rdev->pm.dpm_enabled) rdev 6444 drivers/gpu/drm/radeon/si.c schedule_work(&rdev->pm.dpm.thermal.work); rdev 6445 drivers/gpu/drm/radeon/si.c rdev->ih.rptr = rptr; rdev 6446 drivers/gpu/drm/radeon/si.c atomic_set(&rdev->ih.lock, 0); rdev 6449 drivers/gpu/drm/radeon/si.c wptr = si_get_ih_wptr(rdev); rdev 6459 drivers/gpu/drm/radeon/si.c static void si_uvd_init(struct radeon_device *rdev) rdev 6463 drivers/gpu/drm/radeon/si.c if (!rdev->has_uvd) rdev 6466 drivers/gpu/drm/radeon/si.c r = radeon_uvd_init(rdev); rdev 6468 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed UVD (%d) init.\n", r); rdev 6475 drivers/gpu/drm/radeon/si.c rdev->has_uvd = 0; rdev 6478 drivers/gpu/drm/radeon/si.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_obj = NULL; rdev 6479 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX], 4096); rdev 6482 drivers/gpu/drm/radeon/si.c static void si_uvd_start(struct radeon_device *rdev) rdev 6486 drivers/gpu/drm/radeon/si.c if (!rdev->has_uvd) rdev 6489 drivers/gpu/drm/radeon/si.c r = uvd_v2_2_resume(rdev); rdev 6491 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed UVD resume (%d).\n", r); rdev 6494 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_UVD_INDEX); rdev 6496 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing UVD fences (%d).\n", r); rdev 6502 drivers/gpu/drm/radeon/si.c rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; rdev 6505 drivers/gpu/drm/radeon/si.c static void si_uvd_resume(struct radeon_device *rdev) rdev 6510 drivers/gpu/drm/radeon/si.c if (!rdev->has_uvd || !rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size) rdev 6513 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 6514 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, PACKET0(UVD_NO_OP, 0)); rdev 6516 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing UVD ring (%d).\n", r); rdev 6519 drivers/gpu/drm/radeon/si.c r = uvd_v1_0_init(rdev); rdev 6521 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing UVD (%d).\n", r); rdev 6526 drivers/gpu/drm/radeon/si.c static void si_vce_init(struct radeon_device *rdev) rdev 6530 drivers/gpu/drm/radeon/si.c if (!rdev->has_vce) rdev 6533 drivers/gpu/drm/radeon/si.c r = radeon_vce_init(rdev); rdev 6535 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed VCE (%d) init.\n", r); rdev 6542 drivers/gpu/drm/radeon/si.c rdev->has_vce = 0; rdev 6545 drivers/gpu/drm/radeon/si.c rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_obj = NULL; rdev 6546 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE1_INDEX], 4096); rdev 6547 drivers/gpu/drm/radeon/si.c rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_obj = NULL; rdev 6548 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE2_INDEX], 4096); rdev 6551 drivers/gpu/drm/radeon/si.c static void si_vce_start(struct radeon_device *rdev) rdev 6555 drivers/gpu/drm/radeon/si.c if (!rdev->has_vce) rdev 6558 drivers/gpu/drm/radeon/si.c r = radeon_vce_resume(rdev); rdev 6560 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed VCE resume (%d).\n", r); rdev 6563 drivers/gpu/drm/radeon/si.c r = vce_v1_0_resume(rdev); rdev 6565 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed VCE resume (%d).\n", r); rdev 6568 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE1_INDEX); rdev 6570 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing VCE1 fences (%d).\n", r); rdev 6573 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE2_INDEX); rdev 6575 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing VCE2 fences (%d).\n", r); rdev 6581 drivers/gpu/drm/radeon/si.c rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size = 0; rdev 6582 drivers/gpu/drm/radeon/si.c rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_size = 0; rdev 6585 drivers/gpu/drm/radeon/si.c static void si_vce_resume(struct radeon_device *rdev) rdev 6590 drivers/gpu/drm/radeon/si.c if (!rdev->has_vce || !rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size) rdev 6593 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; rdev 6594 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, VCE_CMD_NO_OP); rdev 6596 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); rdev 6599 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; rdev 6600 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, 0, VCE_CMD_NO_OP); rdev 6602 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); rdev 6605 drivers/gpu/drm/radeon/si.c r = vce_v1_0_init(rdev); rdev 6607 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing VCE (%d).\n", r); rdev 6612 drivers/gpu/drm/radeon/si.c static int si_startup(struct radeon_device *rdev) rdev 6618 drivers/gpu/drm/radeon/si.c si_pcie_gen3_enable(rdev); rdev 6620 drivers/gpu/drm/radeon/si.c si_program_aspm(rdev); rdev 6623 drivers/gpu/drm/radeon/si.c r = r600_vram_scratch_init(rdev); rdev 6627 drivers/gpu/drm/radeon/si.c si_mc_program(rdev); rdev 6629 drivers/gpu/drm/radeon/si.c if (!rdev->pm.dpm_enabled) { rdev 6630 drivers/gpu/drm/radeon/si.c r = si_mc_load_microcode(rdev); rdev 6637 drivers/gpu/drm/radeon/si.c r = si_pcie_gart_enable(rdev); rdev 6640 drivers/gpu/drm/radeon/si.c si_gpu_init(rdev); rdev 6643 drivers/gpu/drm/radeon/si.c if (rdev->family == CHIP_VERDE) { rdev 6644 drivers/gpu/drm/radeon/si.c rdev->rlc.reg_list = verde_rlc_save_restore_register_list; rdev 6645 drivers/gpu/drm/radeon/si.c rdev->rlc.reg_list_size = rdev 6648 drivers/gpu/drm/radeon/si.c rdev->rlc.cs_data = si_cs_data; rdev 6649 drivers/gpu/drm/radeon/si.c r = sumo_rlc_init(rdev); rdev 6656 drivers/gpu/drm/radeon/si.c r = radeon_wb_init(rdev); rdev 6660 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); rdev 6662 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 6666 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP1_INDEX); rdev 6668 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 6672 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP2_INDEX); rdev 6674 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); rdev 6678 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_DMA_INDEX); rdev 6680 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 6684 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_DMA1_INDEX); rdev 6686 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "failed initializing DMA fences (%d).\n", r); rdev 6690 drivers/gpu/drm/radeon/si.c si_uvd_start(rdev); rdev 6691 drivers/gpu/drm/radeon/si.c si_vce_start(rdev); rdev 6694 drivers/gpu/drm/radeon/si.c if (!rdev->irq.installed) { rdev 6695 drivers/gpu/drm/radeon/si.c r = radeon_irq_kms_init(rdev); rdev 6700 drivers/gpu/drm/radeon/si.c r = si_irq_init(rdev); rdev 6703 drivers/gpu/drm/radeon/si.c radeon_irq_kms_fini(rdev); rdev 6706 drivers/gpu/drm/radeon/si.c si_irq_set(rdev); rdev 6708 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 6709 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, rdev 6714 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 6715 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, rdev 6720 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 6721 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, rdev 6726 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 6727 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, rdev 6732 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 6733 drivers/gpu/drm/radeon/si.c r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, rdev 6738 drivers/gpu/drm/radeon/si.c r = si_cp_load_microcode(rdev); rdev 6741 drivers/gpu/drm/radeon/si.c r = si_cp_resume(rdev); rdev 6745 drivers/gpu/drm/radeon/si.c r = cayman_dma_resume(rdev); rdev 6749 drivers/gpu/drm/radeon/si.c si_uvd_resume(rdev); rdev 6750 drivers/gpu/drm/radeon/si.c si_vce_resume(rdev); rdev 6752 drivers/gpu/drm/radeon/si.c r = radeon_ib_pool_init(rdev); rdev 6754 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "IB initialization failed (%d).\n", r); rdev 6758 drivers/gpu/drm/radeon/si.c r = radeon_vm_manager_init(rdev); rdev 6760 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "vm manager initialization failed (%d).\n", r); rdev 6764 drivers/gpu/drm/radeon/si.c r = radeon_audio_init(rdev); rdev 6771 drivers/gpu/drm/radeon/si.c int si_resume(struct radeon_device *rdev) rdev 6780 drivers/gpu/drm/radeon/si.c atom_asic_init(rdev->mode_info.atom_context); rdev 6783 drivers/gpu/drm/radeon/si.c si_init_golden_registers(rdev); rdev 6785 drivers/gpu/drm/radeon/si.c if (rdev->pm.pm_method == PM_METHOD_DPM) rdev 6786 drivers/gpu/drm/radeon/si.c radeon_pm_resume(rdev); rdev 6788 drivers/gpu/drm/radeon/si.c rdev->accel_working = true; rdev 6789 drivers/gpu/drm/radeon/si.c r = si_startup(rdev); rdev 6792 drivers/gpu/drm/radeon/si.c rdev->accel_working = false; rdev 6800 drivers/gpu/drm/radeon/si.c int si_suspend(struct radeon_device *rdev) rdev 6802 drivers/gpu/drm/radeon/si.c radeon_pm_suspend(rdev); rdev 6803 drivers/gpu/drm/radeon/si.c radeon_audio_fini(rdev); rdev 6804 drivers/gpu/drm/radeon/si.c radeon_vm_manager_fini(rdev); rdev 6805 drivers/gpu/drm/radeon/si.c si_cp_enable(rdev, false); rdev 6806 drivers/gpu/drm/radeon/si.c cayman_dma_stop(rdev); rdev 6807 drivers/gpu/drm/radeon/si.c if (rdev->has_uvd) { rdev 6808 drivers/gpu/drm/radeon/si.c uvd_v1_0_fini(rdev); rdev 6809 drivers/gpu/drm/radeon/si.c radeon_uvd_suspend(rdev); rdev 6811 drivers/gpu/drm/radeon/si.c if (rdev->has_vce) rdev 6812 drivers/gpu/drm/radeon/si.c radeon_vce_suspend(rdev); rdev 6813 drivers/gpu/drm/radeon/si.c si_fini_pg(rdev); rdev 6814 drivers/gpu/drm/radeon/si.c si_fini_cg(rdev); rdev 6815 drivers/gpu/drm/radeon/si.c si_irq_suspend(rdev); rdev 6816 drivers/gpu/drm/radeon/si.c radeon_wb_disable(rdev); rdev 6817 drivers/gpu/drm/radeon/si.c si_pcie_gart_disable(rdev); rdev 6827 drivers/gpu/drm/radeon/si.c int si_init(struct radeon_device *rdev) rdev 6829 drivers/gpu/drm/radeon/si.c struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 6833 drivers/gpu/drm/radeon/si.c if (!radeon_get_bios(rdev)) { rdev 6834 drivers/gpu/drm/radeon/si.c if (ASIC_IS_AVIVO(rdev)) rdev 6838 drivers/gpu/drm/radeon/si.c if (!rdev->is_atom_bios) { rdev 6839 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "Expecting atombios for cayman GPU\n"); rdev 6842 drivers/gpu/drm/radeon/si.c r = radeon_atombios_init(rdev); rdev 6847 drivers/gpu/drm/radeon/si.c if (!radeon_card_posted(rdev)) { rdev 6848 drivers/gpu/drm/radeon/si.c if (!rdev->bios) { rdev 6849 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); rdev 6853 drivers/gpu/drm/radeon/si.c atom_asic_init(rdev->mode_info.atom_context); rdev 6856 drivers/gpu/drm/radeon/si.c si_init_golden_registers(rdev); rdev 6858 drivers/gpu/drm/radeon/si.c si_scratch_init(rdev); rdev 6860 drivers/gpu/drm/radeon/si.c radeon_surface_init(rdev); rdev 6862 drivers/gpu/drm/radeon/si.c radeon_get_clock_info(rdev->ddev); rdev 6865 drivers/gpu/drm/radeon/si.c r = radeon_fence_driver_init(rdev); rdev 6870 drivers/gpu/drm/radeon/si.c r = si_mc_init(rdev); rdev 6874 drivers/gpu/drm/radeon/si.c r = radeon_bo_init(rdev); rdev 6878 drivers/gpu/drm/radeon/si.c if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw || rdev 6879 drivers/gpu/drm/radeon/si.c !rdev->rlc_fw || !rdev->mc_fw) { rdev 6880 drivers/gpu/drm/radeon/si.c r = si_init_microcode(rdev); rdev 6888 drivers/gpu/drm/radeon/si.c radeon_pm_init(rdev); rdev 6890 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; rdev 6892 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, ring, 1024 * 1024); rdev 6894 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; rdev 6896 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, ring, 1024 * 1024); rdev 6898 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; rdev 6900 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, ring, 1024 * 1024); rdev 6902 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; rdev 6904 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, ring, 64 * 1024); rdev 6906 drivers/gpu/drm/radeon/si.c ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; rdev 6908 drivers/gpu/drm/radeon/si.c r600_ring_init(rdev, ring, 64 * 1024); rdev 6910 drivers/gpu/drm/radeon/si.c si_uvd_init(rdev); rdev 6911 drivers/gpu/drm/radeon/si.c si_vce_init(rdev); rdev 6913 drivers/gpu/drm/radeon/si.c rdev->ih.ring_obj = NULL; rdev 6914 drivers/gpu/drm/radeon/si.c r600_ih_ring_init(rdev, 64 * 1024); rdev 6916 drivers/gpu/drm/radeon/si.c r = r600_pcie_gart_init(rdev); rdev 6920 drivers/gpu/drm/radeon/si.c rdev->accel_working = true; rdev 6921 drivers/gpu/drm/radeon/si.c r = si_startup(rdev); rdev 6923 drivers/gpu/drm/radeon/si.c dev_err(rdev->dev, "disabling GPU acceleration\n"); rdev 6924 drivers/gpu/drm/radeon/si.c si_cp_fini(rdev); rdev 6925 drivers/gpu/drm/radeon/si.c cayman_dma_fini(rdev); rdev 6926 drivers/gpu/drm/radeon/si.c si_irq_fini(rdev); rdev 6927 drivers/gpu/drm/radeon/si.c sumo_rlc_fini(rdev); rdev 6928 drivers/gpu/drm/radeon/si.c radeon_wb_fini(rdev); rdev 6929 drivers/gpu/drm/radeon/si.c radeon_ib_pool_fini(rdev); rdev 6930 drivers/gpu/drm/radeon/si.c radeon_vm_manager_fini(rdev); rdev 6931 drivers/gpu/drm/radeon/si.c radeon_irq_kms_fini(rdev); rdev 6932 drivers/gpu/drm/radeon/si.c si_pcie_gart_fini(rdev); rdev 6933 drivers/gpu/drm/radeon/si.c rdev->accel_working = false; rdev 6940 drivers/gpu/drm/radeon/si.c if (!rdev->mc_fw) { rdev 6948 drivers/gpu/drm/radeon/si.c void si_fini(struct radeon_device *rdev) rdev 6950 drivers/gpu/drm/radeon/si.c radeon_pm_fini(rdev); rdev 6951 drivers/gpu/drm/radeon/si.c si_cp_fini(rdev); rdev 6952 drivers/gpu/drm/radeon/si.c cayman_dma_fini(rdev); rdev 6953 drivers/gpu/drm/radeon/si.c si_fini_pg(rdev); rdev 6954 drivers/gpu/drm/radeon/si.c si_fini_cg(rdev); rdev 6955 drivers/gpu/drm/radeon/si.c si_irq_fini(rdev); rdev 6956 drivers/gpu/drm/radeon/si.c sumo_rlc_fini(rdev); rdev 6957 drivers/gpu/drm/radeon/si.c radeon_wb_fini(rdev); rdev 6958 drivers/gpu/drm/radeon/si.c radeon_vm_manager_fini(rdev); rdev 6959 drivers/gpu/drm/radeon/si.c radeon_ib_pool_fini(rdev); rdev 6960 drivers/gpu/drm/radeon/si.c radeon_irq_kms_fini(rdev); rdev 6961 drivers/gpu/drm/radeon/si.c if (rdev->has_uvd) { rdev 6962 drivers/gpu/drm/radeon/si.c uvd_v1_0_fini(rdev); rdev 6963 drivers/gpu/drm/radeon/si.c radeon_uvd_fini(rdev); rdev 6965 drivers/gpu/drm/radeon/si.c if (rdev->has_vce) rdev 6966 drivers/gpu/drm/radeon/si.c radeon_vce_fini(rdev); rdev 6967 drivers/gpu/drm/radeon/si.c si_pcie_gart_fini(rdev); rdev 6968 drivers/gpu/drm/radeon/si.c r600_vram_scratch_fini(rdev); rdev 6969 drivers/gpu/drm/radeon/si.c radeon_gem_fini(rdev); rdev 6970 drivers/gpu/drm/radeon/si.c radeon_fence_driver_fini(rdev); rdev 6971 drivers/gpu/drm/radeon/si.c radeon_bo_fini(rdev); rdev 6972 drivers/gpu/drm/radeon/si.c radeon_atombios_fini(rdev); rdev 6973 drivers/gpu/drm/radeon/si.c kfree(rdev->bios); rdev 6974 drivers/gpu/drm/radeon/si.c rdev->bios = NULL; rdev 6985 drivers/gpu/drm/radeon/si.c uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev) rdev 6989 drivers/gpu/drm/radeon/si.c mutex_lock(&rdev->gpu_clock_mutex); rdev 6993 drivers/gpu/drm/radeon/si.c mutex_unlock(&rdev->gpu_clock_mutex); rdev 6997 drivers/gpu/drm/radeon/si.c int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) rdev 7015 drivers/gpu/drm/radeon/si.c r = radeon_uvd_calc_upll_dividers(rdev, vclk, dclk, 125000, 250000, rdev 7035 drivers/gpu/drm/radeon/si.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 7072 drivers/gpu/drm/radeon/si.c r = radeon_uvd_send_upll_ctlreq(rdev, CG_UPLL_FUNC_CNTL); rdev 7086 drivers/gpu/drm/radeon/si.c static void si_pcie_gen3_enable(struct radeon_device *rdev) rdev 7088 drivers/gpu/drm/radeon/si.c struct pci_dev *root = rdev->pdev->bus->self; rdev 7095 drivers/gpu/drm/radeon/si.c if (pci_is_root_bus(rdev->pdev->bus)) rdev 7101 drivers/gpu/drm/radeon/si.c if (rdev->flags & RADEON_IS_IGP) rdev 7104 drivers/gpu/drm/radeon/si.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 7136 drivers/gpu/drm/radeon/si.c gpu_pos = pci_pcie_cap(rdev->pdev); rdev 7148 drivers/gpu/drm/radeon/si.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); rdev 7154 drivers/gpu/drm/radeon/si.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); rdev 7172 drivers/gpu/drm/radeon/si.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_DEVSTA, &tmp16); rdev 7177 drivers/gpu/drm/radeon/si.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); rdev 7180 drivers/gpu/drm/radeon/si.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &gpu_cfg2); rdev 7198 drivers/gpu/drm/radeon/si.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, &tmp16); rdev 7201 drivers/gpu/drm/radeon/si.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); rdev 7209 drivers/gpu/drm/radeon/si.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); rdev 7212 drivers/gpu/drm/radeon/si.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); rdev 7226 drivers/gpu/drm/radeon/si.c pci_read_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); rdev 7234 drivers/gpu/drm/radeon/si.c pci_write_config_word(rdev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); rdev 7240 drivers/gpu/drm/radeon/si.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 7248 drivers/gpu/drm/radeon/si.c static void si_program_aspm(struct radeon_device *rdev) rdev 7257 drivers/gpu/drm/radeon/si.c if (!(rdev->flags & RADEON_IS_PCIE)) rdev 7315 drivers/gpu/drm/radeon/si.c if ((rdev->family != CHIP_OLAND) && (rdev->family != CHIP_HAINAN)) { rdev 7364 drivers/gpu/drm/radeon/si.c if ((rdev->family == CHIP_OLAND) || (rdev->family == CHIP_HAINAN)) rdev 7371 drivers/gpu/drm/radeon/si.c if ((rdev->family == CHIP_OLAND) || (rdev->family == CHIP_HAINAN)) rdev 7377 drivers/gpu/drm/radeon/si.c !pci_is_root_bus(rdev->pdev->bus)) { rdev 7378 drivers/gpu/drm/radeon/si.c struct pci_dev *root = rdev->pdev->bus->self; rdev 7453 drivers/gpu/drm/radeon/si.c static int si_vce_send_vcepll_ctlreq(struct radeon_device *rdev) rdev 7484 drivers/gpu/drm/radeon/si.c int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) rdev 7505 drivers/gpu/drm/radeon/si.c r = radeon_uvd_calc_upll_dividers(rdev, evclk, ecclk, 125000, 250000, rdev 7528 drivers/gpu/drm/radeon/si.c r = si_vce_send_vcepll_ctlreq(rdev); rdev 7560 drivers/gpu/drm/radeon/si.c r = si_vce_send_vcepll_ctlreq(rdev); rdev 30 drivers/gpu/drm/radeon/si_dma.c u32 si_gpu_check_soft_reset(struct radeon_device *rdev); rdev 41 drivers/gpu/drm/radeon/si_dma.c bool si_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) rdev 43 drivers/gpu/drm/radeon/si_dma.c u32 reset_mask = si_gpu_check_soft_reset(rdev); rdev 52 drivers/gpu/drm/radeon/si_dma.c radeon_ring_lockup_update(rdev, ring); rdev 55 drivers/gpu/drm/radeon/si_dma.c return radeon_ring_test_lockup(rdev, ring); rdev 69 drivers/gpu/drm/radeon/si_dma.c void si_dma_vm_copy_pages(struct radeon_device *rdev, rdev 105 drivers/gpu/drm/radeon/si_dma.c void si_dma_vm_write_pages(struct radeon_device *rdev, rdev 125 drivers/gpu/drm/radeon/si_dma.c value = radeon_vm_map_gart(rdev, addr); rdev 152 drivers/gpu/drm/radeon/si_dma.c void si_dma_vm_set_pages(struct radeon_device *rdev, rdev 187 drivers/gpu/drm/radeon/si_dma.c void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, rdev 231 drivers/gpu/drm/radeon/si_dma.c struct radeon_fence *si_copy_dma(struct radeon_device *rdev, rdev 238 drivers/gpu/drm/radeon/si_dma.c int ring_index = rdev->asic->copy.dma_ring_index; rdev 239 drivers/gpu/drm/radeon/si_dma.c struct radeon_ring *ring = &rdev->ring[ring_index]; rdev 248 drivers/gpu/drm/radeon/si_dma.c r = radeon_ring_lock(rdev, ring, num_loops * 5 + 11); rdev 251 drivers/gpu/drm/radeon/si_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 255 drivers/gpu/drm/radeon/si_dma.c radeon_sync_resv(rdev, &sync, resv, false); rdev 256 drivers/gpu/drm/radeon/si_dma.c radeon_sync_rings(rdev, &sync, ring->idx); rdev 272 drivers/gpu/drm/radeon/si_dma.c r = radeon_fence_emit(rdev, &fence, ring->idx); rdev 274 drivers/gpu/drm/radeon/si_dma.c radeon_ring_unlock_undo(rdev, ring); rdev 275 drivers/gpu/drm/radeon/si_dma.c radeon_sync_free(rdev, &sync, NULL); rdev 279 drivers/gpu/drm/radeon/si_dma.c radeon_ring_unlock_commit(rdev, ring, false); rdev 280 drivers/gpu/drm/radeon/si_dma.c radeon_sync_free(rdev, &sync, fence); rdev 1739 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); rdev 1740 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); rdev 1741 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_get_pi(struct radeon_device *rdev); rdev 1744 drivers/gpu/drm/radeon/si_dpm.c extern int si_mc_load_microcode(struct radeon_device *rdev); rdev 1745 drivers/gpu/drm/radeon/si_dpm.c extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); rdev 1747 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_voltage_value(struct radeon_device *rdev, rdev 1750 drivers/gpu/drm/radeon/si_dpm.c static int si_get_std_voltage_value(struct radeon_device *rdev, rdev 1753 drivers/gpu/drm/radeon/si_dpm.c static int si_write_smc_soft_register(struct radeon_device *rdev, rdev 1755 drivers/gpu/drm/radeon/si_dpm.c static int si_convert_power_level_to_smc(struct radeon_device *rdev, rdev 1758 drivers/gpu/drm/radeon/si_dpm.c static int si_calculate_sclk_params(struct radeon_device *rdev, rdev 1762 drivers/gpu/drm/radeon/si_dpm.c static void si_thermal_start_smc_fan_control(struct radeon_device *rdev); rdev 1763 drivers/gpu/drm/radeon/si_dpm.c static void si_fan_ctrl_set_default_mode(struct radeon_device *rdev); rdev 1765 drivers/gpu/drm/radeon/si_dpm.c static struct si_power_info *si_get_pi(struct radeon_device *rdev) rdev 1767 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *pi = rdev->pm.dpm.priv; rdev 1799 drivers/gpu/drm/radeon/si_dpm.c static void si_calculate_leakage_for_v_and_t(struct radeon_device *rdev, rdev 1827 drivers/gpu/drm/radeon/si_dpm.c static void si_calculate_leakage_for_v(struct radeon_device *rdev, rdev 1838 drivers/gpu/drm/radeon/si_dpm.c static void si_update_dte_from_pl2(struct radeon_device *rdev, rdev 1841 drivers/gpu/drm/radeon/si_dpm.c u32 p_limit1 = rdev->pm.dpm.tdp_limit; rdev 1842 drivers/gpu/drm/radeon/si_dpm.c u32 p_limit2 = rdev->pm.dpm.near_tdp_limit; rdev 1868 drivers/gpu/drm/radeon/si_dpm.c static void si_initialize_powertune_defaults(struct radeon_device *rdev) rdev 1870 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 1871 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 1874 drivers/gpu/drm/radeon/si_dpm.c if (rdev->family == CHIP_TAHITI) { rdev 1881 drivers/gpu/drm/radeon/si_dpm.c switch (rdev->pdev->device) { rdev 1908 drivers/gpu/drm/radeon/si_dpm.c } else if (rdev->family == CHIP_PITCAIRN) { rdev 1909 drivers/gpu/drm/radeon/si_dpm.c switch (rdev->pdev->device) { rdev 1945 drivers/gpu/drm/radeon/si_dpm.c } else if (rdev->family == CHIP_VERDE) { rdev 1950 drivers/gpu/drm/radeon/si_dpm.c switch (rdev->pdev->device) { rdev 1997 drivers/gpu/drm/radeon/si_dpm.c } else if (rdev->family == CHIP_OLAND) { rdev 1998 drivers/gpu/drm/radeon/si_dpm.c switch (rdev->pdev->device) { rdev 2047 drivers/gpu/drm/radeon/si_dpm.c } else if (rdev->family == CHIP_HAINAN) { rdev 2070 drivers/gpu/drm/radeon/si_dpm.c si_update_dte_from_pl2(rdev, &si_pi->dte_data); rdev 2094 drivers/gpu/drm/radeon/si_dpm.c static u32 si_get_smc_power_scaling_factor(struct radeon_device *rdev) rdev 2099 drivers/gpu/drm/radeon/si_dpm.c static u32 si_calculate_cac_wintime(struct radeon_device *rdev) rdev 2106 drivers/gpu/drm/radeon/si_dpm.c xclk = radeon_get_xclk(rdev); rdev 2124 drivers/gpu/drm/radeon/si_dpm.c static int si_calculate_adjusted_tdp_limits(struct radeon_device *rdev, rdev 2132 drivers/gpu/drm/radeon/si_dpm.c if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit) rdev 2135 drivers/gpu/drm/radeon/si_dpm.c max_tdp_limit = ((100 + 100) * rdev->pm.dpm.tdp_limit) / 100; rdev 2138 drivers/gpu/drm/radeon/si_dpm.c *tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; rdev 2139 drivers/gpu/drm/radeon/si_dpm.c *near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - rdev->pm.dpm.tdp_limit); rdev 2141 drivers/gpu/drm/radeon/si_dpm.c *tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; rdev 2142 drivers/gpu/drm/radeon/si_dpm.c adjustment_delta = rdev->pm.dpm.tdp_limit - *tdp_limit; rdev 2143 drivers/gpu/drm/radeon/si_dpm.c if (adjustment_delta < rdev->pm.dpm.near_tdp_limit_adjusted) rdev 2144 drivers/gpu/drm/radeon/si_dpm.c *near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted - adjustment_delta; rdev 2157 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_smc_tdp_limits(struct radeon_device *rdev, rdev 2160 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2161 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2166 drivers/gpu/drm/radeon/si_dpm.c struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table; rdev 2167 drivers/gpu/drm/radeon/si_dpm.c u32 scaling_factor = si_get_smc_power_scaling_factor(rdev); rdev 2177 drivers/gpu/drm/radeon/si_dpm.c ret = si_calculate_adjusted_tdp_limits(rdev, rdev 2179 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.tdp_adjustment, rdev 2192 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, rdev 2211 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, si_pi->papm_cfg_table_start, rdev 2222 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_smc_tdp_limits_2(struct radeon_device *rdev, rdev 2225 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2226 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2230 drivers/gpu/drm/radeon/si_dpm.c u32 scaling_factor = si_get_smc_power_scaling_factor(rdev); rdev 2236 drivers/gpu/drm/radeon/si_dpm.c cpu_to_be32(si_scale_power_for_smc(rdev->pm.dpm.near_tdp_limit_adjusted, scaling_factor) * 1000); rdev 2238 drivers/gpu/drm/radeon/si_dpm.c cpu_to_be32(si_scale_power_for_smc((rdev->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000); rdev 2240 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, rdev 2254 drivers/gpu/drm/radeon/si_dpm.c static u16 si_calculate_power_efficiency_ratio(struct radeon_device *rdev, rdev 2276 drivers/gpu/drm/radeon/si_dpm.c static bool si_should_disable_uvd_powertune(struct radeon_device *rdev, rdev 2279 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2288 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_power_containment_values(struct radeon_device *rdev, rdev 2292 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 2293 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2316 drivers/gpu/drm/radeon/si_dpm.c disable_uvd_power_tune = si_should_disable_uvd_powertune(rdev, radeon_state); rdev 2351 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 2356 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, &vddc, &prev_std_vddc); rdev 2360 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 2365 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, &vddc, &curr_std_vddc); rdev 2369 drivers/gpu/drm/radeon/si_dpm.c pwr_efficiency_ratio = si_calculate_power_efficiency_ratio(rdev, rdev 2382 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_sq_ramping_values(struct radeon_device *rdev, rdev 2386 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2398 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.sq_ramping_threshold == 0) rdev 2420 drivers/gpu/drm/radeon/si_dpm.c if ((state->performance_levels[i].sclk >= rdev->pm.dpm.sq_ramping_threshold) && rdev 2439 drivers/gpu/drm/radeon/si_dpm.c static int si_enable_power_containment(struct radeon_device *rdev, rdev 2443 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2449 drivers/gpu/drm/radeon/si_dpm.c if (!si_should_disable_uvd_powertune(rdev, radeon_new_state)) { rdev 2450 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_TDPClampingActive); rdev 2459 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_TDPClampingInactive); rdev 2469 drivers/gpu/drm/radeon/si_dpm.c static int si_initialize_smc_dte_tables(struct radeon_device *rdev) rdev 2471 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2527 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, si_pi->dte_table_start, (u8 *)dte_tables, rdev 2534 drivers/gpu/drm/radeon/si_dpm.c static int si_get_cac_std_voltage_max_min(struct radeon_device *rdev, rdev 2537 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2539 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.cac_leakage_table; rdev 2579 drivers/gpu/drm/radeon/si_dpm.c static int si_init_dte_leakage_table(struct radeon_device *rdev, rdev 2584 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2592 drivers/gpu/drm/radeon/si_dpm.c scaling_factor = si_get_smc_power_scaling_factor(rdev); rdev 2600 drivers/gpu/drm/radeon/si_dpm.c si_calculate_leakage_for_v_and_t(rdev, rdev 2619 drivers/gpu/drm/radeon/si_dpm.c static int si_init_simplified_leakage_table(struct radeon_device *rdev, rdev 2623 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2630 drivers/gpu/drm/radeon/si_dpm.c scaling_factor = si_get_smc_power_scaling_factor(rdev); rdev 2635 drivers/gpu/drm/radeon/si_dpm.c si_calculate_leakage_for_v(rdev, rdev 2654 drivers/gpu/drm/radeon/si_dpm.c static int si_initialize_smc_cac_tables(struct radeon_device *rdev) rdev 2656 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2657 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2663 drivers/gpu/drm/radeon/si_dpm.c u32 ticks_per_us = radeon_get_xclk(rdev) / 100; rdev 2676 drivers/gpu/drm/radeon/si_dpm.c si_pi->dyn_powertune_data.cac_leakage = rdev->pm.dpm.cac_leakage; rdev 2679 drivers/gpu/drm/radeon/si_dpm.c si_pi->dyn_powertune_data.wintime = si_calculate_cac_wintime(rdev); rdev 2684 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_cac_std_voltage_max_min(rdev, &vddc_max, &vddc_min); rdev 2694 drivers/gpu/drm/radeon/si_dpm.c ret = si_init_dte_leakage_table(rdev, cac_tables, rdev 2698 drivers/gpu/drm/radeon/si_dpm.c ret = si_init_simplified_leakage_table(rdev, cac_tables, rdev 2703 drivers/gpu/drm/radeon/si_dpm.c load_line_slope = ((u32)rdev->pm.dpm.load_line_slope << SMC_SISLANDS_SCALE_R) / 100; rdev 2719 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, si_pi->cac_table_start, (u8 *)cac_tables, rdev 2725 drivers/gpu/drm/radeon/si_dpm.c ret = si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_ticks_per_us, ticks_per_us); rdev 2738 drivers/gpu/drm/radeon/si_dpm.c static int si_program_cac_config_registers(struct radeon_device *rdev, rdev 2777 drivers/gpu/drm/radeon/si_dpm.c static int si_initialize_hardware_cac_manager(struct radeon_device *rdev) rdev 2779 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2780 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2787 drivers/gpu/drm/radeon/si_dpm.c ret = si_program_cac_config_registers(rdev, si_pi->lcac_config); rdev 2790 drivers/gpu/drm/radeon/si_dpm.c ret = si_program_cac_config_registers(rdev, si_pi->cac_override); rdev 2793 drivers/gpu/drm/radeon/si_dpm.c ret = si_program_cac_config_registers(rdev, si_pi->cac_weights); rdev 2800 drivers/gpu/drm/radeon/si_dpm.c static int si_enable_smc_cac(struct radeon_device *rdev, rdev 2804 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2805 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2811 drivers/gpu/drm/radeon/si_dpm.c if (!si_should_disable_uvd_powertune(rdev, radeon_new_state)) { rdev 2813 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_CACLongTermAvgEnable); rdev 2818 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_MSG_EnableCac); rdev 2827 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_MSG_EnableDTE); rdev 2834 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_MSG_DisableDTE); rdev 2836 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_MSG_DisableCac); rdev 2841 drivers/gpu/drm/radeon/si_dpm.c smc_result = si_send_msg_to_smc(rdev, PPSMC_CACLongTermAvgDisable); rdev 2847 drivers/gpu/drm/radeon/si_dpm.c static int si_init_smc_spll_table(struct radeon_device *rdev) rdev 2849 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 2850 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2868 drivers/gpu/drm/radeon/si_dpm.c ret = si_calculate_sclk_params(rdev, sclk, &sclk_params); rdev 2906 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, si_pi->spll_table_start, rdev 2918 drivers/gpu/drm/radeon/si_dpm.c static u16 si_get_lower_of_leakage_and_vce_voltage(struct radeon_device *rdev, rdev 2922 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 2936 drivers/gpu/drm/radeon/si_dpm.c static int si_get_vce_clock_voltage(struct radeon_device *rdev, rdev 2942 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; rdev 2963 drivers/gpu/drm/radeon/si_dpm.c *voltage = si_get_lower_of_leakage_and_vce_voltage(rdev, *voltage); rdev 2968 drivers/gpu/drm/radeon/si_dpm.c static void si_apply_state_adjust_rules(struct radeon_device *rdev, rdev 2981 drivers/gpu/drm/radeon/si_dpm.c if (rdev->family == CHIP_HAINAN) { rdev 2982 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pdev->revision == 0x81) || rdev 2983 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->revision == 0x83) || rdev 2984 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->revision == 0xC3) || rdev 2985 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->device == 0x6664) || rdev 2986 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->device == 0x6665) || rdev 2987 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->device == 0x6667)) { rdev 2990 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pdev->revision == 0xC3) || rdev 2991 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->device == 0x6665)) { rdev 2995 drivers/gpu/drm/radeon/si_dpm.c } else if (rdev->family == CHIP_OLAND) { rdev 2996 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pdev->revision == 0xC7) || rdev 2997 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->revision == 0x80) || rdev 2998 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->revision == 0x81) || rdev 2999 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->revision == 0x83) || rdev 3000 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->revision == 0x87) || rdev 3001 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->device == 0x6604) || rdev 3002 drivers/gpu/drm/radeon/si_dpm.c (rdev->pdev->device == 0x6605)) { rdev 3008 drivers/gpu/drm/radeon/si_dpm.c rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; rdev 3009 drivers/gpu/drm/radeon/si_dpm.c rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; rdev 3010 drivers/gpu/drm/radeon/si_dpm.c si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, rdev 3017 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pm.dpm.new_active_crtc_count > 1) || rdev 3018 drivers/gpu/drm/radeon/si_dpm.c ni_dpm_vblank_too_short(rdev)) rdev 3026 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.ac_power) rdev 3027 drivers/gpu/drm/radeon/si_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 3029 drivers/gpu/drm/radeon/si_dpm.c max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; rdev 3035 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.ac_power == false) { rdev 3049 drivers/gpu/drm/radeon/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 3051 drivers/gpu/drm/radeon/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 3053 drivers/gpu/drm/radeon/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 3098 drivers/gpu/drm/radeon/si_dpm.c if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) rdev 3099 drivers/gpu/drm/radeon/si_dpm.c sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; rdev 3100 drivers/gpu/drm/radeon/si_dpm.c if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) rdev 3101 drivers/gpu/drm/radeon/si_dpm.c mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; rdev 3149 drivers/gpu/drm/radeon/si_dpm.c btc_adjust_clock_combinations(rdev, max_limits, rdev 3155 drivers/gpu/drm/radeon/si_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, rdev 3158 drivers/gpu/drm/radeon/si_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 3161 drivers/gpu/drm/radeon/si_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 3164 drivers/gpu/drm/radeon/si_dpm.c btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, rdev 3165 drivers/gpu/drm/radeon/si_dpm.c rdev->clock.current_dispclk, rdev 3170 drivers/gpu/drm/radeon/si_dpm.c btc_apply_voltage_delta_rules(rdev, rdev 3178 drivers/gpu/drm/radeon/si_dpm.c if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) rdev 3184 drivers/gpu/drm/radeon/si_dpm.c static int si_read_smc_soft_register(struct radeon_device *rdev, rdev 3187 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3189 drivers/gpu/drm/radeon/si_dpm.c return si_read_smc_sram_dword(rdev, rdev 3195 drivers/gpu/drm/radeon/si_dpm.c static int si_write_smc_soft_register(struct radeon_device *rdev, rdev 3198 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3200 drivers/gpu/drm/radeon/si_dpm.c return si_write_smc_sram_dword(rdev, rdev 3205 drivers/gpu/drm/radeon/si_dpm.c static bool si_is_special_1gb_platform(struct radeon_device *rdev) rdev 3226 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pdev->device == 0x6819) && rdev 3233 drivers/gpu/drm/radeon/si_dpm.c static void si_get_leakage_vddc(struct radeon_device *rdev) rdev 3235 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3240 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_leakage_vddc_based_on_leakage_idx(rdev, &vddc, SISLANDS_LEAKAGE_INDEX0 + i); rdev 3252 drivers/gpu/drm/radeon/si_dpm.c static int si_get_leakage_voltage_from_leakage_index(struct radeon_device *rdev, rdev 3255 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3279 drivers/gpu/drm/radeon/si_dpm.c static void si_set_dpm_event_sources(struct radeon_device *rdev, u32 sources) rdev 3281 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3314 drivers/gpu/drm/radeon/si_dpm.c static void si_enable_auto_throttle_source(struct radeon_device *rdev, rdev 3318 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3323 drivers/gpu/drm/radeon/si_dpm.c si_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 3328 drivers/gpu/drm/radeon/si_dpm.c si_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); rdev 3333 drivers/gpu/drm/radeon/si_dpm.c static void si_start_dpm(struct radeon_device *rdev) rdev 3338 drivers/gpu/drm/radeon/si_dpm.c static void si_stop_dpm(struct radeon_device *rdev) rdev 3343 drivers/gpu/drm/radeon/si_dpm.c static void si_enable_sclk_control(struct radeon_device *rdev, bool enable) rdev 3353 drivers/gpu/drm/radeon/si_dpm.c static int si_notify_hardware_of_thermal_state(struct radeon_device *rdev, rdev 3359 drivers/gpu/drm/radeon/si_dpm.c ret = si_send_msg_to_smc(rdev, PPSMC_MSG_EnableThermalInterrupt); rdev 3368 drivers/gpu/drm/radeon/si_dpm.c static void si_notify_hardware_vpu_recovery_event(struct radeon_device *rdev) rdev 3370 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_tdr_is_about_to_happen, true); rdev 3375 drivers/gpu/drm/radeon/si_dpm.c static int si_notify_hw_of_powersource(struct radeon_device *rdev, bool ac_power) rdev 3378 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_RunningOnAC) == PPSMC_Result_OK) ? rdev 3385 drivers/gpu/drm/radeon/si_dpm.c static PPSMC_Result si_send_msg_to_smc_with_parameter(struct radeon_device *rdev, rdev 3389 drivers/gpu/drm/radeon/si_dpm.c return si_send_msg_to_smc(rdev, msg); rdev 3392 drivers/gpu/drm/radeon/si_dpm.c static int si_restrict_performance_levels_before_switch(struct radeon_device *rdev) rdev 3394 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc(rdev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK) rdev 3397 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 1) == PPSMC_Result_OK) ? rdev 3401 drivers/gpu/drm/radeon/si_dpm.c int si_dpm_force_performance_level(struct radeon_device *rdev, rdev 3404 drivers/gpu/drm/radeon/si_dpm.c struct radeon_ps *rps = rdev->pm.dpm.current_ps; rdev 3409 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK) rdev 3412 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 1) != PPSMC_Result_OK) rdev 3415 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) rdev 3418 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 1) != PPSMC_Result_OK) rdev 3421 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) rdev 3424 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK) rdev 3428 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.forced_level = level; rdev 3434 drivers/gpu/drm/radeon/si_dpm.c static int si_set_boot_state(struct radeon_device *rdev) rdev 3436 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToInitialState) == PPSMC_Result_OK) ? rdev 3441 drivers/gpu/drm/radeon/si_dpm.c static int si_set_sw_state(struct radeon_device *rdev) rdev 3443 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToSwState) == PPSMC_Result_OK) ? rdev 3447 drivers/gpu/drm/radeon/si_dpm.c static int si_halt_smc(struct radeon_device *rdev) rdev 3449 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc(rdev, PPSMC_MSG_Halt) != PPSMC_Result_OK) rdev 3452 drivers/gpu/drm/radeon/si_dpm.c return (si_wait_for_smc_inactive(rdev) == PPSMC_Result_OK) ? rdev 3456 drivers/gpu/drm/radeon/si_dpm.c static int si_resume_smc(struct radeon_device *rdev) rdev 3458 drivers/gpu/drm/radeon/si_dpm.c if (si_send_msg_to_smc(rdev, PPSMC_FlushDataCache) != PPSMC_Result_OK) rdev 3461 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_Resume) == PPSMC_Result_OK) ? rdev 3465 drivers/gpu/drm/radeon/si_dpm.c static void si_dpm_start_smc(struct radeon_device *rdev) rdev 3467 drivers/gpu/drm/radeon/si_dpm.c si_program_jump_on_start(rdev); rdev 3468 drivers/gpu/drm/radeon/si_dpm.c si_start_smc(rdev); rdev 3469 drivers/gpu/drm/radeon/si_dpm.c si_start_smc_clock(rdev); rdev 3472 drivers/gpu/drm/radeon/si_dpm.c static void si_dpm_stop_smc(struct radeon_device *rdev) rdev 3474 drivers/gpu/drm/radeon/si_dpm.c si_reset_smc(rdev); rdev 3475 drivers/gpu/drm/radeon/si_dpm.c si_stop_smc_clock(rdev); rdev 3478 drivers/gpu/drm/radeon/si_dpm.c static int si_process_firmware_header(struct radeon_device *rdev) rdev 3480 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3484 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3493 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3502 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3511 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3520 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3529 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3538 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3547 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3556 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, rdev 3568 drivers/gpu/drm/radeon/si_dpm.c static void si_read_clock_registers(struct radeon_device *rdev) rdev 3570 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3589 drivers/gpu/drm/radeon/si_dpm.c static void si_enable_thermal_protection(struct radeon_device *rdev, rdev 3598 drivers/gpu/drm/radeon/si_dpm.c static void si_enable_acpi_power_management(struct radeon_device *rdev) rdev 3604 drivers/gpu/drm/radeon/si_dpm.c static int si_enter_ulp_state(struct radeon_device *rdev) rdev 3613 drivers/gpu/drm/radeon/si_dpm.c static int si_exit_ulp_state(struct radeon_device *rdev) rdev 3621 drivers/gpu/drm/radeon/si_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 3631 drivers/gpu/drm/radeon/si_dpm.c static int si_notify_smc_display_change(struct radeon_device *rdev, rdev 3637 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, msg) == PPSMC_Result_OK) ? rdev 3641 drivers/gpu/drm/radeon/si_dpm.c static void si_program_response_times(struct radeon_device *rdev) rdev 3647 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_mvdd_chg_time, 1); rdev 3649 drivers/gpu/drm/radeon/si_dpm.c voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time; rdev 3650 drivers/gpu/drm/radeon/si_dpm.c backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time; rdev 3658 drivers/gpu/drm/radeon/si_dpm.c reference_clock = radeon_get_xclk(rdev); rdev 3664 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_delay_vreg, vddc_dly); rdev 3665 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_delay_acpi, acpi_dly); rdev 3666 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_mclk_chg_timeout, vbi_dly); rdev 3667 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_mc_block_delay, 0xAA); rdev 3670 drivers/gpu/drm/radeon/si_dpm.c static void si_program_ds_registers(struct radeon_device *rdev) rdev 3672 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3682 drivers/gpu/drm/radeon/si_dpm.c static void si_program_display_gap(struct radeon_device *rdev) rdev 3688 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.new_active_crtc_count > 0) rdev 3693 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.new_active_crtc_count > 1) rdev 3703 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pm.dpm.new_active_crtc_count > 0) && rdev 3704 drivers/gpu/drm/radeon/si_dpm.c (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) { rdev 3706 drivers/gpu/drm/radeon/si_dpm.c for (i = 0; i < rdev->num_crtc; i++) { rdev 3707 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.new_active_crtcs & (1 << i)) rdev 3710 drivers/gpu/drm/radeon/si_dpm.c if (i == rdev->num_crtc) rdev 3724 drivers/gpu/drm/radeon/si_dpm.c si_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0); rdev 3727 drivers/gpu/drm/radeon/si_dpm.c static void si_enable_spread_spectrum(struct radeon_device *rdev, bool enable) rdev 3729 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3740 drivers/gpu/drm/radeon/si_dpm.c static void si_setup_bsp(struct radeon_device *rdev) rdev 3742 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3743 drivers/gpu/drm/radeon/si_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 3764 drivers/gpu/drm/radeon/si_dpm.c static void si_program_git(struct radeon_device *rdev) rdev 3769 drivers/gpu/drm/radeon/si_dpm.c static void si_program_tp(struct radeon_device *rdev) rdev 3789 drivers/gpu/drm/radeon/si_dpm.c static void si_program_tpp(struct radeon_device *rdev) rdev 3794 drivers/gpu/drm/radeon/si_dpm.c static void si_program_sstp(struct radeon_device *rdev) rdev 3799 drivers/gpu/drm/radeon/si_dpm.c static void si_enable_display_gap(struct radeon_device *rdev) rdev 3813 drivers/gpu/drm/radeon/si_dpm.c static void si_program_vc(struct radeon_device *rdev) rdev 3815 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3820 drivers/gpu/drm/radeon/si_dpm.c static void si_clear_vc(struct radeon_device *rdev) rdev 3860 drivers/gpu/drm/radeon/si_dpm.c static u8 si_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk) rdev 3862 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3880 drivers/gpu/drm/radeon/si_dpm.c static int si_upload_firmware(struct radeon_device *rdev) rdev 3882 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3885 drivers/gpu/drm/radeon/si_dpm.c si_reset_smc(rdev); rdev 3886 drivers/gpu/drm/radeon/si_dpm.c si_stop_smc_clock(rdev); rdev 3888 drivers/gpu/drm/radeon/si_dpm.c ret = si_load_smc_ucode(rdev, si_pi->sram_end); rdev 3893 drivers/gpu/drm/radeon/si_dpm.c static bool si_validate_phase_shedding_tables(struct radeon_device *rdev, rdev 3920 drivers/gpu/drm/radeon/si_dpm.c void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev, rdev 3937 drivers/gpu/drm/radeon/si_dpm.c static int si_get_svi2_voltage_table(struct radeon_device *rdev, rdev 3958 drivers/gpu/drm/radeon/si_dpm.c static int si_construct_voltage_tables(struct radeon_device *rdev) rdev 3960 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 3961 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 3962 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 3966 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_VDDC, rdev 3972 drivers/gpu/drm/radeon/si_dpm.c si_trim_voltage_table_to_fit_state_table(rdev, rdev 3976 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_svi2_voltage_table(rdev, rdev 3977 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, rdev 3986 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_VDDCI, rdev 3992 drivers/gpu/drm/radeon/si_dpm.c si_trim_voltage_table_to_fit_state_table(rdev, rdev 3997 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_svi2_voltage_table(rdev, rdev 3998 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, rdev 4005 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_MVDDC, rdev 4019 drivers/gpu/drm/radeon/si_dpm.c si_trim_voltage_table_to_fit_state_table(rdev, rdev 4025 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_voltage_table(rdev, VOLTAGE_TYPE_VDDC, rdev 4038 drivers/gpu/drm/radeon/si_dpm.c static void si_populate_smc_voltage_table(struct radeon_device *rdev, rdev 4048 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_smc_voltage_tables(struct radeon_device *rdev, rdev 4051 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4052 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4053 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4057 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc, rdev 4059 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd, rdev 4061 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_svi_rework_plat_type, rdev 4065 drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table); rdev 4078 drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table); rdev 4086 drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_table(rdev, &si_pi->mvdd_voltage_table, table); rdev 4093 drivers/gpu/drm/radeon/si_dpm.c if (si_validate_phase_shedding_tables(rdev, &si_pi->vddc_phase_shed_table, rdev 4094 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) { rdev 4095 drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table); rdev 4100 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay, rdev 4111 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_voltage_value(struct radeon_device *rdev, rdev 4131 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, rdev 4134 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4135 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4148 drivers/gpu/drm/radeon/si_dpm.c static int si_get_std_voltage_value(struct radeon_device *rdev, rdev 4156 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries) { rdev 4157 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE) { rdev 4158 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL) rdev 4161 drivers/gpu/drm/radeon/si_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { rdev 4163 drivers/gpu/drm/radeon/si_dpm.c (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { rdev 4165 drivers/gpu/drm/radeon/si_dpm.c if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count) rdev 4167 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; rdev 4170 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; rdev 4176 drivers/gpu/drm/radeon/si_dpm.c for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { rdev 4178 drivers/gpu/drm/radeon/si_dpm.c (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { rdev 4180 drivers/gpu/drm/radeon/si_dpm.c if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count) rdev 4182 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; rdev 4185 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; rdev 4191 drivers/gpu/drm/radeon/si_dpm.c if ((u32)voltage->index < rdev->pm.dpm.dyn_state.cac_leakage_table.count) rdev 4192 drivers/gpu/drm/radeon/si_dpm.c *std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc; rdev 4199 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_std_voltage_value(struct radeon_device *rdev, rdev 4209 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_phase_shedding_value(struct radeon_device *rdev, rdev 4228 drivers/gpu/drm/radeon/si_dpm.c static int si_init_arb_table_index(struct radeon_device *rdev) rdev 4230 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4234 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, si_pi->arb_table_start, &tmp, si_pi->sram_end); rdev 4241 drivers/gpu/drm/radeon/si_dpm.c return si_write_smc_sram_dword(rdev, si_pi->arb_table_start, tmp, si_pi->sram_end); rdev 4244 drivers/gpu/drm/radeon/si_dpm.c static int si_initial_switch_from_arb_f0_to_f1(struct radeon_device *rdev) rdev 4246 drivers/gpu/drm/radeon/si_dpm.c return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); rdev 4249 drivers/gpu/drm/radeon/si_dpm.c static int si_reset_to_default(struct radeon_device *rdev) rdev 4251 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_ResetToDefaults) == PPSMC_Result_OK) ? rdev 4255 drivers/gpu/drm/radeon/si_dpm.c static int si_force_switch_to_arb_f0(struct radeon_device *rdev) rdev 4257 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4261 drivers/gpu/drm/radeon/si_dpm.c ret = si_read_smc_sram_dword(rdev, si_pi->arb_table_start, rdev 4271 drivers/gpu/drm/radeon/si_dpm.c return ni_copy_and_switch_arb_sets(rdev, tmp, MC_CG_ARB_FREQ_F0); rdev 4274 drivers/gpu/drm/radeon/si_dpm.c static u32 si_calculate_memory_refresh_rate(struct radeon_device *rdev, rdev 4293 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_memory_timing_parameters(struct radeon_device *rdev, rdev 4302 drivers/gpu/drm/radeon/si_dpm.c (u8)si_calculate_memory_refresh_rate(rdev, pl->sclk); rdev 4304 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_set_engine_dram_timings(rdev, rdev 4319 drivers/gpu/drm/radeon/si_dpm.c static int si_do_program_memory_timing_parameters(struct radeon_device *rdev, rdev 4323 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4329 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_memory_timing_parameters(rdev, &state->performance_levels[i], &arb_regs); rdev 4332 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, rdev 4346 drivers/gpu/drm/radeon/si_dpm.c static int si_program_memory_timing_parameters(struct radeon_device *rdev, rdev 4349 drivers/gpu/drm/radeon/si_dpm.c return si_do_program_memory_timing_parameters(rdev, radeon_new_state, rdev 4353 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_initial_mvdd_value(struct radeon_device *rdev, rdev 4356 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4357 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4360 drivers/gpu/drm/radeon/si_dpm.c return si_populate_voltage_value(rdev, &si_pi->mvdd_voltage_table, rdev 4366 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_smc_initial_state(struct radeon_device *rdev, rdev 4371 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4372 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4373 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4420 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 4427 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, rdev 4431 drivers/gpu/drm/radeon/si_dpm.c si_populate_std_voltage_value(rdev, std_vddc, rdev 4437 drivers/gpu/drm/radeon/si_dpm.c si_populate_voltage_value(rdev, rdev 4443 drivers/gpu/drm/radeon/si_dpm.c si_populate_phase_shedding_value(rdev, rdev 4444 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, rdev 4450 drivers/gpu/drm/radeon/si_dpm.c si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); rdev 4461 drivers/gpu/drm/radeon/si_dpm.c si_get_strobe_mode_settings(rdev, rdev 4489 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_smc_acpi_state(struct radeon_device *rdev, rdev 4492 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4493 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4494 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4514 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 4519 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, rdev 4522 drivers/gpu/drm/radeon/si_dpm.c si_populate_std_voltage_value(rdev, std_vddc, rdev 4529 drivers/gpu/drm/radeon/si_dpm.c si_populate_phase_shedding_value(rdev, rdev 4530 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, rdev 4537 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table, rdev 4542 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, rdev 4546 drivers/gpu/drm/radeon/si_dpm.c si_populate_std_voltage_value(rdev, std_vddc, rdev 4550 drivers/gpu/drm/radeon/si_dpm.c table->ACPIState.levels[0].gen2PCIE = (u8)r600_get_pcie_gen_support(rdev, rdev 4556 drivers/gpu/drm/radeon/si_dpm.c si_populate_phase_shedding_value(rdev, rdev 4557 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, rdev 4566 drivers/gpu/drm/radeon/si_dpm.c si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table, rdev 4610 drivers/gpu/drm/radeon/si_dpm.c si_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); rdev 4630 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_ulv_state(struct radeon_device *rdev, rdev 4633 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4634 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4639 drivers/gpu/drm/radeon/si_dpm.c ret = si_convert_power_level_to_smc(rdev, &ulv->pl, rdev 4661 drivers/gpu/drm/radeon/si_dpm.c static int si_program_ulv_memory_timing_parameters(struct radeon_device *rdev) rdev 4663 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4668 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_memory_timing_parameters(rdev, &ulv->pl, rdev 4673 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_ulv_volt_change_delay, rdev 4676 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, rdev 4687 drivers/gpu/drm/radeon/si_dpm.c static void si_get_mvdd_configuration(struct radeon_device *rdev) rdev 4689 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4694 drivers/gpu/drm/radeon/si_dpm.c static int si_init_smc_table(struct radeon_device *rdev) rdev 4696 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4697 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4698 drivers/gpu/drm/radeon/si_dpm.c struct radeon_ps *radeon_boot_state = rdev->pm.dpm.boot_ps; rdev 4705 drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_tables(rdev, table); rdev 4707 drivers/gpu/drm/radeon/si_dpm.c switch (rdev->pm.int_thermal_type) { rdev 4720 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) rdev 4723 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) { rdev 4724 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pdev->device != 0x6818) && (rdev->pdev->device != 0x6819)) rdev 4728 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) rdev 4734 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY) rdev 4737 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE) { rdev 4739 drivers/gpu/drm/radeon/si_dpm.c vr_hot_gpio = rdev->pm.dpm.backbias_response_time; rdev 4740 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_vr_hot_gpio, rdev 4744 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_smc_initial_state(rdev, radeon_boot_state, table); rdev 4748 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_smc_acpi_state(rdev, table); rdev 4754 drivers/gpu/drm/radeon/si_dpm.c ret = si_do_program_memory_timing_parameters(rdev, radeon_boot_state, rdev 4760 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_ulv_state(rdev, &table->ULVState); rdev 4764 drivers/gpu/drm/radeon/si_dpm.c ret = si_program_ulv_memory_timing_parameters(rdev); rdev 4771 drivers/gpu/drm/radeon/si_dpm.c lane_width = radeon_get_pcie_lanes(rdev); rdev 4772 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); rdev 4777 drivers/gpu/drm/radeon/si_dpm.c return si_copy_bytes_to_smc(rdev, si_pi->state_table_start, rdev 4782 drivers/gpu/drm/radeon/si_dpm.c static int si_calculate_sclk_params(struct radeon_device *rdev, rdev 4786 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4787 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4796 drivers/gpu/drm/radeon/si_dpm.c u32 reference_clock = rdev->clock.spll.reference_freq; rdev 4801 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 4827 drivers/gpu/drm/radeon/si_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 4852 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_sclk_value(struct radeon_device *rdev, rdev 4859 drivers/gpu/drm/radeon/si_dpm.c ret = si_calculate_sclk_params(rdev, engine_clock, &sclk_tmp); rdev 4873 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_mclk_value(struct radeon_device *rdev, rdev 4880 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4881 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4894 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); rdev 4918 drivers/gpu/drm/radeon/si_dpm.c u32 reference_clock = rdev->clock.mpll.reference_freq; rdev 4927 drivers/gpu/drm/radeon/si_dpm.c if (radeon_atombios_get_asic_ss_info(rdev, &ss, rdev 4962 drivers/gpu/drm/radeon/si_dpm.c static void si_populate_smc_sp(struct radeon_device *rdev, rdev 4967 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4977 drivers/gpu/drm/radeon/si_dpm.c static int si_convert_power_level_to_smc(struct radeon_device *rdev, rdev 4981 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 4982 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 4983 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 4995 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_sclk_value(rdev, pl->sclk, &level->sclk); rdev 5005 drivers/gpu/drm/radeon/si_dpm.c (rdev->pm.dpm.new_active_crtc_count <= 2)) { rdev 5019 drivers/gpu/drm/radeon/si_dpm.c level->strobeMode = si_get_strobe_mode_settings(rdev, pl->mclk); rdev 5031 drivers/gpu/drm/radeon/si_dpm.c level->strobeMode = si_get_strobe_mode_settings(rdev, rdev 5037 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_mclk_value(rdev, rdev 5045 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_voltage_value(rdev, rdev 5052 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_std_voltage_value(rdev, &level->vddc, &std_vddc); rdev 5056 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_std_voltage_value(rdev, std_vddc, rdev 5062 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table, rdev 5069 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_phase_shedding_value(rdev, rdev 5070 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, rdev 5081 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); rdev 5086 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_smc_t(struct radeon_device *rdev, rdev 5090 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 5135 drivers/gpu/drm/radeon/si_dpm.c static int si_disable_ulv(struct radeon_device *rdev) rdev 5137 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5141 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_DisableULV) == PPSMC_Result_OK) ? rdev 5147 drivers/gpu/drm/radeon/si_dpm.c static bool si_is_state_ulv_compatible(struct radeon_device *rdev, rdev 5150 drivers/gpu/drm/radeon/si_dpm.c const struct si_power_info *si_pi = si_get_pi(rdev); rdev 5160 drivers/gpu/drm/radeon/si_dpm.c for (i = 0; i < rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) { rdev 5161 drivers/gpu/drm/radeon/si_dpm.c if (rdev->clock.current_dispclk <= rdev 5162 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) { rdev 5164 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) rdev 5175 drivers/gpu/drm/radeon/si_dpm.c static int si_set_power_state_conditionally_enable_ulv(struct radeon_device *rdev, rdev 5178 drivers/gpu/drm/radeon/si_dpm.c const struct si_power_info *si_pi = si_get_pi(rdev); rdev 5182 drivers/gpu/drm/radeon/si_dpm.c if (si_is_state_ulv_compatible(rdev, radeon_new_state)) rdev 5183 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_EnableULV) == PPSMC_Result_OK) ? rdev 5189 drivers/gpu/drm/radeon/si_dpm.c static int si_convert_power_state_to_smc(struct radeon_device *rdev, rdev 5193 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 5194 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); rdev 5195 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5228 drivers/gpu/drm/radeon/si_dpm.c ret = si_convert_power_level_to_smc(rdev, &state->performance_levels[i], rdev 5252 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, rdev 5256 drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_sp(rdev, radeon_state, smc_state); rdev 5258 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_power_containment_values(rdev, radeon_state, smc_state); rdev 5262 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_sq_ramping_values(rdev, radeon_state, smc_state); rdev 5266 drivers/gpu/drm/radeon/si_dpm.c return si_populate_smc_t(rdev, radeon_state, smc_state); rdev 5269 drivers/gpu/drm/radeon/si_dpm.c static int si_upload_sw_state(struct radeon_device *rdev, rdev 5272 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5284 drivers/gpu/drm/radeon/si_dpm.c ret = si_convert_power_state_to_smc(rdev, radeon_new_state, smc_state); rdev 5288 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, address, (u8 *)smc_state, rdev 5294 drivers/gpu/drm/radeon/si_dpm.c static int si_upload_ulv_state(struct radeon_device *rdev) rdev 5296 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5308 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_ulv_state(rdev, smc_state); rdev 5310 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, address, (u8 *)smc_state, rdev 5317 drivers/gpu/drm/radeon/si_dpm.c static int si_upload_smc_data(struct radeon_device *rdev) rdev 5322 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.new_active_crtc_count == 0) rdev 5325 drivers/gpu/drm/radeon/si_dpm.c for (i = 0; i < rdev->num_crtc; i++) { rdev 5326 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.new_active_crtcs & (1 << i)) { rdev 5327 drivers/gpu/drm/radeon/si_dpm.c radeon_crtc = rdev->mode_info.crtcs[i]; rdev 5338 drivers/gpu/drm/radeon/si_dpm.c if (si_write_smc_soft_register(rdev, rdev 5343 drivers/gpu/drm/radeon/si_dpm.c if (si_write_smc_soft_register(rdev, rdev 5348 drivers/gpu/drm/radeon/si_dpm.c if (si_write_smc_soft_register(rdev, rdev 5356 drivers/gpu/drm/radeon/si_dpm.c static int si_set_mc_special_registers(struct radeon_device *rdev, rdev 5359 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 5533 drivers/gpu/drm/radeon/si_dpm.c static int si_initialize_mc_reg_table(struct radeon_device *rdev) rdev 5535 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5538 drivers/gpu/drm/radeon/si_dpm.c u8 module_index = rv770_get_memory_module_index(rdev); rdev 5560 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_init_mc_reg_table(rdev, module_index, table); rdev 5570 drivers/gpu/drm/radeon/si_dpm.c ret = si_set_mc_special_registers(rdev, si_table); rdev 5583 drivers/gpu/drm/radeon/si_dpm.c static void si_populate_mc_reg_addresses(struct radeon_device *rdev, rdev 5586 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5617 drivers/gpu/drm/radeon/si_dpm.c static void si_convert_mc_reg_table_entry_to_smc(struct radeon_device *rdev, rdev 5621 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5637 drivers/gpu/drm/radeon/si_dpm.c static void si_convert_mc_reg_table_to_smc(struct radeon_device *rdev, rdev 5645 drivers/gpu/drm/radeon/si_dpm.c si_convert_mc_reg_table_entry_to_smc(rdev, rdev 5651 drivers/gpu/drm/radeon/si_dpm.c static int si_populate_mc_reg_table(struct radeon_device *rdev, rdev 5655 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5661 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_seq_index, 1); rdev 5663 drivers/gpu/drm/radeon/si_dpm.c si_populate_mc_reg_addresses(rdev, smc_mc_reg_table); rdev 5665 drivers/gpu/drm/radeon/si_dpm.c si_convert_mc_reg_table_entry_to_smc(rdev, &boot_state->performance_levels[0], rdev 5674 drivers/gpu/drm/radeon/si_dpm.c si_convert_mc_reg_table_entry_to_smc(rdev, &ulv->pl, rdev 5682 drivers/gpu/drm/radeon/si_dpm.c si_convert_mc_reg_table_to_smc(rdev, radeon_boot_state, smc_mc_reg_table); rdev 5684 drivers/gpu/drm/radeon/si_dpm.c return si_copy_bytes_to_smc(rdev, si_pi->mc_reg_table_start, rdev 5689 drivers/gpu/drm/radeon/si_dpm.c static int si_upload_mc_reg_table(struct radeon_device *rdev, rdev 5693 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5701 drivers/gpu/drm/radeon/si_dpm.c si_convert_mc_reg_table_to_smc(rdev, radeon_new_state, smc_mc_reg_table); rdev 5704 drivers/gpu/drm/radeon/si_dpm.c return si_copy_bytes_to_smc(rdev, address, rdev 5711 drivers/gpu/drm/radeon/si_dpm.c static void si_enable_voltage_control(struct radeon_device *rdev, bool enable) rdev 5719 drivers/gpu/drm/radeon/si_dpm.c static enum radeon_pcie_gen si_get_maximum_link_speed(struct radeon_device *rdev, rdev 5734 drivers/gpu/drm/radeon/si_dpm.c static u16 si_get_current_pcie_speed(struct radeon_device *rdev) rdev 5744 drivers/gpu/drm/radeon/si_dpm.c static void si_request_link_speed_change_before_state_change(struct radeon_device *rdev, rdev 5748 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5749 drivers/gpu/drm/radeon/si_dpm.c enum radeon_pcie_gen target_link_speed = si_get_maximum_link_speed(rdev, radeon_new_state); rdev 5753 drivers/gpu/drm/radeon/si_dpm.c current_link_speed = si_get_maximum_link_speed(rdev, radeon_current_state); rdev 5763 drivers/gpu/drm/radeon/si_dpm.c if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN3, false) == 0) rdev 5770 drivers/gpu/drm/radeon/si_dpm.c if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0) rdev 5775 drivers/gpu/drm/radeon/si_dpm.c si_pi->force_pcie_gen = si_get_current_pcie_speed(rdev); rdev 5784 drivers/gpu/drm/radeon/si_dpm.c static void si_notify_link_speed_change_after_state_change(struct radeon_device *rdev, rdev 5788 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5789 drivers/gpu/drm/radeon/si_dpm.c enum radeon_pcie_gen target_link_speed = si_get_maximum_link_speed(rdev, radeon_new_state); rdev 5801 drivers/gpu/drm/radeon/si_dpm.c (si_get_current_pcie_speed(rdev) > 0)) rdev 5805 drivers/gpu/drm/radeon/si_dpm.c radeon_acpi_pcie_performance_request(rdev, request, false); rdev 5811 drivers/gpu/drm/radeon/si_dpm.c static int si_ds_request(struct radeon_device *rdev, rdev 5814 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 5818 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_CancelThrottleOVRDSCLKDS) == rdev 5822 drivers/gpu/drm/radeon/si_dpm.c return (si_send_msg_to_smc(rdev, PPSMC_MSG_ThrottleOVRDSCLKDS) == rdev 5829 drivers/gpu/drm/radeon/si_dpm.c static void si_set_max_cu_value(struct radeon_device *rdev) rdev 5831 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 5833 drivers/gpu/drm/radeon/si_dpm.c if (rdev->family == CHIP_VERDE) { rdev 5834 drivers/gpu/drm/radeon/si_dpm.c switch (rdev->pdev->device) { rdev 5870 drivers/gpu/drm/radeon/si_dpm.c static int si_patch_single_dependency_table_based_on_leakage(struct radeon_device *rdev, rdev 5879 drivers/gpu/drm/radeon/si_dpm.c switch (si_get_leakage_voltage_from_leakage_index(rdev, rdev 5901 drivers/gpu/drm/radeon/si_dpm.c static int si_patch_dependency_tables_based_on_leakage(struct radeon_device *rdev) rdev 5905 drivers/gpu/drm/radeon/si_dpm.c ret = si_patch_single_dependency_table_based_on_leakage(rdev, rdev 5906 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); rdev 5907 drivers/gpu/drm/radeon/si_dpm.c ret = si_patch_single_dependency_table_based_on_leakage(rdev, rdev 5908 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); rdev 5909 drivers/gpu/drm/radeon/si_dpm.c ret = si_patch_single_dependency_table_based_on_leakage(rdev, rdev 5910 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk); rdev 5914 drivers/gpu/drm/radeon/si_dpm.c static void si_set_pcie_lane_width_in_smc(struct radeon_device *rdev, rdev 5925 drivers/gpu/drm/radeon/si_dpm.c radeon_set_pcie_lanes(rdev, new_lane_width); rdev 5926 drivers/gpu/drm/radeon/si_dpm.c lane_width = radeon_get_pcie_lanes(rdev); rdev 5927 drivers/gpu/drm/radeon/si_dpm.c si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); rdev 5931 drivers/gpu/drm/radeon/si_dpm.c static void si_set_vce_clock(struct radeon_device *rdev, rdev 5939 drivers/gpu/drm/radeon/si_dpm.c vce_v1_0_enable_mgcg(rdev, false); rdev 5941 drivers/gpu/drm/radeon/si_dpm.c vce_v1_0_enable_mgcg(rdev, true); rdev 5942 drivers/gpu/drm/radeon/si_dpm.c radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); rdev 5946 drivers/gpu/drm/radeon/si_dpm.c void si_dpm_setup_asic(struct radeon_device *rdev) rdev 5950 drivers/gpu/drm/radeon/si_dpm.c r = si_mc_load_microcode(rdev); rdev 5953 drivers/gpu/drm/radeon/si_dpm.c rv770_get_memory_type(rdev); rdev 5954 drivers/gpu/drm/radeon/si_dpm.c si_read_clock_registers(rdev); rdev 5955 drivers/gpu/drm/radeon/si_dpm.c si_enable_acpi_power_management(rdev); rdev 5958 drivers/gpu/drm/radeon/si_dpm.c static int si_thermal_enable_alert(struct radeon_device *rdev, rdev 5968 drivers/gpu/drm/radeon/si_dpm.c rdev->irq.dpm_thermal = false; rdev 5969 drivers/gpu/drm/radeon/si_dpm.c result = si_send_msg_to_smc(rdev, PPSMC_MSG_EnableThermalInterrupt); rdev 5977 drivers/gpu/drm/radeon/si_dpm.c rdev->irq.dpm_thermal = true; rdev 5983 drivers/gpu/drm/radeon/si_dpm.c static int si_thermal_set_temperature_range(struct radeon_device *rdev, rdev 6002 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.thermal.min_temp = low_temp; rdev 6003 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.thermal.max_temp = high_temp; rdev 6008 drivers/gpu/drm/radeon/si_dpm.c static void si_fan_ctrl_set_static_mode(struct radeon_device *rdev, u32 mode) rdev 6010 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6030 drivers/gpu/drm/radeon/si_dpm.c static int si_thermal_setup_fan_table(struct radeon_device *rdev) rdev 6032 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6042 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.fan.ucode_fan_control = false; rdev 6049 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.fan.ucode_fan_control = false; rdev 6053 drivers/gpu/drm/radeon/si_dpm.c tmp64 = (u64)rdev->pm.dpm.fan.pwm_min * duty100; rdev 6057 drivers/gpu/drm/radeon/si_dpm.c t_diff1 = rdev->pm.dpm.fan.t_med - rdev->pm.dpm.fan.t_min; rdev 6058 drivers/gpu/drm/radeon/si_dpm.c t_diff2 = rdev->pm.dpm.fan.t_high - rdev->pm.dpm.fan.t_med; rdev 6060 drivers/gpu/drm/radeon/si_dpm.c pwm_diff1 = rdev->pm.dpm.fan.pwm_med - rdev->pm.dpm.fan.pwm_min; rdev 6061 drivers/gpu/drm/radeon/si_dpm.c pwm_diff2 = rdev->pm.dpm.fan.pwm_high - rdev->pm.dpm.fan.pwm_med; rdev 6066 drivers/gpu/drm/radeon/si_dpm.c fan_table.temp_min = cpu_to_be16((50 + rdev->pm.dpm.fan.t_min) / 100); rdev 6067 drivers/gpu/drm/radeon/si_dpm.c fan_table.temp_med = cpu_to_be16((50 + rdev->pm.dpm.fan.t_med) / 100); rdev 6068 drivers/gpu/drm/radeon/si_dpm.c fan_table.temp_max = cpu_to_be16((50 + rdev->pm.dpm.fan.t_max) / 100); rdev 6075 drivers/gpu/drm/radeon/si_dpm.c fan_table.hys_down = cpu_to_be16(rdev->pm.dpm.fan.t_hyst); rdev 6083 drivers/gpu/drm/radeon/si_dpm.c reference_clock = radeon_get_xclk(rdev); rdev 6085 drivers/gpu/drm/radeon/si_dpm.c fan_table.refresh_period = cpu_to_be32((rdev->pm.dpm.fan.cycle_delay * rdev 6093 drivers/gpu/drm/radeon/si_dpm.c ret = si_copy_bytes_to_smc(rdev, rdev 6101 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.fan.ucode_fan_control = false; rdev 6107 drivers/gpu/drm/radeon/si_dpm.c static int si_fan_ctrl_start_smc_fan_control(struct radeon_device *rdev) rdev 6109 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6112 drivers/gpu/drm/radeon/si_dpm.c ret = si_send_msg_to_smc(rdev, PPSMC_StartFanControl); rdev 6121 drivers/gpu/drm/radeon/si_dpm.c static int si_fan_ctrl_stop_smc_fan_control(struct radeon_device *rdev) rdev 6123 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6126 drivers/gpu/drm/radeon/si_dpm.c ret = si_send_msg_to_smc(rdev, PPSMC_StopFanControl); rdev 6136 drivers/gpu/drm/radeon/si_dpm.c int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, rdev 6142 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.no_fan) rdev 6161 drivers/gpu/drm/radeon/si_dpm.c int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, rdev 6164 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6169 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.no_fan) rdev 6194 drivers/gpu/drm/radeon/si_dpm.c void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode) rdev 6198 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) rdev 6199 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_stop_smc_fan_control(rdev); rdev 6200 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_set_static_mode(rdev, mode); rdev 6203 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) rdev 6204 drivers/gpu/drm/radeon/si_dpm.c si_thermal_start_smc_fan_control(rdev); rdev 6206 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_set_default_mode(rdev); rdev 6210 drivers/gpu/drm/radeon/si_dpm.c u32 si_fan_ctrl_get_mode(struct radeon_device *rdev) rdev 6212 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6223 drivers/gpu/drm/radeon/si_dpm.c static int si_fan_ctrl_get_fan_speed_rpm(struct radeon_device *rdev, rdev 6227 drivers/gpu/drm/radeon/si_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 6229 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.no_fan) rdev 6232 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.fan_pulses_per_revolution == 0) rdev 6244 drivers/gpu/drm/radeon/si_dpm.c static int si_fan_ctrl_set_fan_speed_rpm(struct radeon_device *rdev, rdev 6248 drivers/gpu/drm/radeon/si_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 6250 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.no_fan) rdev 6253 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.fan_pulses_per_revolution == 0) rdev 6256 drivers/gpu/drm/radeon/si_dpm.c if ((speed < rdev->pm.fan_min_rpm) || rdev 6257 drivers/gpu/drm/radeon/si_dpm.c (speed > rdev->pm.fan_max_rpm)) rdev 6260 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) rdev 6261 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_stop_smc_fan_control(rdev); rdev 6268 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC_RPM); rdev 6274 drivers/gpu/drm/radeon/si_dpm.c static void si_fan_ctrl_set_default_mode(struct radeon_device *rdev) rdev 6276 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6291 drivers/gpu/drm/radeon/si_dpm.c static void si_thermal_start_smc_fan_control(struct radeon_device *rdev) rdev 6293 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) { rdev 6294 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_start_smc_fan_control(rdev); rdev 6295 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC); rdev 6299 drivers/gpu/drm/radeon/si_dpm.c static void si_thermal_initialize(struct radeon_device *rdev) rdev 6303 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.fan_pulses_per_revolution) { rdev 6305 drivers/gpu/drm/radeon/si_dpm.c tmp |= EDGE_PER_REV(rdev->pm.fan_pulses_per_revolution -1); rdev 6314 drivers/gpu/drm/radeon/si_dpm.c static int si_thermal_start_thermal_controller(struct radeon_device *rdev) rdev 6318 drivers/gpu/drm/radeon/si_dpm.c si_thermal_initialize(rdev); rdev 6319 drivers/gpu/drm/radeon/si_dpm.c ret = si_thermal_set_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 6322 drivers/gpu/drm/radeon/si_dpm.c ret = si_thermal_enable_alert(rdev, true); rdev 6325 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.fan.ucode_fan_control) { rdev 6326 drivers/gpu/drm/radeon/si_dpm.c ret = si_halt_smc(rdev); rdev 6329 drivers/gpu/drm/radeon/si_dpm.c ret = si_thermal_setup_fan_table(rdev); rdev 6332 drivers/gpu/drm/radeon/si_dpm.c ret = si_resume_smc(rdev); rdev 6335 drivers/gpu/drm/radeon/si_dpm.c si_thermal_start_smc_fan_control(rdev); rdev 6341 drivers/gpu/drm/radeon/si_dpm.c static void si_thermal_stop_thermal_controller(struct radeon_device *rdev) rdev 6343 drivers/gpu/drm/radeon/si_dpm.c if (!rdev->pm.no_fan) { rdev 6344 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_set_default_mode(rdev); rdev 6345 drivers/gpu/drm/radeon/si_dpm.c si_fan_ctrl_stop_smc_fan_control(rdev); rdev 6349 drivers/gpu/drm/radeon/si_dpm.c int si_dpm_enable(struct radeon_device *rdev) rdev 6351 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 6352 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 6353 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6354 drivers/gpu/drm/radeon/si_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 6357 drivers/gpu/drm/radeon/si_dpm.c if (si_is_smc_running(rdev)) rdev 6360 drivers/gpu/drm/radeon/si_dpm.c si_enable_voltage_control(rdev, true); rdev 6362 drivers/gpu/drm/radeon/si_dpm.c si_get_mvdd_configuration(rdev); rdev 6364 drivers/gpu/drm/radeon/si_dpm.c ret = si_construct_voltage_tables(rdev); rdev 6371 drivers/gpu/drm/radeon/si_dpm.c ret = si_initialize_mc_reg_table(rdev); rdev 6376 drivers/gpu/drm/radeon/si_dpm.c si_enable_spread_spectrum(rdev, true); rdev 6378 drivers/gpu/drm/radeon/si_dpm.c si_enable_thermal_protection(rdev, true); rdev 6379 drivers/gpu/drm/radeon/si_dpm.c si_setup_bsp(rdev); rdev 6380 drivers/gpu/drm/radeon/si_dpm.c si_program_git(rdev); rdev 6381 drivers/gpu/drm/radeon/si_dpm.c si_program_tp(rdev); rdev 6382 drivers/gpu/drm/radeon/si_dpm.c si_program_tpp(rdev); rdev 6383 drivers/gpu/drm/radeon/si_dpm.c si_program_sstp(rdev); rdev 6384 drivers/gpu/drm/radeon/si_dpm.c si_enable_display_gap(rdev); rdev 6385 drivers/gpu/drm/radeon/si_dpm.c si_program_vc(rdev); rdev 6386 drivers/gpu/drm/radeon/si_dpm.c ret = si_upload_firmware(rdev); rdev 6391 drivers/gpu/drm/radeon/si_dpm.c ret = si_process_firmware_header(rdev); rdev 6396 drivers/gpu/drm/radeon/si_dpm.c ret = si_initial_switch_from_arb_f0_to_f1(rdev); rdev 6401 drivers/gpu/drm/radeon/si_dpm.c ret = si_init_smc_table(rdev); rdev 6406 drivers/gpu/drm/radeon/si_dpm.c ret = si_init_smc_spll_table(rdev); rdev 6411 drivers/gpu/drm/radeon/si_dpm.c ret = si_init_arb_table_index(rdev); rdev 6417 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_mc_reg_table(rdev, boot_ps); rdev 6423 drivers/gpu/drm/radeon/si_dpm.c ret = si_initialize_smc_cac_tables(rdev); rdev 6428 drivers/gpu/drm/radeon/si_dpm.c ret = si_initialize_hardware_cac_manager(rdev); rdev 6433 drivers/gpu/drm/radeon/si_dpm.c ret = si_initialize_smc_dte_tables(rdev); rdev 6438 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_smc_tdp_limits(rdev, boot_ps); rdev 6443 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_smc_tdp_limits_2(rdev, boot_ps); rdev 6448 drivers/gpu/drm/radeon/si_dpm.c si_program_response_times(rdev); rdev 6449 drivers/gpu/drm/radeon/si_dpm.c si_program_ds_registers(rdev); rdev 6450 drivers/gpu/drm/radeon/si_dpm.c si_dpm_start_smc(rdev); rdev 6451 drivers/gpu/drm/radeon/si_dpm.c ret = si_notify_smc_display_change(rdev, false); rdev 6456 drivers/gpu/drm/radeon/si_dpm.c si_enable_sclk_control(rdev, true); rdev 6457 drivers/gpu/drm/radeon/si_dpm.c si_start_dpm(rdev); rdev 6459 drivers/gpu/drm/radeon/si_dpm.c si_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); rdev 6461 drivers/gpu/drm/radeon/si_dpm.c si_thermal_start_thermal_controller(rdev); rdev 6463 drivers/gpu/drm/radeon/si_dpm.c ni_update_current_ps(rdev, boot_ps); rdev 6468 drivers/gpu/drm/radeon/si_dpm.c static int si_set_temperature_range(struct radeon_device *rdev) rdev 6472 drivers/gpu/drm/radeon/si_dpm.c ret = si_thermal_enable_alert(rdev, false); rdev 6475 drivers/gpu/drm/radeon/si_dpm.c ret = si_thermal_set_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 6478 drivers/gpu/drm/radeon/si_dpm.c ret = si_thermal_enable_alert(rdev, true); rdev 6485 drivers/gpu/drm/radeon/si_dpm.c int si_dpm_late_enable(struct radeon_device *rdev) rdev 6489 drivers/gpu/drm/radeon/si_dpm.c ret = si_set_temperature_range(rdev); rdev 6496 drivers/gpu/drm/radeon/si_dpm.c void si_dpm_disable(struct radeon_device *rdev) rdev 6498 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 6499 drivers/gpu/drm/radeon/si_dpm.c struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; rdev 6501 drivers/gpu/drm/radeon/si_dpm.c if (!si_is_smc_running(rdev)) rdev 6503 drivers/gpu/drm/radeon/si_dpm.c si_thermal_stop_thermal_controller(rdev); rdev 6504 drivers/gpu/drm/radeon/si_dpm.c si_disable_ulv(rdev); rdev 6505 drivers/gpu/drm/radeon/si_dpm.c si_clear_vc(rdev); rdev 6507 drivers/gpu/drm/radeon/si_dpm.c si_enable_thermal_protection(rdev, false); rdev 6508 drivers/gpu/drm/radeon/si_dpm.c si_enable_power_containment(rdev, boot_ps, false); rdev 6509 drivers/gpu/drm/radeon/si_dpm.c si_enable_smc_cac(rdev, boot_ps, false); rdev 6510 drivers/gpu/drm/radeon/si_dpm.c si_enable_spread_spectrum(rdev, false); rdev 6511 drivers/gpu/drm/radeon/si_dpm.c si_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, false); rdev 6512 drivers/gpu/drm/radeon/si_dpm.c si_stop_dpm(rdev); rdev 6513 drivers/gpu/drm/radeon/si_dpm.c si_reset_to_default(rdev); rdev 6514 drivers/gpu/drm/radeon/si_dpm.c si_dpm_stop_smc(rdev); rdev 6515 drivers/gpu/drm/radeon/si_dpm.c si_force_switch_to_arb_f0(rdev); rdev 6517 drivers/gpu/drm/radeon/si_dpm.c ni_update_current_ps(rdev, boot_ps); rdev 6520 drivers/gpu/drm/radeon/si_dpm.c int si_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 6522 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 6523 drivers/gpu/drm/radeon/si_dpm.c struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; rdev 6526 drivers/gpu/drm/radeon/si_dpm.c ni_update_requested_ps(rdev, new_ps); rdev 6528 drivers/gpu/drm/radeon/si_dpm.c si_apply_state_adjust_rules(rdev, &eg_pi->requested_rps); rdev 6533 drivers/gpu/drm/radeon/si_dpm.c static int si_power_control_set_level(struct radeon_device *rdev) rdev 6535 drivers/gpu/drm/radeon/si_dpm.c struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; rdev 6538 drivers/gpu/drm/radeon/si_dpm.c ret = si_restrict_performance_levels_before_switch(rdev); rdev 6541 drivers/gpu/drm/radeon/si_dpm.c ret = si_halt_smc(rdev); rdev 6544 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_smc_tdp_limits(rdev, new_ps); rdev 6547 drivers/gpu/drm/radeon/si_dpm.c ret = si_populate_smc_tdp_limits_2(rdev, new_ps); rdev 6550 drivers/gpu/drm/radeon/si_dpm.c ret = si_resume_smc(rdev); rdev 6553 drivers/gpu/drm/radeon/si_dpm.c ret = si_set_sw_state(rdev); rdev 6559 drivers/gpu/drm/radeon/si_dpm.c int si_dpm_set_power_state(struct radeon_device *rdev) rdev 6561 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 6566 drivers/gpu/drm/radeon/si_dpm.c ret = si_disable_ulv(rdev); rdev 6571 drivers/gpu/drm/radeon/si_dpm.c ret = si_restrict_performance_levels_before_switch(rdev); rdev 6577 drivers/gpu/drm/radeon/si_dpm.c si_request_link_speed_change_before_state_change(rdev, new_ps, old_ps); rdev 6578 drivers/gpu/drm/radeon/si_dpm.c ni_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 6579 drivers/gpu/drm/radeon/si_dpm.c ret = si_enable_power_containment(rdev, new_ps, false); rdev 6584 drivers/gpu/drm/radeon/si_dpm.c ret = si_enable_smc_cac(rdev, new_ps, false); rdev 6589 drivers/gpu/drm/radeon/si_dpm.c ret = si_halt_smc(rdev); rdev 6594 drivers/gpu/drm/radeon/si_dpm.c ret = si_upload_sw_state(rdev, new_ps); rdev 6599 drivers/gpu/drm/radeon/si_dpm.c ret = si_upload_smc_data(rdev); rdev 6604 drivers/gpu/drm/radeon/si_dpm.c ret = si_upload_ulv_state(rdev); rdev 6610 drivers/gpu/drm/radeon/si_dpm.c ret = si_upload_mc_reg_table(rdev, new_ps); rdev 6616 drivers/gpu/drm/radeon/si_dpm.c ret = si_program_memory_timing_parameters(rdev, new_ps); rdev 6621 drivers/gpu/drm/radeon/si_dpm.c si_set_pcie_lane_width_in_smc(rdev, new_ps, old_ps); rdev 6623 drivers/gpu/drm/radeon/si_dpm.c ret = si_resume_smc(rdev); rdev 6628 drivers/gpu/drm/radeon/si_dpm.c ret = si_set_sw_state(rdev); rdev 6633 drivers/gpu/drm/radeon/si_dpm.c ni_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 6634 drivers/gpu/drm/radeon/si_dpm.c si_set_vce_clock(rdev, new_ps, old_ps); rdev 6636 drivers/gpu/drm/radeon/si_dpm.c si_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); rdev 6637 drivers/gpu/drm/radeon/si_dpm.c ret = si_set_power_state_conditionally_enable_ulv(rdev, new_ps); rdev 6642 drivers/gpu/drm/radeon/si_dpm.c ret = si_enable_smc_cac(rdev, new_ps, true); rdev 6647 drivers/gpu/drm/radeon/si_dpm.c ret = si_enable_power_containment(rdev, new_ps, true); rdev 6653 drivers/gpu/drm/radeon/si_dpm.c ret = si_power_control_set_level(rdev); rdev 6662 drivers/gpu/drm/radeon/si_dpm.c void si_dpm_post_set_power_state(struct radeon_device *rdev) rdev 6664 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 6667 drivers/gpu/drm/radeon/si_dpm.c ni_update_current_ps(rdev, new_ps); rdev 6671 drivers/gpu/drm/radeon/si_dpm.c void si_dpm_reset_asic(struct radeon_device *rdev) rdev 6673 drivers/gpu/drm/radeon/si_dpm.c si_restrict_performance_levels_before_switch(rdev); rdev 6674 drivers/gpu/drm/radeon/si_dpm.c si_disable_ulv(rdev); rdev 6675 drivers/gpu/drm/radeon/si_dpm.c si_set_boot_state(rdev); rdev 6679 drivers/gpu/drm/radeon/si_dpm.c void si_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 6681 drivers/gpu/drm/radeon/si_dpm.c si_program_display_gap(rdev); rdev 6706 drivers/gpu/drm/radeon/si_dpm.c static void si_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 6727 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 6729 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 6732 drivers/gpu/drm/radeon/si_dpm.c static void si_parse_pplib_clock_info(struct radeon_device *rdev, rdev 6736 drivers/gpu/drm/radeon/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(rdev); rdev 6737 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 6738 drivers/gpu/drm/radeon/si_dpm.c struct si_power_info *si_pi = si_get_pi(rdev); rdev 6754 drivers/gpu/drm/radeon/si_dpm.c pl->pcie_gen = r600_get_pcie_gen_support(rdev, rdev 6760 drivers/gpu/drm/radeon/si_dpm.c ret = si_get_leakage_voltage_from_leakage_index(rdev, pl->vddc, rdev 6791 drivers/gpu/drm/radeon/si_dpm.c radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); rdev 6792 drivers/gpu/drm/radeon/si_dpm.c pl->mclk = rdev->clock.default_mclk; rdev 6793 drivers/gpu/drm/radeon/si_dpm.c pl->sclk = rdev->clock.default_sclk; rdev 6801 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; rdev 6802 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; rdev 6803 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; rdev 6804 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; rdev 6808 drivers/gpu/drm/radeon/si_dpm.c static int si_parse_power_table(struct radeon_device *rdev) rdev 6810 drivers/gpu/drm/radeon/si_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 6840 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, rdev 6843 drivers/gpu/drm/radeon/si_dpm.c if (!rdev->pm.dpm.ps) rdev 6852 drivers/gpu/drm/radeon/si_dpm.c if (!rdev->pm.power_state[i].clock_info) rdev 6856 drivers/gpu/drm/radeon/si_dpm.c kfree(rdev->pm.dpm.ps); rdev 6859 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 6860 drivers/gpu/drm/radeon/si_dpm.c si_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 6874 drivers/gpu/drm/radeon/si_dpm.c si_parse_pplib_clock_info(rdev, rdev 6875 drivers/gpu/drm/radeon/si_dpm.c &rdev->pm.dpm.ps[i], k, rdev 6881 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.num_ps = state_array->ucNumEntries; rdev 6886 drivers/gpu/drm/radeon/si_dpm.c clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; rdev 6893 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.vce_states[i].sclk = sclk; rdev 6894 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.vce_states[i].mclk = mclk; rdev 6900 drivers/gpu/drm/radeon/si_dpm.c int si_dpm_init(struct radeon_device *rdev) rdev 6908 drivers/gpu/drm/radeon/si_dpm.c struct pci_dev *root = rdev->pdev->bus->self; rdev 6914 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.priv = si_pi; rdev 6919 drivers/gpu/drm/radeon/si_dpm.c if (!pci_is_root_bus(rdev->pdev->bus)) rdev 6935 drivers/gpu/drm/radeon/si_dpm.c si_pi->boot_pcie_gen = si_get_current_pcie_speed(rdev); rdev 6937 drivers/gpu/drm/radeon/si_dpm.c si_set_max_cu_value(rdev); rdev 6939 drivers/gpu/drm/radeon/si_dpm.c rv770_get_max_vddc(rdev); rdev 6940 drivers/gpu/drm/radeon/si_dpm.c si_get_leakage_vddc(rdev); rdev 6941 drivers/gpu/drm/radeon/si_dpm.c si_patch_dependency_tables_based_on_leakage(rdev); rdev 6948 drivers/gpu/drm/radeon/si_dpm.c ret = r600_get_platform_caps(rdev); rdev 6952 drivers/gpu/drm/radeon/si_dpm.c ret = r600_parse_extended_power_table(rdev); rdev 6956 drivers/gpu/drm/radeon/si_dpm.c ret = si_parse_power_table(rdev); rdev 6960 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = rdev 6964 drivers/gpu/drm/radeon/si_dpm.c if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { rdev 6965 drivers/gpu/drm/radeon/si_dpm.c r600_free_extended_power_table(rdev); rdev 6968 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; rdev 6969 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; rdev 6970 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; rdev 6971 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; rdev 6972 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; rdev 6973 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; rdev 6974 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; rdev 6975 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000; rdev 6976 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; rdev 6978 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.voltage_response_time == 0) rdev 6979 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; rdev 6980 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.dpm.backbias_response_time == 0) rdev 6981 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; rdev 6983 drivers/gpu/drm/radeon/si_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 6993 drivers/gpu/drm/radeon/si_dpm.c if (si_is_special_1gb_platform(rdev)) rdev 7003 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, rdev 7007 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, rdev 7010 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_get_svi2_info(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, rdev 7015 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, rdev 7019 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, rdev 7023 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, rdev 7027 drivers/gpu/drm/radeon/si_dpm.c radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, rdev 7030 drivers/gpu/drm/radeon/si_dpm.c rv770_get_engine_memory_ss(rdev); rdev 7041 drivers/gpu/drm/radeon/si_dpm.c if (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE) rdev 7051 drivers/gpu/drm/radeon/si_dpm.c radeon_acpi_is_pcie_performance_request_supported(rdev); rdev 7058 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 4; rdev 7059 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.sclk_mclk_delta = 15000; rdev 7060 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200; rdev 7061 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.count = 0; rdev 7062 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.valid_sclk_values.values = NULL; rdev 7063 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0; rdev 7064 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; rdev 7066 drivers/gpu/drm/radeon/si_dpm.c si_initialize_powertune_defaults(rdev); rdev 7069 drivers/gpu/drm/radeon/si_dpm.c if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || rdev 7070 drivers/gpu/drm/radeon/si_dpm.c (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) rdev 7071 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc = rdev 7072 drivers/gpu/drm/radeon/si_dpm.c rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; rdev 7079 drivers/gpu/drm/radeon/si_dpm.c void si_dpm_fini(struct radeon_device *rdev) rdev 7083 drivers/gpu/drm/radeon/si_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 7084 drivers/gpu/drm/radeon/si_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 7086 drivers/gpu/drm/radeon/si_dpm.c kfree(rdev->pm.dpm.ps); rdev 7087 drivers/gpu/drm/radeon/si_dpm.c kfree(rdev->pm.dpm.priv); rdev 7088 drivers/gpu/drm/radeon/si_dpm.c kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); rdev 7089 drivers/gpu/drm/radeon/si_dpm.c r600_free_extended_power_table(rdev); rdev 7092 drivers/gpu/drm/radeon/si_dpm.c void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 7095 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 7113 drivers/gpu/drm/radeon/si_dpm.c u32 si_dpm_get_current_sclk(struct radeon_device *rdev) rdev 7115 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 7131 drivers/gpu/drm/radeon/si_dpm.c u32 si_dpm_get_current_mclk(struct radeon_device *rdev) rdev 7133 drivers/gpu/drm/radeon/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); rdev 33 drivers/gpu/drm/radeon/si_smc.c static int si_set_smc_sram_address(struct radeon_device *rdev, rdev 47 drivers/gpu/drm/radeon/si_smc.c int si_copy_bytes_to_smc(struct radeon_device *rdev, rdev 62 drivers/gpu/drm/radeon/si_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 67 drivers/gpu/drm/radeon/si_smc.c ret = si_set_smc_sram_address(rdev, addr, limit); rdev 82 drivers/gpu/drm/radeon/si_smc.c ret = si_set_smc_sram_address(rdev, addr, limit); rdev 100 drivers/gpu/drm/radeon/si_smc.c ret = si_set_smc_sram_address(rdev, addr, limit); rdev 108 drivers/gpu/drm/radeon/si_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 113 drivers/gpu/drm/radeon/si_smc.c void si_start_smc(struct radeon_device *rdev) rdev 122 drivers/gpu/drm/radeon/si_smc.c void si_reset_smc(struct radeon_device *rdev) rdev 136 drivers/gpu/drm/radeon/si_smc.c int si_program_jump_on_start(struct radeon_device *rdev) rdev 140 drivers/gpu/drm/radeon/si_smc.c return si_copy_bytes_to_smc(rdev, 0x0, data, 4, sizeof(data)+1); rdev 143 drivers/gpu/drm/radeon/si_smc.c void si_stop_smc_clock(struct radeon_device *rdev) rdev 152 drivers/gpu/drm/radeon/si_smc.c void si_start_smc_clock(struct radeon_device *rdev) rdev 161 drivers/gpu/drm/radeon/si_smc.c bool si_is_smc_running(struct radeon_device *rdev) rdev 172 drivers/gpu/drm/radeon/si_smc.c PPSMC_Result si_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg) rdev 177 drivers/gpu/drm/radeon/si_smc.c if (!si_is_smc_running(rdev)) rdev 182 drivers/gpu/drm/radeon/si_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 193 drivers/gpu/drm/radeon/si_smc.c PPSMC_Result si_wait_for_smc_inactive(struct radeon_device *rdev) rdev 198 drivers/gpu/drm/radeon/si_smc.c if (!si_is_smc_running(rdev)) rdev 201 drivers/gpu/drm/radeon/si_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 211 drivers/gpu/drm/radeon/si_smc.c int si_load_smc_ucode(struct radeon_device *rdev, u32 limit) rdev 219 drivers/gpu/drm/radeon/si_smc.c if (!rdev->smc_fw) rdev 222 drivers/gpu/drm/radeon/si_smc.c if (rdev->new_fw) { rdev 224 drivers/gpu/drm/radeon/si_smc.c (const struct smc_firmware_header_v1_0 *)rdev->smc_fw->data; rdev 231 drivers/gpu/drm/radeon/si_smc.c (rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); rdev 233 drivers/gpu/drm/radeon/si_smc.c switch (rdev->family) { rdev 258 drivers/gpu/drm/radeon/si_smc.c src = (const u8 *)rdev->smc_fw->data; rdev 264 drivers/gpu/drm/radeon/si_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 277 drivers/gpu/drm/radeon/si_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 282 drivers/gpu/drm/radeon/si_smc.c int si_read_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, rdev 288 drivers/gpu/drm/radeon/si_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 289 drivers/gpu/drm/radeon/si_smc.c ret = si_set_smc_sram_address(rdev, smc_address, limit); rdev 292 drivers/gpu/drm/radeon/si_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 297 drivers/gpu/drm/radeon/si_smc.c int si_write_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, rdev 303 drivers/gpu/drm/radeon/si_smc.c spin_lock_irqsave(&rdev->smc_idx_lock, flags); rdev 304 drivers/gpu/drm/radeon/si_smc.c ret = si_set_smc_sram_address(rdev, smc_address, limit); rdev 307 drivers/gpu/drm/radeon/si_smc.c spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); rdev 406 drivers/gpu/drm/radeon/sislands_smc.h int si_copy_bytes_to_smc(struct radeon_device *rdev, rdev 409 drivers/gpu/drm/radeon/sislands_smc.h void si_start_smc(struct radeon_device *rdev); rdev 410 drivers/gpu/drm/radeon/sislands_smc.h void si_reset_smc(struct radeon_device *rdev); rdev 411 drivers/gpu/drm/radeon/sislands_smc.h int si_program_jump_on_start(struct radeon_device *rdev); rdev 412 drivers/gpu/drm/radeon/sislands_smc.h void si_stop_smc_clock(struct radeon_device *rdev); rdev 413 drivers/gpu/drm/radeon/sislands_smc.h void si_start_smc_clock(struct radeon_device *rdev); rdev 414 drivers/gpu/drm/radeon/sislands_smc.h bool si_is_smc_running(struct radeon_device *rdev); rdev 415 drivers/gpu/drm/radeon/sislands_smc.h PPSMC_Result si_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg); rdev 416 drivers/gpu/drm/radeon/sislands_smc.h PPSMC_Result si_wait_for_smc_inactive(struct radeon_device *rdev); rdev 417 drivers/gpu/drm/radeon/sislands_smc.h int si_load_smc_ucode(struct radeon_device *rdev, u32 limit); rdev 418 drivers/gpu/drm/radeon/sislands_smc.h int si_read_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, rdev 420 drivers/gpu/drm/radeon/sislands_smc.h int si_write_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, rdev 81 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev) rdev 83 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = rdev->pm.dpm.priv; rdev 88 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_gfx_clockgating_enable(struct radeon_device *rdev, bool enable) rdev 103 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_mg_clockgating_enable(struct radeon_device *rdev, bool enable) rdev 120 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_git(struct radeon_device *rdev) rdev 123 drivers/gpu/drm/radeon/sumo_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 131 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_grsd(struct radeon_device *rdev) rdev 134 drivers/gpu/drm/radeon/sumo_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 142 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_gfx_clockgating_initialize(struct radeon_device *rdev) rdev 144 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_git(rdev); rdev 145 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_grsd(rdev); rdev 148 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_gfx_powergating_initialize(struct radeon_device *rdev) rdev 154 drivers/gpu/drm/radeon/sumo_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 156 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) { rdev 184 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) { rdev 196 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) { rdev 217 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) rdev 220 drivers/gpu/drm/radeon/sumo_dpm.c sumo_smu_pg_init(rdev); rdev 226 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) { rdev 232 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) { rdev 244 drivers/gpu/drm/radeon/sumo_dpm.c sumo_smu_pg_init(rdev); rdev 251 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) { rdev 259 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) { rdev 271 drivers/gpu/drm/radeon/sumo_dpm.c sumo_smu_pg_init(rdev); rdev 274 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_gfx_powergating_enable(struct radeon_device *rdev, bool enable) rdev 284 drivers/gpu/drm/radeon/sumo_dpm.c static int sumo_enable_clock_power_gating(struct radeon_device *rdev) rdev 286 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 289 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_clockgating_initialize(rdev); rdev 291 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_powergating_initialize(rdev); rdev 293 drivers/gpu/drm/radeon/sumo_dpm.c sumo_mg_clockgating_enable(rdev, true); rdev 295 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_clockgating_enable(rdev, true); rdev 297 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_powergating_enable(rdev, true); rdev 302 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_disable_clock_power_gating(struct radeon_device *rdev) rdev 304 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 307 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_clockgating_enable(rdev, false); rdev 309 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_powergating_enable(rdev, false); rdev 311 drivers/gpu/drm/radeon/sumo_dpm.c sumo_mg_clockgating_enable(rdev, false); rdev 314 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_calculate_bsp(struct radeon_device *rdev, rdev 317 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 318 drivers/gpu/drm/radeon/sumo_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 333 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_init_bsp(struct radeon_device *rdev) rdev 335 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 341 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_bsp(struct radeon_device *rdev, rdev 344 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 352 drivers/gpu/drm/radeon/sumo_dpm.c sumo_calculate_bsp(rdev, highest_engine_clock); rdev 363 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_write_at(struct radeon_device *rdev, rdev 384 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_at(struct radeon_device *rdev, rdev 387 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 415 drivers/gpu/drm/radeon/sumo_dpm.c sumo_write_at(rdev, i, a_t); rdev 426 drivers/gpu/drm/radeon/sumo_dpm.c sumo_write_at(rdev, BOOST_DPM_LEVEL, a_t); rdev 430 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_tp(struct radeon_device *rdev) rdev 452 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_program_vc(struct radeon_device *rdev, u32 vrc) rdev 457 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_clear_vc(struct radeon_device *rdev) rdev 462 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_program_sstp(struct radeon_device *rdev) rdev 465 drivers/gpu/drm/radeon/sumo_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 473 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_divider_value(struct radeon_device *rdev, rdev 493 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_ds_dividers(struct radeon_device *rdev, rdev 496 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 507 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_ss_dividers(struct radeon_device *rdev, rdev 510 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 521 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_vid(struct radeon_device *rdev, u32 index, u32 vid) rdev 530 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_allos_gnb_slow(struct radeon_device *rdev, u32 index, u32 gnb_slow) rdev 532 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 546 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_power_level(struct radeon_device *rdev, rdev 549 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 554 drivers/gpu/drm/radeon/sumo_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 559 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_divider_value(rdev, index, dividers.post_div); rdev 561 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_vid(rdev, index, pl->vddc_index); rdev 567 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_ss_dividers(rdev, index, pl->ss_divider_index); rdev 568 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_ds_dividers(rdev, index, pl->ds_divider_index); rdev 574 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_allos_gnb_slow(rdev, index, pl->allow_gnb_slow); rdev 577 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_tdp_limit(rdev, index, pl->sclk_dpm_tdp_limit); rdev 580 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_power_level_enable(struct radeon_device *rdev, u32 index, bool enable) rdev 599 drivers/gpu/drm/radeon/sumo_dpm.c static bool sumo_dpm_enabled(struct radeon_device *rdev) rdev 607 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_start_dpm(struct radeon_device *rdev) rdev 612 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_stop_dpm(struct radeon_device *rdev) rdev 617 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_forced_mode(struct radeon_device *rdev, bool enable) rdev 625 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_forced_mode_enabled(struct radeon_device *rdev) rdev 629 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode(rdev, true); rdev 630 drivers/gpu/drm/radeon/sumo_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 637 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_wait_for_level_0(struct radeon_device *rdev) rdev 641 drivers/gpu/drm/radeon/sumo_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 646 drivers/gpu/drm/radeon/sumo_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 653 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_forced_mode_disabled(struct radeon_device *rdev) rdev 655 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode(rdev, false); rdev 658 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_enable_power_level_0(struct radeon_device *rdev) rdev 660 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, 0, true); rdev 663 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_patch_boost_state(struct radeon_device *rdev, rdev 666 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 677 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_pre_notify_alt_vddnb_change(struct radeon_device *rdev, rdev 692 drivers/gpu/drm/radeon/sumo_dpm.c sumo_smu_notify_alt_vddnb_change(rdev, 0, 0); rdev 695 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_post_notify_alt_vddnb_change(struct radeon_device *rdev, rdev 710 drivers/gpu/drm/radeon/sumo_dpm.c sumo_smu_notify_alt_vddnb_change(rdev, 1, 1); rdev 713 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_enable_boost(struct radeon_device *rdev, rdev 721 drivers/gpu/drm/radeon/sumo_dpm.c sumo_boost_state_enable(rdev, true); rdev 723 drivers/gpu/drm/radeon/sumo_dpm.c sumo_boost_state_enable(rdev, false); rdev 726 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_forced_level(struct radeon_device *rdev, u32 index) rdev 731 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_forced_level_0(struct radeon_device *rdev) rdev 733 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_level(rdev, 0); rdev 736 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_wl(struct radeon_device *rdev, rdev 751 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_power_levels_0_to_n(struct radeon_device *rdev, rdev 755 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 762 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_power_level(rdev, &new_ps->levels[i], i); rdev 763 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, i, true); rdev 767 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, i, false); rdev 770 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_power_level(rdev, &pi->boost_pl, BOOST_DPM_LEVEL); rdev 773 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_enable_acpi_pm(struct radeon_device *rdev) rdev 778 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_power_level_enter_state(struct radeon_device *rdev) rdev 783 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_acpi_power_level(struct radeon_device *rdev) rdev 785 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 789 drivers/gpu/drm/radeon/sumo_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 799 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_bootup_state(struct radeon_device *rdev) rdev 801 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 805 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_power_level(rdev, &pi->boot_pl, 0); rdev 811 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, i, false); rdev 814 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_setup_uvd_clocks(struct radeon_device *rdev, rdev 818 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 821 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_powergating_enable(rdev, false); rdev 824 drivers/gpu/drm/radeon/sumo_dpm.c radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); rdev 829 drivers/gpu/drm/radeon/sumo_dpm.c sumo_gfx_powergating_enable(rdev, true); rdev 833 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 848 drivers/gpu/drm/radeon/sumo_dpm.c sumo_setup_uvd_clocks(rdev, new_rps, old_rps); rdev 851 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 866 drivers/gpu/drm/radeon/sumo_dpm.c sumo_setup_uvd_clocks(rdev, new_rps, old_rps); rdev 869 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_take_smu_control(struct radeon_device *rdev, bool enable) rdev 888 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_enable_sclk_ds(struct radeon_device *rdev, bool enable) rdev 909 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_bootup_at(struct radeon_device *rdev) rdev 915 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_reset_am(struct radeon_device *rdev) rdev 920 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_start_am(struct radeon_device *rdev) rdev 925 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_ttp(struct radeon_device *rdev) rdev 927 drivers/gpu/drm/radeon/sumo_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 940 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_ttt(struct radeon_device *rdev) rdev 943 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 952 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_enable_voltage_scaling(struct radeon_device *rdev, bool enable) rdev 963 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_override_cnb_thermal_events(struct radeon_device *rdev) rdev 969 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_program_dc_hto(struct radeon_device *rdev) rdev 973 drivers/gpu/drm/radeon/sumo_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 984 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_force_nbp_state(struct radeon_device *rdev, rdev 987 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1003 drivers/gpu/drm/radeon/sumo_dpm.c u32 sumo_get_sleep_divider_id_from_clock(struct radeon_device *rdev, rdev 1007 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1028 drivers/gpu/drm/radeon/sumo_dpm.c static u32 sumo_get_valid_engine_clock(struct radeon_device *rdev, rdev 1031 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1042 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_patch_thermal_state(struct radeon_device *rdev, rdev 1046 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1066 drivers/gpu/drm/radeon/sumo_dpm.c sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); rdev 1069 drivers/gpu/drm/radeon/sumo_dpm.c sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, SUMO_MINIMUM_ENGINE_CLOCK); rdev 1086 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_apply_state_adjust_rules(struct radeon_device *rdev, rdev 1092 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1099 drivers/gpu/drm/radeon/sumo_dpm.c return sumo_patch_thermal_state(rdev, ps, current_ps); rdev 1117 drivers/gpu/drm/radeon/sumo_dpm.c sumo_get_valid_engine_clock(rdev, min_sclk); rdev 1120 drivers/gpu/drm/radeon/sumo_dpm.c sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); rdev 1123 drivers/gpu/drm/radeon/sumo_dpm.c sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, SUMO_MINIMUM_ENGINE_CLOCK); rdev 1151 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_cleanup_asic(struct radeon_device *rdev) rdev 1153 drivers/gpu/drm/radeon/sumo_dpm.c sumo_take_smu_control(rdev, false); rdev 1156 drivers/gpu/drm/radeon/sumo_dpm.c static int sumo_set_thermal_temperature_range(struct radeon_device *rdev, rdev 1174 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.thermal.min_temp = low_temp; rdev 1175 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.thermal.max_temp = high_temp; rdev 1180 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_update_current_ps(struct radeon_device *rdev, rdev 1184 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1191 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_update_requested_ps(struct radeon_device *rdev, rdev 1195 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1202 drivers/gpu/drm/radeon/sumo_dpm.c int sumo_dpm_enable(struct radeon_device *rdev) rdev 1204 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1206 drivers/gpu/drm/radeon/sumo_dpm.c if (sumo_dpm_enabled(rdev)) rdev 1209 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_bootup_state(rdev); rdev 1210 drivers/gpu/drm/radeon/sumo_dpm.c sumo_init_bsp(rdev); rdev 1211 drivers/gpu/drm/radeon/sumo_dpm.c sumo_reset_am(rdev); rdev 1212 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_tp(rdev); rdev 1213 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_bootup_at(rdev); rdev 1214 drivers/gpu/drm/radeon/sumo_dpm.c sumo_start_am(rdev); rdev 1216 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_ttp(rdev); rdev 1217 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_ttt(rdev); rdev 1219 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_dc_hto(rdev); rdev 1220 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_power_level_enter_state(rdev); rdev 1221 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_voltage_scaling(rdev, true); rdev 1222 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_sstp(rdev); rdev 1223 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_vc(rdev, SUMO_VRC_DFLT); rdev 1224 drivers/gpu/drm/radeon/sumo_dpm.c sumo_override_cnb_thermal_events(rdev); rdev 1225 drivers/gpu/drm/radeon/sumo_dpm.c sumo_start_dpm(rdev); rdev 1226 drivers/gpu/drm/radeon/sumo_dpm.c sumo_wait_for_level_0(rdev); rdev 1228 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_sclk_ds(rdev, true); rdev 1230 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_boost_timer(rdev); rdev 1232 drivers/gpu/drm/radeon/sumo_dpm.c sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 1237 drivers/gpu/drm/radeon/sumo_dpm.c int sumo_dpm_late_enable(struct radeon_device *rdev) rdev 1241 drivers/gpu/drm/radeon/sumo_dpm.c ret = sumo_enable_clock_power_gating(rdev); rdev 1245 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->irq.installed && rdev 1246 drivers/gpu/drm/radeon/sumo_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1247 drivers/gpu/drm/radeon/sumo_dpm.c ret = sumo_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 1250 drivers/gpu/drm/radeon/sumo_dpm.c rdev->irq.dpm_thermal = true; rdev 1251 drivers/gpu/drm/radeon/sumo_dpm.c radeon_irq_set(rdev); rdev 1257 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_disable(struct radeon_device *rdev) rdev 1259 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1261 drivers/gpu/drm/radeon/sumo_dpm.c if (!sumo_dpm_enabled(rdev)) rdev 1263 drivers/gpu/drm/radeon/sumo_dpm.c sumo_disable_clock_power_gating(rdev); rdev 1265 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_sclk_ds(rdev, false); rdev 1266 drivers/gpu/drm/radeon/sumo_dpm.c sumo_clear_vc(rdev); rdev 1267 drivers/gpu/drm/radeon/sumo_dpm.c sumo_wait_for_level_0(rdev); rdev 1268 drivers/gpu/drm/radeon/sumo_dpm.c sumo_stop_dpm(rdev); rdev 1269 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_voltage_scaling(rdev, false); rdev 1271 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->irq.installed && rdev 1272 drivers/gpu/drm/radeon/sumo_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1273 drivers/gpu/drm/radeon/sumo_dpm.c rdev->irq.dpm_thermal = false; rdev 1274 drivers/gpu/drm/radeon/sumo_dpm.c radeon_irq_set(rdev); rdev 1277 drivers/gpu/drm/radeon/sumo_dpm.c sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 1280 drivers/gpu/drm/radeon/sumo_dpm.c int sumo_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 1282 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1283 drivers/gpu/drm/radeon/sumo_dpm.c struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; rdev 1286 drivers/gpu/drm/radeon/sumo_dpm.c sumo_update_requested_ps(rdev, new_ps); rdev 1289 drivers/gpu/drm/radeon/sumo_dpm.c sumo_apply_state_adjust_rules(rdev, rdev 1296 drivers/gpu/drm/radeon/sumo_dpm.c int sumo_dpm_set_power_state(struct radeon_device *rdev) rdev 1298 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1303 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 1305 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_boost(rdev, new_ps, false); rdev 1306 drivers/gpu/drm/radeon/sumo_dpm.c sumo_patch_boost_state(rdev, new_ps); rdev 1309 drivers/gpu/drm/radeon/sumo_dpm.c sumo_pre_notify_alt_vddnb_change(rdev, new_ps, old_ps); rdev 1310 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_power_level_0(rdev); rdev 1311 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_level_0(rdev); rdev 1312 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1313 drivers/gpu/drm/radeon/sumo_dpm.c sumo_wait_for_level_0(rdev); rdev 1314 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_power_levels_0_to_n(rdev, new_ps, old_ps); rdev 1315 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_wl(rdev, new_ps); rdev 1316 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_bsp(rdev, new_ps); rdev 1317 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_at(rdev, new_ps); rdev 1318 drivers/gpu/drm/radeon/sumo_dpm.c sumo_force_nbp_state(rdev, new_ps); rdev 1319 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_disabled(rdev); rdev 1320 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1321 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_disabled(rdev); rdev 1322 drivers/gpu/drm/radeon/sumo_dpm.c sumo_post_notify_alt_vddnb_change(rdev, new_ps, old_ps); rdev 1325 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_boost(rdev, new_ps, true); rdev 1327 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 1332 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_post_set_power_state(struct radeon_device *rdev) rdev 1334 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1337 drivers/gpu/drm/radeon/sumo_dpm.c sumo_update_current_ps(rdev, new_ps); rdev 1341 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_reset_asic(struct radeon_device *rdev) rdev 1343 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_bootup_state(rdev); rdev 1344 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_power_level_0(rdev); rdev 1345 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_level_0(rdev); rdev 1346 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1347 drivers/gpu/drm/radeon/sumo_dpm.c sumo_wait_for_level_0(rdev); rdev 1348 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_disabled(rdev); rdev 1349 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1350 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_disabled(rdev); rdev 1354 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_setup_asic(struct radeon_device *rdev) rdev 1356 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1358 drivers/gpu/drm/radeon/sumo_dpm.c sumo_initialize_m3_arb(rdev); rdev 1359 drivers/gpu/drm/radeon/sumo_dpm.c pi->fw_version = sumo_get_running_fw_version(rdev); rdev 1361 drivers/gpu/drm/radeon/sumo_dpm.c sumo_program_acpi_power_level(rdev); rdev 1362 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_acpi_pm(rdev); rdev 1363 drivers/gpu/drm/radeon/sumo_dpm.c sumo_take_smu_control(rdev, true); rdev 1366 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 1392 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_patch_boot_state(struct radeon_device *rdev, rdev 1395 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1402 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 1422 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 1423 drivers/gpu/drm/radeon/sumo_dpm.c sumo_patch_boot_state(rdev, ps); rdev 1426 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 1429 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_parse_pplib_clock_info(struct radeon_device *rdev, rdev 1433 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1452 drivers/gpu/drm/radeon/sumo_dpm.c static int sumo_parse_power_table(struct radeon_device *rdev) rdev 1454 drivers/gpu/drm/radeon/sumo_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1484 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, rdev 1487 drivers/gpu/drm/radeon/sumo_dpm.c if (!rdev->pm.dpm.ps) rdev 1496 drivers/gpu/drm/radeon/sumo_dpm.c if (!rdev->pm.power_state[i].clock_info) rdev 1500 drivers/gpu/drm/radeon/sumo_dpm.c kfree(rdev->pm.dpm.ps); rdev 1503 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 1514 drivers/gpu/drm/radeon/sumo_dpm.c sumo_parse_pplib_clock_info(rdev, rdev 1515 drivers/gpu/drm/radeon/sumo_dpm.c &rdev->pm.dpm.ps[i], k, rdev 1519 drivers/gpu/drm/radeon/sumo_dpm.c sumo_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 1524 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.num_ps = state_array->ucNumEntries; rdev 1528 drivers/gpu/drm/radeon/sumo_dpm.c u32 sumo_convert_vid2_to_vid7(struct radeon_device *rdev, rdev 1543 drivers/gpu/drm/radeon/sumo_dpm.c u32 sumo_convert_vid7_to_vid2(struct radeon_device *rdev, rdev 1558 drivers/gpu/drm/radeon/sumo_dpm.c static u16 sumo_convert_voltage_index_to_value(struct radeon_device *rdev, rdev 1561 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1562 drivers/gpu/drm/radeon/sumo_dpm.c u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit); rdev 1570 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_construct_display_voltage_mapping_table(struct radeon_device *rdev, rdev 1592 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_construct_sclk_voltage_mapping_table(struct radeon_device *rdev, rdev 1614 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_construct_vid_mapping_table(struct radeon_device *rdev, rdev 1655 drivers/gpu/drm/radeon/sumo_dpm.c static int sumo_parse_sys_info_table(struct radeon_device *rdev) rdev 1657 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1658 drivers/gpu/drm/radeon/sumo_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1713 drivers/gpu/drm/radeon/sumo_dpm.c sumo_construct_display_voltage_mapping_table(rdev, rdev 1716 drivers/gpu/drm/radeon/sumo_dpm.c sumo_construct_sclk_voltage_mapping_table(rdev, rdev 1719 drivers/gpu/drm/radeon/sumo_dpm.c sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table, rdev 1726 drivers/gpu/drm/radeon/sumo_dpm.c static void sumo_construct_boot_and_acpi_state(struct radeon_device *rdev) rdev 1728 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1740 drivers/gpu/drm/radeon/sumo_dpm.c int sumo_dpm_init(struct radeon_device *rdev) rdev 1749 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.priv = pi; rdev 1752 drivers/gpu/drm/radeon/sumo_dpm.c if ((rdev->family == CHIP_PALM) && (hw_rev < 3)) rdev 1763 drivers/gpu/drm/radeon/sumo_dpm.c if (rdev->family == CHIP_PALM) rdev 1771 drivers/gpu/drm/radeon/sumo_dpm.c ret = sumo_parse_sys_info_table(rdev); rdev 1775 drivers/gpu/drm/radeon/sumo_dpm.c sumo_construct_boot_and_acpi_state(rdev); rdev 1777 drivers/gpu/drm/radeon/sumo_dpm.c ret = r600_get_platform_caps(rdev); rdev 1781 drivers/gpu/drm/radeon/sumo_dpm.c ret = sumo_parse_power_table(rdev); rdev 1794 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_print_power_state(struct radeon_device *rdev, rdev 1807 drivers/gpu/drm/radeon/sumo_dpm.c sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); rdev 1809 drivers/gpu/drm/radeon/sumo_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 1812 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 1815 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1828 drivers/gpu/drm/radeon/sumo_dpm.c sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); rdev 1836 drivers/gpu/drm/radeon/sumo_dpm.c sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); rdev 1840 drivers/gpu/drm/radeon/sumo_dpm.c u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev) rdev 1842 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1861 drivers/gpu/drm/radeon/sumo_dpm.c u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev) rdev 1863 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1868 drivers/gpu/drm/radeon/sumo_dpm.c void sumo_dpm_fini(struct radeon_device *rdev) rdev 1872 drivers/gpu/drm/radeon/sumo_dpm.c sumo_cleanup_asic(rdev); /* ??? */ rdev 1874 drivers/gpu/drm/radeon/sumo_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 1875 drivers/gpu/drm/radeon/sumo_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 1877 drivers/gpu/drm/radeon/sumo_dpm.c kfree(rdev->pm.dpm.ps); rdev 1878 drivers/gpu/drm/radeon/sumo_dpm.c kfree(rdev->pm.dpm.priv); rdev 1881 drivers/gpu/drm/radeon/sumo_dpm.c u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 1883 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1892 drivers/gpu/drm/radeon/sumo_dpm.c u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 1894 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1899 drivers/gpu/drm/radeon/sumo_dpm.c int sumo_dpm_force_performance_level(struct radeon_device *rdev, rdev 1902 drivers/gpu/drm/radeon/sumo_dpm.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 1912 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_boost(rdev, rps, false); rdev 1913 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, ps->num_levels - 1, true); rdev 1914 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_level(rdev, ps->num_levels - 1); rdev 1915 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1917 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, i, false); rdev 1919 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode(rdev, false); rdev 1920 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1921 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode(rdev, false); rdev 1924 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_boost(rdev, rps, false); rdev 1925 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, 0, true); rdev 1926 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_level(rdev, 0); rdev 1927 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1929 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, i, false); rdev 1931 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode(rdev, false); rdev 1932 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode_enabled(rdev); rdev 1933 drivers/gpu/drm/radeon/sumo_dpm.c sumo_set_forced_mode(rdev, false); rdev 1936 drivers/gpu/drm/radeon/sumo_dpm.c sumo_power_level_enable(rdev, i, true); rdev 1939 drivers/gpu/drm/radeon/sumo_dpm.c sumo_enable_boost(rdev, rps, true); rdev 1942 drivers/gpu/drm/radeon/sumo_dpm.c rdev->pm.dpm.forced_level = level; rdev 192 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_gfx_clockgating_initialize(struct radeon_device *rdev); rdev 193 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_program_vc(struct radeon_device *rdev, u32 vrc); rdev 194 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_clear_vc(struct radeon_device *rdev); rdev 195 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_program_sstp(struct radeon_device *rdev); rdev 196 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_take_smu_control(struct radeon_device *rdev, bool enable); rdev 197 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_construct_sclk_voltage_mapping_table(struct radeon_device *rdev, rdev 200 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_construct_vid_mapping_table(struct radeon_device *rdev, rdev 203 drivers/gpu/drm/radeon/sumo_dpm.h u32 sumo_convert_vid2_to_vid7(struct radeon_device *rdev, rdev 207 drivers/gpu/drm/radeon/sumo_dpm.h u32 sumo_get_sleep_divider_id_from_clock(struct radeon_device *rdev, rdev 212 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_initialize_m3_arb(struct radeon_device *rdev); rdev 213 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_smu_pg_init(struct radeon_device *rdev); rdev 214 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_set_tdp_limit(struct radeon_device *rdev, u32 index, u32 tdp_limit); rdev 215 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_smu_notify_alt_vddnb_change(struct radeon_device *rdev, rdev 217 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_boost_state_enable(struct radeon_device *rdev, bool enable); rdev 218 drivers/gpu/drm/radeon/sumo_dpm.h void sumo_enable_boost_timer(struct radeon_device *rdev); rdev 219 drivers/gpu/drm/radeon/sumo_dpm.h u32 sumo_get_running_fw_version(struct radeon_device *rdev); rdev 33 drivers/gpu/drm/radeon/sumo_smc.c struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev); rdev 35 drivers/gpu/drm/radeon/sumo_smc.c static void sumo_send_msg_to_smu(struct radeon_device *rdev, u32 id) rdev 40 drivers/gpu/drm/radeon/sumo_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 49 drivers/gpu/drm/radeon/sumo_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 55 drivers/gpu/drm/radeon/sumo_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 61 drivers/gpu/drm/radeon/sumo_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 71 drivers/gpu/drm/radeon/sumo_smc.c void sumo_initialize_m3_arb(struct radeon_device *rdev) rdev 73 drivers/gpu/drm/radeon/sumo_smc.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 92 drivers/gpu/drm/radeon/sumo_smc.c static bool sumo_is_alt_vddnb_supported(struct radeon_device *rdev) rdev 94 drivers/gpu/drm/radeon/sumo_smc.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 100 drivers/gpu/drm/radeon/sumo_smc.c if ((rdev->family == CHIP_SUMO) || (rdev->family == CHIP_SUMO2)) { rdev 108 drivers/gpu/drm/radeon/sumo_smc.c void sumo_smu_notify_alt_vddnb_change(struct radeon_device *rdev, rdev 113 drivers/gpu/drm/radeon/sumo_smc.c if (!sumo_is_alt_vddnb_supported(rdev)) rdev 124 drivers/gpu/drm/radeon/sumo_smc.c sumo_send_msg_to_smu(rdev, SUMO_SMU_SERVICE_ROUTINE_ALTVDDNB_NOTIFY); rdev 127 drivers/gpu/drm/radeon/sumo_smc.c void sumo_smu_pg_init(struct radeon_device *rdev) rdev 129 drivers/gpu/drm/radeon/sumo_smc.c sumo_send_msg_to_smu(rdev, SUMO_SMU_SERVICE_ROUTINE_PG_INIT); rdev 143 drivers/gpu/drm/radeon/sumo_smc.c void sumo_enable_boost_timer(struct radeon_device *rdev) rdev 145 drivers/gpu/drm/radeon/sumo_smc.c struct sumo_power_info *pi = sumo_get_pi(rdev); rdev 147 drivers/gpu/drm/radeon/sumo_smc.c u32 xclk = radeon_get_xclk(rdev); rdev 162 drivers/gpu/drm/radeon/sumo_smc.c sumo_send_msg_to_smu(rdev, SUMO_SMU_SERVICE_ROUTINE_GFX_SRV_ID_20); rdev 165 drivers/gpu/drm/radeon/sumo_smc.c void sumo_set_tdp_limit(struct radeon_device *rdev, u32 index, u32 tdp_limit) rdev 207 drivers/gpu/drm/radeon/sumo_smc.c void sumo_boost_state_enable(struct radeon_device *rdev, bool enable) rdev 216 drivers/gpu/drm/radeon/sumo_smc.c u32 sumo_get_running_fw_version(struct radeon_device *rdev) rdev 341 drivers/gpu/drm/radeon/trinity_dpm.c extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); rdev 342 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev, rdev 344 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev); rdev 345 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_apply_state_adjust_rules(struct radeon_device *rdev, rdev 356 drivers/gpu/drm/radeon/trinity_dpm.c static struct trinity_power_info *trinity_get_pi(struct radeon_device *rdev) rdev 358 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = rdev->pm.dpm.priv; rdev 363 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_gfx_powergating_initialize(struct radeon_device *rdev) rdev 365 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 369 drivers/gpu/drm/radeon/trinity_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 374 drivers/gpu/drm/radeon/trinity_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 394 drivers/gpu/drm/radeon/trinity_dpm.c trinity_override_dynamic_mg_powergating(rdev); rdev 403 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_mg_clockgating_enable(struct radeon_device *rdev, rdev 432 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_mg_clockgating_initialize(struct radeon_device *rdev) rdev 440 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_clk_gating_hw_sequence(rdev, seq, count); rdev 443 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_gfx_clockgating_enable(struct radeon_device *rdev, rdev 456 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev, rdev 465 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_override_mgpg_sequences(struct radeon_device *rdev, rdev 475 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev) rdev 483 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_override_mgpg_sequences(rdev, seq, count); rdev 486 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_ls_clockgating_enable(struct radeon_device *rdev, rdev 500 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_clk_gating_hw_sequence(rdev, seq, count); rdev 503 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_gfx_powergating_enable(struct radeon_device *rdev, rdev 517 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_gfx_dynamic_mgpg_enable(struct radeon_device *rdev, rdev 542 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_dynamic_mgpg_config(rdev); rdev 546 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_enable_clock_power_gating(struct radeon_device *rdev) rdev 548 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 551 drivers/gpu/drm/radeon/trinity_dpm.c sumo_gfx_clockgating_initialize(rdev); rdev 553 drivers/gpu/drm/radeon/trinity_dpm.c trinity_mg_clockgating_initialize(rdev); rdev 555 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_powergating_initialize(rdev); rdev 557 drivers/gpu/drm/radeon/trinity_dpm.c trinity_ls_clockgating_enable(rdev, true); rdev 558 drivers/gpu/drm/radeon/trinity_dpm.c trinity_mg_clockgating_enable(rdev, true); rdev 561 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_clockgating_enable(rdev, true); rdev 563 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_dynamic_mgpg_enable(rdev, true); rdev 565 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_powergating_enable(rdev, true); rdev 568 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_disable_clock_power_gating(struct radeon_device *rdev) rdev 570 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 573 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_powergating_enable(rdev, false); rdev 575 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_dynamic_mgpg_enable(rdev, false); rdev 577 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_clockgating_enable(rdev, false); rdev 579 drivers/gpu/drm/radeon/trinity_dpm.c trinity_mg_clockgating_enable(rdev, false); rdev 580 drivers/gpu/drm/radeon/trinity_dpm.c trinity_ls_clockgating_enable(rdev, false); rdev 584 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_divider_value(struct radeon_device *rdev, rdev 592 drivers/gpu/drm/radeon/trinity_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 602 drivers/gpu/drm/radeon/trinity_dpm.c ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, rdev 613 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_ds_dividers(struct radeon_device *rdev, rdev 625 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_ss_dividers(struct radeon_device *rdev, rdev 637 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_vid(struct radeon_device *rdev, u32 index, u32 vid) rdev 639 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 640 drivers/gpu/drm/radeon/trinity_dpm.c u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid); rdev 655 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_allos_gnb_slow(struct radeon_device *rdev, rdev 667 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_force_nbp_state(struct radeon_device *rdev, rdev 679 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_display_wm(struct radeon_device *rdev, rdev 691 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_vce_wm(struct radeon_device *rdev, rdev 703 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_at(struct radeon_device *rdev, rdev 715 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_power_level(struct radeon_device *rdev, rdev 718 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 723 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_divider_value(rdev, index, pl->sclk); rdev 724 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_vid(rdev, index, pl->vddc_index); rdev 725 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_ss_dividers(rdev, index, pl->ss_divider_index); rdev 726 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_ds_dividers(rdev, index, pl->ds_divider_index); rdev 727 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_allos_gnb_slow(rdev, index, pl->allow_gnb_slow); rdev 728 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_force_nbp_state(rdev, index, pl->force_nbp_state); rdev 729 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_display_wm(rdev, index, pl->display_wm); rdev 730 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_vce_wm(rdev, index, pl->vce_wm); rdev 731 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_at(rdev, index, pi->at[index]); rdev 734 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_power_level_enable_disable(struct radeon_device *rdev, rdev 747 drivers/gpu/drm/radeon/trinity_dpm.c static bool trinity_dpm_enabled(struct radeon_device *rdev) rdev 755 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_start_dpm(struct radeon_device *rdev) rdev 766 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_config(rdev, true); rdev 769 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_wait_for_dpm_enabled(struct radeon_device *rdev) rdev 773 drivers/gpu/drm/radeon/trinity_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 778 drivers/gpu/drm/radeon/trinity_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 783 drivers/gpu/drm/radeon/trinity_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 790 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_stop_dpm(struct radeon_device *rdev) rdev 800 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_config(rdev, false); rdev 803 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_start_am(struct radeon_device *rdev) rdev 808 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_reset_am(struct radeon_device *rdev) rdev 814 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_wait_for_level_0(struct radeon_device *rdev) rdev 818 drivers/gpu/drm/radeon/trinity_dpm.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 825 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_enable_power_level_0(struct radeon_device *rdev) rdev 827 drivers/gpu/drm/radeon/trinity_dpm.c trinity_power_level_enable_disable(rdev, 0, true); rdev 830 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_force_level_0(struct radeon_device *rdev) rdev 832 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_force_state(rdev, 0); rdev 835 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_unforce_levels(struct radeon_device *rdev) rdev 837 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_no_forced_level(rdev); rdev 840 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_power_levels_0_to_n(struct radeon_device *rdev, rdev 850 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_power_level(rdev, &new_ps->levels[i], i); rdev 851 drivers/gpu/drm/radeon/trinity_dpm.c trinity_power_level_enable_disable(rdev, i, true); rdev 855 drivers/gpu/drm/radeon/trinity_dpm.c trinity_power_level_enable_disable(rdev, i, false); rdev 858 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_bootup_state(struct radeon_device *rdev) rdev 860 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 863 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_power_level(rdev, &pi->boot_pl, 0); rdev 864 drivers/gpu/drm/radeon/trinity_dpm.c trinity_power_level_enable_disable(rdev, 0, true); rdev 867 drivers/gpu/drm/radeon/trinity_dpm.c trinity_power_level_enable_disable(rdev, i, false); rdev 870 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_setup_uvd_clock_table(struct radeon_device *rdev, rdev 882 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_setup_uvd_dpm_interval(struct radeon_device *rdev, rdev 888 drivers/gpu/drm/radeon/trinity_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 922 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_setup_uvd_clocks(struct radeon_device *rdev, rdev 926 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 929 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_powergating_enable(rdev, false); rdev 935 drivers/gpu/drm/radeon/trinity_dpm.c trinity_setup_uvd_dpm_interval(rdev, 0); rdev 937 drivers/gpu/drm/radeon/trinity_dpm.c trinity_setup_uvd_clock_table(rdev, new_rps); rdev 944 drivers/gpu/drm/radeon/trinity_dpm.c radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); rdev 946 drivers/gpu/drm/radeon/trinity_dpm.c trinity_setup_uvd_dpm_interval(rdev, 3000); rdev 949 drivers/gpu/drm/radeon/trinity_dpm.c trinity_uvd_dpm_config(rdev); rdev 955 drivers/gpu/drm/radeon/trinity_dpm.c radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); rdev 959 drivers/gpu/drm/radeon/trinity_dpm.c trinity_gfx_powergating_enable(rdev, true); rdev 963 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev, rdev 974 drivers/gpu/drm/radeon/trinity_dpm.c trinity_setup_uvd_clocks(rdev, new_rps, old_rps); rdev 977 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, rdev 988 drivers/gpu/drm/radeon/trinity_dpm.c trinity_setup_uvd_clocks(rdev, new_rps, old_rps); rdev 991 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_set_vce_clock(struct radeon_device *rdev, rdev 999 drivers/gpu/drm/radeon/trinity_dpm.c vce_v1_0_enable_mgcg(rdev, false); rdev 1001 drivers/gpu/drm/radeon/trinity_dpm.c vce_v1_0_enable_mgcg(rdev, true); rdev 1002 drivers/gpu/drm/radeon/trinity_dpm.c radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); rdev 1006 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_ttt(struct radeon_device *rdev) rdev 1008 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1017 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_enable_att(struct radeon_device *rdev) rdev 1026 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_program_sclk_dpm(struct radeon_device *rdev) rdev 1031 drivers/gpu/drm/radeon/trinity_dpm.c u32 xclk = radeon_get_xclk(rdev); rdev 1044 drivers/gpu/drm/radeon/trinity_dpm.c static int trinity_set_thermal_temperature_range(struct radeon_device *rdev, rdev 1062 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.thermal.min_temp = low_temp; rdev 1063 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.thermal.max_temp = high_temp; rdev 1068 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_update_current_ps(struct radeon_device *rdev, rdev 1072 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1079 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_update_requested_ps(struct radeon_device *rdev, rdev 1083 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1090 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable) rdev 1092 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1095 drivers/gpu/drm/radeon/trinity_dpm.c trinity_acquire_mutex(rdev); rdev 1096 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_bapm_enable(rdev, enable); rdev 1097 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1101 drivers/gpu/drm/radeon/trinity_dpm.c int trinity_dpm_enable(struct radeon_device *rdev) rdev 1103 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1105 drivers/gpu/drm/radeon/trinity_dpm.c trinity_acquire_mutex(rdev); rdev 1107 drivers/gpu/drm/radeon/trinity_dpm.c if (trinity_dpm_enabled(rdev)) { rdev 1108 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1112 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_bootup_state(rdev); rdev 1113 drivers/gpu/drm/radeon/trinity_dpm.c sumo_program_vc(rdev, 0x00C00033); rdev 1114 drivers/gpu/drm/radeon/trinity_dpm.c trinity_start_am(rdev); rdev 1116 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_ttt(rdev); rdev 1117 drivers/gpu/drm/radeon/trinity_dpm.c trinity_enable_att(rdev); rdev 1119 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_sclk_dpm(rdev); rdev 1120 drivers/gpu/drm/radeon/trinity_dpm.c trinity_start_dpm(rdev); rdev 1121 drivers/gpu/drm/radeon/trinity_dpm.c trinity_wait_for_dpm_enabled(rdev); rdev 1122 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_bapm_enable(rdev, false); rdev 1123 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1125 drivers/gpu/drm/radeon/trinity_dpm.c trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 1130 drivers/gpu/drm/radeon/trinity_dpm.c int trinity_dpm_late_enable(struct radeon_device *rdev) rdev 1134 drivers/gpu/drm/radeon/trinity_dpm.c trinity_acquire_mutex(rdev); rdev 1135 drivers/gpu/drm/radeon/trinity_dpm.c trinity_enable_clock_power_gating(rdev); rdev 1137 drivers/gpu/drm/radeon/trinity_dpm.c if (rdev->irq.installed && rdev 1138 drivers/gpu/drm/radeon/trinity_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1139 drivers/gpu/drm/radeon/trinity_dpm.c ret = trinity_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); rdev 1141 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1144 drivers/gpu/drm/radeon/trinity_dpm.c rdev->irq.dpm_thermal = true; rdev 1145 drivers/gpu/drm/radeon/trinity_dpm.c radeon_irq_set(rdev); rdev 1147 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1152 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_disable(struct radeon_device *rdev) rdev 1154 drivers/gpu/drm/radeon/trinity_dpm.c trinity_acquire_mutex(rdev); rdev 1155 drivers/gpu/drm/radeon/trinity_dpm.c if (!trinity_dpm_enabled(rdev)) { rdev 1156 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1159 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_bapm_enable(rdev, false); rdev 1160 drivers/gpu/drm/radeon/trinity_dpm.c trinity_disable_clock_power_gating(rdev); rdev 1161 drivers/gpu/drm/radeon/trinity_dpm.c sumo_clear_vc(rdev); rdev 1162 drivers/gpu/drm/radeon/trinity_dpm.c trinity_wait_for_level_0(rdev); rdev 1163 drivers/gpu/drm/radeon/trinity_dpm.c trinity_stop_dpm(rdev); rdev 1164 drivers/gpu/drm/radeon/trinity_dpm.c trinity_reset_am(rdev); rdev 1165 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1167 drivers/gpu/drm/radeon/trinity_dpm.c if (rdev->irq.installed && rdev 1168 drivers/gpu/drm/radeon/trinity_dpm.c r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { rdev 1169 drivers/gpu/drm/radeon/trinity_dpm.c rdev->irq.dpm_thermal = false; rdev 1170 drivers/gpu/drm/radeon/trinity_dpm.c radeon_irq_set(rdev); rdev 1173 drivers/gpu/drm/radeon/trinity_dpm.c trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps); rdev 1176 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_get_min_sclk_divider(struct radeon_device *rdev) rdev 1178 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1184 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_setup_nbp_sim(struct radeon_device *rdev, rdev 1187 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1202 drivers/gpu/drm/radeon/trinity_dpm.c int trinity_dpm_force_performance_level(struct radeon_device *rdev, rdev 1205 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1217 drivers/gpu/drm/radeon/trinity_dpm.c ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1); rdev 1222 drivers/gpu/drm/radeon/trinity_dpm.c ret = trinity_dpm_n_levels_disabled(rdev, 0); rdev 1228 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.forced_level = level; rdev 1233 drivers/gpu/drm/radeon/trinity_dpm.c int trinity_dpm_pre_set_power_state(struct radeon_device *rdev) rdev 1235 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1236 drivers/gpu/drm/radeon/trinity_dpm.c struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; rdev 1239 drivers/gpu/drm/radeon/trinity_dpm.c trinity_update_requested_ps(rdev, new_ps); rdev 1241 drivers/gpu/drm/radeon/trinity_dpm.c trinity_apply_state_adjust_rules(rdev, rdev 1248 drivers/gpu/drm/radeon/trinity_dpm.c int trinity_dpm_set_power_state(struct radeon_device *rdev) rdev 1250 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1254 drivers/gpu/drm/radeon/trinity_dpm.c trinity_acquire_mutex(rdev); rdev 1257 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power); rdev 1258 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); rdev 1259 drivers/gpu/drm/radeon/trinity_dpm.c trinity_enable_power_level_0(rdev); rdev 1260 drivers/gpu/drm/radeon/trinity_dpm.c trinity_force_level_0(rdev); rdev 1261 drivers/gpu/drm/radeon/trinity_dpm.c trinity_wait_for_level_0(rdev); rdev 1262 drivers/gpu/drm/radeon/trinity_dpm.c trinity_setup_nbp_sim(rdev, new_ps); rdev 1263 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_power_levels_0_to_n(rdev, new_ps, old_ps); rdev 1264 drivers/gpu/drm/radeon/trinity_dpm.c trinity_force_level_0(rdev); rdev 1265 drivers/gpu/drm/radeon/trinity_dpm.c trinity_unforce_levels(rdev); rdev 1266 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rdev 1267 drivers/gpu/drm/radeon/trinity_dpm.c trinity_set_vce_clock(rdev, new_ps, old_ps); rdev 1269 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1274 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_post_set_power_state(struct radeon_device *rdev) rdev 1276 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1279 drivers/gpu/drm/radeon/trinity_dpm.c trinity_update_current_ps(rdev, new_ps); rdev 1282 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_setup_asic(struct radeon_device *rdev) rdev 1284 drivers/gpu/drm/radeon/trinity_dpm.c trinity_acquire_mutex(rdev); rdev 1285 drivers/gpu/drm/radeon/trinity_dpm.c sumo_program_sstp(rdev); rdev 1286 drivers/gpu/drm/radeon/trinity_dpm.c sumo_take_smu_control(rdev, true); rdev 1287 drivers/gpu/drm/radeon/trinity_dpm.c trinity_get_min_sclk_divider(rdev); rdev 1288 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1292 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_reset_asic(struct radeon_device *rdev) rdev 1294 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1296 drivers/gpu/drm/radeon/trinity_dpm.c trinity_acquire_mutex(rdev); rdev 1298 drivers/gpu/drm/radeon/trinity_dpm.c trinity_enable_power_level_0(rdev); rdev 1299 drivers/gpu/drm/radeon/trinity_dpm.c trinity_force_level_0(rdev); rdev 1300 drivers/gpu/drm/radeon/trinity_dpm.c trinity_wait_for_level_0(rdev); rdev 1301 drivers/gpu/drm/radeon/trinity_dpm.c trinity_program_bootup_state(rdev); rdev 1302 drivers/gpu/drm/radeon/trinity_dpm.c trinity_force_level_0(rdev); rdev 1303 drivers/gpu/drm/radeon/trinity_dpm.c trinity_unforce_levels(rdev); rdev 1305 drivers/gpu/drm/radeon/trinity_dpm.c trinity_release_mutex(rdev); rdev 1309 drivers/gpu/drm/radeon/trinity_dpm.c static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev, rdev 1312 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1313 drivers/gpu/drm/radeon/trinity_dpm.c u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit); rdev 1324 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_patch_boot_state(struct radeon_device *rdev, rdev 1327 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1335 drivers/gpu/drm/radeon/trinity_dpm.c static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk) rdev 1342 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_construct_boot_state(struct radeon_device *rdev) rdev 1344 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1358 drivers/gpu/drm/radeon/trinity_dpm.c static u8 trinity_get_sleep_divider_id_from_clock(struct radeon_device *rdev, rdev 1361 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1382 drivers/gpu/drm/radeon/trinity_dpm.c static u32 trinity_get_valid_engine_clock(struct radeon_device *rdev, rdev 1385 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1399 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_patch_thermal_state(struct radeon_device *rdev, rdev 1403 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1423 drivers/gpu/drm/radeon/trinity_dpm.c trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); rdev 1429 drivers/gpu/drm/radeon/trinity_dpm.c trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); rdev 1432 drivers/gpu/drm/radeon/trinity_dpm.c static u8 trinity_calculate_display_wm(struct radeon_device *rdev, rdev 1452 drivers/gpu/drm/radeon/trinity_dpm.c static u32 trinity_get_uvd_clock_index(struct radeon_device *rdev, rdev 1455 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1471 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_adjust_uvd_state(struct radeon_device *rdev, rdev 1475 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1480 drivers/gpu/drm/radeon/trinity_dpm.c high_index = trinity_get_uvd_clock_index(rdev, rps); rdev 1505 drivers/gpu/drm/radeon/trinity_dpm.c static int trinity_get_vce_clock_voltage(struct radeon_device *rdev, rdev 1511 drivers/gpu/drm/radeon/trinity_dpm.c &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; rdev 1535 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_apply_state_adjust_rules(struct radeon_device *rdev, rdev 1541 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1548 drivers/gpu/drm/radeon/trinity_dpm.c u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count; rdev 1551 drivers/gpu/drm/radeon/trinity_dpm.c return trinity_patch_thermal_state(rdev, ps, current_ps); rdev 1553 drivers/gpu/drm/radeon/trinity_dpm.c trinity_adjust_uvd_state(rdev, new_rps); rdev 1556 drivers/gpu/drm/radeon/trinity_dpm.c new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; rdev 1557 drivers/gpu/drm/radeon/trinity_dpm.c new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; rdev 1569 drivers/gpu/drm/radeon/trinity_dpm.c trinity_get_valid_engine_clock(rdev, min_sclk); rdev 1574 drivers/gpu/drm/radeon/trinity_dpm.c if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) rdev 1575 drivers/gpu/drm/radeon/trinity_dpm.c ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; rdev 1577 drivers/gpu/drm/radeon/trinity_dpm.c trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage); rdev 1583 drivers/gpu/drm/radeon/trinity_dpm.c sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); rdev 1590 drivers/gpu/drm/radeon/trinity_dpm.c trinity_calculate_display_wm(rdev, ps, i); rdev 1592 drivers/gpu/drm/radeon/trinity_dpm.c trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); rdev 1620 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_cleanup_asic(struct radeon_device *rdev) rdev 1622 drivers/gpu/drm/radeon/trinity_dpm.c sumo_take_smu_control(rdev, false); rdev 1626 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_pre_display_configuration_change(struct radeon_device *rdev) rdev 1628 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1631 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dce_enable_voltage_adjustment(rdev, false); rdev 1635 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_add_dccac_value(struct radeon_device *rdev) rdev 1638 drivers/gpu/drm/radeon/trinity_dpm.c u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count; rdev 1639 drivers/gpu/drm/radeon/trinity_dpm.c u64 disp_clk = rdev->clock.default_dispclk / 100; rdev 1651 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_display_configuration_changed(struct radeon_device *rdev) rdev 1653 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1656 drivers/gpu/drm/radeon/trinity_dpm.c trinity_dce_enable_voltage_adjustment(rdev, true); rdev 1657 drivers/gpu/drm/radeon/trinity_dpm.c trinity_add_dccac_value(rdev); rdev 1681 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_parse_pplib_non_clock_info(struct radeon_device *rdev, rdev 1701 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.boot_ps = rps; rdev 1702 drivers/gpu/drm/radeon/trinity_dpm.c trinity_patch_boot_state(rdev, ps); rdev 1705 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.uvd_ps = rps; rdev 1708 drivers/gpu/drm/radeon/trinity_dpm.c static void trinity_parse_pplib_clock_info(struct radeon_device *rdev, rdev 1712 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1730 drivers/gpu/drm/radeon/trinity_dpm.c static int trinity_parse_power_table(struct radeon_device *rdev) rdev 1732 drivers/gpu/drm/radeon/trinity_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1762 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, rdev 1765 drivers/gpu/drm/radeon/trinity_dpm.c if (!rdev->pm.dpm.ps) rdev 1774 drivers/gpu/drm/radeon/trinity_dpm.c if (!rdev->pm.power_state[i].clock_info) rdev 1778 drivers/gpu/drm/radeon/trinity_dpm.c kfree(rdev->pm.dpm.ps); rdev 1781 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.ps[i].ps_priv = ps; rdev 1793 drivers/gpu/drm/radeon/trinity_dpm.c trinity_parse_pplib_clock_info(rdev, rdev 1794 drivers/gpu/drm/radeon/trinity_dpm.c &rdev->pm.dpm.ps[i], k, rdev 1798 drivers/gpu/drm/radeon/trinity_dpm.c trinity_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], rdev 1803 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.num_ps = state_array->ucNumEntries; rdev 1808 drivers/gpu/drm/radeon/trinity_dpm.c clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; rdev 1813 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.vce_states[i].sclk = sclk; rdev 1814 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.vce_states[i].mclk = 0; rdev 1828 drivers/gpu/drm/radeon/trinity_dpm.c static u32 trinity_convert_did_to_freq(struct radeon_device *rdev, u8 did) rdev 1830 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1847 drivers/gpu/drm/radeon/trinity_dpm.c static int trinity_parse_sys_info_table(struct radeon_device *rdev) rdev 1849 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 1850 drivers/gpu/drm/radeon/trinity_dpm.c struct radeon_mode_info *mode_info = &rdev->mode_info; rdev 1909 drivers/gpu/drm/radeon/trinity_dpm.c sumo_construct_sclk_voltage_mapping_table(rdev, rdev 1912 drivers/gpu/drm/radeon/trinity_dpm.c sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table, rdev 1935 drivers/gpu/drm/radeon/trinity_dpm.c trinity_convert_did_to_freq(rdev, rdev 1938 drivers/gpu/drm/radeon/trinity_dpm.c trinity_convert_did_to_freq(rdev, rdev 1948 drivers/gpu/drm/radeon/trinity_dpm.c int trinity_dpm_init(struct radeon_device *rdev) rdev 1956 drivers/gpu/drm/radeon/trinity_dpm.c rdev->pm.dpm.priv = pi; rdev 1968 drivers/gpu/drm/radeon/trinity_dpm.c if (rdev->pdev->subsystem_vendor == 0x1462) rdev 1988 drivers/gpu/drm/radeon/trinity_dpm.c ret = trinity_parse_sys_info_table(rdev); rdev 1992 drivers/gpu/drm/radeon/trinity_dpm.c trinity_construct_boot_state(rdev); rdev 1994 drivers/gpu/drm/radeon/trinity_dpm.c ret = r600_get_platform_caps(rdev); rdev 1998 drivers/gpu/drm/radeon/trinity_dpm.c ret = r600_parse_extended_power_table(rdev); rdev 2002 drivers/gpu/drm/radeon/trinity_dpm.c ret = trinity_parse_power_table(rdev); rdev 2012 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_print_power_state(struct radeon_device *rdev, rdev 2025 drivers/gpu/drm/radeon/trinity_dpm.c trinity_convert_voltage_index_to_value(rdev, pl->vddc_index)); rdev 2027 drivers/gpu/drm/radeon/trinity_dpm.c r600_dpm_print_ps_status(rdev, rps); rdev 2030 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, rdev 2033 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 2048 drivers/gpu/drm/radeon/trinity_dpm.c trinity_convert_voltage_index_to_value(rdev, pl->vddc_index)); rdev 2052 drivers/gpu/drm/radeon/trinity_dpm.c u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev) rdev 2054 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 2070 drivers/gpu/drm/radeon/trinity_dpm.c u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev) rdev 2072 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 2077 drivers/gpu/drm/radeon/trinity_dpm.c void trinity_dpm_fini(struct radeon_device *rdev) rdev 2081 drivers/gpu/drm/radeon/trinity_dpm.c trinity_cleanup_asic(rdev); /* ??? */ rdev 2083 drivers/gpu/drm/radeon/trinity_dpm.c for (i = 0; i < rdev->pm.dpm.num_ps; i++) { rdev 2084 drivers/gpu/drm/radeon/trinity_dpm.c kfree(rdev->pm.dpm.ps[i].ps_priv); rdev 2086 drivers/gpu/drm/radeon/trinity_dpm.c kfree(rdev->pm.dpm.ps); rdev 2087 drivers/gpu/drm/radeon/trinity_dpm.c kfree(rdev->pm.dpm.priv); rdev 2088 drivers/gpu/drm/radeon/trinity_dpm.c r600_free_extended_power_table(rdev); rdev 2091 drivers/gpu/drm/radeon/trinity_dpm.c u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low) rdev 2093 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 2102 drivers/gpu/drm/radeon/trinity_dpm.c u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low) rdev 2104 drivers/gpu/drm/radeon/trinity_dpm.c struct trinity_power_info *pi = trinity_get_pi(rdev); rdev 122 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable); rdev 123 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_dpm_config(struct radeon_device *rdev, bool enable); rdev 124 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_uvd_dpm_config(struct radeon_device *rdev); rdev 125 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_dpm_force_state(struct radeon_device *rdev, u32 n); rdev 126 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n); rdev 127 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_dpm_no_forced_level(struct radeon_device *rdev); rdev 128 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev, rdev 130 drivers/gpu/drm/radeon/trinity_dpm.h int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev); rdev 131 drivers/gpu/drm/radeon/trinity_dpm.h void trinity_acquire_mutex(struct radeon_device *rdev); rdev 132 drivers/gpu/drm/radeon/trinity_dpm.h void trinity_release_mutex(struct radeon_device *rdev); rdev 29 drivers/gpu/drm/radeon/trinity_smc.c static int trinity_notify_message_to_smu(struct radeon_device *rdev, u32 id) rdev 35 drivers/gpu/drm/radeon/trinity_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 55 drivers/gpu/drm/radeon/trinity_smc.c int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable) rdev 58 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_EnableBAPM); rdev 60 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DisableBAPM); rdev 63 drivers/gpu/drm/radeon/trinity_smc.c int trinity_dpm_config(struct radeon_device *rdev, bool enable) rdev 70 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_Config); rdev 73 drivers/gpu/drm/radeon/trinity_smc.c int trinity_dpm_force_state(struct radeon_device *rdev, u32 n) rdev 77 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_ForceState); rdev 80 drivers/gpu/drm/radeon/trinity_smc.c int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n) rdev 84 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_N_LevelsDisabled); rdev 87 drivers/gpu/drm/radeon/trinity_smc.c int trinity_uvd_dpm_config(struct radeon_device *rdev) rdev 89 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_UVD_DPM_Config); rdev 92 drivers/gpu/drm/radeon/trinity_smc.c int trinity_dpm_no_forced_level(struct radeon_device *rdev) rdev 94 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); rdev 97 drivers/gpu/drm/radeon/trinity_smc.c int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev, rdev 101 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DCE_AllowVoltageAdjustment); rdev 103 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DCE_RemoveVoltageAdjustment); rdev 106 drivers/gpu/drm/radeon/trinity_smc.c int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev) rdev 108 drivers/gpu/drm/radeon/trinity_smc.c return trinity_notify_message_to_smu(rdev, PPSMC_MSG_PG_SIMD_Config); rdev 111 drivers/gpu/drm/radeon/trinity_smc.c void trinity_acquire_mutex(struct radeon_device *rdev) rdev 116 drivers/gpu/drm/radeon/trinity_smc.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 123 drivers/gpu/drm/radeon/trinity_smc.c void trinity_release_mutex(struct radeon_device *rdev) rdev 39 drivers/gpu/drm/radeon/uvd_v1_0.c uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, rdev 53 drivers/gpu/drm/radeon/uvd_v1_0.c uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev, rdev 67 drivers/gpu/drm/radeon/uvd_v1_0.c void uvd_v1_0_set_wptr(struct radeon_device *rdev, rdev 81 drivers/gpu/drm/radeon/uvd_v1_0.c void uvd_v1_0_fence_emit(struct radeon_device *rdev, rdev 84 drivers/gpu/drm/radeon/uvd_v1_0.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 85 drivers/gpu/drm/radeon/uvd_v1_0.c uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 110 drivers/gpu/drm/radeon/uvd_v1_0.c int uvd_v1_0_resume(struct radeon_device *rdev) rdev 116 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_uvd_resume(rdev); rdev 121 drivers/gpu/drm/radeon/uvd_v1_0.c addr = (rdev->uvd.gpu_addr >> 3) + 16; rdev 122 drivers/gpu/drm/radeon/uvd_v1_0.c size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size) >> 3; rdev 133 drivers/gpu/drm/radeon/uvd_v1_0.c (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3; rdev 138 drivers/gpu/drm/radeon/uvd_v1_0.c addr = (rdev->uvd.gpu_addr >> 28) & 0xF; rdev 142 drivers/gpu/drm/radeon/uvd_v1_0.c addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; rdev 145 drivers/gpu/drm/radeon/uvd_v1_0.c WREG32(UVD_FW_START, *((uint32_t*)rdev->uvd.cpu_addr)); rdev 157 drivers/gpu/drm/radeon/uvd_v1_0.c int uvd_v1_0_init(struct radeon_device *rdev) rdev 159 drivers/gpu/drm/radeon/uvd_v1_0.c struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 164 drivers/gpu/drm/radeon/uvd_v1_0.c if (rdev->family < CHIP_RV740) rdev 165 drivers/gpu/drm/radeon/uvd_v1_0.c radeon_set_uvd_clocks(rdev, 10000, 10000); rdev 167 drivers/gpu/drm/radeon/uvd_v1_0.c radeon_set_uvd_clocks(rdev, 53300, 40000); rdev 169 drivers/gpu/drm/radeon/uvd_v1_0.c r = uvd_v1_0_start(rdev); rdev 174 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_ring_test(rdev, R600_RING_TYPE_UVD_INDEX, ring); rdev 180 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_ring_lock(rdev, ring, 10); rdev 205 drivers/gpu/drm/radeon/uvd_v1_0.c radeon_ring_unlock_commit(rdev, ring, false); rdev 209 drivers/gpu/drm/radeon/uvd_v1_0.c radeon_set_uvd_clocks(rdev, 0, 0); rdev 212 drivers/gpu/drm/radeon/uvd_v1_0.c switch (rdev->family) { rdev 248 drivers/gpu/drm/radeon/uvd_v1_0.c void uvd_v1_0_fini(struct radeon_device *rdev) rdev 250 drivers/gpu/drm/radeon/uvd_v1_0.c struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 252 drivers/gpu/drm/radeon/uvd_v1_0.c uvd_v1_0_stop(rdev); rdev 263 drivers/gpu/drm/radeon/uvd_v1_0.c int uvd_v1_0_start(struct radeon_device *rdev) rdev 265 drivers/gpu/drm/radeon/uvd_v1_0.c struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; rdev 391 drivers/gpu/drm/radeon/uvd_v1_0.c void uvd_v1_0_stop(struct radeon_device *rdev) rdev 421 drivers/gpu/drm/radeon/uvd_v1_0.c int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 428 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_ring_lock(rdev, ring, 3); rdev 436 drivers/gpu/drm/radeon/uvd_v1_0.c radeon_ring_unlock_commit(rdev, ring, false); rdev 437 drivers/gpu/drm/radeon/uvd_v1_0.c for (i = 0; i < rdev->usec_timeout; i++) { rdev 444 drivers/gpu/drm/radeon/uvd_v1_0.c if (i < rdev->usec_timeout) { rdev 465 drivers/gpu/drm/radeon/uvd_v1_0.c bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, rdev 482 drivers/gpu/drm/radeon/uvd_v1_0.c void uvd_v1_0_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) rdev 484 drivers/gpu/drm/radeon/uvd_v1_0.c struct radeon_ring *ring = &rdev->ring[ib->ring]; rdev 500 drivers/gpu/drm/radeon/uvd_v1_0.c int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) rdev 505 drivers/gpu/drm/radeon/uvd_v1_0.c if (rdev->family < CHIP_RV740) rdev 506 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_set_uvd_clocks(rdev, 10000, 10000); rdev 508 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_set_uvd_clocks(rdev, 53300, 40000); rdev 514 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_uvd_get_create_msg(rdev, ring->idx, 1, NULL); rdev 520 drivers/gpu/drm/radeon/uvd_v1_0.c r = radeon_uvd_get_destroy_msg(rdev, ring->idx, 1, &fence); rdev 540 drivers/gpu/drm/radeon/uvd_v1_0.c radeon_set_uvd_clocks(rdev, 0, 0); rdev 39 drivers/gpu/drm/radeon/uvd_v2_2.c void uvd_v2_2_fence_emit(struct radeon_device *rdev, rdev 42 drivers/gpu/drm/radeon/uvd_v2_2.c struct radeon_ring *ring = &rdev->ring[fence->ring]; rdev 43 drivers/gpu/drm/radeon/uvd_v2_2.c uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; rdev 72 drivers/gpu/drm/radeon/uvd_v2_2.c bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev, rdev 98 drivers/gpu/drm/radeon/uvd_v2_2.c int uvd_v2_2_resume(struct radeon_device *rdev) rdev 105 drivers/gpu/drm/radeon/uvd_v2_2.c if (rdev->family == CHIP_RV770) rdev 106 drivers/gpu/drm/radeon/uvd_v2_2.c return uvd_v1_0_resume(rdev); rdev 108 drivers/gpu/drm/radeon/uvd_v2_2.c r = radeon_uvd_resume(rdev); rdev 113 drivers/gpu/drm/radeon/uvd_v2_2.c addr = rdev->uvd.gpu_addr >> 3; rdev 114 drivers/gpu/drm/radeon/uvd_v2_2.c size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3; rdev 125 drivers/gpu/drm/radeon/uvd_v2_2.c (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3; rdev 130 drivers/gpu/drm/radeon/uvd_v2_2.c addr = (rdev->uvd.gpu_addr >> 28) & 0xF; rdev 134 drivers/gpu/drm/radeon/uvd_v2_2.c addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; rdev 138 drivers/gpu/drm/radeon/uvd_v2_2.c switch (rdev->family) { rdev 39 drivers/gpu/drm/radeon/uvd_v3_1.c bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, rdev 38 drivers/gpu/drm/radeon/uvd_v4_2.c int uvd_v4_2_resume(struct radeon_device *rdev) rdev 46 drivers/gpu/drm/radeon/uvd_v4_2.c if (rdev->uvd.fw_header_present) rdev 47 drivers/gpu/drm/radeon/uvd_v4_2.c addr = (rdev->uvd.gpu_addr + 0x200) >> 3; rdev 49 drivers/gpu/drm/radeon/uvd_v4_2.c addr = rdev->uvd.gpu_addr >> 3; rdev 51 drivers/gpu/drm/radeon/uvd_v4_2.c size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3; rdev 62 drivers/gpu/drm/radeon/uvd_v4_2.c (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3; rdev 67 drivers/gpu/drm/radeon/uvd_v4_2.c addr = (rdev->uvd.gpu_addr >> 28) & 0xF; rdev 71 drivers/gpu/drm/radeon/uvd_v4_2.c addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; rdev 74 drivers/gpu/drm/radeon/uvd_v4_2.c if (rdev->uvd.fw_header_present) rdev 75 drivers/gpu/drm/radeon/uvd_v4_2.c WREG32(UVD_GP_SCRATCH4, rdev->uvd.max_handles); rdev 59 drivers/gpu/drm/radeon/vce_v1_0.c uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev, rdev 76 drivers/gpu/drm/radeon/vce_v1_0.c uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, rdev 93 drivers/gpu/drm/radeon/vce_v1_0.c void vce_v1_0_set_wptr(struct radeon_device *rdev, rdev 102 drivers/gpu/drm/radeon/vce_v1_0.c void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable) rdev 106 drivers/gpu/drm/radeon/vce_v1_0.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_VCE_MGCG)) { rdev 135 drivers/gpu/drm/radeon/vce_v1_0.c static void vce_v1_0_init_cg(struct radeon_device *rdev) rdev 157 drivers/gpu/drm/radeon/vce_v1_0.c int vce_v1_0_load_fw(struct radeon_device *rdev, uint32_t *data) rdev 159 drivers/gpu/drm/radeon/vce_v1_0.c struct vce_v1_0_fw_signature *sign = (void*)rdev->vce_fw->data; rdev 163 drivers/gpu/drm/radeon/vce_v1_0.c switch (rdev->family) { rdev 197 drivers/gpu/drm/radeon/vce_v1_0.c memcpy(&data[16], &sign[1], rdev->vce_fw->size - sizeof(*sign)); rdev 205 drivers/gpu/drm/radeon/vce_v1_0.c rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect); rdev 210 drivers/gpu/drm/radeon/vce_v1_0.c unsigned vce_v1_0_bo_size(struct radeon_device *rdev) rdev 212 drivers/gpu/drm/radeon/vce_v1_0.c WARN_ON(VCE_V1_0_FW_SIZE < rdev->vce_fw->size); rdev 216 drivers/gpu/drm/radeon/vce_v1_0.c int vce_v1_0_resume(struct radeon_device *rdev) rdev 218 drivers/gpu/drm/radeon/vce_v1_0.c uint64_t addr = rdev->vce.gpu_addr; rdev 254 drivers/gpu/drm/radeon/vce_v1_0.c WREG32(VCE_LMI_FW_START_KEYSEL, rdev->vce.keyselect); rdev 277 drivers/gpu/drm/radeon/vce_v1_0.c vce_v1_0_init_cg(rdev); rdev 289 drivers/gpu/drm/radeon/vce_v1_0.c int vce_v1_0_start(struct radeon_device *rdev) rdev 297 drivers/gpu/drm/radeon/vce_v1_0.c ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; rdev 304 drivers/gpu/drm/radeon/vce_v1_0.c ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; rdev 356 drivers/gpu/drm/radeon/vce_v1_0.c int vce_v1_0_init(struct radeon_device *rdev) rdev 361 drivers/gpu/drm/radeon/vce_v1_0.c r = vce_v1_0_start(rdev); rdev 365 drivers/gpu/drm/radeon/vce_v1_0.c ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; rdev 367 drivers/gpu/drm/radeon/vce_v1_0.c r = radeon_ring_test(rdev, TN_RING_TYPE_VCE1_INDEX, ring); rdev 373 drivers/gpu/drm/radeon/vce_v1_0.c ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; rdev 375 drivers/gpu/drm/radeon/vce_v1_0.c r = radeon_ring_test(rdev, TN_RING_TYPE_VCE2_INDEX, ring); rdev 38 drivers/gpu/drm/radeon/vce_v2_0.c static void vce_v2_0_set_sw_cg(struct radeon_device *rdev, bool gated) rdev 73 drivers/gpu/drm/radeon/vce_v2_0.c static void vce_v2_0_set_dyn_cg(struct radeon_device *rdev, bool gated) rdev 102 drivers/gpu/drm/radeon/vce_v2_0.c static void vce_v2_0_disable_cg(struct radeon_device *rdev) rdev 111 drivers/gpu/drm/radeon/vce_v2_0.c void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable) rdev 115 drivers/gpu/drm/radeon/vce_v2_0.c if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_VCE_MGCG)) { rdev 117 drivers/gpu/drm/radeon/vce_v2_0.c vce_v2_0_set_sw_cg(rdev, true); rdev 119 drivers/gpu/drm/radeon/vce_v2_0.c vce_v2_0_set_dyn_cg(rdev, true); rdev 121 drivers/gpu/drm/radeon/vce_v2_0.c vce_v2_0_disable_cg(rdev); rdev 124 drivers/gpu/drm/radeon/vce_v2_0.c vce_v2_0_set_sw_cg(rdev, false); rdev 126 drivers/gpu/drm/radeon/vce_v2_0.c vce_v2_0_set_dyn_cg(rdev, false); rdev 130 drivers/gpu/drm/radeon/vce_v2_0.c static void vce_v2_0_init_cg(struct radeon_device *rdev) rdev 151 drivers/gpu/drm/radeon/vce_v2_0.c unsigned vce_v2_0_bo_size(struct radeon_device *rdev) rdev 153 drivers/gpu/drm/radeon/vce_v2_0.c WARN_ON(rdev->vce_fw->size > VCE_V2_0_FW_SIZE); rdev 157 drivers/gpu/drm/radeon/vce_v2_0.c int vce_v2_0_resume(struct radeon_device *rdev) rdev 159 drivers/gpu/drm/radeon/vce_v2_0.c uint64_t addr = rdev->vce.gpu_addr; rdev 195 drivers/gpu/drm/radeon/vce_v2_0.c vce_v2_0_init_cg(rdev); rdev 97 drivers/hid/hid-picolcd_cir.c struct rc_dev *rdev; rdev 100 drivers/hid/hid-picolcd_cir.c rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 101 drivers/hid/hid-picolcd_cir.c if (!rdev) rdev 104 drivers/hid/hid-picolcd_cir.c rdev->priv = data; rdev 105 drivers/hid/hid-picolcd_cir.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 106 drivers/hid/hid-picolcd_cir.c rdev->open = picolcd_cir_open; rdev 107 drivers/hid/hid-picolcd_cir.c rdev->close = picolcd_cir_close; rdev 108 drivers/hid/hid-picolcd_cir.c rdev->device_name = data->hdev->name; rdev 109 drivers/hid/hid-picolcd_cir.c rdev->input_phys = data->hdev->phys; rdev 110 drivers/hid/hid-picolcd_cir.c rdev->input_id.bustype = data->hdev->bus; rdev 111 drivers/hid/hid-picolcd_cir.c rdev->input_id.vendor = data->hdev->vendor; rdev 112 drivers/hid/hid-picolcd_cir.c rdev->input_id.product = data->hdev->product; rdev 113 drivers/hid/hid-picolcd_cir.c rdev->input_id.version = data->hdev->version; rdev 114 drivers/hid/hid-picolcd_cir.c rdev->dev.parent = &data->hdev->dev; rdev 115 drivers/hid/hid-picolcd_cir.c rdev->driver_name = PICOLCD_NAME; rdev 116 drivers/hid/hid-picolcd_cir.c rdev->map_name = RC_MAP_RC6_MCE; rdev 117 drivers/hid/hid-picolcd_cir.c rdev->timeout = MS_TO_NS(100); rdev 118 drivers/hid/hid-picolcd_cir.c rdev->rx_resolution = US_TO_NS(1); rdev 120 drivers/hid/hid-picolcd_cir.c ret = rc_register_device(rdev); rdev 123 drivers/hid/hid-picolcd_cir.c data->rc_dev = rdev; rdev 127 drivers/hid/hid-picolcd_cir.c rc_free_device(rdev); rdev 133 drivers/hid/hid-picolcd_cir.c struct rc_dev *rdev = data->rc_dev; rdev 136 drivers/hid/hid-picolcd_cir.c rc_unregister_device(rdev); rdev 2173 drivers/hwmon/pmbus/pmbus_core.c static int pmbus_regulator_is_enabled(struct regulator_dev *rdev) rdev 2175 drivers/hwmon/pmbus/pmbus_core.c struct device *dev = rdev_get_dev(rdev); rdev 2177 drivers/hwmon/pmbus/pmbus_core.c u8 page = rdev_get_id(rdev); rdev 2187 drivers/hwmon/pmbus/pmbus_core.c static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable) rdev 2189 drivers/hwmon/pmbus/pmbus_core.c struct device *dev = rdev_get_dev(rdev); rdev 2191 drivers/hwmon/pmbus/pmbus_core.c u8 page = rdev_get_id(rdev); rdev 2198 drivers/hwmon/pmbus/pmbus_core.c static int pmbus_regulator_enable(struct regulator_dev *rdev) rdev 2200 drivers/hwmon/pmbus/pmbus_core.c return _pmbus_regulator_on_off(rdev, 1); rdev 2203 drivers/hwmon/pmbus/pmbus_core.c static int pmbus_regulator_disable(struct regulator_dev *rdev) rdev 2205 drivers/hwmon/pmbus/pmbus_core.c return _pmbus_regulator_on_off(rdev, 0); rdev 2220 drivers/hwmon/pmbus/pmbus_core.c struct regulator_dev *rdev; rdev 2232 drivers/hwmon/pmbus/pmbus_core.c rdev = devm_regulator_register(dev, &info->reg_desc[i], rdev 2234 drivers/hwmon/pmbus/pmbus_core.c if (IS_ERR(rdev)) { rdev 2237 drivers/hwmon/pmbus/pmbus_core.c return PTR_ERR(rdev); rdev 187 drivers/hwtracing/coresight/coresight-platform.c struct device *rdev = NULL; rdev 209 drivers/hwtracing/coresight/coresight-platform.c rdev = coresight_find_device_by_fwnode(rdev_fwnode); rdev 210 drivers/hwtracing/coresight/coresight-platform.c if (!rdev) { rdev 232 drivers/hwtracing/coresight/coresight-platform.c put_device(rdev); rdev 596 drivers/hwtracing/coresight/coresight-platform.c struct device *rdev; rdev 618 drivers/hwtracing/coresight/coresight-platform.c rdev = coresight_find_device_by_fwnode(&r_adev->fwnode); rdev 619 drivers/hwtracing/coresight/coresight-platform.c if (!rdev) rdev 95 drivers/infiniband/hw/bnxt_re/bnxt_re.h struct bnxt_re_dev *rdev; rdev 184 drivers/infiniband/hw/bnxt_re/bnxt_re.h static inline struct device *rdev_to_dev(struct bnxt_re_dev *rdev) rdev 186 drivers/infiniband/hw/bnxt_re/bnxt_re.h if (rdev) rdev 187 drivers/infiniband/hw/bnxt_re/bnxt_re.h return &rdev->ibdev.dev; rdev 119 drivers/infiniband/hw/bnxt_re/hw_counters.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 120 drivers/infiniband/hw/bnxt_re/hw_counters.c struct ctx_hw_stats *bnxt_re_stats = rdev->qplib_ctx.stats.dma; rdev 126 drivers/infiniband/hw/bnxt_re/hw_counters.c stats->value[BNXT_RE_ACTIVE_QP] = atomic_read(&rdev->qp_count); rdev 127 drivers/infiniband/hw/bnxt_re/hw_counters.c stats->value[BNXT_RE_ACTIVE_SRQ] = atomic_read(&rdev->srq_count); rdev 128 drivers/infiniband/hw/bnxt_re/hw_counters.c stats->value[BNXT_RE_ACTIVE_CQ] = atomic_read(&rdev->cq_count); rdev 129 drivers/infiniband/hw/bnxt_re/hw_counters.c stats->value[BNXT_RE_ACTIVE_MR] = atomic_read(&rdev->mr_count); rdev 130 drivers/infiniband/hw/bnxt_re/hw_counters.c stats->value[BNXT_RE_ACTIVE_MW] = atomic_read(&rdev->mw_count); rdev 147 drivers/infiniband/hw/bnxt_re/hw_counters.c if (test_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags)) { rdev 148 drivers/infiniband/hw/bnxt_re/hw_counters.c rc = bnxt_qplib_get_roce_stats(&rdev->rcfw, &rdev->stats); rdev 151 drivers/infiniband/hw/bnxt_re/hw_counters.c &rdev->flags); rdev 153 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.to_retransmits; rdev 155 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.seq_err_naks_rcvd; rdev 157 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.max_retry_exceeded; rdev 159 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.rnr_naks_rcvd; rdev 161 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.missing_resp; rdev 163 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.unrecoverable_err; rdev 165 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.bad_resp_err; rdev 167 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.local_qp_op_err; rdev 169 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.local_protection_err; rdev 171 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.mem_mgmt_op_err; rdev 173 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.remote_invalid_req_err; rdev 175 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.remote_access_err; rdev 177 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.remote_op_err; rdev 179 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.dup_req; rdev 181 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_exceed_max; rdev 183 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_length_mismatch; rdev 185 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_exceeds_wqe; rdev 187 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_opcode_err; rdev 189 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_rx_invalid_rkey; rdev 191 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_rx_domain_err; rdev 193 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_rx_no_perm; rdev 195 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_rx_range_err; rdev 197 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_tx_invalid_rkey; rdev 199 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_tx_domain_err; rdev 201 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_tx_no_perm; rdev 203 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_tx_range_err; rdev 205 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_irrq_oflow; rdev 207 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_unsup_opcode; rdev 209 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_unaligned_atomic; rdev 211 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_rem_inv_err; rdev 213 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_mem_error; rdev 215 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_srq_err; rdev 217 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_cmp_err; rdev 219 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_invalid_dup_rkey; rdev 221 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_wqe_format_err; rdev 223 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_cq_load_err; rdev 225 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_srq_load_err; rdev 227 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_tx_pci_err; rdev 229 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_rx_pci_err; rdev 231 drivers/infiniband/hw/bnxt_re/hw_counters.c rdev->stats.res_oos_drop_count; rdev 126 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 127 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 133 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_get_guid(rdev->netdev->dev_addr, rdev 138 drivers/infiniband/hw/bnxt_re/ib_verbs.c ib_attr->vendor_id = rdev->en_dev->pdev->vendor; rdev 139 drivers/infiniband/hw/bnxt_re/ib_verbs.c ib_attr->vendor_part_id = rdev->en_dev->pdev->device; rdev 140 drivers/infiniband/hw/bnxt_re/ib_verbs.c ib_attr->hw_ver = rdev->en_dev->pdev->subsystem_device; rdev 216 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 217 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 221 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev)) { rdev 229 drivers/infiniband/hw/bnxt_re/ib_verbs.c port_attr->active_mtu = iboe_get_mtu(rdev->netdev->mtu); rdev 247 drivers/infiniband/hw/bnxt_re/ib_verbs.c port_attr->active_speed = rdev->active_speed; rdev 248 drivers/infiniband/hw/bnxt_re/ib_verbs.c port_attr->active_width = rdev->active_width; rdev 271 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 274 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->dev_attr.fw_ver[0], rdev->dev_attr.fw_ver[1], rdev 275 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->dev_attr.fw_ver[2], rdev->dev_attr.fw_ver[3]); rdev 281 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 286 drivers/infiniband/hw/bnxt_re/ib_verbs.c return bnxt_qplib_get_pkey(&rdev->qplib_res, rdev 287 drivers/infiniband/hw/bnxt_re/ib_verbs.c &rdev->qplib_res.pkey_tbl, index, pkey); rdev 293 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 298 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_get_sgid(&rdev->qplib_res, rdev 299 drivers/infiniband/hw/bnxt_re/ib_verbs.c &rdev->qplib_res.sgid_tbl, index, rdev 308 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(attr->device, ibdev); rdev 309 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; rdev 333 drivers/infiniband/hw/bnxt_re/ib_verbs.c ctx->refcnt == 1 && rdev->qp1_sqp) { rdev 334 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_dbg(rdev_to_dev(rdev), rdev 343 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 363 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(attr->device, ibdev); rdev 364 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; rdev 371 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->qplib_res.netdev->dev_addr, rdev 381 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to add GID: %#x", rc); rdev 444 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_dbg(rdev_to_dev(qp->rdev), rdev 449 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(qp->rdev), "Failed to bind fence-WQE\n"); rdev 460 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 461 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct device *dev = &rdev->en_dev->pdev->dev; rdev 470 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_dereg_mrw(&rdev->qplib_res, &mr->qplib_mr, rdev 473 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 488 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 489 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct device *dev = &rdev->en_dev->pdev->dev; rdev 500 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to dma-map fence-MR-mem\n"); rdev 514 drivers/infiniband/hw/bnxt_re/ib_verbs.c mr->rdev = rdev; rdev 518 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 520 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to alloc fence-HW-MR\n"); rdev 529 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &mr->qplib_mr, &pbl_tbl, rdev 532 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to register fence-MR\n"); rdev 540 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 559 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 564 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_dealloc_pd(&rdev->qplib_res, &rdev->qplib_res.pd_tbl, rdev 571 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 577 drivers/infiniband/hw/bnxt_re/ib_verbs.c pd->rdev = rdev; rdev 578 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (bnxt_qplib_alloc_pd(&rdev->qplib_res.pd_tbl, &pd->qplib_pd)) { rdev 579 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to allocate HW PD"); rdev 592 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, rdev 606 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 614 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_warn(rdev_to_dev(rdev), rdev 618 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_dealloc_pd(&rdev->qplib_res, &rdev->qplib_res.pd_tbl, rdev 628 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = ah->rdev; rdev 630 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_ah(&rdev->qplib_res, &ah->qplib_ah, rdev 658 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 665 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to alloc AH: GRH not set"); rdev 669 drivers/infiniband/hw/bnxt_re/ib_verbs.c ah->rdev = rdev; rdev 693 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_create_ah(&rdev->qplib_res, &ah->qplib_ah, rdev 696 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to allocate HW AH"); rdev 767 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = qp->rdev; rdev 772 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_destroy_qp(&rdev->qplib_res, &qp->qplib_qp); rdev 774 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to destroy HW QP"); rdev 784 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_free_qp_res(&rdev->qplib_res, &qp->qplib_qp); rdev 786 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (ib_qp->qp_type == IB_QPT_GSI && rdev->qp1_sqp) { rdev 787 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_ah(&rdev->qplib_res, &rdev->sqp_ah->qplib_ah, rdev 791 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_destroy_qp(&rdev->qplib_res, rdev 792 drivers/infiniband/hw/bnxt_re/ib_verbs.c &rdev->qp1_sqp->qplib_qp); rdev 794 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 798 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_free_qp_res(&rdev->qplib_res, rdev 799 drivers/infiniband/hw/bnxt_re/ib_verbs.c &rdev->qp1_sqp->qplib_qp); rdev 800 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_lock(&rdev->qp_lock); rdev 801 drivers/infiniband/hw/bnxt_re/ib_verbs.c list_del(&rdev->qp1_sqp->list); rdev 802 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_dec(&rdev->qp_count); rdev 803 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_unlock(&rdev->qp_lock); rdev 805 drivers/infiniband/hw/bnxt_re/ib_verbs.c kfree(rdev->sqp_ah); rdev 806 drivers/infiniband/hw/bnxt_re/ib_verbs.c kfree(rdev->qp1_sqp); rdev 807 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->qp1_sqp = NULL; rdev 808 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->sqp_ah = NULL; rdev 814 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_lock(&rdev->qp_lock); rdev 816 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_dec(&rdev->qp_count); rdev 817 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_unlock(&rdev->qp_lock); rdev 836 drivers/infiniband/hw/bnxt_re/ib_verbs.c static int bnxt_re_init_user_qp(struct bnxt_re_dev *rdev, struct bnxt_re_pd *pd, rdev 852 drivers/infiniband/hw/bnxt_re/ib_verbs.c psn_sz = bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx) ? rdev 896 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 905 drivers/infiniband/hw/bnxt_re/ib_verbs.c ah->rdev = rdev; rdev 908 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_re_query_gid(&rdev->ibdev, 1, 0, &sgid); rdev 922 drivers/infiniband/hw/bnxt_re/ib_verbs.c ether_addr_copy(ah->qplib_ah.dmac, rdev->netdev->dev_addr); rdev 924 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_create_ah(&rdev->qplib_res, &ah->qplib_ah, false); rdev 926 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 943 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 951 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->rdev = rdev; rdev 954 drivers/infiniband/hw/bnxt_re/ib_verbs.c ether_addr_copy(qp->qplib_qp.smac, rdev->netdev->dev_addr); rdev 981 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->qplib_qp.dpi = &rdev->dpi_privileged; rdev 987 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->sqp_id = qp->qplib_qp.id; rdev 991 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_lock(&rdev->qp_lock); rdev 992 drivers/infiniband/hw/bnxt_re/ib_verbs.c list_add_tail(&qp->list, &rdev->qp_list); rdev 993 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->qp_count); rdev 994 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_unlock(&rdev->qp_lock); rdev 1006 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 1007 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 1024 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->rdev = rdev; rdev 1025 drivers/infiniband/hw/bnxt_re/ib_verbs.c ether_addr_copy(qp->qplib_qp.smac, rdev->netdev->dev_addr); rdev 1031 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx)) rdev 1034 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "QP type 0x%x not supported", rdev 1052 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Send CQ not found"); rdev 1064 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Receive CQ not found"); rdev 1076 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "SRQ not found"); rdev 1098 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->qplib_qp.mtu = ib_mtu_enum_to_int(iboe_get_mtu(rdev->netdev->mtu)); rdev 1101 drivers/infiniband/hw/bnxt_re/ib_verbs.c !(bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx))) { rdev 1120 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->qplib_qp.dpi = &rdev->dpi_privileged; rdev 1121 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_create_qp1(&rdev->qplib_res, &qp->qplib_qp); rdev 1123 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to create HW QP1"); rdev 1127 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->qp1_sqp = bnxt_re_create_shadow_qp(pd, &rdev->qplib_res, rdev 1129 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (!rdev->qp1_sqp) { rdev 1131 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1135 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev->sqp_ah = bnxt_re_create_shadow_qp_ah(pd, &rdev->qplib_res, rdev 1137 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (!rdev->sqp_ah) { rdev 1138 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_qp(&rdev->qplib_res, rdev 1139 drivers/infiniband/hw/bnxt_re/ib_verbs.c &rdev->qp1_sqp->qplib_qp); rdev 1141 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1166 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_re_init_user_qp(rdev, pd, qp, udata); rdev 1170 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->qplib_qp.dpi = &rdev->dpi_privileged; rdev 1173 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_create_qp(&rdev->qplib_res, &qp->qplib_qp); rdev 1175 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to create HW QP"); rdev 1191 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to copy QP udata"); rdev 1196 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_lock(&rdev->qp_lock); rdev 1197 drivers/infiniband/hw/bnxt_re/ib_verbs.c list_add_tail(&qp->list, &rdev->qp_list); rdev 1198 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->qp_count); rdev 1199 drivers/infiniband/hw/bnxt_re/ib_verbs.c mutex_unlock(&rdev->qp_lock); rdev 1203 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_qp(&rdev->qplib_res, &qp->qplib_qp); rdev 1295 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = srq->rdev; rdev 1301 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_srq(&rdev->qplib_res, qplib_srq); rdev 1303 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_dec(&rdev->srq_count); rdev 1308 drivers/infiniband/hw/bnxt_re/ib_verbs.c static int bnxt_re_init_user_srq(struct bnxt_re_dev *rdev, rdev 1345 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 1346 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 1353 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Create CQ failed - max exceeded"); rdev 1363 drivers/infiniband/hw/bnxt_re/ib_verbs.c srq->rdev = rdev; rdev 1365 drivers/infiniband/hw/bnxt_re/ib_verbs.c srq->qplib_srq.dpi = &rdev->dpi_privileged; rdev 1377 drivers/infiniband/hw/bnxt_re/ib_verbs.c srq->qplib_srq.eventq_hw_ring_id = rdev->nq[0].ring_id; rdev 1378 drivers/infiniband/hw/bnxt_re/ib_verbs.c nq = &rdev->nq[0]; rdev 1381 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_re_init_user_srq(rdev, pd, srq, udata); rdev 1386 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_create_srq(&rdev->qplib_res, &srq->qplib_srq); rdev 1388 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Create HW SRQ failed!"); rdev 1398 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "SRQ copy to udata failed!"); rdev 1399 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_srq(&rdev->qplib_res, rdev 1406 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->srq_count); rdev 1422 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = srq->rdev; rdev 1435 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_modify_srq(&rdev->qplib_res, &srq->qplib_srq); rdev 1437 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Modify HW SRQ failed!"); rdev 1445 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1457 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = srq->rdev; rdev 1462 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_query_srq(&rdev->qplib_res, &tsrq.qplib_srq); rdev 1464 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Query HW SRQ failed!"); rdev 1502 drivers/infiniband/hw/bnxt_re/ib_verbs.c static int bnxt_re_modify_shadow_qp(struct bnxt_re_dev *rdev, rdev 1506 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_qp *qp = rdev->qp1_sqp; rdev 1528 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_modify_qp(&rdev->qplib_res, &qp->qplib_qp); rdev 1530 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1539 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = qp->rdev; rdev 1540 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 1552 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1555 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1558 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1568 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_dbg(rdev_to_dev(rdev), rdev 1577 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_dbg(rdev_to_dev(rdev), rdev 1667 drivers/infiniband/hw/bnxt_re/ib_verbs.c __from_ib_mtu(iboe_get_mtu(rdev->netdev->mtu)); rdev 1669 drivers/infiniband/hw/bnxt_re/ib_verbs.c ib_mtu_enum_to_int(iboe_get_mtu(rdev->netdev->mtu)); rdev 1709 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1733 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 1765 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_modify_qp(&rdev->qplib_res, &qp->qplib_qp); rdev 1767 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to modify HW QP"); rdev 1770 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (ib_qp->qp_type == IB_QPT_GSI && rdev->qp1_sqp) rdev 1771 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_re_modify_shadow_qp(rdev, qp, qp_attr_mask); rdev 1779 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = qp->rdev; rdev 1790 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_query_qp(&rdev->qplib_res, qplib_qp); rdev 1792 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to query HW QP"); rdev 1997 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(qp->rdev), "QP1 buffer is empty!"); rdev 2031 drivers/infiniband/hw/bnxt_re/ib_verbs.c sqp_entry = &qp->rdev->sqp_tbl[rq_prod_index]; rdev 2213 drivers/infiniband/hw/bnxt_re/ib_verbs.c static int bnxt_re_copy_inline_data(struct bnxt_re_dev *rdev, rdev 2230 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 2243 drivers/infiniband/hw/bnxt_re/ib_verbs.c static int bnxt_re_copy_wr_payload(struct bnxt_re_dev *rdev, rdev 2250 drivers/infiniband/hw/bnxt_re/ib_verbs.c payload_sz = bnxt_re_copy_inline_data(rdev, wr, wqe); rdev 2274 drivers/infiniband/hw/bnxt_re/ib_verbs.c static int bnxt_re_post_send_shadow_qp(struct bnxt_re_dev *rdev, rdev 2291 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 2297 drivers/infiniband/hw/bnxt_re/ib_verbs.c payload_sz = bnxt_re_copy_wr_payload(qp->rdev, wr, &wqe); rdev 2311 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 2340 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(qp->rdev), rdev 2346 drivers/infiniband/hw/bnxt_re/ib_verbs.c payload_sz = bnxt_re_copy_wr_payload(qp->rdev, wr, &wqe); rdev 2386 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(qp->rdev), rdev 2398 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(qp->rdev), rdev 2407 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(qp->rdev), rdev 2422 drivers/infiniband/hw/bnxt_re/ib_verbs.c static int bnxt_re_post_recv_shadow_qp(struct bnxt_re_dev *rdev, rdev 2437 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 2474 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(qp->rdev), rdev 2519 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev; rdev 2522 drivers/infiniband/hw/bnxt_re/ib_verbs.c rdev = cq->rdev; rdev 2525 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_cq(&rdev->qplib_res, &cq->qplib_cq); rdev 2528 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_dec(&rdev->cq_count); rdev 2536 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibcq->device, ibdev); rdev 2537 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 2546 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to create CQ -max exceeded"); rdev 2550 drivers/infiniband/hw/bnxt_re/ib_verbs.c cq->rdev = rdev; rdev 2586 drivers/infiniband/hw/bnxt_re/ib_verbs.c cq->qplib_cq.dpi = &rdev->dpi_privileged; rdev 2592 drivers/infiniband/hw/bnxt_re/ib_verbs.c nq_alloc_cnt = atomic_inc_return(&rdev->nq_alloc_cnt); rdev 2593 drivers/infiniband/hw/bnxt_re/ib_verbs.c nq = &rdev->nq[nq_alloc_cnt % (rdev->num_msix - 1)]; rdev 2598 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_create_cq(&rdev->qplib_res, &cq->qplib_cq); rdev 2600 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to create HW CQ"); rdev 2608 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->cq_count); rdev 2620 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to copy CQ udata"); rdev 2621 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_destroy_cq(&rdev->qplib_res, &cq->qplib_cq); rdev 2806 drivers/infiniband/hw/bnxt_re/ib_verbs.c static bool bnxt_re_is_loopback_packet(struct bnxt_re_dev *rdev, rdev 2820 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (!ether_addr_equal(tmp_buf, rdev->netdev->dev_addr)) { rdev 2854 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = qp1_qp->rdev; rdev 2856 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_qp *qp = rdev->qp1_sqp; rdev 2887 drivers/infiniband/hw/bnxt_re/ib_verbs.c sqp_entry = &rdev->sqp_tbl[tbl_idx]; rdev 2898 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Invalid packet\n"); rdev 2911 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (bnxt_re_is_loopback_packet(rdev, rq_hdr_buf)) rdev 2945 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_re_post_recv_shadow_qp(rdev, qp, &rwr); rdev 2947 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 2958 drivers/infiniband/hw/bnxt_re/ib_verbs.c udwr.ah = &rdev->sqp_ah->ib_ah; rdev 2959 drivers/infiniband/hw/bnxt_re/ib_verbs.c udwr.remote_qpn = rdev->qp1_sqp->qplib_qp.id; rdev 2960 drivers/infiniband/hw/bnxt_re/ib_verbs.c udwr.remote_qkey = rdev->qp1_sqp->qplib_qp.qkey; rdev 2963 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_re_post_send_shadow_qp(rdev, qp, swr); rdev 3021 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = qp->rdev; rdev 3032 drivers/infiniband/hw/bnxt_re/ib_verbs.c sqp_entry = &rdev->sqp_tbl[tbl_idx]; rdev 3130 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(cq->rdev), "POLL CQ : no CQL to use"); rdev 3143 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(cq->rdev), rdev 3168 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(cq->rdev), rdev 3181 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (qp->rdev->qp1_sqp && qp->qplib_qp.id == rdev 3182 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->rdev->qp1_sqp->qplib_qp.id) { rdev 3208 drivers/infiniband/hw/bnxt_re/ib_verbs.c sqp_entry = &cq->rdev->sqp_tbl[tbl_idx]; rdev 3216 drivers/infiniband/hw/bnxt_re/ib_verbs.c if (qp->rdev->qp1_sqp && qp->qplib_qp.id == rdev 3217 drivers/infiniband/hw/bnxt_re/ib_verbs.c qp->rdev->qp1_sqp->qplib_qp.id) { rdev 3232 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(cq->rdev), rdev 3278 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 3287 drivers/infiniband/hw/bnxt_re/ib_verbs.c mr->rdev = rdev; rdev 3293 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 3299 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &mr->qplib_mr, &pbl, 0, false, rdev 3308 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->mr_count); rdev 3313 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 3322 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = mr->rdev; rdev 3325 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 3327 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Dereg MR failed: %#x\n", rc); rdev 3332 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_free_fast_reg_page_list(&rdev->qplib_res, rdev 3341 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_dec(&rdev->mr_count); rdev 3369 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 3374 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_dbg(rdev_to_dev(rdev), "MR type 0x%x not supported", type); rdev 3384 drivers/infiniband/hw/bnxt_re/ib_verbs.c mr->rdev = rdev; rdev 3389 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 3401 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_alloc_fast_reg_page_list(&rdev->qplib_res, rdev 3404 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 3409 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->mr_count); rdev 3415 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 3425 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 3432 drivers/infiniband/hw/bnxt_re/ib_verbs.c mw->rdev = rdev; rdev 3438 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mw->qplib_mw); rdev 3440 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Allocate MW failed!"); rdev 3445 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->mw_count); rdev 3456 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = mw->rdev; rdev 3459 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &mw->qplib_mw); rdev 3461 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Free MW failed: %#x\n", rc); rdev 3466 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_dec(&rdev->mw_count); rdev 3506 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = pd->rdev; rdev 3513 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "MR Size: %lld > Max supported:%lld\n", rdev 3522 drivers/infiniband/hw/bnxt_re/ib_verbs.c mr->rdev = rdev; rdev 3527 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 3529 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to allocate MR"); rdev 3537 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to get umem"); rdev 3546 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "umem is invalid!"); rdev 3563 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "umem page size unsupported!"); rdev 3570 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Requested MR Sz:%llu Max sup:%llu", rdev 3578 drivers/infiniband/hw/bnxt_re/ib_verbs.c rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &mr->qplib_mr, pbl_tbl, rdev 3581 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to register user MR"); rdev 3589 drivers/infiniband/hw/bnxt_re/ib_verbs.c atomic_inc(&rdev->mr_count); rdev 3597 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); rdev 3608 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); rdev 3609 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 3614 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_dbg(rdev_to_dev(rdev), "ABI version requested %u", rdev 3618 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_dbg(rdev_to_dev(rdev), " is different from the device %d ", rdev 3623 drivers/infiniband/hw/bnxt_re/ib_verbs.c uctx->rdev = rdev; rdev 3633 drivers/infiniband/hw/bnxt_re/ib_verbs.c chip_met_rev_num = rdev->chip_ctx.chip_num; rdev 3634 drivers/infiniband/hw/bnxt_re/ib_verbs.c chip_met_rev_num |= ((u32)rdev->chip_ctx.chip_rev & 0xFF) << rdev 3636 drivers/infiniband/hw/bnxt_re/ib_verbs.c chip_met_rev_num |= ((u32)rdev->chip_ctx.chip_metal & 0xFF) << rdev 3642 drivers/infiniband/hw/bnxt_re/ib_verbs.c resp.dev_id = rdev->en_dev->pdev->devfn; rdev 3643 drivers/infiniband/hw/bnxt_re/ib_verbs.c resp.max_qp = rdev->qplib_ctx.qpc_count; rdev 3651 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to copy user context"); rdev 3670 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = uctx->rdev; rdev 3679 drivers/infiniband/hw/bnxt_re/ib_verbs.c bnxt_qplib_dealloc_dpi(&rdev->qplib_res, rdev 3680 drivers/infiniband/hw/bnxt_re/ib_verbs.c &rdev->qplib_res.dpi_tbl, &uctx->dpi); rdev 3691 drivers/infiniband/hw/bnxt_re/ib_verbs.c struct bnxt_re_dev *rdev = uctx->rdev; rdev 3701 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), "Failed to map DPI"); rdev 3708 drivers/infiniband/hw/bnxt_re/ib_verbs.c dev_err(rdev_to_dev(rdev), rdev 60 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 67 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 73 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 82 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 98 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 110 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 120 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 126 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 132 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 139 drivers/infiniband/hw/bnxt_re/ib_verbs.h struct bnxt_re_dev *rdev; rdev 81 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev); rdev 83 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev) rdev 85 drivers/infiniband/hw/bnxt_re/main.c rdev->rcfw.res = NULL; rdev 86 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.cctx = NULL; rdev 89 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev) rdev 94 drivers/infiniband/hw/bnxt_re/main.c en_dev = rdev->en_dev; rdev 97 drivers/infiniband/hw/bnxt_re/main.c rdev->chip_ctx.chip_num = bp->chip_num; rdev 100 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.cctx = &rdev->chip_ctx; rdev 101 drivers/infiniband/hw/bnxt_re/main.c rdev->rcfw.res = &rdev->qplib_res; rdev 108 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) rdev 112 drivers/infiniband/hw/bnxt_re/main.c bp = netdev_priv(rdev->en_dev->net); rdev 114 drivers/infiniband/hw/bnxt_re/main.c rdev->is_virtfn = 1; rdev 122 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) rdev 128 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; rdev 130 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, rdev 133 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; rdev 135 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count, rdev 137 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, rdev 139 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, rdev 143 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.tqm_count[i] = rdev 144 drivers/infiniband/hw/bnxt_re/main.c rdev->dev_attr.tqm_alloc_reqs[i]; rdev 146 drivers/infiniband/hw/bnxt_re/main.c if (rdev->num_vfs) { rdev 152 drivers/infiniband/hw/bnxt_re/main.c num_vfs = 100 * rdev->num_vfs; rdev 153 drivers/infiniband/hw/bnxt_re/main.c vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs; rdev 154 drivers/infiniband/hw/bnxt_re/main.c vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs; rdev 155 drivers/infiniband/hw/bnxt_re/main.c vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs; rdev 165 drivers/infiniband/hw/bnxt_re/main.c if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) rdev 166 drivers/infiniband/hw/bnxt_re/main.c vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs; rdev 168 drivers/infiniband/hw/bnxt_re/main.c vf_mrws = (rdev->qplib_ctx.mrw_count - rdev 169 drivers/infiniband/hw/bnxt_re/main.c BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs; rdev 172 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws; rdev 173 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids; rdev 174 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps; rdev 175 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs; rdev 176 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs; rdev 190 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev = p; rdev 192 drivers/infiniband/hw/bnxt_re/main.c if (!rdev) rdev 195 drivers/infiniband/hw/bnxt_re/main.c rdev->num_vfs = num_vfs; rdev 196 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_set_resource_limits(rdev); rdev 197 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, rdev 198 drivers/infiniband/hw/bnxt_re/main.c &rdev->qplib_ctx); rdev 203 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev = p; rdev 205 drivers/infiniband/hw/bnxt_re/main.c if (!rdev) rdev 208 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_ib_unreg(rdev); rdev 213 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; rdev 214 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; rdev 218 drivers/infiniband/hw/bnxt_re/main.c for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) { rdev 219 drivers/infiniband/hw/bnxt_re/main.c nq = &rdev->nq[indx - 1]; rdev 228 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; rdev 229 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_msix_entry *msix_ent = rdev->msix_entries; rdev 230 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; rdev 240 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), "Failed to re-start IRQs\n"); rdev 247 drivers/infiniband/hw/bnxt_re/main.c for (indx = 0; indx < rdev->num_msix; indx++) rdev 248 drivers/infiniband/hw/bnxt_re/main.c rdev->msix_entries[indx].vector = ent[indx].vector; rdev 252 drivers/infiniband/hw/bnxt_re/main.c for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) { rdev 253 drivers/infiniband/hw/bnxt_re/main.c nq = &rdev->nq[indx - 1]; rdev 257 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), rdev 277 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev) rdev 282 drivers/infiniband/hw/bnxt_re/main.c if (!rdev) rdev 285 drivers/infiniband/hw/bnxt_re/main.c en_dev = rdev->en_dev; rdev 287 drivers/infiniband/hw/bnxt_re/main.c rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, rdev 292 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) rdev 297 drivers/infiniband/hw/bnxt_re/main.c if (!rdev) rdev 300 drivers/infiniband/hw/bnxt_re/main.c en_dev = rdev->en_dev; rdev 303 drivers/infiniband/hw/bnxt_re/main.c &bnxt_re_ulp_ops, rdev); rdev 304 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.pdev = rdev->en_dev->pdev; rdev 308 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_free_msix(struct bnxt_re_dev *rdev) rdev 313 drivers/infiniband/hw/bnxt_re/main.c if (!rdev) rdev 316 drivers/infiniband/hw/bnxt_re/main.c en_dev = rdev->en_dev; rdev 319 drivers/infiniband/hw/bnxt_re/main.c rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); rdev 324 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) rdev 329 drivers/infiniband/hw/bnxt_re/main.c if (!rdev) rdev 332 drivers/infiniband/hw/bnxt_re/main.c en_dev = rdev->en_dev; rdev 337 drivers/infiniband/hw/bnxt_re/main.c rdev->msix_entries, rdev 344 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), rdev 348 drivers/infiniband/hw/bnxt_re/main.c rdev->num_msix = num_msix_got; rdev 353 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, rdev 372 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, rdev 375 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_en_dev *en_dev = rdev->en_dev; rdev 386 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); rdev 393 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), rdev 398 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr, rdev 402 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_en_dev *en_dev = rdev->en_dev; rdev 412 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); rdev 435 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, rdev 438 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_en_dev *en_dev = rdev->en_dev; rdev 448 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); rdev 454 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), rdev 460 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, rdev 466 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_en_dev *en_dev = rdev->en_dev; rdev 477 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); rdev 510 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev; rdev 513 drivers/infiniband/hw/bnxt_re/main.c list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) { rdev 514 drivers/infiniband/hw/bnxt_re/main.c if (rdev->netdev == netdev) { rdev 516 drivers/infiniband/hw/bnxt_re/main.c return rdev; rdev 567 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev = rdev 570 drivers/infiniband/hw/bnxt_re/main.c return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor); rdev 577 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev = rdev 580 drivers/infiniband/hw/bnxt_re/main.c return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc); rdev 594 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev) rdev 596 drivers/infiniband/hw/bnxt_re/main.c ib_unregister_device(&rdev->ibdev); rdev 651 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) rdev 653 drivers/infiniband/hw/bnxt_re/main.c struct ib_device *ibdev = &rdev->ibdev; rdev 662 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); rdev 665 drivers/infiniband/hw/bnxt_re/main.c ibdev->dev.parent = &rdev->en_dev->pdev->dev; rdev 699 drivers/infiniband/hw/bnxt_re/main.c ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1); rdev 706 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) rdev 708 drivers/infiniband/hw/bnxt_re/main.c dev_put(rdev->netdev); rdev 709 drivers/infiniband/hw/bnxt_re/main.c rdev->netdev = NULL; rdev 712 drivers/infiniband/hw/bnxt_re/main.c list_del_rcu(&rdev->list); rdev 717 drivers/infiniband/hw/bnxt_re/main.c ib_dealloc_device(&rdev->ibdev); rdev 724 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev; rdev 727 drivers/infiniband/hw/bnxt_re/main.c rdev = ib_alloc_device(bnxt_re_dev, ibdev); rdev 728 drivers/infiniband/hw/bnxt_re/main.c if (!rdev) { rdev 734 drivers/infiniband/hw/bnxt_re/main.c rdev->netdev = netdev; rdev 735 drivers/infiniband/hw/bnxt_re/main.c dev_hold(rdev->netdev); rdev 736 drivers/infiniband/hw/bnxt_re/main.c rdev->en_dev = en_dev; rdev 737 drivers/infiniband/hw/bnxt_re/main.c rdev->id = rdev->en_dev->pdev->devfn; rdev 738 drivers/infiniband/hw/bnxt_re/main.c INIT_LIST_HEAD(&rdev->qp_list); rdev 739 drivers/infiniband/hw/bnxt_re/main.c mutex_init(&rdev->qp_lock); rdev 740 drivers/infiniband/hw/bnxt_re/main.c atomic_set(&rdev->qp_count, 0); rdev 741 drivers/infiniband/hw/bnxt_re/main.c atomic_set(&rdev->cq_count, 0); rdev 742 drivers/infiniband/hw/bnxt_re/main.c atomic_set(&rdev->srq_count, 0); rdev 743 drivers/infiniband/hw/bnxt_re/main.c atomic_set(&rdev->mr_count, 0); rdev 744 drivers/infiniband/hw/bnxt_re/main.c atomic_set(&rdev->mw_count, 0); rdev 745 drivers/infiniband/hw/bnxt_re/main.c rdev->cosq[0] = 0xFFFF; rdev 746 drivers/infiniband/hw/bnxt_re/main.c rdev->cosq[1] = 0xFFFF; rdev 749 drivers/infiniband/hw/bnxt_re/main.c list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); rdev 751 drivers/infiniband/hw/bnxt_re/main.c return rdev; rdev 800 drivers/infiniband/hw/bnxt_re/main.c event.device = &qp->rdev->ibdev; rdev 864 drivers/infiniband/hw/bnxt_re/main.c ib_event.device = &srq->rdev->ibdev; rdev 899 drivers/infiniband/hw/bnxt_re/main.c static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx) rdev 901 drivers/infiniband/hw/bnxt_re/main.c return bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx) ? rdev 902 drivers/infiniband/hw/bnxt_re/main.c 0x10000 : rdev->msix_entries[indx].db_offset; rdev 905 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) rdev 909 drivers/infiniband/hw/bnxt_re/main.c for (i = 1; i < rdev->num_msix; i++) rdev 910 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_disable_nq(&rdev->nq[i - 1]); rdev 912 drivers/infiniband/hw/bnxt_re/main.c if (rdev->qplib_res.rcfw) rdev 913 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_cleanup_res(&rdev->qplib_res); rdev 916 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_init_res(struct bnxt_re_dev *rdev) rdev 922 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_init_res(&rdev->qplib_res); rdev 924 drivers/infiniband/hw/bnxt_re/main.c for (i = 1; i < rdev->num_msix ; i++) { rdev 925 drivers/infiniband/hw/bnxt_re/main.c db_offt = bnxt_re_get_nqdb_offset(rdev, i); rdev 926 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], rdev 927 drivers/infiniband/hw/bnxt_re/main.c i - 1, rdev->msix_entries[i].vector, rdev 931 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), rdev 940 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_disable_nq(&rdev->nq[i]); rdev 944 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev) rdev 949 drivers/infiniband/hw/bnxt_re/main.c for (i = 0; i < rdev->num_msix - 1; i++) { rdev 950 drivers/infiniband/hw/bnxt_re/main.c type = bnxt_qplib_get_ring_type(&rdev->chip_ctx); rdev 951 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); rdev 952 drivers/infiniband/hw/bnxt_re/main.c rdev->nq[i].res = NULL; rdev 953 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_nq(&rdev->nq[i]); rdev 957 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_free_res(struct bnxt_re_dev *rdev) rdev 959 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_free_nq_res(rdev); rdev 961 drivers/infiniband/hw/bnxt_re/main.c if (rdev->qplib_res.dpi_tbl.max) { rdev 962 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_dealloc_dpi(&rdev->qplib_res, rdev 963 drivers/infiniband/hw/bnxt_re/main.c &rdev->qplib_res.dpi_tbl, rdev 964 drivers/infiniband/hw/bnxt_re/main.c &rdev->dpi_privileged); rdev 966 drivers/infiniband/hw/bnxt_re/main.c if (rdev->qplib_res.rcfw) { rdev 967 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_res(&rdev->qplib_res); rdev 968 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.rcfw = NULL; rdev 972 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) rdev 981 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.rcfw = &rdev->rcfw; rdev 982 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, rdev 983 drivers/infiniband/hw/bnxt_re/main.c rdev->is_virtfn); rdev 987 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, rdev 988 drivers/infiniband/hw/bnxt_re/main.c rdev->netdev, &rdev->dev_attr); rdev 992 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, rdev 993 drivers/infiniband/hw/bnxt_re/main.c &rdev->dpi_privileged, rdev 994 drivers/infiniband/hw/bnxt_re/main.c rdev); rdev 998 drivers/infiniband/hw/bnxt_re/main.c for (i = 0; i < rdev->num_msix - 1; i++) { rdev 999 drivers/infiniband/hw/bnxt_re/main.c rdev->nq[i].res = &rdev->qplib_res; rdev 1000 drivers/infiniband/hw/bnxt_re/main.c rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT + rdev 1002 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]); rdev 1004 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x", rdev 1008 drivers/infiniband/hw/bnxt_re/main.c type = bnxt_qplib_get_ring_type(&rdev->chip_ctx); rdev 1009 drivers/infiniband/hw/bnxt_re/main.c pg_map = rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr; rdev 1010 drivers/infiniband/hw/bnxt_re/main.c pages = rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count; rdev 1011 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_net_ring_alloc(rdev, pg_map, pages, type, rdev 1013 drivers/infiniband/hw/bnxt_re/main.c rdev->msix_entries[i + 1].ring_idx, rdev 1014 drivers/infiniband/hw/bnxt_re/main.c &rdev->nq[i].ring_id); rdev 1016 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), rdev 1019 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_nq(&rdev->nq[i]); rdev 1027 drivers/infiniband/hw/bnxt_re/main.c type = bnxt_qplib_get_ring_type(&rdev->chip_ctx); rdev 1028 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); rdev 1029 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_nq(&rdev->nq[i]); rdev 1031 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_dealloc_dpi(&rdev->qplib_res, rdev 1032 drivers/infiniband/hw/bnxt_re/main.c &rdev->qplib_res.dpi_tbl, rdev 1033 drivers/infiniband/hw/bnxt_re/main.c &rdev->dpi_privileged); rdev 1035 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_res(&rdev->qplib_res); rdev 1038 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.rcfw = NULL; rdev 1062 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, rdev 1066 drivers/infiniband/hw/bnxt_re/main.c struct bnxt *bp = netdev_priv(rdev->netdev); rdev 1068 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_en_dev *en_dev = rdev->en_dev; rdev 1078 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_init_hwrm_hdr(rdev, (void *)&req, rdev 1092 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), rdev 1094 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), rdev 1105 drivers/infiniband/hw/bnxt_re/main.c static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, rdev 1108 drivers/infiniband/hw/bnxt_re/main.c return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp); rdev 1111 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) rdev 1118 drivers/infiniband/hw/bnxt_re/main.c mutex_lock(&rdev->qp_lock); rdev 1119 drivers/infiniband/hw/bnxt_re/main.c list_for_each_entry(qp, &rdev->qp_list, list) { rdev 1121 drivers/infiniband/hw/bnxt_re/main.c if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { rdev 1126 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, rdev 1133 drivers/infiniband/hw/bnxt_re/main.c mutex_unlock(&rdev->qp_lock); rdev 1136 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) rdev 1138 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; rdev 1143 drivers/infiniband/hw/bnxt_re/main.c if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) rdev 1147 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated"); rdev 1166 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.netdev->dev_addr); rdev 1172 drivers/infiniband/hw/bnxt_re/main.c static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) rdev 1178 drivers/infiniband/hw/bnxt_re/main.c netdev = rdev->netdev; rdev 1209 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) rdev 1216 drivers/infiniband/hw/bnxt_re/main.c prio_map = bnxt_re_get_priority_mask(rdev); rdev 1218 drivers/infiniband/hw/bnxt_re/main.c if (prio_map == rdev->cur_prio_map) rdev 1220 drivers/infiniband/hw/bnxt_re/main.c rdev->cur_prio_map = prio_map; rdev 1222 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); rdev 1224 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map); rdev 1228 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); rdev 1231 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); rdev 1233 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n", rdev 1234 drivers/infiniband/hw/bnxt_re/main.c rdev->cosq[0], rdev->cosq[1]); rdev 1241 drivers/infiniband/hw/bnxt_re/main.c if ((prio_map == 0 && rdev->qplib_res.prio) || rdev 1242 drivers/infiniband/hw/bnxt_re/main.c (prio_map != 0 && !rdev->qplib_res.prio)) { rdev 1243 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_res.prio = prio_map ? true : false; rdev 1245 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_update_gid(rdev); rdev 1251 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev) rdev 1253 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_en_dev *en_dev = rdev->en_dev; rdev 1260 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_init_hwrm_hdr(rdev, (void *)&req, rdev 1269 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), rdev 1273 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.hwrm_intf_ver = rdev 1280 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev) rdev 1285 drivers/infiniband/hw/bnxt_re/main.c if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) { rdev 1287 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_unregister_ib(rdev); rdev 1289 drivers/infiniband/hw/bnxt_re/main.c if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) rdev 1290 drivers/infiniband/hw/bnxt_re/main.c cancel_delayed_work_sync(&rdev->worker); rdev 1293 drivers/infiniband/hw/bnxt_re/main.c &rdev->flags)) rdev 1294 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_cleanup_res(rdev); rdev 1295 drivers/infiniband/hw/bnxt_re/main.c if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags)) rdev 1296 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_free_res(rdev); rdev 1298 drivers/infiniband/hw/bnxt_re/main.c if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { rdev 1299 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); rdev 1301 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), rdev 1303 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); rdev 1304 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); rdev 1305 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); rdev 1306 drivers/infiniband/hw/bnxt_re/main.c type = bnxt_qplib_get_ring_type(&rdev->chip_ctx); rdev 1307 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type); rdev 1308 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_rcfw_channel(&rdev->rcfw); rdev 1310 drivers/infiniband/hw/bnxt_re/main.c if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { rdev 1311 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_free_msix(rdev); rdev 1313 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), rdev 1317 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_destroy_chip_ctx(rdev); rdev 1318 drivers/infiniband/hw/bnxt_re/main.c if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { rdev 1319 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_unregister_netdev(rdev); rdev 1321 drivers/infiniband/hw/bnxt_re/main.c dev_warn(rdev_to_dev(rdev), rdev 1329 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, rdev 1332 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_setup_qos(rdev); rdev 1333 drivers/infiniband/hw/bnxt_re/main.c schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); rdev 1336 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) rdev 1350 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_register_netdev(rdev); rdev 1356 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); rdev 1358 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_setup_chip_ctx(rdev); rdev 1360 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), "Failed to get chip context\n"); rdev 1365 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_get_sriov_func_type(rdev); rdev 1367 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_request_msix(rdev); rdev 1373 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); rdev 1375 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_query_hwrm_intf_version(rdev); rdev 1380 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw, rdev 1381 drivers/infiniband/hw/bnxt_re/main.c &rdev->qplib_ctx, rdev 1387 drivers/infiniband/hw/bnxt_re/main.c type = bnxt_qplib_get_ring_type(&rdev->chip_ctx); rdev 1388 drivers/infiniband/hw/bnxt_re/main.c pg_map = rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr; rdev 1389 drivers/infiniband/hw/bnxt_re/main.c pages = rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count; rdev 1390 drivers/infiniband/hw/bnxt_re/main.c ridx = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx; rdev 1391 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_net_ring_alloc(rdev, pg_map, pages, type, rdev 1393 drivers/infiniband/hw/bnxt_re/main.c ridx, &rdev->rcfw.creq_ring_id); rdev 1398 drivers/infiniband/hw/bnxt_re/main.c db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX); rdev 1399 drivers/infiniband/hw/bnxt_re/main.c vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector; rdev 1400 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_enable_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw, rdev 1401 drivers/infiniband/hw/bnxt_re/main.c vid, db_offt, rdev->is_virtfn, rdev 1408 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, rdev 1409 drivers/infiniband/hw/bnxt_re/main.c rdev->is_virtfn); rdev 1412 drivers/infiniband/hw/bnxt_re/main.c if (!rdev->is_virtfn) rdev 1413 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_set_resource_limits(rdev); rdev 1415 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0, rdev 1416 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx)); rdev 1421 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_net_stats_ctx_alloc(rdev, rdev 1422 drivers/infiniband/hw/bnxt_re/main.c rdev->qplib_ctx.stats.dma_map, rdev 1423 drivers/infiniband/hw/bnxt_re/main.c &rdev->qplib_ctx.stats.fw_id); rdev 1429 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, rdev 1430 drivers/infiniband/hw/bnxt_re/main.c rdev->is_virtfn); rdev 1435 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); rdev 1438 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_alloc_res(rdev); rdev 1443 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags); rdev 1444 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_init_res(rdev); rdev 1450 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags); rdev 1452 drivers/infiniband/hw/bnxt_re/main.c if (!rdev->is_virtfn) { rdev 1453 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_setup_qos(rdev); rdev 1457 drivers/infiniband/hw/bnxt_re/main.c INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); rdev 1458 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); rdev 1459 drivers/infiniband/hw/bnxt_re/main.c schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); rdev 1466 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_register_ib(rdev); rdev 1471 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags); rdev 1472 drivers/infiniband/hw/bnxt_re/main.c dev_info(rdev_to_dev(rdev), "Device registered successfully"); rdev 1473 drivers/infiniband/hw/bnxt_re/main.c ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, rdev 1474 drivers/infiniband/hw/bnxt_re/main.c &rdev->active_width); rdev 1475 drivers/infiniband/hw/bnxt_re/main.c set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); rdev 1476 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE); rdev 1480 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); rdev 1482 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); rdev 1484 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); rdev 1486 drivers/infiniband/hw/bnxt_re/main.c type = bnxt_qplib_get_ring_type(&rdev->chip_ctx); rdev 1487 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type); rdev 1489 drivers/infiniband/hw/bnxt_re/main.c bnxt_qplib_free_rcfw_channel(&rdev->rcfw); rdev 1493 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_ib_unreg(rdev); rdev 1499 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) rdev 1501 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_en_dev *en_dev = rdev->en_dev; rdev 1502 drivers/infiniband/hw/bnxt_re/main.c struct net_device *netdev = rdev->netdev; rdev 1504 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dev_remove(rdev); rdev 1510 drivers/infiniband/hw/bnxt_re/main.c static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) rdev 1525 drivers/infiniband/hw/bnxt_re/main.c *rdev = bnxt_re_dev_add(netdev, en_dev); rdev 1526 drivers/infiniband/hw/bnxt_re/main.c if (!*rdev) { rdev 1535 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_remove_one(struct bnxt_re_dev *rdev) rdev 1537 drivers/infiniband/hw/bnxt_re/main.c pci_dev_put(rdev->en_dev->pdev); rdev 1544 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev; rdev 1548 drivers/infiniband/hw/bnxt_re/main.c rdev = re_work->rdev; rdev 1551 drivers/infiniband/hw/bnxt_re/main.c !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) rdev 1556 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_ib_reg(rdev); rdev 1558 drivers/infiniband/hw/bnxt_re/main.c dev_err(rdev_to_dev(rdev), rdev 1560 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_remove_one(rdev); rdev 1561 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dev_unreg(rdev); rdev 1566 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, rdev 1570 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dev_stop(rdev); rdev 1573 drivers/infiniband/hw/bnxt_re/main.c if (!netif_carrier_ok(rdev->netdev)) rdev 1574 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dev_stop(rdev); rdev 1575 drivers/infiniband/hw/bnxt_re/main.c else if (netif_carrier_ok(rdev->netdev)) rdev 1576 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, rdev 1578 drivers/infiniband/hw/bnxt_re/main.c ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, rdev 1579 drivers/infiniband/hw/bnxt_re/main.c &rdev->active_width); rdev 1585 drivers/infiniband/hw/bnxt_re/main.c atomic_dec(&rdev->sched_count); rdev 1590 drivers/infiniband/hw/bnxt_re/main.c static void bnxt_re_init_one(struct bnxt_re_dev *rdev) rdev 1592 drivers/infiniband/hw/bnxt_re/main.c pci_dev_get(rdev->en_dev->pdev); rdev 1614 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev; rdev 1622 drivers/infiniband/hw/bnxt_re/main.c rdev = bnxt_re_from_netdev(real_dev); rdev 1623 drivers/infiniband/hw/bnxt_re/main.c if (!rdev && event != NETDEV_REGISTER) rdev 1630 drivers/infiniband/hw/bnxt_re/main.c if (rdev) rdev 1632 drivers/infiniband/hw/bnxt_re/main.c rc = bnxt_re_dev_reg(&rdev, real_dev); rdev 1640 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_init_one(rdev); rdev 1648 drivers/infiniband/hw/bnxt_re/main.c if (atomic_read(&rdev->sched_count) > 0) rdev 1650 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_ib_unreg(rdev); rdev 1651 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_remove_one(rdev); rdev 1652 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dev_unreg(rdev); rdev 1663 drivers/infiniband/hw/bnxt_re/main.c re_work->rdev = rdev; rdev 1668 drivers/infiniband/hw/bnxt_re/main.c atomic_inc(&rdev->sched_count); rdev 1709 drivers/infiniband/hw/bnxt_re/main.c struct bnxt_re_dev *rdev, *next; rdev 1721 drivers/infiniband/hw/bnxt_re/main.c list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) { rdev 1722 drivers/infiniband/hw/bnxt_re/main.c dev_info(rdev_to_dev(rdev), "Unregistering Device"); rdev 1728 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dev_stop(rdev); rdev 1731 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_ib_unreg(rdev); rdev 1733 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_remove_one(rdev); rdev 1734 drivers/infiniband/hw/bnxt_re/main.c bnxt_re_dev_unreg(rdev); rdev 53 drivers/infiniband/hw/cxgb3/cxio_hal.c struct cxio_rdev *rdev; rdev 55 drivers/infiniband/hw/cxgb3/cxio_hal.c list_for_each_entry(rdev, &rdev_list, entry) rdev 56 drivers/infiniband/hw/cxgb3/cxio_hal.c if (!strcmp(rdev->dev_name, dev_name)) rdev 57 drivers/infiniband/hw/cxgb3/cxio_hal.c return rdev; rdev 63 drivers/infiniband/hw/cxgb3/cxio_hal.c struct cxio_rdev *rdev; rdev 65 drivers/infiniband/hw/cxgb3/cxio_hal.c list_for_each_entry(rdev, &rdev_list, entry) rdev 66 drivers/infiniband/hw/cxgb3/cxio_hal.c if (rdev->t3cdev_p == tdev) rdev 67 drivers/infiniband/hw/cxgb3/cxio_hal.c return rdev; rdev 290 drivers/infiniband/hw/cxgb3/cxio_hal.c wq->rdev = rdev_p; rdev 1034 drivers/infiniband/hw/cxgb3/cxio_hal.c struct cxio_rdev *rdev, *tmp; rdev 1037 drivers/infiniband/hw/cxgb3/cxio_hal.c list_for_each_entry_safe(rdev, tmp, &rdev_list, entry) rdev 1038 drivers/infiniband/hw/cxgb3/cxio_hal.c cxio_rdev_close(rdev); rdev 1279 drivers/infiniband/hw/cxgb3/cxio_hal.c cxio_hal_pblpool_free(wq->rdev, rdev 156 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_rdev_open(struct cxio_rdev *rdev); rdev 157 drivers/infiniband/hw/cxgb3/cxio_hal.h void cxio_rdev_close(struct cxio_rdev *rdev); rdev 158 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_hal_cq_op(struct cxio_rdev *rdev, struct t3_cq *cq, rdev 160 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_create_cq(struct cxio_rdev *rdev, struct t3_cq *cq, int kernel); rdev 161 drivers/infiniband/hw/cxgb3/cxio_hal.h void cxio_destroy_cq(struct cxio_rdev *rdev, struct t3_cq *cq); rdev 162 drivers/infiniband/hw/cxgb3/cxio_hal.h void cxio_release_ucontext(struct cxio_rdev *rdev, struct cxio_ucontext *uctx); rdev 163 drivers/infiniband/hw/cxgb3/cxio_hal.h void cxio_init_ucontext(struct cxio_rdev *rdev, struct cxio_ucontext *uctx); rdev 164 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_create_qp(struct cxio_rdev *rdev, u32 kernel_domain, struct t3_wq *wq, rdev 166 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_destroy_qp(struct cxio_rdev *rdev, struct t3_wq *wq, rdev 171 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_register_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid, rdev 174 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_reregister_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid, rdev 177 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_dereg_mem(struct cxio_rdev *rdev, u32 stag, u32 pbl_size, rdev 179 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_allocate_window(struct cxio_rdev *rdev, u32 * stag, u32 pdid); rdev 180 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_allocate_stag(struct cxio_rdev *rdev, u32 *stag, u32 pdid, u32 pbl_size, u32 pbl_addr); rdev 181 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_deallocate_window(struct cxio_rdev *rdev, u32 stag); rdev 182 drivers/infiniband/hw/cxgb3/cxio_hal.h int cxio_rdma_init(struct cxio_rdev *rdev, struct t3_rdma_init_attr *attr); rdev 712 drivers/infiniband/hw/cxgb3/cxio_wr.h struct cxio_rdev *rdev; rdev 84 drivers/infiniband/hw/cxgb3/iwch.c ring_doorbell(qhp->rhp->rdev.ctrl_qp.doorbell, rdev 112 drivers/infiniband/hw/cxgb3/iwch.c rnicp->attr.max_mem_regs = cxio_num_stags(&rnicp->rdev); rdev 146 drivers/infiniband/hw/cxgb3/iwch.c rnicp->rdev.ulp = rnicp; rdev 147 drivers/infiniband/hw/cxgb3/iwch.c rnicp->rdev.t3cdev_p = tdev; rdev 151 drivers/infiniband/hw/cxgb3/iwch.c if (cxio_rdev_open(&rnicp->rdev)) { rdev 168 drivers/infiniband/hw/cxgb3/iwch.c pci_name(rnicp->rdev.rnic_info.pdev)); rdev 178 drivers/infiniband/hw/cxgb3/iwch.c if (dev->rdev.t3cdev_p == tdev) { rdev 179 drivers/infiniband/hw/cxgb3/iwch.c dev->rdev.flags = CXIO_ERROR_FATAL; rdev 184 drivers/infiniband/hw/cxgb3/iwch.c cxio_rdev_close(&dev->rdev); rdev 197 drivers/infiniband/hw/cxgb3/iwch.c struct cxio_rdev *rdev = tdev->ulp; rdev 203 drivers/infiniband/hw/cxgb3/iwch.c if (!rdev) rdev 205 drivers/infiniband/hw/cxgb3/iwch.c rnicp = rdev_to_iwch_dev(rdev); rdev 208 drivers/infiniband/hw/cxgb3/iwch.c rdev->flags = CXIO_ERROR_FATAL; rdev 106 drivers/infiniband/hw/cxgb3/iwch.h struct cxio_rdev rdev; rdev 121 drivers/infiniband/hw/cxgb3/iwch.h static inline struct iwch_dev *rdev_to_iwch_dev(struct cxio_rdev *rdev) rdev 123 drivers/infiniband/hw/cxgb3/iwch.h return container_of(rdev, struct iwch_dev, rdev); rdev 128 drivers/infiniband/hw/cxgb3/iwch.h return rhp->rdev.t3cdev_p->type == T3B; rdev 133 drivers/infiniband/hw/cxgb3/iwch.h return rhp->rdev.t3cdev_p->type == T3A; rdev 140 drivers/infiniband/hw/cxgb3/iwch_cm.c struct cxio_rdev *rdev; rdev 142 drivers/infiniband/hw/cxgb3/iwch_cm.c rdev = (struct cxio_rdev *)tdev->ulp; rdev 143 drivers/infiniband/hw/cxgb3/iwch_cm.c if (cxio_fatal_error(rdev)) { rdev 156 drivers/infiniband/hw/cxgb3/iwch_cm.c struct cxio_rdev *rdev; rdev 158 drivers/infiniband/hw/cxgb3/iwch_cm.c rdev = (struct cxio_rdev *)tdev->ulp; rdev 159 drivers/infiniband/hw/cxgb3/iwch_cm.c if (cxio_fatal_error(rdev)) { rdev 1911 drivers/infiniband/hw/cxgb3/iwch_cm.c ep->com.tdev = h->rdev.t3cdev_p; rdev 1923 drivers/infiniband/hw/cxgb3/iwch_cm.c ep->atid = cxgb3_alloc_atid(h->rdev.t3cdev_p, &t3c_client, ep); rdev 1931 drivers/infiniband/hw/cxgb3/iwch_cm.c rt = find_route(h->rdev.t3cdev_p, laddr->sin_addr.s_addr, rdev 1960 drivers/infiniband/hw/cxgb3/iwch_cm.c l2t_release(h->rdev.t3cdev_p, ep->l2t); rdev 1993 drivers/infiniband/hw/cxgb3/iwch_cm.c ep->com.tdev = h->rdev.t3cdev_p; rdev 2003 drivers/infiniband/hw/cxgb3/iwch_cm.c ep->stid = cxgb3_alloc_stid(h->rdev.t3cdev_p, &t3c_client, ep); rdev 2062 drivers/infiniband/hw/cxgb3/iwch_cm.c struct cxio_rdev *rdev; rdev 2070 drivers/infiniband/hw/cxgb3/iwch_cm.c rdev = (struct cxio_rdev *)tdev->ulp; rdev 2071 drivers/infiniband/hw/cxgb3/iwch_cm.c if (cxio_fatal_error(rdev)) { rdev 50 drivers/infiniband/hw/cxgb3/iwch_cq.c cxio_hal_cq_op(&rhp->rdev, &chp->cq, CQ_CREDIT_UPDATE, credit); rdev 61 drivers/infiniband/hw/cxgb3/iwch_mem.c if (cxio_register_phys_mem(&rhp->rdev, rdev 73 drivers/infiniband/hw/cxgb3/iwch_mem.c cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size, rdev 80 drivers/infiniband/hw/cxgb3/iwch_mem.c mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev, rdev 93 drivers/infiniband/hw/cxgb3/iwch_mem.c cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr, rdev 99 drivers/infiniband/hw/cxgb3/iwch_mem.c return cxio_write_pbl(&mhp->rhp->rdev, pages, rdev 74 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_release_ucontext(&rhp->rdev, &ucontext->uctx); rdev 85 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_init_ucontext(&rhp->rdev, &context->uctx); rdev 102 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_destroy_cq(&chp->rhp->rdev, &chp->cq); rdev 147 drivers/infiniband/hw/cxgb3/iwch_provider.c if (cxio_create_cq(&rhp->rdev, &chp->cq, !udata)) rdev 157 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_destroy_cq(&chp->rhp->rdev, &chp->cq); rdev 228 drivers/infiniband/hw/cxgb3/iwch_provider.c err = cxio_hal_cq_op(&rhp->rdev, &chp->cq, cq_op, 0); rdev 254 drivers/infiniband/hw/cxgb3/iwch_provider.c rdev_p = &(to_iwch_dev(context->device)->rdev); rdev 301 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_hal_put_pdid(rhp->rdev.rscp, php->pdid); rdev 313 drivers/infiniband/hw/cxgb3/iwch_provider.c pdid = cxio_hal_get_pdid(rhp->rdev.rscp); rdev 343 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size, rdev 509 drivers/infiniband/hw/cxgb3/iwch_provider.c rhp->rdev.rnic_info.pbl_base) >> 3; rdev 549 drivers/infiniband/hw/cxgb3/iwch_provider.c ret = cxio_allocate_window(&rhp->rdev, &stag, php->pdid); rdev 561 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_deallocate_window(&rhp->rdev, mhp->attr.stag); rdev 578 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_deallocate_window(&rhp->rdev, mhp->attr.stag); rdev 614 drivers/infiniband/hw/cxgb3/iwch_provider.c ret = cxio_allocate_stag(&rhp->rdev, &stag, php->pdid, rdev 631 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_dereg_mem(&rhp->rdev, stag, mhp->attr.pbl_size, rdev 686 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_destroy_qp(&rhp->rdev, &qhp->wq, rdev 687 drivers/infiniband/hw/cxgb3/iwch_provider.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx); rdev 758 drivers/infiniband/hw/cxgb3/iwch_provider.c if (cxio_create_qp(&rhp->rdev, !udata, &qhp->wq, rdev 759 drivers/infiniband/hw/cxgb3/iwch_provider.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx)) { rdev 796 drivers/infiniband/hw/cxgb3/iwch_provider.c cxio_destroy_qp(&rhp->rdev, &qhp->wq, rdev 797 drivers/infiniband/hw/cxgb3/iwch_provider.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx); rdev 929 drivers/infiniband/hw/cxgb3/iwch_provider.c memcpy(&(gid->raw[0]), dev->rdev.port_info.lldevs[port-1]->dev_addr, 6); rdev 936 drivers/infiniband/hw/cxgb3/iwch_provider.c struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; rdev 966 drivers/infiniband/hw/cxgb3/iwch_provider.c memcpy(&props->sys_image_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); rdev 967 drivers/infiniband/hw/cxgb3/iwch_provider.c props->hw_ver = dev->rdev.t3cdev_p->type; rdev 971 drivers/infiniband/hw/cxgb3/iwch_provider.c props->vendor_id = (u32)dev->rdev.rnic_info.pdev->vendor; rdev 972 drivers/infiniband/hw/cxgb3/iwch_provider.c props->vendor_part_id = (u32)dev->rdev.rnic_info.pdev->device; rdev 1018 drivers/infiniband/hw/cxgb3/iwch_provider.c return sprintf(buf, "%d\n", iwch_dev->rdev.t3cdev_p->type); rdev 1028 drivers/infiniband/hw/cxgb3/iwch_provider.c struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; rdev 1043 drivers/infiniband/hw/cxgb3/iwch_provider.c return sprintf(buf, "%x.%x\n", iwch_dev->rdev.rnic_info.pdev->vendor, rdev 1044 drivers/infiniband/hw/cxgb3/iwch_provider.c iwch_dev->rdev.rnic_info.pdev->device); rdev 1130 drivers/infiniband/hw/cxgb3/iwch_provider.c ret = dev->rdev.t3cdev_p->ctl(dev->rdev.t3cdev_p, RDMA_GET_MIB, &m); rdev 1196 drivers/infiniband/hw/cxgb3/iwch_provider.c struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev; rdev 1251 drivers/infiniband/hw/cxgb3/iwch_provider.c static int set_netdevs(struct ib_device *ib_dev, struct cxio_rdev *rdev) rdev 1256 drivers/infiniband/hw/cxgb3/iwch_provider.c for (i = 0; i < rdev->port_info.nports; i++) { rdev 1257 drivers/infiniband/hw/cxgb3/iwch_provider.c ret = ib_device_set_netdev(ib_dev, rdev->port_info.lldevs[i], rdev 1271 drivers/infiniband/hw/cxgb3/iwch_provider.c memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); rdev 1300 drivers/infiniband/hw/cxgb3/iwch_provider.c dev->ibdev.phys_port_cnt = dev->rdev.port_info.nports; rdev 1302 drivers/infiniband/hw/cxgb3/iwch_provider.c dev->ibdev.dev.parent = &dev->rdev.rnic_info.pdev->dev; rdev 1304 drivers/infiniband/hw/cxgb3/iwch_provider.c memcpy(dev->ibdev.iw_ifname, dev->rdev.t3cdev_p->lldev->name, rdev 1309 drivers/infiniband/hw/cxgb3/iwch_provider.c err = set_netdevs(&dev->ibdev, &dev->rdev); rdev 241 drivers/infiniband/hw/cxgb3/iwch_qp.c rhp->rdev.rnic_info.pbl_base) >> 3) + rdev 302 drivers/infiniband/hw/cxgb3/iwch_qp.c pbl_addr = cxio_hal_pblpool_alloc(&qhp->rhp->rdev, T3_STAG0_PBL_SIZE); rdev 309 drivers/infiniband/hw/cxgb3/iwch_qp.c pbl_offset = (pbl_addr - qhp->rhp->rdev.rnic_info.pbl_base) >> 3; rdev 686 drivers/infiniband/hw/cxgb3/iwch_qp.c return iwch_cxgb3_ofld_send(ep->com.qp->rhp->rdev.t3cdev_p, skb); rdev 717 drivers/infiniband/hw/cxgb3/iwch_qp.c return iwch_cxgb3_ofld_send(qhp->rhp->rdev.t3cdev_p, skb); rdev 862 drivers/infiniband/hw/cxgb3/iwch_qp.c ret = cxio_rdma_init(&rhp->rdev, &init_attr); rdev 202 drivers/infiniband/hw/cxgb4/cm.c static int c4iw_l2t_send(struct c4iw_rdev *rdev, struct sk_buff *skb, rdev 207 drivers/infiniband/hw/cxgb4/cm.c if (c4iw_fatal_error(rdev)) { rdev 212 drivers/infiniband/hw/cxgb4/cm.c error = cxgb4_l2t_send(rdev->lldi.ports[0], skb, l2e); rdev 220 drivers/infiniband/hw/cxgb4/cm.c int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb) rdev 224 drivers/infiniband/hw/cxgb4/cm.c if (c4iw_fatal_error(rdev)) { rdev 229 drivers/infiniband/hw/cxgb4/cm.c error = cxgb4_ofld_send(rdev->lldi.ports[0], skb); rdev 235 drivers/infiniband/hw/cxgb4/cm.c static void release_tid(struct c4iw_rdev *rdev, u32 hwtid, struct sk_buff *skb) rdev 244 drivers/infiniband/hw/cxgb4/cm.c c4iw_ofld_send(rdev, skb); rdev 250 drivers/infiniband/hw/cxgb4/cm.c ep->emss = ep->com.dev->rdev.lldi.mtus[TCPOPT_MSS_G(opt)] - rdev 401 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.ports[0], rdev 405 drivers/infiniband/hw/cxgb4/cm.c cxgb4_remove_tid(ep->com.dev->rdev.lldi.tids, 0, ep->hwtid, rdev 558 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_release(ep->com.dev->rdev.lldi.ports[0], rdev 562 drivers/infiniband/hw/cxgb4/cm.c cxgb4_free_atid(ep->com.dev->rdev.lldi.tids, ep->atid); rdev 574 drivers/infiniband/hw/cxgb4/cm.c struct c4iw_rdev *rdev = &ep->com.dev->rdev; rdev 577 drivers/infiniband/hw/cxgb4/cm.c pr_debug("rdev %p\n", rdev); rdev 580 drivers/infiniband/hw/cxgb4/cm.c ret = c4iw_ofld_send(rdev, skb); rdev 618 drivers/infiniband/hw/cxgb4/cm.c (ep->com.dev->rdev.lldi.pf)); rdev 643 drivers/infiniband/hw/cxgb4/cm.c return c4iw_ofld_send(&ep->com.dev->rdev, skb); rdev 658 drivers/infiniband/hw/cxgb4/cm.c return c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); rdev 683 drivers/infiniband/hw/cxgb4/cm.c if (WARN_ON(c4iw_ofld_send(&ep->com.dev->rdev, skb))) rdev 699 drivers/infiniband/hw/cxgb4/cm.c return c4iw_l2t_send(&ep->com.dev->rdev, req_skb, ep->l2t); rdev 736 drivers/infiniband/hw/cxgb4/cm.c enum chip_type adapter_type = ep->com.dev->rdev.lldi.adapter_type; rdev 741 drivers/infiniband/hw/cxgb4/cm.c netdev = ep->com.dev->rdev.lldi.ports[0]; rdev 775 drivers/infiniband/hw/cxgb4/cm.c cxgb_best_mtu(ep->com.dev->rdev.lldi.mtus, ep->mtu, &mtu_idx, rdev 820 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_get(ep->com.dev->rdev.lldi.ports[0], rdev 857 drivers/infiniband/hw/cxgb4/cm.c if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) { rdev 861 drivers/infiniband/hw/cxgb4/cm.c if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) { rdev 909 drivers/infiniband/hw/cxgb4/cm.c if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) { rdev 914 drivers/infiniband/hw/cxgb4/cm.c if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) { rdev 932 drivers/infiniband/hw/cxgb4/cm.c ret = c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); rdev 935 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_release(ep->com.dev->rdev.lldi.ports[0], rdev 1035 drivers/infiniband/hw/cxgb4/cm.c ret = c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); rdev 1122 drivers/infiniband/hw/cxgb4/cm.c return c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); rdev 1211 drivers/infiniband/hw/cxgb4/cm.c return c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); rdev 1221 drivers/infiniband/hw/cxgb4/cm.c struct tid_info *t = dev->rdev.lldi.tids; rdev 1441 drivers/infiniband/hw/cxgb4/cm.c c4iw_ofld_send(&ep->com.dev->rdev, skb); rdev 1579 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.max_ordird_qp) rdev 1901 drivers/infiniband/hw/cxgb4/cm.c adapter_type = ep->com.dev->rdev.lldi.adapter_type; rdev 1972 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.ports[0], rdev 1987 drivers/infiniband/hw/cxgb4/cm.c cxgb_best_mtu(ep->com.dev->rdev.lldi.mtus, ep->mtu, &mtu_idx, rdev 2013 drivers/infiniband/hw/cxgb4/cm.c TX_QUEUE_V(ep->com.dev->rdev.lldi.tx_modq[ep->tx_chan]) | rdev 2027 drivers/infiniband/hw/cxgb4/cm.c return c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); rdev 2099 drivers/infiniband/hw/cxgb4/cm.c ep->l2t = cxgb4_l2t_get(cdev->rdev.lldi.l2t, rdev 2108 drivers/infiniband/hw/cxgb4/cm.c step = cdev->rdev.lldi.ntxq / rdev 2109 drivers/infiniband/hw/cxgb4/cm.c cdev->rdev.lldi.nchan; rdev 2111 drivers/infiniband/hw/cxgb4/cm.c step = cdev->rdev.lldi.nrxq / rdev 2112 drivers/infiniband/hw/cxgb4/cm.c cdev->rdev.lldi.nchan; rdev 2114 drivers/infiniband/hw/cxgb4/cm.c ep->rss_qid = cdev->rdev.lldi.rxq_ids[ rdev 2120 drivers/infiniband/hw/cxgb4/cm.c ep->l2t = cxgb4_l2t_get(cdev->rdev.lldi.l2t, rdev 2127 drivers/infiniband/hw/cxgb4/cm.c step = cdev->rdev.lldi.ntxq / rdev 2128 drivers/infiniband/hw/cxgb4/cm.c cdev->rdev.lldi.nchan; rdev 2131 drivers/infiniband/hw/cxgb4/cm.c step = cdev->rdev.lldi.nrxq / rdev 2132 drivers/infiniband/hw/cxgb4/cm.c cdev->rdev.lldi.nchan; rdev 2133 drivers/infiniband/hw/cxgb4/cm.c ep->rss_qid = cdev->rdev.lldi.rxq_ids[ rdev 2187 drivers/infiniband/hw/cxgb4/cm.c ep->atid = cxgb4_alloc_atid(ep->com.dev->rdev.lldi.tids, ep); rdev 2199 drivers/infiniband/hw/cxgb4/cm.c ep->dst = cxgb_find_route(&ep->com.dev->rdev.lldi, get_real_dev, rdev 2207 drivers/infiniband/hw/cxgb4/cm.c ep->dst = cxgb_find_route6(&ep->com.dev->rdev.lldi, rdev 2224 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.adapter_type, rdev 2249 drivers/infiniband/hw/cxgb4/cm.c cxgb4_free_atid(ep->com.dev->rdev.lldi.tids, ep->atid); rdev 2270 drivers/infiniband/hw/cxgb4/cm.c struct tid_info *t = dev->rdev.lldi.tids; rdev 2291 drivers/infiniband/hw/cxgb4/cm.c mutex_lock(&dev->rdev.stats.lock); rdev 2292 drivers/infiniband/hw/cxgb4/cm.c dev->rdev.stats.neg_adv++; rdev 2293 drivers/infiniband/hw/cxgb4/cm.c mutex_unlock(&dev->rdev.stats.lock); rdev 2307 drivers/infiniband/hw/cxgb4/cm.c mutex_lock(&dev->rdev.stats.lock); rdev 2308 drivers/infiniband/hw/cxgb4/cm.c dev->rdev.stats.tcam_full++; rdev 2309 drivers/infiniband/hw/cxgb4/cm.c mutex_unlock(&dev->rdev.stats.lock); rdev 2311 drivers/infiniband/hw/cxgb4/cm.c dev->rdev.lldi.enable_fw_ofld_conn) { rdev 2327 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.ports[0], rdev 2361 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_release(ep->com.dev->rdev.lldi.ports[0], rdev 2365 drivers/infiniband/hw/cxgb4/cm.c cxgb4_remove_tid(ep->com.dev->rdev.lldi.tids, 0, GET_TID(rpl), rdev 2422 drivers/infiniband/hw/cxgb4/cm.c enum chip_type adapter_type = ep->com.dev->rdev.lldi.adapter_type; rdev 2425 drivers/infiniband/hw/cxgb4/cm.c cxgb_best_mtu(ep->com.dev->rdev.lldi.mtus, ep->mtu, &mtu_idx, rdev 2502 drivers/infiniband/hw/cxgb4/cm.c return c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); rdev 2509 drivers/infiniband/hw/cxgb4/cm.c release_tid(&dev->rdev, hwtid, skb); rdev 2518 drivers/infiniband/hw/cxgb4/cm.c struct tid_info *t = dev->rdev.lldi.tids; rdev 2547 drivers/infiniband/hw/cxgb4/cm.c cxgb_get_4tuple(req, parent_ep->com.dev->rdev.lldi.adapter_type, rdev 2556 drivers/infiniband/hw/cxgb4/cm.c dst = cxgb_find_route(&dev->rdev.lldi, get_real_dev, rdev 2564 drivers/infiniband/hw/cxgb4/cm.c dst = cxgb_find_route6(&dev->rdev.lldi, get_real_dev, rdev 2583 drivers/infiniband/hw/cxgb4/cm.c parent_ep->com.dev->rdev.lldi.adapter_type, tos); rdev 2662 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_get(child_ep->com.dev->rdev.lldi.ports[0], rdev 2836 drivers/infiniband/hw/cxgb4/cm.c mutex_lock(&dev->rdev.stats.lock); rdev 2837 drivers/infiniband/hw/cxgb4/cm.c dev->rdev.stats.neg_adv++; rdev 2838 drivers/infiniband/hw/cxgb4/cm.c mutex_unlock(&dev->rdev.stats.lock); rdev 2943 drivers/infiniband/hw/cxgb4/cm.c c4iw_ofld_send(&ep->com.dev->rdev, rpl_skb); rdev 2953 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.ports[0], rdev 2958 drivers/infiniband/hw/cxgb4/cm.c cxgb4_remove_tid(ep->com.dev->rdev.lldi.tids, 0, ep->hwtid, rdev 3161 drivers/infiniband/hw/cxgb4/cm.c ep->ord <= h->rdev.lldi.max_ordird_qp) { rdev 3239 drivers/infiniband/hw/cxgb4/cm.c ind = in_dev_get(dev->rdev.lldi.ports[0]); rdev 3289 drivers/infiniband/hw/cxgb4/cm.c if (!get_lladdr(dev->rdev.lldi.ports[0], &addr, IFA_F_TENTATIVE)) { rdev 3355 drivers/infiniband/hw/cxgb4/cm.c ep->atid = cxgb4_alloc_atid(dev->rdev.lldi.tids, ep); rdev 3392 drivers/infiniband/hw/cxgb4/cm.c ep->dst = cxgb_find_route(&dev->rdev.lldi, get_real_dev, rdev 3415 drivers/infiniband/hw/cxgb4/cm.c ep->dst = cxgb_find_route6(&dev->rdev.lldi, get_real_dev, rdev 3429 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.adapter_type, cm_id->tos); rdev 3453 drivers/infiniband/hw/cxgb4/cm.c cxgb4_free_atid(ep->com.dev->rdev.lldi.tids, ep->atid); rdev 3470 drivers/infiniband/hw/cxgb4/cm.c err = cxgb4_clip_get(ep->com.dev->rdev.lldi.ports[0], rdev 3476 drivers/infiniband/hw/cxgb4/cm.c err = cxgb4_create_server6(ep->com.dev->rdev.lldi.ports[0], rdev 3479 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.rxq_ids[0]); rdev 3481 drivers/infiniband/hw/cxgb4/cm.c err = c4iw_wait_for_reply(&ep->com.dev->rdev, rdev 3487 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_release(ep->com.dev->rdev.lldi.ports[0], rdev 3502 drivers/infiniband/hw/cxgb4/cm.c if (dev->rdev.lldi.enable_fw_ofld_conn) { rdev 3505 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.ports[0], ep->stid, rdev 3507 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.rxq_ids[0], 0, 0); rdev 3509 drivers/infiniband/hw/cxgb4/cm.c if (c4iw_fatal_error(&ep->com.dev->rdev)) { rdev 3519 drivers/infiniband/hw/cxgb4/cm.c err = cxgb4_create_server(ep->com.dev->rdev.lldi.ports[0], rdev 3521 drivers/infiniband/hw/cxgb4/cm.c 0, ep->com.dev->rdev.lldi.rxq_ids[0]); rdev 3523 drivers/infiniband/hw/cxgb4/cm.c err = c4iw_wait_for_reply(&ep->com.dev->rdev, rdev 3562 drivers/infiniband/hw/cxgb4/cm.c if (dev->rdev.lldi.enable_fw_ofld_conn && rdev 3564 drivers/infiniband/hw/cxgb4/cm.c ep->stid = cxgb4_alloc_sftid(dev->rdev.lldi.tids, rdev 3567 drivers/infiniband/hw/cxgb4/cm.c ep->stid = cxgb4_alloc_stid(dev->rdev.lldi.tids, rdev 3590 drivers/infiniband/hw/cxgb4/cm.c cxgb4_free_stid(ep->com.dev->rdev.lldi.tids, ep->stid, rdev 3609 drivers/infiniband/hw/cxgb4/cm.c if (ep->com.dev->rdev.lldi.enable_fw_ofld_conn && rdev 3612 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.ports[0], ep->stid, rdev 3613 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.rxq_ids[0], 0); rdev 3618 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.ports[0], ep->stid, rdev 3619 drivers/infiniband/hw/cxgb4/cm.c ep->com.dev->rdev.lldi.rxq_ids[0], 0); rdev 3622 drivers/infiniband/hw/cxgb4/cm.c err = c4iw_wait_for_reply(&ep->com.dev->rdev, ep->com.wr_waitp, rdev 3625 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_release(ep->com.dev->rdev.lldi.ports[0], rdev 3629 drivers/infiniband/hw/cxgb4/cm.c cxgb4_free_stid(ep->com.dev->rdev.lldi.tids, ep->stid, rdev 3642 drivers/infiniband/hw/cxgb4/cm.c struct c4iw_rdev *rdev; rdev 3655 drivers/infiniband/hw/cxgb4/cm.c rdev = &ep->com.dev->rdev; rdev 3656 drivers/infiniband/hw/cxgb4/cm.c if (c4iw_fatal_error(rdev)) { rdev 3750 drivers/infiniband/hw/cxgb4/cm.c ep = (struct c4iw_ep *)lookup_atid(dev->rdev.lldi.tids, rdev 3777 drivers/infiniband/hw/cxgb4/cm.c mutex_lock(&dev->rdev.stats.lock); rdev 3778 drivers/infiniband/hw/cxgb4/cm.c dev->rdev.stats.act_ofld_conn_fails++; rdev 3779 drivers/infiniband/hw/cxgb4/cm.c mutex_unlock(&dev->rdev.stats.lock); rdev 3785 drivers/infiniband/hw/cxgb4/cm.c cxgb4_clip_release(ep->com.dev->rdev.lldi.ports[0], rdev 3789 drivers/infiniband/hw/cxgb4/cm.c cxgb4_free_atid(dev->rdev.lldi.tids, atid); rdev 3805 drivers/infiniband/hw/cxgb4/cm.c mutex_lock(&dev->rdev.stats.lock); rdev 3806 drivers/infiniband/hw/cxgb4/cm.c dev->rdev.stats.pas_ofld_conn_fails++; rdev 3807 drivers/infiniband/hw/cxgb4/cm.c mutex_unlock(&dev->rdev.stats.lock); rdev 3960 drivers/infiniband/hw/cxgb4/cm.c type = dev->rdev.lldi.adapter_type; rdev 4039 drivers/infiniband/hw/cxgb4/cm.c ret = cxgb4_ofld_send(dev->rdev.lldi.ports[0], req_skb); rdev 4099 drivers/infiniband/hw/cxgb4/cm.c switch (CHELSIO_CHIP_VERSION(dev->rdev.lldi.adapter_type)) { rdev 4111 drivers/infiniband/hw/cxgb4/cm.c CHELSIO_CHIP_VERSION(dev->rdev.lldi.adapter_type)); rdev 4136 drivers/infiniband/hw/cxgb4/cm.c dst = cxgb_find_route(&dev->rdev.lldi, get_real_dev, rdev 4152 drivers/infiniband/hw/cxgb4/cm.c e = cxgb4_l2t_get(dev->rdev.lldi.l2t, neigh, rdev 4158 drivers/infiniband/hw/cxgb4/cm.c e = cxgb4_l2t_get(dev->rdev.lldi.l2t, neigh, rdev 4169 drivers/infiniband/hw/cxgb4/cm.c step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; rdev 4170 drivers/infiniband/hw/cxgb4/cm.c rss_qid = dev->rdev.lldi.rxq_ids[pi->port_id * step]; rdev 4175 drivers/infiniband/hw/cxgb4/cm.c dev->rdev.lldi.ports[0], rdev 37 drivers/infiniband/hw/cxgb4/cq.c static void destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, rdev 61 drivers/infiniband/hw/cxgb4/cq.c c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, __func__); rdev 64 drivers/infiniband/hw/cxgb4/cq.c dma_free_coherent(&(rdev->lldi.pdev->dev), rdev 67 drivers/infiniband/hw/cxgb4/cq.c c4iw_put_cqid(rdev, cq->cqid, uctx); rdev 70 drivers/infiniband/hw/cxgb4/cq.c static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, rdev 77 drivers/infiniband/hw/cxgb4/cq.c int user = (uctx != &rdev->uctx); rdev 85 drivers/infiniband/hw/cxgb4/cq.c cq->cqid = c4iw_get_cqid(rdev, uctx); rdev 98 drivers/infiniband/hw/cxgb4/cq.c cq->queue = dma_alloc_coherent(&rdev->lldi.pdev->dev, cq->memsize, rdev 142 drivers/infiniband/hw/cxgb4/cq.c rdev->lldi.ciq_ids[cq->vector])); rdev 155 drivers/infiniband/hw/cxgb4/cq.c ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, __func__); rdev 160 drivers/infiniband/hw/cxgb4/cq.c cq->gts = rdev->lldi.gts_reg; rdev 161 drivers/infiniband/hw/cxgb4/cq.c cq->rdev = rdev; rdev 163 drivers/infiniband/hw/cxgb4/cq.c cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, CXGB4_BAR2_QTYPE_INGRESS, rdev 168 drivers/infiniband/hw/cxgb4/cq.c pci_name(rdev->lldi.pdev), cq->cqid); rdev 174 drivers/infiniband/hw/cxgb4/cq.c dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue, rdev 179 drivers/infiniband/hw/cxgb4/cq.c c4iw_put_cqid(rdev, cq->cqid, uctx); rdev 984 drivers/infiniband/hw/cxgb4/cq.c destroy_cq(&chp->rhp->rdev, &chp->cq, rdev 985 drivers/infiniband/hw/cxgb4/cq.c ucontext ? &ucontext->uctx : &chp->cq.rdev->uctx, rdev 1010 drivers/infiniband/hw/cxgb4/cq.c if (vector >= rhp->rdev.lldi.nciq) rdev 1046 drivers/infiniband/hw/cxgb4/cq.c hwentries = min(entries * 2, rhp->rdev.hw_queue.t4_max_iq_size); rdev 1068 drivers/infiniband/hw/cxgb4/cq.c ret = create_cq(&rhp->rdev, &chp->cq, rdev 1069 drivers/infiniband/hw/cxgb4/cq.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx, rdev 1095 drivers/infiniband/hw/cxgb4/cq.c uresp.qid_mask = rhp->rdev.cqmask; rdev 1139 drivers/infiniband/hw/cxgb4/cq.c destroy_cq(&chp->rhp->rdev, &chp->cq, rdev 1140 drivers/infiniband/hw/cxgb4/cq.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx, rdev 97 drivers/infiniband/hw/cxgb4/device.c if (!wq->rdev->wr_log) rdev 100 drivers/infiniband/hw/cxgb4/device.c idx = (atomic_inc_return(&wq->rdev->wr_log_idx) - 1) & rdev 101 drivers/infiniband/hw/cxgb4/device.c (wq->rdev->wr_log_size - 1); rdev 102 drivers/infiniband/hw/cxgb4/device.c le.poll_sge_ts = cxgb4_read_sge_timestamp(wq->rdev->lldi.ports[0]); rdev 119 drivers/infiniband/hw/cxgb4/device.c wq->rdev->wr_log[idx] = le; rdev 130 drivers/infiniband/hw/cxgb4/device.c #define ts2ns(ts) div64_u64((ts) * dev->rdev.lldi.cclk_ps, 1000) rdev 132 drivers/infiniband/hw/cxgb4/device.c idx = atomic_read(&dev->rdev.wr_log_idx) & rdev 133 drivers/infiniband/hw/cxgb4/device.c (dev->rdev.wr_log_size - 1); rdev 136 drivers/infiniband/hw/cxgb4/device.c end = dev->rdev.wr_log_size - 1; rdev 137 drivers/infiniband/hw/cxgb4/device.c lep = &dev->rdev.wr_log[idx]; rdev 165 drivers/infiniband/hw/cxgb4/device.c if (idx > (dev->rdev.wr_log_size - 1)) rdev 167 drivers/infiniband/hw/cxgb4/device.c lep = &dev->rdev.wr_log[idx]; rdev 184 drivers/infiniband/hw/cxgb4/device.c if (dev->rdev.wr_log) rdev 185 drivers/infiniband/hw/cxgb4/device.c for (i = 0; i < dev->rdev.wr_log_size; i++) rdev 186 drivers/infiniband/hw/cxgb4/device.c dev->rdev.wr_log[i].valid = 0; rdev 383 drivers/infiniband/hw/cxgb4/device.c ret = cxgb4_read_tpte(stagd->devp->rdev.lldi.ports[0], (u32)id<<8, rdev 386 drivers/infiniband/hw/cxgb4/device.c dev_err(&stagd->devp->rdev.lldi.pdev->dev, rdev 476 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur, rdev 477 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail); rdev 479 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur, rdev 480 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail); rdev 482 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.srqt.total, dev->rdev.stats.srqt.cur, rdev 483 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.srqt.max, dev->rdev.stats.srqt.fail); rdev 485 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur, rdev 486 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail); rdev 488 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur, rdev 489 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail); rdev 491 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur, rdev 492 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail); rdev 494 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur, rdev 495 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail); rdev 496 drivers/infiniband/hw/cxgb4/device.c seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full); rdev 497 drivers/infiniband/hw/cxgb4/device.c seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty); rdev 498 drivers/infiniband/hw/cxgb4/device.c seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop); rdev 501 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.db_state_transitions, rdev 502 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.db_fc_interruptions); rdev 503 drivers/infiniband/hw/cxgb4/device.c seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full); rdev 505 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.act_ofld_conn_fails); rdev 507 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pas_ofld_conn_fails); rdev 508 drivers/infiniband/hw/cxgb4/device.c seq_printf(seq, "NEG_ADV_RCVD: %10llu\n", dev->rdev.stats.neg_adv); rdev 523 drivers/infiniband/hw/cxgb4/device.c mutex_lock(&dev->rdev.stats.lock); rdev 524 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pd.max = 0; rdev 525 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pd.fail = 0; rdev 526 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.qid.max = 0; rdev 527 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.qid.fail = 0; rdev 528 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.stag.max = 0; rdev 529 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.stag.fail = 0; rdev 530 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pbl.max = 0; rdev 531 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pbl.fail = 0; rdev 532 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.rqt.max = 0; rdev 533 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.rqt.fail = 0; rdev 534 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.rqt.max = 0; rdev 535 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.rqt.fail = 0; rdev 536 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.ocqp.max = 0; rdev 537 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.ocqp.fail = 0; rdev 538 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.db_full = 0; rdev 539 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.db_empty = 0; rdev 540 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.db_drop = 0; rdev 541 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.db_state_transitions = 0; rdev 542 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.tcam_full = 0; rdev 543 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.act_ofld_conn_fails = 0; rdev 544 drivers/infiniband/hw/cxgb4/device.c dev->rdev.stats.pas_ofld_conn_fails = 0; rdev 545 drivers/infiniband/hw/cxgb4/device.c mutex_unlock(&dev->rdev.stats.lock); rdev 747 drivers/infiniband/hw/cxgb4/device.c void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev, rdev 757 drivers/infiniband/hw/cxgb4/device.c if (!(entry->qid & rdev->qpmask)) { rdev 758 drivers/infiniband/hw/cxgb4/device.c c4iw_put_resource(&rdev->resource.qid_table, rdev 760 drivers/infiniband/hw/cxgb4/device.c mutex_lock(&rdev->stats.lock); rdev 761 drivers/infiniband/hw/cxgb4/device.c rdev->stats.qid.cur -= rdev->qpmask + 1; rdev 762 drivers/infiniband/hw/cxgb4/device.c mutex_unlock(&rdev->stats.lock); rdev 775 drivers/infiniband/hw/cxgb4/device.c void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev, rdev 784 drivers/infiniband/hw/cxgb4/device.c static int c4iw_rdev_open(struct c4iw_rdev *rdev) rdev 789 drivers/infiniband/hw/cxgb4/device.c c4iw_init_dev_ucontext(rdev, &rdev->uctx); rdev 796 drivers/infiniband/hw/cxgb4/device.c if (rdev->lldi.udb_density != rdev->lldi.ucq_density) { rdev 798 drivers/infiniband/hw/cxgb4/device.c pci_name(rdev->lldi.pdev), rdev->lldi.udb_density, rdev 799 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.ucq_density); rdev 802 drivers/infiniband/hw/cxgb4/device.c if (rdev->lldi.vr->qp.start != rdev->lldi.vr->cq.start || rdev 803 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->qp.size != rdev->lldi.vr->cq.size) { rdev 805 drivers/infiniband/hw/cxgb4/device.c pci_name(rdev->lldi.pdev), rdev->lldi.vr->qp.start, rdev 806 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->qp.size, rdev->lldi.vr->cq.size, rdev 807 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->cq.size); rdev 812 drivers/infiniband/hw/cxgb4/device.c if (rdev->lldi.sge_host_page_size > PAGE_SIZE) { rdev 814 drivers/infiniband/hw/cxgb4/device.c pci_name(rdev->lldi.pdev), rdev 815 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.sge_host_page_size); rdev 819 drivers/infiniband/hw/cxgb4/device.c factor = PAGE_SIZE / rdev->lldi.sge_host_page_size; rdev 820 drivers/infiniband/hw/cxgb4/device.c rdev->qpmask = (rdev->lldi.udb_density * factor) - 1; rdev 821 drivers/infiniband/hw/cxgb4/device.c rdev->cqmask = (rdev->lldi.ucq_density * factor) - 1; rdev 824 drivers/infiniband/hw/cxgb4/device.c pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start, rdev 825 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->stag.size, c4iw_num_stags(rdev), rdev 826 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->pbl.start, rdev 827 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start, rdev 828 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->rq.size, rdev 829 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->qp.start, rdev 830 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->qp.size, rdev 831 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->cq.start, rdev 832 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->cq.size, rdev 833 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.vr->srq.size); rdev 835 drivers/infiniband/hw/cxgb4/device.c &rdev->lldi.pdev->resource[2], rdev 836 drivers/infiniband/hw/cxgb4/device.c rdev->lldi.db_reg, rdev->lldi.gts_reg, rdev 837 drivers/infiniband/hw/cxgb4/device.c rdev->qpmask, rdev->cqmask); rdev 839 drivers/infiniband/hw/cxgb4/device.c if (c4iw_num_stags(rdev) == 0) rdev 842 drivers/infiniband/hw/cxgb4/device.c rdev->stats.pd.total = T4_MAX_NUM_PD; rdev 843 drivers/infiniband/hw/cxgb4/device.c rdev->stats.stag.total = rdev->lldi.vr->stag.size; rdev 844 drivers/infiniband/hw/cxgb4/device.c rdev->stats.pbl.total = rdev->lldi.vr->pbl.size; rdev 845 drivers/infiniband/hw/cxgb4/device.c rdev->stats.rqt.total = rdev->lldi.vr->rq.size; rdev 846 drivers/infiniband/hw/cxgb4/device.c rdev->stats.srqt.total = rdev->lldi.vr->srq.size; rdev 847 drivers/infiniband/hw/cxgb4/device.c rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size; rdev 848 drivers/infiniband/hw/cxgb4/device.c rdev->stats.qid.total = rdev->lldi.vr->qp.size; rdev 850 drivers/infiniband/hw/cxgb4/device.c err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), rdev 851 drivers/infiniband/hw/cxgb4/device.c T4_MAX_NUM_PD, rdev->lldi.vr->srq.size); rdev 856 drivers/infiniband/hw/cxgb4/device.c err = c4iw_pblpool_create(rdev); rdev 861 drivers/infiniband/hw/cxgb4/device.c err = c4iw_rqtpool_create(rdev); rdev 866 drivers/infiniband/hw/cxgb4/device.c err = c4iw_ocqp_pool_create(rdev); rdev 871 drivers/infiniband/hw/cxgb4/device.c rdev->status_page = (struct t4_dev_status_page *) rdev 873 drivers/infiniband/hw/cxgb4/device.c if (!rdev->status_page) { rdev 877 drivers/infiniband/hw/cxgb4/device.c rdev->status_page->qp_start = rdev->lldi.vr->qp.start; rdev 878 drivers/infiniband/hw/cxgb4/device.c rdev->status_page->qp_size = rdev->lldi.vr->qp.size; rdev 879 drivers/infiniband/hw/cxgb4/device.c rdev->status_page->cq_start = rdev->lldi.vr->cq.start; rdev 880 drivers/infiniband/hw/cxgb4/device.c rdev->status_page->cq_size = rdev->lldi.vr->cq.size; rdev 881 drivers/infiniband/hw/cxgb4/device.c rdev->status_page->write_cmpl_supported = rdev->lldi.write_cmpl_support; rdev 884 drivers/infiniband/hw/cxgb4/device.c rdev->wr_log = kcalloc(1 << c4iw_wr_log_size_order, rdev 885 drivers/infiniband/hw/cxgb4/device.c sizeof(*rdev->wr_log), rdev 887 drivers/infiniband/hw/cxgb4/device.c if (rdev->wr_log) { rdev 888 drivers/infiniband/hw/cxgb4/device.c rdev->wr_log_size = 1 << c4iw_wr_log_size_order; rdev 889 drivers/infiniband/hw/cxgb4/device.c atomic_set(&rdev->wr_log_idx, 0); rdev 893 drivers/infiniband/hw/cxgb4/device.c rdev->free_workq = create_singlethread_workqueue("iw_cxgb4_free"); rdev 894 drivers/infiniband/hw/cxgb4/device.c if (!rdev->free_workq) { rdev 899 drivers/infiniband/hw/cxgb4/device.c rdev->status_page->db_off = 0; rdev 901 drivers/infiniband/hw/cxgb4/device.c init_completion(&rdev->rqt_compl); rdev 902 drivers/infiniband/hw/cxgb4/device.c init_completion(&rdev->pbl_compl); rdev 903 drivers/infiniband/hw/cxgb4/device.c kref_init(&rdev->rqt_kref); rdev 904 drivers/infiniband/hw/cxgb4/device.c kref_init(&rdev->pbl_kref); rdev 908 drivers/infiniband/hw/cxgb4/device.c if (c4iw_wr_log && rdev->wr_log) rdev 909 drivers/infiniband/hw/cxgb4/device.c kfree(rdev->wr_log); rdev 910 drivers/infiniband/hw/cxgb4/device.c free_page((unsigned long)rdev->status_page); rdev 912 drivers/infiniband/hw/cxgb4/device.c c4iw_ocqp_pool_destroy(rdev); rdev 914 drivers/infiniband/hw/cxgb4/device.c c4iw_rqtpool_destroy(rdev); rdev 916 drivers/infiniband/hw/cxgb4/device.c c4iw_pblpool_destroy(rdev); rdev 918 drivers/infiniband/hw/cxgb4/device.c c4iw_destroy_resource(&rdev->resource); rdev 922 drivers/infiniband/hw/cxgb4/device.c static void c4iw_rdev_close(struct c4iw_rdev *rdev) rdev 924 drivers/infiniband/hw/cxgb4/device.c kfree(rdev->wr_log); rdev 925 drivers/infiniband/hw/cxgb4/device.c c4iw_release_dev_ucontext(rdev, &rdev->uctx); rdev 926 drivers/infiniband/hw/cxgb4/device.c free_page((unsigned long)rdev->status_page); rdev 927 drivers/infiniband/hw/cxgb4/device.c c4iw_pblpool_destroy(rdev); rdev 928 drivers/infiniband/hw/cxgb4/device.c c4iw_rqtpool_destroy(rdev); rdev 929 drivers/infiniband/hw/cxgb4/device.c wait_for_completion(&rdev->pbl_compl); rdev 930 drivers/infiniband/hw/cxgb4/device.c wait_for_completion(&rdev->rqt_compl); rdev 931 drivers/infiniband/hw/cxgb4/device.c c4iw_ocqp_pool_destroy(rdev); rdev 932 drivers/infiniband/hw/cxgb4/device.c destroy_workqueue(rdev->free_workq); rdev 933 drivers/infiniband/hw/cxgb4/device.c c4iw_destroy_resource(&rdev->resource); rdev 938 drivers/infiniband/hw/cxgb4/device.c c4iw_rdev_close(&ctx->dev->rdev); rdev 945 drivers/infiniband/hw/cxgb4/device.c if (ctx->dev->rdev.bar2_kva) rdev 946 drivers/infiniband/hw/cxgb4/device.c iounmap(ctx->dev->rdev.bar2_kva); rdev 947 drivers/infiniband/hw/cxgb4/device.c if (ctx->dev->rdev.oc_mw_kva) rdev 948 drivers/infiniband/hw/cxgb4/device.c iounmap(ctx->dev->rdev.oc_mw_kva); rdev 986 drivers/infiniband/hw/cxgb4/device.c devp->rdev.lldi = *infop; rdev 990 drivers/infiniband/hw/cxgb4/device.c devp->rdev.lldi.sge_ingpadboundary, rdev 991 drivers/infiniband/hw/cxgb4/device.c devp->rdev.lldi.sge_egrstatuspagesize); rdev 993 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_eq_status_entries = rdev 994 drivers/infiniband/hw/cxgb4/device.c devp->rdev.lldi.sge_egrstatuspagesize / 64; rdev 995 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_eq_size = 65520; rdev 996 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_iq_size = 65520; rdev 997 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_rq_size = 8192 - rdev 998 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_eq_status_entries - 1; rdev 999 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_sq_size = rdev 1000 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_eq_size - rdev 1001 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_eq_status_entries - 1; rdev 1002 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_qp_depth = rdev 1003 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_rq_size; rdev 1004 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_cq_depth = rdev 1005 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_max_iq_size - 2; rdev 1006 drivers/infiniband/hw/cxgb4/device.c devp->rdev.hw_queue.t4_stat_len = rdev 1007 drivers/infiniband/hw/cxgb4/device.c devp->rdev.lldi.sge_egrstatuspagesize; rdev 1014 drivers/infiniband/hw/cxgb4/device.c devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2); rdev 1015 drivers/infiniband/hw/cxgb4/device.c if (!is_t4(devp->rdev.lldi.adapter_type)) { rdev 1016 drivers/infiniband/hw/cxgb4/device.c devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa, rdev 1017 drivers/infiniband/hw/cxgb4/device.c pci_resource_len(devp->rdev.lldi.pdev, 2)); rdev 1018 drivers/infiniband/hw/cxgb4/device.c if (!devp->rdev.bar2_kva) { rdev 1024 drivers/infiniband/hw/cxgb4/device.c devp->rdev.oc_mw_pa = rdev 1025 drivers/infiniband/hw/cxgb4/device.c pci_resource_start(devp->rdev.lldi.pdev, 2) + rdev 1026 drivers/infiniband/hw/cxgb4/device.c pci_resource_len(devp->rdev.lldi.pdev, 2) - rdev 1027 drivers/infiniband/hw/cxgb4/device.c roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size); rdev 1028 drivers/infiniband/hw/cxgb4/device.c devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa, rdev 1029 drivers/infiniband/hw/cxgb4/device.c devp->rdev.lldi.vr->ocq.size); rdev 1030 drivers/infiniband/hw/cxgb4/device.c if (!devp->rdev.oc_mw_kva) { rdev 1038 drivers/infiniband/hw/cxgb4/device.c devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size, rdev 1039 drivers/infiniband/hw/cxgb4/device.c devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva); rdev 1041 drivers/infiniband/hw/cxgb4/device.c ret = c4iw_rdev_open(&devp->rdev); rdev 1054 drivers/infiniband/hw/cxgb4/device.c mutex_init(&devp->rdev.stats.lock); rdev 1058 drivers/infiniband/hw/cxgb4/device.c devp->avail_ird = devp->rdev.lldi.max_ird_adapter; rdev 1062 drivers/infiniband/hw/cxgb4/device.c pci_name(devp->rdev.lldi.pdev), rdev 1150 drivers/infiniband/hw/cxgb4/device.c skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift); rdev 1251 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.flags |= T4_FATAL_ERROR; rdev 1273 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.stats.db_state_transitions++; rdev 1275 drivers/infiniband/hw/cxgb4/device.c if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED) { rdev 1279 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.status_page->db_off = 1; rdev 1322 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.stats.db_state_transitions++; rdev 1323 drivers/infiniband/hw/cxgb4/device.c if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED) { rdev 1327 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.status_page->db_off = 0; rdev 1331 drivers/infiniband/hw/cxgb4/device.c if (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1) rdev 1332 drivers/infiniband/hw/cxgb4/device.c < (ctx->dev->rdev.lldi.dbfifo_int_thresh << rdev 1350 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.stats.db_fc_interruptions++; rdev 1377 drivers/infiniband/hw/cxgb4/device.c ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0], rdev 1390 drivers/infiniband/hw/cxgb4/device.c ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0], rdev 1407 drivers/infiniband/hw/cxgb4/device.c while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) { rdev 1427 drivers/infiniband/hw/cxgb4/device.c ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]); rdev 1476 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.stats.db_full++; rdev 1480 drivers/infiniband/hw/cxgb4/device.c mutex_lock(&ctx->dev->rdev.stats.lock); rdev 1481 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.stats.db_empty++; rdev 1482 drivers/infiniband/hw/cxgb4/device.c mutex_unlock(&ctx->dev->rdev.stats.lock); rdev 1486 drivers/infiniband/hw/cxgb4/device.c mutex_lock(&ctx->dev->rdev.stats.lock); rdev 1487 drivers/infiniband/hw/cxgb4/device.c ctx->dev->rdev.stats.db_drop++; rdev 1488 drivers/infiniband/hw/cxgb4/device.c mutex_unlock(&ctx->dev->rdev.stats.lock); rdev 43 drivers/infiniband/hw/cxgb4/ev.c ret = cxgb4_read_tpte(dev->rdev.lldi.ports[0], stag, rdev 46 drivers/infiniband/hw/cxgb4/ev.c dev_err(&dev->rdev.lldi.pdev->dev, rdev 66 drivers/infiniband/hw/cxgb4/ev.c dev_err(&dev->rdev.lldi.pdev->dev, rdev 198 drivers/infiniband/hw/cxgb4/iw_cxgb4.h static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) rdev 200 drivers/infiniband/hw/cxgb4/iw_cxgb4.h return rdev->flags & T4_FATAL_ERROR; rdev 203 drivers/infiniband/hw/cxgb4/iw_cxgb4.h static inline int c4iw_num_stags(struct c4iw_rdev *rdev) rdev 205 drivers/infiniband/hw/cxgb4/iw_cxgb4.h return (int)(rdev->lldi.vr->stag.size >> 5); rdev 259 drivers/infiniband/hw/cxgb4/iw_cxgb4.h static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev, rdev 266 drivers/infiniband/hw/cxgb4/iw_cxgb4.h if (c4iw_fatal_error(rdev)) { rdev 274 drivers/infiniband/hw/cxgb4/iw_cxgb4.h func, pci_name(rdev->lldi.pdev), hwtid, qpid); rdev 275 drivers/infiniband/hw/cxgb4/iw_cxgb4.h rdev->flags |= T4_FATAL_ERROR; rdev 281 drivers/infiniband/hw/cxgb4/iw_cxgb4.h pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid); rdev 286 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb); rdev 288 drivers/infiniband/hw/cxgb4/iw_cxgb4.h static inline int c4iw_ref_send_wait(struct c4iw_rdev *rdev, rdev 299 drivers/infiniband/hw/cxgb4/iw_cxgb4.h ret = c4iw_ofld_send(rdev, skb); rdev 304 drivers/infiniband/hw/cxgb4/iw_cxgb4.h return c4iw_wait_for_reply(rdev, wr_waitp, hwtid, qpid, func); rdev 316 drivers/infiniband/hw/cxgb4/iw_cxgb4.h struct c4iw_rdev rdev; rdev 344 drivers/infiniband/hw/cxgb4/iw_cxgb4.h static inline struct c4iw_dev *rdev_to_c4iw_dev(struct c4iw_rdev *rdev) rdev 346 drivers/infiniband/hw/cxgb4/iw_cxgb4.h return container_of(rdev, struct c4iw_dev, rdev); rdev 363 drivers/infiniband/hw/cxgb4/iw_cxgb4.h return min(dev->rdev.lldi.max_ordird_qp, c4iw_max_read_depth); rdev 947 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qpid, rdev 951 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, rdev 953 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev); rdev 954 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_pblpool_create(struct c4iw_rdev *rdev); rdev 955 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_rqtpool_create(struct c4iw_rdev *rdev); rdev 956 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev); rdev 957 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_pblpool_destroy(struct c4iw_rdev *rdev); rdev 958 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev); rdev 959 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev); rdev 961 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev); rdev 966 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev, rdev 968 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev, rdev 1014 drivers/infiniband/hw/cxgb4/iw_cxgb4.h u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size); rdev 1015 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size); rdev 1016 drivers/infiniband/hw/cxgb4/iw_cxgb4.h u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size); rdev 1017 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size); rdev 1018 drivers/infiniband/hw/cxgb4/iw_cxgb4.h u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size); rdev 1019 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size); rdev 1028 drivers/infiniband/hw/cxgb4/iw_cxgb4.h u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx); rdev 1029 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid, rdev 1031 drivers/infiniband/hw/cxgb4/iw_cxgb4.h u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx); rdev 1032 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid, rdev 1038 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void __iomem *c4iw_bar2_addrs(struct c4iw_rdev *rdev, unsigned int qid, rdev 1041 drivers/infiniband/hw/cxgb4/iw_cxgb4.h int c4iw_alloc_srq_idx(struct c4iw_rdev *rdev); rdev 1042 drivers/infiniband/hw/cxgb4/iw_cxgb4.h void c4iw_free_srq_idx(struct c4iw_rdev *rdev, int idx); rdev 56 drivers/infiniband/hw/cxgb4/mem.c return (is_t4(dev->rdev.lldi.adapter_type) || rdev 57 drivers/infiniband/hw/cxgb4/mem.c is_t5(dev->rdev.lldi.adapter_type)) && rdev 61 drivers/infiniband/hw/cxgb4/mem.c static int _c4iw_write_mem_dma_aligned(struct c4iw_rdev *rdev, u32 addr, rdev 92 drivers/infiniband/hw/cxgb4/mem.c T5_ULP_MEMIO_FID_V(rdev->lldi.rxq_ids[0])); rdev 104 drivers/infiniband/hw/cxgb4/mem.c ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, __func__); rdev 106 drivers/infiniband/hw/cxgb4/mem.c ret = c4iw_ofld_send(rdev, skb); rdev 110 drivers/infiniband/hw/cxgb4/mem.c static int _c4iw_write_mem_inline(struct c4iw_rdev *rdev, u32 addr, u32 len, rdev 120 drivers/infiniband/hw/cxgb4/mem.c if (is_t4(rdev->lldi.adapter_type)) rdev 177 drivers/infiniband/hw/cxgb4/mem.c ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, rdev 180 drivers/infiniband/hw/cxgb4/mem.c ret = c4iw_ofld_send(rdev, skb); rdev 190 drivers/infiniband/hw/cxgb4/mem.c static int _c4iw_write_mem_dma(struct c4iw_rdev *rdev, u32 addr, u32 len, rdev 200 drivers/infiniband/hw/cxgb4/mem.c daddr = dma_map_single(&rdev->lldi.pdev->dev, data, len, DMA_TO_DEVICE); rdev 201 drivers/infiniband/hw/cxgb4/mem.c if (dma_mapping_error(&rdev->lldi.pdev->dev, daddr)) rdev 214 drivers/infiniband/hw/cxgb4/mem.c ret = _c4iw_write_mem_dma_aligned(rdev, addr, dmalen, daddr, rdev 223 drivers/infiniband/hw/cxgb4/mem.c ret = _c4iw_write_mem_inline(rdev, addr, remain, data, skb, rdev 226 drivers/infiniband/hw/cxgb4/mem.c dma_unmap_single(&rdev->lldi.pdev->dev, save, len, DMA_TO_DEVICE); rdev 234 drivers/infiniband/hw/cxgb4/mem.c static int write_adapter_mem(struct c4iw_rdev *rdev, u32 addr, u32 len, rdev 240 drivers/infiniband/hw/cxgb4/mem.c if (!rdev->lldi.ulptx_memwrite_dsgl || !use_dsgl) { rdev 241 drivers/infiniband/hw/cxgb4/mem.c ret = _c4iw_write_mem_inline(rdev, addr, len, data, skb, rdev 247 drivers/infiniband/hw/cxgb4/mem.c ret = _c4iw_write_mem_inline(rdev, addr, len, data, skb, rdev 252 drivers/infiniband/hw/cxgb4/mem.c ret = _c4iw_write_mem_dma(rdev, addr, len, data, skb, wr_waitp); rdev 255 drivers/infiniband/hw/cxgb4/mem.c pci_name(rdev->lldi.pdev)); rdev 256 drivers/infiniband/hw/cxgb4/mem.c ret = _c4iw_write_mem_inline(rdev, addr, len, data, skb, rdev 270 drivers/infiniband/hw/cxgb4/mem.c static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry, rdev 282 drivers/infiniband/hw/cxgb4/mem.c if (c4iw_fatal_error(rdev)) rdev 293 drivers/infiniband/hw/cxgb4/mem.c stag_idx = c4iw_get_resource(&rdev->resource.tpt_table); rdev 295 drivers/infiniband/hw/cxgb4/mem.c mutex_lock(&rdev->stats.lock); rdev 296 drivers/infiniband/hw/cxgb4/mem.c rdev->stats.stag.fail++; rdev 297 drivers/infiniband/hw/cxgb4/mem.c mutex_unlock(&rdev->stats.lock); rdev 301 drivers/infiniband/hw/cxgb4/mem.c mutex_lock(&rdev->stats.lock); rdev 302 drivers/infiniband/hw/cxgb4/mem.c rdev->stats.stag.cur += 32; rdev 303 drivers/infiniband/hw/cxgb4/mem.c if (rdev->stats.stag.cur > rdev->stats.stag.max) rdev 304 drivers/infiniband/hw/cxgb4/mem.c rdev->stats.stag.max = rdev->stats.stag.cur; rdev 305 drivers/infiniband/hw/cxgb4/mem.c mutex_unlock(&rdev->stats.lock); rdev 325 drivers/infiniband/hw/cxgb4/mem.c FW_RI_TPTE_PBLADDR_V(PBL_OFF(rdev, pbl_addr)>>3)); rdev 332 drivers/infiniband/hw/cxgb4/mem.c err = write_adapter_mem(rdev, stag_idx + rdev 333 drivers/infiniband/hw/cxgb4/mem.c (rdev->lldi.vr->stag.start >> 5), rdev 337 drivers/infiniband/hw/cxgb4/mem.c c4iw_put_resource(&rdev->resource.tpt_table, stag_idx); rdev 338 drivers/infiniband/hw/cxgb4/mem.c mutex_lock(&rdev->stats.lock); rdev 339 drivers/infiniband/hw/cxgb4/mem.c rdev->stats.stag.cur -= 32; rdev 340 drivers/infiniband/hw/cxgb4/mem.c mutex_unlock(&rdev->stats.lock); rdev 346 drivers/infiniband/hw/cxgb4/mem.c static int write_pbl(struct c4iw_rdev *rdev, __be64 *pbl, rdev 352 drivers/infiniband/hw/cxgb4/mem.c pbl_addr, rdev->lldi.vr->pbl.start, rdev 355 drivers/infiniband/hw/cxgb4/mem.c err = write_adapter_mem(rdev, pbl_addr >> 5, pbl_size << 3, pbl, NULL, rdev 360 drivers/infiniband/hw/cxgb4/mem.c static int dereg_mem(struct c4iw_rdev *rdev, u32 stag, u32 pbl_size, rdev 364 drivers/infiniband/hw/cxgb4/mem.c return write_tpt_entry(rdev, 1, &stag, 0, 0, 0, 0, 0, 0, 0UL, 0, 0, rdev 368 drivers/infiniband/hw/cxgb4/mem.c static int allocate_window(struct c4iw_rdev *rdev, u32 *stag, u32 pdid, rdev 372 drivers/infiniband/hw/cxgb4/mem.c return write_tpt_entry(rdev, 0, stag, 0, pdid, FW_RI_STAG_MW, 0, 0, 0, rdev 376 drivers/infiniband/hw/cxgb4/mem.c static int deallocate_window(struct c4iw_rdev *rdev, u32 stag, rdev 380 drivers/infiniband/hw/cxgb4/mem.c return write_tpt_entry(rdev, 1, &stag, 0, 0, 0, 0, 0, 0, 0UL, 0, 0, 0, rdev 384 drivers/infiniband/hw/cxgb4/mem.c static int allocate_stag(struct c4iw_rdev *rdev, u32 *stag, u32 pdid, rdev 389 drivers/infiniband/hw/cxgb4/mem.c return write_tpt_entry(rdev, 0, stag, 0, pdid, FW_RI_STAG_NSMR, 0, 0, 0, rdev 414 drivers/infiniband/hw/cxgb4/mem.c ret = write_tpt_entry(&rhp->rdev, 0, &stag, 1, mhp->attr.pdid, rdev 427 drivers/infiniband/hw/cxgb4/mem.c dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size, rdev 436 drivers/infiniband/hw/cxgb4/mem.c mhp->attr.pbl_addr = c4iw_pblpool_alloc(&mhp->rhp->rdev, rdev 485 drivers/infiniband/hw/cxgb4/mem.c ret = write_tpt_entry(&rhp->rdev, 0, &stag, 1, php->pdid, rdev 497 drivers/infiniband/hw/cxgb4/mem.c dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size, rdev 568 drivers/infiniband/hw/cxgb4/mem.c err = write_pbl(&mhp->rhp->rdev, pages, rdev 579 drivers/infiniband/hw/cxgb4/mem.c err = write_pbl(&mhp->rhp->rdev, pages, rdev 602 drivers/infiniband/hw/cxgb4/mem.c c4iw_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr, rdev 646 drivers/infiniband/hw/cxgb4/mem.c ret = allocate_window(&rhp->rdev, &stag, php->pdid, mhp->wr_waitp); rdev 663 drivers/infiniband/hw/cxgb4/mem.c deallocate_window(&rhp->rdev, mhp->attr.stag, mhp->dereg_skb, rdev 684 drivers/infiniband/hw/cxgb4/mem.c deallocate_window(&rhp->rdev, mhp->attr.stag, mhp->dereg_skb, rdev 708 drivers/infiniband/hw/cxgb4/mem.c max_num_sg > t4_max_fr_depth(rhp->rdev.lldi.ulptx_memwrite_dsgl && rdev 725 drivers/infiniband/hw/cxgb4/mem.c mhp->mpl = dma_alloc_coherent(&rhp->rdev.lldi.pdev->dev, rdev 738 drivers/infiniband/hw/cxgb4/mem.c ret = allocate_stag(&rhp->rdev, &stag, php->pdid, rdev 757 drivers/infiniband/hw/cxgb4/mem.c dereg_mem(&rhp->rdev, stag, mhp->attr.pbl_size, rdev 760 drivers/infiniband/hw/cxgb4/mem.c c4iw_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr, rdev 763 drivers/infiniband/hw/cxgb4/mem.c dma_free_coherent(&mhp->rhp->rdev.lldi.pdev->dev, rdev 808 drivers/infiniband/hw/cxgb4/mem.c dma_free_coherent(&mhp->rhp->rdev.lldi.pdev->dev, rdev 810 drivers/infiniband/hw/cxgb4/mem.c dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size, rdev 813 drivers/infiniband/hw/cxgb4/mem.c c4iw_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr, rdev 72 drivers/infiniband/hw/cxgb4/provider.c c4iw_release_dev_ucontext(&rhp->rdev, &ucontext->uctx); rdev 86 drivers/infiniband/hw/cxgb4/provider.c c4iw_init_dev_ucontext(&rhp->rdev, &context->uctx); rdev 92 drivers/infiniband/hw/cxgb4/provider.c rhp->rdev.flags |= T4_STATUS_PAGE_DISABLED; rdev 113 drivers/infiniband/hw/cxgb4/provider.c mm->addr = virt_to_phys(rhp->rdev.status_page); rdev 128 drivers/infiniband/hw/cxgb4/provider.c struct c4iw_rdev *rdev; rdev 140 drivers/infiniband/hw/cxgb4/provider.c rdev = &(to_c4iw_dev(context->device)->rdev); rdev 149 drivers/infiniband/hw/cxgb4/provider.c if ((addr >= pci_resource_start(rdev->lldi.pdev, 0)) && rdev 150 drivers/infiniband/hw/cxgb4/provider.c (addr < (pci_resource_start(rdev->lldi.pdev, 0) + rdev 151 drivers/infiniband/hw/cxgb4/provider.c pci_resource_len(rdev->lldi.pdev, 0)))) { rdev 160 drivers/infiniband/hw/cxgb4/provider.c } else if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) && rdev 161 drivers/infiniband/hw/cxgb4/provider.c (addr < (pci_resource_start(rdev->lldi.pdev, 2) + rdev 162 drivers/infiniband/hw/cxgb4/provider.c pci_resource_len(rdev->lldi.pdev, 2)))) { rdev 167 drivers/infiniband/hw/cxgb4/provider.c if (addr >= rdev->oc_mw_pa) rdev 170 drivers/infiniband/hw/cxgb4/provider.c if (!is_t4(rdev->lldi.adapter_type)) rdev 201 drivers/infiniband/hw/cxgb4/provider.c c4iw_put_resource(&rhp->rdev.resource.pdid_table, php->pdid); rdev 202 drivers/infiniband/hw/cxgb4/provider.c mutex_lock(&rhp->rdev.stats.lock); rdev 203 drivers/infiniband/hw/cxgb4/provider.c rhp->rdev.stats.pd.cur--; rdev 204 drivers/infiniband/hw/cxgb4/provider.c mutex_unlock(&rhp->rdev.stats.lock); rdev 216 drivers/infiniband/hw/cxgb4/provider.c pdid = c4iw_get_resource(&rhp->rdev.resource.pdid_table); rdev 230 drivers/infiniband/hw/cxgb4/provider.c mutex_lock(&rhp->rdev.stats.lock); rdev 231 drivers/infiniband/hw/cxgb4/provider.c rhp->rdev.stats.pd.cur++; rdev 232 drivers/infiniband/hw/cxgb4/provider.c if (rhp->rdev.stats.pd.cur > rhp->rdev.stats.pd.max) rdev 233 drivers/infiniband/hw/cxgb4/provider.c rhp->rdev.stats.pd.max = rhp->rdev.stats.pd.cur; rdev 234 drivers/infiniband/hw/cxgb4/provider.c mutex_unlock(&rhp->rdev.stats.lock); rdev 258 drivers/infiniband/hw/cxgb4/provider.c memcpy(&(gid->raw[0]), dev->rdev.lldi.ports[port-1]->dev_addr, 6); rdev 274 drivers/infiniband/hw/cxgb4/provider.c memcpy(&props->sys_image_guid, dev->rdev.lldi.ports[0]->dev_addr, 6); rdev 275 drivers/infiniband/hw/cxgb4/provider.c props->hw_ver = CHELSIO_CHIP_RELEASE(dev->rdev.lldi.adapter_type); rdev 276 drivers/infiniband/hw/cxgb4/provider.c props->fw_ver = dev->rdev.lldi.fw_vers; rdev 279 drivers/infiniband/hw/cxgb4/provider.c props->vendor_id = (u32)dev->rdev.lldi.pdev->vendor; rdev 280 drivers/infiniband/hw/cxgb4/provider.c props->vendor_part_id = (u32)dev->rdev.lldi.pdev->device; rdev 282 drivers/infiniband/hw/cxgb4/provider.c props->max_qp = dev->rdev.lldi.vr->qp.size / 2; rdev 283 drivers/infiniband/hw/cxgb4/provider.c props->max_srq = dev->rdev.lldi.vr->srq.size; rdev 284 drivers/infiniband/hw/cxgb4/provider.c props->max_qp_wr = dev->rdev.hw_queue.t4_max_qp_depth; rdev 285 drivers/infiniband/hw/cxgb4/provider.c props->max_srq_wr = dev->rdev.hw_queue.t4_max_qp_depth; rdev 290 drivers/infiniband/hw/cxgb4/provider.c props->max_res_rd_atom = dev->rdev.lldi.max_ird_adapter; rdev 291 drivers/infiniband/hw/cxgb4/provider.c props->max_qp_rd_atom = min(dev->rdev.lldi.max_ordird_qp, rdev 294 drivers/infiniband/hw/cxgb4/provider.c props->max_cq = dev->rdev.lldi.vr->qp.size; rdev 295 drivers/infiniband/hw/cxgb4/provider.c props->max_cqe = dev->rdev.hw_queue.t4_max_cq_depth; rdev 296 drivers/infiniband/hw/cxgb4/provider.c props->max_mr = c4iw_num_stags(&dev->rdev); rdev 300 drivers/infiniband/hw/cxgb4/provider.c t4_max_fr_depth(dev->rdev.lldi.ulptx_memwrite_dsgl && use_dsgl); rdev 333 drivers/infiniband/hw/cxgb4/provider.c CHELSIO_CHIP_RELEASE(c4iw_dev->rdev.lldi.adapter_type)); rdev 343 drivers/infiniband/hw/cxgb4/provider.c struct net_device *lldev = c4iw_dev->rdev.lldi.ports[0]; rdev 358 drivers/infiniband/hw/cxgb4/provider.c return sprintf(buf, "%x.%x\n", c4iw_dev->rdev.lldi.pdev->vendor, rdev 359 drivers/infiniband/hw/cxgb4/provider.c c4iw_dev->rdev.lldi.pdev->device); rdev 405 drivers/infiniband/hw/cxgb4/provider.c cxgb4_get_tcp_stats(c4iw_dev->rdev.lldi.pdev, &v4, &v6); rdev 454 drivers/infiniband/hw/cxgb4/provider.c FW_HDR_FW_VER_MAJOR_G(c4iw_dev->rdev.lldi.fw_vers), rdev 455 drivers/infiniband/hw/cxgb4/provider.c FW_HDR_FW_VER_MINOR_G(c4iw_dev->rdev.lldi.fw_vers), rdev 456 drivers/infiniband/hw/cxgb4/provider.c FW_HDR_FW_VER_MICRO_G(c4iw_dev->rdev.lldi.fw_vers), rdev 457 drivers/infiniband/hw/cxgb4/provider.c FW_HDR_FW_VER_BUILD_G(c4iw_dev->rdev.lldi.fw_vers)); rdev 521 drivers/infiniband/hw/cxgb4/provider.c static int set_netdevs(struct ib_device *ib_dev, struct c4iw_rdev *rdev) rdev 526 drivers/infiniband/hw/cxgb4/provider.c for (i = 0; i < rdev->lldi.nports; i++) { rdev 527 drivers/infiniband/hw/cxgb4/provider.c ret = ib_device_set_netdev(ib_dev, rdev->lldi.ports[i], rdev 543 drivers/infiniband/hw/cxgb4/provider.c memcpy(&dev->ibdev.node_guid, dev->rdev.lldi.ports[0]->dev_addr, 6); rdev 573 drivers/infiniband/hw/cxgb4/provider.c dev->ibdev.phys_port_cnt = dev->rdev.lldi.nports; rdev 574 drivers/infiniband/hw/cxgb4/provider.c dev->ibdev.num_comp_vectors = dev->rdev.lldi.nciq; rdev 575 drivers/infiniband/hw/cxgb4/provider.c dev->ibdev.dev.parent = &dev->rdev.lldi.pdev->dev; rdev 577 drivers/infiniband/hw/cxgb4/provider.c memcpy(dev->ibdev.iw_ifname, dev->rdev.lldi.ports[0]->name, rdev 582 drivers/infiniband/hw/cxgb4/provider.c ret = set_netdevs(&dev->ibdev, &dev->rdev); rdev 74 drivers/infiniband/hw/cxgb4/qp.c dev_warn(&dev->rdev.lldi.pdev->dev, rdev 95 drivers/infiniband/hw/cxgb4/qp.c static void dealloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) rdev 97 drivers/infiniband/hw/cxgb4/qp.c c4iw_ocqp_pool_free(rdev, sq->dma_addr, sq->memsize); rdev 100 drivers/infiniband/hw/cxgb4/qp.c static void dealloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) rdev 102 drivers/infiniband/hw/cxgb4/qp.c dma_free_coherent(&(rdev->lldi.pdev->dev), sq->memsize, sq->queue, rdev 106 drivers/infiniband/hw/cxgb4/qp.c static void dealloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) rdev 109 drivers/infiniband/hw/cxgb4/qp.c dealloc_oc_sq(rdev, sq); rdev 111 drivers/infiniband/hw/cxgb4/qp.c dealloc_host_sq(rdev, sq); rdev 114 drivers/infiniband/hw/cxgb4/qp.c static int alloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) rdev 116 drivers/infiniband/hw/cxgb4/qp.c if (!ocqp_support || !ocqp_supported(&rdev->lldi)) rdev 118 drivers/infiniband/hw/cxgb4/qp.c sq->dma_addr = c4iw_ocqp_pool_alloc(rdev, sq->memsize); rdev 121 drivers/infiniband/hw/cxgb4/qp.c sq->phys_addr = rdev->oc_mw_pa + sq->dma_addr - rdev 122 drivers/infiniband/hw/cxgb4/qp.c rdev->lldi.vr->ocq.start; rdev 123 drivers/infiniband/hw/cxgb4/qp.c sq->queue = (__force union t4_wr *)(rdev->oc_mw_kva + sq->dma_addr - rdev 124 drivers/infiniband/hw/cxgb4/qp.c rdev->lldi.vr->ocq.start); rdev 129 drivers/infiniband/hw/cxgb4/qp.c static int alloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) rdev 131 drivers/infiniband/hw/cxgb4/qp.c sq->queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), sq->memsize, rdev 140 drivers/infiniband/hw/cxgb4/qp.c static int alloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq, int user) rdev 144 drivers/infiniband/hw/cxgb4/qp.c ret = alloc_oc_sq(rdev, sq); rdev 146 drivers/infiniband/hw/cxgb4/qp.c ret = alloc_host_sq(rdev, sq); rdev 150 drivers/infiniband/hw/cxgb4/qp.c static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, rdev 157 drivers/infiniband/hw/cxgb4/qp.c dealloc_sq(rdev, &wq->sq); rdev 159 drivers/infiniband/hw/cxgb4/qp.c c4iw_put_qpid(rdev, wq->sq.qid, uctx); rdev 162 drivers/infiniband/hw/cxgb4/qp.c dma_free_coherent(&rdev->lldi.pdev->dev, rdev 165 drivers/infiniband/hw/cxgb4/qp.c c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); rdev 167 drivers/infiniband/hw/cxgb4/qp.c c4iw_put_qpid(rdev, wq->rq.qid, uctx); rdev 177 drivers/infiniband/hw/cxgb4/qp.c void __iomem *c4iw_bar2_addrs(struct c4iw_rdev *rdev, unsigned int qid, rdev 184 drivers/infiniband/hw/cxgb4/qp.c ret = cxgb4_bar2_sge_qregs(rdev->lldi.ports[0], qid, qtype, rdev 191 drivers/infiniband/hw/cxgb4/qp.c *pbar2_pa = (rdev->bar2_pa + bar2_qoffset) & PAGE_MASK; rdev 193 drivers/infiniband/hw/cxgb4/qp.c if (is_t4(rdev->lldi.adapter_type)) rdev 196 drivers/infiniband/hw/cxgb4/qp.c return rdev->bar2_kva + bar2_qoffset; rdev 199 drivers/infiniband/hw/cxgb4/qp.c static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, rdev 205 drivers/infiniband/hw/cxgb4/qp.c int user = (uctx != &rdev->uctx); rdev 213 drivers/infiniband/hw/cxgb4/qp.c wq->sq.qid = c4iw_get_qpid(rdev, uctx); rdev 218 drivers/infiniband/hw/cxgb4/qp.c wq->rq.qid = c4iw_get_qpid(rdev, uctx); rdev 250 drivers/infiniband/hw/cxgb4/qp.c wq->rq.rqt_hwaddr = c4iw_rqtpool_alloc(rdev, wq->rq.rqt_size); rdev 257 drivers/infiniband/hw/cxgb4/qp.c ret = alloc_sq(rdev, &wq->sq, user); rdev 264 drivers/infiniband/hw/cxgb4/qp.c wq->rq.queue = dma_alloc_coherent(&rdev->lldi.pdev->dev, rdev 280 drivers/infiniband/hw/cxgb4/qp.c wq->db = rdev->lldi.db_reg; rdev 282 drivers/infiniband/hw/cxgb4/qp.c wq->sq.bar2_va = c4iw_bar2_addrs(rdev, wq->sq.qid, rdev 287 drivers/infiniband/hw/cxgb4/qp.c wq->rq.bar2_va = c4iw_bar2_addrs(rdev, wq->rq.qid, rdev 297 drivers/infiniband/hw/cxgb4/qp.c pci_name(rdev->lldi.pdev), wq->sq.qid, wq->rq.qid); rdev 301 drivers/infiniband/hw/cxgb4/qp.c wq->rdev = rdev; rdev 330 drivers/infiniband/hw/cxgb4/qp.c rdev->hw_queue.t4_eq_status_entries; rdev 359 drivers/infiniband/hw/cxgb4/qp.c rdev->hw_queue.t4_eq_status_entries; rdev 381 drivers/infiniband/hw/cxgb4/qp.c ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, wq->sq.qid, __func__); rdev 392 drivers/infiniband/hw/cxgb4/qp.c dma_free_coherent(&rdev->lldi.pdev->dev, rdev 396 drivers/infiniband/hw/cxgb4/qp.c dealloc_sq(rdev, &wq->sq); rdev 399 drivers/infiniband/hw/cxgb4/qp.c c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); rdev 407 drivers/infiniband/hw/cxgb4/qp.c c4iw_put_qpid(rdev, wq->rq.qid, uctx); rdev 409 drivers/infiniband/hw/cxgb4/qp.c c4iw_put_qpid(rdev, wq->sq.qid, uctx); rdev 719 drivers/infiniband/hw/cxgb4/qp.c cxgb4_read_sge_timestamp(qhp->rhp->rdev.lldi.ports[0]); rdev 743 drivers/infiniband/hw/cxgb4/qp.c cxgb4_read_sge_timestamp(qhp->rhp->rdev.lldi.ports[0]); rdev 806 drivers/infiniband/hw/cxgb4/qp.c PBL_OFF(&mhp->rhp->rdev, mhp->attr.pbl_addr)>>3)); rdev 1120 drivers/infiniband/hw/cxgb4/qp.c if (qhp->rhp->rdev.lldi.write_cmpl_support && rdev 1121 drivers/infiniband/hw/cxgb4/qp.c CHELSIO_CHIP_VERSION(qhp->rhp->rdev.lldi.adapter_type) >= rdev 1163 drivers/infiniband/hw/cxgb4/qp.c if (unlikely(!rhp->rdev.lldi.write_w_imm_support)) { rdev 1195 drivers/infiniband/hw/cxgb4/qp.c if (rhp->rdev.lldi.fr_nsmr_tpte_wr_support && rdev 1204 drivers/infiniband/hw/cxgb4/qp.c rhp->rdev.lldi.ulptx_memwrite_dsgl); rdev 1236 drivers/infiniband/hw/cxgb4/qp.c rhp->rdev.lldi.ports[0]); rdev 1250 drivers/infiniband/hw/cxgb4/qp.c if (!rhp->rdev.status_page->db_off) { rdev 1311 drivers/infiniband/hw/cxgb4/qp.c qhp->rhp->rdev.lldi.ports[0]); rdev 1330 drivers/infiniband/hw/cxgb4/qp.c if (!qhp->rhp->rdev.status_page->db_off) { rdev 1589 drivers/infiniband/hw/cxgb4/qp.c c4iw_ofld_send(&qhp->rhp->rdev, skb); rdev 1717 drivers/infiniband/hw/cxgb4/qp.c ret = c4iw_ref_send_wait(&rhp->rdev, skb, ep->com.wr_waitp, rdev 1809 drivers/infiniband/hw/cxgb4/qp.c rhp->rdev.lldi.vr->rq.start); rdev 1820 drivers/infiniband/hw/cxgb4/qp.c ret = c4iw_ref_send_wait(&rhp->rdev, skb, qhp->ep->com.wr_waitp, rdev 2102 drivers/infiniband/hw/cxgb4/qp.c destroy_qp(&rhp->rdev, &qhp->wq, rdev 2103 drivers/infiniband/hw/cxgb4/qp.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx, !qhp->srq); rdev 2143 drivers/infiniband/hw/cxgb4/qp.c if (attrs->cap.max_recv_wr > rhp->rdev.hw_queue.t4_max_rq_size) rdev 2150 drivers/infiniband/hw/cxgb4/qp.c if (attrs->cap.max_send_wr > rhp->rdev.hw_queue.t4_max_sq_size) rdev 2168 drivers/infiniband/hw/cxgb4/qp.c (sqsize + rhp->rdev.hw_queue.t4_eq_status_entries) * rdev 2174 drivers/infiniband/hw/cxgb4/qp.c (rqsize + rhp->rdev.hw_queue.t4_eq_status_entries) * rdev 2185 drivers/infiniband/hw/cxgb4/qp.c ret = create_qp(&rhp->rdev, &qhp->wq, &schp->cq, &rchp->cq, rdev 2186 drivers/infiniband/hw/cxgb4/qp.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx, rdev 2260 drivers/infiniband/hw/cxgb4/qp.c if (rhp->rdev.lldi.write_w_imm_support) rdev 2262 drivers/infiniband/hw/cxgb4/qp.c uresp.qid_mask = rhp->rdev.qpmask; rdev 2316 drivers/infiniband/hw/cxgb4/qp.c (pci_resource_start(rhp->rdev.lldi.pdev, 0) + rdev 2358 drivers/infiniband/hw/cxgb4/qp.c destroy_qp(&rhp->rdev, &qhp->wq, rdev 2359 drivers/infiniband/hw/cxgb4/qp.c ucontext ? &ucontext->uctx : &rhp->rdev.uctx, !attrs->srq); rdev 2411 drivers/infiniband/hw/cxgb4/qp.c if (!is_t4(to_c4iw_qp(ibqp)->rhp->rdev.lldi.adapter_type) && rdev 2483 drivers/infiniband/hw/cxgb4/qp.c struct c4iw_rdev *rdev = &srq->rhp->rdev; rdev 2507 drivers/infiniband/hw/cxgb4/qp.c c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, __func__); rdev 2509 drivers/infiniband/hw/cxgb4/qp.c dma_free_coherent(&rdev->lldi.pdev->dev, rdev 2512 drivers/infiniband/hw/cxgb4/qp.c c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size); rdev 2514 drivers/infiniband/hw/cxgb4/qp.c c4iw_put_qpid(rdev, wq->qid, uctx); rdev 2520 drivers/infiniband/hw/cxgb4/qp.c struct c4iw_rdev *rdev = &srq->rhp->rdev; rdev 2521 drivers/infiniband/hw/cxgb4/qp.c int user = (uctx != &rdev->uctx); rdev 2530 drivers/infiniband/hw/cxgb4/qp.c wq->qid = c4iw_get_qpid(rdev, uctx); rdev 2547 drivers/infiniband/hw/cxgb4/qp.c wq->rqt_hwaddr = c4iw_rqtpool_alloc(rdev, wq->rqt_size); rdev 2550 drivers/infiniband/hw/cxgb4/qp.c wq->rqt_abs_idx = (wq->rqt_hwaddr - rdev->lldi.vr->rq.start) >> rdev 2553 drivers/infiniband/hw/cxgb4/qp.c wq->queue = dma_alloc_coherent(&rdev->lldi.pdev->dev, wq->memsize, rdev 2560 drivers/infiniband/hw/cxgb4/qp.c wq->bar2_va = c4iw_bar2_addrs(rdev, wq->qid, CXGB4_BAR2_QTYPE_EGRESS, rdev 2570 drivers/infiniband/hw/cxgb4/qp.c pci_name(rdev->lldi.pdev), wq->qid); rdev 2598 drivers/infiniband/hw/cxgb4/qp.c rdev->hw_queue.t4_eq_status_entries; rdev 2619 drivers/infiniband/hw/cxgb4/qp.c rdev->lldi.vr->rq.start); rdev 2623 drivers/infiniband/hw/cxgb4/qp.c ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, wq->qid, __func__); rdev 2635 drivers/infiniband/hw/cxgb4/qp.c dma_free_coherent(&rdev->lldi.pdev->dev, rdev 2639 drivers/infiniband/hw/cxgb4/qp.c c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size); rdev 2647 drivers/infiniband/hw/cxgb4/qp.c c4iw_put_qpid(rdev, wq->qid, uctx); rdev 2688 drivers/infiniband/hw/cxgb4/qp.c if (!rhp->rdev.lldi.vr->srq.size) rdev 2690 drivers/infiniband/hw/cxgb4/qp.c if (attrs->attr.max_wr > rhp->rdev.hw_queue.t4_max_rq_size) rdev 2708 drivers/infiniband/hw/cxgb4/qp.c srq->idx = c4iw_alloc_srq_idx(&rhp->rdev); rdev 2726 drivers/infiniband/hw/cxgb4/qp.c (rqsize + rhp->rdev.hw_queue.t4_eq_status_entries) * rdev 2732 drivers/infiniband/hw/cxgb4/qp.c &rhp->rdev.uctx, srq->wr_waitp); rdev 2737 drivers/infiniband/hw/cxgb4/qp.c if (CHELSIO_CHIP_VERSION(rhp->rdev.lldi.adapter_type) > CHELSIO_T6) rdev 2753 drivers/infiniband/hw/cxgb4/qp.c uresp.qid_mask = rhp->rdev.qpmask; rdev 2789 drivers/infiniband/hw/cxgb4/qp.c free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx, rdev 2794 drivers/infiniband/hw/cxgb4/qp.c c4iw_free_srq_idx(&rhp->rdev, srq->idx); rdev 2812 drivers/infiniband/hw/cxgb4/qp.c free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx, rdev 2814 drivers/infiniband/hw/cxgb4/qp.c c4iw_free_srq_idx(&rhp->rdev, srq->idx); rdev 38 drivers/infiniband/hw/cxgb4/resource.c static int c4iw_init_qid_table(struct c4iw_rdev *rdev) rdev 42 drivers/infiniband/hw/cxgb4/resource.c if (c4iw_id_table_alloc(&rdev->resource.qid_table, rdev 43 drivers/infiniband/hw/cxgb4/resource.c rdev->lldi.vr->qp.start, rdev 44 drivers/infiniband/hw/cxgb4/resource.c rdev->lldi.vr->qp.size, rdev 45 drivers/infiniband/hw/cxgb4/resource.c rdev->lldi.vr->qp.size, 0)) rdev 48 drivers/infiniband/hw/cxgb4/resource.c for (i = rdev->lldi.vr->qp.start; rdev 49 drivers/infiniband/hw/cxgb4/resource.c i < rdev->lldi.vr->qp.start + rdev->lldi.vr->qp.size; i++) rdev 50 drivers/infiniband/hw/cxgb4/resource.c if (!(i & rdev->qpmask)) rdev 51 drivers/infiniband/hw/cxgb4/resource.c c4iw_id_free(&rdev->resource.qid_table, i); rdev 56 drivers/infiniband/hw/cxgb4/resource.c int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, rdev 60 drivers/infiniband/hw/cxgb4/resource.c err = c4iw_id_table_alloc(&rdev->resource.tpt_table, 0, nr_tpt, 1, rdev 64 drivers/infiniband/hw/cxgb4/resource.c err = c4iw_init_qid_table(rdev); rdev 67 drivers/infiniband/hw/cxgb4/resource.c err = c4iw_id_table_alloc(&rdev->resource.pdid_table, 0, rdev 72 drivers/infiniband/hw/cxgb4/resource.c err = c4iw_id_table_alloc(&rdev->resource.srq_table, 0, rdev 75 drivers/infiniband/hw/cxgb4/resource.c err = c4iw_id_table_alloc(&rdev->resource.srq_table, 0, rdev 81 drivers/infiniband/hw/cxgb4/resource.c c4iw_id_table_free(&rdev->resource.pdid_table); rdev 83 drivers/infiniband/hw/cxgb4/resource.c c4iw_id_table_free(&rdev->resource.qid_table); rdev 85 drivers/infiniband/hw/cxgb4/resource.c c4iw_id_table_free(&rdev->resource.tpt_table); rdev 108 drivers/infiniband/hw/cxgb4/resource.c u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx) rdev 122 drivers/infiniband/hw/cxgb4/resource.c qid = c4iw_get_resource(&rdev->resource.qid_table); rdev 125 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 126 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.qid.cur += rdev->qpmask + 1; rdev 127 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 128 drivers/infiniband/hw/cxgb4/resource.c for (i = qid+1; i & rdev->qpmask; i++) { rdev 145 drivers/infiniband/hw/cxgb4/resource.c for (i = qid+1; i & rdev->qpmask; i++) { rdev 156 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 157 drivers/infiniband/hw/cxgb4/resource.c if (rdev->stats.qid.cur > rdev->stats.qid.max) rdev 158 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.qid.max = rdev->stats.qid.cur; rdev 159 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 163 drivers/infiniband/hw/cxgb4/resource.c void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid, rdev 178 drivers/infiniband/hw/cxgb4/resource.c u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx) rdev 192 drivers/infiniband/hw/cxgb4/resource.c qid = c4iw_get_resource(&rdev->resource.qid_table); rdev 194 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 195 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.qid.fail++; rdev 196 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 199 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 200 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.qid.cur += rdev->qpmask + 1; rdev 201 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 202 drivers/infiniband/hw/cxgb4/resource.c for (i = qid+1; i & rdev->qpmask; i++) { rdev 219 drivers/infiniband/hw/cxgb4/resource.c for (i = qid; i & rdev->qpmask; i++) { rdev 230 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 231 drivers/infiniband/hw/cxgb4/resource.c if (rdev->stats.qid.cur > rdev->stats.qid.max) rdev 232 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.qid.max = rdev->stats.qid.cur; rdev 233 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 237 drivers/infiniband/hw/cxgb4/resource.c void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid, rdev 265 drivers/infiniband/hw/cxgb4/resource.c u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size) rdev 267 drivers/infiniband/hw/cxgb4/resource.c unsigned long addr = gen_pool_alloc(rdev->pbl_pool, size); rdev 269 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 271 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.pbl.cur += roundup(size, 1 << MIN_PBL_SHIFT); rdev 272 drivers/infiniband/hw/cxgb4/resource.c if (rdev->stats.pbl.cur > rdev->stats.pbl.max) rdev 273 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.pbl.max = rdev->stats.pbl.cur; rdev 274 drivers/infiniband/hw/cxgb4/resource.c kref_get(&rdev->pbl_kref); rdev 276 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.pbl.fail++; rdev 277 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 283 drivers/infiniband/hw/cxgb4/resource.c struct c4iw_rdev *rdev; rdev 285 drivers/infiniband/hw/cxgb4/resource.c rdev = container_of(kref, struct c4iw_rdev, pbl_kref); rdev 286 drivers/infiniband/hw/cxgb4/resource.c gen_pool_destroy(rdev->pbl_pool); rdev 287 drivers/infiniband/hw/cxgb4/resource.c complete(&rdev->pbl_compl); rdev 290 drivers/infiniband/hw/cxgb4/resource.c void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size) rdev 293 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 294 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.pbl.cur -= roundup(size, 1 << MIN_PBL_SHIFT); rdev 295 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 296 drivers/infiniband/hw/cxgb4/resource.c gen_pool_free(rdev->pbl_pool, (unsigned long)addr, size); rdev 297 drivers/infiniband/hw/cxgb4/resource.c kref_put(&rdev->pbl_kref, destroy_pblpool); rdev 300 drivers/infiniband/hw/cxgb4/resource.c int c4iw_pblpool_create(struct c4iw_rdev *rdev) rdev 304 drivers/infiniband/hw/cxgb4/resource.c rdev->pbl_pool = gen_pool_create(MIN_PBL_SHIFT, -1); rdev 305 drivers/infiniband/hw/cxgb4/resource.c if (!rdev->pbl_pool) rdev 308 drivers/infiniband/hw/cxgb4/resource.c pbl_start = rdev->lldi.vr->pbl.start; rdev 309 drivers/infiniband/hw/cxgb4/resource.c pbl_chunk = rdev->lldi.vr->pbl.size; rdev 314 drivers/infiniband/hw/cxgb4/resource.c if (gen_pool_add(rdev->pbl_pool, pbl_start, pbl_chunk, -1)) { rdev 333 drivers/infiniband/hw/cxgb4/resource.c void c4iw_pblpool_destroy(struct c4iw_rdev *rdev) rdev 335 drivers/infiniband/hw/cxgb4/resource.c kref_put(&rdev->pbl_kref, destroy_pblpool); rdev 344 drivers/infiniband/hw/cxgb4/resource.c u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size) rdev 346 drivers/infiniband/hw/cxgb4/resource.c unsigned long addr = gen_pool_alloc(rdev->rqt_pool, size << 6); rdev 350 drivers/infiniband/hw/cxgb4/resource.c pci_name(rdev->lldi.pdev)); rdev 351 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 353 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.rqt.cur += roundup(size << 6, 1 << MIN_RQT_SHIFT); rdev 354 drivers/infiniband/hw/cxgb4/resource.c if (rdev->stats.rqt.cur > rdev->stats.rqt.max) rdev 355 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.rqt.max = rdev->stats.rqt.cur; rdev 356 drivers/infiniband/hw/cxgb4/resource.c kref_get(&rdev->rqt_kref); rdev 358 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.rqt.fail++; rdev 359 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 365 drivers/infiniband/hw/cxgb4/resource.c struct c4iw_rdev *rdev; rdev 367 drivers/infiniband/hw/cxgb4/resource.c rdev = container_of(kref, struct c4iw_rdev, rqt_kref); rdev 368 drivers/infiniband/hw/cxgb4/resource.c gen_pool_destroy(rdev->rqt_pool); rdev 369 drivers/infiniband/hw/cxgb4/resource.c complete(&rdev->rqt_compl); rdev 372 drivers/infiniband/hw/cxgb4/resource.c void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size) rdev 375 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 376 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.rqt.cur -= roundup(size << 6, 1 << MIN_RQT_SHIFT); rdev 377 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 378 drivers/infiniband/hw/cxgb4/resource.c gen_pool_free(rdev->rqt_pool, (unsigned long)addr, size << 6); rdev 379 drivers/infiniband/hw/cxgb4/resource.c kref_put(&rdev->rqt_kref, destroy_rqtpool); rdev 382 drivers/infiniband/hw/cxgb4/resource.c int c4iw_rqtpool_create(struct c4iw_rdev *rdev) rdev 387 drivers/infiniband/hw/cxgb4/resource.c rdev->rqt_pool = gen_pool_create(MIN_RQT_SHIFT, -1); rdev 388 drivers/infiniband/hw/cxgb4/resource.c if (!rdev->rqt_pool) rdev 395 drivers/infiniband/hw/cxgb4/resource.c if (rdev->lldi.vr->srq.size) rdev 398 drivers/infiniband/hw/cxgb4/resource.c rqt_start = rdev->lldi.vr->rq.start + skip; rdev 399 drivers/infiniband/hw/cxgb4/resource.c rqt_chunk = rdev->lldi.vr->rq.size - skip; rdev 404 drivers/infiniband/hw/cxgb4/resource.c if (gen_pool_add(rdev->rqt_pool, rqt_start, rqt_chunk, -1)) { rdev 422 drivers/infiniband/hw/cxgb4/resource.c void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev) rdev 424 drivers/infiniband/hw/cxgb4/resource.c kref_put(&rdev->rqt_kref, destroy_rqtpool); rdev 427 drivers/infiniband/hw/cxgb4/resource.c int c4iw_alloc_srq_idx(struct c4iw_rdev *rdev) rdev 431 drivers/infiniband/hw/cxgb4/resource.c idx = c4iw_id_alloc(&rdev->resource.srq_table); rdev 432 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 434 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.srqt.fail++; rdev 435 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 438 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.srqt.cur++; rdev 439 drivers/infiniband/hw/cxgb4/resource.c if (rdev->stats.srqt.cur > rdev->stats.srqt.max) rdev 440 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.srqt.max = rdev->stats.srqt.cur; rdev 441 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 445 drivers/infiniband/hw/cxgb4/resource.c void c4iw_free_srq_idx(struct c4iw_rdev *rdev, int idx) rdev 447 drivers/infiniband/hw/cxgb4/resource.c c4iw_id_free(&rdev->resource.srq_table, idx); rdev 448 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 449 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.srqt.cur--; rdev 450 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 458 drivers/infiniband/hw/cxgb4/resource.c u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size) rdev 460 drivers/infiniband/hw/cxgb4/resource.c unsigned long addr = gen_pool_alloc(rdev->ocqp_pool, size); rdev 463 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 464 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.ocqp.cur += roundup(size, 1 << MIN_OCQP_SHIFT); rdev 465 drivers/infiniband/hw/cxgb4/resource.c if (rdev->stats.ocqp.cur > rdev->stats.ocqp.max) rdev 466 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.ocqp.max = rdev->stats.ocqp.cur; rdev 467 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 472 drivers/infiniband/hw/cxgb4/resource.c void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size) rdev 475 drivers/infiniband/hw/cxgb4/resource.c mutex_lock(&rdev->stats.lock); rdev 476 drivers/infiniband/hw/cxgb4/resource.c rdev->stats.ocqp.cur -= roundup(size, 1 << MIN_OCQP_SHIFT); rdev 477 drivers/infiniband/hw/cxgb4/resource.c mutex_unlock(&rdev->stats.lock); rdev 478 drivers/infiniband/hw/cxgb4/resource.c gen_pool_free(rdev->ocqp_pool, (unsigned long)addr, size); rdev 481 drivers/infiniband/hw/cxgb4/resource.c int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev) rdev 485 drivers/infiniband/hw/cxgb4/resource.c rdev->ocqp_pool = gen_pool_create(MIN_OCQP_SHIFT, -1); rdev 486 drivers/infiniband/hw/cxgb4/resource.c if (!rdev->ocqp_pool) rdev 489 drivers/infiniband/hw/cxgb4/resource.c start = rdev->lldi.vr->ocq.start; rdev 490 drivers/infiniband/hw/cxgb4/resource.c chunk = rdev->lldi.vr->ocq.size; rdev 495 drivers/infiniband/hw/cxgb4/resource.c if (gen_pool_add(rdev->ocqp_pool, start, chunk, -1)) { rdev 513 drivers/infiniband/hw/cxgb4/resource.c void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev) rdev 515 drivers/infiniband/hw/cxgb4/resource.c gen_pool_destroy(rdev->ocqp_pool); rdev 454 drivers/infiniband/hw/cxgb4/restrack.c ret = cxgb4_read_tpte(dev->rdev.lldi.ports[0], stag, (__be32 *)&tpte); rdev 456 drivers/infiniband/hw/cxgb4/restrack.c dev_err(&dev->rdev.lldi.pdev->dev, rdev 386 drivers/infiniband/hw/cxgb4/t4.h struct c4iw_rdev *rdev; rdev 700 drivers/infiniband/hw/cxgb4/t4.h struct c4iw_rdev *rdev; rdev 196 drivers/infiniband/sw/rxe/rxe_net.c struct net_device *rdev = ndev; rdev 200 drivers/infiniband/sw/rxe/rxe_net.c if (!rxe && is_vlan_dev(rdev)) { rdev 201 drivers/infiniband/sw/rxe/rxe_net.c rdev = vlan_dev_real_dev(ndev); rdev 202 drivers/infiniband/sw/rxe/rxe_net.c rxe = rxe_get_dev_from_net(rdev); rdev 34 drivers/input/misc/retu-pwrbutton.c struct retu_dev *rdev = input_get_drvdata(idev); rdev 37 drivers/input/misc/retu-pwrbutton.c state = !(retu_read(rdev, RETU_REG_STATUS) & RETU_STATUS_PWRONX); rdev 46 drivers/input/misc/retu-pwrbutton.c struct retu_dev *rdev = dev_get_drvdata(pdev->dev.parent); rdev 63 drivers/input/misc/retu-pwrbutton.c input_set_drvdata(idev, rdev); rdev 455 drivers/macintosh/macio_asic.c struct macio_dev *rdev, *mdev, *mbdev = NULL, *sdev = NULL; rdev 471 drivers/macintosh/macio_asic.c rdev = macio_add_one_device(chip, parent, pnode, NULL, root_res); rdev 472 drivers/macintosh/macio_asic.c if (rdev == NULL) rdev 474 drivers/macintosh/macio_asic.c root_res = &rdev->resource[0]; rdev 481 drivers/macintosh/macio_asic.c mdev = macio_add_one_device(chip, &rdev->ofdev.dev, np, NULL, rdev 55 drivers/md/dm-raid.c struct md_rdev rdev; rdev 247 drivers/md/dm-raid.c struct md_rdev rdev; rdev 681 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 687 drivers/md/dm-raid.c rdev_for_each(rdev, mddev) rdev 688 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags)) rdev 689 drivers/md/dm-raid.c rdev->sectors = mddev->dev_sectors; rdev 765 drivers/md/dm-raid.c md_rdev_init(&rs->dev[i].rdev); rdev 785 drivers/md/dm-raid.c md_rdev_clear(&rs->journal_dev.rdev); rdev 792 drivers/md/dm-raid.c md_rdev_clear(&rs->dev[i].rdev); rdev 830 drivers/md/dm-raid.c rs->dev[i].rdev.raid_disk = i; rdev 839 drivers/md/dm-raid.c rs->dev[i].rdev.data_offset = 0; rdev 840 drivers/md/dm-raid.c rs->dev[i].rdev.new_data_offset = 0; rdev 841 drivers/md/dm-raid.c rs->dev[i].rdev.mddev = &rs->md; rdev 855 drivers/md/dm-raid.c rs->dev[i].rdev.sb_page = alloc_page(GFP_KERNEL); rdev 856 drivers/md/dm-raid.c if (!rs->dev[i].rdev.sb_page) { rdev 867 drivers/md/dm-raid.c if (!test_bit(In_sync, &rs->dev[i].rdev.flags) && rdev 868 drivers/md/dm-raid.c (!rs->dev[i].rdev.recovery_offset)) { rdev 890 drivers/md/dm-raid.c rs->dev[i].rdev.meta_bdev = rs->dev[i].meta_dev->bdev; rdev 892 drivers/md/dm-raid.c rs->dev[i].rdev.bdev = rs->dev[i].data_dev->bdev; rdev 893 drivers/md/dm-raid.c list_add_tail(&rs->dev[i].rdev.same_set, &rs->md.disks); rdev 894 drivers/md/dm-raid.c if (!test_bit(In_sync, &rs->dev[i].rdev.flags)) rdev 899 drivers/md/dm-raid.c list_add_tail(&rs->journal_dev.rdev.same_set, &rs->md.disks); rdev 1005 drivers/md/dm-raid.c if (!test_bit(In_sync, &rs->dev[i].rdev.flags) || rdev 1006 drivers/md/dm-raid.c !rs->dev[i].rdev.sb_page) rdev 1050 drivers/md/dm-raid.c if ((!rs->dev[i].rdev.sb_page || rdev 1051 drivers/md/dm-raid.c !test_bit(In_sync, &rs->dev[i].rdev.flags)) && rdev 1076 drivers/md/dm-raid.c if ((!rs->dev[i].rdev.sb_page || rdev 1077 drivers/md/dm-raid.c !test_bit(In_sync, &rs->dev[i].rdev.flags)) && rdev 1174 drivers/md/dm-raid.c set_bit(In_sync, &rs->dev[i].rdev.flags); rdev 1175 drivers/md/dm-raid.c rs->dev[i].rdev.recovery_offset = MaxSector; rdev 1257 drivers/md/dm-raid.c jdev = &rs->journal_dev.rdev; rdev 1317 drivers/md/dm-raid.c clear_bit(In_sync, &rd->rdev.flags); rdev 1318 drivers/md/dm-raid.c clear_bit(Faulty, &rd->rdev.flags); rdev 1319 drivers/md/dm-raid.c rd->rdev.recovery_offset = 0; rdev 1333 drivers/md/dm-raid.c set_bit(WriteMostly, &rs->dev[value].rdev.flags); rdev 1589 drivers/md/dm-raid.c struct md_rdev *rdev = &rs->dev[i].rdev; rdev 1591 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags) && rdev 1592 drivers/md/dm-raid.c rdev->bdev && rdev->sectors) rdev 1593 drivers/md/dm-raid.c return rdev->sectors; rdev 1603 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 1605 drivers/md/dm-raid.c rdev_for_each(rdev, &rs->md) rdev 1606 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags) && rdev->bdev) { rdev 1607 drivers/md/dm-raid.c ds = min(ds, to_sector(i_size_read(rdev->bdev->bd_inode))); rdev 1623 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 1659 drivers/md/dm-raid.c rdev_for_each(rdev, mddev) rdev 1660 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags)) rdev 1661 drivers/md/dm-raid.c rdev->sectors = dev_sectors; rdev 2047 drivers/md/dm-raid.c static int read_disk_sb(struct md_rdev *rdev, int size, bool force_reload) rdev 2049 drivers/md/dm-raid.c BUG_ON(!rdev->sb_page); rdev 2051 drivers/md/dm-raid.c if (rdev->sb_loaded && !force_reload) rdev 2054 drivers/md/dm-raid.c rdev->sb_loaded = 0; rdev 2056 drivers/md/dm-raid.c if (!sync_page_io(rdev, 0, size, rdev->sb_page, REQ_OP_READ, 0, true)) { rdev 2058 drivers/md/dm-raid.c rdev->raid_disk); rdev 2059 drivers/md/dm-raid.c md_error(rdev->mddev, rdev); rdev 2060 drivers/md/dm-raid.c set_bit(Faulty, &rdev->flags); rdev 2064 drivers/md/dm-raid.c rdev->sb_loaded = 1; rdev 2096 drivers/md/dm-raid.c static void super_sync(struct mddev *mddev, struct md_rdev *rdev) rdev 2105 drivers/md/dm-raid.c if (!rdev->meta_bdev) rdev 2108 drivers/md/dm-raid.c BUG_ON(!rdev->sb_page); rdev 2110 drivers/md/dm-raid.c sb = page_address(rdev->sb_page); rdev 2115 drivers/md/dm-raid.c if (!rs->dev[i].data_dev || test_bit(Faulty, &rs->dev[i].rdev.flags)) { rdev 2127 drivers/md/dm-raid.c sb->array_position = cpu_to_le32(rdev->raid_disk); rdev 2131 drivers/md/dm-raid.c sb->disk_recovery_offset = cpu_to_le64(rdev->recovery_offset); rdev 2163 drivers/md/dm-raid.c sb->data_offset = cpu_to_le64(rdev->data_offset); rdev 2164 drivers/md/dm-raid.c sb->new_data_offset = cpu_to_le64(rdev->new_data_offset); rdev 2165 drivers/md/dm-raid.c sb->sectors = cpu_to_le64(rdev->sectors); rdev 2169 drivers/md/dm-raid.c memset(sb + 1, 0, rdev->sb_size - sizeof(*sb)); rdev 2180 drivers/md/dm-raid.c static int super_load(struct md_rdev *rdev, struct md_rdev *refdev) rdev 2187 drivers/md/dm-raid.c r = read_disk_sb(rdev, rdev->sb_size, false); rdev 2191 drivers/md/dm-raid.c sb = page_address(rdev->sb_page); rdev 2199 drivers/md/dm-raid.c (!test_bit(In_sync, &rdev->flags) && !rdev->recovery_offset)) { rdev 2200 drivers/md/dm-raid.c super_sync(rdev->mddev, rdev); rdev 2202 drivers/md/dm-raid.c set_bit(FirstUse, &rdev->flags); rdev 2206 drivers/md/dm-raid.c set_bit(MD_SB_CHANGE_DEVS, &rdev->mddev->sb_flags); rdev 2223 drivers/md/dm-raid.c static int super_init_validation(struct raid_set *rs, struct md_rdev *rdev) rdev 2235 drivers/md/dm-raid.c sb = page_address(rdev->sb_page); rdev 2343 drivers/md/dm-raid.c if (test_bit(Journal, &rdev->flags)) rdev 2401 drivers/md/dm-raid.c if (test_bit(Journal, &rdev->flags) || rdev 2449 drivers/md/dm-raid.c static int super_validate(struct raid_set *rs, struct md_rdev *rdev) rdev 2454 drivers/md/dm-raid.c if (rs_is_raid0(rs) || !rdev->sb_page || rdev->raid_disk < 0) rdev 2457 drivers/md/dm-raid.c sb = page_address(rdev->sb_page); rdev 2463 drivers/md/dm-raid.c if (!mddev->events && super_init_validation(rs, rdev)) rdev 2481 drivers/md/dm-raid.c if (!test_and_clear_bit(FirstUse, &rdev->flags)) { rdev 2488 drivers/md/dm-raid.c rdev->sectors = le64_to_cpu(sb->sectors); rdev 2490 drivers/md/dm-raid.c rdev->recovery_offset = le64_to_cpu(sb->disk_recovery_offset); rdev 2491 drivers/md/dm-raid.c if (rdev->recovery_offset == MaxSector) rdev 2492 drivers/md/dm-raid.c set_bit(In_sync, &rdev->flags); rdev 2498 drivers/md/dm-raid.c clear_bit(In_sync, &rdev->flags); /* Mandatory for recovery */ rdev 2504 drivers/md/dm-raid.c if (test_and_clear_bit(Faulty, &rdev->flags)) { rdev 2505 drivers/md/dm-raid.c rdev->recovery_offset = 0; rdev 2506 drivers/md/dm-raid.c clear_bit(In_sync, &rdev->flags); rdev 2507 drivers/md/dm-raid.c rdev->saved_raid_disk = rdev->raid_disk; rdev 2511 drivers/md/dm-raid.c rdev->data_offset = le64_to_cpu(sb->data_offset); rdev 2512 drivers/md/dm-raid.c rdev->new_data_offset = le64_to_cpu(sb->new_data_offset); rdev 2523 drivers/md/dm-raid.c struct md_rdev *rdev, *freshest; rdev 2527 drivers/md/dm-raid.c rdev_for_each(rdev, mddev) { rdev 2528 drivers/md/dm-raid.c if (test_bit(Journal, &rdev->flags)) rdev 2531 drivers/md/dm-raid.c if (!rdev->meta_bdev) rdev 2535 drivers/md/dm-raid.c rdev->sb_start = 0; rdev 2536 drivers/md/dm-raid.c rdev->sb_size = bdev_logical_block_size(rdev->meta_bdev); rdev 2537 drivers/md/dm-raid.c if (rdev->sb_size < sizeof(struct dm_raid_superblock) || rdev->sb_size > PAGE_SIZE) { rdev 2554 drivers/md/dm-raid.c r = super_load(rdev, freshest); rdev 2558 drivers/md/dm-raid.c freshest = rdev; rdev 2579 drivers/md/dm-raid.c rdev->raid_disk = rdev->saved_raid_disk = -1; rdev 2600 drivers/md/dm-raid.c rdev_for_each(rdev, mddev) rdev 2601 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags) && rdev 2602 drivers/md/dm-raid.c rdev != freshest && rdev 2603 drivers/md/dm-raid.c super_validate(rs, rdev)) rdev 2619 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 2630 drivers/md/dm-raid.c rdev = &rs->dev[0].rdev; rdev 2675 drivers/md/dm-raid.c data_offset = rs->data_offset ? rdev->data_offset : 0; rdev 2684 drivers/md/dm-raid.c to_sector(i_size_read(rdev->bdev->bd_inode)) - rs->md.dev_sectors < MIN_FREE_RESHAPE_SPACE) { rdev 2695 drivers/md/dm-raid.c rs->md.recovery_cp += rs->dev[0].rdev.data_offset; rdev 2698 drivers/md/dm-raid.c rdev_for_each(rdev, &rs->md) { rdev 2699 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags)) { rdev 2700 drivers/md/dm-raid.c rdev->data_offset = data_offset; rdev 2701 drivers/md/dm-raid.c rdev->new_data_offset = new_data_offset; rdev 2712 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 2714 drivers/md/dm-raid.c rdev_for_each(rdev, &rs->md) { rdev 2715 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags)) { rdev 2716 drivers/md/dm-raid.c rdev->raid_disk = i++; rdev 2717 drivers/md/dm-raid.c rdev->saved_raid_disk = rdev->new_raid_disk = -1; rdev 2728 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 2730 drivers/md/dm-raid.c sector_t new_data_offset = rs->dev[0].rdev.data_offset ? 0 : rs->data_offset; rdev 2753 drivers/md/dm-raid.c rdev = &rs->dev[d].rdev; rdev 2756 drivers/md/dm-raid.c clear_bit(In_sync, &rdev->flags); rdev 2757 drivers/md/dm-raid.c clear_bit(Faulty, &rdev->flags); rdev 2758 drivers/md/dm-raid.c mddev->recovery_cp = rdev->recovery_offset = 0; rdev 2763 drivers/md/dm-raid.c rdev->new_data_offset = new_data_offset; rdev 2831 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 2834 drivers/md/dm-raid.c rdev_for_each(rdev, &rs->md) rdev 2835 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags)) { rdev 2836 drivers/md/dm-raid.c reshape_sectors = (rdev->data_offset > rdev->new_data_offset) ? rdev 2837 drivers/md/dm-raid.c rdev->data_offset - rdev->new_data_offset : rdev 2838 drivers/md/dm-raid.c rdev->new_data_offset - rdev->data_offset; rdev 2858 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 2896 drivers/md/dm-raid.c rdev = &rs->dev[d].rdev; rdev 2897 drivers/md/dm-raid.c clear_bit(In_sync, &rdev->flags); rdev 2903 drivers/md/dm-raid.c rdev->saved_raid_disk = -1; rdev 2904 drivers/md/dm-raid.c rdev->raid_disk = d; rdev 2906 drivers/md/dm-raid.c rdev->sectors = mddev->dev_sectors; rdev 2907 drivers/md/dm-raid.c rdev->recovery_offset = rs_is_raid1(rs) ? 0 : MaxSector; rdev 2940 drivers/md/dm-raid.c mddev->reshape_backwards = rs->dev[0].rdev.data_offset ? 0 : 1; rdev 2948 drivers/md/dm-raid.c rdev_for_each(rdev, &rs->md) rdev 2949 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags)) rdev 2950 drivers/md/dm-raid.c rdev->sectors += reshape_sectors; rdev 2973 drivers/md/dm-raid.c if (!rs->dev[i].rdev.bdev) rdev 2976 drivers/md/dm-raid.c q = bdev_get_queue(rs->dev[i].rdev.bdev); rdev 3391 drivers/md/dm-raid.c static const char *__raid_dev_status(struct raid_set *rs, struct md_rdev *rdev) rdev 3393 drivers/md/dm-raid.c if (!rdev->bdev) rdev 3395 drivers/md/dm-raid.c else if (test_bit(Faulty, &rdev->flags)) rdev 3397 drivers/md/dm-raid.c else if (test_bit(Journal, &rdev->flags)) rdev 3401 drivers/md/dm-raid.c !test_bit(In_sync, &rdev->flags))) rdev 3468 drivers/md/dm-raid.c struct md_rdev *rdev; rdev 3484 drivers/md/dm-raid.c rdev_for_each(rdev, mddev) rdev 3485 drivers/md/dm-raid.c if (!test_bit(Journal, &rdev->flags) && rdev 3486 drivers/md/dm-raid.c !test_bit(In_sync, &rdev->flags)) { rdev 3540 drivers/md/dm-raid.c DMEMIT(__raid_dev_status(rs, &rs->dev[i].rdev)); rdev 3585 drivers/md/dm-raid.c DMEMIT(" %llu", (unsigned long long) rs->dev[0].rdev.data_offset); rdev 3591 drivers/md/dm-raid.c __raid_dev_status(rs, &rs->journal_dev.rdev) : "-"); rdev 3599 drivers/md/dm-raid.c if (test_bit(WriteMostly, &rs->dev[i].rdev.flags)) rdev 3618 drivers/md/dm-raid.c if (test_bit(rs->dev[i].rdev.raid_disk, (void *) rs->rebuild_disks)) rdev 3620 drivers/md/dm-raid.c rs->dev[i].rdev.raid_disk); rdev 3632 drivers/md/dm-raid.c if (test_bit(WriteMostly, &rs->dev[i].rdev.flags)) rdev 3634 drivers/md/dm-raid.c rs->dev[i].rdev.raid_disk); rdev 3788 drivers/md/dm-raid.c r = &rs->dev[i].rdev; rdev 155 drivers/md/md-bitmap.c struct md_rdev *rdev; rdev 158 drivers/md/md-bitmap.c rdev_for_each(rdev, mddev) { rdev 159 drivers/md/md-bitmap.c if (! test_bit(In_sync, &rdev->flags) rdev 160 drivers/md/md-bitmap.c || test_bit(Faulty, &rdev->flags) rdev 161 drivers/md/md-bitmap.c || test_bit(Bitmap_sync, &rdev->flags)) rdev 166 drivers/md/md-bitmap.c if (sync_page_io(rdev, target, rdev 167 drivers/md/md-bitmap.c roundup(size, bdev_logical_block_size(rdev->bdev)), rdev 176 drivers/md/md-bitmap.c static struct md_rdev *next_active_rdev(struct md_rdev *rdev, struct mddev *mddev) rdev 192 drivers/md/md-bitmap.c if (rdev == NULL) rdev 194 drivers/md/md-bitmap.c rdev = list_entry(&mddev->disks, struct md_rdev, same_set); rdev 197 drivers/md/md-bitmap.c rdev_dec_pending(rdev, mddev); rdev 199 drivers/md/md-bitmap.c list_for_each_entry_continue_rcu(rdev, &mddev->disks, same_set) { rdev 200 drivers/md/md-bitmap.c if (rdev->raid_disk >= 0 && rdev 201 drivers/md/md-bitmap.c !test_bit(Faulty, &rdev->flags)) { rdev 203 drivers/md/md-bitmap.c atomic_inc(&rdev->nr_pending); rdev 205 drivers/md/md-bitmap.c return rdev; rdev 214 drivers/md/md-bitmap.c struct md_rdev *rdev; rdev 220 drivers/md/md-bitmap.c rdev = NULL; rdev 221 drivers/md/md-bitmap.c while ((rdev = next_active_rdev(rdev, mddev)) != NULL) { rdev 225 drivers/md/md-bitmap.c bdev = (rdev->meta_bdev) ? rdev->meta_bdev : rdev->bdev; rdev 239 drivers/md/md-bitmap.c if (rdev->sb_start + offset + (page->index rdev 241 drivers/md/md-bitmap.c > rdev->data_offset rdev 243 drivers/md/md-bitmap.c rdev->sb_start + offset rdev 244 drivers/md/md-bitmap.c < (rdev->data_offset + mddev->dev_sectors rdev 254 drivers/md/md-bitmap.c if (rdev->data_offset + mddev->dev_sectors rdev 255 drivers/md/md-bitmap.c > rdev->sb_start + offset) rdev 258 drivers/md/md-bitmap.c } else if (rdev->sb_start < rdev->data_offset) { rdev 260 drivers/md/md-bitmap.c if (rdev->sb_start rdev 263 drivers/md/md-bitmap.c > rdev->data_offset) rdev 269 drivers/md/md-bitmap.c md_super_write(mddev, rdev, rdev 270 drivers/md/md-bitmap.c rdev->sb_start + offset rdev 1905 drivers/md/md-bitmap.c struct md_rdev *rdev; rdev 1910 drivers/md/md-bitmap.c rdev_for_each(rdev, mddev) rdev 1911 drivers/md/md-bitmap.c mddev_create_wb_pool(mddev, rdev, true); rdev 2484 drivers/md/md-bitmap.c struct md_rdev *rdev; rdev 2486 drivers/md/md-bitmap.c rdev_for_each(rdev, mddev) rdev 2487 drivers/md/md-bitmap.c mddev_create_wb_pool(mddev, rdev, false); rdev 448 drivers/md/md-cluster.c struct md_rdev *rdev; rdev 462 drivers/md/md-cluster.c rdev_for_each(rdev, mddev) rdev 463 drivers/md/md-cluster.c if (rdev->raid_disk > -1 && !test_bit(Faulty, &rdev->flags)) { rdev 464 drivers/md/md-cluster.c sb = page_address(rdev->sb_page); rdev 543 drivers/md/md-cluster.c struct md_rdev *rdev; rdev 546 drivers/md/md-cluster.c rdev = md_find_rdev_nr_rcu(mddev, le32_to_cpu(msg->raid_slot)); rdev 547 drivers/md/md-cluster.c if (rdev) { rdev 548 drivers/md/md-cluster.c set_bit(ClusterRemove, &rdev->flags); rdev 560 drivers/md/md-cluster.c struct md_rdev *rdev; rdev 563 drivers/md/md-cluster.c rdev = md_find_rdev_nr_rcu(mddev, le32_to_cpu(msg->raid_slot)); rdev 564 drivers/md/md-cluster.c if (rdev && test_bit(Faulty, &rdev->flags)) rdev 565 drivers/md/md-cluster.c clear_bit(Faulty, &rdev->flags); rdev 1073 drivers/md/md-cluster.c struct md_rdev *rdev; rdev 1081 drivers/md/md-cluster.c rdev_for_each(rdev, mddev) rdev 1082 drivers/md/md-cluster.c if (rdev->raid_disk > -1 && !test_bit(Faulty, &rdev->flags)) { rdev 1083 drivers/md/md-cluster.c raid_slot = rdev->desc_nr; rdev 1251 drivers/md/md-cluster.c struct md_rdev *rdev; rdev 1260 drivers/md/md-cluster.c rdev_for_each(rdev, mddev) rdev 1261 drivers/md/md-cluster.c if (rdev->raid_disk >= 0 && !test_bit(Faulty, &rdev->flags)) { rdev 1262 drivers/md/md-cluster.c raid_slot = rdev->desc_nr; rdev 1396 drivers/md/md-cluster.c static int add_new_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 1401 drivers/md/md-cluster.c struct mdp_superblock_1 *sb = page_address(rdev->sb_page); rdev 1407 drivers/md/md-cluster.c cmsg.raid_slot = cpu_to_le32(rdev->desc_nr); rdev 1464 drivers/md/md-cluster.c static int remove_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 1469 drivers/md/md-cluster.c cmsg.raid_slot = cpu_to_le32(rdev->desc_nr); rdev 1524 drivers/md/md-cluster.c static int gather_bitmaps(struct md_rdev *rdev) rdev 1529 drivers/md/md-cluster.c struct mddev *mddev = rdev->mddev; rdev 1533 drivers/md/md-cluster.c cmsg.raid_slot = cpu_to_le32(rdev->desc_nr); rdev 24 drivers/md/md-cluster.h int (*add_new_disk)(struct mddev *mddev, struct md_rdev *rdev); rdev 27 drivers/md/md-cluster.h int (*remove_disk)(struct mddev *mddev, struct md_rdev *rdev); rdev 29 drivers/md/md-cluster.h int (*gather_bitmaps)(struct md_rdev *rdev); rdev 82 drivers/md/md-faulty.c struct md_rdev *rdev; rdev 210 drivers/md/md-faulty.c bio_set_dev(b, conf->rdev->bdev); rdev 215 drivers/md/md-faulty.c bio_set_dev(bio, conf->rdev->bdev); rdev 296 drivers/md/md-faulty.c struct md_rdev *rdev; rdev 313 drivers/md/md-faulty.c rdev_for_each(rdev, mddev) { rdev 314 drivers/md/md-faulty.c conf->rdev = rdev; rdev 315 drivers/md/md-faulty.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 316 drivers/md/md-faulty.c rdev->data_offset << 9); rdev 64 drivers/md/md-linear.c struct request_queue *q = bdev_get_queue(conf->disks[i].rdev->bdev); rdev 88 drivers/md/md-linear.c struct md_rdev *rdev; rdev 99 drivers/md/md-linear.c rdev_for_each(rdev, mddev) { rdev 100 drivers/md/md-linear.c int j = rdev->raid_disk; rdev 104 drivers/md/md-linear.c if (j < 0 || j >= raid_disks || disk->rdev) { rdev 110 drivers/md/md-linear.c disk->rdev = rdev; rdev 112 drivers/md/md-linear.c sectors = rdev->sectors; rdev 114 drivers/md/md-linear.c rdev->sectors = sectors * mddev->chunk_sectors; rdev 117 drivers/md/md-linear.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 118 drivers/md/md-linear.c rdev->data_offset << 9); rdev 120 drivers/md/md-linear.c conf->array_sectors += rdev->sectors; rdev 123 drivers/md/md-linear.c if (blk_queue_discard(bdev_get_queue(rdev->bdev))) rdev 140 drivers/md/md-linear.c conf->disks[0].end_sector = conf->disks[0].rdev->sectors; rdev 145 drivers/md/md-linear.c conf->disks[i].rdev->sectors; rdev 189 drivers/md/md-linear.c static int linear_add(struct mddev *mddev, struct md_rdev *rdev) rdev 201 drivers/md/md-linear.c if (rdev->saved_raid_disk != mddev->raid_disks) rdev 204 drivers/md/md-linear.c rdev->raid_disk = rdev->saved_raid_disk; rdev 205 drivers/md/md-linear.c rdev->saved_raid_disk = -1; rdev 252 drivers/md/md-linear.c start_sector = tmp_dev->end_sector - tmp_dev->rdev->sectors; rdev 254 drivers/md/md-linear.c data_offset = tmp_dev->rdev->data_offset; rdev 260 drivers/md/md-linear.c if (unlikely(is_mddev_broken(tmp_dev->rdev, "linear"))) { rdev 274 drivers/md/md-linear.c bio_set_dev(bio, tmp_dev->rdev->bdev); rdev 297 drivers/md/md-linear.c bdevname(tmp_dev->rdev->bdev, b), rdev 298 drivers/md/md-linear.c (unsigned long long)tmp_dev->rdev->sectors, rdev 6 drivers/md/md-linear.h struct md_rdev *rdev; rdev 37 drivers/md/md-multipath.c struct md_rdev *rdev = rcu_dereference(conf->multipaths[i].rdev); rdev 38 drivers/md/md-multipath.c if (rdev && test_bit(In_sync, &rdev->flags) && rdev 39 drivers/md/md-multipath.c !test_bit(Faulty, &rdev->flags)) { rdev 40 drivers/md/md-multipath.c atomic_inc(&rdev->nr_pending); rdev 82 drivers/md/md-multipath.c struct md_rdev *rdev = conf->multipaths[mp_bh->path].rdev; rdev 91 drivers/md/md-multipath.c md_error (mp_bh->mddev, rdev); rdev 93 drivers/md/md-multipath.c bdevname(rdev->bdev,b), rdev 98 drivers/md/md-multipath.c rdev_dec_pending(rdev, conf->mddev); rdev 127 drivers/md/md-multipath.c mp_bh->bio.bi_iter.bi_sector += multipath->rdev->data_offset; rdev 128 drivers/md/md-multipath.c bio_set_dev(&mp_bh->bio, multipath->rdev->bdev); rdev 147 drivers/md/md-multipath.c struct md_rdev *rdev = rcu_dereference(conf->multipaths[i].rdev); rdev 148 drivers/md/md-multipath.c seq_printf (seq, "%s", rdev && test_bit(In_sync, &rdev->flags) ? "U" : "_"); rdev 161 drivers/md/md-multipath.c struct md_rdev *rdev = rcu_dereference(conf->multipaths[i].rdev); rdev 162 drivers/md/md-multipath.c if (rdev && !test_bit(Faulty, &rdev->flags)) { rdev 163 drivers/md/md-multipath.c struct request_queue *q = bdev_get_queue(rdev->bdev); rdev 179 drivers/md/md-multipath.c static void multipath_error (struct mddev *mddev, struct md_rdev *rdev) rdev 197 drivers/md/md-multipath.c if (test_and_clear_bit(In_sync, &rdev->flags)) { rdev 203 drivers/md/md-multipath.c set_bit(Faulty, &rdev->flags); rdev 207 drivers/md/md-multipath.c bdevname(rdev->bdev, b), rdev 227 drivers/md/md-multipath.c if (tmp->rdev) rdev 229 drivers/md/md-multipath.c i,!test_bit(Faulty, &tmp->rdev->flags), rdev 230 drivers/md/md-multipath.c bdevname(tmp->rdev->bdev,b)); rdev 234 drivers/md/md-multipath.c static int multipath_add_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 243 drivers/md/md-multipath.c if (rdev->raid_disk >= 0) rdev 244 drivers/md/md-multipath.c first = last = rdev->raid_disk; rdev 249 drivers/md/md-multipath.c if ((p=conf->multipaths+path)->rdev == NULL) { rdev 250 drivers/md/md-multipath.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 251 drivers/md/md-multipath.c rdev->data_offset << 9); rdev 253 drivers/md/md-multipath.c err = md_integrity_add_rdev(rdev, mddev); rdev 258 drivers/md/md-multipath.c rdev->raid_disk = path; rdev 259 drivers/md/md-multipath.c set_bit(In_sync, &rdev->flags); rdev 261 drivers/md/md-multipath.c rcu_assign_pointer(p->rdev, rdev); rdev 271 drivers/md/md-multipath.c static int multipath_remove_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 275 drivers/md/md-multipath.c int number = rdev->raid_disk; rdev 280 drivers/md/md-multipath.c if (rdev == p->rdev) { rdev 281 drivers/md/md-multipath.c if (test_bit(In_sync, &rdev->flags) || rdev 282 drivers/md/md-multipath.c atomic_read(&rdev->nr_pending)) { rdev 287 drivers/md/md-multipath.c p->rdev = NULL; rdev 288 drivers/md/md-multipath.c if (!test_bit(RemoveSynchronized, &rdev->flags)) { rdev 290 drivers/md/md-multipath.c if (atomic_read(&rdev->nr_pending)) { rdev 293 drivers/md/md-multipath.c p->rdev = rdev; rdev 346 drivers/md/md-multipath.c conf->multipaths[mp_bh->path].rdev->data_offset; rdev 347 drivers/md/md-multipath.c bio_set_dev(bio, conf->multipaths[mp_bh->path].rdev->bdev); rdev 370 drivers/md/md-multipath.c struct md_rdev *rdev; rdev 400 drivers/md/md-multipath.c rdev_for_each(rdev, mddev) { rdev 401 drivers/md/md-multipath.c disk_idx = rdev->raid_disk; rdev 407 drivers/md/md-multipath.c disk->rdev = rdev; rdev 408 drivers/md/md-multipath.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 409 drivers/md/md-multipath.c rdev->data_offset << 9); rdev 411 drivers/md/md-multipath.c if (!test_bit(Faulty, &rdev->flags)) rdev 6 drivers/md/md-multipath.h struct md_rdev *rdev; rdev 128 drivers/md/md.c static int rdev_init_wb(struct md_rdev *rdev) rdev 130 drivers/md/md.c if (rdev->bdev->bd_queue->nr_hw_queues == 1) rdev 133 drivers/md/md.c spin_lock_init(&rdev->wb_list_lock); rdev 134 drivers/md/md.c INIT_LIST_HEAD(&rdev->wb_list); rdev 135 drivers/md/md.c init_waitqueue_head(&rdev->wb_io_wait); rdev 136 drivers/md/md.c set_bit(WBCollisionCheck, &rdev->flags); rdev 145 drivers/md/md.c void mddev_create_wb_pool(struct mddev *mddev, struct md_rdev *rdev, rdev 151 drivers/md/md.c if (!test_bit(WriteMostly, &rdev->flags) || !rdev_init_wb(rdev)) rdev 174 drivers/md/md.c static void mddev_destroy_wb_pool(struct mddev *mddev, struct md_rdev *rdev) rdev 176 drivers/md/md.c if (!test_and_clear_bit(WBCollisionCheck, &rdev->flags)) rdev 187 drivers/md/md.c if (temp != rdev && rdev 191 drivers/md/md.c mddev_suspend(rdev->mddev); rdev 194 drivers/md/md.c mddev_resume(rdev->mddev); rdev 480 drivers/md/md.c struct md_rdev *rdev = bio->bi_private; rdev 481 drivers/md/md.c struct mddev *mddev = rdev->mddev; rdev 483 drivers/md/md.c rdev_dec_pending(rdev, mddev); rdev 497 drivers/md/md.c struct md_rdev *rdev; rdev 503 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) rdev 504 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 505 drivers/md/md.c !test_bit(Faulty, &rdev->flags)) { rdev 511 drivers/md/md.c atomic_inc(&rdev->nr_pending); rdev 512 drivers/md/md.c atomic_inc(&rdev->nr_pending); rdev 516 drivers/md/md.c bi->bi_private = rdev; rdev 517 drivers/md/md.c bio_set_dev(bi, rdev->bdev); rdev 522 drivers/md/md.c rdev_dec_pending(rdev, mddev); rdev 770 drivers/md/md.c struct md_rdev *rdev; rdev 772 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) rdev 773 drivers/md/md.c if (rdev->desc_nr == nr) rdev 774 drivers/md/md.c return rdev; rdev 782 drivers/md/md.c struct md_rdev *rdev; rdev 784 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 785 drivers/md/md.c if (rdev->bdev->bd_dev == dev) rdev 786 drivers/md/md.c return rdev; rdev 793 drivers/md/md.c struct md_rdev *rdev; rdev 795 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) rdev 796 drivers/md/md.c if (rdev->bdev->bd_dev == dev) rdev 797 drivers/md/md.c return rdev; rdev 816 drivers/md/md.c static inline sector_t calc_dev_sboffset(struct md_rdev *rdev) rdev 818 drivers/md/md.c sector_t num_sectors = i_size_read(rdev->bdev->bd_inode) / 512; rdev 822 drivers/md/md.c static int alloc_disk_sb(struct md_rdev *rdev) rdev 824 drivers/md/md.c rdev->sb_page = alloc_page(GFP_KERNEL); rdev 825 drivers/md/md.c if (!rdev->sb_page) rdev 830 drivers/md/md.c void md_rdev_clear(struct md_rdev *rdev) rdev 832 drivers/md/md.c if (rdev->sb_page) { rdev 833 drivers/md/md.c put_page(rdev->sb_page); rdev 834 drivers/md/md.c rdev->sb_loaded = 0; rdev 835 drivers/md/md.c rdev->sb_page = NULL; rdev 836 drivers/md/md.c rdev->sb_start = 0; rdev 837 drivers/md/md.c rdev->sectors = 0; rdev 839 drivers/md/md.c if (rdev->bb_page) { rdev 840 drivers/md/md.c put_page(rdev->bb_page); rdev 841 drivers/md/md.c rdev->bb_page = NULL; rdev 843 drivers/md/md.c badblocks_exit(&rdev->badblocks); rdev 849 drivers/md/md.c struct md_rdev *rdev = bio->bi_private; rdev 850 drivers/md/md.c struct mddev *mddev = rdev->mddev; rdev 854 drivers/md/md.c md_error(mddev, rdev); rdev 855 drivers/md/md.c if (!test_bit(Faulty, &rdev->flags) rdev 858 drivers/md/md.c set_bit(LastDev, &rdev->flags); rdev 861 drivers/md/md.c clear_bit(LastDev, &rdev->flags); rdev 865 drivers/md/md.c rdev_dec_pending(rdev, mddev); rdev 869 drivers/md/md.c void md_super_write(struct mddev *mddev, struct md_rdev *rdev, rdev 884 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 889 drivers/md/md.c atomic_inc(&rdev->nr_pending); rdev 891 drivers/md/md.c bio_set_dev(bio, rdev->meta_bdev ? rdev->meta_bdev : rdev->bdev); rdev 894 drivers/md/md.c bio->bi_private = rdev; rdev 898 drivers/md/md.c test_bit(FailFast, &rdev->flags) && rdev 899 drivers/md/md.c !test_bit(LastDev, &rdev->flags)) rdev 916 drivers/md/md.c int sync_page_io(struct md_rdev *rdev, sector_t sector, int size, rdev 919 drivers/md/md.c struct bio *bio = md_bio_alloc_sync(rdev->mddev); rdev 922 drivers/md/md.c if (metadata_op && rdev->meta_bdev) rdev 923 drivers/md/md.c bio_set_dev(bio, rdev->meta_bdev); rdev 925 drivers/md/md.c bio_set_dev(bio, rdev->bdev); rdev 928 drivers/md/md.c bio->bi_iter.bi_sector = sector + rdev->sb_start; rdev 929 drivers/md/md.c else if (rdev->mddev->reshape_position != MaxSector && rdev 930 drivers/md/md.c (rdev->mddev->reshape_backwards == rdev 931 drivers/md/md.c (sector >= rdev->mddev->reshape_position))) rdev 932 drivers/md/md.c bio->bi_iter.bi_sector = sector + rdev->new_data_offset; rdev 934 drivers/md/md.c bio->bi_iter.bi_sector = sector + rdev->data_offset; rdev 945 drivers/md/md.c static int read_disk_sb(struct md_rdev *rdev, int size) rdev 949 drivers/md/md.c if (rdev->sb_loaded) rdev 952 drivers/md/md.c if (!sync_page_io(rdev, 0, size, rdev->sb_page, REQ_OP_READ, 0, true)) rdev 954 drivers/md/md.c rdev->sb_loaded = 1; rdev 959 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 1069 drivers/md/md.c int (*load_super)(struct md_rdev *rdev, rdev 1073 drivers/md/md.c struct md_rdev *rdev); rdev 1075 drivers/md/md.c struct md_rdev *rdev); rdev 1076 drivers/md/md.c unsigned long long (*rdev_size_change)(struct md_rdev *rdev, rdev 1078 drivers/md/md.c int (*allow_new_offset)(struct md_rdev *rdev, rdev 1103 drivers/md/md.c static int super_90_load(struct md_rdev *rdev, struct md_rdev *refdev, int minor_version) rdev 1116 drivers/md/md.c rdev->sb_start = calc_dev_sboffset(rdev); rdev 1118 drivers/md/md.c ret = read_disk_sb(rdev, MD_SB_BYTES); rdev 1124 drivers/md/md.c bdevname(rdev->bdev, b); rdev 1125 drivers/md/md.c sb = page_address(rdev->sb_page); rdev 1148 drivers/md/md.c rdev->preferred_minor = sb->md_minor; rdev 1149 drivers/md/md.c rdev->data_offset = 0; rdev 1150 drivers/md/md.c rdev->new_data_offset = 0; rdev 1151 drivers/md/md.c rdev->sb_size = MD_SB_BYTES; rdev 1152 drivers/md/md.c rdev->badblocks.shift = -1; rdev 1155 drivers/md/md.c rdev->desc_nr = -1; rdev 1157 drivers/md/md.c rdev->desc_nr = sb->this_disk.number; rdev 1161 drivers/md/md.c (rdev->desc_nr >= 0 && rdev 1162 drivers/md/md.c rdev->desc_nr < MD_SB_DISKS && rdev 1163 drivers/md/md.c sb->disks[rdev->desc_nr].state & rdev 1193 drivers/md/md.c rdev->sectors = rdev->sb_start; rdev 1198 drivers/md/md.c if ((u64)rdev->sectors >= (2ULL << 32) && sb->level >= 1) rdev 1199 drivers/md/md.c rdev->sectors = (sector_t)(2ULL << 32) - 2; rdev 1201 drivers/md/md.c if (rdev->sectors < ((sector_t)sb->size) * 2 && sb->level >= 1) rdev 1212 drivers/md/md.c static int super_90_validate(struct mddev *mddev, struct md_rdev *rdev) rdev 1215 drivers/md/md.c mdp_super_t *sb = page_address(rdev->sb_page); rdev 1218 drivers/md/md.c rdev->raid_disk = -1; rdev 1219 drivers/md/md.c clear_bit(Faulty, &rdev->flags); rdev 1220 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 1221 drivers/md/md.c clear_bit(Bitmap_sync, &rdev->flags); rdev 1222 drivers/md/md.c clear_bit(WriteMostly, &rdev->flags); rdev 1292 drivers/md/md.c if (sb->disks[rdev->desc_nr].state & ( rdev 1303 drivers/md/md.c set_bit(Bitmap_sync, &rdev->flags); rdev 1311 drivers/md/md.c desc = sb->disks + rdev->desc_nr; rdev 1314 drivers/md/md.c set_bit(Faulty, &rdev->flags); rdev 1317 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 1318 drivers/md/md.c rdev->raid_disk = desc->raid_disk; rdev 1319 drivers/md/md.c rdev->saved_raid_disk = desc->raid_disk; rdev 1325 drivers/md/md.c rdev->recovery_offset = 0; rdev 1326 drivers/md/md.c rdev->raid_disk = desc->raid_disk; rdev 1330 drivers/md/md.c set_bit(WriteMostly, &rdev->flags); rdev 1332 drivers/md/md.c set_bit(FailFast, &rdev->flags); rdev 1334 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 1341 drivers/md/md.c static void super_90_sync(struct mddev *mddev, struct md_rdev *rdev) rdev 1360 drivers/md/md.c rdev->sb_size = MD_SB_BYTES; rdev 1362 drivers/md/md.c sb = page_address(rdev->sb_page); rdev 1478 drivers/md/md.c sb->this_disk = sb->disks[rdev->desc_nr]; rdev 1486 drivers/md/md.c super_90_rdev_size_change(struct md_rdev *rdev, sector_t num_sectors) rdev 1488 drivers/md/md.c if (num_sectors && num_sectors < rdev->mddev->dev_sectors) rdev 1490 drivers/md/md.c if (rdev->mddev->bitmap_info.offset) rdev 1492 drivers/md/md.c rdev->sb_start = calc_dev_sboffset(rdev); rdev 1493 drivers/md/md.c if (!num_sectors || num_sectors > rdev->sb_start) rdev 1494 drivers/md/md.c num_sectors = rdev->sb_start; rdev 1498 drivers/md/md.c if ((u64)num_sectors >= (2ULL << 32) && rdev->mddev->level >= 1) rdev 1501 drivers/md/md.c md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size, rdev 1502 drivers/md/md.c rdev->sb_page); rdev 1503 drivers/md/md.c } while (md_super_wait(rdev->mddev) < 0); rdev 1508 drivers/md/md.c super_90_allow_new_offset(struct md_rdev *rdev, unsigned long long new_offset) rdev 1540 drivers/md/md.c static int super_1_load(struct md_rdev *rdev, struct md_rdev *refdev, int minor_version) rdev 1560 drivers/md/md.c sb_start = i_size_read(rdev->bdev->bd_inode) >> 9; rdev 1573 drivers/md/md.c rdev->sb_start = sb_start; rdev 1578 drivers/md/md.c ret = read_disk_sb(rdev, 4096); rdev 1581 drivers/md/md.c sb = page_address(rdev->sb_page); rdev 1586 drivers/md/md.c le64_to_cpu(sb->super_offset) != rdev->sb_start || rdev 1592 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 1597 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 1606 drivers/md/md.c rdev->preferred_minor = 0xffff; rdev 1607 drivers/md/md.c rdev->data_offset = le64_to_cpu(sb->data_offset); rdev 1608 drivers/md/md.c rdev->new_data_offset = rdev->data_offset; rdev 1611 drivers/md/md.c rdev->new_data_offset += (s32)le32_to_cpu(sb->new_offset); rdev 1612 drivers/md/md.c atomic_set(&rdev->corrected_errors, le32_to_cpu(sb->cnt_corrected_read)); rdev 1614 drivers/md/md.c rdev->sb_size = le32_to_cpu(sb->max_dev) * 2 + 256; rdev 1615 drivers/md/md.c bmask = queue_logical_block_size(rdev->bdev->bd_disk->queue)-1; rdev 1616 drivers/md/md.c if (rdev->sb_size & bmask) rdev 1617 drivers/md/md.c rdev->sb_size = (rdev->sb_size | bmask) + 1; rdev 1620 drivers/md/md.c && rdev->data_offset < sb_start + (rdev->sb_size/512)) rdev 1623 drivers/md/md.c && rdev->new_data_offset < sb_start + (rdev->sb_size/512)) rdev 1627 drivers/md/md.c rdev->desc_nr = -1; rdev 1629 drivers/md/md.c rdev->desc_nr = le32_to_cpu(sb->dev_number); rdev 1631 drivers/md/md.c if (!rdev->bb_page) { rdev 1632 drivers/md/md.c rdev->bb_page = alloc_page(GFP_KERNEL); rdev 1633 drivers/md/md.c if (!rdev->bb_page) rdev 1637 drivers/md/md.c rdev->badblocks.count == 0) { rdev 1652 drivers/md/md.c if (!sync_page_io(rdev, bb_sector, sectors << 9, rdev 1653 drivers/md/md.c rdev->bb_page, REQ_OP_READ, 0, true)) rdev 1655 drivers/md/md.c bbp = (__le64 *)page_address(rdev->bb_page); rdev 1656 drivers/md/md.c rdev->badblocks.shift = sb->bblog_shift; rdev 1665 drivers/md/md.c if (badblocks_set(&rdev->badblocks, sector, count, 1)) rdev 1669 drivers/md/md.c rdev->badblocks.shift = 0; rdev 1673 drivers/md/md.c rdev->ppl.offset = (__s16)le16_to_cpu(sb->ppl.offset); rdev 1674 drivers/md/md.c rdev->ppl.size = le16_to_cpu(sb->ppl.size); rdev 1675 drivers/md/md.c rdev->ppl.sector = rdev->sb_start + rdev->ppl.offset; rdev 1684 drivers/md/md.c (rdev->desc_nr >= 0 && rdev 1685 drivers/md/md.c rdev->desc_nr < le32_to_cpu(sb->max_dev) && rdev 1686 drivers/md/md.c (le16_to_cpu(sb->dev_roles[rdev->desc_nr]) < MD_DISK_ROLE_MAX || rdev 1687 drivers/md/md.c le16_to_cpu(sb->dev_roles[rdev->desc_nr]) == MD_DISK_ROLE_JOURNAL))) rdev 1704 drivers/md/md.c bdevname(rdev->bdev,b), rdev 1717 drivers/md/md.c sectors = (i_size_read(rdev->bdev->bd_inode) >> 9); rdev 1718 drivers/md/md.c sectors -= rdev->data_offset; rdev 1720 drivers/md/md.c sectors = rdev->sb_start; rdev 1723 drivers/md/md.c rdev->sectors = le64_to_cpu(sb->data_size); rdev 1727 drivers/md/md.c static int super_1_validate(struct mddev *mddev, struct md_rdev *rdev) rdev 1729 drivers/md/md.c struct mdp_superblock_1 *sb = page_address(rdev->sb_page); rdev 1732 drivers/md/md.c rdev->raid_disk = -1; rdev 1733 drivers/md/md.c clear_bit(Faulty, &rdev->flags); rdev 1734 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 1735 drivers/md/md.c clear_bit(Bitmap_sync, &rdev->flags); rdev 1736 drivers/md/md.c clear_bit(WriteMostly, &rdev->flags); rdev 1825 drivers/md/md.c if (rdev->desc_nr >= 0 && rdev 1826 drivers/md/md.c rdev->desc_nr < le32_to_cpu(sb->max_dev) && rdev 1827 drivers/md/md.c (le16_to_cpu(sb->dev_roles[rdev->desc_nr]) < MD_DISK_ROLE_MAX || rdev 1828 drivers/md/md.c le16_to_cpu(sb->dev_roles[rdev->desc_nr]) == MD_DISK_ROLE_JOURNAL)) rdev 1838 drivers/md/md.c set_bit(Bitmap_sync, &rdev->flags); rdev 1846 drivers/md/md.c if (rdev->desc_nr < 0 || rdev 1847 drivers/md/md.c rdev->desc_nr >= le32_to_cpu(sb->max_dev)) { rdev 1849 drivers/md/md.c rdev->desc_nr = -1; rdev 1851 drivers/md/md.c role = le16_to_cpu(sb->dev_roles[rdev->desc_nr]); rdev 1856 drivers/md/md.c set_bit(Faulty, &rdev->flags); rdev 1864 drivers/md/md.c set_bit(Journal, &rdev->flags); rdev 1865 drivers/md/md.c rdev->journal_tail = le64_to_cpu(sb->journal_tail); rdev 1866 drivers/md/md.c rdev->raid_disk = 0; rdev 1869 drivers/md/md.c rdev->saved_raid_disk = role; rdev 1872 drivers/md/md.c rdev->recovery_offset = le64_to_cpu(sb->recovery_offset); rdev 1875 drivers/md/md.c rdev->saved_raid_disk = -1; rdev 1883 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 1885 drivers/md/md.c rdev->raid_disk = role; rdev 1889 drivers/md/md.c set_bit(WriteMostly, &rdev->flags); rdev 1891 drivers/md/md.c set_bit(FailFast, &rdev->flags); rdev 1893 drivers/md/md.c set_bit(Replacement, &rdev->flags); rdev 1895 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 1900 drivers/md/md.c static void super_1_sync(struct mddev *mddev, struct md_rdev *rdev) rdev 1907 drivers/md/md.c sb = page_address(rdev->sb_page); rdev 1923 drivers/md/md.c sb->cnt_corrected_read = cpu_to_le32(atomic_read(&rdev->corrected_errors)); rdev 1930 drivers/md/md.c if (test_bit(FailFast, &rdev->flags)) rdev 1935 drivers/md/md.c if (test_bit(WriteMostly, &rdev->flags)) rdev 1939 drivers/md/md.c sb->data_offset = cpu_to_le64(rdev->data_offset); rdev 1940 drivers/md/md.c sb->data_size = cpu_to_le64(rdev->sectors); rdev 1947 drivers/md/md.c if (rdev->raid_disk >= 0 && !test_bit(Journal, &rdev->flags) && rdev 1948 drivers/md/md.c !test_bit(In_sync, &rdev->flags)) { rdev 1952 drivers/md/md.c cpu_to_le64(rdev->recovery_offset); rdev 1953 drivers/md/md.c if (rdev->saved_raid_disk >= 0 && mddev->bitmap) rdev 1958 drivers/md/md.c if (test_bit(Journal, &rdev->flags)) rdev 1959 drivers/md/md.c sb->journal_tail = cpu_to_le64(rdev->journal_tail); rdev 1960 drivers/md/md.c if (test_bit(Replacement, &rdev->flags)) rdev 1975 drivers/md/md.c if (rdev->new_data_offset != rdev->data_offset) { rdev 1978 drivers/md/md.c sb->new_offset = cpu_to_le32((__u32)(rdev->new_data_offset rdev 1979 drivers/md/md.c - rdev->data_offset)); rdev 1986 drivers/md/md.c if (rdev->badblocks.count == 0) rdev 1990 drivers/md/md.c md_error(mddev, rdev); rdev 1992 drivers/md/md.c struct badblocks *bb = &rdev->badblocks; rdev 1993 drivers/md/md.c __le64 *bbp = (__le64 *)page_address(rdev->bb_page); rdev 2014 drivers/md/md.c bb->sector = (rdev->sb_start + rdev 2028 drivers/md/md.c rdev->sb_size = max_dev * 2 + 256; rdev 2029 drivers/md/md.c bmask = queue_logical_block_size(rdev->bdev->bd_disk->queue)-1; rdev 2030 drivers/md/md.c if (rdev->sb_size & bmask) rdev 2031 drivers/md/md.c rdev->sb_size = (rdev->sb_size | bmask) + 1; rdev 2047 drivers/md/md.c sb->ppl.offset = cpu_to_le16(rdev->ppl.offset); rdev 2048 drivers/md/md.c sb->ppl.size = cpu_to_le16(rdev->ppl.size); rdev 2069 drivers/md/md.c super_1_rdev_size_change(struct md_rdev *rdev, sector_t num_sectors) rdev 2073 drivers/md/md.c if (num_sectors && num_sectors < rdev->mddev->dev_sectors) rdev 2075 drivers/md/md.c if (rdev->data_offset != rdev->new_data_offset) rdev 2077 drivers/md/md.c if (rdev->sb_start < rdev->data_offset) { rdev 2079 drivers/md/md.c max_sectors = i_size_read(rdev->bdev->bd_inode) >> 9; rdev 2080 drivers/md/md.c max_sectors -= rdev->data_offset; rdev 2083 drivers/md/md.c } else if (rdev->mddev->bitmap_info.offset) { rdev 2089 drivers/md/md.c sb_start = (i_size_read(rdev->bdev->bd_inode) >> 9) - 8*2; rdev 2091 drivers/md/md.c max_sectors = rdev->sectors + sb_start - rdev->sb_start; rdev 2094 drivers/md/md.c rdev->sb_start = sb_start; rdev 2096 drivers/md/md.c sb = page_address(rdev->sb_page); rdev 2098 drivers/md/md.c sb->super_offset = cpu_to_le64(rdev->sb_start); rdev 2101 drivers/md/md.c md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size, rdev 2102 drivers/md/md.c rdev->sb_page); rdev 2103 drivers/md/md.c } while (md_super_wait(rdev->mddev) < 0); rdev 2109 drivers/md/md.c super_1_allow_new_offset(struct md_rdev *rdev, rdev 2114 drivers/md/md.c if (new_offset >= rdev->data_offset) rdev 2119 drivers/md/md.c if (rdev->mddev->minor_version == 0) rdev 2128 drivers/md/md.c if (rdev->sb_start + (32+4)*2 > new_offset) rdev 2130 drivers/md/md.c bitmap = rdev->mddev->bitmap; rdev 2131 drivers/md/md.c if (bitmap && !rdev->mddev->bitmap_info.file && rdev 2132 drivers/md/md.c rdev->sb_start + rdev->mddev->bitmap_info.offset + rdev 2135 drivers/md/md.c if (rdev->badblocks.sector + rdev->badblocks.size > new_offset) rdev 2162 drivers/md/md.c static void sync_super(struct mddev *mddev, struct md_rdev *rdev) rdev 2165 drivers/md/md.c mddev->sync_super(mddev, rdev); rdev 2171 drivers/md/md.c super_types[mddev->major_version].sync_super(mddev, rdev); rdev 2176 drivers/md/md.c struct md_rdev *rdev, *rdev2; rdev 2179 drivers/md/md.c rdev_for_each_rcu(rdev, mddev1) { rdev 2180 drivers/md/md.c if (test_bit(Faulty, &rdev->flags) || rdev 2181 drivers/md/md.c test_bit(Journal, &rdev->flags) || rdev 2182 drivers/md/md.c rdev->raid_disk == -1) rdev 2189 drivers/md/md.c if (rdev->bdev->bd_contains == rdev 2211 drivers/md/md.c struct md_rdev *rdev, *reference = NULL; rdev 2217 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2219 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 2221 drivers/md/md.c if (rdev->raid_disk < 0) rdev 2225 drivers/md/md.c reference = rdev; rdev 2230 drivers/md/md.c rdev->bdev->bd_disk) < 0) rdev 2256 drivers/md/md.c int md_integrity_add_rdev(struct md_rdev *rdev, struct mddev *mddev) rdev 2269 drivers/md/md.c if (blk_integrity_compare(mddev->gendisk, rdev->bdev->bd_disk) != 0) { rdev 2271 drivers/md/md.c mdname(mddev), bdevname(rdev->bdev, name)); rdev 2279 drivers/md/md.c static int bind_rdev_to_array(struct md_rdev *rdev, struct mddev *mddev) rdev 2286 drivers/md/md.c if (find_rdev(mddev, rdev->bdev->bd_dev)) rdev 2289 drivers/md/md.c if ((bdev_read_only(rdev->bdev) || bdev_read_only(rdev->meta_bdev)) && rdev 2294 drivers/md/md.c if (!test_bit(Journal, &rdev->flags) && rdev 2295 drivers/md/md.c rdev->sectors && rdev 2296 drivers/md/md.c (mddev->dev_sectors == 0 || rdev->sectors < mddev->dev_sectors)) { rdev 2305 drivers/md/md.c mddev->dev_sectors = rdev->sectors; rdev 2313 drivers/md/md.c if (rdev->desc_nr < 0) { rdev 2319 drivers/md/md.c rdev->desc_nr = choice; rdev 2321 drivers/md/md.c if (md_find_rdev_nr_rcu(mddev, rdev->desc_nr)) { rdev 2327 drivers/md/md.c if (!test_bit(Journal, &rdev->flags) && rdev 2328 drivers/md/md.c mddev->max_disks && rdev->desc_nr >= mddev->max_disks) { rdev 2333 drivers/md/md.c bdevname(rdev->bdev,b); rdev 2336 drivers/md/md.c rdev->mddev = mddev; rdev 2340 drivers/md/md.c mddev_create_wb_pool(mddev, rdev, false); rdev 2342 drivers/md/md.c if ((err = kobject_add(&rdev->kobj, &mddev->kobj, "dev-%s", b))) rdev 2345 drivers/md/md.c ko = &part_to_dev(rdev->bdev->bd_part)->kobj; rdev 2346 drivers/md/md.c if (sysfs_create_link(&rdev->kobj, ko, "block")) rdev 2348 drivers/md/md.c rdev->sysfs_state = sysfs_get_dirent_safe(rdev->kobj.sd, "state"); rdev 2350 drivers/md/md.c list_add_rcu(&rdev->same_set, &mddev->disks); rdev 2351 drivers/md/md.c bd_link_disk_holder(rdev->bdev, mddev->gendisk); rdev 2366 drivers/md/md.c struct md_rdev *rdev = container_of(ws, struct md_rdev, del_work); rdev 2367 drivers/md/md.c kobject_del(&rdev->kobj); rdev 2368 drivers/md/md.c kobject_put(&rdev->kobj); rdev 2371 drivers/md/md.c static void unbind_rdev_from_array(struct md_rdev *rdev) rdev 2375 drivers/md/md.c bd_unlink_disk_holder(rdev->bdev, rdev->mddev->gendisk); rdev 2376 drivers/md/md.c list_del_rcu(&rdev->same_set); rdev 2377 drivers/md/md.c pr_debug("md: unbind<%s>\n", bdevname(rdev->bdev,b)); rdev 2378 drivers/md/md.c mddev_destroy_wb_pool(rdev->mddev, rdev); rdev 2379 drivers/md/md.c rdev->mddev = NULL; rdev 2380 drivers/md/md.c sysfs_remove_link(&rdev->kobj, "block"); rdev 2381 drivers/md/md.c sysfs_put(rdev->sysfs_state); rdev 2382 drivers/md/md.c rdev->sysfs_state = NULL; rdev 2383 drivers/md/md.c rdev->badblocks.count = 0; rdev 2389 drivers/md/md.c INIT_WORK(&rdev->del_work, md_delayed_delete); rdev 2390 drivers/md/md.c kobject_get(&rdev->kobj); rdev 2391 drivers/md/md.c queue_work(md_misc_wq, &rdev->del_work); rdev 2399 drivers/md/md.c static int lock_rdev(struct md_rdev *rdev, dev_t dev, int shared) rdev 2406 drivers/md/md.c shared ? (struct md_rdev *)lock_rdev : rdev); rdev 2411 drivers/md/md.c rdev->bdev = bdev; rdev 2415 drivers/md/md.c static void unlock_rdev(struct md_rdev *rdev) rdev 2417 drivers/md/md.c struct block_device *bdev = rdev->bdev; rdev 2418 drivers/md/md.c rdev->bdev = NULL; rdev 2424 drivers/md/md.c static void export_rdev(struct md_rdev *rdev) rdev 2428 drivers/md/md.c pr_debug("md: export_rdev(%s)\n", bdevname(rdev->bdev,b)); rdev 2429 drivers/md/md.c md_rdev_clear(rdev); rdev 2431 drivers/md/md.c if (test_bit(AutoDetected, &rdev->flags)) rdev 2432 drivers/md/md.c md_autodetect_dev(rdev->bdev->bd_dev); rdev 2434 drivers/md/md.c unlock_rdev(rdev); rdev 2435 drivers/md/md.c kobject_put(&rdev->kobj); rdev 2438 drivers/md/md.c void md_kick_rdev_from_array(struct md_rdev *rdev) rdev 2440 drivers/md/md.c unbind_rdev_from_array(rdev); rdev 2441 drivers/md/md.c export_rdev(rdev); rdev 2447 drivers/md/md.c struct md_rdev *rdev; rdev 2450 drivers/md/md.c rdev = list_first_entry(&mddev->disks, struct md_rdev, rdev 2452 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 2493 drivers/md/md.c struct md_rdev *rdev; rdev 2494 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2495 drivers/md/md.c if (rdev->sb_events == mddev->events || rdev 2497 drivers/md/md.c rdev->raid_disk < 0 && rdev 2498 drivers/md/md.c rdev->sb_events+1 == mddev->events)) { rdev 2500 drivers/md/md.c rdev->sb_loaded = 2; rdev 2502 drivers/md/md.c sync_super(mddev, rdev); rdev 2503 drivers/md/md.c rdev->sb_loaded = 1; rdev 2510 drivers/md/md.c struct md_rdev *rdev; rdev 2515 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 2516 drivers/md/md.c if ((rdev->raid_disk >= 0) && !test_bit(Faulty, &rdev->flags)) rdev 2520 drivers/md/md.c if (!rdev) rdev 2523 drivers/md/md.c sb = page_address(rdev->sb_page); rdev 2525 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2526 drivers/md/md.c role = le16_to_cpu(sb->dev_roles[rdev->desc_nr]); rdev 2528 drivers/md/md.c if (role == 0xffff && rdev->raid_disk >=0 && rdev 2529 drivers/md/md.c !test_bit(Faulty, &rdev->flags)) rdev 2532 drivers/md/md.c if (test_bit(Faulty, &rdev->flags) && (role < 0xfffd)) rdev 2549 drivers/md/md.c struct md_rdev *rdev; rdev 2585 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2586 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 2591 drivers/md/md.c !test_bit(Journal, &rdev->flags) && rdev 2592 drivers/md/md.c !test_bit(In_sync, &rdev->flags) && rdev 2593 drivers/md/md.c mddev->curr_resync_completed > rdev->recovery_offset) rdev 2594 drivers/md/md.c rdev->recovery_offset = mddev->curr_resync_completed; rdev 2602 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2603 drivers/md/md.c if (rdev->badblocks.changed) { rdev 2604 drivers/md/md.c rdev->badblocks.changed = 0; rdev 2605 drivers/md/md.c ack_all_badblocks(&rdev->badblocks); rdev 2606 drivers/md/md.c md_error(mddev, rdev); rdev 2608 drivers/md/md.c clear_bit(Blocked, &rdev->flags); rdev 2609 drivers/md/md.c clear_bit(BlockedBadBlocks, &rdev->flags); rdev 2610 drivers/md/md.c wake_up(&rdev->blocked_wait); rdev 2666 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2667 drivers/md/md.c if (rdev->badblocks.changed) rdev 2669 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 2670 drivers/md/md.c set_bit(FaultRecorded, &rdev->flags); rdev 2683 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2686 drivers/md/md.c if (rdev->sb_loaded != 1) rdev 2689 drivers/md/md.c if (!test_bit(Faulty, &rdev->flags)) { rdev 2690 drivers/md/md.c md_super_write(mddev,rdev, rdev 2691 drivers/md/md.c rdev->sb_start, rdev->sb_size, rdev 2692 drivers/md/md.c rdev->sb_page); rdev 2694 drivers/md/md.c bdevname(rdev->bdev, b), rdev 2695 drivers/md/md.c (unsigned long long)rdev->sb_start); rdev 2696 drivers/md/md.c rdev->sb_events = mddev->events; rdev 2697 drivers/md/md.c if (rdev->badblocks.size) { rdev 2698 drivers/md/md.c md_super_write(mddev, rdev, rdev 2699 drivers/md/md.c rdev->badblocks.sector, rdev 2700 drivers/md/md.c rdev->badblocks.size << 9, rdev 2701 drivers/md/md.c rdev->bb_page); rdev 2702 drivers/md/md.c rdev->badblocks.size = 0; rdev 2707 drivers/md/md.c bdevname(rdev->bdev, b)); rdev 2729 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 2730 drivers/md/md.c if (test_and_clear_bit(FaultRecorded, &rdev->flags)) rdev 2731 drivers/md/md.c clear_bit(Blocked, &rdev->flags); rdev 2734 drivers/md/md.c ack_all_badblocks(&rdev->badblocks); rdev 2735 drivers/md/md.c clear_bit(BlockedBadBlocks, &rdev->flags); rdev 2736 drivers/md/md.c wake_up(&rdev->blocked_wait); rdev 2741 drivers/md/md.c static int add_bound_rdev(struct md_rdev *rdev) rdev 2743 drivers/md/md.c struct mddev *mddev = rdev->mddev; rdev 2745 drivers/md/md.c bool add_journal = test_bit(Journal, &rdev->flags); rdev 2753 drivers/md/md.c validate_super(mddev, rdev); rdev 2756 drivers/md/md.c err = mddev->pers->hot_add_disk(mddev, rdev); rdev 2760 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 2764 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 2802 drivers/md/md.c state_show(struct md_rdev *rdev, char *page) rdev 2806 drivers/md/md.c unsigned long flags = READ_ONCE(rdev->flags); rdev 2810 drivers/md/md.c rdev->badblocks.unacked_exist)) rdev 2819 drivers/md/md.c (rdev->badblocks.unacked_exist rdev 2844 drivers/md/md.c state_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 2861 drivers/md/md.c if (cmd_match(buf, "faulty") && rdev->mddev->pers) { rdev 2862 drivers/md/md.c md_error(rdev->mddev, rdev); rdev 2863 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 2868 drivers/md/md.c if (rdev->mddev->pers) { rdev 2869 drivers/md/md.c clear_bit(Blocked, &rdev->flags); rdev 2870 drivers/md/md.c remove_and_add_spares(rdev->mddev, rdev); rdev 2872 drivers/md/md.c if (rdev->raid_disk >= 0) rdev 2875 drivers/md/md.c struct mddev *mddev = rdev->mddev; rdev 2878 drivers/md/md.c err = md_cluster_ops->remove_disk(mddev, rdev); rdev 2881 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 2890 drivers/md/md.c set_bit(WriteMostly, &rdev->flags); rdev 2891 drivers/md/md.c mddev_create_wb_pool(rdev->mddev, rdev, false); rdev 2894 drivers/md/md.c mddev_destroy_wb_pool(rdev->mddev, rdev); rdev 2895 drivers/md/md.c clear_bit(WriteMostly, &rdev->flags); rdev 2898 drivers/md/md.c set_bit(Blocked, &rdev->flags); rdev 2901 drivers/md/md.c if (!test_bit(Faulty, &rdev->flags) && rdev 2902 drivers/md/md.c !test_bit(ExternalBbl, &rdev->flags) && rdev 2903 drivers/md/md.c rdev->badblocks.unacked_exist) { rdev 2907 drivers/md/md.c md_error(rdev->mddev, rdev); rdev 2909 drivers/md/md.c clear_bit(Blocked, &rdev->flags); rdev 2910 drivers/md/md.c clear_bit(BlockedBadBlocks, &rdev->flags); rdev 2911 drivers/md/md.c wake_up(&rdev->blocked_wait); rdev 2912 drivers/md/md.c set_bit(MD_RECOVERY_NEEDED, &rdev->mddev->recovery); rdev 2913 drivers/md/md.c md_wakeup_thread(rdev->mddev->thread); rdev 2916 drivers/md/md.c } else if (cmd_match(buf, "insync") && rdev->raid_disk == -1) { rdev 2917 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 2920 drivers/md/md.c set_bit(FailFast, &rdev->flags); rdev 2923 drivers/md/md.c clear_bit(FailFast, &rdev->flags); rdev 2925 drivers/md/md.c } else if (cmd_match(buf, "-insync") && rdev->raid_disk >= 0 && rdev 2926 drivers/md/md.c !test_bit(Journal, &rdev->flags)) { rdev 2927 drivers/md/md.c if (rdev->mddev->pers == NULL) { rdev 2928 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 2929 drivers/md/md.c rdev->saved_raid_disk = rdev->raid_disk; rdev 2930 drivers/md/md.c rdev->raid_disk = -1; rdev 2934 drivers/md/md.c set_bit(WriteErrorSeen, &rdev->flags); rdev 2937 drivers/md/md.c clear_bit(WriteErrorSeen, &rdev->flags); rdev 2944 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 2945 drivers/md/md.c !test_bit(Journal, &rdev->flags) && rdev 2946 drivers/md/md.c !test_bit(Replacement, &rdev->flags)) rdev 2947 drivers/md/md.c set_bit(WantReplacement, &rdev->flags); rdev 2948 drivers/md/md.c set_bit(MD_RECOVERY_NEEDED, &rdev->mddev->recovery); rdev 2949 drivers/md/md.c md_wakeup_thread(rdev->mddev->thread); rdev 2956 drivers/md/md.c clear_bit(WantReplacement, &rdev->flags); rdev 2962 drivers/md/md.c if (rdev->mddev->pers) rdev 2965 drivers/md/md.c set_bit(Replacement, &rdev->flags); rdev 2970 drivers/md/md.c if (rdev->mddev->pers) rdev 2973 drivers/md/md.c clear_bit(Replacement, &rdev->flags); rdev 2977 drivers/md/md.c if (!rdev->mddev->pers) rdev 2979 drivers/md/md.c else if (test_bit(Faulty, &rdev->flags) && (rdev->raid_disk == -1) && rdev 2980 drivers/md/md.c rdev->saved_raid_disk >= 0) { rdev 2987 drivers/md/md.c if (!mddev_is_clustered(rdev->mddev) || rdev 2988 drivers/md/md.c (err = md_cluster_ops->gather_bitmaps(rdev)) == 0) { rdev 2989 drivers/md/md.c clear_bit(Faulty, &rdev->flags); rdev 2990 drivers/md/md.c err = add_bound_rdev(rdev); rdev 2994 drivers/md/md.c } else if (cmd_match(buf, "external_bbl") && (rdev->mddev->external)) { rdev 2995 drivers/md/md.c set_bit(ExternalBbl, &rdev->flags); rdev 2996 drivers/md/md.c rdev->badblocks.shift = 0; rdev 2998 drivers/md/md.c } else if (cmd_match(buf, "-external_bbl") && (rdev->mddev->external)) { rdev 2999 drivers/md/md.c clear_bit(ExternalBbl, &rdev->flags); rdev 3003 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 3010 drivers/md/md.c errors_show(struct md_rdev *rdev, char *page) rdev 3012 drivers/md/md.c return sprintf(page, "%d\n", atomic_read(&rdev->corrected_errors)); rdev 3016 drivers/md/md.c errors_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 3024 drivers/md/md.c atomic_set(&rdev->corrected_errors, n); rdev 3031 drivers/md/md.c slot_show(struct md_rdev *rdev, char *page) rdev 3033 drivers/md/md.c if (test_bit(Journal, &rdev->flags)) rdev 3035 drivers/md/md.c else if (rdev->raid_disk < 0) rdev 3038 drivers/md/md.c return sprintf(page, "%d\n", rdev->raid_disk); rdev 3042 drivers/md/md.c slot_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 3047 drivers/md/md.c if (test_bit(Journal, &rdev->flags)) rdev 3056 drivers/md/md.c if (rdev->mddev->pers && slot == -1) { rdev 3064 drivers/md/md.c if (rdev->raid_disk == -1) rdev 3067 drivers/md/md.c if (rdev->mddev->pers->hot_remove_disk == NULL) rdev 3069 drivers/md/md.c clear_bit(Blocked, &rdev->flags); rdev 3070 drivers/md/md.c remove_and_add_spares(rdev->mddev, rdev); rdev 3071 drivers/md/md.c if (rdev->raid_disk >= 0) rdev 3073 drivers/md/md.c set_bit(MD_RECOVERY_NEEDED, &rdev->mddev->recovery); rdev 3074 drivers/md/md.c md_wakeup_thread(rdev->mddev->thread); rdev 3075 drivers/md/md.c } else if (rdev->mddev->pers) { rdev 3081 drivers/md/md.c if (rdev->raid_disk != -1) rdev 3084 drivers/md/md.c if (test_bit(MD_RECOVERY_RUNNING, &rdev->mddev->recovery)) rdev 3087 drivers/md/md.c if (rdev->mddev->pers->hot_add_disk == NULL) rdev 3090 drivers/md/md.c if (slot >= rdev->mddev->raid_disks && rdev 3091 drivers/md/md.c slot >= rdev->mddev->raid_disks + rdev->mddev->delta_disks) rdev 3094 drivers/md/md.c rdev->raid_disk = slot; rdev 3095 drivers/md/md.c if (test_bit(In_sync, &rdev->flags)) rdev 3096 drivers/md/md.c rdev->saved_raid_disk = slot; rdev 3098 drivers/md/md.c rdev->saved_raid_disk = -1; rdev 3099 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 3100 drivers/md/md.c clear_bit(Bitmap_sync, &rdev->flags); rdev 3101 drivers/md/md.c err = rdev->mddev->pers-> rdev 3102 drivers/md/md.c hot_add_disk(rdev->mddev, rdev); rdev 3104 drivers/md/md.c rdev->raid_disk = -1; rdev 3107 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 3108 drivers/md/md.c if (sysfs_link_rdev(rdev->mddev, rdev)) rdev 3112 drivers/md/md.c if (slot >= rdev->mddev->raid_disks && rdev 3113 drivers/md/md.c slot >= rdev->mddev->raid_disks + rdev->mddev->delta_disks) rdev 3115 drivers/md/md.c rdev->raid_disk = slot; rdev 3117 drivers/md/md.c clear_bit(Faulty, &rdev->flags); rdev 3118 drivers/md/md.c clear_bit(WriteMostly, &rdev->flags); rdev 3119 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 3120 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 3129 drivers/md/md.c offset_show(struct md_rdev *rdev, char *page) rdev 3131 drivers/md/md.c return sprintf(page, "%llu\n", (unsigned long long)rdev->data_offset); rdev 3135 drivers/md/md.c offset_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 3140 drivers/md/md.c if (rdev->mddev->pers && rdev->raid_disk >= 0) rdev 3142 drivers/md/md.c if (rdev->sectors && rdev->mddev->external) rdev 3146 drivers/md/md.c rdev->data_offset = offset; rdev 3147 drivers/md/md.c rdev->new_data_offset = offset; rdev 3154 drivers/md/md.c static ssize_t new_offset_show(struct md_rdev *rdev, char *page) rdev 3157 drivers/md/md.c (unsigned long long)rdev->new_data_offset); rdev 3160 drivers/md/md.c static ssize_t new_offset_store(struct md_rdev *rdev, rdev 3164 drivers/md/md.c struct mddev *mddev = rdev->mddev; rdev 3172 drivers/md/md.c if (new_offset == rdev->data_offset) rdev 3175 drivers/md/md.c else if (new_offset > rdev->data_offset) { rdev 3177 drivers/md/md.c if (new_offset - rdev->data_offset rdev 3178 drivers/md/md.c + mddev->dev_sectors > rdev->sectors) rdev 3186 drivers/md/md.c if (new_offset < rdev->data_offset && rdev 3193 drivers/md/md.c if (new_offset > rdev->data_offset && rdev 3199 drivers/md/md.c .allow_new_offset(rdev, new_offset)) rdev 3201 drivers/md/md.c rdev->new_data_offset = new_offset; rdev 3202 drivers/md/md.c if (new_offset > rdev->data_offset) rdev 3204 drivers/md/md.c else if (new_offset < rdev->data_offset) rdev 3213 drivers/md/md.c rdev_size_show(struct md_rdev *rdev, char *page) rdev 3215 drivers/md/md.c return sprintf(page, "%llu\n", (unsigned long long)rdev->sectors / 2); rdev 3248 drivers/md/md.c rdev_size_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 3250 drivers/md/md.c struct mddev *my_mddev = rdev->mddev; rdev 3251 drivers/md/md.c sector_t oldsectors = rdev->sectors; rdev 3254 drivers/md/md.c if (test_bit(Journal, &rdev->flags)) rdev 3258 drivers/md/md.c if (rdev->data_offset != rdev->new_data_offset) rdev 3260 drivers/md/md.c if (my_mddev->pers && rdev->raid_disk >= 0) { rdev 3263 drivers/md/md.c rdev_size_change(rdev, sectors); rdev 3267 drivers/md/md.c sectors = (i_size_read(rdev->bdev->bd_inode) >> 9) - rdev 3268 drivers/md/md.c rdev->data_offset; rdev 3276 drivers/md/md.c rdev->sectors = sectors; rdev 3293 drivers/md/md.c if (rdev->bdev == rdev2->bdev && rdev 3294 drivers/md/md.c rdev != rdev2 && rdev 3295 drivers/md/md.c overlaps(rdev->data_offset, rdev->sectors, rdev 3314 drivers/md/md.c rdev->sectors = oldsectors; rdev 3324 drivers/md/md.c static ssize_t recovery_start_show(struct md_rdev *rdev, char *page) rdev 3326 drivers/md/md.c unsigned long long recovery_start = rdev->recovery_offset; rdev 3328 drivers/md/md.c if (test_bit(In_sync, &rdev->flags) || rdev 3335 drivers/md/md.c static ssize_t recovery_start_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 3344 drivers/md/md.c if (rdev->mddev->pers && rdev 3345 drivers/md/md.c rdev->raid_disk >= 0) rdev 3348 drivers/md/md.c rdev->recovery_offset = recovery_start; rdev 3350 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 3352 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 3370 drivers/md/md.c static ssize_t bb_show(struct md_rdev *rdev, char *page) rdev 3372 drivers/md/md.c return badblocks_show(&rdev->badblocks, page, 0); rdev 3374 drivers/md/md.c static ssize_t bb_store(struct md_rdev *rdev, const char *page, size_t len) rdev 3376 drivers/md/md.c int rv = badblocks_store(&rdev->badblocks, page, len, 0); rdev 3378 drivers/md/md.c if (test_and_clear_bit(BlockedBadBlocks, &rdev->flags)) rdev 3379 drivers/md/md.c wake_up(&rdev->blocked_wait); rdev 3385 drivers/md/md.c static ssize_t ubb_show(struct md_rdev *rdev, char *page) rdev 3387 drivers/md/md.c return badblocks_show(&rdev->badblocks, page, 1); rdev 3389 drivers/md/md.c static ssize_t ubb_store(struct md_rdev *rdev, const char *page, size_t len) rdev 3391 drivers/md/md.c return badblocks_store(&rdev->badblocks, page, len, 1); rdev 3397 drivers/md/md.c ppl_sector_show(struct md_rdev *rdev, char *page) rdev 3399 drivers/md/md.c return sprintf(page, "%llu\n", (unsigned long long)rdev->ppl.sector); rdev 3403 drivers/md/md.c ppl_sector_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 3412 drivers/md/md.c if (rdev->mddev->pers && test_bit(MD_HAS_PPL, &rdev->mddev->flags) && rdev 3413 drivers/md/md.c rdev->raid_disk >= 0) rdev 3416 drivers/md/md.c if (rdev->mddev->persistent) { rdev 3417 drivers/md/md.c if (rdev->mddev->major_version == 0) rdev 3419 drivers/md/md.c if ((sector > rdev->sb_start && rdev 3420 drivers/md/md.c sector - rdev->sb_start > S16_MAX) || rdev 3421 drivers/md/md.c (sector < rdev->sb_start && rdev 3422 drivers/md/md.c rdev->sb_start - sector > -S16_MIN)) rdev 3424 drivers/md/md.c rdev->ppl.offset = sector - rdev->sb_start; rdev 3425 drivers/md/md.c } else if (!rdev->mddev->external) { rdev 3428 drivers/md/md.c rdev->ppl.sector = sector; rdev 3436 drivers/md/md.c ppl_size_show(struct md_rdev *rdev, char *page) rdev 3438 drivers/md/md.c return sprintf(page, "%u\n", rdev->ppl.size); rdev 3442 drivers/md/md.c ppl_size_store(struct md_rdev *rdev, const char *buf, size_t len) rdev 3449 drivers/md/md.c if (rdev->mddev->pers && test_bit(MD_HAS_PPL, &rdev->mddev->flags) && rdev 3450 drivers/md/md.c rdev->raid_disk >= 0) rdev 3453 drivers/md/md.c if (rdev->mddev->persistent) { rdev 3454 drivers/md/md.c if (rdev->mddev->major_version == 0) rdev 3458 drivers/md/md.c } else if (!rdev->mddev->external) { rdev 3461 drivers/md/md.c rdev->ppl.size = size; rdev 3486 drivers/md/md.c struct md_rdev *rdev = container_of(kobj, struct md_rdev, kobj); rdev 3490 drivers/md/md.c if (!rdev->mddev) rdev 3492 drivers/md/md.c return entry->show(rdev, page); rdev 3500 drivers/md/md.c struct md_rdev *rdev = container_of(kobj, struct md_rdev, kobj); rdev 3502 drivers/md/md.c struct mddev *mddev = rdev->mddev; rdev 3510 drivers/md/md.c if (rdev->mddev == NULL) rdev 3513 drivers/md/md.c rv = entry->store(rdev, page, length); rdev 3521 drivers/md/md.c struct md_rdev *rdev = container_of(ko, struct md_rdev, kobj); rdev 3522 drivers/md/md.c kfree(rdev); rdev 3534 drivers/md/md.c int md_rdev_init(struct md_rdev *rdev) rdev 3536 drivers/md/md.c rdev->desc_nr = -1; rdev 3537 drivers/md/md.c rdev->saved_raid_disk = -1; rdev 3538 drivers/md/md.c rdev->raid_disk = -1; rdev 3539 drivers/md/md.c rdev->flags = 0; rdev 3540 drivers/md/md.c rdev->data_offset = 0; rdev 3541 drivers/md/md.c rdev->new_data_offset = 0; rdev 3542 drivers/md/md.c rdev->sb_events = 0; rdev 3543 drivers/md/md.c rdev->last_read_error = 0; rdev 3544 drivers/md/md.c rdev->sb_loaded = 0; rdev 3545 drivers/md/md.c rdev->bb_page = NULL; rdev 3546 drivers/md/md.c atomic_set(&rdev->nr_pending, 0); rdev 3547 drivers/md/md.c atomic_set(&rdev->read_errors, 0); rdev 3548 drivers/md/md.c atomic_set(&rdev->corrected_errors, 0); rdev 3550 drivers/md/md.c INIT_LIST_HEAD(&rdev->same_set); rdev 3551 drivers/md/md.c init_waitqueue_head(&rdev->blocked_wait); rdev 3557 drivers/md/md.c return badblocks_init(&rdev->badblocks, 0); rdev 3574 drivers/md/md.c struct md_rdev *rdev; rdev 3577 drivers/md/md.c rdev = kzalloc(sizeof(*rdev), GFP_KERNEL); rdev 3578 drivers/md/md.c if (!rdev) rdev 3581 drivers/md/md.c err = md_rdev_init(rdev); rdev 3584 drivers/md/md.c err = alloc_disk_sb(rdev); rdev 3588 drivers/md/md.c err = lock_rdev(rdev, newdev, super_format == -2); rdev 3592 drivers/md/md.c kobject_init(&rdev->kobj, &rdev_ktype); rdev 3594 drivers/md/md.c size = i_size_read(rdev->bdev->bd_inode) >> BLOCK_SIZE_BITS; rdev 3597 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 3604 drivers/md/md.c load_super(rdev, NULL, super_minor); rdev 3607 drivers/md/md.c bdevname(rdev->bdev,b), rdev 3613 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 3618 drivers/md/md.c return rdev; rdev 3621 drivers/md/md.c if (rdev->bdev) rdev 3622 drivers/md/md.c unlock_rdev(rdev); rdev 3623 drivers/md/md.c md_rdev_clear(rdev); rdev 3624 drivers/md/md.c kfree(rdev); rdev 3635 drivers/md/md.c struct md_rdev *rdev, *freshest, *tmp; rdev 3639 drivers/md/md.c rdev_for_each_safe(rdev, tmp, mddev) rdev 3641 drivers/md/md.c load_super(rdev, freshest, mddev->minor_version)) { rdev 3643 drivers/md/md.c freshest = rdev; rdev 3649 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 3650 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 3663 drivers/md/md.c rdev_for_each_safe(rdev, tmp, mddev) { rdev 3665 drivers/md/md.c (rdev->desc_nr >= mddev->max_disks || rdev 3668 drivers/md/md.c mdname(mddev), bdevname(rdev->bdev, b), rdev 3670 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 3673 drivers/md/md.c if (rdev != freshest) { rdev 3675 drivers/md/md.c validate_super(mddev, rdev)) { rdev 3677 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 3678 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 3683 drivers/md/md.c rdev->desc_nr = i++; rdev 3684 drivers/md/md.c rdev->raid_disk = rdev->desc_nr; rdev 3685 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 3686 drivers/md/md.c } else if (rdev->raid_disk >= rdev 3688 drivers/md/md.c !test_bit(Journal, &rdev->flags)) { rdev 3689 drivers/md/md.c rdev->raid_disk = -1; rdev 3690 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 3796 drivers/md/md.c struct md_rdev *rdev; rdev 3872 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 3873 drivers/md/md.c rdev->new_raid_disk = rdev->raid_disk; rdev 3944 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 3945 drivers/md/md.c if (rdev->raid_disk < 0) rdev 3947 drivers/md/md.c if (rdev->new_raid_disk >= mddev->raid_disks) rdev 3948 drivers/md/md.c rdev->new_raid_disk = -1; rdev 3949 drivers/md/md.c if (rdev->new_raid_disk == rdev->raid_disk) rdev 3951 drivers/md/md.c sysfs_unlink_rdev(mddev, rdev); rdev 3953 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 3954 drivers/md/md.c if (rdev->raid_disk < 0) rdev 3956 drivers/md/md.c if (rdev->new_raid_disk == rdev->raid_disk) rdev 3958 drivers/md/md.c rdev->raid_disk = rdev->new_raid_disk; rdev 3959 drivers/md/md.c if (rdev->raid_disk < 0) rdev 3960 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 3962 drivers/md/md.c if (sysfs_link_rdev(mddev, rdev)) rdev 3964 drivers/md/md.c rdev->raid_disk, mdname(mddev)); rdev 4068 drivers/md/md.c struct md_rdev *rdev; rdev 4072 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 4074 drivers/md/md.c rdev->data_offset < rdev->new_data_offset) rdev 4077 drivers/md/md.c rdev->data_offset > rdev->new_data_offset) rdev 4438 drivers/md/md.c struct md_rdev *rdev; rdev 4457 drivers/md/md.c rdev = md_import_device(dev, mddev->major_version, rdev 4459 drivers/md/md.c if (!IS_ERR(rdev) && !list_empty(&mddev->disks)) { rdev 4464 drivers/md/md.c .load_super(rdev, rdev0, mddev->minor_version); rdev 4469 drivers/md/md.c rdev = md_import_device(dev, -2, -1); rdev 4471 drivers/md/md.c rdev = md_import_device(dev, -1, -1); rdev 4473 drivers/md/md.c if (IS_ERR(rdev)) { rdev 4475 drivers/md/md.c return PTR_ERR(rdev); rdev 4477 drivers/md/md.c err = bind_rdev_to_array(rdev, mddev); rdev 4480 drivers/md/md.c export_rdev(rdev); rdev 5075 drivers/md/md.c struct md_rdev *rdev; rdev 5096 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 5097 drivers/md/md.c rdev->new_data_offset = rdev->data_offset; rdev 5594 drivers/md/md.c struct md_rdev *rdev; rdev 5629 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 5630 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 5632 drivers/md/md.c sync_blockdev(rdev->bdev); rdev 5633 drivers/md/md.c invalidate_bdev(rdev->bdev); rdev 5635 drivers/md/md.c (bdev_read_only(rdev->bdev) || rdev 5636 drivers/md/md.c bdev_read_only(rdev->meta_bdev))) { rdev 5642 drivers/md/md.c if (rdev->sb_page) rdev 5649 drivers/md/md.c if (rdev->meta_bdev) { rdev 5651 drivers/md/md.c } else if (rdev->data_offset < rdev->sb_start) { rdev 5653 drivers/md/md.c rdev->data_offset + mddev->dev_sectors rdev 5654 drivers/md/md.c > rdev->sb_start) { rdev 5660 drivers/md/md.c if (rdev->sb_start + rdev->sb_size/512 rdev 5661 drivers/md/md.c > rdev->data_offset) { rdev 5667 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 5717 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 5719 drivers/md/md.c if (rdev < rdev2 && rdev 5720 drivers/md/md.c rdev->bdev->bd_contains == rdev 5724 drivers/md/md.c bdevname(rdev->bdev,b), rdev 5774 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 5775 drivers/md/md.c if (test_bit(WriteMostly, &rdev->flags) && rdev 5776 drivers/md/md.c rdev_init_wb(rdev)) rdev 5793 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 5794 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 5795 drivers/md/md.c !blk_queue_nonrot(bdev_get_queue(rdev->bdev))) { rdev 5830 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 5831 drivers/md/md.c if (rdev->raid_disk >= 0) rdev 5832 drivers/md/md.c sysfs_link_rdev(mddev, rdev); /* failure here is OK */ rdev 5915 drivers/md/md.c struct md_rdev *rdev; rdev 5928 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) { rdev 5929 drivers/md/md.c if (test_bit(Journal, &rdev->flags) && rdev 5930 drivers/md/md.c !test_bit(Faulty, &rdev->flags)) rdev 5932 drivers/md/md.c if (bdev_read_only(rdev->bdev)) rdev 6148 drivers/md/md.c struct md_rdev *rdev; rdev 6194 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 6195 drivers/md/md.c if (rdev->raid_disk >= 0) rdev 6196 drivers/md/md.c sysfs_unlink_rdev(mddev, rdev); rdev 6236 drivers/md/md.c struct md_rdev *rdev; rdev 6244 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 6246 drivers/md/md.c pr_cont("<%s>", bdevname(rdev->bdev,b)); rdev 6271 drivers/md/md.c struct md_rdev *rdev0, *rdev, *tmp; rdev 6285 drivers/md/md.c rdev_for_each_list(rdev, tmp, &pending_raid_disks) rdev 6286 drivers/md/md.c if (super_90_load(rdev, rdev0, 0) >= 0) { rdev 6288 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 6289 drivers/md/md.c list_move(&rdev->same_set, &candidates); rdev 6327 drivers/md/md.c rdev_for_each_list(rdev, tmp, &candidates) { rdev 6328 drivers/md/md.c list_del_init(&rdev->same_set); rdev 6329 drivers/md/md.c if (bind_rdev_to_array(rdev, mddev)) rdev 6330 drivers/md/md.c export_rdev(rdev); rdev 6338 drivers/md/md.c rdev_for_each_list(rdev, tmp, &candidates) { rdev 6339 drivers/md/md.c list_del_init(&rdev->same_set); rdev 6340 drivers/md/md.c export_rdev(rdev); rdev 6366 drivers/md/md.c struct md_rdev *rdev; rdev 6370 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) { rdev 6372 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 6376 drivers/md/md.c if (test_bit(In_sync, &rdev->flags)) rdev 6378 drivers/md/md.c else if (test_bit(Journal, &rdev->flags)) rdev 6457 drivers/md/md.c struct md_rdev *rdev; rdev 6463 drivers/md/md.c rdev = md_find_rdev_nr_rcu(mddev, info.number); rdev 6464 drivers/md/md.c if (rdev) { rdev 6465 drivers/md/md.c info.major = MAJOR(rdev->bdev->bd_dev); rdev 6466 drivers/md/md.c info.minor = MINOR(rdev->bdev->bd_dev); rdev 6467 drivers/md/md.c info.raid_disk = rdev->raid_disk; rdev 6469 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 6471 drivers/md/md.c else if (test_bit(In_sync, &rdev->flags)) { rdev 6475 drivers/md/md.c if (test_bit(Journal, &rdev->flags)) rdev 6477 drivers/md/md.c if (test_bit(WriteMostly, &rdev->flags)) rdev 6479 drivers/md/md.c if (test_bit(FailFast, &rdev->flags)) rdev 6497 drivers/md/md.c struct md_rdev *rdev; rdev 6513 drivers/md/md.c rdev = md_import_device(dev, mddev->major_version, mddev->minor_version); rdev 6514 drivers/md/md.c if (IS_ERR(rdev)) { rdev 6516 drivers/md/md.c PTR_ERR(rdev)); rdev 6517 drivers/md/md.c return PTR_ERR(rdev); rdev 6524 drivers/md/md.c .load_super(rdev, rdev0, mddev->minor_version); rdev 6527 drivers/md/md.c bdevname(rdev->bdev,b), rdev 6529 drivers/md/md.c export_rdev(rdev); rdev 6533 drivers/md/md.c err = bind_rdev_to_array(rdev, mddev); rdev 6535 drivers/md/md.c export_rdev(rdev); rdev 6552 drivers/md/md.c rdev = md_import_device(dev, mddev->major_version, rdev 6555 drivers/md/md.c rdev = md_import_device(dev, -1, -1); rdev 6556 drivers/md/md.c if (IS_ERR(rdev)) { rdev 6558 drivers/md/md.c PTR_ERR(rdev)); rdev 6559 drivers/md/md.c return PTR_ERR(rdev); rdev 6565 drivers/md/md.c rdev->raid_disk = info->raid_disk; rdev 6566 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 6567 drivers/md/md.c clear_bit(Bitmap_sync, &rdev->flags); rdev 6569 drivers/md/md.c rdev->raid_disk = -1; rdev 6570 drivers/md/md.c rdev->saved_raid_disk = rdev->raid_disk; rdev 6573 drivers/md/md.c validate_super(mddev, rdev); rdev 6575 drivers/md/md.c rdev->raid_disk != info->raid_disk) { rdev 6579 drivers/md/md.c export_rdev(rdev); rdev 6583 drivers/md/md.c clear_bit(In_sync, &rdev->flags); /* just to be sure */ rdev 6585 drivers/md/md.c set_bit(WriteMostly, &rdev->flags); rdev 6587 drivers/md/md.c clear_bit(WriteMostly, &rdev->flags); rdev 6589 drivers/md/md.c set_bit(FailFast, &rdev->flags); rdev 6591 drivers/md/md.c clear_bit(FailFast, &rdev->flags); rdev 6605 drivers/md/md.c export_rdev(rdev); rdev 6608 drivers/md/md.c set_bit(Journal, &rdev->flags); rdev 6615 drivers/md/md.c set_bit(Candidate, &rdev->flags); rdev 6618 drivers/md/md.c err = md_cluster_ops->add_new_disk(mddev, rdev); rdev 6620 drivers/md/md.c export_rdev(rdev); rdev 6626 drivers/md/md.c rdev->raid_disk = -1; rdev 6627 drivers/md/md.c err = bind_rdev_to_array(rdev, mddev); rdev 6630 drivers/md/md.c export_rdev(rdev); rdev 6638 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 6644 drivers/md/md.c err = add_bound_rdev(rdev); rdev 6648 drivers/md/md.c err = add_bound_rdev(rdev); rdev 6663 drivers/md/md.c rdev = md_import_device(dev, -1, 0); rdev 6664 drivers/md/md.c if (IS_ERR(rdev)) { rdev 6666 drivers/md/md.c PTR_ERR(rdev)); rdev 6667 drivers/md/md.c return PTR_ERR(rdev); rdev 6669 drivers/md/md.c rdev->desc_nr = info->number; rdev 6671 drivers/md/md.c rdev->raid_disk = info->raid_disk; rdev 6673 drivers/md/md.c rdev->raid_disk = -1; rdev 6675 drivers/md/md.c if (rdev->raid_disk < mddev->raid_disks) rdev 6677 drivers/md/md.c set_bit(In_sync, &rdev->flags); rdev 6680 drivers/md/md.c set_bit(WriteMostly, &rdev->flags); rdev 6682 drivers/md/md.c set_bit(FailFast, &rdev->flags); rdev 6686 drivers/md/md.c rdev->sb_start = i_size_read(rdev->bdev->bd_inode) / 512; rdev 6688 drivers/md/md.c rdev->sb_start = calc_dev_sboffset(rdev); rdev 6689 drivers/md/md.c rdev->sectors = rdev->sb_start; rdev 6691 drivers/md/md.c err = bind_rdev_to_array(rdev, mddev); rdev 6693 drivers/md/md.c export_rdev(rdev); rdev 6704 drivers/md/md.c struct md_rdev *rdev; rdev 6709 drivers/md/md.c rdev = find_rdev(mddev, dev); rdev 6710 drivers/md/md.c if (!rdev) rdev 6713 drivers/md/md.c if (rdev->raid_disk < 0) rdev 6716 drivers/md/md.c clear_bit(Blocked, &rdev->flags); rdev 6717 drivers/md/md.c remove_and_add_spares(mddev, rdev); rdev 6719 drivers/md/md.c if (rdev->raid_disk >= 0) rdev 6724 drivers/md/md.c md_cluster_ops->remove_disk(mddev, rdev); rdev 6726 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 6737 drivers/md/md.c bdevname(rdev->bdev,b), mdname(mddev)); rdev 6745 drivers/md/md.c struct md_rdev *rdev; rdev 6761 drivers/md/md.c rdev = md_import_device(dev, -1, 0); rdev 6762 drivers/md/md.c if (IS_ERR(rdev)) { rdev 6764 drivers/md/md.c PTR_ERR(rdev)); rdev 6769 drivers/md/md.c rdev->sb_start = calc_dev_sboffset(rdev); rdev 6771 drivers/md/md.c rdev->sb_start = i_size_read(rdev->bdev->bd_inode) / 512; rdev 6773 drivers/md/md.c rdev->sectors = rdev->sb_start; rdev 6775 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) { rdev 6777 drivers/md/md.c bdevname(rdev->bdev,b), mdname(mddev)); rdev 6782 drivers/md/md.c clear_bit(In_sync, &rdev->flags); rdev 6783 drivers/md/md.c rdev->desc_nr = -1; rdev 6784 drivers/md/md.c rdev->saved_raid_disk = -1; rdev 6785 drivers/md/md.c err = bind_rdev_to_array(rdev, mddev); rdev 6794 drivers/md/md.c rdev->raid_disk = -1; rdev 6809 drivers/md/md.c export_rdev(rdev); rdev 6998 drivers/md/md.c struct md_rdev *rdev; rdev 7020 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 7021 drivers/md/md.c sector_t avail = rdev->sectors; rdev 7043 drivers/md/md.c struct md_rdev *rdev; rdev 7057 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 7059 drivers/md/md.c rdev->data_offset < rdev->new_data_offset) rdev 7062 drivers/md/md.c rdev->data_offset > rdev->new_data_offset) rdev 7215 drivers/md/md.c struct md_rdev *rdev; rdev 7222 drivers/md/md.c rdev = md_find_rdev_rcu(mddev, dev); rdev 7223 drivers/md/md.c if (!rdev) rdev 7226 drivers/md/md.c md_error(mddev, rdev); rdev 7227 drivers/md/md.c if (!test_bit(Faulty, &rdev->flags)) rdev 7770 drivers/md/md.c void md_error(struct mddev *mddev, struct md_rdev *rdev) rdev 7772 drivers/md/md.c if (!rdev || test_bit(Faulty, &rdev->flags)) rdev 7777 drivers/md/md.c mddev->pers->error_handler(mddev,rdev); rdev 7780 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 7795 drivers/md/md.c struct md_rdev *rdev; rdev 7799 drivers/md/md.c list_for_each_entry(rdev, &pending_raid_disks, same_set) { rdev 7803 drivers/md/md.c bdevname(rdev->bdev,b)); rdev 7837 drivers/md/md.c struct md_rdev *rdev; rdev 7839 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 7840 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 7841 drivers/md/md.c !test_bit(Faulty, &rdev->flags) && rdev 7842 drivers/md/md.c rdev->recovery_offset != MaxSector && rdev 7843 drivers/md/md.c rdev->recovery_offset) { rdev 8005 drivers/md/md.c struct md_rdev *rdev; rdev 8038 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) { rdev 8041 drivers/md/md.c bdevname(rdev->bdev,b), rdev->desc_nr); rdev 8042 drivers/md/md.c if (test_bit(WriteMostly, &rdev->flags)) rdev 8044 drivers/md/md.c if (test_bit(Journal, &rdev->flags)) rdev 8046 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) { rdev 8050 drivers/md/md.c if (rdev->raid_disk < 0) rdev 8052 drivers/md/md.c if (test_bit(Replacement, &rdev->flags)) rdev 8054 drivers/md/md.c sectors += rdev->sectors; rdev 8219 drivers/md/md.c struct md_rdev *rdev; rdev 8225 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) { rdev 8226 drivers/md/md.c struct gendisk *disk = rdev->bdev->bd_contains->bd_disk; rdev 8251 drivers/md/md.c if (init || curr_events - rdev->last_events > 64) { rdev 8252 drivers/md/md.c rdev->last_events = curr_events; rdev 8414 drivers/md/md.c struct md_rdev *rdev; rdev 8551 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) rdev 8552 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 8553 drivers/md/md.c !test_bit(Journal, &rdev->flags) && rdev 8554 drivers/md/md.c !test_bit(Faulty, &rdev->flags) && rdev 8555 drivers/md/md.c !test_bit(In_sync, &rdev->flags) && rdev 8556 drivers/md/md.c rdev->recovery_offset < j) rdev 8557 drivers/md/md.c j = rdev->recovery_offset; rdev 8769 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) rdev 8770 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 8772 drivers/md/md.c !test_bit(Journal, &rdev->flags) && rdev 8773 drivers/md/md.c !test_bit(Faulty, &rdev->flags) && rdev 8774 drivers/md/md.c !test_bit(In_sync, &rdev->flags) && rdev 8775 drivers/md/md.c rdev->recovery_offset < mddev->curr_resync) rdev 8776 drivers/md/md.c rdev->recovery_offset = mddev->curr_resync; rdev 8824 drivers/md/md.c struct md_rdev *rdev; rdev 8833 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 8834 drivers/md/md.c if ((this == NULL || rdev == this) && rdev 8835 drivers/md/md.c rdev->raid_disk >= 0 && rdev 8836 drivers/md/md.c !test_bit(Blocked, &rdev->flags) && rdev 8837 drivers/md/md.c test_bit(Faulty, &rdev->flags) && rdev 8838 drivers/md/md.c atomic_read(&rdev->nr_pending)==0) { rdev 8845 drivers/md/md.c set_bit(RemoveSynchronized, &rdev->flags); rdev 8851 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 8852 drivers/md/md.c if ((this == NULL || rdev == this) && rdev 8853 drivers/md/md.c rdev->raid_disk >= 0 && rdev 8854 drivers/md/md.c !test_bit(Blocked, &rdev->flags) && rdev 8855 drivers/md/md.c ((test_bit(RemoveSynchronized, &rdev->flags) || rdev 8856 drivers/md/md.c (!test_bit(In_sync, &rdev->flags) && rdev 8857 drivers/md/md.c !test_bit(Journal, &rdev->flags))) && rdev 8858 drivers/md/md.c atomic_read(&rdev->nr_pending)==0)) { rdev 8860 drivers/md/md.c mddev, rdev) == 0) { rdev 8861 drivers/md/md.c sysfs_unlink_rdev(mddev, rdev); rdev 8862 drivers/md/md.c rdev->saved_raid_disk = rdev->raid_disk; rdev 8863 drivers/md/md.c rdev->raid_disk = -1; rdev 8867 drivers/md/md.c if (remove_some && test_bit(RemoveSynchronized, &rdev->flags)) rdev 8868 drivers/md/md.c clear_bit(RemoveSynchronized, &rdev->flags); rdev 8877 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 8878 drivers/md/md.c if (this && this != rdev) rdev 8880 drivers/md/md.c if (test_bit(Candidate, &rdev->flags)) rdev 8882 drivers/md/md.c if (rdev->raid_disk >= 0 && rdev 8883 drivers/md/md.c !test_bit(In_sync, &rdev->flags) && rdev 8884 drivers/md/md.c !test_bit(Journal, &rdev->flags) && rdev 8885 drivers/md/md.c !test_bit(Faulty, &rdev->flags)) rdev 8887 drivers/md/md.c if (rdev->raid_disk >= 0) rdev 8889 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 8891 drivers/md/md.c if (!test_bit(Journal, &rdev->flags)) { rdev 8893 drivers/md/md.c ! (rdev->saved_raid_disk >= 0 && rdev 8894 drivers/md/md.c !test_bit(Bitmap_sync, &rdev->flags))) rdev 8897 drivers/md/md.c rdev->recovery_offset = 0; rdev 8900 drivers/md/md.c hot_add_disk(mddev, rdev) == 0) { rdev 8901 drivers/md/md.c if (sysfs_link_rdev(mddev, rdev)) rdev 8903 drivers/md/md.c if (!test_bit(Journal, &rdev->flags)) rdev 9013 drivers/md/md.c struct md_rdev *rdev; rdev 9020 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 9021 drivers/md/md.c clear_bit(Blocked, &rdev->flags); rdev 9042 drivers/md/md.c struct md_rdev *rdev; rdev 9046 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 9047 drivers/md/md.c if (test_and_clear_bit(ClusterRemove, &rdev->flags) && rdev 9048 drivers/md/md.c rdev->raid_disk < 0) rdev 9049 drivers/md/md.c md_kick_rdev_from_array(rdev); rdev 9144 drivers/md/md.c struct md_rdev *rdev; rdev 9172 drivers/md/md.c rdev_for_each(rdev, mddev) rdev 9173 drivers/md/md.c rdev->saved_raid_disk = -1; rdev 9205 drivers/md/md.c void md_wait_for_blocked_rdev(struct md_rdev *rdev, struct mddev *mddev) rdev 9207 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 9208 drivers/md/md.c wait_event_timeout(rdev->blocked_wait, rdev 9209 drivers/md/md.c !test_bit(Blocked, &rdev->flags) && rdev 9210 drivers/md/md.c !test_bit(BlockedBadBlocks, &rdev->flags), rdev 9212 drivers/md/md.c rdev_dec_pending(rdev, mddev); rdev 9219 drivers/md/md.c struct md_rdev *rdev; rdev 9221 drivers/md/md.c rdev_for_each(rdev, mddev) { rdev 9222 drivers/md/md.c if (rdev->data_offset > rdev->new_data_offset) rdev 9223 drivers/md/md.c rdev->sectors += rdev->data_offset - rdev->new_data_offset; rdev 9225 drivers/md/md.c rdev->sectors -= rdev->new_data_offset - rdev->data_offset; rdev 9226 drivers/md/md.c rdev->data_offset = rdev->new_data_offset; rdev 9234 drivers/md/md.c int rdev_set_badblocks(struct md_rdev *rdev, sector_t s, int sectors, rdev 9237 drivers/md/md.c struct mddev *mddev = rdev->mddev; rdev 9240 drivers/md/md.c s += rdev->new_data_offset; rdev 9242 drivers/md/md.c s += rdev->data_offset; rdev 9243 drivers/md/md.c rv = badblocks_set(&rdev->badblocks, s, sectors, 0); rdev 9246 drivers/md/md.c if (test_bit(ExternalBbl, &rdev->flags)) rdev 9247 drivers/md/md.c sysfs_notify(&rdev->kobj, NULL, rdev 9249 drivers/md/md.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 9252 drivers/md/md.c md_wakeup_thread(rdev->mddev->thread); rdev 9259 drivers/md/md.c int rdev_clear_badblocks(struct md_rdev *rdev, sector_t s, int sectors, rdev 9264 drivers/md/md.c s += rdev->new_data_offset; rdev 9266 drivers/md/md.c s += rdev->data_offset; rdev 9267 drivers/md/md.c rv = badblocks_clear(&rdev->badblocks, s, sectors); rdev 9268 drivers/md/md.c if ((rv == 0) && test_bit(ExternalBbl, &rdev->flags)) rdev 9269 drivers/md/md.c sysfs_notify(&rdev->kobj, NULL, "bad_blocks"); rdev 9356 drivers/md/md.c static void check_sb_changes(struct mddev *mddev, struct md_rdev *rdev) rdev 9358 drivers/md/md.c struct mdp_superblock_1 *sb = page_address(rdev->sb_page); rdev 9452 drivers/md/md.c static int read_rdev(struct mddev *mddev, struct md_rdev *rdev) rdev 9455 drivers/md/md.c struct page *swapout = rdev->sb_page; rdev 9461 drivers/md/md.c rdev->sb_page = NULL; rdev 9462 drivers/md/md.c err = alloc_disk_sb(rdev); rdev 9464 drivers/md/md.c ClearPageUptodate(rdev->sb_page); rdev 9465 drivers/md/md.c rdev->sb_loaded = 0; rdev 9467 drivers/md/md.c load_super(rdev, NULL, mddev->minor_version); rdev 9471 drivers/md/md.c __func__, __LINE__, rdev->desc_nr, err); rdev 9472 drivers/md/md.c if (rdev->sb_page) rdev 9473 drivers/md/md.c put_page(rdev->sb_page); rdev 9474 drivers/md/md.c rdev->sb_page = swapout; rdev 9475 drivers/md/md.c rdev->sb_loaded = 1; rdev 9479 drivers/md/md.c sb = page_address(rdev->sb_page); rdev 9485 drivers/md/md.c rdev->recovery_offset = le64_to_cpu(sb->recovery_offset); rdev 9490 drivers/md/md.c if (rdev->recovery_offset == MaxSector && rdev 9491 drivers/md/md.c !test_bit(In_sync, &rdev->flags) && rdev 9501 drivers/md/md.c struct md_rdev *rdev; rdev 9505 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) { rdev 9506 drivers/md/md.c if (rdev->desc_nr == nr) rdev 9510 drivers/md/md.c if (!rdev || rdev->desc_nr != nr) { rdev 9515 drivers/md/md.c err = read_rdev(mddev, rdev); rdev 9519 drivers/md/md.c check_sb_changes(mddev, rdev); rdev 9522 drivers/md/md.c rdev_for_each_rcu(rdev, mddev) { rdev 9523 drivers/md/md.c if (!test_bit(Faulty, &rdev->flags)) rdev 9524 drivers/md/md.c read_rdev(mddev, rdev); rdev 9558 drivers/md/md.c struct md_rdev *rdev; rdev 9577 drivers/md/md.c rdev = md_import_device(dev,0, 90); rdev 9579 drivers/md/md.c if (IS_ERR(rdev)) rdev 9582 drivers/md/md.c if (test_bit(Faulty, &rdev->flags)) rdev 9585 drivers/md/md.c set_bit(AutoDetected, &rdev->flags); rdev 9586 drivers/md/md.c list_add(&rdev->same_set, &pending_raid_disks); rdev 210 drivers/md/md.h static inline int is_badblock(struct md_rdev *rdev, sector_t s, int sectors, rdev 213 drivers/md/md.h if (unlikely(rdev->badblocks.count)) { rdev 214 drivers/md/md.h int rv = badblocks_check(&rdev->badblocks, rdev->data_offset + s, rdev 218 drivers/md/md.h *first_bad -= rdev->data_offset; rdev 223 drivers/md/md.h extern int rdev_set_badblocks(struct md_rdev *rdev, sector_t s, int sectors, rdev 225 drivers/md/md.h extern int rdev_clear_badblocks(struct md_rdev *rdev, sector_t s, int sectors, rdev 491 drivers/md/md.h void (*sync_super)(struct mddev *mddev, struct md_rdev *rdev); rdev 566 drivers/md/md.h void (*error_handler)(struct mddev *mddev, struct md_rdev *rdev); rdev 567 drivers/md/md.h int (*hot_add_disk) (struct mddev *mddev, struct md_rdev *rdev); rdev 568 drivers/md/md.h int (*hot_remove_disk) (struct mddev *mddev, struct md_rdev *rdev); rdev 623 drivers/md/md.h static inline int sysfs_link_rdev(struct mddev *mddev, struct md_rdev *rdev) rdev 626 drivers/md/md.h if (!test_bit(Replacement, &rdev->flags) && rdev 627 drivers/md/md.h !test_bit(Journal, &rdev->flags) && rdev 629 drivers/md/md.h sprintf(nm, "rd%d", rdev->raid_disk); rdev 630 drivers/md/md.h return sysfs_create_link(&mddev->kobj, &rdev->kobj, nm); rdev 635 drivers/md/md.h static inline void sysfs_unlink_rdev(struct mddev *mddev, struct md_rdev *rdev) rdev 638 drivers/md/md.h if (!test_bit(Replacement, &rdev->flags) && rdev 639 drivers/md/md.h !test_bit(Journal, &rdev->flags) && rdev 641 drivers/md/md.h sprintf(nm, "rd%d", rdev->raid_disk); rdev 650 drivers/md/md.h #define rdev_for_each_list(rdev, tmp, head) \ rdev 651 drivers/md/md.h list_for_each_entry_safe(rdev, tmp, head, same_set) rdev 656 drivers/md/md.h #define rdev_for_each(rdev, mddev) \ rdev 657 drivers/md/md.h list_for_each_entry(rdev, &((mddev)->disks), same_set) rdev 659 drivers/md/md.h #define rdev_for_each_safe(rdev, tmp, mddev) \ rdev 660 drivers/md/md.h list_for_each_entry_safe(rdev, tmp, &((mddev)->disks), same_set) rdev 662 drivers/md/md.h #define rdev_for_each_rcu(rdev, mddev) \ rdev 663 drivers/md/md.h list_for_each_entry_rcu(rdev, &((mddev)->disks), same_set) rdev 702 drivers/md/md.h extern void md_error(struct mddev *mddev, struct md_rdev *rdev); rdev 707 drivers/md/md.h extern void md_super_write(struct mddev *mddev, struct md_rdev *rdev, rdev 710 drivers/md/md.h extern int sync_page_io(struct md_rdev *rdev, sector_t sector, int size, rdev 716 drivers/md/md.h extern void md_wait_for_blocked_rdev(struct md_rdev *rdev, struct mddev *mddev); rdev 720 drivers/md/md.h extern int md_integrity_add_rdev(struct md_rdev *rdev, struct mddev *mddev); rdev 728 drivers/md/md.h extern int md_rdev_init(struct md_rdev *rdev); rdev 729 drivers/md/md.h extern void md_rdev_clear(struct md_rdev *rdev); rdev 739 drivers/md/md.h extern void md_kick_rdev_from_array(struct md_rdev * rdev); rdev 740 drivers/md/md.h extern void mddev_create_wb_pool(struct mddev *mddev, struct md_rdev *rdev, rdev 745 drivers/md/md.h static inline bool is_mddev_broken(struct md_rdev *rdev, const char *md_type) rdev 747 drivers/md/md.h int flags = rdev->bdev->bd_disk->flags; rdev 750 drivers/md/md.h if (!test_and_set_bit(MD_BROKEN, &rdev->mddev->flags)) rdev 752 drivers/md/md.h mdname(rdev->mddev), md_type); rdev 758 drivers/md/md.h static inline void rdev_dec_pending(struct md_rdev *rdev, struct mddev *mddev) rdev 760 drivers/md/md.h int faulty = test_bit(Faulty, &rdev->flags); rdev 761 drivers/md/md.h if (atomic_dec_and_test(&rdev->nr_pending) && faulty) { rdev 84 drivers/md/raid0.c struct md_rdev *smallest, *rdev1, *rdev2, *rdev, **dev; rdev 256 drivers/md/raid0.c rdev = conf->devlist[j]; rdev 257 drivers/md/raid0.c if (rdev->sectors <= zone->dev_start) { rdev 260 drivers/md/raid0.c bdevname(rdev->bdev, b)); rdev 266 drivers/md/raid0.c bdevname(rdev->bdev, b), c); rdev 267 drivers/md/raid0.c dev[c] = rdev; rdev 269 drivers/md/raid0.c if (!smallest || rdev->sectors < smallest->sectors) { rdev 270 drivers/md/raid0.c smallest = rdev; rdev 273 drivers/md/raid0.c (unsigned long long)rdev->sectors); rdev 362 drivers/md/raid0.c struct md_rdev *rdev; rdev 367 drivers/md/raid0.c rdev_for_each(rdev, mddev) rdev 368 drivers/md/raid0.c array_sectors += (rdev->sectors & rdev 397 drivers/md/raid0.c struct md_rdev *rdev; rdev 409 drivers/md/raid0.c rdev_for_each(rdev, mddev) { rdev 410 drivers/md/raid0.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 411 drivers/md/raid0.c rdev->data_offset << 9); rdev 412 drivers/md/raid0.c if (blk_queue_discard(bdev_get_queue(rdev->bdev))) rdev 529 drivers/md/raid0.c struct md_rdev *rdev; rdev 549 drivers/md/raid0.c rdev = conf->devlist[(zone - conf->strip_zone) * rdev 551 drivers/md/raid0.c if (__blkdev_issue_discard(rdev->bdev, rdev 552 drivers/md/raid0.c dev_start + zone->dev_start + rdev->data_offset, rdev 559 drivers/md/raid0.c trace_block_bio_remap(bdev_get_queue(rdev->bdev), rdev 648 drivers/md/raid0.c struct md_rdev *rdev; rdev 658 drivers/md/raid0.c rdev_for_each(rdev, mddev) { rdev 660 drivers/md/raid0.c if (rdev->raid_disk == mddev->raid_disks-1) { rdev 665 drivers/md/raid0.c rdev->sectors = mddev->dev_sectors; rdev 53 drivers/md/raid1.c static int check_and_add_wb(struct md_rdev *rdev, sector_t lo, sector_t hi) rdev 58 drivers/md/raid1.c struct mddev *mddev = rdev->mddev; rdev 62 drivers/md/raid1.c spin_lock_irqsave(&rdev->wb_list_lock, flags); rdev 63 drivers/md/raid1.c list_for_each_entry(temp_wi, &rdev->wb_list, list) { rdev 74 drivers/md/raid1.c list_add(&wi->list, &rdev->wb_list); rdev 77 drivers/md/raid1.c spin_unlock_irqrestore(&rdev->wb_list_lock, flags); rdev 82 drivers/md/raid1.c static void remove_wb(struct md_rdev *rdev, sector_t lo, sector_t hi) rdev 87 drivers/md/raid1.c struct mddev *mddev = rdev->mddev; rdev 89 drivers/md/raid1.c spin_lock_irqsave(&rdev->wb_list_lock, flags); rdev 90 drivers/md/raid1.c list_for_each_entry(wi, &rdev->wb_list, list) rdev 100 drivers/md/raid1.c spin_unlock_irqrestore(&rdev->wb_list_lock, flags); rdev 101 drivers/md/raid1.c wake_up(&rdev->wb_io_wait); rdev 249 drivers/md/raid1.c rdev_dec_pending(conf->mirrors[i].rdev, r1_bio->mddev); rdev 346 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[r1_bio->read_disk].rdev; rdev 355 drivers/md/raid1.c else if (test_bit(FailFast, &rdev->flags) && rdev 369 drivers/md/raid1.c test_bit(In_sync, &rdev->flags))) rdev 376 drivers/md/raid1.c rdev_dec_pending(rdev, conf->mddev); rdev 384 drivers/md/raid1.c bdevname(rdev->bdev, b), rdev 431 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[mirror].rdev; rdev 440 drivers/md/raid1.c set_bit(WriteErrorSeen, &rdev->flags); rdev 441 drivers/md/raid1.c if (!test_and_set_bit(WantReplacement, &rdev->flags)) rdev 445 drivers/md/raid1.c if (test_bit(FailFast, &rdev->flags) && rdev 448 drivers/md/raid1.c !test_bit(WriteMostly, &rdev->flags)) { rdev 449 drivers/md/raid1.c md_error(r1_bio->mddev, rdev); rdev 458 drivers/md/raid1.c if (!test_bit(Faulty, &rdev->flags)) rdev 489 drivers/md/raid1.c if (test_bit(In_sync, &rdev->flags) && rdev 490 drivers/md/raid1.c !test_bit(Faulty, &rdev->flags)) rdev 494 drivers/md/raid1.c if (is_badblock(rdev, r1_bio->sector, r1_bio->sectors, rdev 502 drivers/md/raid1.c if (test_bit(WBCollisionCheck, &rdev->flags)) { rdev 506 drivers/md/raid1.c remove_wb(rdev, lo, hi); rdev 508 drivers/md/raid1.c if (test_bit(WriteMostly, &rdev->flags)) rdev 532 drivers/md/raid1.c rdev_dec_pending(rdev, conf->mddev); rdev 587 drivers/md/raid1.c struct md_rdev *rdev; rdev 624 drivers/md/raid1.c rdev = rcu_dereference(conf->mirrors[disk].rdev); rdev 626 drivers/md/raid1.c || rdev == NULL rdev 627 drivers/md/raid1.c || test_bit(Faulty, &rdev->flags)) rdev 629 drivers/md/raid1.c if (!test_bit(In_sync, &rdev->flags) && rdev 630 drivers/md/raid1.c rdev->recovery_offset < this_sector + sectors) rdev 632 drivers/md/raid1.c if (test_bit(WriteMostly, &rdev->flags)) { rdev 636 drivers/md/raid1.c if (is_badblock(rdev, this_sector, sectors, rdev 652 drivers/md/raid1.c if (is_badblock(rdev, this_sector, sectors, rdev 688 drivers/md/raid1.c nonrot = blk_queue_nonrot(bdev_get_queue(rdev->bdev)); rdev 690 drivers/md/raid1.c pending = atomic_read(&rdev->nr_pending); rdev 699 drivers/md/raid1.c int opt_iosize = bdev_io_opt(rdev->bdev) >> 9; rdev 755 drivers/md/raid1.c rdev = rcu_dereference(conf->mirrors[best_disk].rdev); rdev 756 drivers/md/raid1.c if (!rdev) rdev 758 drivers/md/raid1.c atomic_inc(&rdev->nr_pending); rdev 783 drivers/md/raid1.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 784 drivers/md/raid1.c if (rdev && !test_bit(Faulty, &rdev->flags)) { rdev 785 drivers/md/raid1.c struct request_queue *q = bdev_get_queue(rdev->bdev); rdev 810 drivers/md/raid1.c struct md_rdev *rdev = (void *)bio->bi_disk; rdev 812 drivers/md/raid1.c bio_set_dev(bio, rdev->bdev); rdev 813 drivers/md/raid1.c if (test_bit(Faulty, &rdev->flags)) { rdev 1235 drivers/md/raid1.c struct md_rdev *rdev; rdev 1237 drivers/md/raid1.c rdev = rcu_dereference(conf->mirrors[r1_bio->read_disk].rdev); rdev 1238 drivers/md/raid1.c if (rdev) rdev 1239 drivers/md/raid1.c bdevname(rdev->bdev, b); rdev 1280 drivers/md/raid1.c bdevname(mirror->rdev->bdev, b)); rdev 1282 drivers/md/raid1.c if (test_bit(WriteMostly, &mirror->rdev->flags) && rdev 1310 drivers/md/raid1.c mirror->rdev->data_offset; rdev 1311 drivers/md/raid1.c bio_set_dev(read_bio, mirror->rdev->bdev); rdev 1314 drivers/md/raid1.c if (test_bit(FailFast, &mirror->rdev->flags) && rdev 1390 drivers/md/raid1.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 1391 drivers/md/raid1.c if (rdev && unlikely(test_bit(Blocked, &rdev->flags))) { rdev 1392 drivers/md/raid1.c atomic_inc(&rdev->nr_pending); rdev 1393 drivers/md/raid1.c blocked_rdev = rdev; rdev 1397 drivers/md/raid1.c if (!rdev || test_bit(Faulty, &rdev->flags)) { rdev 1403 drivers/md/raid1.c atomic_inc(&rdev->nr_pending); rdev 1404 drivers/md/raid1.c if (test_bit(WriteErrorSeen, &rdev->flags)) { rdev 1409 drivers/md/raid1.c is_bad = is_badblock(rdev, r1_bio->sector, max_sectors, rdev 1414 drivers/md/raid1.c set_bit(BlockedBadBlocks, &rdev->flags); rdev 1415 drivers/md/raid1.c blocked_rdev = rdev; rdev 1426 drivers/md/raid1.c rdev_dec_pending(rdev, mddev); rdev 1455 drivers/md/raid1.c rdev_dec_pending(conf->mirrors[j].rdev, mddev); rdev 1508 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[i].rdev; rdev 1510 drivers/md/raid1.c if (test_bit(WBCollisionCheck, &rdev->flags)) { rdev 1514 drivers/md/raid1.c wait_event(rdev->wb_io_wait, rdev 1515 drivers/md/raid1.c check_and_add_wb(rdev, lo, hi) == 0); rdev 1517 drivers/md/raid1.c if (test_bit(WriteMostly, &rdev->flags)) rdev 1524 drivers/md/raid1.c conf->mirrors[i].rdev->data_offset); rdev 1525 drivers/md/raid1.c bio_set_dev(mbio, conf->mirrors[i].rdev->bdev); rdev 1528 drivers/md/raid1.c if (test_bit(FailFast, &conf->mirrors[i].rdev->flags) && rdev 1529 drivers/md/raid1.c !test_bit(WriteMostly, &conf->mirrors[i].rdev->flags) && rdev 1541 drivers/md/raid1.c mbio->bi_disk = (void *)conf->mirrors[i].rdev; rdev 1603 drivers/md/raid1.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 1605 drivers/md/raid1.c rdev && test_bit(In_sync, &rdev->flags) ? "U" : "_"); rdev 1611 drivers/md/raid1.c static void raid1_error(struct mddev *mddev, struct md_rdev *rdev) rdev 1624 drivers/md/raid1.c if (test_bit(In_sync, &rdev->flags) && !mddev->fail_last_dev rdev 1636 drivers/md/raid1.c set_bit(Blocked, &rdev->flags); rdev 1637 drivers/md/raid1.c if (test_and_clear_bit(In_sync, &rdev->flags)) rdev 1639 drivers/md/raid1.c set_bit(Faulty, &rdev->flags); rdev 1649 drivers/md/raid1.c mdname(mddev), bdevname(rdev->bdev, b), rdev 1668 drivers/md/raid1.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 1669 drivers/md/raid1.c if (rdev) rdev 1671 drivers/md/raid1.c i, !test_bit(In_sync, &rdev->flags), rdev 1672 drivers/md/raid1.c !test_bit(Faulty, &rdev->flags), rdev 1673 drivers/md/raid1.c bdevname(rdev->bdev,b)); rdev 1706 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[i].rdev; rdev 1707 drivers/md/raid1.c struct md_rdev *repl = conf->mirrors[conf->raid_disks + i].rdev; rdev 1714 drivers/md/raid1.c if (!rdev || rdev 1715 drivers/md/raid1.c !test_and_clear_bit(In_sync, &rdev->flags)) rdev 1717 drivers/md/raid1.c if (rdev) { rdev 1722 drivers/md/raid1.c set_bit(Faulty, &rdev->flags); rdev 1724 drivers/md/raid1.c rdev->sysfs_state); rdev 1727 drivers/md/raid1.c if (rdev rdev 1728 drivers/md/raid1.c && rdev->recovery_offset == MaxSector rdev 1729 drivers/md/raid1.c && !test_bit(Faulty, &rdev->flags) rdev 1730 drivers/md/raid1.c && !test_and_set_bit(In_sync, &rdev->flags)) { rdev 1732 drivers/md/raid1.c sysfs_notify_dirent_safe(rdev->sysfs_state); rdev 1742 drivers/md/raid1.c static int raid1_add_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 1754 drivers/md/raid1.c if (md_integrity_add_rdev(rdev, mddev)) rdev 1757 drivers/md/raid1.c if (rdev->raid_disk >= 0) rdev 1758 drivers/md/raid1.c first = last = rdev->raid_disk; rdev 1764 drivers/md/raid1.c if (rdev->saved_raid_disk >= 0 && rdev 1765 drivers/md/raid1.c rdev->saved_raid_disk >= first && rdev 1766 drivers/md/raid1.c rdev->saved_raid_disk < conf->raid_disks && rdev 1767 drivers/md/raid1.c conf->mirrors[rdev->saved_raid_disk].rdev == NULL) rdev 1768 drivers/md/raid1.c first = last = rdev->saved_raid_disk; rdev 1772 drivers/md/raid1.c if (!p->rdev) { rdev 1774 drivers/md/raid1.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 1775 drivers/md/raid1.c rdev->data_offset << 9); rdev 1778 drivers/md/raid1.c rdev->raid_disk = mirror; rdev 1783 drivers/md/raid1.c if (rdev->saved_raid_disk < 0) rdev 1785 drivers/md/raid1.c rcu_assign_pointer(p->rdev, rdev); rdev 1788 drivers/md/raid1.c if (test_bit(WantReplacement, &p->rdev->flags) && rdev 1789 drivers/md/raid1.c p[conf->raid_disks].rdev == NULL) { rdev 1791 drivers/md/raid1.c clear_bit(In_sync, &rdev->flags); rdev 1792 drivers/md/raid1.c set_bit(Replacement, &rdev->flags); rdev 1793 drivers/md/raid1.c rdev->raid_disk = mirror; rdev 1796 drivers/md/raid1.c rcu_assign_pointer(p[conf->raid_disks].rdev, rdev); rdev 1800 drivers/md/raid1.c if (mddev->queue && blk_queue_discard(bdev_get_queue(rdev->bdev))) rdev 1806 drivers/md/raid1.c static int raid1_remove_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 1810 drivers/md/raid1.c int number = rdev->raid_disk; rdev 1813 drivers/md/raid1.c if (rdev != p->rdev) rdev 1817 drivers/md/raid1.c if (rdev == p->rdev) { rdev 1818 drivers/md/raid1.c if (test_bit(In_sync, &rdev->flags) || rdev 1819 drivers/md/raid1.c atomic_read(&rdev->nr_pending)) { rdev 1826 drivers/md/raid1.c if (!test_bit(Faulty, &rdev->flags) && rdev 1832 drivers/md/raid1.c p->rdev = NULL; rdev 1833 drivers/md/raid1.c if (!test_bit(RemoveSynchronized, &rdev->flags)) { rdev 1835 drivers/md/raid1.c if (atomic_read(&rdev->nr_pending)) { rdev 1838 drivers/md/raid1.c p->rdev = rdev; rdev 1842 drivers/md/raid1.c if (conf->mirrors[conf->raid_disks + number].rdev) { rdev 1848 drivers/md/raid1.c conf->mirrors[conf->raid_disks + number].rdev; rdev 1862 drivers/md/raid1.c p->rdev = repl; rdev 1863 drivers/md/raid1.c conf->mirrors[conf->raid_disks + number].rdev = NULL; rdev 1867 drivers/md/raid1.c clear_bit(WantReplacement, &rdev->flags); rdev 1932 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[find_bio_disk(r1_bio, bio)].rdev; rdev 1936 drivers/md/raid1.c set_bit(WriteErrorSeen, &rdev->flags); rdev 1937 drivers/md/raid1.c if (!test_and_set_bit(WantReplacement, &rdev->flags)) rdev 1941 drivers/md/raid1.c } else if (is_badblock(rdev, r1_bio->sector, r1_bio->sectors, rdev 1943 drivers/md/raid1.c !is_badblock(conf->mirrors[r1_bio->read_disk].rdev, rdev 1953 drivers/md/raid1.c static int r1_sync_page_io(struct md_rdev *rdev, sector_t sector, rdev 1956 drivers/md/raid1.c if (sync_page_io(rdev, sector, sectors << 9, page, rw, 0, false)) rdev 1960 drivers/md/raid1.c set_bit(WriteErrorSeen, &rdev->flags); rdev 1962 drivers/md/raid1.c &rdev->flags)) rdev 1964 drivers/md/raid1.c rdev->mddev->recovery); rdev 1967 drivers/md/raid1.c if (!rdev_set_badblocks(rdev, sector, sectors, 0)) rdev 1968 drivers/md/raid1.c md_error(rdev->mddev, rdev); rdev 1992 drivers/md/raid1.c struct md_rdev *rdev; rdev 1994 drivers/md/raid1.c rdev = conf->mirrors[r1_bio->read_disk].rdev; rdev 1995 drivers/md/raid1.c if (test_bit(FailFast, &rdev->flags)) { rdev 1998 drivers/md/raid1.c md_error(mddev, rdev); rdev 1999 drivers/md/raid1.c if (test_bit(Faulty, &rdev->flags)) rdev 2020 drivers/md/raid1.c rdev = conf->mirrors[d].rdev; rdev 2021 drivers/md/raid1.c if (sync_page_io(rdev, sect, s<<9, rdev 2045 drivers/md/raid1.c rdev = conf->mirrors[d].rdev; rdev 2046 drivers/md/raid1.c if (!rdev || test_bit(Faulty, &rdev->flags)) rdev 2048 drivers/md/raid1.c if (!rdev_set_badblocks(rdev, sect, s, 0)) rdev 2074 drivers/md/raid1.c rdev = conf->mirrors[d].rdev; rdev 2075 drivers/md/raid1.c if (r1_sync_page_io(rdev, sect, s, rdev 2079 drivers/md/raid1.c rdev_dec_pending(rdev, mddev); rdev 2089 drivers/md/raid1.c rdev = conf->mirrors[d].rdev; rdev 2090 drivers/md/raid1.c if (r1_sync_page_io(rdev, sect, s, rdev 2093 drivers/md/raid1.c atomic_add(s, &rdev->corrected_errors); rdev 2132 drivers/md/raid1.c conf->mirrors[i].rdev->data_offset; rdev 2133 drivers/md/raid1.c bio_set_dev(b, conf->mirrors[i].rdev->bdev); rdev 2145 drivers/md/raid1.c rdev_dec_pending(conf->mirrors[primary].rdev, mddev); rdev 2183 drivers/md/raid1.c rdev_dec_pending(conf->mirrors[i].rdev, mddev); rdev 2217 drivers/md/raid1.c if (test_bit(Faulty, &conf->mirrors[i].rdev->flags)) { rdev 2223 drivers/md/raid1.c if (test_bit(FailFast, &conf->mirrors[i].rdev->flags)) rdev 2228 drivers/md/raid1.c md_sync_acct(conf->mirrors[i].rdev->bdev, bio_sectors(wbio)); rdev 2253 drivers/md/raid1.c struct md_rdev *rdev; rdev 2263 drivers/md/raid1.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 2264 drivers/md/raid1.c if (rdev && rdev 2265 drivers/md/raid1.c (test_bit(In_sync, &rdev->flags) || rdev 2266 drivers/md/raid1.c (!test_bit(Faulty, &rdev->flags) && rdev 2267 drivers/md/raid1.c rdev->recovery_offset >= sect + s)) && rdev 2268 drivers/md/raid1.c is_badblock(rdev, sect, s, rdev 2270 drivers/md/raid1.c atomic_inc(&rdev->nr_pending); rdev 2272 drivers/md/raid1.c if (sync_page_io(rdev, sect, s<<9, rdev 2275 drivers/md/raid1.c rdev_dec_pending(rdev, mddev); rdev 2287 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[read_disk].rdev; rdev 2288 drivers/md/raid1.c if (!rdev_set_badblocks(rdev, sect, s, 0)) rdev 2289 drivers/md/raid1.c md_error(mddev, rdev); rdev 2299 drivers/md/raid1.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 2300 drivers/md/raid1.c if (rdev && rdev 2301 drivers/md/raid1.c !test_bit(Faulty, &rdev->flags)) { rdev 2302 drivers/md/raid1.c atomic_inc(&rdev->nr_pending); rdev 2304 drivers/md/raid1.c r1_sync_page_io(rdev, sect, s, rdev 2306 drivers/md/raid1.c rdev_dec_pending(rdev, mddev); rdev 2317 drivers/md/raid1.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 2318 drivers/md/raid1.c if (rdev && rdev 2319 drivers/md/raid1.c !test_bit(Faulty, &rdev->flags)) { rdev 2320 drivers/md/raid1.c atomic_inc(&rdev->nr_pending); rdev 2322 drivers/md/raid1.c if (r1_sync_page_io(rdev, sect, s, rdev 2324 drivers/md/raid1.c atomic_add(s, &rdev->corrected_errors); rdev 2328 drivers/md/raid1.c rdev->data_offset), rdev 2329 drivers/md/raid1.c bdevname(rdev->bdev, b)); rdev 2331 drivers/md/raid1.c rdev_dec_pending(rdev, mddev); rdev 2344 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[i].rdev; rdev 2363 drivers/md/raid1.c if (rdev->badblocks.shift < 0) rdev 2366 drivers/md/raid1.c block_sectors = roundup(1 << rdev->badblocks.shift, rdev 2367 drivers/md/raid1.c bdev_logical_block_size(rdev->bdev) >> 9); rdev 2393 drivers/md/raid1.c wbio->bi_iter.bi_sector += rdev->data_offset; rdev 2394 drivers/md/raid1.c bio_set_dev(wbio, rdev->bdev); rdev 2398 drivers/md/raid1.c ok = rdev_set_badblocks(rdev, sector, rdev 2415 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[m].rdev; rdev 2421 drivers/md/raid1.c rdev_clear_badblocks(rdev, r1_bio->sector, s, 0); rdev 2425 drivers/md/raid1.c if (!rdev_set_badblocks(rdev, r1_bio->sector, s, 0)) rdev 2426 drivers/md/raid1.c md_error(conf->mddev, rdev); rdev 2440 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[m].rdev; rdev 2441 drivers/md/raid1.c rdev_clear_badblocks(rdev, rdev 2444 drivers/md/raid1.c rdev_dec_pending(rdev, conf->mddev); rdev 2453 drivers/md/raid1.c conf->mirrors[m].rdev); rdev 2457 drivers/md/raid1.c rdev_dec_pending(conf->mirrors[m].rdev, rdev 2483 drivers/md/raid1.c struct md_rdev *rdev; rdev 2499 drivers/md/raid1.c rdev = conf->mirrors[r1_bio->read_disk].rdev; rdev 2501 drivers/md/raid1.c && !test_bit(FailFast, &rdev->flags)) { rdev 2506 drivers/md/raid1.c } else if (mddev->ro == 0 && test_bit(FailFast, &rdev->flags)) { rdev 2507 drivers/md/raid1.c md_error(mddev, rdev); rdev 2512 drivers/md/raid1.c rdev_dec_pending(rdev, conf->mddev); rdev 2731 drivers/md/raid1.c struct md_rdev *rdev; rdev 2734 drivers/md/raid1.c rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 2735 drivers/md/raid1.c if (rdev == NULL || rdev 2736 drivers/md/raid1.c test_bit(Faulty, &rdev->flags)) { rdev 2739 drivers/md/raid1.c } else if (!test_bit(In_sync, &rdev->flags)) { rdev 2748 drivers/md/raid1.c if (is_badblock(rdev, sector_nr, good_sectors, rdev 2760 drivers/md/raid1.c if (test_bit(WriteMostly, &rdev->flags)) { rdev 2770 drivers/md/raid1.c } else if (!test_bit(WriteErrorSeen, &rdev->flags) && rdev 2784 drivers/md/raid1.c if (rdev && bio->bi_end_io) { rdev 2785 drivers/md/raid1.c atomic_inc(&rdev->nr_pending); rdev 2786 drivers/md/raid1.c bio->bi_iter.bi_sector = sector_nr + rdev->data_offset; rdev 2787 drivers/md/raid1.c bio_set_dev(bio, rdev->bdev); rdev 2788 drivers/md/raid1.c if (test_bit(FailFast, &rdev->flags)) rdev 2804 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[i].rdev; rdev 2805 drivers/md/raid1.c ok = rdev_set_badblocks(rdev, sector_nr, rdev 2943 drivers/md/raid1.c struct md_rdev *rdev; rdev 2997 drivers/md/raid1.c rdev_for_each(rdev, mddev) { rdev 2998 drivers/md/raid1.c int disk_idx = rdev->raid_disk; rdev 3002 drivers/md/raid1.c if (test_bit(Replacement, &rdev->flags)) rdev 3007 drivers/md/raid1.c if (disk->rdev) rdev 3009 drivers/md/raid1.c disk->rdev = rdev; rdev 3031 drivers/md/raid1.c disk[conf->raid_disks].rdev) { rdev 3033 drivers/md/raid1.c if (!disk->rdev) { rdev 3037 drivers/md/raid1.c disk->rdev = rdev 3038 drivers/md/raid1.c disk[conf->raid_disks].rdev; rdev 3039 drivers/md/raid1.c disk[conf->raid_disks].rdev = NULL; rdev 3040 drivers/md/raid1.c } else if (!test_bit(In_sync, &disk->rdev->flags)) rdev 3045 drivers/md/raid1.c if (!disk->rdev || rdev 3046 drivers/md/raid1.c !test_bit(In_sync, &disk->rdev->flags)) { rdev 3048 drivers/md/raid1.c if (disk->rdev && rdev 3049 drivers/md/raid1.c (disk->rdev->saved_raid_disk < 0)) rdev 3082 drivers/md/raid1.c struct md_rdev *rdev; rdev 3116 drivers/md/raid1.c rdev_for_each(rdev, mddev) { rdev 3119 drivers/md/raid1.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 3120 drivers/md/raid1.c rdev->data_offset << 9); rdev 3121 drivers/md/raid1.c if (blk_queue_discard(bdev_get_queue(rdev->bdev))) rdev 3127 drivers/md/raid1.c if (conf->mirrors[i].rdev == NULL || rdev 3128 drivers/md/raid1.c !test_bit(In_sync, &conf->mirrors[i].rdev->flags) || rdev 3129 drivers/md/raid1.c test_bit(Faulty, &conf->mirrors[i].rdev->flags)) rdev 3268 drivers/md/raid1.c if (conf->mirrors[d].rdev) rdev 3302 drivers/md/raid1.c struct md_rdev *rdev = conf->mirrors[d].rdev; rdev 3303 drivers/md/raid1.c if (rdev && rdev->raid_disk != d2) { rdev 3304 drivers/md/raid1.c sysfs_unlink_rdev(mddev, rdev); rdev 3305 drivers/md/raid1.c rdev->raid_disk = d2; rdev 3306 drivers/md/raid1.c sysfs_unlink_rdev(mddev, rdev); rdev 3307 drivers/md/raid1.c if (sysfs_link_rdev(mddev, rdev)) rdev 3309 drivers/md/raid1.c mdname(mddev), rdev->raid_disk); rdev 3311 drivers/md/raid1.c if (rdev) rdev 3312 drivers/md/raid1.c newmirrors[d2++].rdev = rdev; rdev 42 drivers/md/raid1.h struct md_rdev *rdev; rdev 354 drivers/md/raid10.c struct md_rdev *rdev; rdev 358 drivers/md/raid10.c rdev = r10_bio->devs[slot].rdev; rdev 382 drivers/md/raid10.c rdev->raid_disk)) rdev 387 drivers/md/raid10.c rdev_dec_pending(rdev, conf->mddev); rdev 395 drivers/md/raid10.c bdevname(rdev->bdev, b), rdev 434 drivers/md/raid10.c struct md_rdev *rdev = NULL; rdev 443 drivers/md/raid10.c rdev = conf->mirrors[dev].replacement; rdev 444 drivers/md/raid10.c if (!rdev) { rdev 447 drivers/md/raid10.c rdev = conf->mirrors[dev].rdev; rdev 457 drivers/md/raid10.c md_error(rdev->mddev, rdev); rdev 459 drivers/md/raid10.c set_bit(WriteErrorSeen, &rdev->flags); rdev 460 drivers/md/raid10.c if (!test_and_set_bit(WantReplacement, &rdev->flags)) rdev 462 drivers/md/raid10.c &rdev->mddev->recovery); rdev 465 drivers/md/raid10.c if (test_bit(FailFast, &rdev->flags) && rdev 467 drivers/md/raid10.c md_error(rdev->mddev, rdev); rdev 476 drivers/md/raid10.c if (!test_bit(Faulty, &rdev->flags)) rdev 505 drivers/md/raid10.c if (test_bit(In_sync, &rdev->flags) && rdev 506 drivers/md/raid10.c !test_bit(Faulty, &rdev->flags)) rdev 510 drivers/md/raid10.c if (is_badblock(rdev, rdev 531 drivers/md/raid10.c rdev_dec_pending(rdev, conf->mddev); rdev 712 drivers/md/raid10.c struct md_rdev *best_dist_rdev, *best_pending_rdev, *rdev = NULL; rdev 752 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[disk].replacement); rdev 753 drivers/md/raid10.c if (rdev == NULL || test_bit(Faulty, &rdev->flags) || rdev 754 drivers/md/raid10.c r10_bio->devs[slot].addr + sectors > rdev->recovery_offset) rdev 755 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[disk].rdev); rdev 756 drivers/md/raid10.c if (rdev == NULL || rdev 757 drivers/md/raid10.c test_bit(Faulty, &rdev->flags)) rdev 759 drivers/md/raid10.c if (!test_bit(In_sync, &rdev->flags) && rdev 760 drivers/md/raid10.c r10_bio->devs[slot].addr + sectors > rdev->recovery_offset) rdev 764 drivers/md/raid10.c if (is_badblock(rdev, dev_sector, sectors, rdev 785 drivers/md/raid10.c best_dist_rdev = rdev; rdev 798 drivers/md/raid10.c nonrot = blk_queue_nonrot(bdev_get_queue(rdev->bdev)); rdev 800 drivers/md/raid10.c pending = atomic_read(&rdev->nr_pending); rdev 804 drivers/md/raid10.c best_pending_rdev = rdev; rdev 827 drivers/md/raid10.c best_dist_rdev = rdev; rdev 833 drivers/md/raid10.c rdev = best_pending_rdev; rdev 836 drivers/md/raid10.c rdev = best_dist_rdev; rdev 841 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 844 drivers/md/raid10.c rdev = NULL; rdev 848 drivers/md/raid10.c return rdev; rdev 865 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 866 drivers/md/raid10.c if (rdev && !test_bit(Faulty, &rdev->flags)) { rdev 867 drivers/md/raid10.c struct request_queue *q = bdev_get_queue(rdev->bdev); rdev 910 drivers/md/raid10.c struct md_rdev *rdev = (void*)bio->bi_disk; rdev 912 drivers/md/raid10.c bio_set_dev(bio, rdev->bdev); rdev 913 drivers/md/raid10.c if (test_bit(Faulty, &rdev->flags)) { rdev 1054 drivers/md/raid10.c struct md_rdev *rdev) rdev 1056 drivers/md/raid10.c if (!test_bit(MD_RECOVERY_RESHAPE, &rdev->mddev->recovery) || rdev 1058 drivers/md/raid10.c return rdev->data_offset; rdev 1060 drivers/md/raid10.c return rdev->new_data_offset; rdev 1095 drivers/md/raid10.c struct md_rdev *rdev = (void*)bio->bi_disk; rdev 1097 drivers/md/raid10.c bio_set_dev(bio, rdev->bdev); rdev 1098 drivers/md/raid10.c if (test_bit(Faulty, &rdev->flags)) { rdev 1142 drivers/md/raid10.c struct md_rdev *rdev; rdev 1148 drivers/md/raid10.c if (r10_bio->devs[slot].rdev) { rdev 1165 drivers/md/raid10.c err_rdev = rcu_dereference(conf->mirrors[disk].rdev); rdev 1171 drivers/md/raid10.c err_rdev = r10_bio->devs[slot].rdev; rdev 1177 drivers/md/raid10.c rdev = read_balance(conf, r10_bio, &max_sectors); rdev 1178 drivers/md/raid10.c if (!rdev) { rdev 1190 drivers/md/raid10.c bdevname(rdev->bdev, b), rdev 1208 drivers/md/raid10.c r10_bio->devs[slot].rdev = rdev; rdev 1211 drivers/md/raid10.c choose_data_offset(r10_bio, rdev); rdev 1212 drivers/md/raid10.c bio_set_dev(read_bio, rdev->bdev); rdev 1215 drivers/md/raid10.c if (test_bit(FailFast, &rdev->flags) && rdev 1239 drivers/md/raid10.c struct md_rdev *rdev; rdev 1244 drivers/md/raid10.c rdev = conf->mirrors[devnum].replacement; rdev 1245 drivers/md/raid10.c if (rdev == NULL) { rdev 1248 drivers/md/raid10.c rdev = conf->mirrors[devnum].rdev; rdev 1251 drivers/md/raid10.c rdev = conf->mirrors[devnum].rdev; rdev 1260 drivers/md/raid10.c choose_data_offset(r10_bio, rdev)); rdev 1261 drivers/md/raid10.c bio_set_dev(mbio, rdev->bdev); rdev 1265 drivers/md/raid10.c &conf->mirrors[devnum].rdev->flags) rdev 1275 drivers/md/raid10.c mbio->bi_disk = (void *)rdev; rdev 1366 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 1369 drivers/md/raid10.c if (rdev == rrdev) rdev 1371 drivers/md/raid10.c if (rdev && unlikely(test_bit(Blocked, &rdev->flags))) { rdev 1372 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 1373 drivers/md/raid10.c blocked_rdev = rdev; rdev 1381 drivers/md/raid10.c if (rdev && (test_bit(Faulty, &rdev->flags))) rdev 1382 drivers/md/raid10.c rdev = NULL; rdev 1389 drivers/md/raid10.c if (!rdev && !rrdev) { rdev 1393 drivers/md/raid10.c if (rdev && test_bit(WriteErrorSeen, &rdev->flags)) { rdev 1399 drivers/md/raid10.c is_bad = is_badblock(rdev, dev_sector, max_sectors, rdev 1405 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 1406 drivers/md/raid10.c set_bit(BlockedBadBlocks, &rdev->flags); rdev 1407 drivers/md/raid10.c blocked_rdev = rdev; rdev 1434 drivers/md/raid10.c if (rdev) { rdev 1436 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 1453 drivers/md/raid10.c rdev_dec_pending(conf->mirrors[d].rdev, mddev); rdev 1456 drivers/md/raid10.c struct md_rdev *rdev; rdev 1458 drivers/md/raid10.c rdev = conf->mirrors[d].replacement; rdev 1459 drivers/md/raid10.c if (!rdev) { rdev 1462 drivers/md/raid10.c rdev = conf->mirrors[d].rdev; rdev 1464 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 1575 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 1576 drivers/md/raid10.c seq_printf(seq, "%s", rdev && test_bit(In_sync, &rdev->flags) ? "U" : "_"); rdev 1606 drivers/md/raid10.c struct md_rdev *rdev; rdev 1608 drivers/md/raid10.c (rdev = rcu_dereference(conf->mirrors[this].rdev)) && rdev 1609 drivers/md/raid10.c test_bit(In_sync, &rdev->flags)) rdev 1634 drivers/md/raid10.c static void raid10_error(struct mddev *mddev, struct md_rdev *rdev) rdev 1647 drivers/md/raid10.c if (test_bit(In_sync, &rdev->flags) && !mddev->fail_last_dev rdev 1648 drivers/md/raid10.c && !enough(conf, rdev->raid_disk)) { rdev 1655 drivers/md/raid10.c if (test_and_clear_bit(In_sync, &rdev->flags)) rdev 1661 drivers/md/raid10.c set_bit(Blocked, &rdev->flags); rdev 1662 drivers/md/raid10.c set_bit(Faulty, &rdev->flags); rdev 1668 drivers/md/raid10.c mdname(mddev), bdevname(rdev->bdev, b), rdev 1675 drivers/md/raid10.c struct md_rdev *rdev; rdev 1689 drivers/md/raid10.c rdev = conf->mirrors[i].rdev; rdev 1690 drivers/md/raid10.c if (rdev) rdev 1692 drivers/md/raid10.c i, !test_bit(In_sync, &rdev->flags), rdev 1693 drivers/md/raid10.c !test_bit(Faulty, &rdev->flags), rdev 1694 drivers/md/raid10.c bdevname(rdev->bdev,b)); rdev 1725 drivers/md/raid10.c if (!tmp->rdev rdev 1726 drivers/md/raid10.c || !test_and_clear_bit(In_sync, &tmp->rdev->flags)) rdev 1728 drivers/md/raid10.c if (tmp->rdev) { rdev 1733 drivers/md/raid10.c set_bit(Faulty, &tmp->rdev->flags); rdev 1735 drivers/md/raid10.c tmp->rdev->sysfs_state); rdev 1738 drivers/md/raid10.c } else if (tmp->rdev rdev 1739 drivers/md/raid10.c && tmp->rdev->recovery_offset == MaxSector rdev 1740 drivers/md/raid10.c && !test_bit(Faulty, &tmp->rdev->flags) rdev 1741 drivers/md/raid10.c && !test_and_set_bit(In_sync, &tmp->rdev->flags)) { rdev 1743 drivers/md/raid10.c sysfs_notify_dirent_safe(tmp->rdev->sysfs_state); rdev 1754 drivers/md/raid10.c static int raid10_add_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 1767 drivers/md/raid10.c if (rdev->saved_raid_disk < 0 && !_enough(conf, 1, -1)) rdev 1770 drivers/md/raid10.c if (md_integrity_add_rdev(rdev, mddev)) rdev 1773 drivers/md/raid10.c if (rdev->raid_disk >= 0) rdev 1774 drivers/md/raid10.c first = last = rdev->raid_disk; rdev 1776 drivers/md/raid10.c if (rdev->saved_raid_disk >= first && rdev 1777 drivers/md/raid10.c rdev->saved_raid_disk < conf->geo.raid_disks && rdev 1778 drivers/md/raid10.c conf->mirrors[rdev->saved_raid_disk].rdev == NULL) rdev 1779 drivers/md/raid10.c mirror = rdev->saved_raid_disk; rdev 1786 drivers/md/raid10.c if (p->rdev) { rdev 1787 drivers/md/raid10.c if (!test_bit(WantReplacement, &p->rdev->flags) || rdev 1790 drivers/md/raid10.c clear_bit(In_sync, &rdev->flags); rdev 1791 drivers/md/raid10.c set_bit(Replacement, &rdev->flags); rdev 1792 drivers/md/raid10.c rdev->raid_disk = mirror; rdev 1795 drivers/md/raid10.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 1796 drivers/md/raid10.c rdev->data_offset << 9); rdev 1798 drivers/md/raid10.c rcu_assign_pointer(p->replacement, rdev); rdev 1803 drivers/md/raid10.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 1804 drivers/md/raid10.c rdev->data_offset << 9); rdev 1808 drivers/md/raid10.c rdev->raid_disk = mirror; rdev 1810 drivers/md/raid10.c if (rdev->saved_raid_disk != mirror) rdev 1812 drivers/md/raid10.c rcu_assign_pointer(p->rdev, rdev); rdev 1815 drivers/md/raid10.c if (mddev->queue && blk_queue_discard(bdev_get_queue(rdev->bdev))) rdev 1822 drivers/md/raid10.c static int raid10_remove_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 1826 drivers/md/raid10.c int number = rdev->raid_disk; rdev 1831 drivers/md/raid10.c if (rdev == p->rdev) rdev 1832 drivers/md/raid10.c rdevp = &p->rdev; rdev 1833 drivers/md/raid10.c else if (rdev == p->replacement) rdev 1838 drivers/md/raid10.c if (test_bit(In_sync, &rdev->flags) || rdev 1839 drivers/md/raid10.c atomic_read(&rdev->nr_pending)) { rdev 1846 drivers/md/raid10.c if (!test_bit(Faulty, &rdev->flags) && rdev 1848 drivers/md/raid10.c (!p->replacement || p->replacement == rdev) && rdev 1855 drivers/md/raid10.c if (!test_bit(RemoveSynchronized, &rdev->flags)) { rdev 1857 drivers/md/raid10.c if (atomic_read(&rdev->nr_pending)) { rdev 1860 drivers/md/raid10.c *rdevp = rdev; rdev 1866 drivers/md/raid10.c p->rdev = p->replacement; rdev 1874 drivers/md/raid10.c clear_bit(WantReplacement, &rdev->flags); rdev 1894 drivers/md/raid10.c &conf->mirrors[d].rdev->corrected_errors); rdev 1899 drivers/md/raid10.c rdev_dec_pending(conf->mirrors[d].rdev, conf->mddev); rdev 1963 drivers/md/raid10.c struct md_rdev *rdev = NULL; rdev 1967 drivers/md/raid10.c rdev = conf->mirrors[d].replacement; rdev 1969 drivers/md/raid10.c rdev = conf->mirrors[d].rdev; rdev 1973 drivers/md/raid10.c md_error(mddev, rdev); rdev 1975 drivers/md/raid10.c set_bit(WriteErrorSeen, &rdev->flags); rdev 1976 drivers/md/raid10.c if (!test_and_set_bit(WantReplacement, &rdev->flags)) rdev 1978 drivers/md/raid10.c &rdev->mddev->recovery); rdev 1981 drivers/md/raid10.c } else if (is_badblock(rdev, rdev 1987 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 2036 drivers/md/raid10.c struct md_rdev *rdev; rdev 2048 drivers/md/raid10.c rdev = conf->mirrors[d].rdev; rdev 2071 drivers/md/raid10.c } else if (test_bit(FailFast, &rdev->flags)) { rdev 2073 drivers/md/raid10.c md_error(rdev->mddev, rdev); rdev 2094 drivers/md/raid10.c atomic_inc(&conf->mirrors[d].rdev->nr_pending); rdev 2096 drivers/md/raid10.c md_sync_acct(conf->mirrors[d].rdev->bdev, bio_sectors(tbio)); rdev 2098 drivers/md/raid10.c if (test_bit(FailFast, &conf->mirrors[d].rdev->flags)) rdev 2100 drivers/md/raid10.c tbio->bi_iter.bi_sector += conf->mirrors[d].rdev->data_offset; rdev 2101 drivers/md/raid10.c bio_set_dev(tbio, conf->mirrors[d].rdev->bdev); rdev 2162 drivers/md/raid10.c struct md_rdev *rdev; rdev 2169 drivers/md/raid10.c rdev = conf->mirrors[dr].rdev; rdev 2171 drivers/md/raid10.c ok = sync_page_io(rdev, rdev 2177 drivers/md/raid10.c rdev = conf->mirrors[dw].rdev; rdev 2179 drivers/md/raid10.c ok = sync_page_io(rdev, rdev 2185 drivers/md/raid10.c set_bit(WriteErrorSeen, &rdev->flags); rdev 2187 drivers/md/raid10.c &rdev->flags)) rdev 2189 drivers/md/raid10.c &rdev->mddev->recovery); rdev 2197 drivers/md/raid10.c rdev_set_badblocks(rdev, addr, s, 0); rdev 2199 drivers/md/raid10.c if (rdev != conf->mirrors[dw].rdev) { rdev 2201 drivers/md/raid10.c struct md_rdev *rdev2 = conf->mirrors[dw].rdev; rdev 2250 drivers/md/raid10.c atomic_inc(&conf->mirrors[d].rdev->nr_pending); rdev 2251 drivers/md/raid10.c md_sync_acct(conf->mirrors[d].rdev->bdev, bio_sectors(wbio)); rdev 2268 drivers/md/raid10.c static void check_decay_read_errors(struct mddev *mddev, struct md_rdev *rdev) rdev 2272 drivers/md/raid10.c unsigned int read_errors = atomic_read(&rdev->read_errors); rdev 2276 drivers/md/raid10.c if (rdev->last_read_error == 0) { rdev 2278 drivers/md/raid10.c rdev->last_read_error = cur_time_mon; rdev 2283 drivers/md/raid10.c rdev->last_read_error) / 3600; rdev 2285 drivers/md/raid10.c rdev->last_read_error = cur_time_mon; rdev 2293 drivers/md/raid10.c atomic_set(&rdev->read_errors, 0); rdev 2295 drivers/md/raid10.c atomic_set(&rdev->read_errors, read_errors >> hours_since_last); rdev 2298 drivers/md/raid10.c static int r10_sync_page_io(struct md_rdev *rdev, sector_t sector, rdev 2304 drivers/md/raid10.c if (is_badblock(rdev, sector, sectors, &first_bad, &bad_sectors) rdev 2305 drivers/md/raid10.c && (rw == READ || test_bit(WriteErrorSeen, &rdev->flags))) rdev 2307 drivers/md/raid10.c if (sync_page_io(rdev, sector, sectors << 9, page, rw, 0, false)) rdev 2311 drivers/md/raid10.c set_bit(WriteErrorSeen, &rdev->flags); rdev 2312 drivers/md/raid10.c if (!test_and_set_bit(WantReplacement, &rdev->flags)) rdev 2314 drivers/md/raid10.c &rdev->mddev->recovery); rdev 2317 drivers/md/raid10.c if (!rdev_set_badblocks(rdev, sector, sectors, 0)) rdev 2318 drivers/md/raid10.c md_error(rdev->mddev, rdev); rdev 2334 drivers/md/raid10.c struct md_rdev *rdev; rdev 2341 drivers/md/raid10.c rdev = conf->mirrors[d].rdev; rdev 2343 drivers/md/raid10.c if (test_bit(Faulty, &rdev->flags)) rdev 2348 drivers/md/raid10.c check_decay_read_errors(mddev, rdev); rdev 2349 drivers/md/raid10.c atomic_inc(&rdev->read_errors); rdev 2350 drivers/md/raid10.c if (atomic_read(&rdev->read_errors) > max_read_errors) { rdev 2352 drivers/md/raid10.c bdevname(rdev->bdev, b); rdev 2356 drivers/md/raid10.c atomic_read(&rdev->read_errors), max_read_errors); rdev 2359 drivers/md/raid10.c md_error(mddev, rdev); rdev 2379 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 2380 drivers/md/raid10.c if (rdev && rdev 2381 drivers/md/raid10.c test_bit(In_sync, &rdev->flags) && rdev 2382 drivers/md/raid10.c !test_bit(Faulty, &rdev->flags) && rdev 2383 drivers/md/raid10.c is_badblock(rdev, r10_bio->devs[sl].addr + sect, s, rdev 2385 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 2387 drivers/md/raid10.c success = sync_page_io(rdev, rdev 2393 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 2410 drivers/md/raid10.c rdev = conf->mirrors[dn].rdev; rdev 2413 drivers/md/raid10.c rdev, rdev 2417 drivers/md/raid10.c md_error(mddev, rdev); rdev 2434 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 2435 drivers/md/raid10.c if (!rdev || rdev 2436 drivers/md/raid10.c test_bit(Faulty, &rdev->flags) || rdev 2437 drivers/md/raid10.c !test_bit(In_sync, &rdev->flags)) rdev 2440 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 2442 drivers/md/raid10.c if (r10_sync_page_io(rdev, rdev 2453 drivers/md/raid10.c rdev)), rdev 2454 drivers/md/raid10.c bdevname(rdev->bdev, b)); rdev 2457 drivers/md/raid10.c bdevname(rdev->bdev, b)); rdev 2459 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 2470 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 2471 drivers/md/raid10.c if (!rdev || rdev 2472 drivers/md/raid10.c test_bit(Faulty, &rdev->flags) || rdev 2473 drivers/md/raid10.c !test_bit(In_sync, &rdev->flags)) rdev 2476 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 2478 drivers/md/raid10.c switch (r10_sync_page_io(rdev, rdev 2489 drivers/md/raid10.c choose_data_offset(r10_bio, rdev)), rdev 2490 drivers/md/raid10.c bdevname(rdev->bdev, b)); rdev 2493 drivers/md/raid10.c bdevname(rdev->bdev, b)); rdev 2500 drivers/md/raid10.c choose_data_offset(r10_bio, rdev)), rdev 2501 drivers/md/raid10.c bdevname(rdev->bdev, b)); rdev 2502 drivers/md/raid10.c atomic_add(s, &rdev->corrected_errors); rdev 2505 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 2520 drivers/md/raid10.c struct md_rdev *rdev = conf->mirrors[r10_bio->devs[i].devnum].rdev; rdev 2538 drivers/md/raid10.c if (rdev->badblocks.shift < 0) rdev 2541 drivers/md/raid10.c block_sectors = roundup(1 << rdev->badblocks.shift, rdev 2542 drivers/md/raid10.c bdev_logical_block_size(rdev->bdev) >> 9); rdev 2558 drivers/md/raid10.c choose_data_offset(r10_bio, rdev); rdev 2559 drivers/md/raid10.c bio_set_dev(wbio, rdev->bdev); rdev 2564 drivers/md/raid10.c ok = rdev_set_badblocks(rdev, wsector, rdev 2581 drivers/md/raid10.c struct md_rdev *rdev = r10_bio->devs[slot].rdev; rdev 2597 drivers/md/raid10.c else if (!test_bit(FailFast, &rdev->flags)) { rdev 2602 drivers/md/raid10.c md_error(mddev, rdev); rdev 2604 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 2619 drivers/md/raid10.c struct md_rdev *rdev; rdev 2625 drivers/md/raid10.c rdev = conf->mirrors[dev].rdev; rdev 2631 drivers/md/raid10.c rdev, rdev 2636 drivers/md/raid10.c rdev, rdev 2639 drivers/md/raid10.c md_error(conf->mddev, rdev); rdev 2641 drivers/md/raid10.c rdev = conf->mirrors[dev].replacement; rdev 2648 drivers/md/raid10.c rdev, rdev 2653 drivers/md/raid10.c rdev, rdev 2656 drivers/md/raid10.c md_error(conf->mddev, rdev); rdev 2665 drivers/md/raid10.c rdev = conf->mirrors[dev].rdev; rdev 2668 drivers/md/raid10.c rdev, rdev 2671 drivers/md/raid10.c rdev_dec_pending(rdev, conf->mddev); rdev 2675 drivers/md/raid10.c md_error(conf->mddev, rdev); rdev 2679 drivers/md/raid10.c rdev_dec_pending(rdev, conf->mddev); rdev 2682 drivers/md/raid10.c rdev = conf->mirrors[dev].replacement; rdev 2683 drivers/md/raid10.c if (rdev && bio == IO_MADE_GOOD) { rdev 2685 drivers/md/raid10.c rdev, rdev 2688 drivers/md/raid10.c rdev_dec_pending(rdev, conf->mddev); rdev 2979 drivers/md/raid10.c struct md_rdev *rdev = rdev 2981 drivers/md/raid10.c if (rdev) rdev 2982 drivers/md/raid10.c rdev->recovery_offset = MaxSector; rdev 3055 drivers/md/raid10.c mrdev = rcu_dereference(mirror->rdev); rdev 3126 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference( rdev 3127 drivers/md/raid10.c conf->mirrors[j].rdev); rdev 3128 drivers/md/raid10.c if (rdev == NULL || test_bit(Faulty, &rdev->flags)) { rdev 3142 drivers/md/raid10.c struct md_rdev *rdev = rdev 3143 drivers/md/raid10.c rcu_dereference(conf->mirrors[d].rdev); rdev 3146 drivers/md/raid10.c if (!rdev || rdev 3147 drivers/md/raid10.c !test_bit(In_sync, &rdev->flags)) rdev 3153 drivers/md/raid10.c if (is_badblock(rdev, sector, max_sync, rdev 3170 drivers/md/raid10.c if (test_bit(FailFast, &rdev->flags)) rdev 3174 drivers/md/raid10.c rdev->data_offset; rdev 3175 drivers/md/raid10.c bio_set_dev(bio, rdev->bdev); rdev 3176 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 3276 drivers/md/raid10.c if (conf->mirrors[d].rdev && rdev 3278 drivers/md/raid10.c &conf->mirrors[d].rdev->flags)) rdev 3338 drivers/md/raid10.c struct md_rdev *rdev; rdev 3346 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 3347 drivers/md/raid10.c if (rdev == NULL || test_bit(Faulty, &rdev->flags)) { rdev 3352 drivers/md/raid10.c if (is_badblock(rdev, sector, max_sync, rdev 3364 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 3370 drivers/md/raid10.c if (test_bit(FailFast, &rdev->flags)) rdev 3372 drivers/md/raid10.c bio->bi_iter.bi_sector = sector + rdev->data_offset; rdev 3373 drivers/md/raid10.c bio_set_dev(bio, rdev->bdev); rdev 3376 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].replacement); rdev 3377 drivers/md/raid10.c if (rdev == NULL || test_bit(Faulty, &rdev->flags)) { rdev 3381 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 3392 drivers/md/raid10.c if (test_bit(FailFast, &rdev->flags)) rdev 3394 drivers/md/raid10.c bio->bi_iter.bi_sector = sector + rdev->data_offset; rdev 3395 drivers/md/raid10.c bio_set_dev(bio, rdev->bdev); rdev 3404 drivers/md/raid10.c rdev_dec_pending(conf->mirrors[d].rdev, rdev 3728 drivers/md/raid10.c struct md_rdev *rdev; rdev 3776 drivers/md/raid10.c rdev_for_each(rdev, mddev) { rdev 3779 drivers/md/raid10.c disk_idx = rdev->raid_disk; rdev 3787 drivers/md/raid10.c if (test_bit(Replacement, &rdev->flags)) { rdev 3790 drivers/md/raid10.c disk->replacement = rdev; rdev 3792 drivers/md/raid10.c if (disk->rdev) rdev 3794 drivers/md/raid10.c disk->rdev = rdev; rdev 3796 drivers/md/raid10.c diff = (rdev->new_data_offset - rdev->data_offset); rdev 3805 drivers/md/raid10.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 3806 drivers/md/raid10.c rdev->data_offset << 9); rdev 3810 drivers/md/raid10.c if (blk_queue_discard(bdev_get_queue(rdev->bdev))) rdev 3848 drivers/md/raid10.c if (!disk->rdev && disk->replacement) { rdev 3850 drivers/md/raid10.c disk->rdev = disk->replacement; rdev 3852 drivers/md/raid10.c clear_bit(Replacement, &disk->rdev->flags); rdev 3855 drivers/md/raid10.c if (!disk->rdev || rdev 3856 drivers/md/raid10.c !test_bit(In_sync, &disk->rdev->flags)) { rdev 3859 drivers/md/raid10.c if (disk->rdev && rdev 3860 drivers/md/raid10.c disk->rdev->saved_raid_disk < 0) rdev 4012 drivers/md/raid10.c struct md_rdev *rdev; rdev 4035 drivers/md/raid10.c rdev_for_each(rdev, mddev) rdev 4036 drivers/md/raid10.c if (rdev->raid_disk >= 0) { rdev 4037 drivers/md/raid10.c rdev->new_raid_disk = rdev->raid_disk * 2; rdev 4038 drivers/md/raid10.c rdev->sectors = size; rdev 4140 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 4141 drivers/md/raid10.c if (!rdev || test_bit(Faulty, &rdev->flags)) rdev 4143 drivers/md/raid10.c else if (!test_bit(In_sync, &rdev->flags)) rdev 4156 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[i].rdev); rdev 4157 drivers/md/raid10.c if (!rdev || test_bit(Faulty, &rdev->flags)) rdev 4159 drivers/md/raid10.c else if (!test_bit(In_sync, &rdev->flags)) { rdev 4192 drivers/md/raid10.c struct md_rdev *rdev; rdev 4207 drivers/md/raid10.c rdev_for_each(rdev, mddev) { rdev 4208 drivers/md/raid10.c if (!test_bit(In_sync, &rdev->flags) rdev 4209 drivers/md/raid10.c && !test_bit(Faulty, &rdev->flags)) rdev 4211 drivers/md/raid10.c if (rdev->raid_disk >= 0) { rdev 4212 drivers/md/raid10.c long long diff = (rdev->new_data_offset rdev 4213 drivers/md/raid10.c - rdev->data_offset); rdev 4273 drivers/md/raid10.c rdev_for_each(rdev, mddev) { rdev 4274 drivers/md/raid10.c if (rdev->raid_disk > -1 && rdev 4275 drivers/md/raid10.c !test_bit(Faulty, &rdev->flags)) rdev 4276 drivers/md/raid10.c sb = page_address(rdev->sb_page); rdev 4300 drivers/md/raid10.c rdev_for_each(rdev, mddev) rdev 4301 drivers/md/raid10.c if (rdev->raid_disk < 0 && rdev 4302 drivers/md/raid10.c !test_bit(Faulty, &rdev->flags)) { rdev 4303 drivers/md/raid10.c if (raid10_add_disk(mddev, rdev) == 0) { rdev 4304 drivers/md/raid10.c if (rdev->raid_disk >= rdev 4306 drivers/md/raid10.c set_bit(In_sync, &rdev->flags); rdev 4308 drivers/md/raid10.c rdev->recovery_offset = 0; rdev 4310 drivers/md/raid10.c if (sysfs_link_rdev(mddev, rdev)) rdev 4313 drivers/md/raid10.c } else if (rdev->raid_disk >= conf->prev.raid_disks rdev 4314 drivers/md/raid10.c && !test_bit(Faulty, &rdev->flags)) { rdev 4316 drivers/md/raid10.c set_bit(In_sync, &rdev->flags); rdev 4352 drivers/md/raid10.c rdev_for_each(rdev, mddev) rdev 4353 drivers/md/raid10.c rdev->new_data_offset = rdev->data_offset; rdev 4439 drivers/md/raid10.c struct md_rdev *rdev; rdev 4547 drivers/md/raid10.c rdev = read_balance(conf, r10_bio, &max_sectors); rdev 4550 drivers/md/raid10.c if (!rdev) { rdev 4562 drivers/md/raid10.c bio_set_dev(read_bio, rdev->bdev); rdev 4564 drivers/md/raid10.c + rdev->data_offset); rdev 4585 drivers/md/raid10.c sb = page_address(rdev->sb_page); rdev 4616 drivers/md/raid10.c rdev2 = rcu_dereference(conf->mirrors[d].rdev); rdev 4702 drivers/md/raid10.c struct md_rdev *rdev; rdev 4705 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].replacement); rdev 4708 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 4711 drivers/md/raid10.c if (!rdev || test_bit(Faulty, &rdev->flags)) { rdev 4715 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 4798 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 4800 drivers/md/raid10.c if (rdev == NULL || rdev 4801 drivers/md/raid10.c test_bit(Faulty, &rdev->flags) || rdev 4802 drivers/md/raid10.c !test_bit(In_sync, &rdev->flags)) rdev 4806 drivers/md/raid10.c atomic_inc(&rdev->nr_pending); rdev 4808 drivers/md/raid10.c success = sync_page_io(rdev, rdev 4813 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 4847 drivers/md/raid10.c struct md_rdev *rdev = NULL; rdev 4851 drivers/md/raid10.c rdev = conf->mirrors[d].replacement; rdev 4852 drivers/md/raid10.c if (!rdev) { rdev 4854 drivers/md/raid10.c rdev = conf->mirrors[d].rdev; rdev 4859 drivers/md/raid10.c md_error(mddev, rdev); rdev 4862 drivers/md/raid10.c rdev_dec_pending(rdev, mddev); rdev 4894 drivers/md/raid10.c struct md_rdev *rdev = rcu_dereference(conf->mirrors[d].rdev); rdev 4895 drivers/md/raid10.c if (rdev) rdev 4896 drivers/md/raid10.c clear_bit(In_sync, &rdev->flags); rdev 4897 drivers/md/raid10.c rdev = rcu_dereference(conf->mirrors[d].replacement); rdev 4898 drivers/md/raid10.c if (rdev) rdev 4899 drivers/md/raid10.c clear_bit(In_sync, &rdev->flags); rdev 19 drivers/md/raid10.h struct md_rdev *rdev, *replacement; rdev 151 drivers/md/raid10.h struct md_rdev *rdev; /* used for reads rdev 83 drivers/md/raid5-cache.c struct md_rdev *rdev; rdev 420 drivers/md/raid5-cache.c struct r5conf *conf = log->rdev->mddev->private; rdev 570 drivers/md/raid5-cache.c md_error(log->rdev->mddev, log->rdev); rdev 605 drivers/md/raid5-cache.c md_wakeup_thread(log->rdev->mddev->thread); rdev 686 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 743 drivers/md/raid5-cache.c bio_set_dev(bio, log->rdev->bdev); rdev 744 drivers/md/raid5-cache.c bio->bi_iter.bi_sector = log->rdev->data_offset + log->log_start; rdev 866 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 1179 drivers/md/raid5-cache.c struct r5conf *conf = log->rdev->mddev->private; rdev 1227 drivers/md/raid5-cache.c struct r5conf *conf = log->rdev->mddev->private; rdev 1265 drivers/md/raid5-cache.c md_error(log->rdev->mddev, log->rdev); rdev 1308 drivers/md/raid5-cache.c bio_set_dev(&log->flush_bio, log->rdev->bdev); rdev 1318 drivers/md/raid5-cache.c struct block_device *bdev = log->rdev->bdev; rdev 1326 drivers/md/raid5-cache.c mddev = log->rdev->mddev; rdev 1348 drivers/md/raid5-cache.c log->last_checkpoint + log->rdev->data_offset, rdev 1352 drivers/md/raid5-cache.c log->last_checkpoint + log->rdev->data_offset, rdev 1355 drivers/md/raid5-cache.c blkdev_issue_discard(bdev, log->rdev->data_offset, end, rdev 1501 drivers/md/raid5-cache.c struct r5conf *conf = log->rdev->mddev->private; rdev 1524 drivers/md/raid5-cache.c md_wakeup_thread(log->rdev->mddev->thread); rdev 1584 drivers/md/raid5-cache.c mddev = log->rdev->mddev; rdev 1604 drivers/md/raid5-cache.c ret = test_bit(Faulty, &log->rdev->flags); rdev 1684 drivers/md/raid5-cache.c bio_set_dev(ctx->ra_bio, log->rdev->bdev); rdev 1686 drivers/md/raid5-cache.c ctx->ra_bio->bi_iter.bi_sector = log->rdev->data_offset + offset; rdev 1796 drivers/md/raid5-cache.c if (!sync_page_io(log->rdev, pos, PAGE_SIZE, page, REQ_OP_WRITE, rdev 1818 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 1840 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 1875 drivers/md/raid5-cache.c struct md_rdev *rdev, *rrdev; rdev 1901 drivers/md/raid5-cache.c rdev = rcu_dereference(conf->disks[disk_index].rdev); rdev 1902 drivers/md/raid5-cache.c if (rdev) { rdev 1903 drivers/md/raid5-cache.c atomic_inc(&rdev->nr_pending); rdev 1905 drivers/md/raid5-cache.c sync_page_io(rdev, sh->sector, PAGE_SIZE, rdev 1908 drivers/md/raid5-cache.c rdev_dec_pending(rdev, rdev->mddev); rdev 2008 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 2082 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 2358 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 2401 drivers/md/raid5-cache.c sync_page_io(log->rdev, write_pos, PAGE_SIZE, rdev 2413 drivers/md/raid5-cache.c sync_page_io(log->rdev, ctx->pos, PAGE_SIZE, page, rdev 2430 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 2455 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 2524 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 2526 drivers/md/raid5-cache.c log->rdev->journal_tail = cp; rdev 2960 drivers/md/raid5-cache.c struct md_rdev *rdev = log->rdev; rdev 2963 drivers/md/raid5-cache.c sector_t cp = log->rdev->journal_tail; rdev 2969 drivers/md/raid5-cache.c if (cp >= rdev->sectors || round_down(cp, BLOCK_SECTORS) != cp) rdev 2975 drivers/md/raid5-cache.c if (!sync_page_io(rdev, cp, PAGE_SIZE, page, REQ_OP_READ, 0, false)) { rdev 3011 drivers/md/raid5-cache.c log->device_size = round_down(rdev->sectors, BLOCK_SECTORS); rdev 3042 drivers/md/raid5-cache.c struct mddev *mddev = log->rdev->mddev; rdev 3050 drivers/md/raid5-cache.c void r5c_update_on_rdev_error(struct mddev *mddev, struct md_rdev *rdev) rdev 3059 drivers/md/raid5-cache.c test_bit(Journal, &rdev->flags)) && rdev 3064 drivers/md/raid5-cache.c int r5l_init_log(struct r5conf *conf, struct md_rdev *rdev) rdev 3066 drivers/md/raid5-cache.c struct request_queue *q = bdev_get_queue(rdev->bdev); rdev 3072 drivers/md/raid5-cache.c mdname(conf->mddev), bdevname(rdev->bdev, b)); rdev 3095 drivers/md/raid5-cache.c log->rdev = rdev; rdev 3099 drivers/md/raid5-cache.c log->uuid_checksum = crc32c_le(~0, rdev->mddev->uuid, rdev 3100 drivers/md/raid5-cache.c sizeof(rdev->mddev->uuid)); rdev 3131 drivers/md/raid5-cache.c log->rdev->mddev, "reclaim"); rdev 5 drivers/md/raid5-log.h extern int r5l_init_log(struct r5conf *conf, struct md_rdev *rdev); rdev 33 drivers/md/raid5-log.h struct md_rdev *rdev); rdev 45 drivers/md/raid5-log.h extern int ppl_modify_log(struct r5conf *conf, struct md_rdev *rdev, bool add); rdev 146 drivers/md/raid5-log.h static inline int log_modify(struct r5conf *conf, struct md_rdev *rdev, bool add) rdev 149 drivers/md/raid5-log.h return ppl_modify_log(conf, rdev, add); rdev 118 drivers/md/raid5-ppl.c struct md_rdev *rdev; /* array member disk associated with rdev 377 drivers/md/raid5-ppl.c if (!log->rdev || test_bit(Faulty, &log->rdev->flags)) { rdev 407 drivers/md/raid5-ppl.c md_error(ppl_conf->mddev, log->rdev); rdev 440 drivers/md/raid5-ppl.c if (!log->rdev || test_bit(Faulty, &log->rdev->flags)) { rdev 462 drivers/md/raid5-ppl.c log->rdev->ppl.sector + log->rdev->ppl.size - log->next_io_sector < rdev 464 drivers/md/raid5-ppl.c log->next_io_sector = log->rdev->ppl.sector; rdev 469 drivers/md/raid5-ppl.c bio_set_dev(bio, log->rdev->bdev); rdev 598 drivers/md/raid5-ppl.c struct md_rdev *rdev; rdev 601 drivers/md/raid5-ppl.c rdev = md_find_rdev_rcu(conf->mddev, bio_dev(bio)); rdev 602 drivers/md/raid5-ppl.c if (rdev) rdev 603 drivers/md/raid5-ppl.c md_error(rdev->mddev, rdev); rdev 627 drivers/md/raid5-ppl.c struct md_rdev *rdev; rdev 631 drivers/md/raid5-ppl.c rdev = rcu_dereference(conf->disks[i].rdev); rdev 632 drivers/md/raid5-ppl.c if (rdev && !test_bit(Faulty, &rdev->flags)) rdev 633 drivers/md/raid5-ppl.c bdev = rdev->bdev; rdev 868 drivers/md/raid5-ppl.c struct md_rdev *rdev; rdev 895 drivers/md/raid5-ppl.c rdev = conf->disks[dd_idx].rdev; rdev 896 drivers/md/raid5-ppl.c if (!rdev || (!test_bit(In_sync, &rdev->flags) && rdev 897 drivers/md/raid5-ppl.c sector >= rdev->recovery_offset)) { rdev 905 drivers/md/raid5-ppl.c __func__, indent, "", bdevname(rdev->bdev, b), rdev 907 drivers/md/raid5-ppl.c if (!sync_page_io(rdev, sector, block_size, page2, rdev 909 drivers/md/raid5-ppl.c md_error(mddev, rdev); rdev 928 drivers/md/raid5-ppl.c if (!sync_page_io(log->rdev, rdev 929 drivers/md/raid5-ppl.c ppl_sector - log->rdev->data_offset + i, rdev 934 drivers/md/raid5-ppl.c md_error(mddev, log->rdev); rdev 946 drivers/md/raid5-ppl.c parity_rdev = conf->disks[sh.pd_idx].rdev; rdev 948 drivers/md/raid5-ppl.c BUG_ON(parity_rdev->bdev->bd_dev != log->rdev->bdev->bd_dev); rdev 974 drivers/md/raid5-ppl.c struct md_rdev *rdev = log->rdev; rdev 975 drivers/md/raid5-ppl.c struct mddev *mddev = rdev->mddev; rdev 976 drivers/md/raid5-ppl.c sector_t ppl_sector = rdev->ppl.sector + offset + rdev 995 drivers/md/raid5-ppl.c __func__, rdev->raid_disk, i, rdev 1005 drivers/md/raid5-ppl.c if (!sync_page_io(rdev, sector - rdev->data_offset, rdev 1007 drivers/md/raid5-ppl.c md_error(mddev, rdev); rdev 1040 drivers/md/raid5-ppl.c ret = blkdev_issue_flush(rdev->bdev, GFP_KERNEL, NULL); rdev 1050 drivers/md/raid5-ppl.c struct md_rdev *rdev = log->rdev; rdev 1054 drivers/md/raid5-ppl.c rdev->raid_disk, (unsigned long long)rdev->ppl.sector); rdev 1062 drivers/md/raid5-ppl.c blkdev_issue_zeroout(rdev->bdev, rdev->ppl.sector, rdev 1063 drivers/md/raid5-ppl.c log->rdev->ppl.size, GFP_NOIO, 0); rdev 1068 drivers/md/raid5-ppl.c if (!sync_page_io(rdev, rdev->ppl.sector - rdev->data_offset, rdev 1071 drivers/md/raid5-ppl.c md_error(rdev->mddev, rdev); rdev 1082 drivers/md/raid5-ppl.c struct md_rdev *rdev = log->rdev; rdev 1083 drivers/md/raid5-ppl.c struct mddev *mddev = rdev->mddev; rdev 1091 drivers/md/raid5-ppl.c pr_debug("%s: disk: %d\n", __func__, rdev->raid_disk); rdev 1104 drivers/md/raid5-ppl.c while (pplhdr_offset < rdev->ppl.size - (PPL_HEADER_SIZE >> 9)) { rdev 1105 drivers/md/raid5-ppl.c if (!sync_page_io(rdev, rdev 1106 drivers/md/raid5-ppl.c rdev->ppl.sector - rdev->data_offset + rdev 1109 drivers/md/raid5-ppl.c md_error(mddev, rdev); rdev 1206 drivers/md/raid5-ppl.c if (!log->rdev) rdev 1262 drivers/md/raid5-ppl.c static int ppl_validate_rdev(struct md_rdev *rdev) rdev 1274 drivers/md/raid5-ppl.c ppl_data_sectors = rdev->ppl.size - (PPL_HEADER_SIZE >> 9); rdev 1281 drivers/md/raid5-ppl.c mdname(rdev->mddev), bdevname(rdev->bdev, b)); rdev 1287 drivers/md/raid5-ppl.c if ((rdev->ppl.sector < rdev->data_offset && rdev 1288 drivers/md/raid5-ppl.c rdev->ppl.sector + ppl_size_new > rdev->data_offset) || rdev 1289 drivers/md/raid5-ppl.c (rdev->ppl.sector >= rdev->data_offset && rdev 1290 drivers/md/raid5-ppl.c rdev->data_offset + rdev->sectors > rdev->ppl.sector)) { rdev 1292 drivers/md/raid5-ppl.c mdname(rdev->mddev), bdevname(rdev->bdev, b)); rdev 1296 drivers/md/raid5-ppl.c if (!rdev->mddev->external && rdev 1297 drivers/md/raid5-ppl.c ((rdev->ppl.offset > 0 && rdev->ppl.offset < (rdev->sb_size >> 9)) || rdev 1298 drivers/md/raid5-ppl.c (rdev->ppl.offset <= 0 && rdev->ppl.offset + ppl_size_new > 0))) { rdev 1300 drivers/md/raid5-ppl.c mdname(rdev->mddev), bdevname(rdev->bdev, b)); rdev 1304 drivers/md/raid5-ppl.c rdev->ppl.size = ppl_size_new; rdev 1309 drivers/md/raid5-ppl.c static void ppl_init_child_log(struct ppl_log *log, struct md_rdev *rdev) rdev 1313 drivers/md/raid5-ppl.c if ((rdev->ppl.size << 9) >= (PPL_SPACE_SIZE + rdev 1321 drivers/md/raid5-ppl.c log->entry_space = (log->rdev->ppl.size << 9) - rdev 1324 drivers/md/raid5-ppl.c log->next_io_sector = rdev->ppl.sector; rdev 1326 drivers/md/raid5-ppl.c q = bdev_get_queue(rdev->bdev); rdev 1418 drivers/md/raid5-ppl.c struct md_rdev *rdev = conf->disks[i].rdev; rdev 1425 drivers/md/raid5-ppl.c log->rdev = rdev; rdev 1427 drivers/md/raid5-ppl.c if (rdev) { rdev 1428 drivers/md/raid5-ppl.c ret = ppl_validate_rdev(rdev); rdev 1432 drivers/md/raid5-ppl.c ppl_init_child_log(log, rdev); rdev 1465 drivers/md/raid5-ppl.c int ppl_modify_log(struct r5conf *conf, struct md_rdev *rdev, bool add) rdev 1472 drivers/md/raid5-ppl.c if (!rdev) rdev 1476 drivers/md/raid5-ppl.c __func__, rdev->raid_disk, add ? "add" : "remove", rdev 1477 drivers/md/raid5-ppl.c bdevname(rdev->bdev, b)); rdev 1479 drivers/md/raid5-ppl.c if (rdev->raid_disk < 0) rdev 1482 drivers/md/raid5-ppl.c if (rdev->raid_disk >= ppl_conf->count) rdev 1485 drivers/md/raid5-ppl.c log = &ppl_conf->child_logs[rdev->raid_disk]; rdev 1489 drivers/md/raid5-ppl.c ret = ppl_validate_rdev(rdev); rdev 1491 drivers/md/raid5-ppl.c log->rdev = rdev; rdev 1493 drivers/md/raid5-ppl.c ppl_init_child_log(log, rdev); rdev 1496 drivers/md/raid5-ppl.c log->rdev = NULL; rdev 564 drivers/md/raid5.c struct md_rdev *rdev = rcu_dereference(conf->disks[i].rdev); rdev 565 drivers/md/raid5.c if (rdev && test_bit(Faulty, &rdev->flags)) rdev 566 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[i].replacement); rdev 567 drivers/md/raid5.c if (!rdev || test_bit(Faulty, &rdev->flags)) rdev 569 drivers/md/raid5.c else if (test_bit(In_sync, &rdev->flags)) rdev 590 drivers/md/raid5.c struct md_rdev *rdev = rcu_dereference(conf->disks[i].rdev); rdev 591 drivers/md/raid5.c if (rdev && test_bit(Faulty, &rdev->flags)) rdev 592 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[i].replacement); rdev 593 drivers/md/raid5.c if (!rdev || test_bit(Faulty, &rdev->flags)) rdev 595 drivers/md/raid5.c else if (test_bit(In_sync, &rdev->flags)) rdev 998 drivers/md/raid5.c struct md_rdev *rdev, *rrdev = NULL; rdev 1025 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[i].rdev); rdev 1026 drivers/md/raid5.c if (!rdev) { rdev 1027 drivers/md/raid5.c rdev = rrdev; rdev 1032 drivers/md/raid5.c rdev = NULL; rdev 1033 drivers/md/raid5.c if (rdev == rrdev) rdev 1038 drivers/md/raid5.c rdev = rrdev; rdev 1042 drivers/md/raid5.c if (rdev && test_bit(Faulty, &rdev->flags)) rdev 1043 drivers/md/raid5.c rdev = NULL; rdev 1044 drivers/md/raid5.c if (rdev) rdev 1045 drivers/md/raid5.c atomic_inc(&rdev->nr_pending); rdev 1056 drivers/md/raid5.c while (op_is_write(op) && rdev && rdev 1057 drivers/md/raid5.c test_bit(WriteErrorSeen, &rdev->flags)) { rdev 1060 drivers/md/raid5.c int bad = is_badblock(rdev, sh->sector, STRIPE_SECTORS, rdev 1066 drivers/md/raid5.c set_bit(BlockedBadBlocks, &rdev->flags); rdev 1080 drivers/md/raid5.c atomic_inc(&rdev->nr_pending); rdev 1081 drivers/md/raid5.c md_wait_for_blocked_rdev(rdev, conf->mddev); rdev 1084 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 1085 drivers/md/raid5.c rdev = NULL; rdev 1089 drivers/md/raid5.c if (rdev) { rdev 1092 drivers/md/raid5.c md_sync_acct(rdev->bdev, STRIPE_SECTORS); rdev 1096 drivers/md/raid5.c bio_set_dev(bi, rdev->bdev); rdev 1111 drivers/md/raid5.c + rdev->new_data_offset); rdev 1114 drivers/md/raid5.c + rdev->data_offset); rdev 1206 drivers/md/raid5.c if (!rdev && !rrdev) { rdev 2467 drivers/md/raid5.c struct md_rdev *rdev = NULL; rdev 2488 drivers/md/raid5.c rdev = conf->disks[i].replacement; rdev 2489 drivers/md/raid5.c if (!rdev) rdev 2490 drivers/md/raid5.c rdev = conf->disks[i].rdev; rdev 2493 drivers/md/raid5.c s = sh->sector + rdev->new_data_offset; rdev 2495 drivers/md/raid5.c s = sh->sector + rdev->data_offset; rdev 2507 drivers/md/raid5.c bdevname(rdev->bdev, b)); rdev 2508 drivers/md/raid5.c atomic_add(STRIPE_SECTORS, &rdev->corrected_errors); rdev 2521 drivers/md/raid5.c if (atomic_read(&rdev->read_errors)) rdev 2522 drivers/md/raid5.c atomic_set(&rdev->read_errors, 0); rdev 2524 drivers/md/raid5.c const char *bdn = bdevname(rdev->bdev, b); rdev 2530 drivers/md/raid5.c atomic_inc(&rdev->read_errors); rdev 2552 drivers/md/raid5.c } else if (atomic_read(&rdev->read_errors) rdev 2554 drivers/md/raid5.c if (!test_bit(Faulty, &rdev->flags)) { rdev 2557 drivers/md/raid5.c atomic_read(&rdev->read_errors), rdev 2564 drivers/md/raid5.c if (set_bad && test_bit(In_sync, &rdev->flags) rdev 2579 drivers/md/raid5.c && test_bit(In_sync, &rdev->flags) rdev 2581 drivers/md/raid5.c rdev, sh->sector, STRIPE_SECTORS, 0))) rdev 2582 drivers/md/raid5.c md_error(conf->mddev, rdev); rdev 2585 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 2597 drivers/md/raid5.c struct md_rdev *uninitialized_var(rdev); rdev 2604 drivers/md/raid5.c rdev = conf->disks[i].rdev; rdev 2608 drivers/md/raid5.c rdev = conf->disks[i].replacement; rdev 2609 drivers/md/raid5.c if (rdev) rdev 2616 drivers/md/raid5.c rdev = conf->disks[i].rdev; rdev 2631 drivers/md/raid5.c md_error(conf->mddev, rdev); rdev 2632 drivers/md/raid5.c else if (is_badblock(rdev, sh->sector, rdev 2639 drivers/md/raid5.c set_bit(WriteErrorSeen, &rdev->flags); rdev 2641 drivers/md/raid5.c if (!test_and_set_bit(WantReplacement, &rdev->flags)) rdev 2643 drivers/md/raid5.c &rdev->mddev->recovery); rdev 2644 drivers/md/raid5.c } else if (is_badblock(rdev, sh->sector, rdev 2656 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 2671 drivers/md/raid5.c static void raid5_error(struct mddev *mddev, struct md_rdev *rdev) rdev 2680 drivers/md/raid5.c if (test_bit(In_sync, &rdev->flags) && rdev 2691 drivers/md/raid5.c set_bit(Faulty, &rdev->flags); rdev 2692 drivers/md/raid5.c clear_bit(In_sync, &rdev->flags); rdev 2697 drivers/md/raid5.c set_bit(Blocked, &rdev->flags); rdev 2703 drivers/md/raid5.c bdevname(rdev->bdev, b), rdev 2706 drivers/md/raid5.c r5c_update_on_rdev_error(mddev, rdev); rdev 3359 drivers/md/raid5.c struct md_rdev *rdev; rdev 3361 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[i].rdev); rdev 3362 drivers/md/raid5.c if (rdev && test_bit(In_sync, &rdev->flags) && rdev 3363 drivers/md/raid5.c !test_bit(Faulty, &rdev->flags)) rdev 3364 drivers/md/raid5.c atomic_inc(&rdev->nr_pending); rdev 3366 drivers/md/raid5.c rdev = NULL; rdev 3368 drivers/md/raid5.c if (rdev) { rdev 3370 drivers/md/raid5.c rdev, rdev 3373 drivers/md/raid5.c md_error(conf->mddev, rdev); rdev 3374 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 3487 drivers/md/raid5.c struct md_rdev *rdev = rcu_dereference(conf->disks[i].rdev); rdev 3488 drivers/md/raid5.c if (rdev rdev 3489 drivers/md/raid5.c && !test_bit(Faulty, &rdev->flags) rdev 3490 drivers/md/raid5.c && !test_bit(In_sync, &rdev->flags) rdev 3491 drivers/md/raid5.c && !rdev_set_badblocks(rdev, sh->sector, rdev 3494 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[i].replacement); rdev 3495 drivers/md/raid5.c if (rdev rdev 3496 drivers/md/raid5.c && !test_bit(Faulty, &rdev->flags) rdev 3497 drivers/md/raid5.c && !test_bit(In_sync, &rdev->flags) rdev 3498 drivers/md/raid5.c && !rdev_set_badblocks(rdev, sh->sector, rdev 3512 drivers/md/raid5.c struct md_rdev *rdev; rdev 3516 drivers/md/raid5.c rdev = rcu_dereference(sh->raid_conf->disks[disk_idx].replacement); rdev 3517 drivers/md/raid5.c if (rdev rdev 3518 drivers/md/raid5.c && !test_bit(Faulty, &rdev->flags) rdev 3519 drivers/md/raid5.c && !test_bit(In_sync, &rdev->flags) rdev 3520 drivers/md/raid5.c && (rdev->recovery_offset <= sh->sector rdev 3521 drivers/md/raid5.c || rdev->mddev->recovery_cp <= sh->sector)) rdev 4393 drivers/md/raid5.c struct md_rdev *rdev; rdev 4436 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[i].replacement); rdev 4437 drivers/md/raid5.c if (rdev && !test_bit(Faulty, &rdev->flags) && rdev 4438 drivers/md/raid5.c rdev->recovery_offset >= sh->sector + STRIPE_SECTORS && rdev 4439 drivers/md/raid5.c !is_badblock(rdev, sh->sector, STRIPE_SECTORS, rdev 4443 drivers/md/raid5.c if (rdev && !test_bit(Faulty, &rdev->flags)) rdev 4447 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[i].rdev); rdev 4450 drivers/md/raid5.c if (rdev && test_bit(Faulty, &rdev->flags)) rdev 4451 drivers/md/raid5.c rdev = NULL; rdev 4452 drivers/md/raid5.c if (rdev) { rdev 4453 drivers/md/raid5.c is_bad = is_badblock(rdev, sh->sector, STRIPE_SECTORS, rdev 4456 drivers/md/raid5.c && (test_bit(Blocked, &rdev->flags) rdev 4460 drivers/md/raid5.c &rdev->flags); rdev 4461 drivers/md/raid5.c s->blocked_rdev = rdev; rdev 4462 drivers/md/raid5.c atomic_inc(&rdev->nr_pending); rdev 4466 drivers/md/raid5.c if (!rdev) rdev 4470 drivers/md/raid5.c if (!test_bit(WriteErrorSeen, &rdev->flags) && rdev 4478 drivers/md/raid5.c } else if (test_bit(In_sync, &rdev->flags)) rdev 4480 drivers/md/raid5.c else if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset) rdev 4495 drivers/md/raid5.c conf->disks[i].rdev); rdev 4496 drivers/md/raid5.c if (rdev2 == rdev) rdev 4508 drivers/md/raid5.c conf->disks[i].rdev); rdev 4535 drivers/md/raid5.c if (rdev && !test_bit(Faulty, &rdev->flags)) rdev 4537 drivers/md/raid5.c else if (!rdev) { rdev 4538 drivers/md/raid5.c rdev = rcu_dereference( rdev 4540 drivers/md/raid5.c if (rdev && !test_bit(Faulty, &rdev->flags)) rdev 5015 drivers/md/raid5.c struct md_rdev *rdev; rdev 5019 drivers/md/raid5.c rdev = conf->disks[i].rdev; rdev 5020 drivers/md/raid5.c if (!rdev_set_badblocks(rdev, sh->sector, rdev 5022 drivers/md/raid5.c md_error(conf->mddev, rdev); rdev 5023 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 5026 drivers/md/raid5.c rdev = conf->disks[i].rdev; rdev 5027 drivers/md/raid5.c rdev_clear_badblocks(rdev, sh->sector, rdev 5029 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 5032 drivers/md/raid5.c rdev = conf->disks[i].replacement; rdev 5033 drivers/md/raid5.c if (!rdev) rdev 5035 drivers/md/raid5.c rdev = conf->disks[i].rdev; rdev 5036 drivers/md/raid5.c rdev_clear_badblocks(rdev, sh->sector, rdev 5038 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 5180 drivers/md/raid5.c struct md_rdev *rdev; rdev 5185 drivers/md/raid5.c rdev = (void*)raid_bi->bi_next; rdev 5187 drivers/md/raid5.c mddev = rdev->mddev; rdev 5190 drivers/md/raid5.c rdev_dec_pending(rdev, conf->mddev); rdev 5209 drivers/md/raid5.c struct md_rdev *rdev; rdev 5237 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[dd_idx].replacement); rdev 5238 drivers/md/raid5.c if (!rdev || test_bit(Faulty, &rdev->flags) || rdev 5239 drivers/md/raid5.c rdev->recovery_offset < end_sector) { rdev 5240 drivers/md/raid5.c rdev = rcu_dereference(conf->disks[dd_idx].rdev); rdev 5241 drivers/md/raid5.c if (rdev && rdev 5242 drivers/md/raid5.c (test_bit(Faulty, &rdev->flags) || rdev 5243 drivers/md/raid5.c !(test_bit(In_sync, &rdev->flags) || rdev 5244 drivers/md/raid5.c rdev->recovery_offset >= end_sector))) rdev 5245 drivers/md/raid5.c rdev = NULL; rdev 5254 drivers/md/raid5.c if (rdev) { rdev 5258 drivers/md/raid5.c atomic_inc(&rdev->nr_pending); rdev 5260 drivers/md/raid5.c raid_bio->bi_next = (void*)rdev; rdev 5261 drivers/md/raid5.c bio_set_dev(align_bi, rdev->bdev); rdev 5263 drivers/md/raid5.c if (is_badblock(rdev, align_bi->bi_iter.bi_sector, rdev 5267 drivers/md/raid5.c rdev_dec_pending(rdev, mddev); rdev 5272 drivers/md/raid5.c align_bi->bi_iter.bi_sector += rdev->data_offset; rdev 5766 drivers/md/raid5.c struct md_rdev *rdev; rdev 5891 drivers/md/raid5.c rdev_for_each(rdev, mddev) rdev 5892 drivers/md/raid5.c if (rdev->raid_disk >= 0 && rdev 5893 drivers/md/raid5.c !test_bit(Journal, &rdev->flags) && rdev 5894 drivers/md/raid5.c !test_bit(In_sync, &rdev->flags) && rdev 5895 drivers/md/raid5.c rdev->recovery_offset < sector_nr) rdev 5896 drivers/md/raid5.c rdev->recovery_offset = sector_nr; rdev 5998 drivers/md/raid5.c rdev_for_each(rdev, mddev) rdev 5999 drivers/md/raid5.c if (rdev->raid_disk >= 0 && rdev 6000 drivers/md/raid5.c !test_bit(Journal, &rdev->flags) && rdev 6001 drivers/md/raid5.c !test_bit(In_sync, &rdev->flags) && rdev 6002 drivers/md/raid5.c rdev->recovery_offset < sector_nr) rdev 6003 drivers/md/raid5.c rdev->recovery_offset = sector_nr; rdev 6098 drivers/md/raid5.c struct md_rdev *rdev = READ_ONCE(conf->disks[i].rdev); rdev 6100 drivers/md/raid5.c if (rdev == NULL || test_bit(Faulty, &rdev->flags)) rdev 6881 drivers/md/raid5.c struct md_rdev *rdev; rdev 6955 drivers/md/raid5.c rdev_for_each(rdev, mddev) { rdev 6956 drivers/md/raid5.c if (test_bit(Journal, &rdev->flags)) rdev 6958 drivers/md/raid5.c if (blk_queue_nonrot(bdev_get_queue(rdev->bdev))) { rdev 7023 drivers/md/raid5.c rdev_for_each(rdev, mddev) { rdev 7024 drivers/md/raid5.c raid_disk = rdev->raid_disk; rdev 7026 drivers/md/raid5.c || raid_disk < 0 || test_bit(Journal, &rdev->flags)) rdev 7030 drivers/md/raid5.c if (test_bit(Replacement, &rdev->flags)) { rdev 7033 drivers/md/raid5.c disk->replacement = rdev; rdev 7035 drivers/md/raid5.c if (disk->rdev) rdev 7037 drivers/md/raid5.c disk->rdev = rdev; rdev 7040 drivers/md/raid5.c if (test_bit(In_sync, &rdev->flags)) { rdev 7043 drivers/md/raid5.c mdname(mddev), bdevname(rdev->bdev, b), raid_disk); rdev 7044 drivers/md/raid5.c } else if (rdev->saved_raid_disk != raid_disk) rdev 7154 drivers/md/raid5.c struct md_rdev *rdev; rdev 7168 drivers/md/raid5.c rdev_for_each(rdev, mddev) { rdev 7171 drivers/md/raid5.c if (test_bit(Journal, &rdev->flags)) { rdev 7172 drivers/md/raid5.c journal_dev = rdev; rdev 7175 drivers/md/raid5.c if (rdev->raid_disk < 0) rdev 7177 drivers/md/raid5.c diff = (rdev->new_data_offset - rdev->data_offset); rdev 7316 drivers/md/raid5.c rdev = conf->disks[i].rdev; rdev 7317 drivers/md/raid5.c if (!rdev && conf->disks[i].replacement) { rdev 7319 drivers/md/raid5.c rdev = conf->disks[i].replacement; rdev 7321 drivers/md/raid5.c clear_bit(Replacement, &rdev->flags); rdev 7322 drivers/md/raid5.c conf->disks[i].rdev = rdev; rdev 7324 drivers/md/raid5.c if (!rdev) rdev 7332 drivers/md/raid5.c if (test_bit(In_sync, &rdev->flags)) { rdev 7347 drivers/md/raid5.c rdev->recovery_offset = reshape_offset; rdev 7349 drivers/md/raid5.c if (rdev->recovery_offset < reshape_offset) { rdev 7351 drivers/md/raid5.c if (!only_parity(rdev->raid_disk, rdev 7357 drivers/md/raid5.c if (!only_parity(rdev->raid_disk, rdev 7456 drivers/md/raid5.c rdev_for_each(rdev, mddev) { rdev 7457 drivers/md/raid5.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 7458 drivers/md/raid5.c rdev->data_offset << 9); rdev 7459 drivers/md/raid5.c disk_stack_limits(mddev->gendisk, rdev->bdev, rdev 7460 drivers/md/raid5.c rdev->new_data_offset << 9); rdev 7521 drivers/md/raid5.c struct md_rdev *rdev = rcu_dereference(conf->disks[i].rdev); rdev 7522 drivers/md/raid5.c seq_printf (seq, "%s", rdev && test_bit(In_sync, &rdev->flags) ? "U" : "_"); rdev 7545 drivers/md/raid5.c if (tmp->rdev) rdev 7547 drivers/md/raid5.c i, !test_bit(Faulty, &tmp->rdev->flags), rdev 7548 drivers/md/raid5.c bdevname(tmp->rdev->bdev, b)); rdev 7567 drivers/md/raid5.c if (!tmp->rdev rdev 7568 drivers/md/raid5.c || !test_and_clear_bit(In_sync, &tmp->rdev->flags)) rdev 7570 drivers/md/raid5.c if (tmp->rdev) { rdev 7575 drivers/md/raid5.c set_bit(Faulty, &tmp->rdev->flags); rdev 7577 drivers/md/raid5.c tmp->rdev->sysfs_state); rdev 7580 drivers/md/raid5.c } else if (tmp->rdev rdev 7581 drivers/md/raid5.c && tmp->rdev->recovery_offset == MaxSector rdev 7582 drivers/md/raid5.c && !test_bit(Faulty, &tmp->rdev->flags) rdev 7583 drivers/md/raid5.c && !test_and_set_bit(In_sync, &tmp->rdev->flags)) { rdev 7585 drivers/md/raid5.c sysfs_notify_dirent_safe(tmp->rdev->sysfs_state); rdev 7595 drivers/md/raid5.c static int raid5_remove_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 7599 drivers/md/raid5.c int number = rdev->raid_disk; rdev 7604 drivers/md/raid5.c if (test_bit(Journal, &rdev->flags) && conf->log) { rdev 7619 drivers/md/raid5.c if (rdev == p->rdev) rdev 7620 drivers/md/raid5.c rdevp = &p->rdev; rdev 7621 drivers/md/raid5.c else if (rdev == p->replacement) rdev 7628 drivers/md/raid5.c clear_bit(In_sync, &rdev->flags); rdev 7630 drivers/md/raid5.c if (test_bit(In_sync, &rdev->flags) || rdev 7631 drivers/md/raid5.c atomic_read(&rdev->nr_pending)) { rdev 7638 drivers/md/raid5.c if (!test_bit(Faulty, &rdev->flags) && rdev 7641 drivers/md/raid5.c (!p->replacement || p->replacement == rdev) && rdev 7647 drivers/md/raid5.c if (!test_bit(RemoveSynchronized, &rdev->flags)) { rdev 7649 drivers/md/raid5.c if (atomic_read(&rdev->nr_pending)) { rdev 7652 drivers/md/raid5.c *rdevp = rdev; rdev 7656 drivers/md/raid5.c err = log_modify(conf, rdev, false); rdev 7662 drivers/md/raid5.c p->rdev = p->replacement; rdev 7670 drivers/md/raid5.c err = log_modify(conf, p->rdev, true); rdev 7673 drivers/md/raid5.c clear_bit(WantReplacement, &rdev->flags); rdev 7680 drivers/md/raid5.c static int raid5_add_disk(struct mddev *mddev, struct md_rdev *rdev) rdev 7689 drivers/md/raid5.c if (test_bit(Journal, &rdev->flags)) { rdev 7693 drivers/md/raid5.c rdev->raid_disk = 0; rdev 7698 drivers/md/raid5.c ret = log_init(conf, rdev, false); rdev 7711 drivers/md/raid5.c if (rdev->saved_raid_disk < 0 && has_failed(conf)) rdev 7715 drivers/md/raid5.c if (rdev->raid_disk >= 0) rdev 7716 drivers/md/raid5.c first = last = rdev->raid_disk; rdev 7722 drivers/md/raid5.c if (rdev->saved_raid_disk >= 0 && rdev 7723 drivers/md/raid5.c rdev->saved_raid_disk >= first && rdev 7724 drivers/md/raid5.c conf->disks[rdev->saved_raid_disk].rdev == NULL) rdev 7725 drivers/md/raid5.c first = rdev->saved_raid_disk; rdev 7729 drivers/md/raid5.c if (p->rdev == NULL) { rdev 7730 drivers/md/raid5.c clear_bit(In_sync, &rdev->flags); rdev 7731 drivers/md/raid5.c rdev->raid_disk = disk; rdev 7732 drivers/md/raid5.c if (rdev->saved_raid_disk != disk) rdev 7734 drivers/md/raid5.c rcu_assign_pointer(p->rdev, rdev); rdev 7736 drivers/md/raid5.c err = log_modify(conf, rdev, true); rdev 7743 drivers/md/raid5.c if (test_bit(WantReplacement, &p->rdev->flags) && rdev 7745 drivers/md/raid5.c clear_bit(In_sync, &rdev->flags); rdev 7746 drivers/md/raid5.c set_bit(Replacement, &rdev->flags); rdev 7747 drivers/md/raid5.c rdev->raid_disk = disk; rdev 7750 drivers/md/raid5.c rcu_assign_pointer(p->replacement, rdev); rdev 7865 drivers/md/raid5.c struct md_rdev *rdev; rdev 7878 drivers/md/raid5.c rdev_for_each(rdev, mddev) { rdev 7879 drivers/md/raid5.c if (!test_bit(In_sync, &rdev->flags) rdev 7880 drivers/md/raid5.c && !test_bit(Faulty, &rdev->flags)) rdev 7938 drivers/md/raid5.c rdev_for_each(rdev, mddev) rdev 7939 drivers/md/raid5.c if (rdev->raid_disk < 0 && rdev 7940 drivers/md/raid5.c !test_bit(Faulty, &rdev->flags)) { rdev 7941 drivers/md/raid5.c if (raid5_add_disk(mddev, rdev) == 0) { rdev 7942 drivers/md/raid5.c if (rdev->raid_disk rdev 7944 drivers/md/raid5.c set_bit(In_sync, &rdev->flags); rdev 7946 drivers/md/raid5.c rdev->recovery_offset = 0; rdev 7948 drivers/md/raid5.c if (sysfs_link_rdev(mddev, rdev)) rdev 7951 drivers/md/raid5.c } else if (rdev->raid_disk >= conf->previous_raid_disks rdev 7952 drivers/md/raid5.c && !test_bit(Faulty, &rdev->flags)) { rdev 7954 drivers/md/raid5.c set_bit(In_sync, &rdev->flags); rdev 7984 drivers/md/raid5.c rdev_for_each(rdev, mddev) rdev 7985 drivers/md/raid5.c rdev->new_data_offset = rdev->data_offset; rdev 8007 drivers/md/raid5.c struct md_rdev *rdev; rdev 8015 drivers/md/raid5.c rdev_for_each(rdev, conf->mddev) rdev 8016 drivers/md/raid5.c if (rdev->raid_disk >= 0 && rdev 8017 drivers/md/raid5.c !test_bit(Journal, &rdev->flags) && rdev 8018 drivers/md/raid5.c !test_bit(In_sync, &rdev->flags)) rdev 8019 drivers/md/raid5.c rdev->recovery_offset = MaxSector; rdev 8053 drivers/md/raid5.c struct md_rdev *rdev = conf->disks[d].rdev; rdev 8054 drivers/md/raid5.c if (rdev) rdev 8055 drivers/md/raid5.c clear_bit(In_sync, &rdev->flags); rdev 8056 drivers/md/raid5.c rdev = conf->disks[d].replacement; rdev 8057 drivers/md/raid5.c if (rdev) rdev 8058 drivers/md/raid5.c clear_bit(In_sync, &rdev->flags); rdev 8374 drivers/md/raid5.c struct md_rdev *rdev; rdev 8376 drivers/md/raid5.c rdev_for_each(rdev, mddev) rdev 8377 drivers/md/raid5.c if (test_bit(Journal, &rdev->flags)) { rdev 466 drivers/md/raid5.h struct md_rdev *rdev, *replacement; rdev 234 drivers/media/rc/ati_remote.c struct rc_dev *rdev; rdev 368 drivers/media/rc/ati_remote.c static int ati_remote_rc_open(struct rc_dev *rdev) rdev 370 drivers/media/rc/ati_remote.c struct ati_remote *ati_remote = rdev->priv; rdev 374 drivers/media/rc/ati_remote.c static void ati_remote_rc_close(struct rc_dev *rdev) rdev 376 drivers/media/rc/ati_remote.c struct ati_remote *ati_remote = rdev->priv; rdev 538 drivers/media/rc/ati_remote.c wheel_keycode = rc_g_keycode_from_table(ati_remote->rdev, rdev 615 drivers/media/rc/ati_remote.c rc_keydown_notimeout(ati_remote->rdev, rdev 618 drivers/media/rc/ati_remote.c rc_keyup(ati_remote->rdev); rdev 751 drivers/media/rc/ati_remote.c struct rc_dev *rdev = ati_remote->rdev; rdev 753 drivers/media/rc/ati_remote.c rdev->priv = ati_remote; rdev 754 drivers/media/rc/ati_remote.c rdev->allowed_protocols = RC_PROTO_BIT_OTHER; rdev 755 drivers/media/rc/ati_remote.c rdev->driver_name = "ati_remote"; rdev 757 drivers/media/rc/ati_remote.c rdev->open = ati_remote_rc_open; rdev 758 drivers/media/rc/ati_remote.c rdev->close = ati_remote_rc_close; rdev 760 drivers/media/rc/ati_remote.c rdev->device_name = ati_remote->rc_name; rdev 761 drivers/media/rc/ati_remote.c rdev->input_phys = ati_remote->rc_phys; rdev 763 drivers/media/rc/ati_remote.c usb_to_input_id(ati_remote->udev, &rdev->input_id); rdev 764 drivers/media/rc/ati_remote.c rdev->dev.parent = &ati_remote->interface->dev; rdev 851 drivers/media/rc/ati_remote.c ati_remote->rdev = rc_dev; rdev 894 drivers/media/rc/ati_remote.c err = rc_register_device(ati_remote->rdev); rdev 951 drivers/media/rc/ati_remote.c rc_unregister_device(ati_remote->rdev); rdev 344 drivers/media/rc/ene_ir.c ir_raw_event_store(dev->rdev, &ev); rdev 435 drivers/media/rc/ene_ir.c dev->rdev->rx_resolution = US_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN); rdev 439 drivers/media/rc/ene_ir.c dev->rdev->min_timeout = dev->rdev->max_timeout = rdev 443 drivers/media/rc/ene_ir.c dev->rdev->rx_resolution = US_TO_NS(sample_period); rdev 450 drivers/media/rc/ene_ir.c dev->rdev->min_timeout = US_TO_NS(127 * sample_period); rdev 451 drivers/media/rc/ene_ir.c dev->rdev->max_timeout = US_TO_NS(200000); rdev 455 drivers/media/rc/ene_ir.c dev->rdev->tx_resolution = US_TO_NS(sample_period); rdev 457 drivers/media/rc/ene_ir.c if (dev->rdev->timeout > dev->rdev->max_timeout) rdev 458 drivers/media/rc/ene_ir.c dev->rdev->timeout = dev->rdev->max_timeout; rdev 459 drivers/media/rc/ene_ir.c if (dev->rdev->timeout < dev->rdev->min_timeout) rdev 460 drivers/media/rc/ene_ir.c dev->rdev->timeout = dev->rdev->min_timeout; rdev 491 drivers/media/rc/ene_ir.c ir_raw_event_set_idle(dev->rdev, true); rdev 510 drivers/media/rc/ene_ir.c ir_raw_event_set_idle(dev->rdev, true); rdev 803 drivers/media/rc/ene_ir.c ir_raw_event_store_with_filter(dev->rdev, &ev); rdev 806 drivers/media/rc/ene_ir.c ir_raw_event_handle(dev->rdev); rdev 821 drivers/media/rc/ene_ir.c dev->rdev->timeout = US_TO_NS(150000); rdev 836 drivers/media/rc/ene_ir.c static int ene_open(struct rc_dev *rdev) rdev 838 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 848 drivers/media/rc/ene_ir.c static void ene_close(struct rc_dev *rdev) rdev 850 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 859 drivers/media/rc/ene_ir.c static int ene_set_tx_mask(struct rc_dev *rdev, u32 tx_mask) rdev 861 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 877 drivers/media/rc/ene_ir.c static int ene_set_tx_carrier(struct rc_dev *rdev, u32 carrier) rdev 879 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 901 drivers/media/rc/ene_ir.c static int ene_set_tx_duty_cycle(struct rc_dev *rdev, u32 duty_cycle) rdev 903 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 911 drivers/media/rc/ene_ir.c static int ene_set_learning_mode(struct rc_dev *rdev, int enable) rdev 913 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 927 drivers/media/rc/ene_ir.c static int ene_set_carrier_report(struct rc_dev *rdev, int enable) rdev 929 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 945 drivers/media/rc/ene_ir.c static void ene_set_idle(struct rc_dev *rdev, bool idle) rdev 947 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 956 drivers/media/rc/ene_ir.c static int ene_transmit(struct rc_dev *rdev, unsigned *buf, unsigned n) rdev 958 drivers/media/rc/ene_ir.c struct ene_device *dev = rdev->priv; rdev 995 drivers/media/rc/ene_ir.c struct rc_dev *rdev; rdev 1000 drivers/media/rc/ene_ir.c rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 1001 drivers/media/rc/ene_ir.c if (!dev || !rdev) rdev 1045 drivers/media/rc/ene_ir.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 1046 drivers/media/rc/ene_ir.c rdev->priv = dev; rdev 1047 drivers/media/rc/ene_ir.c rdev->open = ene_open; rdev 1048 drivers/media/rc/ene_ir.c rdev->close = ene_close; rdev 1049 drivers/media/rc/ene_ir.c rdev->s_idle = ene_set_idle; rdev 1050 drivers/media/rc/ene_ir.c rdev->driver_name = ENE_DRIVER_NAME; rdev 1051 drivers/media/rc/ene_ir.c rdev->map_name = RC_MAP_RC6_MCE; rdev 1052 drivers/media/rc/ene_ir.c rdev->device_name = "ENE eHome Infrared Remote Receiver"; rdev 1055 drivers/media/rc/ene_ir.c rdev->s_learning_mode = ene_set_learning_mode; rdev 1057 drivers/media/rc/ene_ir.c rdev->tx_ir = ene_transmit; rdev 1058 drivers/media/rc/ene_ir.c rdev->s_tx_mask = ene_set_tx_mask; rdev 1059 drivers/media/rc/ene_ir.c rdev->s_tx_carrier = ene_set_tx_carrier; rdev 1060 drivers/media/rc/ene_ir.c rdev->s_tx_duty_cycle = ene_set_tx_duty_cycle; rdev 1061 drivers/media/rc/ene_ir.c rdev->s_carrier_report = ene_set_carrier_report; rdev 1062 drivers/media/rc/ene_ir.c rdev->device_name = "ENE eHome Infrared Remote Transceiver"; rdev 1065 drivers/media/rc/ene_ir.c dev->rdev = rdev; rdev 1074 drivers/media/rc/ene_ir.c error = rc_register_device(rdev); rdev 1095 drivers/media/rc/ene_ir.c rc_unregister_device(rdev); rdev 1096 drivers/media/rc/ene_ir.c rdev = NULL; rdev 1098 drivers/media/rc/ene_ir.c rc_free_device(rdev); rdev 1116 drivers/media/rc/ene_ir.c rc_unregister_device(dev->rdev); rdev 183 drivers/media/rc/ene_ir.h struct rc_dev *rdev; rdev 297 drivers/media/rc/fintek-cir.c ir_raw_event_reset(fintek->rdev); rdev 315 drivers/media/rc/fintek-cir.c if (ir_raw_event_store_with_filter(fintek->rdev, rdev 329 drivers/media/rc/fintek-cir.c ir_raw_event_handle(fintek->rdev); rdev 472 drivers/media/rc/fintek-cir.c struct rc_dev *rdev; rdev 480 drivers/media/rc/fintek-cir.c rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 481 drivers/media/rc/fintek-cir.c if (!rdev) rdev 521 drivers/media/rc/fintek-cir.c rdev->priv = fintek; rdev 522 drivers/media/rc/fintek-cir.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 523 drivers/media/rc/fintek-cir.c rdev->open = fintek_open; rdev 524 drivers/media/rc/fintek-cir.c rdev->close = fintek_close; rdev 525 drivers/media/rc/fintek-cir.c rdev->device_name = FINTEK_DESCRIPTION; rdev 526 drivers/media/rc/fintek-cir.c rdev->input_phys = "fintek/cir0"; rdev 527 drivers/media/rc/fintek-cir.c rdev->input_id.bustype = BUS_HOST; rdev 528 drivers/media/rc/fintek-cir.c rdev->input_id.vendor = VENDOR_ID_FINTEK; rdev 529 drivers/media/rc/fintek-cir.c rdev->input_id.product = fintek->chip_major; rdev 530 drivers/media/rc/fintek-cir.c rdev->input_id.version = fintek->chip_minor; rdev 531 drivers/media/rc/fintek-cir.c rdev->dev.parent = &pdev->dev; rdev 532 drivers/media/rc/fintek-cir.c rdev->driver_name = FINTEK_DRIVER_NAME; rdev 533 drivers/media/rc/fintek-cir.c rdev->map_name = RC_MAP_RC6_MCE; rdev 534 drivers/media/rc/fintek-cir.c rdev->timeout = US_TO_NS(1000); rdev 536 drivers/media/rc/fintek-cir.c rdev->rx_resolution = US_TO_NS(CIR_SAMPLE_PERIOD); rdev 538 drivers/media/rc/fintek-cir.c fintek->rdev = rdev; rdev 550 drivers/media/rc/fintek-cir.c ret = rc_register_device(rdev); rdev 567 drivers/media/rc/fintek-cir.c rc_free_device(rdev); rdev 590 drivers/media/rc/fintek-cir.c rc_unregister_device(fintek->rdev); rdev 48 drivers/media/rc/fintek-cir.h struct rc_dev *rdev; rdev 376 drivers/media/rc/iguanair.c static int iguanair_open(struct rc_dev *rdev) rdev 378 drivers/media/rc/iguanair.c struct iguanair *ir = rdev->priv; rdev 392 drivers/media/rc/iguanair.c static void iguanair_close(struct rc_dev *rdev) rdev 394 drivers/media/rc/iguanair.c struct iguanair *ir = rdev->priv; rdev 544 drivers/media/rc/img-ir/img-ir-hw.c struct rc_dev *rdev = hw->rdev; rdev 586 drivers/media/rc/img-ir/img-ir-hw.c rdev->scancode_wakeup_filter.data = 0; rdev 587 drivers/media/rc/img-ir/img-ir-hw.c rdev->scancode_wakeup_filter.mask = 0; rdev 588 drivers/media/rc/img-ir/img-ir-hw.c rdev->wakeup_protocol = RC_PROTO_UNKNOWN; rdev 663 drivers/media/rc/img-ir/img-ir-hw.c struct rc_dev *rdev = hw->rdev; rdev 692 drivers/media/rc/img-ir/img-ir-hw.c rdev->allowed_wakeup_protocols = wakeup_protocols; rdev 699 drivers/media/rc/img-ir/img-ir-hw.c struct rc_dev *rdev = priv->hw.rdev; rdev 701 drivers/media/rc/img-ir/img-ir-hw.c mutex_lock(&rdev->lock); rdev 702 drivers/media/rc/img-ir/img-ir-hw.c rdev->enabled_protocols = proto; rdev 703 drivers/media/rc/img-ir/img-ir-hw.c rdev->allowed_wakeup_protocols = proto; rdev 704 drivers/media/rc/img-ir/img-ir-hw.c mutex_unlock(&rdev->lock); rdev 836 drivers/media/rc/img-ir/img-ir-hw.c rc_keydown(hw->rdev, request.protocol, request.scancode, rdev 842 drivers/media/rc/img-ir/img-ir-hw.c rc_repeat(hw->rdev); rdev 1007 drivers/media/rc/img-ir/img-ir-hw.c if (!priv->hw.rdev) rdev 1044 drivers/media/rc/img-ir/img-ir-hw.c struct rc_dev *rdev; rdev 1072 drivers/media/rc/img-ir/img-ir-hw.c hw->rdev = rdev = rc_allocate_device(RC_DRIVER_SCANCODE); rdev 1073 drivers/media/rc/img-ir/img-ir-hw.c if (!rdev) { rdev 1078 drivers/media/rc/img-ir/img-ir-hw.c rdev->priv = priv; rdev 1079 drivers/media/rc/img-ir/img-ir-hw.c rdev->map_name = RC_MAP_EMPTY; rdev 1080 drivers/media/rc/img-ir/img-ir-hw.c rdev->allowed_protocols = img_ir_allowed_protos(priv); rdev 1081 drivers/media/rc/img-ir/img-ir-hw.c rdev->device_name = "IMG Infrared Decoder"; rdev 1082 drivers/media/rc/img-ir/img-ir-hw.c rdev->s_filter = img_ir_set_normal_filter; rdev 1083 drivers/media/rc/img-ir/img-ir-hw.c rdev->s_wakeup_filter = img_ir_set_wakeup_filter; rdev 1086 drivers/media/rc/img-ir/img-ir-hw.c error = rc_register_device(rdev); rdev 1096 drivers/media/rc/img-ir/img-ir-hw.c rdev->change_protocol = img_ir_change_protocol; rdev 1104 drivers/media/rc/img-ir/img-ir-hw.c hw->rdev = NULL; rdev 1105 drivers/media/rc/img-ir/img-ir-hw.c rc_free_device(rdev); rdev 1117 drivers/media/rc/img-ir/img-ir-hw.c struct rc_dev *rdev = hw->rdev; rdev 1118 drivers/media/rc/img-ir/img-ir-hw.c if (!rdev) rdev 1121 drivers/media/rc/img-ir/img-ir-hw.c hw->rdev = NULL; rdev 1122 drivers/media/rc/img-ir/img-ir-hw.c rc_unregister_device(rdev); rdev 234 drivers/media/rc/img-ir/img-ir-hw.h struct rc_dev *rdev; rdev 253 drivers/media/rc/img-ir/img-ir-hw.h return hw->rdev; rdev 21 drivers/media/rc/img-ir/img-ir-raw.c struct rc_dev *rc_dev = priv->raw.rdev; rdev 51 drivers/media/rc/img-ir/img-ir-raw.c if (!raw->rdev) rdev 73 drivers/media/rc/img-ir/img-ir-raw.c if (priv->raw.rdev) rdev 87 drivers/media/rc/img-ir/img-ir-raw.c if (!priv->raw.rdev) rdev 102 drivers/media/rc/img-ir/img-ir-raw.c struct rc_dev *rdev; rdev 109 drivers/media/rc/img-ir/img-ir-raw.c raw->rdev = rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 110 drivers/media/rc/img-ir/img-ir-raw.c if (!rdev) { rdev 114 drivers/media/rc/img-ir/img-ir-raw.c rdev->priv = priv; rdev 115 drivers/media/rc/img-ir/img-ir-raw.c rdev->map_name = RC_MAP_EMPTY; rdev 116 drivers/media/rc/img-ir/img-ir-raw.c rdev->device_name = "IMG Infrared Decoder Raw"; rdev 119 drivers/media/rc/img-ir/img-ir-raw.c error = rc_register_device(rdev); rdev 122 drivers/media/rc/img-ir/img-ir-raw.c rc_free_device(rdev); rdev 123 drivers/media/rc/img-ir/img-ir-raw.c raw->rdev = NULL; rdev 133 drivers/media/rc/img-ir/img-ir-raw.c struct rc_dev *rdev = raw->rdev; rdev 136 drivers/media/rc/img-ir/img-ir-raw.c if (!rdev) rdev 141 drivers/media/rc/img-ir/img-ir-raw.c raw->rdev = NULL; rdev 148 drivers/media/rc/img-ir/img-ir-raw.c rc_unregister_device(rdev); rdev 22 drivers/media/rc/img-ir/img-ir-raw.h struct rc_dev *rdev; rdev 29 drivers/media/rc/img-ir/img-ir-raw.h return raw->rdev; rdev 126 drivers/media/rc/imon.c struct rc_dev *rdev; /* rc-core device for remote */ rdev 1221 drivers/media/rc/imon.c keycode = rc_g_keycode_from_table(ictx->rdev, scancode); rdev 1228 drivers/media/rc/imon.c keycode = rc_g_keycode_from_table(ictx->rdev, release); rdev 1257 drivers/media/rc/imon.c keycode = rc_g_keycode_from_table(ictx->rdev, scancode); rdev 1630 drivers/media/rc/imon.c rc_keyup(ictx->rdev); rdev 1641 drivers/media/rc/imon.c rc_keydown(ictx->rdev, proto, ictx->rc_scancode, rdev 1919 drivers/media/rc/imon.c struct rc_dev *rdev; rdev 1924 drivers/media/rc/imon.c rdev = rc_allocate_device(RC_DRIVER_SCANCODE); rdev 1925 drivers/media/rc/imon.c if (!rdev) { rdev 1936 drivers/media/rc/imon.c rdev->device_name = ictx->name_rdev; rdev 1937 drivers/media/rc/imon.c rdev->input_phys = ictx->phys_rdev; rdev 1938 drivers/media/rc/imon.c usb_to_input_id(ictx->usbdev_intf0, &rdev->input_id); rdev 1939 drivers/media/rc/imon.c rdev->dev.parent = ictx->dev; rdev 1941 drivers/media/rc/imon.c rdev->priv = ictx; rdev 1943 drivers/media/rc/imon.c rdev->allowed_protocols = RC_PROTO_BIT_IMON | RC_PROTO_BIT_RC6_MCE; rdev 1944 drivers/media/rc/imon.c rdev->change_protocol = imon_ir_change_protocol; rdev 1945 drivers/media/rc/imon.c rdev->driver_name = MOD_NAME; rdev 1956 drivers/media/rc/imon.c rdev->allowed_protocols = ictx->rc_proto; rdev 1962 drivers/media/rc/imon.c rdev->map_name = RC_MAP_IMON_MCE; rdev 1964 drivers/media/rc/imon.c rdev->map_name = RC_MAP_IMON_PAD; rdev 1966 drivers/media/rc/imon.c ret = rc_register_device(rdev); rdev 1972 drivers/media/rc/imon.c return rdev; rdev 1975 drivers/media/rc/imon.c rc_free_device(rdev); rdev 2236 drivers/media/rc/imon.c ictx->rdev = imon_init_rdev(ictx); rdev 2237 drivers/media/rc/imon.c if (!ictx->rdev) { rdev 2488 drivers/media/rc/imon.c rc_unregister_device(ictx->rdev); rdev 65 drivers/media/rc/ir-hix5hd2.c struct rc_dev *rdev; rdev 126 drivers/media/rc/ir-hix5hd2.c static int hix5hd2_ir_open(struct rc_dev *rdev) rdev 128 drivers/media/rc/ir-hix5hd2.c struct hix5hd2_ir_priv *priv = rdev->priv; rdev 143 drivers/media/rc/ir-hix5hd2.c static void hix5hd2_ir_close(struct rc_dev *rdev) rdev 145 drivers/media/rc/ir-hix5hd2.c struct hix5hd2_ir_priv *priv = rdev->priv; rdev 164 drivers/media/rc/ir-hix5hd2.c ir_raw_event_reset(priv->rdev); rdev 186 drivers/media/rc/ir-hix5hd2.c ir_raw_event_store(priv->rdev, &ev); rdev 191 drivers/media/rc/ir-hix5hd2.c ir_raw_event_store(priv->rdev, &ev); rdev 193 drivers/media/rc/ir-hix5hd2.c ir_raw_event_set_idle(priv->rdev, true); rdev 204 drivers/media/rc/ir-hix5hd2.c ir_raw_event_handle(priv->rdev); rdev 210 drivers/media/rc/ir-hix5hd2.c struct rc_dev *rdev; rdev 238 drivers/media/rc/ir-hix5hd2.c rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 239 drivers/media/rc/ir-hix5hd2.c if (!rdev) rdev 253 drivers/media/rc/ir-hix5hd2.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 254 drivers/media/rc/ir-hix5hd2.c rdev->priv = priv; rdev 255 drivers/media/rc/ir-hix5hd2.c rdev->open = hix5hd2_ir_open; rdev 256 drivers/media/rc/ir-hix5hd2.c rdev->close = hix5hd2_ir_close; rdev 257 drivers/media/rc/ir-hix5hd2.c rdev->driver_name = IR_HIX5HD2_NAME; rdev 259 drivers/media/rc/ir-hix5hd2.c rdev->map_name = map_name ?: RC_MAP_EMPTY; rdev 260 drivers/media/rc/ir-hix5hd2.c rdev->device_name = IR_HIX5HD2_NAME; rdev 261 drivers/media/rc/ir-hix5hd2.c rdev->input_phys = IR_HIX5HD2_NAME "/input0"; rdev 262 drivers/media/rc/ir-hix5hd2.c rdev->input_id.bustype = BUS_HOST; rdev 263 drivers/media/rc/ir-hix5hd2.c rdev->input_id.vendor = 0x0001; rdev 264 drivers/media/rc/ir-hix5hd2.c rdev->input_id.product = 0x0001; rdev 265 drivers/media/rc/ir-hix5hd2.c rdev->input_id.version = 0x0100; rdev 266 drivers/media/rc/ir-hix5hd2.c rdev->rx_resolution = US_TO_NS(10); rdev 267 drivers/media/rc/ir-hix5hd2.c rdev->timeout = US_TO_NS(IR_CFG_SYMBOL_MAXWIDTH * 10); rdev 269 drivers/media/rc/ir-hix5hd2.c ret = rc_register_device(rdev); rdev 280 drivers/media/rc/ir-hix5hd2.c priv->rdev = rdev; rdev 287 drivers/media/rc/ir-hix5hd2.c rc_unregister_device(rdev); rdev 288 drivers/media/rc/ir-hix5hd2.c rdev = NULL; rdev 292 drivers/media/rc/ir-hix5hd2.c rc_free_device(rdev); rdev 302 drivers/media/rc/ir-hix5hd2.c rc_unregister_device(priv->rdev); rdev 180 drivers/media/rc/ite-cir.c ir_raw_event_store_with_filter(dev->rdev, &ev); rdev 187 drivers/media/rc/ite-cir.c ir_raw_event_store_with_filter(dev->rdev, &ev); rdev 199 drivers/media/rc/ite-cir.c (dev->rdev, &ev); rdev 204 drivers/media/rc/ite-cir.c ir_raw_event_handle(dev->rdev); rdev 1447 drivers/media/rc/ite-cir.c struct rc_dev *rdev = NULL; rdev 1459 drivers/media/rc/ite-cir.c rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 1460 drivers/media/rc/ite-cir.c if (!rdev) rdev 1462 drivers/media/rc/ite-cir.c itdev->rdev = rdev; rdev 1546 drivers/media/rc/ite-cir.c rdev->priv = itdev; rdev 1547 drivers/media/rc/ite-cir.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 1548 drivers/media/rc/ite-cir.c rdev->open = ite_open; rdev 1549 drivers/media/rc/ite-cir.c rdev->close = ite_close; rdev 1550 drivers/media/rc/ite-cir.c rdev->s_idle = ite_s_idle; rdev 1551 drivers/media/rc/ite-cir.c rdev->s_rx_carrier_range = ite_set_rx_carrier_range; rdev 1553 drivers/media/rc/ite-cir.c rdev->min_timeout = 17 * 8 * ITE_BAUDRATE_DIVISOR * rdev 1555 drivers/media/rc/ite-cir.c rdev->timeout = IR_DEFAULT_TIMEOUT; rdev 1556 drivers/media/rc/ite-cir.c rdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT; rdev 1557 drivers/media/rc/ite-cir.c rdev->rx_resolution = ITE_BAUDRATE_DIVISOR * rdev 1559 drivers/media/rc/ite-cir.c rdev->tx_resolution = ITE_BAUDRATE_DIVISOR * rdev 1564 drivers/media/rc/ite-cir.c rdev->tx_ir = ite_tx_ir; rdev 1565 drivers/media/rc/ite-cir.c rdev->s_tx_carrier = ite_set_tx_carrier; rdev 1566 drivers/media/rc/ite-cir.c rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle; rdev 1569 drivers/media/rc/ite-cir.c rdev->device_name = dev_desc->model; rdev 1570 drivers/media/rc/ite-cir.c rdev->input_id.bustype = BUS_HOST; rdev 1571 drivers/media/rc/ite-cir.c rdev->input_id.vendor = PCI_VENDOR_ID_ITE; rdev 1572 drivers/media/rc/ite-cir.c rdev->input_id.product = 0; rdev 1573 drivers/media/rc/ite-cir.c rdev->input_id.version = 0; rdev 1574 drivers/media/rc/ite-cir.c rdev->driver_name = ITE_DRIVER_NAME; rdev 1575 drivers/media/rc/ite-cir.c rdev->map_name = RC_MAP_RC6_MCE; rdev 1577 drivers/media/rc/ite-cir.c ret = rc_register_device(rdev); rdev 1598 drivers/media/rc/ite-cir.c rc_unregister_device(rdev); rdev 1599 drivers/media/rc/ite-cir.c rdev = NULL; rdev 1601 drivers/media/rc/ite-cir.c rc_free_device(rdev); rdev 1625 drivers/media/rc/ite-cir.c rc_unregister_device(dev->rdev); rdev 113 drivers/media/rc/ite-cir.h struct rc_dev *rdev; rdev 48 drivers/media/rc/nuvoton-cir.c return nvt->rdev->dev.parent; rdev 761 drivers/media/rc/nuvoton-cir.c ir_raw_event_store_with_filter(nvt->rdev, &rawir); rdev 767 drivers/media/rc/nuvoton-cir.c ir_raw_event_handle(nvt->rdev); rdev 778 drivers/media/rc/nuvoton-cir.c ir_raw_event_reset(nvt->rdev); rdev 951 drivers/media/rc/nuvoton-cir.c struct rc_dev *rdev; rdev 959 drivers/media/rc/nuvoton-cir.c nvt->rdev = devm_rc_allocate_device(&pdev->dev, RC_DRIVER_IR_RAW); rdev 960 drivers/media/rc/nuvoton-cir.c if (!nvt->rdev) rdev 962 drivers/media/rc/nuvoton-cir.c rdev = nvt->rdev; rdev 1019 drivers/media/rc/nuvoton-cir.c rdev->priv = nvt; rdev 1020 drivers/media/rc/nuvoton-cir.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 1021 drivers/media/rc/nuvoton-cir.c rdev->allowed_wakeup_protocols = RC_PROTO_BIT_ALL_IR_ENCODER; rdev 1022 drivers/media/rc/nuvoton-cir.c rdev->encode_wakeup = true; rdev 1023 drivers/media/rc/nuvoton-cir.c rdev->open = nvt_open; rdev 1024 drivers/media/rc/nuvoton-cir.c rdev->close = nvt_close; rdev 1025 drivers/media/rc/nuvoton-cir.c rdev->s_tx_carrier = nvt_set_tx_carrier; rdev 1026 drivers/media/rc/nuvoton-cir.c rdev->s_wakeup_filter = nvt_ir_raw_set_wakeup_filter; rdev 1027 drivers/media/rc/nuvoton-cir.c rdev->device_name = "Nuvoton w836x7hg Infrared Remote Transceiver"; rdev 1028 drivers/media/rc/nuvoton-cir.c rdev->input_phys = "nuvoton/cir0"; rdev 1029 drivers/media/rc/nuvoton-cir.c rdev->input_id.bustype = BUS_HOST; rdev 1030 drivers/media/rc/nuvoton-cir.c rdev->input_id.vendor = PCI_VENDOR_ID_WINBOND2; rdev 1031 drivers/media/rc/nuvoton-cir.c rdev->input_id.product = nvt->chip_major; rdev 1032 drivers/media/rc/nuvoton-cir.c rdev->input_id.version = nvt->chip_minor; rdev 1033 drivers/media/rc/nuvoton-cir.c rdev->driver_name = NVT_DRIVER_NAME; rdev 1034 drivers/media/rc/nuvoton-cir.c rdev->map_name = RC_MAP_RC6_MCE; rdev 1035 drivers/media/rc/nuvoton-cir.c rdev->timeout = MS_TO_NS(100); rdev 1037 drivers/media/rc/nuvoton-cir.c rdev->rx_resolution = US_TO_NS(CIR_SAMPLE_PERIOD); rdev 1039 drivers/media/rc/nuvoton-cir.c rdev->min_timeout = XYZ; rdev 1040 drivers/media/rc/nuvoton-cir.c rdev->max_timeout = XYZ; rdev 1042 drivers/media/rc/nuvoton-cir.c ret = devm_rc_register_device(&pdev->dev, rdev); rdev 1060 drivers/media/rc/nuvoton-cir.c ret = device_create_file(&rdev->dev, &dev_attr_wakeup_data); rdev 1079 drivers/media/rc/nuvoton-cir.c device_remove_file(&nvt->rdev->dev, &dev_attr_wakeup_data); rdev 1093 drivers/media/rc/nuvoton-cir.c mutex_lock(&nvt->rdev->lock); rdev 1094 drivers/media/rc/nuvoton-cir.c if (nvt->rdev->users) rdev 1096 drivers/media/rc/nuvoton-cir.c mutex_unlock(&nvt->rdev->lock); rdev 1113 drivers/media/rc/nuvoton-cir.c mutex_lock(&nvt->rdev->lock); rdev 1114 drivers/media/rc/nuvoton-cir.c if (nvt->rdev->users) rdev 1116 drivers/media/rc/nuvoton-cir.c mutex_unlock(&nvt->rdev->lock); rdev 59 drivers/media/rc/nuvoton-cir.h struct rc_dev *rdev; rdev 24 drivers/media/rc/rc-core-priv.h int rc_open(struct rc_dev *rdev); rdev 31 drivers/media/rc/rc-core-priv.h void rc_close(struct rc_dev *rdev); rdev 394 drivers/media/rc/rc-main.c struct rc_dev *rdev = input_get_drvdata(idev); rdev 395 drivers/media/rc/rc-main.c struct rc_map *rc_map = &rdev->rc_map; rdev 414 drivers/media/rc/rc-main.c index = ir_establish_scancode(rdev, rc_map, scancode, true); rdev 421 drivers/media/rc/rc-main.c *old_keycode = ir_update_mapping(rdev, rc_map, index, ke->keycode); rdev 514 drivers/media/rc/rc-main.c struct rc_dev *rdev = input_get_drvdata(idev); rdev 515 drivers/media/rc/rc-main.c struct rc_map *rc_map = &rdev->rc_map; rdev 933 drivers/media/rc/rc-main.c int rc_open(struct rc_dev *rdev) rdev 937 drivers/media/rc/rc-main.c if (!rdev) rdev 940 drivers/media/rc/rc-main.c mutex_lock(&rdev->lock); rdev 942 drivers/media/rc/rc-main.c if (!rdev->registered) { rdev 945 drivers/media/rc/rc-main.c if (!rdev->users++ && rdev->open) rdev 946 drivers/media/rc/rc-main.c rval = rdev->open(rdev); rdev 949 drivers/media/rc/rc-main.c rdev->users--; rdev 952 drivers/media/rc/rc-main.c mutex_unlock(&rdev->lock); rdev 959 drivers/media/rc/rc-main.c struct rc_dev *rdev = input_get_drvdata(idev); rdev 961 drivers/media/rc/rc-main.c return rc_open(rdev); rdev 964 drivers/media/rc/rc-main.c void rc_close(struct rc_dev *rdev) rdev 966 drivers/media/rc/rc-main.c if (rdev) { rdev 967 drivers/media/rc/rc-main.c mutex_lock(&rdev->lock); rdev 969 drivers/media/rc/rc-main.c if (!--rdev->users && rdev->close && rdev->registered) rdev 970 drivers/media/rc/rc-main.c rdev->close(rdev); rdev 972 drivers/media/rc/rc-main.c mutex_unlock(&rdev->lock); rdev 978 drivers/media/rc/rc-main.c struct rc_dev *rdev = input_get_drvdata(idev); rdev 979 drivers/media/rc/rc-main.c rc_close(rdev); rdev 24 drivers/media/rc/st_rc.c struct rc_dev *rdev; rdev 64 drivers/media/rc/st_rc.c static void st_rc_send_lirc_timeout(struct rc_dev *rdev) rdev 66 drivers/media/rc/st_rc.c struct ir_raw_event ev = { .timeout = true, .duration = rdev->timeout }; rdev 67 drivers/media/rc/st_rc.c ir_raw_event_store(rdev, &ev); rdev 114 drivers/media/rc/st_rc.c ir_raw_event_reset(dev->rdev); rdev 139 drivers/media/rc/st_rc.c ir_raw_event_store(dev->rdev, &ev); rdev 144 drivers/media/rc/st_rc.c ir_raw_event_store(dev->rdev, &ev); rdev 146 drivers/media/rc/st_rc.c st_rc_send_lirc_timeout(dev->rdev); rdev 156 drivers/media/rc/st_rc.c ir_raw_event_handle(dev->rdev); rdev 196 drivers/media/rc/st_rc.c rc_unregister_device(rc_dev->rdev); rdev 200 drivers/media/rc/st_rc.c static int st_rc_open(struct rc_dev *rdev) rdev 202 drivers/media/rc/st_rc.c struct st_rc_device *dev = rdev->priv; rdev 213 drivers/media/rc/st_rc.c static void st_rc_close(struct rc_dev *rdev) rdev 215 drivers/media/rc/st_rc.c struct st_rc_device *dev = rdev->priv; rdev 224 drivers/media/rc/st_rc.c struct rc_dev *rdev; rdev 236 drivers/media/rc/st_rc.c rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 238 drivers/media/rc/st_rc.c if (!rdev) rdev 292 drivers/media/rc/st_rc.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 294 drivers/media/rc/st_rc.c rdev->rx_resolution = 100; rdev 295 drivers/media/rc/st_rc.c rdev->timeout = US_TO_NS(MAX_SYMB_TIME); rdev 296 drivers/media/rc/st_rc.c rdev->priv = rc_dev; rdev 297 drivers/media/rc/st_rc.c rdev->open = st_rc_open; rdev 298 drivers/media/rc/st_rc.c rdev->close = st_rc_close; rdev 299 drivers/media/rc/st_rc.c rdev->driver_name = IR_ST_NAME; rdev 300 drivers/media/rc/st_rc.c rdev->map_name = RC_MAP_EMPTY; rdev 301 drivers/media/rc/st_rc.c rdev->device_name = "ST Remote Control Receiver"; rdev 303 drivers/media/rc/st_rc.c ret = rc_register_device(rdev); rdev 307 drivers/media/rc/st_rc.c rc_dev->rdev = rdev; rdev 323 drivers/media/rc/st_rc.c st_rc_send_lirc_timeout(rdev); rdev 329 drivers/media/rc/st_rc.c rc_unregister_device(rdev); rdev 330 drivers/media/rc/st_rc.c rdev = NULL; rdev 334 drivers/media/rc/st_rc.c rc_free_device(rdev); rdev 363 drivers/media/rc/st_rc.c struct rc_dev *rdev = rc_dev->rdev; rdev 371 drivers/media/rc/st_rc.c if (rdev->users) { rdev 64 drivers/media/rc/streamzap.c struct rc_dev *rdev; rdev 118 drivers/media/rc/streamzap.c ir_raw_event_store_with_filter(sz->rdev, &rawir); rdev 245 drivers/media/rc/streamzap.c .duration = sz->rdev->timeout rdev 250 drivers/media/rc/streamzap.c ir_raw_event_handle(sz->rdev); rdev 251 drivers/media/rc/streamzap.c ir_raw_event_reset(sz->rdev); rdev 269 drivers/media/rc/streamzap.c ir_raw_event_handle(sz->rdev); rdev 277 drivers/media/rc/streamzap.c struct rc_dev *rdev; rdev 281 drivers/media/rc/streamzap.c rdev = rc_allocate_device(RC_DRIVER_IR_RAW); rdev 282 drivers/media/rc/streamzap.c if (!rdev) { rdev 293 drivers/media/rc/streamzap.c rdev->device_name = sz->name; rdev 294 drivers/media/rc/streamzap.c rdev->input_phys = sz->phys; rdev 295 drivers/media/rc/streamzap.c usb_to_input_id(sz->usbdev, &rdev->input_id); rdev 296 drivers/media/rc/streamzap.c rdev->dev.parent = dev; rdev 297 drivers/media/rc/streamzap.c rdev->priv = sz; rdev 298 drivers/media/rc/streamzap.c rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; rdev 299 drivers/media/rc/streamzap.c rdev->driver_name = DRIVER_NAME; rdev 300 drivers/media/rc/streamzap.c rdev->map_name = RC_MAP_STREAMZAP; rdev 302 drivers/media/rc/streamzap.c ret = rc_register_device(rdev); rdev 308 drivers/media/rc/streamzap.c return rdev; rdev 311 drivers/media/rc/streamzap.c rc_free_device(rdev); rdev 398 drivers/media/rc/streamzap.c sz->rdev = streamzap_init_rc_dev(sz); rdev 399 drivers/media/rc/streamzap.c if (!sz->rdev) rdev 406 drivers/media/rc/streamzap.c sz->rdev->timeout = ((US_TO_NS(SZ_TIMEOUT * SZ_RESOLUTION) & rdev 465 drivers/media/rc/streamzap.c rc_unregister_device(sz->rdev); rdev 53 drivers/media/rc/xbox_remote.c struct rc_dev *rdev; rdev 64 drivers/media/rc/xbox_remote.c static int xbox_remote_rc_open(struct rc_dev *rdev) rdev 66 drivers/media/rc/xbox_remote.c struct xbox_remote *xbox_remote = rdev->priv; rdev 79 drivers/media/rc/xbox_remote.c static void xbox_remote_rc_close(struct rc_dev *rdev) rdev 81 drivers/media/rc/xbox_remote.c struct xbox_remote *xbox_remote = rdev->priv; rdev 110 drivers/media/rc/xbox_remote.c rc_keydown(xbox_remote->rdev, RC_PROTO_XBOX_DVD, rdev 148 drivers/media/rc/xbox_remote.c struct rc_dev *rdev = xbox_remote->rdev; rdev 150 drivers/media/rc/xbox_remote.c rdev->priv = xbox_remote; rdev 151 drivers/media/rc/xbox_remote.c rdev->allowed_protocols = RC_PROTO_BIT_XBOX_DVD; rdev 152 drivers/media/rc/xbox_remote.c rdev->driver_name = "xbox_remote"; rdev 154 drivers/media/rc/xbox_remote.c rdev->open = xbox_remote_rc_open; rdev 155 drivers/media/rc/xbox_remote.c rdev->close = xbox_remote_rc_close; rdev 157 drivers/media/rc/xbox_remote.c rdev->device_name = xbox_remote->rc_name; rdev 158 drivers/media/rc/xbox_remote.c rdev->input_phys = xbox_remote->rc_phys; rdev 160 drivers/media/rc/xbox_remote.c rdev->timeout = MS_TO_NS(10); rdev 162 drivers/media/rc/xbox_remote.c usb_to_input_id(xbox_remote->udev, &rdev->input_id); rdev 163 drivers/media/rc/xbox_remote.c rdev->dev.parent = &xbox_remote->interface->dev; rdev 229 drivers/media/rc/xbox_remote.c xbox_remote->rdev = rc_dev; rdev 257 drivers/media/rc/xbox_remote.c err = rc_register_device(xbox_remote->rdev); rdev 291 drivers/media/rc/xbox_remote.c rc_unregister_device(xbox_remote->rdev); rdev 1082 drivers/media/usb/usbvision/usbvision-video.c dev_err(&usbvision->rdev.dev, rdev 1241 drivers/media/usb/usbvision/usbvision-video.c if (video_is_registered(&usbvision->rdev)) { rdev 1243 drivers/media/usb/usbvision/usbvision-video.c video_device_node_name(&usbvision->rdev)); rdev 1244 drivers/media/usb/usbvision/usbvision-video.c video_unregister_device(&usbvision->rdev); rdev 1282 drivers/media/usb/usbvision/usbvision-video.c usbvision_vdev_init(usbvision, &usbvision->rdev, rdev 1284 drivers/media/usb/usbvision/usbvision-video.c usbvision->rdev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER; rdev 1285 drivers/media/usb/usbvision/usbvision-video.c if (video_register_device(&usbvision->rdev, VFL_TYPE_RADIO, radio_nr) < 0) rdev 1288 drivers/media/usb/usbvision/usbvision-video.c usbvision->nr, video_device_node_name(&usbvision->rdev)); rdev 348 drivers/media/usb/usbvision/usbvision.h struct video_device rdev; /* Radio Device */ rdev 88 drivers/mfd/ac100.c static int ac100_rsb_probe(struct sunxi_rsb_device *rdev) rdev 93 drivers/mfd/ac100.c ac100 = devm_kzalloc(&rdev->dev, sizeof(*ac100), GFP_KERNEL); rdev 97 drivers/mfd/ac100.c ac100->dev = &rdev->dev; rdev 98 drivers/mfd/ac100.c sunxi_rsb_device_set_drvdata(rdev, ac100); rdev 100 drivers/mfd/ac100.c ac100->regmap = devm_regmap_init_sunxi_rsb(rdev, &ac100_regmap_config); rdev 25 drivers/mfd/axp20x-rsb.c static int axp20x_rsb_probe(struct sunxi_rsb_device *rdev) rdev 30 drivers/mfd/axp20x-rsb.c axp20x = devm_kzalloc(&rdev->dev, sizeof(*axp20x), GFP_KERNEL); rdev 34 drivers/mfd/axp20x-rsb.c axp20x->dev = &rdev->dev; rdev 35 drivers/mfd/axp20x-rsb.c axp20x->irq = rdev->irq; rdev 36 drivers/mfd/axp20x-rsb.c dev_set_drvdata(&rdev->dev, axp20x); rdev 42 drivers/mfd/axp20x-rsb.c axp20x->regmap = devm_regmap_init_sunxi_rsb(rdev, axp20x->regmap_cfg); rdev 45 drivers/mfd/axp20x-rsb.c dev_err(&rdev->dev, "regmap init failed: %d\n", ret); rdev 52 drivers/mfd/axp20x-rsb.c static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev) rdev 54 drivers/mfd/axp20x-rsb.c struct axp20x_dev *axp20x = sunxi_rsb_device_get_drvdata(rdev); rdev 143 drivers/mfd/retu-mfd.c int retu_read(struct retu_dev *rdev, u8 reg) rdev 148 drivers/mfd/retu-mfd.c mutex_lock(&rdev->mutex); rdev 149 drivers/mfd/retu-mfd.c ret = regmap_read(rdev->regmap, reg, &value); rdev 150 drivers/mfd/retu-mfd.c mutex_unlock(&rdev->mutex); rdev 156 drivers/mfd/retu-mfd.c int retu_write(struct retu_dev *rdev, u8 reg, u16 data) rdev 160 drivers/mfd/retu-mfd.c mutex_lock(&rdev->mutex); rdev 161 drivers/mfd/retu-mfd.c ret = regmap_write(rdev->regmap, reg, data); rdev 162 drivers/mfd/retu-mfd.c mutex_unlock(&rdev->mutex); rdev 170 drivers/mfd/retu-mfd.c struct retu_dev *rdev = retu_pm_power_off; rdev 176 drivers/mfd/retu-mfd.c regmap_read(rdev->regmap, RETU_REG_CC1, ®); rdev 177 drivers/mfd/retu-mfd.c regmap_write(rdev->regmap, RETU_REG_CC1, reg | 2); rdev 180 drivers/mfd/retu-mfd.c regmap_write(rdev->regmap, RETU_REG_WATCHDOG, 0); rdev 233 drivers/mfd/retu-mfd.c struct retu_dev *rdev; rdev 240 drivers/mfd/retu-mfd.c rdev = devm_kzalloc(&i2c->dev, sizeof(*rdev), GFP_KERNEL); rdev 241 drivers/mfd/retu-mfd.c if (rdev == NULL) rdev 244 drivers/mfd/retu-mfd.c i2c_set_clientdata(i2c, rdev); rdev 245 drivers/mfd/retu-mfd.c rdev->dev = &i2c->dev; rdev 246 drivers/mfd/retu-mfd.c mutex_init(&rdev->mutex); rdev 247 drivers/mfd/retu-mfd.c rdev->regmap = devm_regmap_init(&i2c->dev, &retu_bus, &i2c->dev, rdev 249 drivers/mfd/retu-mfd.c if (IS_ERR(rdev->regmap)) rdev 250 drivers/mfd/retu-mfd.c return PTR_ERR(rdev->regmap); rdev 252 drivers/mfd/retu-mfd.c ret = retu_read(rdev, RETU_REG_ASICR); rdev 254 drivers/mfd/retu-mfd.c dev_err(rdev->dev, "could not read %s revision: %d\n", rdev 259 drivers/mfd/retu-mfd.c dev_info(rdev->dev, "%s%s%s v%d.%d found\n", rdat->chip_name, rdev 265 drivers/mfd/retu-mfd.c ret = retu_write(rdev, rdat->irq_chip->mask_base, 0xffff); rdev 269 drivers/mfd/retu-mfd.c ret = regmap_add_irq_chip(rdev->regmap, i2c->irq, IRQF_ONESHOT, -1, rdev 270 drivers/mfd/retu-mfd.c rdat->irq_chip, &rdev->irq_data); rdev 274 drivers/mfd/retu-mfd.c ret = mfd_add_devices(rdev->dev, -1, rdat->children, rdat->nchildren, rdev 275 drivers/mfd/retu-mfd.c NULL, regmap_irq_chip_get_base(rdev->irq_data), rdev 278 drivers/mfd/retu-mfd.c regmap_del_irq_chip(i2c->irq, rdev->irq_data); rdev 283 drivers/mfd/retu-mfd.c retu_pm_power_off = rdev; rdev 292 drivers/mfd/retu-mfd.c struct retu_dev *rdev = i2c_get_clientdata(i2c); rdev 294 drivers/mfd/retu-mfd.c if (retu_pm_power_off == rdev) { rdev 298 drivers/mfd/retu-mfd.c mfd_remove_devices(rdev->dev); rdev 299 drivers/mfd/retu-mfd.c regmap_del_irq_chip(i2c->irq, rdev->irq_data); rdev 1405 drivers/misc/fastrpc.c struct device *rdev = &rpdev->dev; rdev 1410 drivers/misc/fastrpc.c err = of_property_read_string(rdev->of_node, "label", &domain); rdev 1412 drivers/misc/fastrpc.c dev_info(rdev, "FastRPC Domain not specified in DT\n"); rdev 1424 drivers/misc/fastrpc.c dev_info(rdev, "FastRPC Invalid Domain ID %d\n", domain_id); rdev 1433 drivers/misc/fastrpc.c data->miscdev.name = devm_kasprintf(rdev, GFP_KERNEL, "fastrpc-%s", rdev 1443 drivers/misc/fastrpc.c dma_set_mask_and_coherent(rdev, DMA_BIT_MASK(32)); rdev 1450 drivers/misc/fastrpc.c return of_platform_populate(rdev->of_node, NULL, NULL, rdev); rdev 1047 drivers/misc/mic/scif/scif_dma.c struct scif_dev *rdev = work->remote_dev; rdev 1049 drivers/misc/mic/scif/scif_dma.c ret = scif_drain_dma_intr(rdev->sdev, chan); rdev 1385 drivers/misc/mic/scif/scif_dma.c struct scif_dev *rdev = work->remote_dev; rdev 1387 drivers/misc/mic/scif/scif_dma.c ret = scif_drain_dma_poll(rdev->sdev, chan); rdev 1797 drivers/misc/mic/scif/scif_dma.c struct scif_dev *rdev = ep->remote_dev; rdev 1800 drivers/misc/mic/scif/scif_dma.c err = scif_drain_dma_poll(rdev->sdev, rdev 1803 drivers/misc/mic/scif/scif_dma.c err = scif_drain_dma_intr(rdev->sdev, rdev 471 drivers/misc/mic/scif/scif_mmap.c struct scif_dev *rdev = ep->remote_dev; rdev 473 drivers/misc/mic/scif/scif_mmap.c scif_drain_dma_intr(rdev->sdev, rdev 1124 drivers/mtd/ubi/build.c if (MAJOR(stat.rdev) != MTD_CHAR_MAJOR || !S_ISCHR(stat.mode)) rdev 1127 drivers/mtd/ubi/build.c minor = MINOR(stat.rdev); rdev 312 drivers/mtd/ubi/kapi.c ubi_num = ubi_major2num(MAJOR(stat.rdev)); rdev 313 drivers/mtd/ubi/kapi.c vol_id = MINOR(stat.rdev) - 1; rdev 213 drivers/net/ethernet/amd/xgbe/xgbe-pci.c struct pci_dev *rdev; rdev 276 drivers/net/ethernet/amd/xgbe/xgbe-pci.c rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0)); rdev 277 drivers/net/ethernet/amd/xgbe/xgbe-pci.c if (rdev && rdev 278 drivers/net/ethernet/amd/xgbe/xgbe-pci.c (rdev->vendor == PCI_VENDOR_ID_AMD) && (rdev->device == 0x15d0)) { rdev 285 drivers/net/ethernet/amd/xgbe/xgbe-pci.c pci_dev_put(rdev); rdev 211 drivers/net/hyperv/hyperv_net.h int rndis_filter_set_rss_param(struct rndis_device *rdev, rdev 65 drivers/net/hyperv/netvsc.c struct rndis_device *rdev; rdev 74 drivers/net/hyperv/netvsc.c rdev = nvdev->extension; rdev 75 drivers/net/hyperv/netvsc.c if (rdev) { rdev 76 drivers/net/hyperv/netvsc.c ret = rndis_set_subchannel(rdev->ndev, nvdev, NULL); rdev 78 drivers/net/hyperv/netvsc.c netif_device_attach(rdev->ndev); rdev 115 drivers/net/hyperv/netvsc_drv.c struct rndis_device *rdev; rdev 127 drivers/net/hyperv/netvsc_drv.c rdev = nvdev->extension; rdev 128 drivers/net/hyperv/netvsc_drv.c if (!rdev->link_state) { rdev 958 drivers/net/hyperv/netvsc_drv.c struct rndis_device *rdev; rdev 987 drivers/net/hyperv/netvsc_drv.c rdev = nvdev->extension; rdev 988 drivers/net/hyperv/netvsc_drv.c if (!rdev->link_state) rdev 1895 drivers/net/hyperv/netvsc_drv.c struct rndis_device *rdev; rdev 1910 drivers/net/hyperv/netvsc_drv.c rdev = net_device->extension; rdev 1942 drivers/net/hyperv/netvsc_drv.c if (rdev->link_state) { rdev 1943 drivers/net/hyperv/netvsc_drv.c rdev->link_state = false; rdev 1952 drivers/net/hyperv/netvsc_drv.c if (!rdev->link_state) { rdev 1953 drivers/net/hyperv/netvsc_drv.c rdev->link_state = true; rdev 1961 drivers/net/hyperv/netvsc_drv.c if (!rdev->link_state) { rdev 1962 drivers/net/hyperv/netvsc_drv.c rdev->link_state = true; rdev 244 drivers/net/hyperv/rndis_filter.c static void rndis_set_link_state(struct rndis_device *rdev, rdev 256 drivers/net/hyperv/rndis_filter.c rdev->link_state = link_status != 0; rdev 647 drivers/net/hyperv/rndis_filter.c struct rndis_device *rdev = nvdev->extension; rdev 658 drivers/net/hyperv/rndis_filter.c request = get_rndis_request(rdev, RNDIS_MSG_SET, rdev 693 drivers/net/hyperv/rndis_filter.c ret = rndis_filter_send_request(rdev, request); rdev 704 drivers/net/hyperv/rndis_filter.c put_rndis_request(rdev, request); rdev 713 drivers/net/hyperv/rndis_filter.c struct rndis_device *rdev = nvdev->extension; rdev 731 drivers/net/hyperv/rndis_filter.c request = get_rndis_request(rdev, RNDIS_MSG_SET, rdev 749 drivers/net/hyperv/rndis_filter.c ret = rndis_filter_send_request(rdev, request); rdev 762 drivers/net/hyperv/rndis_filter.c put_rndis_request(rdev, request); rdev 766 drivers/net/hyperv/rndis_filter.c static int rndis_set_rss_param_msg(struct rndis_device *rdev, rdev 769 drivers/net/hyperv/rndis_filter.c struct net_device *ndev = rdev->ndev; rdev 782 drivers/net/hyperv/rndis_filter.c rdev, RNDIS_MSG_SET, rdev 816 drivers/net/hyperv/rndis_filter.c ret = rndis_filter_send_request(rdev, request); rdev 825 drivers/net/hyperv/rndis_filter.c memcpy(rdev->rss_key, rss_key, NETVSC_HASH_KEYLEN); rdev 834 drivers/net/hyperv/rndis_filter.c put_rndis_request(rdev, request); rdev 838 drivers/net/hyperv/rndis_filter.c int rndis_filter_set_rss_param(struct rndis_device *rdev, rdev 842 drivers/net/hyperv/rndis_filter.c rndis_set_rss_param_msg(rdev, rss_key, rdev 845 drivers/net/hyperv/rndis_filter.c return rndis_set_rss_param_msg(rdev, rss_key, 0); rdev 921 drivers/net/hyperv/rndis_filter.c struct rndis_device *rdev rdev 924 drivers/net/hyperv/rndis_filter.c unsigned int flags = rdev->ndev->flags; rdev 929 drivers/net/hyperv/rndis_filter.c if (!netdev_mc_empty(rdev->ndev) || (flags & IFF_ALLMULTI)) rdev 935 drivers/net/hyperv/rndis_filter.c rndis_filter_set_packet_filter(rdev, filter); rdev 940 drivers/net/hyperv/rndis_filter.c struct rndis_device *rdev = nvdev->extension; rdev 942 drivers/net/hyperv/rndis_filter.c schedule_work(&rdev->mcast_work); rdev 1134 drivers/net/hyperv/rndis_filter.c struct rndis_device *rdev = nvdev->extension; rdev 1174 drivers/net/hyperv/rndis_filter.c rndis_filter_set_rss_param(rdev, dev_info->rss_key); rdev 1176 drivers/net/hyperv/rndis_filter.c rndis_filter_set_rss_param(rdev, netvsc_hash_key); rdev 67 drivers/net/rionet.c struct rio_dev *rdev; rdev 146 drivers/net/rionet.c struct rio_dev *rdev) rdev 150 drivers/net/rionet.c rio_add_outb_message(rnet->mport, rdev, 0, skb->data, skb->len); rdev 241 drivers/net/rionet.c if (peer->rdev->destid == sid) { rdev 242 drivers/net/rionet.c nets[netid].active[sid] = peer->rdev; rdev 356 drivers/net/rionet.c rio_send_doorbell(peer->rdev, RIONET_DOORBELL_JOIN); rdev 385 drivers/net/rionet.c if (nets[netid].active[peer->rdev->destid]) { rdev 386 drivers/net/rionet.c rio_send_doorbell(peer->rdev, RIONET_DOORBELL_LEAVE); rdev 387 drivers/net/rionet.c nets[netid].active[peer->rdev->destid] = NULL; rdev 390 drivers/net/rionet.c rio_release_outb_dbell(peer->rdev, peer->res); rdev 404 drivers/net/rionet.c struct rio_dev *rdev = to_rio_dev(dev); rdev 405 drivers/net/rionet.c unsigned char netid = rdev->net->hport->id; rdev 410 drivers/net/rionet.c if (!dev_rionet_capable(rdev)) rdev 415 drivers/net/rionet.c if (peer->rdev == rdev) { rdev 417 drivers/net/rionet.c if (nets[netid].active[rdev->destid]) { rdev 418 drivers/net/rionet.c state = atomic_read(&rdev->state); rdev 421 drivers/net/rionet.c rio_send_doorbell(rdev, rdev 424 drivers/net/rionet.c nets[netid].active[rdev->destid] = NULL; rdev 435 drivers/net/rionet.c rio_release_outb_dbell(rdev, peer->res); rdev 549 drivers/net/rionet.c struct rio_dev *rdev = to_rio_dev(dev); rdev 550 drivers/net/rionet.c unsigned char netid = rdev->net->hport->id; rdev 561 drivers/net/rionet.c rio_local_read_config_32(rdev->net->hport, RIO_SRC_OPS_CAR, rdev 563 drivers/net/rionet.c rio_local_read_config_32(rdev->net->hport, RIO_DST_OPS_CAR, rdev 568 drivers/net/rionet.c DRV_NAME, rdev->net->hport->name); rdev 579 drivers/net/rionet.c rc = rionet_setup_netdev(rdev->net->hport, ndev); rdev 597 drivers/net/rionet.c if (dev_rionet_capable(rdev)) { rdev 608 drivers/net/rionet.c peer->rdev = rdev; rdev 609 drivers/net/rionet.c peer->res = rio_request_outb_dbell(peer->rdev, rdev 623 drivers/net/rionet.c DRV_NAME, __func__, rio_name(rdev)); rdev 627 drivers/net/rionet.c rio_send_doorbell(peer->rdev, RIONET_DOORBELL_JOIN); rdev 650 drivers/net/rionet.c if (nets[i].active[peer->rdev->destid]) { rdev 651 drivers/net/rionet.c rio_send_doorbell(peer->rdev, rdev 653 drivers/net/rionet.c nets[i].active[peer->rdev->destid] = NULL; rdev 369 drivers/platform/olpc/olpc-ec.c static int dcon_regulator_enable(struct regulator_dev *rdev) rdev 371 drivers/platform/olpc/olpc-ec.c struct olpc_ec_priv *ec = rdev_get_drvdata(rdev); rdev 376 drivers/platform/olpc/olpc-ec.c static int dcon_regulator_disable(struct regulator_dev *rdev) rdev 378 drivers/platform/olpc/olpc-ec.c struct olpc_ec_priv *ec = rdev_get_drvdata(rdev); rdev 383 drivers/platform/olpc/olpc-ec.c static int dcon_regulator_is_enabled(struct regulator_dev *rdev) rdev 385 drivers/platform/olpc/olpc-ec.c struct olpc_ec_priv *ec = rdev_get_drvdata(rdev); rdev 788 drivers/power/supply/qcom_smbb.c static int smbb_chg_otg_enable(struct regulator_dev *rdev) rdev 790 drivers/power/supply/qcom_smbb.c struct smbb_charger *chg = rdev_get_drvdata(rdev); rdev 800 drivers/power/supply/qcom_smbb.c static int smbb_chg_otg_disable(struct regulator_dev *rdev) rdev 802 drivers/power/supply/qcom_smbb.c struct smbb_charger *chg = rdev_get_drvdata(rdev); rdev 812 drivers/power/supply/qcom_smbb.c static int smbb_chg_otg_is_enabled(struct regulator_dev *rdev) rdev 814 drivers/power/supply/qcom_smbb.c struct smbb_charger *chg = rdev_get_drvdata(rdev); rdev 502 drivers/power/supply/ucs1002_power.c struct regulator_dev *rdev; rdev 593 drivers/power/supply/ucs1002_power.c rdev = devm_regulator_register(dev, info->regulator_descriptor, rdev 595 drivers/power/supply/ucs1002_power.c ret = PTR_ERR_OR_ZERO(rdev); rdev 1651 drivers/rapidio/devices/rio_mport_cdev.c struct rio_dev *rdev; rdev 1653 drivers/rapidio/devices/rio_mport_cdev.c rdev = to_rio_dev(dev); rdev 1654 drivers/rapidio/devices/rio_mport_cdev.c pr_info(DRV_PREFIX "%s: %s\n", __func__, rio_name(rdev)); rdev 1655 drivers/rapidio/devices/rio_mport_cdev.c kfree(rdev); rdev 1682 drivers/rapidio/devices/rio_mport_cdev.c struct rio_dev *rdev; rdev 1704 drivers/rapidio/devices/rio_mport_cdev.c size = sizeof(*rdev); rdev 1720 drivers/rapidio/devices/rio_mport_cdev.c rdev = kzalloc(size, GFP_KERNEL); rdev 1721 drivers/rapidio/devices/rio_mport_cdev.c if (rdev == NULL) rdev 1747 drivers/rapidio/devices/rio_mport_cdev.c rdev->net = mport->net; rdev 1748 drivers/rapidio/devices/rio_mport_cdev.c rdev->pef = rval; rdev 1749 drivers/rapidio/devices/rio_mport_cdev.c rdev->swpinfo = swpinfo; rdev 1752 drivers/rapidio/devices/rio_mport_cdev.c rdev->did = rval >> 16; rdev 1753 drivers/rapidio/devices/rio_mport_cdev.c rdev->vid = rval & 0xffff; rdev 1755 drivers/rapidio/devices/rio_mport_cdev.c &rdev->device_rev); rdev 1758 drivers/rapidio/devices/rio_mport_cdev.c rdev->asm_did = rval >> 16; rdev 1759 drivers/rapidio/devices/rio_mport_cdev.c rdev->asm_vid = rval & 0xffff; rdev 1762 drivers/rapidio/devices/rio_mport_cdev.c rdev->asm_rev = rval >> 16; rdev 1764 drivers/rapidio/devices/rio_mport_cdev.c if (rdev->pef & RIO_PEF_EXT_FEATURES) { rdev 1765 drivers/rapidio/devices/rio_mport_cdev.c rdev->efptr = rval & 0xffff; rdev 1766 drivers/rapidio/devices/rio_mport_cdev.c rdev->phys_efptr = rio_mport_get_physefb(mport, 0, destid, rdev 1767 drivers/rapidio/devices/rio_mport_cdev.c hopcount, &rdev->phys_rmap); rdev 1769 drivers/rapidio/devices/rio_mport_cdev.c rdev->em_efptr = rio_mport_get_feature(mport, 0, destid, rdev 1774 drivers/rapidio/devices/rio_mport_cdev.c &rdev->src_ops); rdev 1776 drivers/rapidio/devices/rio_mport_cdev.c &rdev->dst_ops); rdev 1778 drivers/rapidio/devices/rio_mport_cdev.c rdev->comp_tag = dev_info.comptag; rdev 1779 drivers/rapidio/devices/rio_mport_cdev.c rdev->destid = destid; rdev 1781 drivers/rapidio/devices/rio_mport_cdev.c rdev->hopcount = hopcount; rdev 1783 drivers/rapidio/devices/rio_mport_cdev.c if (rdev->pef & RIO_PEF_SWITCH) { rdev 1784 drivers/rapidio/devices/rio_mport_cdev.c rswitch = rdev->rswitch; rdev 1789 drivers/rapidio/devices/rio_mport_cdev.c dev_set_name(&rdev->dev, "%s", dev_info.name); rdev 1790 drivers/rapidio/devices/rio_mport_cdev.c else if (rdev->pef & RIO_PEF_SWITCH) rdev 1791 drivers/rapidio/devices/rio_mport_cdev.c dev_set_name(&rdev->dev, "%02x:s:%04x", mport->id, rdev 1792 drivers/rapidio/devices/rio_mport_cdev.c rdev->comp_tag & RIO_CTAG_UDEVID); rdev 1794 drivers/rapidio/devices/rio_mport_cdev.c dev_set_name(&rdev->dev, "%02x:e:%04x", mport->id, rdev 1795 drivers/rapidio/devices/rio_mport_cdev.c rdev->comp_tag & RIO_CTAG_UDEVID); rdev 1797 drivers/rapidio/devices/rio_mport_cdev.c INIT_LIST_HEAD(&rdev->net_list); rdev 1798 drivers/rapidio/devices/rio_mport_cdev.c rdev->dev.parent = &mport->net->dev; rdev 1799 drivers/rapidio/devices/rio_mport_cdev.c rio_attach_device(rdev); rdev 1800 drivers/rapidio/devices/rio_mport_cdev.c rdev->dev.release = rio_release_dev; rdev 1802 drivers/rapidio/devices/rio_mport_cdev.c if (rdev->dst_ops & RIO_DST_OPS_DOORBELL) rdev 1803 drivers/rapidio/devices/rio_mport_cdev.c rio_init_dbell_res(&rdev->riores[RIO_DOORBELL_RESOURCE], rdev 1805 drivers/rapidio/devices/rio_mport_cdev.c err = rio_add_device(rdev); rdev 1808 drivers/rapidio/devices/rio_mport_cdev.c rio_dev_get(rdev); rdev 1812 drivers/rapidio/devices/rio_mport_cdev.c kfree(rdev); rdev 1819 drivers/rapidio/devices/rio_mport_cdev.c struct rio_dev *rdev = NULL; rdev 1835 drivers/rapidio/devices/rio_mport_cdev.c rdev = to_rio_dev(dev); rdev 1838 drivers/rapidio/devices/rio_mport_cdev.c rdev = rio_get_comptag(dev_info.comptag, rdev); rdev 1839 drivers/rapidio/devices/rio_mport_cdev.c if (rdev && rdev->dev.parent == &mport->net->dev && rdev 1840 drivers/rapidio/devices/rio_mport_cdev.c rdev->destid == dev_info.destid && rdev 1841 drivers/rapidio/devices/rio_mport_cdev.c rdev->hopcount == dev_info.hopcount) rdev 1843 drivers/rapidio/devices/rio_mport_cdev.c } while (rdev); rdev 1846 drivers/rapidio/devices/rio_mport_cdev.c if (!rdev) { rdev 1854 drivers/rapidio/devices/rio_mport_cdev.c net = rdev->net; rdev 1855 drivers/rapidio/devices/rio_mport_cdev.c rio_dev_put(rdev); rdev 1856 drivers/rapidio/devices/rio_mport_cdev.c rio_del_device(rdev, RIO_DEVICE_SHUTDOWN); rdev 1667 drivers/rapidio/devices/tsi721.c tsi721_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, rdev 1691 drivers/rapidio/devices/tsi721.c desc[tx_slot].type_id = cpu_to_le32((DTYPE4 << 29) | rdev->destid); rdev 27 drivers/rapidio/rio-driver.c const struct rio_dev *rdev) rdev 30 drivers/rapidio/rio-driver.c if (((id->vid == RIO_ANY_ID) || (id->vid == rdev->vid)) && rdev 31 drivers/rapidio/rio-driver.c ((id->did == RIO_ANY_ID) || (id->did == rdev->did)) && rdev 33 drivers/rapidio/rio-driver.c || (id->asm_vid == rdev->asm_vid)) rdev 35 drivers/rapidio/rio-driver.c || (id->asm_did == rdev->asm_did))) rdev 53 drivers/rapidio/rio-driver.c struct rio_dev *rio_dev_get(struct rio_dev *rdev) rdev 55 drivers/rapidio/rio-driver.c if (rdev) rdev 56 drivers/rapidio/rio-driver.c get_device(&rdev->dev); rdev 58 drivers/rapidio/rio-driver.c return rdev; rdev 70 drivers/rapidio/rio-driver.c void rio_dev_put(struct rio_dev *rdev) rdev 72 drivers/rapidio/rio-driver.c if (rdev) rdev 73 drivers/rapidio/rio-driver.c put_device(&rdev->dev); rdev 85 drivers/rapidio/rio-driver.c struct rio_dev *rdev = to_rio_dev(dev); rdev 89 drivers/rapidio/rio-driver.c if (!rdev->driver && rdrv->probe) { rdev 92 drivers/rapidio/rio-driver.c id = rio_match_device(rdrv->id_table, rdev); rdev 93 drivers/rapidio/rio-driver.c rio_dev_get(rdev); rdev 95 drivers/rapidio/rio-driver.c error = rdrv->probe(rdev, id); rdev 97 drivers/rapidio/rio-driver.c rdev->driver = rdrv; rdev 100 drivers/rapidio/rio-driver.c rio_dev_put(rdev); rdev 116 drivers/rapidio/rio-driver.c struct rio_dev *rdev = to_rio_dev(dev); rdev 117 drivers/rapidio/rio-driver.c struct rio_driver *rdrv = rdev->driver; rdev 121 drivers/rapidio/rio-driver.c rdrv->remove(rdev); rdev 122 drivers/rapidio/rio-driver.c rdev->driver = NULL; rdev 125 drivers/rapidio/rio-driver.c rio_dev_put(rdev); rdev 132 drivers/rapidio/rio-driver.c struct rio_dev *rdev = to_rio_dev(dev); rdev 133 drivers/rapidio/rio-driver.c struct rio_driver *rdrv = rdev->driver; rdev 138 drivers/rapidio/rio-driver.c rdrv->shutdown(rdev); rdev 174 drivers/rapidio/rio-driver.c void rio_attach_device(struct rio_dev *rdev) rdev 176 drivers/rapidio/rio-driver.c rdev->dev.bus = &rio_bus_type; rdev 192 drivers/rapidio/rio-driver.c struct rio_dev *rdev = to_rio_dev(dev); rdev 200 drivers/rapidio/rio-driver.c found_id = rio_match_device(id, rdev); rdev 210 drivers/rapidio/rio-driver.c struct rio_dev *rdev; rdev 215 drivers/rapidio/rio-driver.c rdev = to_rio_dev(dev); rdev 216 drivers/rapidio/rio-driver.c if (!rdev) rdev 220 drivers/rapidio/rio-driver.c rdev->vid, rdev->did, rdev->asm_vid, rdev->asm_did)) rdev 36 drivers/rapidio/rio-scan.c static void rio_init_em(struct rio_dev *rdev); rdev 194 drivers/rapidio/rio-scan.c struct rio_dev *rdev; rdev 208 drivers/rapidio/rio-scan.c list_for_each_entry(rdev, &net->devices, net_list) { rdev 209 drivers/rapidio/rio-scan.c rio_write_config_32(rdev, RIO_HOST_DID_LOCK_CSR, rdev 211 drivers/rapidio/rio-scan.c rio_read_config_32(rdev, RIO_HOST_DID_LOCK_CSR, &result); rdev 215 drivers/rapidio/rio-scan.c rdev->vid, rdev->did); rdev 220 drivers/rapidio/rio-scan.c rio_read_config_32(rdev, rdev 221 drivers/rapidio/rio-scan.c rdev->phys_efptr + RIO_PORT_GEN_CTL_CSR, rdev 224 drivers/rapidio/rio-scan.c rio_write_config_32(rdev, rdev 225 drivers/rapidio/rio-scan.c rdev->phys_efptr + RIO_PORT_GEN_CTL_CSR, rdev 284 drivers/rapidio/rio-scan.c struct rio_dev *rdev; rdev 286 drivers/rapidio/rio-scan.c rdev = to_rio_dev(dev); rdev 287 drivers/rapidio/rio-scan.c kfree(rdev); rdev 299 drivers/rapidio/rio-scan.c static int rio_is_switch(struct rio_dev *rdev) rdev 301 drivers/rapidio/rio-scan.c if (rdev->pef & RIO_PEF_SWITCH) rdev 327 drivers/rapidio/rio-scan.c struct rio_dev *rdev; rdev 347 drivers/rapidio/rio-scan.c rdev = kzalloc(size, GFP_KERNEL); rdev 348 drivers/rapidio/rio-scan.c if (!rdev) rdev 351 drivers/rapidio/rio-scan.c rdev->net = net; rdev 352 drivers/rapidio/rio-scan.c rdev->pef = result; rdev 353 drivers/rapidio/rio-scan.c rdev->swpinfo = swpinfo; rdev 356 drivers/rapidio/rio-scan.c rdev->did = result >> 16; rdev 357 drivers/rapidio/rio-scan.c rdev->vid = result & 0xffff; rdev 359 drivers/rapidio/rio-scan.c &rdev->device_rev); rdev 362 drivers/rapidio/rio-scan.c rdev->asm_did = result >> 16; rdev 363 drivers/rapidio/rio-scan.c rdev->asm_vid = result & 0xffff; rdev 366 drivers/rapidio/rio-scan.c rdev->asm_rev = result >> 16; rdev 367 drivers/rapidio/rio-scan.c if (rdev->pef & RIO_PEF_EXT_FEATURES) { rdev 368 drivers/rapidio/rio-scan.c rdev->efptr = result & 0xffff; rdev 369 drivers/rapidio/rio-scan.c rdev->phys_efptr = rio_mport_get_physefb(port, 0, destid, rdev 370 drivers/rapidio/rio-scan.c hopcount, &rdev->phys_rmap); rdev 372 drivers/rapidio/rio-scan.c __func__, rdev->phys_rmap); rdev 374 drivers/rapidio/rio-scan.c rdev->em_efptr = rio_mport_get_feature(port, 0, destid, rdev 376 drivers/rapidio/rio-scan.c if (!rdev->em_efptr) rdev 377 drivers/rapidio/rio-scan.c rdev->em_efptr = rio_mport_get_feature(port, 0, destid, rdev 382 drivers/rapidio/rio-scan.c &rdev->src_ops); rdev 384 drivers/rapidio/rio-scan.c &rdev->dst_ops); rdev 394 drivers/rapidio/rio-scan.c rdev->comp_tag = next_comptag++; rdev 395 drivers/rapidio/rio-scan.c rdev->do_enum = true; rdev 399 drivers/rapidio/rio-scan.c &rdev->comp_tag); rdev 402 drivers/rapidio/rio-scan.c if (rio_device_has_destid(port, rdev->src_ops, rdev->dst_ops)) { rdev 405 drivers/rapidio/rio-scan.c rdev->destid = next_destid; rdev 408 drivers/rapidio/rio-scan.c rdev->destid = rio_get_device_id(port, destid, hopcount); rdev 410 drivers/rapidio/rio-scan.c rdev->hopcount = 0xff; rdev 415 drivers/rapidio/rio-scan.c rdev->destid = destid; rdev 416 drivers/rapidio/rio-scan.c rdev->hopcount = hopcount; rdev 420 drivers/rapidio/rio-scan.c if (rio_is_switch(rdev)) { rdev 421 drivers/rapidio/rio-scan.c rswitch = rdev->rswitch; rdev 433 drivers/rapidio/rio-scan.c dev_set_name(&rdev->dev, "%02x:s:%04x", rdev->net->id, rdev 434 drivers/rapidio/rio-scan.c rdev->comp_tag & RIO_CTAG_UDEVID); rdev 437 drivers/rapidio/rio-scan.c rio_route_clr_table(rdev, RIO_GLOBAL_TABLE, 0); rdev 443 drivers/rapidio/rio-scan.c dev_set_name(&rdev->dev, "%02x:e:%04x", rdev->net->id, rdev 444 drivers/rapidio/rio-scan.c rdev->comp_tag & RIO_CTAG_UDEVID); rdev 447 drivers/rapidio/rio-scan.c rdev->dev.parent = &net->dev; rdev 448 drivers/rapidio/rio-scan.c rio_attach_device(rdev); rdev 449 drivers/rapidio/rio-scan.c rdev->dev.release = rio_release_dev; rdev 450 drivers/rapidio/rio-scan.c rdev->dma_mask = DMA_BIT_MASK(32); rdev 451 drivers/rapidio/rio-scan.c rdev->dev.dma_mask = &rdev->dma_mask; rdev 452 drivers/rapidio/rio-scan.c rdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); rdev 454 drivers/rapidio/rio-scan.c if (rdev->dst_ops & RIO_DST_OPS_DOORBELL) rdev 455 drivers/rapidio/rio-scan.c rio_init_dbell_res(&rdev->riores[RIO_DOORBELL_RESOURCE], rdev 458 drivers/rapidio/rio-scan.c ret = rio_add_device(rdev); rdev 462 drivers/rapidio/rio-scan.c rio_dev_get(rdev); rdev 464 drivers/rapidio/rio-scan.c return rdev; rdev 470 drivers/rapidio/rio-scan.c kfree(rdev); rdev 485 drivers/rapidio/rio-scan.c rio_sport_is_active(struct rio_dev *rdev, int sp) rdev 489 drivers/rapidio/rio-scan.c rio_read_config_32(rdev, RIO_DEV_PORT_N_ERR_STS_CSR(rdev, sp), rdev 527 drivers/rapidio/rio-scan.c struct rio_dev *rdev; rdev 547 drivers/rapidio/rio-scan.c rdev = rio_get_comptag((regval & 0xffff), NULL); rdev 549 drivers/rapidio/rio-scan.c if (rdev && prev && rio_is_switch(prev)) { rdev 551 drivers/rapidio/rio-scan.c rio_name(rdev)); rdev 552 drivers/rapidio/rio-scan.c prev->rswitch->nextdev[prev_port] = rdev; rdev 581 drivers/rapidio/rio-scan.c rdev = rio_setup_device(net, port, RIO_ANY_DESTID(port->sys_size), rdev 583 drivers/rapidio/rio-scan.c if (rdev) { rdev 584 drivers/rapidio/rio-scan.c rdev->prev = prev; rdev 586 drivers/rapidio/rio-scan.c prev->rswitch->nextdev[prev_port] = rdev; rdev 590 drivers/rapidio/rio-scan.c if (rio_is_switch(rdev)) { rdev 597 drivers/rapidio/rio-scan.c sw_inport = RIO_GET_PORT_NUM(rdev->swpinfo); rdev 598 drivers/rapidio/rio-scan.c rio_route_add_entry(rdev, RIO_GLOBAL_TABLE, rdev 600 drivers/rapidio/rio-scan.c rdev->rswitch->route_table[port->host_deviceid] = sw_inport; rdev 605 drivers/rapidio/rio-scan.c rio_route_add_entry(rdev, RIO_GLOBAL_TABLE, rdev 607 drivers/rapidio/rio-scan.c rdev->rswitch->route_table[destid] = sw_inport; rdev 613 drivers/rapidio/rio-scan.c rio_name(rdev), rdev->vid, rdev->did, rdev 614 drivers/rapidio/rio-scan.c RIO_GET_TOTAL_PORTS(rdev->swpinfo)); rdev 617 drivers/rapidio/rio-scan.c port_num < RIO_GET_TOTAL_PORTS(rdev->swpinfo); rdev 623 drivers/rapidio/rio-scan.c rdev->rswitch->port_ok |= (1 << port_num); rdev 629 drivers/rapidio/rio-scan.c if (rio_sport_is_active(rdev, port_num)) { rdev 636 drivers/rapidio/rio-scan.c rdev->rswitch->port_ok |= (1 << port_num); rdev 637 drivers/rapidio/rio-scan.c rio_route_add_entry(rdev, RIO_GLOBAL_TABLE, rdev 642 drivers/rapidio/rio-scan.c rdev, port_num) < 0) rdev 651 drivers/rapidio/rio-scan.c rio_route_add_entry(rdev, rdev 656 drivers/rapidio/rio-scan.c rdev->rswitch-> rdev 668 drivers/rapidio/rio-scan.c if (rdev->em_efptr) rdev 669 drivers/rapidio/rio-scan.c rio_set_port_lockout(rdev, port_num, 1); rdev 671 drivers/rapidio/rio-scan.c rdev->rswitch->port_ok &= ~(1 << port_num); rdev 676 drivers/rapidio/rio-scan.c if ((rdev->src_ops & RIO_SRC_OPS_PORT_WRITE) && rdev 677 drivers/rapidio/rio-scan.c (rdev->em_efptr)) { rdev 678 drivers/rapidio/rio-scan.c rio_write_config_32(rdev, rdev 679 drivers/rapidio/rio-scan.c rdev->em_efptr + RIO_EM_PW_TGT_DEVID, rdev 684 drivers/rapidio/rio-scan.c rio_init_em(rdev); rdev 690 drivers/rapidio/rio-scan.c rdev->destid = sw_destid; rdev 693 drivers/rapidio/rio-scan.c rio_name(rdev), rdev->vid, rdev->did); rdev 732 drivers/rapidio/rio-scan.c struct rio_dev *rdev; rdev 736 drivers/rapidio/rio-scan.c if ((rdev = rio_setup_device(net, port, destid, hopcount, 0))) { rdev 737 drivers/rapidio/rio-scan.c rdev->prev = prev; rdev 739 drivers/rapidio/rio-scan.c prev->rswitch->nextdev[prev_port] = rdev; rdev 743 drivers/rapidio/rio-scan.c if (rio_is_switch(rdev)) { rdev 745 drivers/rapidio/rio-scan.c rdev->destid = destid; rdev 749 drivers/rapidio/rio-scan.c rio_name(rdev), rdev->vid, rdev->did, rdev 750 drivers/rapidio/rio-scan.c RIO_GET_TOTAL_PORTS(rdev->swpinfo)); rdev 752 drivers/rapidio/rio-scan.c port_num < RIO_GET_TOTAL_PORTS(rdev->swpinfo); rdev 754 drivers/rapidio/rio-scan.c if (RIO_GET_PORT_NUM(rdev->swpinfo) == port_num) rdev 757 drivers/rapidio/rio-scan.c if (rio_sport_is_active(rdev, port_num)) { rdev 767 drivers/rapidio/rio-scan.c rio_route_get_entry(rdev, rdev 779 drivers/rapidio/rio-scan.c hopcount + 1, rdev, port_num) < 0) rdev 785 drivers/rapidio/rio-scan.c rio_name(rdev), rdev->vid, rdev->did); rdev 888 drivers/rapidio/rio-scan.c struct rio_dev *rdev, *swrdev; rdev 893 drivers/rapidio/rio-scan.c list_for_each_entry(rdev, &net->devices, net_list) { rdev 895 drivers/rapidio/rio-scan.c destid = rdev->destid; rdev 899 drivers/rapidio/rio-scan.c if (rio_is_switch(rdev) && (rdev->rswitch == rswitch)) rdev 926 drivers/rapidio/rio-scan.c static void rio_init_em(struct rio_dev *rdev) rdev 928 drivers/rapidio/rio-scan.c if (rio_is_switch(rdev) && (rdev->em_efptr) && rdev 929 drivers/rapidio/rio-scan.c rdev->rswitch->ops && rdev->rswitch->ops->em_init) { rdev 930 drivers/rapidio/rio-scan.c rdev->rswitch->ops->em_init(rdev); rdev 1025 drivers/rapidio/rio-scan.c struct rio_dev *rdev; rdev 1030 drivers/rapidio/rio-scan.c rdev = sw_to_rio_dev(rswitch); rdev 1032 drivers/rapidio/rio-scan.c rio_lock_device(net->hport, rdev->destid, rdev 1033 drivers/rapidio/rio-scan.c rdev->hopcount, 1000); rdev 1037 drivers/rapidio/rio-scan.c if (rio_route_get_entry(rdev, RIO_GLOBAL_TABLE, rdev 1043 drivers/rapidio/rio-scan.c rio_unlock_device(net->hport, rdev->destid, rdev->hopcount); rdev 22 drivers/rapidio/rio-sysfs.c struct rio_dev *rdev = to_rio_dev(dev); \ rdev 24 drivers/rapidio/rio-sysfs.c return sprintf(buf, format_string, rdev->field); \ rdev 39 drivers/rapidio/rio-sysfs.c struct rio_dev *rdev = to_rio_dev(dev); rdev 43 drivers/rapidio/rio-sysfs.c for (i = 0; i < RIO_MAX_ROUTE_ENTRIES(rdev->net->hport->sys_size); rdev 45 drivers/rapidio/rio-sysfs.c if (rdev->rswitch->route_table[i] == RIO_INVALID_ROUTE) rdev 49 drivers/rapidio/rio-sysfs.c rdev->rswitch->route_table[i]); rdev 59 drivers/rapidio/rio-sysfs.c struct rio_dev *rdev = to_rio_dev(dev); rdev 62 drivers/rapidio/rio-sysfs.c (rdev->prev) ? rio_name(rdev->prev) : "root"); rdev 69 drivers/rapidio/rio-sysfs.c struct rio_dev *rdev = to_rio_dev(dev); rdev 73 drivers/rapidio/rio-sysfs.c if (rdev->pef & RIO_PEF_SWITCH) { rdev 74 drivers/rapidio/rio-sysfs.c for (i = 0; i < RIO_GET_TOTAL_PORTS(rdev->swpinfo); i++) { rdev 75 drivers/rapidio/rio-sysfs.c if (rdev->rswitch->nextdev[i]) rdev 77 drivers/rapidio/rio-sysfs.c rio_name(rdev->rswitch->nextdev[i])); rdev 90 drivers/rapidio/rio-sysfs.c struct rio_dev *rdev = to_rio_dev(dev); rdev 93 drivers/rapidio/rio-sysfs.c rdev->vid, rdev->did, rdev->asm_vid, rdev->asm_did); rdev 262 drivers/rapidio/rio-sysfs.c struct rio_dev *rdev = to_rio_dev(kobj_to_dev(kobj)); rdev 265 drivers/rapidio/rio-sysfs.c if (!(rdev->pef & RIO_PEF_SWITCH) && rdev 172 drivers/rapidio/rio.c int rio_add_device(struct rio_dev *rdev) rdev 176 drivers/rapidio/rio.c atomic_set(&rdev->state, RIO_DEVICE_RUNNING); rdev 177 drivers/rapidio/rio.c err = device_register(&rdev->dev); rdev 182 drivers/rapidio/rio.c list_add_tail(&rdev->global_list, &rio_devices); rdev 183 drivers/rapidio/rio.c if (rdev->net) { rdev 184 drivers/rapidio/rio.c list_add_tail(&rdev->net_list, &rdev->net->devices); rdev 185 drivers/rapidio/rio.c if (rdev->pef & RIO_PEF_SWITCH) rdev 186 drivers/rapidio/rio.c list_add_tail(&rdev->rswitch->node, rdev 187 drivers/rapidio/rio.c &rdev->net->switches); rdev 203 drivers/rapidio/rio.c void rio_del_device(struct rio_dev *rdev, enum rio_device_state state) rdev 205 drivers/rapidio/rio.c pr_debug("RIO: %s: removing %s\n", __func__, rio_name(rdev)); rdev 206 drivers/rapidio/rio.c atomic_set(&rdev->state, state); rdev 208 drivers/rapidio/rio.c list_del(&rdev->global_list); rdev 209 drivers/rapidio/rio.c if (rdev->net) { rdev 210 drivers/rapidio/rio.c list_del(&rdev->net_list); rdev 211 drivers/rapidio/rio.c if (rdev->pef & RIO_PEF_SWITCH) { rdev 212 drivers/rapidio/rio.c list_del(&rdev->rswitch->node); rdev 213 drivers/rapidio/rio.c kfree(rdev->rswitch->route_table); rdev 217 drivers/rapidio/rio.c device_unregister(&rdev->dev); rdev 515 drivers/rapidio/rio.c struct resource *rio_request_outb_dbell(struct rio_dev *rdev, u16 start, rdev 524 drivers/rapidio/rio.c if (request_resource(&rdev->riores[RIO_DOORBELL_RESOURCE], res) rdev 543 drivers/rapidio/rio.c int rio_release_outb_dbell(struct rio_dev *rdev, struct resource *res) rdev 620 drivers/rapidio/rio.c int rio_request_inb_pwrite(struct rio_dev *rdev, rdev 621 drivers/rapidio/rio.c int (*pwcback)(struct rio_dev *rdev, union rio_pw_msg *msg, int step)) rdev 626 drivers/rapidio/rio.c if (rdev->pwcback) rdev 629 drivers/rapidio/rio.c rdev->pwcback = pwcback; rdev 644 drivers/rapidio/rio.c int rio_release_inb_pwrite(struct rio_dev *rdev) rdev 649 drivers/rapidio/rio.c if (rdev->pwcback) { rdev 650 drivers/rapidio/rio.c rdev->pwcback = NULL; rdev 843 drivers/rapidio/rio.c struct rio_dev *rdev; rdev 849 drivers/rapidio/rio.c rdev = rio_dev_g(n); rdev 850 drivers/rapidio/rio.c if (rdev->comp_tag == comp_tag) rdev 854 drivers/rapidio/rio.c rdev = NULL; rdev 857 drivers/rapidio/rio.c return rdev; rdev 867 drivers/rapidio/rio.c int rio_set_port_lockout(struct rio_dev *rdev, u32 pnum, int lock) rdev 871 drivers/rapidio/rio.c rio_read_config_32(rdev, rdev 872 drivers/rapidio/rio.c RIO_DEV_PORT_N_CTL_CSR(rdev, pnum), rdev 879 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 880 drivers/rapidio/rio.c RIO_DEV_PORT_N_CTL_CSR(rdev, pnum), rdev 954 drivers/rapidio/rio.c rio_chk_dev_route(struct rio_dev *rdev, struct rio_dev **nrdev, int *npnum) rdev 961 drivers/rapidio/rio.c while (rdev->prev && (rdev->prev->pef & RIO_PEF_SWITCH)) { rdev 962 drivers/rapidio/rio.c if (!rio_read_config_32(rdev->prev, RIO_DEV_ID_CAR, &result)) { rdev 963 drivers/rapidio/rio.c prev = rdev->prev; rdev 966 drivers/rapidio/rio.c rdev = rdev->prev; rdev 972 drivers/rapidio/rio.c p_port = prev->rswitch->route_table[rdev->destid]; rdev 981 drivers/rapidio/rio.c pr_debug("RIO: failed to trace route to %s\n", rio_name(rdev)); rdev 1014 drivers/rapidio/rio.c static int rio_chk_dev_access(struct rio_dev *rdev) rdev 1016 drivers/rapidio/rio.c return rio_mport_chk_dev_access(rdev->net->hport, rdev 1017 drivers/rapidio/rio.c rdev->destid, rdev->hopcount); rdev 1028 drivers/rapidio/rio.c rio_get_input_status(struct rio_dev *rdev, int pnum, u32 *lnkresp) rdev 1036 drivers/rapidio/rio.c rio_read_config_32(rdev, rdev 1037 drivers/rapidio/rio.c RIO_DEV_PORT_N_MNT_RSP_CSR(rdev, pnum), rdev 1043 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 1044 drivers/rapidio/rio.c RIO_DEV_PORT_N_MNT_REQ_CSR(rdev, pnum), rdev 1054 drivers/rapidio/rio.c rio_read_config_32(rdev, rdev 1055 drivers/rapidio/rio.c RIO_DEV_PORT_N_MNT_RSP_CSR(rdev, pnum), rdev 1079 drivers/rapidio/rio.c static int rio_clr_err_stopped(struct rio_dev *rdev, u32 pnum, u32 err_status) rdev 1081 drivers/rapidio/rio.c struct rio_dev *nextdev = rdev->rswitch->nextdev[pnum]; rdev 1086 drivers/rapidio/rio.c rio_read_config_32(rdev, rdev 1087 drivers/rapidio/rio.c RIO_DEV_PORT_N_ERR_STS_CSR(rdev, pnum), rdev 1095 drivers/rapidio/rio.c if (rio_get_input_status(rdev, pnum, ®val)) { rdev 1104 drivers/rapidio/rio.c rio_read_config_32(rdev, rdev 1105 drivers/rapidio/rio.c RIO_DEV_PORT_N_ACK_STS_CSR(rdev, pnum), rdev 1122 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 1123 drivers/rapidio/rio.c RIO_DEV_PORT_N_ACK_STS_CSR(rdev, pnum), rdev 1142 drivers/rapidio/rio.c rio_read_config_32(rdev, RIO_DEV_PORT_N_ERR_STS_CSR(rdev, pnum), rdev 1153 drivers/rapidio/rio.c rio_read_config_32(rdev, RIO_DEV_PORT_N_ERR_STS_CSR(rdev, pnum), rdev 1172 drivers/rapidio/rio.c struct rio_dev *rdev; rdev 1190 drivers/rapidio/rio.c rdev = rio_get_comptag((pw_msg->em.comptag & RIO_CTAG_UDEVID), NULL); rdev 1191 drivers/rapidio/rio.c if (rdev) { rdev 1192 drivers/rapidio/rio.c pr_debug("RIO: Port-Write message from %s\n", rio_name(rdev)); rdev 1204 drivers/rapidio/rio.c if (rdev && rdev->pwcback) { rdev 1205 drivers/rapidio/rio.c rc = rdev->pwcback(rdev, pw_msg, 0); rdev 1215 drivers/rapidio/rio.c if (!rdev) rdev 1229 drivers/rapidio/rio.c if (rio_chk_dev_access(rdev)) { rdev 1235 drivers/rapidio/rio.c if (rio_chk_dev_route(rdev, &rdev, &portnum)) { rdev 1237 drivers/rapidio/rio.c rio_name(rdev)); rdev 1244 drivers/rapidio/rio.c if (!(rdev->pef & RIO_PEF_SWITCH)) rdev 1247 drivers/rapidio/rio.c if (rdev->phys_efptr == 0) { rdev 1249 drivers/rapidio/rio.c rio_name(rdev)); rdev 1256 drivers/rapidio/rio.c if (rdev->rswitch->ops && rdev->rswitch->ops->em_handle) rdev 1257 drivers/rapidio/rio.c rdev->rswitch->ops->em_handle(rdev, portnum); rdev 1259 drivers/rapidio/rio.c rio_read_config_32(rdev, RIO_DEV_PORT_N_ERR_STS_CSR(rdev, portnum), rdev 1265 drivers/rapidio/rio.c if (!(rdev->rswitch->port_ok & (1 << portnum))) { rdev 1266 drivers/rapidio/rio.c rdev->rswitch->port_ok |= (1 << portnum); rdev 1267 drivers/rapidio/rio.c rio_set_port_lockout(rdev, portnum, 0); rdev 1270 drivers/rapidio/rio.c rio_name(rdev), portnum); rdev 1279 drivers/rapidio/rio.c if (rio_clr_err_stopped(rdev, portnum, err_status)) rdev 1280 drivers/rapidio/rio.c rio_clr_err_stopped(rdev, portnum, 0); rdev 1284 drivers/rapidio/rio.c if (rdev->rswitch->port_ok & (1 << portnum)) { rdev 1285 drivers/rapidio/rio.c rdev->rswitch->port_ok &= ~(1 << portnum); rdev 1286 drivers/rapidio/rio.c rio_set_port_lockout(rdev, portnum, 1); rdev 1288 drivers/rapidio/rio.c if (rdev->phys_rmap == 1) { rdev 1289 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 1290 drivers/rapidio/rio.c RIO_DEV_PORT_N_ACK_STS_CSR(rdev, portnum), rdev 1293 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 1294 drivers/rapidio/rio.c RIO_DEV_PORT_N_OB_ACK_CSR(rdev, portnum), rdev 1296 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 1297 drivers/rapidio/rio.c RIO_DEV_PORT_N_IB_ACK_CSR(rdev, portnum), rdev 1303 drivers/rapidio/rio.c rio_name(rdev), portnum); rdev 1307 drivers/rapidio/rio.c rio_read_config_32(rdev, rdev 1308 drivers/rapidio/rio.c rdev->em_efptr + RIO_EM_PN_ERR_DETECT(portnum), &em_perrdet); rdev 1313 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 1314 drivers/rapidio/rio.c rdev->em_efptr + RIO_EM_PN_ERR_DETECT(portnum), 0); rdev 1317 drivers/rapidio/rio.c rio_read_config_32(rdev, rdev 1318 drivers/rapidio/rio.c rdev->em_efptr + RIO_EM_LTL_ERR_DETECT, &em_ltlerrdet); rdev 1323 drivers/rapidio/rio.c rio_write_config_32(rdev, rdev 1324 drivers/rapidio/rio.c rdev->em_efptr + RIO_EM_LTL_ERR_DETECT, 0); rdev 1328 drivers/rapidio/rio.c rio_write_config_32(rdev, RIO_DEV_PORT_N_ERR_STS_CSR(rdev, portnum), rdev 1436 drivers/rapidio/rio.c struct rio_dev *rdev; rdev 1443 drivers/rapidio/rio.c rdev = rio_dev_g(n); rdev 1444 drivers/rapidio/rio.c if ((vid == RIO_ANY_ID || rdev->vid == vid) && rdev 1445 drivers/rapidio/rio.c (did == RIO_ANY_ID || rdev->did == did) && rdev 1446 drivers/rapidio/rio.c (asm_vid == RIO_ANY_ID || rdev->asm_vid == asm_vid) && rdev 1447 drivers/rapidio/rio.c (asm_did == RIO_ANY_ID || rdev->asm_did == asm_did)) rdev 1451 drivers/rapidio/rio.c rdev = NULL; rdev 1454 drivers/rapidio/rio.c rdev = rio_dev_get(rdev); rdev 1456 drivers/rapidio/rio.c return rdev; rdev 1679 drivers/rapidio/rio.c int rio_route_add_entry(struct rio_dev *rdev, rdev 1683 drivers/rapidio/rio.c struct rio_switch_ops *ops = rdev->rswitch->ops; rdev 1686 drivers/rapidio/rio.c rc = rio_lock_device(rdev->net->hport, rdev->destid, rdev 1687 drivers/rapidio/rio.c rdev->hopcount, 1000); rdev 1692 drivers/rapidio/rio.c spin_lock(&rdev->rswitch->lock); rdev 1695 drivers/rapidio/rio.c rc = rio_std_route_add_entry(rdev->net->hport, rdev->destid, rdev 1696 drivers/rapidio/rio.c rdev->hopcount, table, rdev 1699 drivers/rapidio/rio.c rc = ops->add_entry(rdev->net->hport, rdev->destid, rdev 1700 drivers/rapidio/rio.c rdev->hopcount, table, route_destid, rdev 1705 drivers/rapidio/rio.c spin_unlock(&rdev->rswitch->lock); rdev 1708 drivers/rapidio/rio.c rio_unlock_device(rdev->net->hport, rdev->destid, rdev 1709 drivers/rapidio/rio.c rdev->hopcount); rdev 1732 drivers/rapidio/rio.c int rio_route_get_entry(struct rio_dev *rdev, u16 table, rdev 1736 drivers/rapidio/rio.c struct rio_switch_ops *ops = rdev->rswitch->ops; rdev 1739 drivers/rapidio/rio.c rc = rio_lock_device(rdev->net->hport, rdev->destid, rdev 1740 drivers/rapidio/rio.c rdev->hopcount, 1000); rdev 1745 drivers/rapidio/rio.c spin_lock(&rdev->rswitch->lock); rdev 1748 drivers/rapidio/rio.c rc = rio_std_route_get_entry(rdev->net->hport, rdev->destid, rdev 1749 drivers/rapidio/rio.c rdev->hopcount, table, rdev 1752 drivers/rapidio/rio.c rc = ops->get_entry(rdev->net->hport, rdev->destid, rdev 1753 drivers/rapidio/rio.c rdev->hopcount, table, route_destid, rdev 1758 drivers/rapidio/rio.c spin_unlock(&rdev->rswitch->lock); rdev 1761 drivers/rapidio/rio.c rio_unlock_device(rdev->net->hport, rdev->destid, rdev 1762 drivers/rapidio/rio.c rdev->hopcount); rdev 1781 drivers/rapidio/rio.c int rio_route_clr_table(struct rio_dev *rdev, u16 table, int lock) rdev 1784 drivers/rapidio/rio.c struct rio_switch_ops *ops = rdev->rswitch->ops; rdev 1787 drivers/rapidio/rio.c rc = rio_lock_device(rdev->net->hport, rdev->destid, rdev 1788 drivers/rapidio/rio.c rdev->hopcount, 1000); rdev 1793 drivers/rapidio/rio.c spin_lock(&rdev->rswitch->lock); rdev 1796 drivers/rapidio/rio.c rc = rio_std_route_clr_table(rdev->net->hport, rdev->destid, rdev 1797 drivers/rapidio/rio.c rdev->hopcount, table); rdev 1799 drivers/rapidio/rio.c rc = ops->clr_table(rdev->net->hport, rdev->destid, rdev 1800 drivers/rapidio/rio.c rdev->hopcount, table); rdev 1805 drivers/rapidio/rio.c spin_unlock(&rdev->rswitch->lock); rdev 1808 drivers/rapidio/rio.c rio_unlock_device(rdev->net->hport, rdev->destid, rdev 1809 drivers/rapidio/rio.c rdev->hopcount); rdev 1849 drivers/rapidio/rio.c struct dma_chan *rio_request_dma(struct rio_dev *rdev) rdev 1851 drivers/rapidio/rio.c return rio_request_mport_dma(rdev->net->hport); rdev 1918 drivers/rapidio/rio.c struct dma_async_tx_descriptor *rio_dma_prep_slave_sg(struct rio_dev *rdev, rdev 1922 drivers/rapidio/rio.c return rio_dma_prep_xfer(dchan, rdev->destid, data, direction, flags); rdev 2282 drivers/rapidio/rio.c struct rio_dev *rdev = to_rio_dev(dev); rdev 2285 drivers/rapidio/rio.c rio_del_device(rdev, RIO_DEVICE_SHUTDOWN); rdev 29 drivers/rapidio/rio.h extern int rio_route_add_entry(struct rio_dev *rdev, rdev 31 drivers/rapidio/rio.h extern int rio_route_get_entry(struct rio_dev *rdev, u16 table, rdev 33 drivers/rapidio/rio.h extern int rio_route_clr_table(struct rio_dev *rdev, u16 table, int lock); rdev 34 drivers/rapidio/rio.h extern int rio_set_port_lockout(struct rio_dev *rdev, u32 pnum, int lock); rdev 39 drivers/rapidio/rio.h extern int rio_add_device(struct rio_dev *rdev); rdev 40 drivers/rapidio/rio.h extern void rio_del_device(struct rio_dev *rdev, enum rio_device_state state); rdev 45 drivers/rapidio/rio.h extern void rio_attach_device(struct rio_dev *rdev); rdev 140 drivers/rapidio/rio_cm.c struct rio_dev *rdev; rdev 181 drivers/rapidio/rio_cm.c struct rio_dev *rdev; /* remote RapidIO device */ rdev 198 drivers/rapidio/rio_cm.c struct rio_dev *rdev; rdev 226 drivers/rapidio/rio_cm.c static int riocm_post_send(struct cm_dev *cm, struct rio_dev *rdev, rdev 678 drivers/rapidio/rio_cm.c rc = rio_add_outb_message(cm->mport, req->rdev, cmbox, rdev 703 drivers/rapidio/rio_cm.c static int riocm_queue_req(struct cm_dev *cm, struct rio_dev *rdev, rdev 713 drivers/rapidio/rio_cm.c treq->rdev = rdev; rdev 733 drivers/rapidio/rio_cm.c static int riocm_post_send(struct cm_dev *cm, struct rio_dev *rdev, rdev 753 drivers/rapidio/rio_cm.c rc = rio_add_outb_message(cm->mport, rdev, cmbox, buffer, len); rdev 756 drivers/rapidio/rio_cm.c buffer, rdev->destid, cm->tx_slot, cm->tx_cnt); rdev 823 drivers/rapidio/rio_cm.c ret = riocm_post_send(ch->cmdev, ch->rdev, buf, len); rdev 960 drivers/rapidio/rio_cm.c ch->rdev = peer->rdev; rdev 976 drivers/rapidio/rio_cm.c hdr->bhdr.dst_id = htonl(peer->rdev->destid); rdev 989 drivers/rapidio/rio_cm.c ret = riocm_post_send(cm, peer->rdev, hdr, sizeof(*hdr)); rdev 994 drivers/rapidio/rio_cm.c ret = riocm_queue_req(cm, peer->rdev, hdr, sizeof(*hdr)); rdev 1043 drivers/rapidio/rio_cm.c ret = riocm_post_send(ch->cmdev, ch->rdev, hdr, sizeof(*hdr)); rdev 1046 drivers/rapidio/rio_cm.c ch->rdev, hdr, sizeof(*hdr))) rdev 1052 drivers/rapidio/rio_cm.c ch->id, rio_name(ch->rdev), ret); rdev 1155 drivers/rapidio/rio_cm.c if (peer->rdev->destid == new_ch->rem_destid) { rdev 1157 drivers/rapidio/rio_cm.c rio_name(peer->rdev)); rdev 1170 drivers/rapidio/rio_cm.c new_ch->rdev = peer->rdev; rdev 1417 drivers/rapidio/rio_cm.c ret = riocm_post_send(ch->cmdev, ch->rdev, hdr, sizeof(*hdr)); rdev 1419 drivers/rapidio/rio_cm.c if (ret == -EBUSY && !riocm_queue_req(ch->cmdev, ch->rdev, rdev 1597 drivers/rapidio/rio_cm.c *entry_ptr = (u32)peer->rdev->destid; rdev 1812 drivers/rapidio/rio_cm.c if (peer->rdev->destid == chan.remote_destid) { rdev 1947 drivers/rapidio/rio_cm.c struct rio_dev *rdev = to_rio_dev(dev); rdev 1951 drivers/rapidio/rio_cm.c if (!dev_cm_capable(rdev)) rdev 1954 drivers/rapidio/rio_cm.c riocm_debug(RDEV, "(%s)", rio_name(rdev)); rdev 1963 drivers/rapidio/rio_cm.c if (cm->mport == rdev->net->hport) rdev 1972 drivers/rapidio/rio_cm.c peer->rdev = rdev; rdev 1990 drivers/rapidio/rio_cm.c struct rio_dev *rdev = to_rio_dev(dev); rdev 1999 drivers/rapidio/rio_cm.c if (!dev_cm_capable(rdev)) rdev 2002 drivers/rapidio/rio_cm.c riocm_debug(RDEV, "(%s)", rio_name(rdev)); rdev 2007 drivers/rapidio/rio_cm.c if (cm->mport == rdev->net->hport) { rdev 2021 drivers/rapidio/rio_cm.c if (peer->rdev == rdev) { rdev 2022 drivers/rapidio/rio_cm.c riocm_debug(RDEV, "removing peer %s", rio_name(rdev)); rdev 2042 drivers/rapidio/rio_cm.c if (ch && ch->rdev == rdev) { rdev 2043 drivers/rapidio/rio_cm.c if (atomic_read(&rdev->state) != RIO_DEVICE_SHUTDOWN) rdev 2231 drivers/rapidio/rio_cm.c riocm_debug(RDEV, "removing peer %s", rio_name(peer->rdev)); rdev 213 drivers/rapidio/switches/idt_gen2.c idtg2_em_init(struct rio_dev *rdev) rdev 223 drivers/rapidio/switches/idt_gen2.c pr_debug("RIO: %s [%d:%d]\n", __func__, rdev->destid, rdev->hopcount); rdev 226 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_PW_INFO_CSR, 0x0000e000); rdev 233 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_LT_ERR_REPORT_EN, rdev 240 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, IDT_DEV_CTRL_1, ®val); rdev 241 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_DEV_CTRL_1, rdev 249 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_PORT_ERR_REPORT_EN_BC, 0x807e8037); rdev 252 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_PORT_ISERR_REPORT_EN_BC, rdev 256 drivers/rapidio/switches/idt_gen2.c tmp = RIO_GET_TOTAL_PORTS(rdev->swpinfo); rdev 258 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, IDT_PORT_OPS(i), ®val); rdev 259 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, rdev 266 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_ERR_CAP, IDT_ERR_CAP_LOG_OVERWR); rdev 273 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_LANE_ERR_REPORT_EN_BC, 0); rdev 278 drivers/rapidio/switches/idt_gen2.c tmp = (rdev->did == RIO_DID_IDTCPS1848) ? 48 : 16; rdev 280 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, IDT_LANE_CTRL(i), ®val); rdev 281 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_LANE_CTRL(i), rdev 290 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_AUX_PORT_ERR_CAP_EN, 0); rdev 293 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_AUX_ERR_REPORT_EN, 0); rdev 296 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_JTAG_CTRL, 0); rdev 299 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, IDT_I2C_MCTRL, ®val); rdev 300 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_I2C_MCTRL, regval & ~IDT_I2C_MCTRL_GENPW); rdev 307 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_CFGBLK_ERR_CAPTURE_EN, 0); rdev 310 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, IDT_CFGBLK_ERR_REPORT, ®val); rdev 311 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_CFGBLK_ERR_REPORT, rdev 315 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, rdev 316 drivers/rapidio/switches/idt_gen2.c rdev->phys_efptr + RIO_PORT_LINKTO_CTL_CSR, 0x8e << 8); rdev 322 drivers/rapidio/switches/idt_gen2.c idtg2_em_handler(struct rio_dev *rdev, u8 portnum) rdev 326 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, rdev 327 drivers/rapidio/switches/idt_gen2.c rdev->em_efptr + RIO_EM_LTL_ERR_DETECT, &em_ltlerrdet); rdev 332 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, rdev 337 drivers/rapidio/switches/idt_gen2.c rio_name(rdev), em_ltlerrdet, regval); rdev 340 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, IDT_ISLTL_ADDRESS_CAP, 0); rdev 345 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, rdev 346 drivers/rapidio/switches/idt_gen2.c rdev->em_efptr + RIO_EM_PN_ERR_DETECT(portnum), &em_perrdet); rdev 353 drivers/rapidio/switches/idt_gen2.c rio_read_config_32(rdev, rdev 357 drivers/rapidio/switches/idt_gen2.c " errors 0x%x\n", rio_name(rdev), regval); rdev 360 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, rdev 371 drivers/rapidio/switches/idt_gen2.c struct rio_dev *rdev = to_rio_dev(dev); rdev 375 drivers/rapidio/switches/idt_gen2.c while (!rio_read_config_32(rdev, IDT_ERR_RD, ®val)) { rdev 389 drivers/rapidio/switches/idt_gen2.c static int idtg2_sysfs(struct rio_dev *rdev, bool create) rdev 391 drivers/rapidio/switches/idt_gen2.c struct device *dev = &rdev->dev; rdev 416 drivers/rapidio/switches/idt_gen2.c static int idtg2_probe(struct rio_dev *rdev, const struct rio_device_id *id) rdev 418 drivers/rapidio/switches/idt_gen2.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 420 drivers/rapidio/switches/idt_gen2.c spin_lock(&rdev->rswitch->lock); rdev 422 drivers/rapidio/switches/idt_gen2.c if (rdev->rswitch->ops) { rdev 423 drivers/rapidio/switches/idt_gen2.c spin_unlock(&rdev->rswitch->lock); rdev 427 drivers/rapidio/switches/idt_gen2.c rdev->rswitch->ops = &idtg2_switch_ops; rdev 429 drivers/rapidio/switches/idt_gen2.c if (rdev->do_enum) { rdev 431 drivers/rapidio/switches/idt_gen2.c rio_write_config_32(rdev, rdev 435 drivers/rapidio/switches/idt_gen2.c spin_unlock(&rdev->rswitch->lock); rdev 438 drivers/rapidio/switches/idt_gen2.c idtg2_sysfs(rdev, true); rdev 443 drivers/rapidio/switches/idt_gen2.c static void idtg2_remove(struct rio_dev *rdev) rdev 445 drivers/rapidio/switches/idt_gen2.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 446 drivers/rapidio/switches/idt_gen2.c spin_lock(&rdev->rswitch->lock); rdev 447 drivers/rapidio/switches/idt_gen2.c if (rdev->rswitch->ops != &idtg2_switch_ops) { rdev 448 drivers/rapidio/switches/idt_gen2.c spin_unlock(&rdev->rswitch->lock); rdev 451 drivers/rapidio/switches/idt_gen2.c rdev->rswitch->ops = NULL; rdev 452 drivers/rapidio/switches/idt_gen2.c spin_unlock(&rdev->rswitch->lock); rdev 454 drivers/rapidio/switches/idt_gen2.c idtg2_sysfs(rdev, false); rdev 161 drivers/rapidio/switches/idt_gen3.c idtg3_em_init(struct rio_dev *rdev) rdev 166 drivers/rapidio/switches/idt_gen3.c pr_debug("RIO: %s [%d:%d]\n", __func__, rdev->destid, rdev->hopcount); rdev 169 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, RIO_EM_DEV_INT_EN, 0); rdev 172 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, rdev->em_efptr + RIO_EM_PW_TX_CTRL, rdev 176 drivers/rapidio/switches/idt_gen3.c tmp = RIO_GET_TOTAL_PORTS(rdev->swpinfo); rdev 179 drivers/rapidio/switches/idt_gen3.c rio_read_config_32(rdev, rdev 180 drivers/rapidio/switches/idt_gen3.c RIO_DEV_PORT_N_ERR_STS_CSR(rdev, i), rdev 186 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, rdev 187 drivers/rapidio/switches/idt_gen3.c rdev->em_efptr + RIO_EM_PN_ERR_DETECT(i), 0); rdev 190 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, rdev 191 drivers/rapidio/switches/idt_gen3.c rdev->em_efptr + RIO_EM_PN_ERRRATE_EN(i), rdev 194 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, RIO_PLM_SPx_PW_EN(i), rdev 200 drivers/rapidio/switches/idt_gen3.c tmp = RIO_GET_PORT_NUM(rdev->swpinfo); rdev 201 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, RIO_PW_ROUTE, 1 << tmp); rdev 205 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, rdev->em_efptr + RIO_EM_PW_TX_CTRL, 0); rdev 208 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, rdev 209 drivers/rapidio/switches/idt_gen3.c rdev->phys_efptr + RIO_PORT_LINKTO_CTL_CSR, 0x8e << 8); rdev 231 drivers/rapidio/switches/idt_gen3.c idtg3_em_handler(struct rio_dev *rdev, u8 pnum) rdev 236 drivers/rapidio/switches/idt_gen3.c rio_read_config_32(rdev, rdev 237 drivers/rapidio/switches/idt_gen3.c RIO_DEV_PORT_N_ERR_STS_CSR(rdev, pnum), rdev 250 drivers/rapidio/switches/idt_gen3.c rio_read_config_32(rdev, RIO_PLM_SPx_IMP_SPEC_CTL(pnum), &rval); rdev 251 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, RIO_PLM_SPx_IMP_SPEC_CTL(pnum), rdev 254 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, RIO_PLM_SPx_IMP_SPEC_CTL(pnum), rval); rdev 270 drivers/rapidio/switches/idt_gen3.c static int idtg3_probe(struct rio_dev *rdev, const struct rio_device_id *id) rdev 272 drivers/rapidio/switches/idt_gen3.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 274 drivers/rapidio/switches/idt_gen3.c spin_lock(&rdev->rswitch->lock); rdev 276 drivers/rapidio/switches/idt_gen3.c if (rdev->rswitch->ops) { rdev 277 drivers/rapidio/switches/idt_gen3.c spin_unlock(&rdev->rswitch->lock); rdev 281 drivers/rapidio/switches/idt_gen3.c rdev->rswitch->ops = &idtg3_switch_ops; rdev 283 drivers/rapidio/switches/idt_gen3.c if (rdev->do_enum) { rdev 288 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, 0x5000 + RIO_BC_RT_CTL_CSR, 0); rdev 291 drivers/rapidio/switches/idt_gen3.c spin_unlock(&rdev->rswitch->lock); rdev 296 drivers/rapidio/switches/idt_gen3.c static void idtg3_remove(struct rio_dev *rdev) rdev 298 drivers/rapidio/switches/idt_gen3.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 299 drivers/rapidio/switches/idt_gen3.c spin_lock(&rdev->rswitch->lock); rdev 300 drivers/rapidio/switches/idt_gen3.c if (rdev->rswitch->ops == &idtg3_switch_ops) rdev 301 drivers/rapidio/switches/idt_gen3.c rdev->rswitch->ops = NULL; rdev 302 drivers/rapidio/switches/idt_gen3.c spin_unlock(&rdev->rswitch->lock); rdev 310 drivers/rapidio/switches/idt_gen3.c static void idtg3_shutdown(struct rio_dev *rdev) rdev 317 drivers/rapidio/switches/idt_gen3.c if (!rdev->do_enum) rdev 320 drivers/rapidio/switches/idt_gen3.c pr_debug("RIO: %s(%s)\n", __func__, rio_name(rdev)); rdev 322 drivers/rapidio/switches/idt_gen3.c rio_read_config_32(rdev, RIO_PW_ROUTE, &rval); rdev 323 drivers/rapidio/switches/idt_gen3.c i = RIO_GET_PORT_NUM(rdev->swpinfo); rdev 332 drivers/rapidio/switches/idt_gen3.c rio_read_config_32(rdev, rdev->em_efptr + RIO_EM_PW_TGT_DEVID, &rval); rdev 339 drivers/rapidio/switches/idt_gen3.c if (rdev->net->hport->host_deviceid == destid) { rdev 340 drivers/rapidio/switches/idt_gen3.c rio_write_config_32(rdev, rdev 341 drivers/rapidio/switches/idt_gen3.c rdev->em_efptr + RIO_EM_PW_TX_CTRL, 0); rdev 343 drivers/rapidio/switches/idt_gen3.c __func__, rio_name(rdev)); rdev 129 drivers/rapidio/switches/idtcps.c static int idtcps_probe(struct rio_dev *rdev, const struct rio_device_id *id) rdev 131 drivers/rapidio/switches/idtcps.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 133 drivers/rapidio/switches/idtcps.c spin_lock(&rdev->rswitch->lock); rdev 135 drivers/rapidio/switches/idtcps.c if (rdev->rswitch->ops) { rdev 136 drivers/rapidio/switches/idtcps.c spin_unlock(&rdev->rswitch->lock); rdev 140 drivers/rapidio/switches/idtcps.c rdev->rswitch->ops = &idtcps_switch_ops; rdev 142 drivers/rapidio/switches/idtcps.c if (rdev->do_enum) { rdev 144 drivers/rapidio/switches/idtcps.c rio_write_config_32(rdev, rdev 145 drivers/rapidio/switches/idtcps.c rdev->phys_efptr + RIO_PORT_LINKTO_CTL_CSR, 0x8e << 8); rdev 147 drivers/rapidio/switches/idtcps.c rio_write_config_32(rdev, rdev 151 drivers/rapidio/switches/idtcps.c spin_unlock(&rdev->rswitch->lock); rdev 155 drivers/rapidio/switches/idtcps.c static void idtcps_remove(struct rio_dev *rdev) rdev 157 drivers/rapidio/switches/idtcps.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 158 drivers/rapidio/switches/idtcps.c spin_lock(&rdev->rswitch->lock); rdev 159 drivers/rapidio/switches/idtcps.c if (rdev->rswitch->ops != &idtcps_switch_ops) { rdev 160 drivers/rapidio/switches/idtcps.c spin_unlock(&rdev->rswitch->lock); rdev 163 drivers/rapidio/switches/idtcps.c rdev->rswitch->ops = NULL; rdev 164 drivers/rapidio/switches/idtcps.c spin_unlock(&rdev->rswitch->lock); rdev 111 drivers/rapidio/switches/tsi568.c tsi568_em_init(struct rio_dev *rdev) rdev 116 drivers/rapidio/switches/tsi568.c pr_debug("TSI568 %s [%d:%d]\n", __func__, rdev->destid, rdev->hopcount); rdev 120 drivers/rapidio/switches/tsi568.c portnum < RIO_GET_TOTAL_PORTS(rdev->swpinfo); portnum++) { rdev 121 drivers/rapidio/switches/tsi568.c rio_read_config_32(rdev, TSI568_SP_MODE(portnum), ®val); rdev 122 drivers/rapidio/switches/tsi568.c rio_write_config_32(rdev, TSI568_SP_MODE(portnum), rdev 140 drivers/rapidio/switches/tsi568.c static int tsi568_probe(struct rio_dev *rdev, const struct rio_device_id *id) rdev 142 drivers/rapidio/switches/tsi568.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 144 drivers/rapidio/switches/tsi568.c spin_lock(&rdev->rswitch->lock); rdev 146 drivers/rapidio/switches/tsi568.c if (rdev->rswitch->ops) { rdev 147 drivers/rapidio/switches/tsi568.c spin_unlock(&rdev->rswitch->lock); rdev 151 drivers/rapidio/switches/tsi568.c rdev->rswitch->ops = &tsi568_switch_ops; rdev 152 drivers/rapidio/switches/tsi568.c spin_unlock(&rdev->rswitch->lock); rdev 156 drivers/rapidio/switches/tsi568.c static void tsi568_remove(struct rio_dev *rdev) rdev 158 drivers/rapidio/switches/tsi568.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 159 drivers/rapidio/switches/tsi568.c spin_lock(&rdev->rswitch->lock); rdev 160 drivers/rapidio/switches/tsi568.c if (rdev->rswitch->ops != &tsi568_switch_ops) { rdev 161 drivers/rapidio/switches/tsi568.c spin_unlock(&rdev->rswitch->lock); rdev 164 drivers/rapidio/switches/tsi568.c rdev->rswitch->ops = NULL; rdev 165 drivers/rapidio/switches/tsi568.c spin_unlock(&rdev->rswitch->lock); rdev 156 drivers/rapidio/switches/tsi57x.c tsi57x_em_init(struct rio_dev *rdev) rdev 161 drivers/rapidio/switches/tsi57x.c pr_debug("TSI578 %s [%d:%d]\n", __func__, rdev->destid, rdev->hopcount); rdev 164 drivers/rapidio/switches/tsi57x.c portnum < RIO_GET_TOTAL_PORTS(rdev->swpinfo); portnum++) { rdev 166 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 168 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 173 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 174 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_ERR_STS_CSR(rdev, portnum), rdev 176 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 177 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_ERR_STS_CSR(rdev, portnum), rdev 180 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 182 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 187 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 189 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 194 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 195 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_CTL_CSR(rdev, portnum), rdev 202 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 203 drivers/rapidio/switches/tsi57x.c rdev->phys_efptr + RIO_PORT_LINKTO_CTL_CSR, 0x9a << 8); rdev 209 drivers/rapidio/switches/tsi57x.c tsi57x_em_handler(struct rio_dev *rdev, u8 portnum) rdev 211 drivers/rapidio/switches/tsi57x.c struct rio_mport *mport = rdev->net->hport; rdev 217 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 218 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_ERR_STS_CSR(rdev, portnum), rdev 225 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 226 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_CTL_CSR(rdev, portnum), rdev 229 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 230 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_CTL_CSR(rdev, portnum), rdev 233 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 234 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_CTL_CSR(rdev, portnum), rdev 241 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 242 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_MNT_RSP_CSR(rdev, portnum), rdev 250 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, rdev 255 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 256 drivers/rapidio/switches/tsi57x.c RIO_DEV_PORT_N_MNT_RSP_CSR(rdev, rdev 269 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, TSI578_SP_INT_STATUS(portnum), &intstat); rdev 271 drivers/rapidio/switches/tsi57x.c rdev->destid, rdev->hopcount, portnum, intstat); rdev 274 drivers/rapidio/switches/tsi57x.c rio_read_config_32(rdev, rdev 277 drivers/rapidio/switches/tsi57x.c route_port = rdev->rswitch->route_table[regval]; rdev 279 drivers/rapidio/switches/tsi57x.c rio_name(rdev), portnum, regval); rdev 280 drivers/rapidio/switches/tsi57x.c tsi57x_route_add_entry(mport, rdev->destid, rdev->hopcount, rdev 284 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, TSI578_SP_INT_STATUS(portnum), rdev 301 drivers/rapidio/switches/tsi57x.c static int tsi57x_probe(struct rio_dev *rdev, const struct rio_device_id *id) rdev 303 drivers/rapidio/switches/tsi57x.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 305 drivers/rapidio/switches/tsi57x.c spin_lock(&rdev->rswitch->lock); rdev 307 drivers/rapidio/switches/tsi57x.c if (rdev->rswitch->ops) { rdev 308 drivers/rapidio/switches/tsi57x.c spin_unlock(&rdev->rswitch->lock); rdev 311 drivers/rapidio/switches/tsi57x.c rdev->rswitch->ops = &tsi57x_switch_ops; rdev 313 drivers/rapidio/switches/tsi57x.c if (rdev->do_enum) { rdev 315 drivers/rapidio/switches/tsi57x.c rio_write_config_32(rdev, RIO_STD_RTE_DEFAULT_PORT, rdev 319 drivers/rapidio/switches/tsi57x.c spin_unlock(&rdev->rswitch->lock); rdev 323 drivers/rapidio/switches/tsi57x.c static void tsi57x_remove(struct rio_dev *rdev) rdev 325 drivers/rapidio/switches/tsi57x.c pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev)); rdev 326 drivers/rapidio/switches/tsi57x.c spin_lock(&rdev->rswitch->lock); rdev 327 drivers/rapidio/switches/tsi57x.c if (rdev->rswitch->ops != &tsi57x_switch_ops) { rdev 328 drivers/rapidio/switches/tsi57x.c spin_unlock(&rdev->rswitch->lock); rdev 331 drivers/rapidio/switches/tsi57x.c rdev->rswitch->ops = NULL; rdev 332 drivers/rapidio/switches/tsi57x.c spin_unlock(&rdev->rswitch->lock); rdev 73 drivers/regulator/88pg86x.c struct regulator_dev *rdev; rdev 74 drivers/regulator/88pg86x.c rdev = devm_regulator_register(&i2c->dev, rdev 77 drivers/regulator/88pg86x.c if (IS_ERR(rdev)) { rdev 78 drivers/regulator/88pg86x.c ret = PTR_ERR(rdev); rdev 168 drivers/regulator/88pm800-regulator.c static int pm800_get_current_limit(struct regulator_dev *rdev) rdev 170 drivers/regulator/88pm800-regulator.c struct pm800_regulator_info *info = rdev_get_drvdata(rdev); rdev 201 drivers/regulator/88pm8607.c static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index) rdev 203 drivers/regulator/88pm8607.c struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); rdev 206 drivers/regulator/88pm8607.c ret = regulator_list_voltage_table(rdev, index); rdev 321 drivers/regulator/88pm8607.c struct regulator_dev *rdev; rdev 360 drivers/regulator/88pm8607.c rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); rdev 361 drivers/regulator/88pm8607.c if (IS_ERR(rdev)) { rdev 364 drivers/regulator/88pm8607.c return PTR_ERR(rdev); rdev 32 drivers/regulator/aat2870-regulator.c static int aat2870_ldo_set_voltage_sel(struct regulator_dev *rdev, rdev 35 drivers/regulator/aat2870-regulator.c struct aat2870_regulator *ri = rdev_get_drvdata(rdev); rdev 42 drivers/regulator/aat2870-regulator.c static int aat2870_ldo_get_voltage_sel(struct regulator_dev *rdev) rdev 44 drivers/regulator/aat2870-regulator.c struct aat2870_regulator *ri = rdev_get_drvdata(rdev); rdev 56 drivers/regulator/aat2870-regulator.c static int aat2870_ldo_enable(struct regulator_dev *rdev) rdev 58 drivers/regulator/aat2870-regulator.c struct aat2870_regulator *ri = rdev_get_drvdata(rdev); rdev 65 drivers/regulator/aat2870-regulator.c static int aat2870_ldo_disable(struct regulator_dev *rdev) rdev 67 drivers/regulator/aat2870-regulator.c struct aat2870_regulator *ri = rdev_get_drvdata(rdev); rdev 73 drivers/regulator/aat2870-regulator.c static int aat2870_ldo_is_enabled(struct regulator_dev *rdev) rdev 75 drivers/regulator/aat2870-regulator.c struct aat2870_regulator *ri = rdev_get_drvdata(rdev); rdev 154 drivers/regulator/aat2870-regulator.c struct regulator_dev *rdev; rdev 167 drivers/regulator/aat2870-regulator.c rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); rdev 168 drivers/regulator/aat2870-regulator.c if (IS_ERR(rdev)) { rdev 171 drivers/regulator/aat2870-regulator.c return PTR_ERR(rdev); rdev 173 drivers/regulator/aat2870-regulator.c platform_set_drvdata(pdev, rdev); rdev 503 drivers/regulator/ab3100.c struct regulator_dev *rdev; rdev 536 drivers/regulator/ab3100.c rdev = devm_regulator_register(&pdev->dev, desc, &config); rdev 537 drivers/regulator/ab3100.c if (IS_ERR(rdev)) { rdev 538 drivers/regulator/ab3100.c err = PTR_ERR(rdev); rdev 506 drivers/regulator/ab8500-ext.c static int ab8500_ext_regulator_enable(struct regulator_dev *rdev) rdev 509 drivers/regulator/ab8500-ext.c struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); rdev 513 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 530 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), rdev 535 drivers/regulator/ab8500-ext.c dev_dbg(rdev_get_dev(rdev), rdev 543 drivers/regulator/ab8500-ext.c static int ab8500_ext_regulator_disable(struct regulator_dev *rdev) rdev 546 drivers/regulator/ab8500-ext.c struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); rdev 550 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 566 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), rdev 571 drivers/regulator/ab8500-ext.c dev_dbg(rdev_get_dev(rdev), "%s-disable (bank, reg, mask, value):" rdev 579 drivers/regulator/ab8500-ext.c static int ab8500_ext_regulator_is_enabled(struct regulator_dev *rdev) rdev 582 drivers/regulator/ab8500-ext.c struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); rdev 586 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 593 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), rdev 598 drivers/regulator/ab8500-ext.c dev_dbg(rdev_get_dev(rdev), "%s-is_enabled (bank, reg, mask, value):" rdev 610 drivers/regulator/ab8500-ext.c static int ab8500_ext_regulator_set_mode(struct regulator_dev *rdev, rdev 614 drivers/regulator/ab8500-ext.c struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); rdev 618 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 638 drivers/regulator/ab8500-ext.c if (ab8500_ext_regulator_is_enabled(rdev) && rdev 644 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), rdev 649 drivers/regulator/ab8500-ext.c dev_dbg(rdev_get_dev(rdev), rdev 661 drivers/regulator/ab8500-ext.c static unsigned int ab8500_ext_regulator_get_mode(struct regulator_dev *rdev) rdev 663 drivers/regulator/ab8500-ext.c struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev); rdev 667 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 681 drivers/regulator/ab8500-ext.c static int ab8500_ext_set_voltage(struct regulator_dev *rdev, int min_uV, rdev 684 drivers/regulator/ab8500-ext.c struct regulation_constraints *regu_constraints = rdev->constraints; rdev 687 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), "No regulator constraints\n"); rdev 695 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), rdev 703 drivers/regulator/ab8500-ext.c static int ab8500_ext_list_voltage(struct regulator_dev *rdev, rdev 706 drivers/regulator/ab8500-ext.c struct regulation_constraints *regu_constraints = rdev->constraints; rdev 709 drivers/regulator/ab8500-ext.c dev_err(rdev_get_dev(rdev), "regulator constraints null pointer\n"); rdev 793 drivers/regulator/ab8500-ext.c struct regulator_dev *rdev; rdev 833 drivers/regulator/ab8500-ext.c rdev = devm_regulator_register(&pdev->dev, &info->desc, rdev 835 drivers/regulator/ab8500-ext.c if (IS_ERR(rdev)) { rdev 838 drivers/regulator/ab8500-ext.c return PTR_ERR(rdev); rdev 206 drivers/regulator/ab8500.c static int ab8500_regulator_enable(struct regulator_dev *rdev) rdev 209 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 212 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 220 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), rdev 225 drivers/regulator/ab8500.c dev_vdbg(rdev_get_dev(rdev), rdev 233 drivers/regulator/ab8500.c static int ab8500_regulator_disable(struct regulator_dev *rdev) rdev 236 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 239 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 247 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), rdev 252 drivers/regulator/ab8500.c dev_vdbg(rdev_get_dev(rdev), rdev 260 drivers/regulator/ab8500.c static int ab8500_regulator_is_enabled(struct regulator_dev *rdev) rdev 263 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 267 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 274 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), rdev 279 drivers/regulator/ab8500.c dev_vdbg(rdev_get_dev(rdev), rdev 292 drivers/regulator/ab8500.c struct regulator_dev *rdev, int input_uV, rdev 297 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 300 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 312 drivers/regulator/ab8500.c static int ab8500_regulator_set_mode(struct regulator_dev *rdev, rdev 318 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 321 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 372 drivers/regulator/ab8500.c if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) { rdev 376 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), rdev 381 drivers/regulator/ab8500.c dev_vdbg(rdev_get_dev(rdev), rdev 401 drivers/regulator/ab8500.c static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev) rdev 403 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 410 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 447 drivers/regulator/ab8500.c static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev) rdev 450 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 454 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 463 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), rdev 468 drivers/regulator/ab8500.c dev_vdbg(rdev_get_dev(rdev), rdev 478 drivers/regulator/ab8500.c static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev, rdev 482 drivers/regulator/ab8500.c struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); rdev 486 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); rdev 498 drivers/regulator/ab8500.c dev_err(rdev_get_dev(rdev), rdev 501 drivers/regulator/ab8500.c dev_vdbg(rdev_get_dev(rdev), rdev 1583 drivers/regulator/ab8500.c struct regulator_dev *rdev; rdev 1605 drivers/regulator/ab8500.c rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); rdev 1606 drivers/regulator/ab8500.c if (IS_ERR(rdev)) { rdev 1609 drivers/regulator/ab8500.c return PTR_ERR(rdev); rdev 237 drivers/regulator/act8865-regulator.c static int act8865_set_suspend_state(struct regulator_dev *rdev, bool enable) rdev 239 drivers/regulator/act8865-regulator.c struct regmap *regmap = rdev->regmap; rdev 240 drivers/regulator/act8865-regulator.c int id = rdev->desc->id, reg, val; rdev 285 drivers/regulator/act8865-regulator.c static int act8865_set_suspend_enable(struct regulator_dev *rdev) rdev 287 drivers/regulator/act8865-regulator.c return act8865_set_suspend_state(rdev, true); rdev 290 drivers/regulator/act8865-regulator.c static int act8865_set_suspend_disable(struct regulator_dev *rdev) rdev 292 drivers/regulator/act8865-regulator.c return act8865_set_suspend_state(rdev, false); rdev 309 drivers/regulator/act8865-regulator.c static int act8865_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 311 drivers/regulator/act8865-regulator.c struct regmap *regmap = rdev->regmap; rdev 312 drivers/regulator/act8865-regulator.c int id = rdev_get_id(rdev); rdev 358 drivers/regulator/act8865-regulator.c static unsigned int act8865_get_mode(struct regulator_dev *rdev) rdev 360 drivers/regulator/act8865-regulator.c struct regmap *regmap = rdev->regmap; rdev 361 drivers/regulator/act8865-regulator.c int id = rdev_get_id(rdev); rdev 742 drivers/regulator/act8865-regulator.c struct regulator_dev *rdev; rdev 758 drivers/regulator/act8865-regulator.c rdev = devm_regulator_register(dev, desc, &config); rdev 759 drivers/regulator/act8865-regulator.c if (IS_ERR(rdev)) { rdev 761 drivers/regulator/act8865-regulator.c return PTR_ERR(rdev); rdev 82 drivers/regulator/act8945a-regulator.c static int act8945a_set_suspend_state(struct regulator_dev *rdev, bool enable) rdev 84 drivers/regulator/act8945a-regulator.c struct regmap *regmap = rdev->regmap; rdev 85 drivers/regulator/act8945a-regulator.c int id = rdev_get_id(rdev); rdev 131 drivers/regulator/act8945a-regulator.c static int act8945a_set_suspend_enable(struct regulator_dev *rdev) rdev 133 drivers/regulator/act8945a-regulator.c return act8945a_set_suspend_state(rdev, true); rdev 136 drivers/regulator/act8945a-regulator.c static int act8945a_set_suspend_disable(struct regulator_dev *rdev) rdev 138 drivers/regulator/act8945a-regulator.c return act8945a_set_suspend_state(rdev, false); rdev 154 drivers/regulator/act8945a-regulator.c static int act8945a_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 156 drivers/regulator/act8945a-regulator.c struct act8945a_pmic *act8945a = rdev_get_drvdata(rdev); rdev 157 drivers/regulator/act8945a-regulator.c struct regmap *regmap = rdev->regmap; rdev 158 drivers/regulator/act8945a-regulator.c int id = rdev_get_id(rdev); rdev 209 drivers/regulator/act8945a-regulator.c static unsigned int act8945a_get_mode(struct regulator_dev *rdev) rdev 211 drivers/regulator/act8945a-regulator.c struct act8945a_pmic *act8945a = rdev_get_drvdata(rdev); rdev 212 drivers/regulator/act8945a-regulator.c int id = rdev_get_id(rdev); rdev 279 drivers/regulator/act8945a-regulator.c struct regulator_dev *rdev; rdev 309 drivers/regulator/act8945a-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i], rdev 311 drivers/regulator/act8945a-regulator.c if (IS_ERR(rdev)) { rdev 315 drivers/regulator/act8945a-regulator.c return PTR_ERR(rdev); rdev 27 drivers/regulator/ad5398.c struct regulator_dev *rdev; rdev 68 drivers/regulator/ad5398.c static int ad5398_get_current_limit(struct regulator_dev *rdev) rdev 70 drivers/regulator/ad5398.c struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); rdev 84 drivers/regulator/ad5398.c static int ad5398_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA) rdev 86 drivers/regulator/ad5398.c struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); rdev 124 drivers/regulator/ad5398.c static int ad5398_is_enabled(struct regulator_dev *rdev) rdev 126 drivers/regulator/ad5398.c struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); rdev 141 drivers/regulator/ad5398.c static int ad5398_enable(struct regulator_dev *rdev) rdev 143 drivers/regulator/ad5398.c struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); rdev 162 drivers/regulator/ad5398.c static int ad5398_disable(struct regulator_dev *rdev) rdev 164 drivers/regulator/ad5398.c struct ad5398_chip_info *chip = rdev_get_drvdata(rdev); rdev 243 drivers/regulator/ad5398.c chip->rdev = devm_regulator_register(&client->dev, &ad5398_reg, rdev 245 drivers/regulator/ad5398.c if (IS_ERR(chip->rdev)) { rdev 248 drivers/regulator/ad5398.c return PTR_ERR(chip->rdev); rdev 161 drivers/regulator/anatop-regulator.c struct regulator_dev *rdev; rdev 306 drivers/regulator/anatop-regulator.c rdev = devm_regulator_register(dev, rdesc, &config); rdev 307 drivers/regulator/anatop-regulator.c if (IS_ERR(rdev)) { rdev 310 drivers/regulator/anatop-regulator.c return PTR_ERR(rdev); rdev 313 drivers/regulator/anatop-regulator.c platform_set_drvdata(pdev, rdev); rdev 42 drivers/regulator/arizona-ldo1.c static int arizona_ldo1_hc_set_voltage_sel(struct regulator_dev *rdev, rdev 45 drivers/regulator/arizona-ldo1.c struct regmap *regmap = rdev_get_regmap(rdev); rdev 49 drivers/regulator/arizona-ldo1.c if (sel == rdev->desc->n_voltages - 1) rdev 62 drivers/regulator/arizona-ldo1.c return regulator_set_voltage_sel_regmap(rdev, sel); rdev 65 drivers/regulator/arizona-ldo1.c static int arizona_ldo1_hc_get_voltage_sel(struct regulator_dev *rdev) rdev 67 drivers/regulator/arizona-ldo1.c struct regmap *regmap = rdev_get_regmap(rdev); rdev 76 drivers/regulator/arizona-ldo1.c return rdev->desc->n_voltages - 1; rdev 78 drivers/regulator/arizona-ldo1.c return regulator_get_voltage_sel_regmap(rdev); rdev 76 drivers/regulator/arizona-micsupp.c static int arizona_micsupp_enable(struct regulator_dev *rdev) rdev 78 drivers/regulator/arizona-micsupp.c struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); rdev 81 drivers/regulator/arizona-micsupp.c ret = regulator_enable_regmap(rdev); rdev 89 drivers/regulator/arizona-micsupp.c static int arizona_micsupp_disable(struct regulator_dev *rdev) rdev 91 drivers/regulator/arizona-micsupp.c struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); rdev 94 drivers/regulator/arizona-micsupp.c ret = regulator_disable_regmap(rdev); rdev 101 drivers/regulator/arizona-micsupp.c static int arizona_micsupp_set_bypass(struct regulator_dev *rdev, bool ena) rdev 103 drivers/regulator/arizona-micsupp.c struct arizona_micsupp *micsupp = rdev_get_drvdata(rdev); rdev 106 drivers/regulator/arizona-micsupp.c ret = regulator_set_bypass_regmap(rdev, ena); rdev 28 drivers/regulator/as3711-regulator.c static int as3711_set_mode_sd(struct regulator_dev *rdev, unsigned int mode) rdev 30 drivers/regulator/as3711-regulator.c unsigned int fast_bit = rdev->desc->enable_mask, rdev 48 drivers/regulator/as3711-regulator.c return regmap_update_bits(rdev->regmap, AS3711_SD_CONTROL_1, rdev 52 drivers/regulator/as3711-regulator.c static unsigned int as3711_get_mode_sd(struct regulator_dev *rdev) rdev 54 drivers/regulator/as3711-regulator.c unsigned int fast_bit = rdev->desc->enable_mask, rdev 57 drivers/regulator/as3711-regulator.c int ret = regmap_read(rdev->regmap, AS3711_SD_CONTROL_1, &val); rdev 209 drivers/regulator/as3711-regulator.c struct regulator_dev *rdev; rdev 231 drivers/regulator/as3711-regulator.c rdev = devm_regulator_register(&pdev->dev, &as3711_reg_desc[id], rdev 233 drivers/regulator/as3711-regulator.c if (IS_ERR(rdev)) { rdev 236 drivers/regulator/as3711-regulator.c return PTR_ERR(rdev); rdev 345 drivers/regulator/as3722-regulator.c static int as3722_ldo3_get_current_limit(struct regulator_dev *rdev) rdev 419 drivers/regulator/as3722-regulator.c static unsigned int as3722_sd_get_mode(struct regulator_dev *rdev) rdev 421 drivers/regulator/as3722-regulator.c struct as3722_regulators *as3722_regs = rdev_get_drvdata(rdev); rdev 423 drivers/regulator/as3722-regulator.c int id = rdev_get_id(rdev); rdev 443 drivers/regulator/as3722-regulator.c static int as3722_sd_set_mode(struct regulator_dev *rdev, rdev 446 drivers/regulator/as3722-regulator.c struct as3722_regulators *as3722_regs = rdev_get_drvdata(rdev); rdev 448 drivers/regulator/as3722-regulator.c u8 id = rdev_get_id(rdev); rdev 639 drivers/regulator/as3722-regulator.c struct regulator_dev *rdev; rdev 796 drivers/regulator/as3722-regulator.c rdev = devm_regulator_register(&pdev->dev, desc, &config); rdev 797 drivers/regulator/as3722-regulator.c if (IS_ERR(rdev)) { rdev 798 drivers/regulator/as3722-regulator.c ret = PTR_ERR(rdev); rdev 805 drivers/regulator/as3722-regulator.c ret = regulator_enable_regmap(rdev); rdev 367 drivers/regulator/axp20x-regulator.c static int axp20x_set_ramp_delay(struct regulator_dev *rdev, int ramp) rdev 369 drivers/regulator/axp20x-regulator.c struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); rdev 370 drivers/regulator/axp20x-regulator.c int id = rdev_get_id(rdev); rdev 436 drivers/regulator/axp20x-regulator.c static int axp20x_regulator_enable_regmap(struct regulator_dev *rdev) rdev 438 drivers/regulator/axp20x-regulator.c struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); rdev 439 drivers/regulator/axp20x-regulator.c int id = rdev_get_id(rdev); rdev 444 drivers/regulator/axp20x-regulator.c rdev->constraints && rdev->constraints->soft_start) { rdev 455 drivers/regulator/axp20x-regulator.c if (regulator_is_enabled_regmap(rdev)) rdev 458 drivers/regulator/axp20x-regulator.c v_out = regulator_get_voltage_sel_regmap(rdev); rdev 465 drivers/regulator/axp20x-regulator.c ret = regulator_set_voltage_sel_regmap(rdev, 0x00); rdev 472 drivers/regulator/axp20x-regulator.c ret |= regulator_enable_regmap(rdev); rdev 473 drivers/regulator/axp20x-regulator.c ret |= regulator_set_voltage_sel_regmap(rdev, v_out); rdev 483 drivers/regulator/axp20x-regulator.c return regulator_enable_regmap(rdev); rdev 1098 drivers/regulator/axp20x-regulator.c static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode) rdev 1100 drivers/regulator/axp20x-regulator.c struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); rdev 1156 drivers/regulator/axp20x-regulator.c return regmap_update_bits(rdev->regmap, reg, mask, workmode); rdev 1210 drivers/regulator/axp20x-regulator.c struct regulator_dev *rdev; rdev 1316 drivers/regulator/axp20x-regulator.c rdev = devm_regulator_register(&pdev->dev, desc, &config); rdev 1317 drivers/regulator/axp20x-regulator.c if (IS_ERR(rdev)) { rdev 1321 drivers/regulator/axp20x-regulator.c return PTR_ERR(rdev); rdev 1324 drivers/regulator/axp20x-regulator.c ret = of_property_read_u32(rdev->dev.of_node, rdev 1328 drivers/regulator/axp20x-regulator.c if (axp20x_set_dcdc_workmode(rdev, i, workmode)) rdev 1330 drivers/regulator/axp20x-regulator.c rdev->desc->name); rdev 1338 drivers/regulator/axp20x-regulator.c of_property_read_string(rdev->dev.of_node, rdev 1344 drivers/regulator/axp20x-regulator.c of_property_read_string(rdev->dev.of_node, rdev 1353 drivers/regulator/axp20x-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 1356 drivers/regulator/axp20x-regulator.c if (IS_ERR(rdev)) { rdev 1358 drivers/regulator/axp20x-regulator.c return PTR_ERR(rdev); rdev 281 drivers/regulator/bcm590xx-regulator.c struct regulator_dev *rdev; rdev 341 drivers/regulator/bcm590xx-regulator.c rdev = devm_regulator_register(&pdev->dev, &pmu->desc[i], rdev 343 drivers/regulator/bcm590xx-regulator.c if (IS_ERR(rdev)) { rdev 347 drivers/regulator/bcm590xx-regulator.c return PTR_ERR(rdev); rdev 50 drivers/regulator/bd70528-regulator.c static int bd70528_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 58 drivers/regulator/bd70528-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, rdev 62 drivers/regulator/bd70528-regulator.c dev_err(&rdev->dev, "%s: ramp_delay: %d not supported\n", rdev 63 drivers/regulator/bd70528-regulator.c rdev->desc->name, ramp_delay); rdev 67 drivers/regulator/bd70528-regulator.c static int bd70528_led_set_voltage_sel(struct regulator_dev *rdev, rdev 72 drivers/regulator/bd70528-regulator.c ret = regulator_is_enabled_regmap(rdev); rdev 77 drivers/regulator/bd70528-regulator.c return regulator_set_voltage_sel_regmap(rdev, sel); rdev 79 drivers/regulator/bd70528-regulator.c dev_err(&rdev->dev, rdev 262 drivers/regulator/bd70528-regulator.c struct regulator_dev *rdev; rdev 264 drivers/regulator/bd70528-regulator.c rdev = devm_regulator_register(&pdev->dev, &bd70528_desc[i], rdev 266 drivers/regulator/bd70528-regulator.c if (IS_ERR(rdev)) { rdev 270 drivers/regulator/bd70528-regulator.c return PTR_ERR(rdev); rdev 26 drivers/regulator/bd718x7-regulator.c static int bd718xx_buck1234_set_ramp_delay(struct regulator_dev *rdev, rdev 29 drivers/regulator/bd718x7-regulator.c int id = rdev_get_id(rdev); rdev 32 drivers/regulator/bd718x7-regulator.c dev_dbg(&rdev->dev, "Buck[%d] Set Ramp = %d\n", id + 1, rdev 49 drivers/regulator/bd718x7-regulator.c dev_err(&rdev->dev, rdev 51 drivers/regulator/bd718x7-regulator.c rdev->desc->name, ramp_delay); rdev 54 drivers/regulator/bd718x7-regulator.c return regmap_update_bits(rdev->regmap, BD718XX_REG_BUCK1_CTRL + id, rdev 63 drivers/regulator/bd718x7-regulator.c static int bd718xx_set_voltage_sel_restricted(struct regulator_dev *rdev, rdev 66 drivers/regulator/bd718x7-regulator.c if (regulator_is_enabled_regmap(rdev)) rdev 69 drivers/regulator/bd718x7-regulator.c return regulator_set_voltage_sel_regmap(rdev, sel); rdev 73 drivers/regulator/bd718x7-regulator.c struct regulator_dev *rdev, unsigned int sel) rdev 75 drivers/regulator/bd718x7-regulator.c if (regulator_is_enabled_regmap(rdev)) rdev 78 drivers/regulator/bd718x7-regulator.c return regulator_set_voltage_sel_pickable_regmap(rdev, sel); rdev 1221 drivers/regulator/bd718x7-regulator.c struct regulator_dev *rdev; rdev 1230 drivers/regulator/bd718x7-regulator.c rdev = devm_regulator_register(&pdev->dev, desc, &config); rdev 1231 drivers/regulator/bd718x7-regulator.c if (IS_ERR(rdev)) { rdev 1235 drivers/regulator/bd718x7-regulator.c err = PTR_ERR(rdev); rdev 1255 drivers/regulator/bd718x7-regulator.c if (!use_snvs || !rdev->constraints->always_on || rdev 1256 drivers/regulator/bd718x7-regulator.c !rdev->constraints->boot_on) { rdev 51 drivers/regulator/bd9571mwv-regulator.c static int bd9571mwv_avs_get_moni_state(struct regulator_dev *rdev) rdev 56 drivers/regulator/bd9571mwv-regulator.c ret = regmap_read(rdev->regmap, BD9571MWV_AVS_SET_MONI, &val); rdev 63 drivers/regulator/bd9571mwv-regulator.c static int bd9571mwv_avs_set_voltage_sel_regmap(struct regulator_dev *rdev, rdev 68 drivers/regulator/bd9571mwv-regulator.c ret = bd9571mwv_avs_get_moni_state(rdev); rdev 72 drivers/regulator/bd9571mwv-regulator.c return regmap_write_bits(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), rdev 73 drivers/regulator/bd9571mwv-regulator.c rdev->desc->vsel_mask, sel); rdev 76 drivers/regulator/bd9571mwv-regulator.c static int bd9571mwv_avs_get_voltage_sel_regmap(struct regulator_dev *rdev) rdev 81 drivers/regulator/bd9571mwv-regulator.c ret = bd9571mwv_avs_get_moni_state(rdev); rdev 85 drivers/regulator/bd9571mwv-regulator.c ret = regmap_read(rdev->regmap, BD9571MWV_AVS_VD09_VID(ret), &val); rdev 89 drivers/regulator/bd9571mwv-regulator.c val &= rdev->desc->vsel_mask; rdev 90 drivers/regulator/bd9571mwv-regulator.c val >>= ffs(rdev->desc->vsel_mask) - 1; rdev 95 drivers/regulator/bd9571mwv-regulator.c static int bd9571mwv_reg_set_voltage_sel_regmap(struct regulator_dev *rdev, rdev 98 drivers/regulator/bd9571mwv-regulator.c return regmap_write_bits(rdev->regmap, BD9571MWV_DVFS_SETVID, rdev 99 drivers/regulator/bd9571mwv-regulator.c rdev->desc->vsel_mask, sel); rdev 274 drivers/regulator/bd9571mwv-regulator.c struct regulator_dev *rdev; rdev 292 drivers/regulator/bd9571mwv-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i], rdev 294 drivers/regulator/bd9571mwv-regulator.c if (IS_ERR(rdev)) { rdev 297 drivers/regulator/bd9571mwv-regulator.c return PTR_ERR(rdev); rdev 36 drivers/regulator/core.c #define rdev_crit(rdev, fmt, ...) \ rdev 37 drivers/regulator/core.c pr_crit("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) rdev 38 drivers/regulator/core.c #define rdev_err(rdev, fmt, ...) \ rdev 39 drivers/regulator/core.c pr_err("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) rdev 40 drivers/regulator/core.c #define rdev_warn(rdev, fmt, ...) \ rdev 41 drivers/regulator/core.c pr_warn("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) rdev 42 drivers/regulator/core.c #define rdev_info(rdev, fmt, ...) \ rdev 43 drivers/regulator/core.c pr_info("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) rdev 44 drivers/regulator/core.c #define rdev_dbg(rdev, fmt, ...) \ rdev 45 drivers/regulator/core.c pr_debug("%s: " fmt, rdev_get_name(rdev), ##__VA_ARGS__) rdev 95 drivers/regulator/core.c static int _regulator_is_enabled(struct regulator_dev *rdev); rdev 97 drivers/regulator/core.c static int _regulator_get_current_limit(struct regulator_dev *rdev); rdev 98 drivers/regulator/core.c static unsigned int _regulator_get_mode(struct regulator_dev *rdev); rdev 99 drivers/regulator/core.c static int _notifier_call_chain(struct regulator_dev *rdev, rdev 101 drivers/regulator/core.c static int _regulator_do_set_voltage(struct regulator_dev *rdev, rdev 103 drivers/regulator/core.c static int regulator_balance_voltage(struct regulator_dev *rdev, rdev 105 drivers/regulator/core.c static struct regulator *create_regulator(struct regulator_dev *rdev, rdev 110 drivers/regulator/core.c const char *rdev_get_name(struct regulator_dev *rdev) rdev 112 drivers/regulator/core.c if (rdev->constraints && rdev->constraints->name) rdev 113 drivers/regulator/core.c return rdev->constraints->name; rdev 114 drivers/regulator/core.c else if (rdev->desc->name) rdev 115 drivers/regulator/core.c return rdev->desc->name; rdev 125 drivers/regulator/core.c static bool regulator_ops_is_valid(struct regulator_dev *rdev, int ops) rdev 127 drivers/regulator/core.c if (!rdev->constraints) { rdev 128 drivers/regulator/core.c rdev_err(rdev, "no constraints\n"); rdev 132 drivers/regulator/core.c if (rdev->constraints->valid_ops_mask & ops) rdev 149 drivers/regulator/core.c static inline int regulator_lock_nested(struct regulator_dev *rdev, rdev 157 drivers/regulator/core.c if (ww_ctx || !ww_mutex_trylock(&rdev->mutex)) { rdev 158 drivers/regulator/core.c if (rdev->mutex_owner == current) rdev 159 drivers/regulator/core.c rdev->ref_cnt++; rdev 165 drivers/regulator/core.c ret = ww_mutex_lock(&rdev->mutex, ww_ctx); rdev 173 drivers/regulator/core.c rdev->ref_cnt++; rdev 174 drivers/regulator/core.c rdev->mutex_owner = current; rdev 192 drivers/regulator/core.c void regulator_lock(struct regulator_dev *rdev) rdev 194 drivers/regulator/core.c regulator_lock_nested(rdev, NULL); rdev 205 drivers/regulator/core.c void regulator_unlock(struct regulator_dev *rdev) rdev 209 drivers/regulator/core.c if (--rdev->ref_cnt == 0) { rdev 210 drivers/regulator/core.c rdev->mutex_owner = NULL; rdev 211 drivers/regulator/core.c ww_mutex_unlock(&rdev->mutex); rdev 214 drivers/regulator/core.c WARN_ON_ONCE(rdev->ref_cnt < 0); rdev 220 drivers/regulator/core.c static bool regulator_supply_is_couple(struct regulator_dev *rdev) rdev 225 drivers/regulator/core.c for (i = 1; i < rdev->coupling_desc.n_coupled; i++) { rdev 226 drivers/regulator/core.c c_rdev = rdev->coupling_desc.coupled_rdevs[i]; rdev 228 drivers/regulator/core.c if (rdev->supply->rdev == c_rdev) rdev 235 drivers/regulator/core.c static void regulator_unlock_recursive(struct regulator_dev *rdev, rdev 242 drivers/regulator/core.c c_rdev = rdev->coupling_desc.coupled_rdevs[i - 1]; rdev 249 drivers/regulator/core.c c_rdev->supply->rdev, rdev 256 drivers/regulator/core.c static int regulator_lock_recursive(struct regulator_dev *rdev, rdev 264 drivers/regulator/core.c for (i = 0; i < rdev->coupling_desc.n_coupled; i++) { rdev 265 drivers/regulator/core.c c_rdev = rdev->coupling_desc.coupled_rdevs[i]; rdev 286 drivers/regulator/core.c err = regulator_lock_recursive(c_rdev->supply->rdev, rdev 300 drivers/regulator/core.c regulator_unlock_recursive(rdev, i); rdev 313 drivers/regulator/core.c static void regulator_unlock_dependent(struct regulator_dev *rdev, rdev 316 drivers/regulator/core.c regulator_unlock_recursive(rdev, rdev->coupling_desc.n_coupled); rdev 328 drivers/regulator/core.c static void regulator_lock_dependent(struct regulator_dev *rdev, rdev 346 drivers/regulator/core.c err = regulator_lock_recursive(rdev, rdev 428 drivers/regulator/core.c int regulator_check_voltage(struct regulator_dev *rdev, rdev 433 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) { rdev 434 drivers/regulator/core.c rdev_err(rdev, "voltage operation not allowed\n"); rdev 438 drivers/regulator/core.c if (*max_uV > rdev->constraints->max_uV) rdev 439 drivers/regulator/core.c *max_uV = rdev->constraints->max_uV; rdev 440 drivers/regulator/core.c if (*min_uV < rdev->constraints->min_uV) rdev 441 drivers/regulator/core.c *min_uV = rdev->constraints->min_uV; rdev 444 drivers/regulator/core.c rdev_err(rdev, "unsupportable voltage range: %d-%duV\n", rdev 461 drivers/regulator/core.c int regulator_check_consumers(struct regulator_dev *rdev, rdev 468 drivers/regulator/core.c list_for_each_entry(regulator, &rdev->consumer_list, list) { rdev 484 drivers/regulator/core.c rdev_err(rdev, "Restricting voltage, %u-%uuV\n", rdev 493 drivers/regulator/core.c static int regulator_check_current_limit(struct regulator_dev *rdev, rdev 498 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_CURRENT)) { rdev 499 drivers/regulator/core.c rdev_err(rdev, "current operation not allowed\n"); rdev 503 drivers/regulator/core.c if (*max_uA > rdev->constraints->max_uA) rdev 504 drivers/regulator/core.c *max_uA = rdev->constraints->max_uA; rdev 505 drivers/regulator/core.c if (*min_uA < rdev->constraints->min_uA) rdev 506 drivers/regulator/core.c *min_uA = rdev->constraints->min_uA; rdev 509 drivers/regulator/core.c rdev_err(rdev, "unsupportable current range: %d-%duA\n", rdev 518 drivers/regulator/core.c static int regulator_mode_constrain(struct regulator_dev *rdev, rdev 528 drivers/regulator/core.c rdev_err(rdev, "invalid mode %x specified\n", *mode); rdev 532 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_MODE)) { rdev 533 drivers/regulator/core.c rdev_err(rdev, "mode operation not allowed\n"); rdev 541 drivers/regulator/core.c if (rdev->constraints->valid_modes_mask & *mode) rdev 550 drivers/regulator/core.c regulator_get_suspend_state(struct regulator_dev *rdev, suspend_state_t state) rdev 552 drivers/regulator/core.c if (rdev->constraints == NULL) rdev 557 drivers/regulator/core.c return &rdev->constraints->state_standby; rdev 559 drivers/regulator/core.c return &rdev->constraints->state_mem; rdev 561 drivers/regulator/core.c return &rdev->constraints->state_disk; rdev 570 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 573 drivers/regulator/core.c regulator_lock(rdev); rdev 574 drivers/regulator/core.c uV = regulator_get_voltage_rdev(rdev); rdev 575 drivers/regulator/core.c regulator_unlock(rdev); rdev 586 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 588 drivers/regulator/core.c return sprintf(buf, "%d\n", _regulator_get_current_limit(rdev)); rdev 595 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 597 drivers/regulator/core.c return sprintf(buf, "%s\n", rdev_get_name(rdev)); rdev 624 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 626 drivers/regulator/core.c return regulator_print_opmode(buf, _regulator_get_mode(rdev)); rdev 643 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 646 drivers/regulator/core.c regulator_lock(rdev); rdev 647 drivers/regulator/core.c ret = regulator_print_state(buf, _regulator_is_enabled(rdev)); rdev 648 drivers/regulator/core.c regulator_unlock(rdev); rdev 657 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 661 drivers/regulator/core.c status = rdev->desc->ops->get_status(rdev); rdev 704 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 706 drivers/regulator/core.c if (!rdev->constraints) rdev 709 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->constraints->min_uA); rdev 716 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 718 drivers/regulator/core.c if (!rdev->constraints) rdev 721 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->constraints->max_uA); rdev 728 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 730 drivers/regulator/core.c if (!rdev->constraints) rdev 733 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->constraints->min_uV); rdev 740 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 742 drivers/regulator/core.c if (!rdev->constraints) rdev 745 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->constraints->max_uV); rdev 752 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 756 drivers/regulator/core.c regulator_lock(rdev); rdev 757 drivers/regulator/core.c list_for_each_entry(regulator, &rdev->consumer_list, list) { rdev 761 drivers/regulator/core.c regulator_unlock(rdev); rdev 769 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 770 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->use_count); rdev 777 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 779 drivers/regulator/core.c switch (rdev->desc->type) { rdev 792 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 794 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->constraints->state_mem.uV); rdev 802 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 804 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->constraints->state_disk.uV); rdev 812 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 814 drivers/regulator/core.c return sprintf(buf, "%d\n", rdev->constraints->state_standby.uV); rdev 822 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 825 drivers/regulator/core.c rdev->constraints->state_mem.mode); rdev 833 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 836 drivers/regulator/core.c rdev->constraints->state_disk.mode); rdev 844 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 847 drivers/regulator/core.c rdev->constraints->state_standby.mode); rdev 855 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 858 drivers/regulator/core.c rdev->constraints->state_mem.enabled); rdev 866 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 869 drivers/regulator/core.c rdev->constraints->state_disk.enabled); rdev 877 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 880 drivers/regulator/core.c rdev->constraints->state_standby.enabled); rdev 888 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 893 drivers/regulator/core.c ret = rdev->desc->ops->get_bypass(rdev, &bypass); rdev 909 drivers/regulator/core.c static int drms_uA_update(struct regulator_dev *rdev) rdev 919 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_DRMS)) { rdev 920 drivers/regulator/core.c rdev_dbg(rdev, "DRMS operation not allowed\n"); rdev 924 drivers/regulator/core.c if (!rdev->desc->ops->get_optimum_mode && rdev 925 drivers/regulator/core.c !rdev->desc->ops->set_load) rdev 928 drivers/regulator/core.c if (!rdev->desc->ops->set_mode && rdev 929 drivers/regulator/core.c !rdev->desc->ops->set_load) rdev 933 drivers/regulator/core.c list_for_each_entry(sibling, &rdev->consumer_list, list) { rdev 938 drivers/regulator/core.c current_uA += rdev->constraints->system_load; rdev 940 drivers/regulator/core.c if (rdev->desc->ops->set_load) { rdev 942 drivers/regulator/core.c err = rdev->desc->ops->set_load(rdev, current_uA); rdev 944 drivers/regulator/core.c rdev_err(rdev, "failed to set load %d\n", current_uA); rdev 947 drivers/regulator/core.c output_uV = regulator_get_voltage_rdev(rdev); rdev 949 drivers/regulator/core.c rdev_err(rdev, "invalid output voltage found\n"); rdev 955 drivers/regulator/core.c if (rdev->supply) rdev 956 drivers/regulator/core.c input_uV = regulator_get_voltage(rdev->supply); rdev 958 drivers/regulator/core.c input_uV = rdev->constraints->input_uV; rdev 960 drivers/regulator/core.c rdev_err(rdev, "invalid input voltage found\n"); rdev 965 drivers/regulator/core.c mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV, rdev 969 drivers/regulator/core.c err = regulator_mode_constrain(rdev, &mode); rdev 971 drivers/regulator/core.c rdev_err(rdev, "failed to get optimum mode @ %d uA %d -> %d uV\n", rdev 976 drivers/regulator/core.c err = rdev->desc->ops->set_mode(rdev, mode); rdev 978 drivers/regulator/core.c rdev_err(rdev, "failed to set optimum mode %x\n", mode); rdev 984 drivers/regulator/core.c static int suspend_set_state(struct regulator_dev *rdev, rdev 990 drivers/regulator/core.c rstate = regulator_get_suspend_state(rdev, state); rdev 1000 drivers/regulator/core.c if (rdev->desc->ops->set_suspend_voltage || rdev 1001 drivers/regulator/core.c rdev->desc->ops->set_suspend_mode) rdev 1002 drivers/regulator/core.c rdev_warn(rdev, "No configuration\n"); rdev 1007 drivers/regulator/core.c rdev->desc->ops->set_suspend_enable) rdev 1008 drivers/regulator/core.c ret = rdev->desc->ops->set_suspend_enable(rdev); rdev 1010 drivers/regulator/core.c rdev->desc->ops->set_suspend_disable) rdev 1011 drivers/regulator/core.c ret = rdev->desc->ops->set_suspend_disable(rdev); rdev 1016 drivers/regulator/core.c rdev_err(rdev, "failed to enabled/disable\n"); rdev 1020 drivers/regulator/core.c if (rdev->desc->ops->set_suspend_voltage && rstate->uV > 0) { rdev 1021 drivers/regulator/core.c ret = rdev->desc->ops->set_suspend_voltage(rdev, rstate->uV); rdev 1023 drivers/regulator/core.c rdev_err(rdev, "failed to set voltage\n"); rdev 1028 drivers/regulator/core.c if (rdev->desc->ops->set_suspend_mode && rstate->mode > 0) { rdev 1029 drivers/regulator/core.c ret = rdev->desc->ops->set_suspend_mode(rdev, rstate->mode); rdev 1031 drivers/regulator/core.c rdev_err(rdev, "failed to set mode\n"); rdev 1039 drivers/regulator/core.c static void print_constraints(struct regulator_dev *rdev) rdev 1041 drivers/regulator/core.c struct regulation_constraints *constraints = rdev->constraints; rdev 1060 drivers/regulator/core.c ret = regulator_get_voltage_rdev(rdev); rdev 1083 drivers/regulator/core.c ret = _regulator_get_current_limit(rdev); rdev 1101 drivers/regulator/core.c rdev_dbg(rdev, "%s\n", buf); rdev 1104 drivers/regulator/core.c !regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) rdev 1105 drivers/regulator/core.c rdev_warn(rdev, rdev 1109 drivers/regulator/core.c static int machine_constraints_voltage(struct regulator_dev *rdev, rdev 1112 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 1116 drivers/regulator/core.c if (rdev->constraints->apply_uV && rdev 1117 drivers/regulator/core.c rdev->constraints->min_uV && rdev->constraints->max_uV) { rdev 1119 drivers/regulator/core.c int current_uV = regulator_get_voltage_rdev(rdev); rdev 1123 drivers/regulator/core.c rdev_info(rdev, "Setting %d-%duV\n", rdev 1124 drivers/regulator/core.c rdev->constraints->min_uV, rdev 1125 drivers/regulator/core.c rdev->constraints->max_uV); rdev 1126 drivers/regulator/core.c _regulator_do_set_voltage(rdev, rdev 1127 drivers/regulator/core.c rdev->constraints->min_uV, rdev 1128 drivers/regulator/core.c rdev->constraints->max_uV); rdev 1129 drivers/regulator/core.c current_uV = regulator_get_voltage_rdev(rdev); rdev 1133 drivers/regulator/core.c rdev_err(rdev, rdev 1147 drivers/regulator/core.c if (current_uV < rdev->constraints->min_uV) { rdev 1148 drivers/regulator/core.c target_min = rdev->constraints->min_uV; rdev 1149 drivers/regulator/core.c target_max = rdev->constraints->min_uV; rdev 1152 drivers/regulator/core.c if (current_uV > rdev->constraints->max_uV) { rdev 1153 drivers/regulator/core.c target_min = rdev->constraints->max_uV; rdev 1154 drivers/regulator/core.c target_max = rdev->constraints->max_uV; rdev 1158 drivers/regulator/core.c rdev_info(rdev, "Bringing %duV into %d-%duV\n", rdev 1161 drivers/regulator/core.c rdev, target_min, target_max); rdev 1163 drivers/regulator/core.c rdev_err(rdev, rdev 1174 drivers/regulator/core.c if (ops->list_voltage && rdev->desc->n_voltages) { rdev 1175 drivers/regulator/core.c int count = rdev->desc->n_voltages; rdev 1197 drivers/regulator/core.c rdev_err(rdev, "invalid voltage constraints\n"); rdev 1205 drivers/regulator/core.c value = ops->list_voltage(rdev, i); rdev 1218 drivers/regulator/core.c rdev_err(rdev, rdev 1226 drivers/regulator/core.c rdev_dbg(rdev, "override min_uV, %d -> %d\n", rdev 1231 drivers/regulator/core.c rdev_dbg(rdev, "override max_uV, %d -> %d\n", rdev 1240 drivers/regulator/core.c static int machine_constraints_current(struct regulator_dev *rdev, rdev 1243 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 1250 drivers/regulator/core.c rdev_err(rdev, "Invalid current constraints\n"); rdev 1255 drivers/regulator/core.c rdev_warn(rdev, "Operation of current configuration missing\n"); rdev 1260 drivers/regulator/core.c ret = ops->set_current_limit(rdev, constraints->min_uA, rdev 1263 drivers/regulator/core.c rdev_err(rdev, "Failed to set current constraint, %d\n", ret); rdev 1270 drivers/regulator/core.c static int _regulator_do_enable(struct regulator_dev *rdev); rdev 1283 drivers/regulator/core.c static int set_machine_constraints(struct regulator_dev *rdev, rdev 1287 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 1290 drivers/regulator/core.c rdev->constraints = kmemdup(constraints, sizeof(*constraints), rdev 1293 drivers/regulator/core.c rdev->constraints = kzalloc(sizeof(*constraints), rdev 1295 drivers/regulator/core.c if (!rdev->constraints) rdev 1298 drivers/regulator/core.c ret = machine_constraints_voltage(rdev, rdev->constraints); rdev 1302 drivers/regulator/core.c ret = machine_constraints_current(rdev, rdev->constraints); rdev 1306 drivers/regulator/core.c if (rdev->constraints->ilim_uA && ops->set_input_current_limit) { rdev 1307 drivers/regulator/core.c ret = ops->set_input_current_limit(rdev, rdev 1308 drivers/regulator/core.c rdev->constraints->ilim_uA); rdev 1310 drivers/regulator/core.c rdev_err(rdev, "failed to set input limit\n"); rdev 1316 drivers/regulator/core.c if (rdev->constraints->initial_state) { rdev 1317 drivers/regulator/core.c ret = suspend_set_state(rdev, rdev->constraints->initial_state); rdev 1319 drivers/regulator/core.c rdev_err(rdev, "failed to set suspend state\n"); rdev 1324 drivers/regulator/core.c if (rdev->constraints->initial_mode) { rdev 1326 drivers/regulator/core.c rdev_err(rdev, "no set_mode operation\n"); rdev 1330 drivers/regulator/core.c ret = ops->set_mode(rdev, rdev->constraints->initial_mode); rdev 1332 drivers/regulator/core.c rdev_err(rdev, "failed to set initial mode: %d\n", ret); rdev 1335 drivers/regulator/core.c } else if (rdev->constraints->system_load) { rdev 1340 drivers/regulator/core.c drms_uA_update(rdev); rdev 1343 drivers/regulator/core.c if ((rdev->constraints->ramp_delay || rdev->constraints->ramp_disable) rdev 1345 drivers/regulator/core.c ret = ops->set_ramp_delay(rdev, rdev->constraints->ramp_delay); rdev 1347 drivers/regulator/core.c rdev_err(rdev, "failed to set ramp_delay\n"); rdev 1352 drivers/regulator/core.c if (rdev->constraints->pull_down && ops->set_pull_down) { rdev 1353 drivers/regulator/core.c ret = ops->set_pull_down(rdev); rdev 1355 drivers/regulator/core.c rdev_err(rdev, "failed to set pull down\n"); rdev 1360 drivers/regulator/core.c if (rdev->constraints->soft_start && ops->set_soft_start) { rdev 1361 drivers/regulator/core.c ret = ops->set_soft_start(rdev); rdev 1363 drivers/regulator/core.c rdev_err(rdev, "failed to set soft start\n"); rdev 1368 drivers/regulator/core.c if (rdev->constraints->over_current_protection rdev 1370 drivers/regulator/core.c ret = ops->set_over_current_protection(rdev); rdev 1372 drivers/regulator/core.c rdev_err(rdev, "failed to set over current protection\n"); rdev 1377 drivers/regulator/core.c if (rdev->constraints->active_discharge && ops->set_active_discharge) { rdev 1378 drivers/regulator/core.c bool ad_state = (rdev->constraints->active_discharge == rdev 1381 drivers/regulator/core.c ret = ops->set_active_discharge(rdev, ad_state); rdev 1383 drivers/regulator/core.c rdev_err(rdev, "failed to set active discharge\n"); rdev 1391 drivers/regulator/core.c if (rdev->constraints->always_on || rdev->constraints->boot_on) { rdev 1392 drivers/regulator/core.c if (rdev->supply) { rdev 1393 drivers/regulator/core.c ret = regulator_enable(rdev->supply); rdev 1395 drivers/regulator/core.c _regulator_put(rdev->supply); rdev 1396 drivers/regulator/core.c rdev->supply = NULL; rdev 1401 drivers/regulator/core.c ret = _regulator_do_enable(rdev); rdev 1403 drivers/regulator/core.c rdev_err(rdev, "failed to enable\n"); rdev 1407 drivers/regulator/core.c if (rdev->constraints->always_on) rdev 1408 drivers/regulator/core.c rdev->use_count++; rdev 1411 drivers/regulator/core.c print_constraints(rdev); rdev 1424 drivers/regulator/core.c static int set_supply(struct regulator_dev *rdev, rdev 1429 drivers/regulator/core.c rdev_info(rdev, "supplied by %s\n", rdev_get_name(supply_rdev)); rdev 1434 drivers/regulator/core.c rdev->supply = create_regulator(supply_rdev, &rdev->dev, "SUPPLY"); rdev 1435 drivers/regulator/core.c if (rdev->supply == NULL) { rdev 1455 drivers/regulator/core.c static int set_consumer_device_supply(struct regulator_dev *rdev, rdev 1486 drivers/regulator/core.c dev_name(&rdev->dev), rdev_get_name(rdev)); rdev 1494 drivers/regulator/core.c node->regulator = rdev; rdev 1509 drivers/regulator/core.c static void unset_regulator_supplies(struct regulator_dev *rdev) rdev 1514 drivers/regulator/core.c if (rdev == node->regulator) { rdev 1528 drivers/regulator/core.c const struct regulation_constraints *c = regulator->rdev->constraints; rdev 1573 drivers/regulator/core.c static struct regulator *create_regulator(struct regulator_dev *rdev, rdev 1585 drivers/regulator/core.c regulator_lock(rdev); rdev 1586 drivers/regulator/core.c regulator->rdev = rdev; rdev 1587 drivers/regulator/core.c list_add(®ulator->list, &rdev->consumer_list); rdev 1602 drivers/regulator/core.c err = sysfs_create_link_nowarn(&rdev->dev.kobj, &dev->kobj, rdev 1605 drivers/regulator/core.c rdev_dbg(rdev, "could not add device link %s err %d\n", rdev 1616 drivers/regulator/core.c rdev->debugfs); rdev 1618 drivers/regulator/core.c rdev_dbg(rdev, "Failed to create debugfs directory\n"); rdev 1636 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_STATUS) && rdev 1637 drivers/regulator/core.c _regulator_is_enabled(rdev)) rdev 1640 drivers/regulator/core.c regulator_unlock(rdev); rdev 1645 drivers/regulator/core.c regulator_unlock(rdev); rdev 1649 drivers/regulator/core.c static int _regulator_get_enable_time(struct regulator_dev *rdev) rdev 1651 drivers/regulator/core.c if (rdev->constraints && rdev->constraints->enable_time) rdev 1652 drivers/regulator/core.c return rdev->constraints->enable_time; rdev 1653 drivers/regulator/core.c if (rdev->desc->ops->enable_time) rdev 1654 drivers/regulator/core.c return rdev->desc->ops->enable_time(rdev); rdev 1655 drivers/regulator/core.c return rdev->desc->enable_time; rdev 1767 drivers/regulator/core.c static int regulator_resolve_supply(struct regulator_dev *rdev) rdev 1770 drivers/regulator/core.c struct device *dev = rdev->dev.parent; rdev 1774 drivers/regulator/core.c if (!rdev->supply_name) rdev 1778 drivers/regulator/core.c if (rdev->supply) rdev 1781 drivers/regulator/core.c r = regulator_dev_lookup(dev, rdev->supply_name); rdev 1794 drivers/regulator/core.c rdev->supply_name, rdev->desc->name); rdev 1805 drivers/regulator/core.c if (r->dev.parent && r->dev.parent != rdev->dev.parent) { rdev 1819 drivers/regulator/core.c ret = set_supply(rdev, r); rdev 1830 drivers/regulator/core.c if (rdev->use_count) { rdev 1831 drivers/regulator/core.c ret = regulator_enable(rdev->supply); rdev 1833 drivers/regulator/core.c _regulator_put(rdev->supply); rdev 1834 drivers/regulator/core.c rdev->supply = NULL; rdev 1846 drivers/regulator/core.c struct regulator_dev *rdev; rdev 1861 drivers/regulator/core.c rdev = regulator_dev_lookup(dev, id); rdev 1862 drivers/regulator/core.c if (IS_ERR(rdev)) { rdev 1863 drivers/regulator/core.c ret = PTR_ERR(rdev); rdev 1888 drivers/regulator/core.c rdev = dummy_regulator_rdev; rdev 1889 drivers/regulator/core.c get_device(&rdev->dev); rdev 1902 drivers/regulator/core.c if (rdev->exclusive) { rdev 1904 drivers/regulator/core.c put_device(&rdev->dev); rdev 1908 drivers/regulator/core.c if (get_type == EXCLUSIVE_GET && rdev->open_count) { rdev 1910 drivers/regulator/core.c put_device(&rdev->dev); rdev 1915 drivers/regulator/core.c ret = (rdev->coupling_desc.n_resolved != rdev->coupling_desc.n_coupled); rdev 1920 drivers/regulator/core.c put_device(&rdev->dev); rdev 1924 drivers/regulator/core.c ret = regulator_resolve_supply(rdev); rdev 1927 drivers/regulator/core.c put_device(&rdev->dev); rdev 1931 drivers/regulator/core.c if (!try_module_get(rdev->owner)) { rdev 1933 drivers/regulator/core.c put_device(&rdev->dev); rdev 1937 drivers/regulator/core.c regulator = create_regulator(rdev, dev, id); rdev 1940 drivers/regulator/core.c module_put(rdev->owner); rdev 1941 drivers/regulator/core.c put_device(&rdev->dev); rdev 1945 drivers/regulator/core.c rdev->open_count++; rdev 1947 drivers/regulator/core.c rdev->exclusive = 1; rdev 1949 drivers/regulator/core.c ret = _regulator_is_enabled(rdev); rdev 1951 drivers/regulator/core.c rdev->use_count = 1; rdev 1953 drivers/regulator/core.c rdev->use_count = 0; rdev 1956 drivers/regulator/core.c device_link_add(dev, &rdev->dev, DL_FLAG_STATELESS); rdev 2036 drivers/regulator/core.c struct regulator_dev *rdev; rdev 2046 drivers/regulator/core.c rdev = regulator->rdev; rdev 2051 drivers/regulator/core.c device_link_remove(regulator->dev, &rdev->dev); rdev 2054 drivers/regulator/core.c sysfs_remove_link(&rdev->dev.kobj, regulator->supply_name); rdev 2057 drivers/regulator/core.c regulator_lock(rdev); rdev 2060 drivers/regulator/core.c rdev->open_count--; rdev 2061 drivers/regulator/core.c rdev->exclusive = 0; rdev 2062 drivers/regulator/core.c regulator_unlock(rdev); rdev 2067 drivers/regulator/core.c module_put(rdev->owner); rdev 2068 drivers/regulator/core.c put_device(&rdev->dev); rdev 2217 drivers/regulator/core.c static int regulator_ena_gpio_request(struct regulator_dev *rdev, rdev 2227 drivers/regulator/core.c rdev_dbg(rdev, "GPIO is already used\n"); rdev 2241 drivers/regulator/core.c rdev->ena_pin = pin; rdev 2245 drivers/regulator/core.c static void regulator_ena_gpio_free(struct regulator_dev *rdev) rdev 2249 drivers/regulator/core.c if (!rdev->ena_pin) rdev 2254 drivers/regulator/core.c if (pin->gpiod == rdev->ena_pin->gpiod) { rdev 2260 drivers/regulator/core.c rdev->ena_pin = NULL; rdev 2277 drivers/regulator/core.c static int regulator_ena_gpio_ctrl(struct regulator_dev *rdev, bool enable) rdev 2279 drivers/regulator/core.c struct regulator_enable_gpio *pin = rdev->ena_pin; rdev 2345 drivers/regulator/core.c static int _regulator_do_enable(struct regulator_dev *rdev) rdev 2350 drivers/regulator/core.c ret = _regulator_get_enable_time(rdev); rdev 2354 drivers/regulator/core.c rdev_warn(rdev, "enable_time() failed: %d\n", ret); rdev 2358 drivers/regulator/core.c trace_regulator_enable(rdev_get_name(rdev)); rdev 2360 drivers/regulator/core.c if (rdev->desc->off_on_delay) { rdev 2367 drivers/regulator/core.c max_delay = usecs_to_jiffies(rdev->desc->off_on_delay); rdev 2368 drivers/regulator/core.c intended = rdev->last_off_jiffy + max_delay; rdev 2385 drivers/regulator/core.c if (rdev->ena_pin) { rdev 2386 drivers/regulator/core.c if (!rdev->ena_gpio_state) { rdev 2387 drivers/regulator/core.c ret = regulator_ena_gpio_ctrl(rdev, true); rdev 2390 drivers/regulator/core.c rdev->ena_gpio_state = 1; rdev 2392 drivers/regulator/core.c } else if (rdev->desc->ops->enable) { rdev 2393 drivers/regulator/core.c ret = rdev->desc->ops->enable(rdev); rdev 2403 drivers/regulator/core.c trace_regulator_enable_delay(rdev_get_name(rdev)); rdev 2407 drivers/regulator/core.c trace_regulator_enable_complete(rdev_get_name(rdev)); rdev 2434 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2436 drivers/regulator/core.c lockdep_assert_held_once(&rdev->mutex.base); rdev 2440 drivers/regulator/core.c return drms_uA_update(rdev); rdev 2455 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2457 drivers/regulator/core.c lockdep_assert_held_once(&rdev->mutex.base); rdev 2460 drivers/regulator/core.c rdev_err(rdev, "Underflow of regulator enable count\n"); rdev 2466 drivers/regulator/core.c return drms_uA_update(rdev); rdev 2474 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2477 drivers/regulator/core.c lockdep_assert_held_once(&rdev->mutex.base); rdev 2479 drivers/regulator/core.c if (rdev->use_count == 0 && rdev->supply) { rdev 2480 drivers/regulator/core.c ret = _regulator_enable(rdev->supply); rdev 2486 drivers/regulator/core.c if (rdev->coupling_desc.n_coupled > 1) { rdev 2487 drivers/regulator/core.c ret = regulator_balance_voltage(rdev, PM_SUSPEND_ON); rdev 2496 drivers/regulator/core.c if (rdev->use_count == 0) { rdev 2498 drivers/regulator/core.c ret = _regulator_is_enabled(rdev); rdev 2500 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, rdev 2506 drivers/regulator/core.c ret = _regulator_do_enable(rdev); rdev 2510 drivers/regulator/core.c _notifier_call_chain(rdev, REGULATOR_EVENT_ENABLE, rdev 2513 drivers/regulator/core.c rdev_err(rdev, "is_enabled() failed: %d\n", ret); rdev 2519 drivers/regulator/core.c rdev->use_count++; rdev 2527 drivers/regulator/core.c if (rdev->use_count == 0 && rdev->supply) rdev 2528 drivers/regulator/core.c _regulator_disable(rdev->supply); rdev 2546 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2550 drivers/regulator/core.c regulator_lock_dependent(rdev, &ww_ctx); rdev 2552 drivers/regulator/core.c regulator_unlock_dependent(rdev, &ww_ctx); rdev 2558 drivers/regulator/core.c static int _regulator_do_disable(struct regulator_dev *rdev) rdev 2562 drivers/regulator/core.c trace_regulator_disable(rdev_get_name(rdev)); rdev 2564 drivers/regulator/core.c if (rdev->ena_pin) { rdev 2565 drivers/regulator/core.c if (rdev->ena_gpio_state) { rdev 2566 drivers/regulator/core.c ret = regulator_ena_gpio_ctrl(rdev, false); rdev 2569 drivers/regulator/core.c rdev->ena_gpio_state = 0; rdev 2572 drivers/regulator/core.c } else if (rdev->desc->ops->disable) { rdev 2573 drivers/regulator/core.c ret = rdev->desc->ops->disable(rdev); rdev 2581 drivers/regulator/core.c if (rdev->desc->off_on_delay) rdev 2582 drivers/regulator/core.c rdev->last_off_jiffy = jiffies; rdev 2584 drivers/regulator/core.c trace_regulator_disable_complete(rdev_get_name(rdev)); rdev 2592 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2595 drivers/regulator/core.c lockdep_assert_held_once(&rdev->mutex.base); rdev 2597 drivers/regulator/core.c if (WARN(rdev->use_count <= 0, rdev 2598 drivers/regulator/core.c "unbalanced disables for %s\n", rdev_get_name(rdev))) rdev 2602 drivers/regulator/core.c if (rdev->use_count == 1 && rdev 2603 drivers/regulator/core.c (rdev->constraints && !rdev->constraints->always_on)) { rdev 2606 drivers/regulator/core.c if (regulator_ops_is_valid(rdev, REGULATOR_CHANGE_STATUS)) { rdev 2607 drivers/regulator/core.c ret = _notifier_call_chain(rdev, rdev 2613 drivers/regulator/core.c ret = _regulator_do_disable(rdev); rdev 2615 drivers/regulator/core.c rdev_err(rdev, "failed to disable\n"); rdev 2616 drivers/regulator/core.c _notifier_call_chain(rdev, rdev 2621 drivers/regulator/core.c _notifier_call_chain(rdev, REGULATOR_EVENT_DISABLE, rdev 2625 drivers/regulator/core.c rdev->use_count = 0; rdev 2626 drivers/regulator/core.c } else if (rdev->use_count > 1) { rdev 2627 drivers/regulator/core.c rdev->use_count--; rdev 2633 drivers/regulator/core.c if (ret == 0 && rdev->coupling_desc.n_coupled > 1) rdev 2634 drivers/regulator/core.c ret = regulator_balance_voltage(rdev, PM_SUSPEND_ON); rdev 2636 drivers/regulator/core.c if (ret == 0 && rdev->use_count == 0 && rdev->supply) rdev 2637 drivers/regulator/core.c ret = _regulator_disable(rdev->supply); rdev 2656 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2660 drivers/regulator/core.c regulator_lock_dependent(rdev, &ww_ctx); rdev 2662 drivers/regulator/core.c regulator_unlock_dependent(rdev, &ww_ctx); rdev 2669 drivers/regulator/core.c static int _regulator_force_disable(struct regulator_dev *rdev) rdev 2673 drivers/regulator/core.c lockdep_assert_held_once(&rdev->mutex.base); rdev 2675 drivers/regulator/core.c ret = _notifier_call_chain(rdev, REGULATOR_EVENT_FORCE_DISABLE | rdev 2680 drivers/regulator/core.c ret = _regulator_do_disable(rdev); rdev 2682 drivers/regulator/core.c rdev_err(rdev, "failed to force disable\n"); rdev 2683 drivers/regulator/core.c _notifier_call_chain(rdev, REGULATOR_EVENT_FORCE_DISABLE | rdev 2688 drivers/regulator/core.c _notifier_call_chain(rdev, REGULATOR_EVENT_FORCE_DISABLE | rdev 2705 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2709 drivers/regulator/core.c regulator_lock_dependent(rdev, &ww_ctx); rdev 2711 drivers/regulator/core.c ret = _regulator_force_disable(regulator->rdev); rdev 2713 drivers/regulator/core.c if (rdev->coupling_desc.n_coupled > 1) rdev 2714 drivers/regulator/core.c regulator_balance_voltage(rdev, PM_SUSPEND_ON); rdev 2718 drivers/regulator/core.c ret = drms_uA_update(rdev); rdev 2721 drivers/regulator/core.c if (rdev->use_count != 0 && rdev->supply) rdev 2722 drivers/regulator/core.c _regulator_disable(rdev->supply); rdev 2724 drivers/regulator/core.c regulator_unlock_dependent(rdev, &ww_ctx); rdev 2732 drivers/regulator/core.c struct regulator_dev *rdev = container_of(work, struct regulator_dev, rdev 2739 drivers/regulator/core.c regulator_lock_dependent(rdev, &ww_ctx); rdev 2747 drivers/regulator/core.c cancel_delayed_work(&rdev->disable_work); rdev 2749 drivers/regulator/core.c list_for_each_entry(regulator, &rdev->consumer_list, list) { rdev 2761 drivers/regulator/core.c rdev_err(rdev, "Deferred disable failed: %d\n", ret); rdev 2766 drivers/regulator/core.c if (rdev->coupling_desc.n_coupled > 1) rdev 2767 drivers/regulator/core.c regulator_balance_voltage(rdev, PM_SUSPEND_ON); rdev 2769 drivers/regulator/core.c regulator_unlock_dependent(rdev, &ww_ctx); rdev 2786 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2791 drivers/regulator/core.c regulator_lock(rdev); rdev 2793 drivers/regulator/core.c mod_delayed_work(system_power_efficient_wq, &rdev->disable_work, rdev 2795 drivers/regulator/core.c regulator_unlock(rdev); rdev 2801 drivers/regulator/core.c static int _regulator_is_enabled(struct regulator_dev *rdev) rdev 2804 drivers/regulator/core.c if (rdev->ena_pin) rdev 2805 drivers/regulator/core.c return rdev->ena_gpio_state; rdev 2808 drivers/regulator/core.c if (!rdev->desc->ops->is_enabled) rdev 2811 drivers/regulator/core.c return rdev->desc->ops->is_enabled(rdev); rdev 2814 drivers/regulator/core.c static int _regulator_list_voltage(struct regulator_dev *rdev, rdev 2817 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 2820 drivers/regulator/core.c if (rdev->desc->fixed_uV && rdev->desc->n_voltages == 1 && !selector) rdev 2821 drivers/regulator/core.c return rdev->desc->fixed_uV; rdev 2824 drivers/regulator/core.c if (selector >= rdev->desc->n_voltages) rdev 2827 drivers/regulator/core.c regulator_lock(rdev); rdev 2828 drivers/regulator/core.c ret = ops->list_voltage(rdev, selector); rdev 2830 drivers/regulator/core.c regulator_unlock(rdev); rdev 2831 drivers/regulator/core.c } else if (rdev->is_switch && rdev->supply) { rdev 2832 drivers/regulator/core.c ret = _regulator_list_voltage(rdev->supply->rdev, rdev 2839 drivers/regulator/core.c if (ret < rdev->constraints->min_uV) rdev 2841 drivers/regulator/core.c else if (ret > rdev->constraints->max_uV) rdev 2867 drivers/regulator/core.c regulator_lock(regulator->rdev); rdev 2868 drivers/regulator/core.c ret = _regulator_is_enabled(regulator->rdev); rdev 2869 drivers/regulator/core.c regulator_unlock(regulator->rdev); rdev 2885 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2887 drivers/regulator/core.c if (rdev->desc->n_voltages) rdev 2888 drivers/regulator/core.c return rdev->desc->n_voltages; rdev 2890 drivers/regulator/core.c if (!rdev->is_switch || !rdev->supply) rdev 2893 drivers/regulator/core.c return regulator_count_voltages(rdev->supply); rdev 2909 drivers/regulator/core.c return _regulator_list_voltage(regulator->rdev, selector, 1); rdev 2922 drivers/regulator/core.c struct regmap *map = regulator->rdev->regmap; rdev 2945 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2946 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 2951 drivers/regulator/core.c *vsel_reg = rdev->desc->vsel_reg; rdev 2952 drivers/regulator/core.c *vsel_mask = rdev->desc->vsel_mask; rdev 2972 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2973 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 2975 drivers/regulator/core.c if (selector >= rdev->desc->n_voltages) rdev 2993 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 2995 drivers/regulator/core.c return rdev->desc->uV_step; rdev 3011 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 3015 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) { rdev 3024 drivers/regulator/core.c if (rdev->desc->continuous_voltage_range) rdev 3025 drivers/regulator/core.c return min_uV >= rdev->constraints->min_uV && rdev 3026 drivers/regulator/core.c max_uV <= rdev->constraints->max_uV; rdev 3044 drivers/regulator/core.c static int regulator_map_voltage(struct regulator_dev *rdev, int min_uV, rdev 3047 drivers/regulator/core.c const struct regulator_desc *desc = rdev->desc; rdev 3050 drivers/regulator/core.c return desc->ops->map_voltage(rdev, min_uV, max_uV); rdev 3053 drivers/regulator/core.c return regulator_map_voltage_linear(rdev, min_uV, max_uV); rdev 3056 drivers/regulator/core.c return regulator_map_voltage_linear_range(rdev, min_uV, max_uV); rdev 3060 drivers/regulator/core.c return regulator_map_voltage_pickable_linear_range(rdev, rdev 3063 drivers/regulator/core.c return regulator_map_voltage_iterate(rdev, min_uV, max_uV); rdev 3066 drivers/regulator/core.c static int _regulator_call_set_voltage(struct regulator_dev *rdev, rdev 3073 drivers/regulator/core.c data.old_uV = regulator_get_voltage_rdev(rdev); rdev 3076 drivers/regulator/core.c ret = _notifier_call_chain(rdev, REGULATOR_EVENT_PRE_VOLTAGE_CHANGE, rdev 3081 drivers/regulator/core.c ret = rdev->desc->ops->set_voltage(rdev, min_uV, max_uV, selector); rdev 3085 drivers/regulator/core.c _notifier_call_chain(rdev, REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE, rdev 3091 drivers/regulator/core.c static int _regulator_call_set_voltage_sel(struct regulator_dev *rdev, rdev 3097 drivers/regulator/core.c data.old_uV = regulator_get_voltage_rdev(rdev); rdev 3100 drivers/regulator/core.c ret = _notifier_call_chain(rdev, REGULATOR_EVENT_PRE_VOLTAGE_CHANGE, rdev 3105 drivers/regulator/core.c ret = rdev->desc->ops->set_voltage_sel(rdev, selector); rdev 3109 drivers/regulator/core.c _notifier_call_chain(rdev, REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE, rdev 3115 drivers/regulator/core.c static int _regulator_set_voltage_sel_step(struct regulator_dev *rdev, rdev 3118 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 3122 drivers/regulator/core.c if (!_regulator_is_enabled(rdev)) rdev 3128 drivers/regulator/core.c old_sel = ops->get_voltage_sel(rdev); rdev 3138 drivers/regulator/core.c for (curr_sel = old_sel + rdev->desc->vsel_step; rdev 3140 drivers/regulator/core.c curr_sel += rdev->desc->vsel_step) { rdev 3147 drivers/regulator/core.c ret = ops->set_voltage_sel(rdev, curr_sel); rdev 3153 drivers/regulator/core.c for (curr_sel = old_sel - rdev->desc->vsel_step; rdev 3155 drivers/regulator/core.c curr_sel -= rdev->desc->vsel_step) { rdev 3156 drivers/regulator/core.c ret = ops->set_voltage_sel(rdev, curr_sel); rdev 3164 drivers/regulator/core.c return _regulator_call_set_voltage_sel(rdev, uV, new_selector); rdev 3171 drivers/regulator/core.c (void)ops->set_voltage_sel(rdev, old_sel); rdev 3175 drivers/regulator/core.c static int _regulator_set_voltage_time(struct regulator_dev *rdev, rdev 3180 drivers/regulator/core.c if (rdev->constraints->ramp_delay) rdev 3181 drivers/regulator/core.c ramp_delay = rdev->constraints->ramp_delay; rdev 3182 drivers/regulator/core.c else if (rdev->desc->ramp_delay) rdev 3183 drivers/regulator/core.c ramp_delay = rdev->desc->ramp_delay; rdev 3184 drivers/regulator/core.c else if (rdev->constraints->settling_time) rdev 3185 drivers/regulator/core.c return rdev->constraints->settling_time; rdev 3186 drivers/regulator/core.c else if (rdev->constraints->settling_time_up && rdev 3188 drivers/regulator/core.c return rdev->constraints->settling_time_up; rdev 3189 drivers/regulator/core.c else if (rdev->constraints->settling_time_down && rdev 3191 drivers/regulator/core.c return rdev->constraints->settling_time_down; rdev 3194 drivers/regulator/core.c rdev_dbg(rdev, "ramp_delay not set\n"); rdev 3201 drivers/regulator/core.c static int _regulator_do_set_voltage(struct regulator_dev *rdev, rdev 3209 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 3210 drivers/regulator/core.c int old_uV = regulator_get_voltage_rdev(rdev); rdev 3212 drivers/regulator/core.c trace_regulator_set_voltage(rdev_get_name(rdev), min_uV, max_uV); rdev 3214 drivers/regulator/core.c min_uV += rdev->constraints->uV_offset; rdev 3215 drivers/regulator/core.c max_uV += rdev->constraints->uV_offset; rdev 3221 drivers/regulator/core.c if (_regulator_is_enabled(rdev) && rdev 3223 drivers/regulator/core.c old_selector = ops->get_voltage_sel(rdev); rdev 3229 drivers/regulator/core.c ret = _regulator_call_set_voltage(rdev, min_uV, max_uV, rdev 3234 drivers/regulator/core.c best_val = ops->list_voltage(rdev, rdev 3237 drivers/regulator/core.c best_val = regulator_get_voltage_rdev(rdev); rdev 3241 drivers/regulator/core.c ret = regulator_map_voltage(rdev, min_uV, max_uV); rdev 3243 drivers/regulator/core.c best_val = ops->list_voltage(rdev, ret); rdev 3248 drivers/regulator/core.c else if (rdev->desc->vsel_step) rdev 3250 drivers/regulator/core.c rdev, best_val, selector); rdev 3253 drivers/regulator/core.c rdev, best_val, selector); rdev 3271 drivers/regulator/core.c delay = ops->set_voltage_time_sel(rdev, old_selector, rdev 3276 drivers/regulator/core.c delay = ops->set_voltage_time(rdev, old_uV, rdev 3279 drivers/regulator/core.c delay = _regulator_set_voltage_time(rdev, rdev 3286 drivers/regulator/core.c rdev_warn(rdev, "failed to get delay: %d\n", delay); rdev 3301 drivers/regulator/core.c _notifier_call_chain(rdev, REGULATOR_EVENT_VOLTAGE_CHANGE, rdev 3306 drivers/regulator/core.c trace_regulator_set_voltage_complete(rdev_get_name(rdev), best_val); rdev 3311 drivers/regulator/core.c static int _regulator_do_set_suspend_voltage(struct regulator_dev *rdev, rdev 3317 drivers/regulator/core.c rstate = regulator_get_suspend_state(rdev, state); rdev 3326 drivers/regulator/core.c sel = regulator_map_voltage(rdev, min_uV, max_uV); rdev 3330 drivers/regulator/core.c uV = rdev->desc->ops->list_voltage(rdev, sel); rdev 3341 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 3358 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_VOLTAGE)) { rdev 3359 drivers/regulator/core.c current_uV = regulator_get_voltage_rdev(rdev); rdev 3368 drivers/regulator/core.c if (!rdev->desc->ops->set_voltage && rdev 3369 drivers/regulator/core.c !rdev->desc->ops->set_voltage_sel) { rdev 3375 drivers/regulator/core.c ret = regulator_check_voltage(rdev, &min_uV, &max_uV); rdev 3386 drivers/regulator/core.c ret = regulator_balance_voltage(rdev, state); rdev 3396 drivers/regulator/core.c int regulator_set_voltage_rdev(struct regulator_dev *rdev, int min_uV, rdev 3403 drivers/regulator/core.c if (rdev->supply && rdev 3404 drivers/regulator/core.c regulator_ops_is_valid(rdev->supply->rdev, rdev 3406 drivers/regulator/core.c (rdev->desc->min_dropout_uV || !(rdev->desc->ops->get_voltage || rdev 3407 drivers/regulator/core.c rdev->desc->ops->get_voltage_sel))) { rdev 3411 drivers/regulator/core.c selector = regulator_map_voltage(rdev, min_uV, max_uV); rdev 3417 drivers/regulator/core.c best_supply_uV = _regulator_list_voltage(rdev, selector, 0); rdev 3423 drivers/regulator/core.c best_supply_uV += rdev->desc->min_dropout_uV; rdev 3425 drivers/regulator/core.c current_supply_uV = regulator_get_voltage_rdev(rdev->supply->rdev); rdev 3435 drivers/regulator/core.c ret = regulator_set_voltage_unlocked(rdev->supply, rdev 3438 drivers/regulator/core.c dev_err(&rdev->dev, "Failed to increase supply voltage: %d\n", rdev 3445 drivers/regulator/core.c ret = _regulator_do_set_voltage(rdev, min_uV, max_uV); rdev 3447 drivers/regulator/core.c ret = _regulator_do_set_suspend_voltage(rdev, min_uV, rdev 3453 drivers/regulator/core.c ret = regulator_set_voltage_unlocked(rdev->supply, rdev 3456 drivers/regulator/core.c dev_warn(&rdev->dev, "Failed to decrease supply voltage: %d\n", rdev 3467 drivers/regulator/core.c static int regulator_limit_voltage_step(struct regulator_dev *rdev, rdev 3470 drivers/regulator/core.c struct regulation_constraints *constraints = rdev->constraints; rdev 3473 drivers/regulator/core.c if (!constraints->max_uV_step || !_regulator_is_enabled(rdev)) rdev 3477 drivers/regulator/core.c *current_uV = regulator_get_voltage_rdev(rdev); rdev 3497 drivers/regulator/core.c static int regulator_get_optimal_voltage(struct regulator_dev *rdev, rdev 3503 drivers/regulator/core.c struct coupling_desc *c_desc = &rdev->coupling_desc; rdev 3505 drivers/regulator/core.c struct regulation_constraints *constraints = rdev->constraints; rdev 3526 drivers/regulator/core.c ret = regulator_check_consumers(rdev, rdev 3611 drivers/regulator/core.c ret = regulator_limit_voltage_step(rdev, current_uV, rdev 3623 drivers/regulator/core.c if (_regulator_is_enabled(rdev)) { rdev 3624 drivers/regulator/core.c ret = regulator_get_voltage_rdev(rdev); rdev 3640 drivers/regulator/core.c static int regulator_balance_voltage(struct regulator_dev *rdev, rdev 3645 drivers/regulator/core.c struct coupling_desc *c_desc = &rdev->coupling_desc; rdev 3663 drivers/regulator/core.c rdev_err(rdev, "Not all coupled regulators registered\n"); rdev 3669 drivers/regulator/core.c return coupler->balance_voltage(coupler, rdev, state); rdev 3763 drivers/regulator/core.c regulator_lock_dependent(regulator->rdev, &ww_ctx); rdev 3768 drivers/regulator/core.c regulator_unlock_dependent(regulator->rdev, &ww_ctx); rdev 3774 drivers/regulator/core.c static inline int regulator_suspend_toggle(struct regulator_dev *rdev, rdev 3779 drivers/regulator/core.c rstate = regulator_get_suspend_state(rdev, state); rdev 3791 drivers/regulator/core.c int regulator_suspend_enable(struct regulator_dev *rdev, rdev 3794 drivers/regulator/core.c return regulator_suspend_toggle(rdev, state, true); rdev 3798 drivers/regulator/core.c int regulator_suspend_disable(struct regulator_dev *rdev, rdev 3808 drivers/regulator/core.c list_for_each_entry(regulator, &rdev->consumer_list, list) { rdev 3814 drivers/regulator/core.c return regulator_suspend_toggle(rdev, state, false); rdev 3822 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 3825 drivers/regulator/core.c rstate = regulator_get_suspend_state(rdev, state); rdev 3830 drivers/regulator/core.c rdev_err(rdev, "The suspend voltage can't be changed!\n"); rdev 3847 drivers/regulator/core.c regulator_lock_dependent(regulator->rdev, &ww_ctx); rdev 3852 drivers/regulator/core.c regulator_unlock_dependent(regulator->rdev, &ww_ctx); rdev 3871 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 3872 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 3879 drivers/regulator/core.c return ops->set_voltage_time(rdev, old_uV, new_uV); rdev 3881 drivers/regulator/core.c return _regulator_set_voltage_time(rdev, old_uV, new_uV); rdev 3884 drivers/regulator/core.c if (!ops->list_voltage || !rdev->desc->n_voltages) rdev 3887 drivers/regulator/core.c for (i = 0; i < rdev->desc->n_voltages; i++) { rdev 3903 drivers/regulator/core.c return ops->set_voltage_time_sel(rdev, old_sel, new_sel); rdev 3919 drivers/regulator/core.c int regulator_set_voltage_time_sel(struct regulator_dev *rdev, rdev 3926 drivers/regulator/core.c if (!rdev->desc->ops->list_voltage) rdev 3929 drivers/regulator/core.c old_volt = rdev->desc->ops->list_voltage(rdev, old_selector); rdev 3930 drivers/regulator/core.c new_volt = rdev->desc->ops->list_voltage(rdev, new_selector); rdev 3932 drivers/regulator/core.c if (rdev->desc->ops->set_voltage_time) rdev 3933 drivers/regulator/core.c return rdev->desc->ops->set_voltage_time(rdev, old_volt, rdev 3936 drivers/regulator/core.c return _regulator_set_voltage_time(rdev, old_volt, new_volt); rdev 3950 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 3954 drivers/regulator/core.c regulator_lock(rdev); rdev 3956 drivers/regulator/core.c if (!rdev->desc->ops->set_voltage && rdev 3957 drivers/regulator/core.c !rdev->desc->ops->set_voltage_sel) { rdev 3972 drivers/regulator/core.c ret = regulator_check_voltage(rdev, &min_uV, &max_uV); rdev 3976 drivers/regulator/core.c ret = regulator_check_consumers(rdev, &min_uV, &max_uV, 0); rdev 3980 drivers/regulator/core.c ret = _regulator_do_set_voltage(rdev, min_uV, max_uV); rdev 3983 drivers/regulator/core.c regulator_unlock(rdev); rdev 3988 drivers/regulator/core.c int regulator_get_voltage_rdev(struct regulator_dev *rdev) rdev 3993 drivers/regulator/core.c if (rdev->desc->ops->get_bypass) { rdev 3994 drivers/regulator/core.c ret = rdev->desc->ops->get_bypass(rdev, &bypassed); rdev 3999 drivers/regulator/core.c if (!rdev->supply) { rdev 4000 drivers/regulator/core.c rdev_err(rdev, rdev 4005 drivers/regulator/core.c return regulator_get_voltage_rdev(rdev->supply->rdev); rdev 4009 drivers/regulator/core.c if (rdev->desc->ops->get_voltage_sel) { rdev 4010 drivers/regulator/core.c sel = rdev->desc->ops->get_voltage_sel(rdev); rdev 4013 drivers/regulator/core.c ret = rdev->desc->ops->list_voltage(rdev, sel); rdev 4014 drivers/regulator/core.c } else if (rdev->desc->ops->get_voltage) { rdev 4015 drivers/regulator/core.c ret = rdev->desc->ops->get_voltage(rdev); rdev 4016 drivers/regulator/core.c } else if (rdev->desc->ops->list_voltage) { rdev 4017 drivers/regulator/core.c ret = rdev->desc->ops->list_voltage(rdev, 0); rdev 4018 drivers/regulator/core.c } else if (rdev->desc->fixed_uV && (rdev->desc->n_voltages == 1)) { rdev 4019 drivers/regulator/core.c ret = rdev->desc->fixed_uV; rdev 4020 drivers/regulator/core.c } else if (rdev->supply) { rdev 4021 drivers/regulator/core.c ret = regulator_get_voltage_rdev(rdev->supply->rdev); rdev 4028 drivers/regulator/core.c return ret - rdev->constraints->uV_offset; rdev 4046 drivers/regulator/core.c regulator_lock_dependent(regulator->rdev, &ww_ctx); rdev 4047 drivers/regulator/core.c ret = regulator_get_voltage_rdev(regulator->rdev); rdev 4048 drivers/regulator/core.c regulator_unlock_dependent(regulator->rdev, &ww_ctx); rdev 4073 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 4076 drivers/regulator/core.c regulator_lock(rdev); rdev 4079 drivers/regulator/core.c if (!rdev->desc->ops->set_current_limit) { rdev 4085 drivers/regulator/core.c ret = regulator_check_current_limit(rdev, &min_uA, &max_uA); rdev 4089 drivers/regulator/core.c ret = rdev->desc->ops->set_current_limit(rdev, min_uA, max_uA); rdev 4091 drivers/regulator/core.c regulator_unlock(rdev); rdev 4096 drivers/regulator/core.c static int _regulator_get_current_limit_unlocked(struct regulator_dev *rdev) rdev 4099 drivers/regulator/core.c if (!rdev->desc->ops->get_current_limit) rdev 4102 drivers/regulator/core.c return rdev->desc->ops->get_current_limit(rdev); rdev 4105 drivers/regulator/core.c static int _regulator_get_current_limit(struct regulator_dev *rdev) rdev 4109 drivers/regulator/core.c regulator_lock(rdev); rdev 4110 drivers/regulator/core.c ret = _regulator_get_current_limit_unlocked(rdev); rdev 4111 drivers/regulator/core.c regulator_unlock(rdev); rdev 4127 drivers/regulator/core.c return _regulator_get_current_limit(regulator->rdev); rdev 4144 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 4148 drivers/regulator/core.c regulator_lock(rdev); rdev 4151 drivers/regulator/core.c if (!rdev->desc->ops->set_mode) { rdev 4157 drivers/regulator/core.c if (rdev->desc->ops->get_mode) { rdev 4158 drivers/regulator/core.c regulator_curr_mode = rdev->desc->ops->get_mode(rdev); rdev 4166 drivers/regulator/core.c ret = regulator_mode_constrain(rdev, &mode); rdev 4170 drivers/regulator/core.c ret = rdev->desc->ops->set_mode(rdev, mode); rdev 4172 drivers/regulator/core.c regulator_unlock(rdev); rdev 4177 drivers/regulator/core.c static unsigned int _regulator_get_mode_unlocked(struct regulator_dev *rdev) rdev 4180 drivers/regulator/core.c if (!rdev->desc->ops->get_mode) rdev 4183 drivers/regulator/core.c return rdev->desc->ops->get_mode(rdev); rdev 4186 drivers/regulator/core.c static unsigned int _regulator_get_mode(struct regulator_dev *rdev) rdev 4190 drivers/regulator/core.c regulator_lock(rdev); rdev 4191 drivers/regulator/core.c ret = _regulator_get_mode_unlocked(rdev); rdev 4192 drivers/regulator/core.c regulator_unlock(rdev); rdev 4205 drivers/regulator/core.c return _regulator_get_mode(regulator->rdev); rdev 4209 drivers/regulator/core.c static int _regulator_get_error_flags(struct regulator_dev *rdev, rdev 4214 drivers/regulator/core.c regulator_lock(rdev); rdev 4217 drivers/regulator/core.c if (!rdev->desc->ops->get_error_flags) { rdev 4222 drivers/regulator/core.c ret = rdev->desc->ops->get_error_flags(rdev, flags); rdev 4224 drivers/regulator/core.c regulator_unlock(rdev); rdev 4238 drivers/regulator/core.c return _regulator_get_error_flags(regulator->rdev, flags); rdev 4278 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 4282 drivers/regulator/core.c regulator_lock(rdev); rdev 4286 drivers/regulator/core.c ret = drms_uA_update(rdev); rdev 4290 drivers/regulator/core.c regulator_unlock(rdev); rdev 4309 drivers/regulator/core.c struct regulator_dev *rdev = regulator->rdev; rdev 4312 drivers/regulator/core.c if (!rdev->desc->ops->set_bypass) rdev 4315 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_BYPASS)) rdev 4318 drivers/regulator/core.c regulator_lock(rdev); rdev 4321 drivers/regulator/core.c rdev->bypass_count++; rdev 4323 drivers/regulator/core.c if (rdev->bypass_count == rdev->open_count) { rdev 4324 drivers/regulator/core.c ret = rdev->desc->ops->set_bypass(rdev, enable); rdev 4326 drivers/regulator/core.c rdev->bypass_count--; rdev 4330 drivers/regulator/core.c rdev->bypass_count--; rdev 4332 drivers/regulator/core.c if (rdev->bypass_count != rdev->open_count) { rdev 4333 drivers/regulator/core.c ret = rdev->desc->ops->set_bypass(rdev, enable); rdev 4335 drivers/regulator/core.c rdev->bypass_count++; rdev 4342 drivers/regulator/core.c regulator_unlock(rdev); rdev 4358 drivers/regulator/core.c return blocking_notifier_chain_register(®ulator->rdev->notifier, rdev 4373 drivers/regulator/core.c return blocking_notifier_chain_unregister(®ulator->rdev->notifier, rdev 4381 drivers/regulator/core.c static int _notifier_call_chain(struct regulator_dev *rdev, rdev 4385 drivers/regulator/core.c return blocking_notifier_call_chain(&rdev->notifier, event, data); rdev 4597 drivers/regulator/core.c int regulator_notifier_call_chain(struct regulator_dev *rdev, rdev 4600 drivers/regulator/core.c lockdep_assert_held_once(&rdev->mutex.base); rdev 4602 drivers/regulator/core.c _notifier_call_chain(rdev, event, data); rdev 4667 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 4668 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 4679 drivers/regulator/core.c if ((ops->get_voltage && ops->get_voltage(rdev) >= 0) || rdev 4680 drivers/regulator/core.c (ops->get_voltage_sel && ops->get_voltage_sel(rdev) >= 0) || rdev 4681 drivers/regulator/core.c (ops->list_voltage && ops->list_voltage(rdev, 0) >= 0) || rdev 4682 drivers/regulator/core.c (rdev->desc->fixed_uV && rdev->desc->n_voltages == 1)) rdev 4694 drivers/regulator/core.c return (rdev->ena_pin || ops->is_enabled) ? mode : 0; rdev 4741 drivers/regulator/core.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 4743 drivers/regulator/core.c kfree(rdev->constraints); rdev 4744 drivers/regulator/core.c of_node_put(rdev->dev.of_node); rdev 4745 drivers/regulator/core.c kfree(rdev); rdev 4748 drivers/regulator/core.c static void rdev_init_debugfs(struct regulator_dev *rdev) rdev 4750 drivers/regulator/core.c struct device *parent = rdev->dev.parent; rdev 4751 drivers/regulator/core.c const char *rname = rdev_get_name(rdev); rdev 4755 drivers/regulator/core.c if (parent && rname == rdev->desc->name) { rdev 4761 drivers/regulator/core.c rdev->debugfs = debugfs_create_dir(rname, debugfs_root); rdev 4762 drivers/regulator/core.c if (!rdev->debugfs) { rdev 4763 drivers/regulator/core.c rdev_warn(rdev, "Failed to create debugfs directory\n"); rdev 4767 drivers/regulator/core.c debugfs_create_u32("use_count", 0444, rdev->debugfs, rdev 4768 drivers/regulator/core.c &rdev->use_count); rdev 4769 drivers/regulator/core.c debugfs_create_u32("open_count", 0444, rdev->debugfs, rdev 4770 drivers/regulator/core.c &rdev->open_count); rdev 4771 drivers/regulator/core.c debugfs_create_u32("bypass_count", 0444, rdev->debugfs, rdev 4772 drivers/regulator/core.c &rdev->bypass_count); rdev 4777 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 4779 drivers/regulator/core.c if (regulator_resolve_supply(rdev)) rdev 4780 drivers/regulator/core.c rdev_dbg(rdev, "unable to resolve supply\n"); rdev 4795 drivers/regulator/core.c regulator_find_coupler(struct regulator_dev *rdev) rdev 4806 drivers/regulator/core.c err = coupler->attach_regulator(coupler, rdev); rdev 4809 drivers/regulator/core.c rdev->coupling_desc.n_coupled > 2) rdev 4828 drivers/regulator/core.c coupler->detach_regulator(coupler, rdev); rdev 4830 drivers/regulator/core.c rdev_err(rdev, rdev 4836 drivers/regulator/core.c static void regulator_resolve_coupling(struct regulator_dev *rdev) rdev 4838 drivers/regulator/core.c struct regulator_coupler *coupler = rdev->coupling_desc.coupler; rdev 4839 drivers/regulator/core.c struct coupling_desc *c_desc = &rdev->coupling_desc; rdev 4849 drivers/regulator/core.c c_rdev = of_parse_coupled_regulator(rdev, i - 1); rdev 4855 drivers/regulator/core.c rdev_err(rdev, "coupler mismatch with %s\n", rdev 4871 drivers/regulator/core.c static void regulator_remove_coupling(struct regulator_dev *rdev) rdev 4873 drivers/regulator/core.c struct regulator_coupler *coupler = rdev->coupling_desc.coupler; rdev 4874 drivers/regulator/core.c struct coupling_desc *__c_desc, *c_desc = &rdev->coupling_desc; rdev 4896 drivers/regulator/core.c if (__c_rdev == rdev) { rdev 4910 drivers/regulator/core.c err = coupler->detach_regulator(coupler, rdev); rdev 4912 drivers/regulator/core.c rdev_err(rdev, "failed to detach from coupler: %d\n", rdev 4916 drivers/regulator/core.c kfree(rdev->coupling_desc.coupled_rdevs); rdev 4917 drivers/regulator/core.c rdev->coupling_desc.coupled_rdevs = NULL; rdev 4920 drivers/regulator/core.c static int regulator_init_coupling(struct regulator_dev *rdev) rdev 4928 drivers/regulator/core.c n_phandles = of_get_n_coupled(rdev); rdev 4930 drivers/regulator/core.c alloc_size = sizeof(*rdev) * (n_phandles + 1); rdev 4932 drivers/regulator/core.c rdev->coupling_desc.coupled_rdevs = kzalloc(alloc_size, GFP_KERNEL); rdev 4933 drivers/regulator/core.c if (!rdev->coupling_desc.coupled_rdevs) rdev 4940 drivers/regulator/core.c rdev->coupling_desc.coupled_rdevs[0] = rdev; rdev 4941 drivers/regulator/core.c rdev->coupling_desc.n_coupled = n_phandles + 1; rdev 4942 drivers/regulator/core.c rdev->coupling_desc.n_resolved++; rdev 4948 drivers/regulator/core.c if (!of_check_coupling_data(rdev)) rdev 4951 drivers/regulator/core.c rdev->coupling_desc.coupler = regulator_find_coupler(rdev); rdev 4952 drivers/regulator/core.c if (IS_ERR(rdev->coupling_desc.coupler)) { rdev 4953 drivers/regulator/core.c err = PTR_ERR(rdev->coupling_desc.coupler); rdev 4954 drivers/regulator/core.c rdev_err(rdev, "failed to get coupler: %d\n", err); rdev 4962 drivers/regulator/core.c struct regulator_dev *rdev) rdev 4964 drivers/regulator/core.c if (rdev->coupling_desc.n_coupled > 2) { rdev 4965 drivers/regulator/core.c rdev_err(rdev, rdev 4994 drivers/regulator/core.c struct regulator_dev *rdev; rdev 5042 drivers/regulator/core.c rdev = kzalloc(sizeof(struct regulator_dev), GFP_KERNEL); rdev 5043 drivers/regulator/core.c if (rdev == NULL) { rdev 5054 drivers/regulator/core.c kfree(rdev); rdev 5060 drivers/regulator/core.c &rdev->dev.of_node); rdev 5069 drivers/regulator/core.c kfree(rdev); rdev 5086 drivers/regulator/core.c rdev->dev.of_node = of_node_get(config->of_node); rdev 5089 drivers/regulator/core.c ww_mutex_init(&rdev->mutex, ®ulator_ww_class); rdev 5090 drivers/regulator/core.c rdev->reg_data = config->driver_data; rdev 5091 drivers/regulator/core.c rdev->owner = regulator_desc->owner; rdev 5092 drivers/regulator/core.c rdev->desc = regulator_desc; rdev 5094 drivers/regulator/core.c rdev->regmap = config->regmap; rdev 5096 drivers/regulator/core.c rdev->regmap = dev_get_regmap(dev, NULL); rdev 5098 drivers/regulator/core.c rdev->regmap = dev_get_regmap(dev->parent, NULL); rdev 5099 drivers/regulator/core.c INIT_LIST_HEAD(&rdev->consumer_list); rdev 5100 drivers/regulator/core.c INIT_LIST_HEAD(&rdev->list); rdev 5101 drivers/regulator/core.c BLOCKING_INIT_NOTIFIER_HEAD(&rdev->notifier); rdev 5102 drivers/regulator/core.c INIT_DELAYED_WORK(&rdev->disable_work, regulator_disable_work); rdev 5106 drivers/regulator/core.c ret = init_data->regulator_init(rdev->reg_data); rdev 5113 drivers/regulator/core.c ret = regulator_ena_gpio_request(rdev, config); rdev 5116 drivers/regulator/core.c rdev_err(rdev, "Failed to request enable GPIO: %d\n", rdev 5126 drivers/regulator/core.c rdev->dev.class = ®ulator_class; rdev 5127 drivers/regulator/core.c rdev->dev.parent = dev; rdev 5128 drivers/regulator/core.c dev_set_name(&rdev->dev, "regulator.%lu", rdev 5136 drivers/regulator/core.c rdev->supply_name = init_data->supply_regulator; rdev 5138 drivers/regulator/core.c rdev->supply_name = regulator_desc->supply_name; rdev 5145 drivers/regulator/core.c if (regulator_resolve_supply(rdev)) rdev 5146 drivers/regulator/core.c rdev_dbg(rdev, "unable to resolve supply\n"); rdev 5148 drivers/regulator/core.c ret = set_machine_constraints(rdev, constraints); rdev 5153 drivers/regulator/core.c ret = regulator_init_coupling(rdev); rdev 5162 drivers/regulator/core.c ret = set_consumer_device_supply(rdev, rdev 5175 drivers/regulator/core.c if (!rdev->desc->ops->get_voltage && rdev 5176 drivers/regulator/core.c !rdev->desc->ops->list_voltage && rdev 5177 drivers/regulator/core.c !rdev->desc->fixed_uV) rdev 5178 drivers/regulator/core.c rdev->is_switch = true; rdev 5180 drivers/regulator/core.c dev_set_drvdata(&rdev->dev, rdev); rdev 5181 drivers/regulator/core.c ret = device_register(&rdev->dev); rdev 5187 drivers/regulator/core.c rdev_init_debugfs(rdev); rdev 5191 drivers/regulator/core.c regulator_resolve_coupling(rdev); rdev 5198 drivers/regulator/core.c return rdev; rdev 5202 drivers/regulator/core.c unset_regulator_supplies(rdev); rdev 5203 drivers/regulator/core.c regulator_remove_coupling(rdev); rdev 5206 drivers/regulator/core.c kfree(rdev->coupling_desc.coupled_rdevs); rdev 5207 drivers/regulator/core.c kfree(rdev->constraints); rdev 5209 drivers/regulator/core.c regulator_ena_gpio_free(rdev); rdev 5215 drivers/regulator/core.c put_device(&rdev->dev); rdev 5217 drivers/regulator/core.c kfree(rdev); rdev 5232 drivers/regulator/core.c void regulator_unregister(struct regulator_dev *rdev) rdev 5234 drivers/regulator/core.c if (rdev == NULL) rdev 5237 drivers/regulator/core.c if (rdev->supply) { rdev 5238 drivers/regulator/core.c while (rdev->use_count--) rdev 5239 drivers/regulator/core.c regulator_disable(rdev->supply); rdev 5240 drivers/regulator/core.c regulator_put(rdev->supply); rdev 5243 drivers/regulator/core.c flush_work(&rdev->disable_work.work); rdev 5247 drivers/regulator/core.c debugfs_remove_recursive(rdev->debugfs); rdev 5248 drivers/regulator/core.c WARN_ON(rdev->open_count); rdev 5249 drivers/regulator/core.c regulator_remove_coupling(rdev); rdev 5250 drivers/regulator/core.c unset_regulator_supplies(rdev); rdev 5251 drivers/regulator/core.c list_del(&rdev->list); rdev 5252 drivers/regulator/core.c regulator_ena_gpio_free(rdev); rdev 5253 drivers/regulator/core.c device_unregister(&rdev->dev); rdev 5268 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 5272 drivers/regulator/core.c regulator_lock(rdev); rdev 5273 drivers/regulator/core.c ret = suspend_set_state(rdev, state); rdev 5274 drivers/regulator/core.c regulator_unlock(rdev); rdev 5282 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 5286 drivers/regulator/core.c rstate = regulator_get_suspend_state(rdev, state); rdev 5290 drivers/regulator/core.c regulator_lock(rdev); rdev 5292 drivers/regulator/core.c if (rdev->desc->ops->resume && rdev 5295 drivers/regulator/core.c ret = rdev->desc->ops->resume(rdev); rdev 5297 drivers/regulator/core.c regulator_unlock(rdev); rdev 5347 drivers/regulator/core.c void *rdev_get_drvdata(struct regulator_dev *rdev) rdev 5349 drivers/regulator/core.c return rdev->reg_data; rdev 5362 drivers/regulator/core.c return regulator->rdev->reg_data; rdev 5373 drivers/regulator/core.c regulator->rdev->reg_data = data; rdev 5381 drivers/regulator/core.c int rdev_get_id(struct regulator_dev *rdev) rdev 5383 drivers/regulator/core.c return rdev->desc->id; rdev 5387 drivers/regulator/core.c struct device *rdev_get_dev(struct regulator_dev *rdev) rdev 5389 drivers/regulator/core.c return &rdev->dev; rdev 5393 drivers/regulator/core.c struct regmap *rdev_get_regmap(struct regulator_dev *rdev) rdev 5395 drivers/regulator/core.c return rdev->regmap; rdev 5427 drivers/regulator/core.c struct regulator_dev *rdev, rdev 5432 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 5435 drivers/regulator/core.c if (rdev->supply && rdev->supply->rdev == summary_data->parent) rdev 5436 drivers/regulator/core.c regulator_summary_show_subtree(summary_data->s, rdev, rdev 5443 drivers/regulator/core.c struct regulator_dev *rdev, rdev 5451 drivers/regulator/core.c if (!rdev) rdev 5454 drivers/regulator/core.c opmode = _regulator_get_mode_unlocked(rdev); rdev 5457 drivers/regulator/core.c 30 - level * 3, rdev_get_name(rdev), rdev 5458 drivers/regulator/core.c rdev->use_count, rdev->open_count, rdev->bypass_count, rdev 5461 drivers/regulator/core.c seq_printf(s, "%5dmV ", regulator_get_voltage_rdev(rdev) / 1000); rdev 5463 drivers/regulator/core.c _regulator_get_current_limit_unlocked(rdev) / 1000); rdev 5465 drivers/regulator/core.c c = rdev->constraints; rdev 5467 drivers/regulator/core.c switch (rdev->desc->type) { rdev 5481 drivers/regulator/core.c list_for_each_entry(consumer, &rdev->consumer_list, list) { rdev 5490 drivers/regulator/core.c switch (rdev->desc->type) { rdev 5509 drivers/regulator/core.c summary_data.parent = rdev; rdev 5523 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 5527 drivers/regulator/core.c if (rdev != *lock_data->old_contended_rdev) { rdev 5528 drivers/regulator/core.c ret = regulator_lock_nested(rdev, lock_data->ww_ctx); rdev 5531 drivers/regulator/core.c *lock_data->new_contended_rdev = rdev; rdev 5543 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 5547 drivers/regulator/core.c if (rdev == *lock_data->new_contended_rdev) rdev 5551 drivers/regulator/core.c regulator_unlock(rdev); rdev 5616 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 5619 drivers/regulator/core.c if (!rdev->supply) rdev 5620 drivers/regulator/core.c regulator_summary_show_subtree(s, rdev, 0); rdev 5673 drivers/regulator/core.c struct regulator_dev *rdev = dev_to_rdev(dev); rdev 5674 drivers/regulator/core.c const struct regulator_ops *ops = rdev->desc->ops; rdev 5675 drivers/regulator/core.c struct regulation_constraints *c = rdev->constraints; rdev 5681 drivers/regulator/core.c if (!regulator_ops_is_valid(rdev, REGULATOR_CHANGE_STATUS)) rdev 5684 drivers/regulator/core.c regulator_lock(rdev); rdev 5686 drivers/regulator/core.c if (rdev->use_count) rdev 5691 drivers/regulator/core.c enabled = ops->is_enabled(rdev); rdev 5701 drivers/regulator/core.c rdev_info(rdev, "disabling\n"); rdev 5702 drivers/regulator/core.c ret = _regulator_do_disable(rdev); rdev 5704 drivers/regulator/core.c rdev_err(rdev, "couldn't disable: %d\n", ret); rdev 5711 drivers/regulator/core.c rdev_warn(rdev, "incomplete constraints, leaving on\n"); rdev 5715 drivers/regulator/core.c regulator_unlock(rdev); rdev 169 drivers/regulator/cpcap-regulator.c static int cpcap_regulator_enable(struct regulator_dev *rdev) rdev 171 drivers/regulator/cpcap-regulator.c struct cpcap_regulator *regulator = rdev_get_drvdata(rdev); rdev 174 drivers/regulator/cpcap-regulator.c error = regulator_enable_regmap(rdev); rdev 178 drivers/regulator/cpcap-regulator.c if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { rdev 179 drivers/regulator/cpcap-regulator.c error = regmap_update_bits(rdev->regmap, regulator->assign_reg, rdev 183 drivers/regulator/cpcap-regulator.c ignore = regulator_disable_regmap(rdev); rdev 193 drivers/regulator/cpcap-regulator.c static int cpcap_regulator_disable(struct regulator_dev *rdev) rdev 195 drivers/regulator/cpcap-regulator.c struct cpcap_regulator *regulator = rdev_get_drvdata(rdev); rdev 198 drivers/regulator/cpcap-regulator.c if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { rdev 199 drivers/regulator/cpcap-regulator.c error = regmap_update_bits(rdev->regmap, regulator->assign_reg, rdev 205 drivers/regulator/cpcap-regulator.c error = regulator_disable_regmap(rdev); rdev 206 drivers/regulator/cpcap-regulator.c if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { rdev 207 drivers/regulator/cpcap-regulator.c ignore = regmap_update_bits(rdev->regmap, regulator->assign_reg, rdev 227 drivers/regulator/cpcap-regulator.c static unsigned int cpcap_regulator_get_mode(struct regulator_dev *rdev) rdev 231 drivers/regulator/cpcap-regulator.c regmap_read(rdev->regmap, rdev->desc->enable_reg, &value); rdev 239 drivers/regulator/cpcap-regulator.c static int cpcap_regulator_set_mode(struct regulator_dev *rdev, rdev 255 drivers/regulator/cpcap-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 537 drivers/regulator/cpcap-regulator.c struct regulator_dev *rdev; rdev 546 drivers/regulator/cpcap-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 549 drivers/regulator/cpcap-regulator.c if (IS_ERR(rdev)) { rdev 553 drivers/regulator/cpcap-regulator.c return PTR_ERR(rdev); rdev 85 drivers/regulator/da903x.c static inline struct device *to_da903x_dev(struct regulator_dev *rdev) rdev 87 drivers/regulator/da903x.c return rdev_get_dev(rdev)->parent->parent; rdev 100 drivers/regulator/da903x.c static int da903x_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) rdev 102 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 103 drivers/regulator/da903x.c struct device *da9034_dev = to_da903x_dev(rdev); rdev 106 drivers/regulator/da903x.c if (rdev->desc->n_voltages == 1) rdev 115 drivers/regulator/da903x.c static int da903x_get_voltage_sel(struct regulator_dev *rdev) rdev 117 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 118 drivers/regulator/da903x.c struct device *da9034_dev = to_da903x_dev(rdev); rdev 122 drivers/regulator/da903x.c if (rdev->desc->n_voltages == 1) rdev 135 drivers/regulator/da903x.c static int da903x_enable(struct regulator_dev *rdev) rdev 137 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 138 drivers/regulator/da903x.c struct device *da9034_dev = to_da903x_dev(rdev); rdev 144 drivers/regulator/da903x.c static int da903x_disable(struct regulator_dev *rdev) rdev 146 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 147 drivers/regulator/da903x.c struct device *da9034_dev = to_da903x_dev(rdev); rdev 153 drivers/regulator/da903x.c static int da903x_is_enabled(struct regulator_dev *rdev) rdev 155 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 156 drivers/regulator/da903x.c struct device *da9034_dev = to_da903x_dev(rdev); rdev 168 drivers/regulator/da903x.c static int da9030_set_ldo1_15_voltage_sel(struct regulator_dev *rdev, rdev 171 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 172 drivers/regulator/da903x.c struct device *da903x_dev = to_da903x_dev(rdev); rdev 189 drivers/regulator/da903x.c static int da9030_map_ldo14_voltage(struct regulator_dev *rdev, rdev 192 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 211 drivers/regulator/da903x.c static int da9030_list_ldo14_voltage(struct regulator_dev *rdev, rdev 214 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 218 drivers/regulator/da903x.c volt = rdev->desc->min_uV + rdev 219 drivers/regulator/da903x.c rdev->desc->uV_step * (3 - (selector & ~0x4)); rdev 221 drivers/regulator/da903x.c volt = (info->max_uV + rdev->desc->min_uV) / 2 + rdev 222 drivers/regulator/da903x.c rdev->desc->uV_step * (selector & ~0x4); rdev 231 drivers/regulator/da903x.c static int da9034_set_dvc_voltage_sel(struct regulator_dev *rdev, rdev 234 drivers/regulator/da903x.c struct da903x_regulator_info *info = rdev_get_drvdata(rdev); rdev 235 drivers/regulator/da903x.c struct device *da9034_dev = to_da903x_dev(rdev); rdev 433 drivers/regulator/da903x.c struct regulator_dev *rdev; rdev 460 drivers/regulator/da903x.c rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); rdev 461 drivers/regulator/da903x.c if (IS_ERR(rdev)) { rdev 464 drivers/regulator/da903x.c return PTR_ERR(rdev); rdev 467 drivers/regulator/da903x.c platform_set_drvdata(pdev, rdev); rdev 71 drivers/regulator/da9052-regulator.c struct regulator_dev *rdev; rdev 83 drivers/regulator/da9052-regulator.c static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) rdev 85 drivers/regulator/da9052-regulator.c struct da9052_regulator *regulator = rdev_get_drvdata(rdev); rdev 86 drivers/regulator/da9052-regulator.c int offset = rdev_get_id(rdev); rdev 110 drivers/regulator/da9052-regulator.c static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, rdev 113 drivers/regulator/da9052-regulator.c struct da9052_regulator *regulator = rdev_get_drvdata(rdev); rdev 114 drivers/regulator/da9052-regulator.c int offset = rdev_get_id(rdev); rdev 150 drivers/regulator/da9052-regulator.c static int da9052_list_voltage(struct regulator_dev *rdev, rdev 153 drivers/regulator/da9052-regulator.c struct da9052_regulator *regulator = rdev_get_drvdata(rdev); rdev 155 drivers/regulator/da9052-regulator.c int id = rdev_get_id(rdev); rdev 174 drivers/regulator/da9052-regulator.c static int da9052_map_voltage(struct regulator_dev *rdev, rdev 177 drivers/regulator/da9052-regulator.c struct da9052_regulator *regulator = rdev_get_drvdata(rdev); rdev 179 drivers/regulator/da9052-regulator.c int id = rdev_get_id(rdev); rdev 198 drivers/regulator/da9052-regulator.c ret = da9052_list_voltage(rdev, sel); rdev 205 drivers/regulator/da9052-regulator.c static int da9052_regulator_set_voltage_sel(struct regulator_dev *rdev, rdev 208 drivers/regulator/da9052-regulator.c struct da9052_regulator *regulator = rdev_get_drvdata(rdev); rdev 210 drivers/regulator/da9052-regulator.c int id = rdev_get_id(rdev); rdev 213 drivers/regulator/da9052-regulator.c ret = da9052_reg_update(regulator->da9052, rdev->desc->vsel_reg, rdev 214 drivers/regulator/da9052-regulator.c rdev->desc->vsel_mask, selector); rdev 235 drivers/regulator/da9052-regulator.c static int da9052_regulator_set_voltage_time_sel(struct regulator_dev *rdev, rdev 239 drivers/regulator/da9052-regulator.c struct da9052_regulator *regulator = rdev_get_drvdata(rdev); rdev 241 drivers/regulator/da9052-regulator.c int id = rdev_get_id(rdev); rdev 422 drivers/regulator/da9052-regulator.c regulator->rdev = devm_regulator_register(&pdev->dev, rdev 425 drivers/regulator/da9052-regulator.c if (IS_ERR(regulator->rdev)) { rdev 428 drivers/regulator/da9052-regulator.c return PTR_ERR(regulator->rdev); rdev 78 drivers/regulator/da9055-regulator.c struct regulator_dev *rdev; rdev 82 drivers/regulator/da9055-regulator.c static unsigned int da9055_buck_get_mode(struct regulator_dev *rdev) rdev 84 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 107 drivers/regulator/da9055-regulator.c static int da9055_buck_set_mode(struct regulator_dev *rdev, rdev 110 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 130 drivers/regulator/da9055-regulator.c static unsigned int da9055_ldo_get_mode(struct regulator_dev *rdev) rdev 132 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 146 drivers/regulator/da9055-regulator.c static int da9055_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 148 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 168 drivers/regulator/da9055-regulator.c static int da9055_regulator_get_voltage_sel(struct regulator_dev *rdev) rdev 170 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 199 drivers/regulator/da9055-regulator.c static int da9055_regulator_set_voltage_sel(struct regulator_dev *rdev, rdev 202 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 242 drivers/regulator/da9055-regulator.c static int da9055_regulator_set_suspend_voltage(struct regulator_dev *rdev, rdev 245 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 257 drivers/regulator/da9055-regulator.c ret = regulator_map_voltage_linear(rdev, uV, uV); rdev 265 drivers/regulator/da9055-regulator.c static int da9055_suspend_enable(struct regulator_dev *rdev) rdev 267 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 278 drivers/regulator/da9055-regulator.c static int da9055_suspend_disable(struct regulator_dev *rdev) rdev 280 drivers/regulator/da9055-regulator.c struct da9055_regulator *regulator = rdev_get_drvdata(rdev); rdev 488 drivers/regulator/da9055-regulator.c regulator_lock(regulator->rdev); rdev 489 drivers/regulator/da9055-regulator.c regulator_notifier_call_chain(regulator->rdev, rdev 491 drivers/regulator/da9055-regulator.c regulator_unlock(regulator->rdev); rdev 541 drivers/regulator/da9055-regulator.c regulator->rdev = devm_regulator_register(&pdev->dev, rdev 544 drivers/regulator/da9055-regulator.c if (IS_ERR(regulator->rdev)) { rdev 547 drivers/regulator/da9055-regulator.c return PTR_ERR(regulator->rdev); rdev 60 drivers/regulator/da9062-regulator.c struct regulator_dev *rdev; rdev 108 drivers/regulator/da9062-regulator.c static int da9062_buck_set_mode(struct regulator_dev *rdev, unsigned mode) rdev 110 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 136 drivers/regulator/da9062-regulator.c static unsigned da9062_buck_get_mode(struct regulator_dev *rdev) rdev 138 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 177 drivers/regulator/da9062-regulator.c static int da9062_ldo_set_mode(struct regulator_dev *rdev, unsigned mode) rdev 179 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 196 drivers/regulator/da9062-regulator.c static unsigned da9062_ldo_get_mode(struct regulator_dev *rdev) rdev 198 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 211 drivers/regulator/da9062-regulator.c static int da9062_buck_get_status(struct regulator_dev *rdev) rdev 213 drivers/regulator/da9062-regulator.c int ret = regulator_is_enabled_regmap(rdev); rdev 218 drivers/regulator/da9062-regulator.c ret = da9062_buck_get_mode(rdev); rdev 228 drivers/regulator/da9062-regulator.c static int da9062_ldo_get_status(struct regulator_dev *rdev) rdev 230 drivers/regulator/da9062-regulator.c int ret = regulator_is_enabled_regmap(rdev); rdev 235 drivers/regulator/da9062-regulator.c ret = da9062_ldo_get_mode(rdev); rdev 245 drivers/regulator/da9062-regulator.c static int da9062_set_suspend_voltage(struct regulator_dev *rdev, int uv) rdev 247 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 251 drivers/regulator/da9062-regulator.c sel = regulator_map_voltage_linear(rdev, uv, uv); rdev 255 drivers/regulator/da9062-regulator.c sel <<= ffs(rdev->desc->vsel_mask) - 1; rdev 258 drivers/regulator/da9062-regulator.c rdev->desc->vsel_mask, sel); rdev 263 drivers/regulator/da9062-regulator.c static int da9062_suspend_enable(struct regulator_dev *rdev) rdev 265 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 270 drivers/regulator/da9062-regulator.c static int da9062_suspend_disable(struct regulator_dev *rdev) rdev 272 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 277 drivers/regulator/da9062-regulator.c static int da9062_buck_set_suspend_mode(struct regulator_dev *rdev, rdev 280 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 300 drivers/regulator/da9062-regulator.c static int da9062_ldo_set_suspend_mode(struct regulator_dev *rdev, rdev 303 drivers/regulator/da9062-regulator.c struct da9062_regulator *regl = rdev_get_drvdata(rdev); rdev 900 drivers/regulator/da9062-regulator.c regulator_lock(regl->rdev); rdev 901 drivers/regulator/da9062-regulator.c regulator_notifier_call_chain(regl->rdev, rdev 903 drivers/regulator/da9062-regulator.c regulator_unlock(regl->rdev); rdev 997 drivers/regulator/da9062-regulator.c regl->rdev = devm_regulator_register(&pdev->dev, ®l->desc, rdev 999 drivers/regulator/da9062-regulator.c if (IS_ERR(regl->rdev)) { rdev 1003 drivers/regulator/da9062-regulator.c return PTR_ERR(regl->rdev); rdev 141 drivers/regulator/da9063-regulator.c struct regulator_dev *rdev; rdev 196 drivers/regulator/da9063-regulator.c static int da9063_buck_set_mode(struct regulator_dev *rdev, unsigned mode) rdev 198 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 224 drivers/regulator/da9063-regulator.c static unsigned da9063_buck_get_mode(struct regulator_dev *rdev) rdev 226 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 277 drivers/regulator/da9063-regulator.c static int da9063_ldo_set_mode(struct regulator_dev *rdev, unsigned mode) rdev 279 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 296 drivers/regulator/da9063-regulator.c static unsigned da9063_ldo_get_mode(struct regulator_dev *rdev) rdev 298 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 323 drivers/regulator/da9063-regulator.c static int da9063_buck_get_status(struct regulator_dev *rdev) rdev 325 drivers/regulator/da9063-regulator.c int ret = regulator_is_enabled_regmap(rdev); rdev 330 drivers/regulator/da9063-regulator.c ret = da9063_buck_get_mode(rdev); rdev 340 drivers/regulator/da9063-regulator.c static int da9063_ldo_get_status(struct regulator_dev *rdev) rdev 342 drivers/regulator/da9063-regulator.c int ret = regulator_is_enabled_regmap(rdev); rdev 347 drivers/regulator/da9063-regulator.c ret = da9063_ldo_get_mode(rdev); rdev 357 drivers/regulator/da9063-regulator.c static int da9063_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 359 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 363 drivers/regulator/da9063-regulator.c sel = regulator_map_voltage_linear(rdev, uV, uV); rdev 367 drivers/regulator/da9063-regulator.c sel <<= ffs(rdev->desc->vsel_mask) - 1; rdev 370 drivers/regulator/da9063-regulator.c rdev->desc->vsel_mask, sel); rdev 375 drivers/regulator/da9063-regulator.c static int da9063_suspend_enable(struct regulator_dev *rdev) rdev 377 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 382 drivers/regulator/da9063-regulator.c static int da9063_suspend_disable(struct regulator_dev *rdev) rdev 384 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 389 drivers/regulator/da9063-regulator.c static int da9063_buck_set_suspend_mode(struct regulator_dev *rdev, unsigned mode) rdev 391 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 411 drivers/regulator/da9063-regulator.c static int da9063_ldo_set_suspend_mode(struct regulator_dev *rdev, unsigned mode) rdev 413 drivers/regulator/da9063-regulator.c struct da9063_regulator *regl = rdev_get_drvdata(rdev); rdev 611 drivers/regulator/da9063-regulator.c regulator_lock(regl->rdev); rdev 612 drivers/regulator/da9063-regulator.c regulator_notifier_call_chain(regl->rdev, rdev 614 drivers/regulator/da9063-regulator.c regulator_unlock(regl->rdev); rdev 852 drivers/regulator/da9063-regulator.c regl->rdev = devm_regulator_register(&pdev->dev, ®l->desc, rdev 854 drivers/regulator/da9063-regulator.c if (IS_ERR(regl->rdev)) { rdev 858 drivers/regulator/da9063-regulator.c return PTR_ERR(regl->rdev); rdev 20 drivers/regulator/da9210-regulator.c struct regulator_dev *rdev; rdev 80 drivers/regulator/da9210-regulator.c regulator_lock(chip->rdev); rdev 83 drivers/regulator/da9210-regulator.c regulator_notifier_call_chain(chip->rdev, rdev 89 drivers/regulator/da9210-regulator.c regulator_notifier_call_chain(chip->rdev, rdev 95 drivers/regulator/da9210-regulator.c regulator_notifier_call_chain(chip->rdev, rdev 100 drivers/regulator/da9210-regulator.c regulator_notifier_call_chain(chip->rdev, rdev 106 drivers/regulator/da9210-regulator.c regulator_unlock(chip->rdev); rdev 140 drivers/regulator/da9210-regulator.c struct regulator_dev *rdev = NULL; rdev 182 drivers/regulator/da9210-regulator.c rdev = devm_regulator_register(&i2c->dev, &da9210_reg, &config); rdev 183 drivers/regulator/da9210-regulator.c if (IS_ERR(rdev)) { rdev 185 drivers/regulator/da9210-regulator.c return PTR_ERR(rdev); rdev 188 drivers/regulator/da9210-regulator.c chip->rdev = rdev; rdev 39 drivers/regulator/da9211-regulator.c struct regulator_dev *rdev[DA9211_MAX_REGULATORS]; rdev 92 drivers/regulator/da9211-regulator.c static unsigned int da9211_buck_get_mode(struct regulator_dev *rdev) rdev 94 drivers/regulator/da9211-regulator.c int id = rdev_get_id(rdev); rdev 95 drivers/regulator/da9211-regulator.c struct da9211 *chip = rdev_get_drvdata(rdev); rdev 118 drivers/regulator/da9211-regulator.c static int da9211_buck_set_mode(struct regulator_dev *rdev, rdev 121 drivers/regulator/da9211-regulator.c int id = rdev_get_id(rdev); rdev 122 drivers/regulator/da9211-regulator.c struct da9211 *chip = rdev_get_drvdata(rdev); rdev 141 drivers/regulator/da9211-regulator.c static int da9211_set_current_limit(struct regulator_dev *rdev, int min, rdev 144 drivers/regulator/da9211-regulator.c int id = rdev_get_id(rdev); rdev 145 drivers/regulator/da9211-regulator.c struct da9211 *chip = rdev_get_drvdata(rdev); rdev 179 drivers/regulator/da9211-regulator.c static int da9211_get_current_limit(struct regulator_dev *rdev) rdev 181 drivers/regulator/da9211-regulator.c int id = rdev_get_id(rdev); rdev 182 drivers/regulator/da9211-regulator.c struct da9211 *chip = rdev_get_drvdata(rdev); rdev 317 drivers/regulator/da9211-regulator.c regulator_lock(chip->rdev[0]); rdev 318 drivers/regulator/da9211-regulator.c regulator_notifier_call_chain(chip->rdev[0], rdev 320 drivers/regulator/da9211-regulator.c regulator_unlock(chip->rdev[0]); rdev 331 drivers/regulator/da9211-regulator.c regulator_lock(chip->rdev[1]); rdev 332 drivers/regulator/da9211-regulator.c regulator_notifier_call_chain(chip->rdev[1], rdev 334 drivers/regulator/da9211-regulator.c regulator_unlock(chip->rdev[1]); rdev 394 drivers/regulator/da9211-regulator.c chip->rdev[i] = devm_regulator_register(chip->dev, rdev 396 drivers/regulator/da9211-regulator.c if (IS_ERR(chip->rdev[i])) { rdev 399 drivers/regulator/da9211-regulator.c return PTR_ERR(chip->rdev[i]); rdev 25 drivers/regulator/db8500-prcmu.c static int db8500_regulator_enable(struct regulator_dev *rdev) rdev 27 drivers/regulator/db8500-prcmu.c struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); rdev 32 drivers/regulator/db8500-prcmu.c dev_vdbg(rdev_get_dev(rdev), "regulator-%s-enable\n", rdev 44 drivers/regulator/db8500-prcmu.c static int db8500_regulator_disable(struct regulator_dev *rdev) rdev 46 drivers/regulator/db8500-prcmu.c struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); rdev 52 drivers/regulator/db8500-prcmu.c dev_vdbg(rdev_get_dev(rdev), "regulator-%s-disable\n", rdev 64 drivers/regulator/db8500-prcmu.c static int db8500_regulator_is_enabled(struct regulator_dev *rdev) rdev 66 drivers/regulator/db8500-prcmu.c struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); rdev 71 drivers/regulator/db8500-prcmu.c dev_vdbg(rdev_get_dev(rdev), "regulator-%s-is_enabled (is_enabled):" rdev 141 drivers/regulator/db8500-prcmu.c static int db8500_regulator_switch_enable(struct regulator_dev *rdev) rdev 143 drivers/regulator/db8500-prcmu.c struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); rdev 149 drivers/regulator/db8500-prcmu.c dev_vdbg(rdev_get_dev(rdev), "regulator-switch-%s-enable\n", rdev 154 drivers/regulator/db8500-prcmu.c dev_err(rdev_get_dev(rdev), rdev 165 drivers/regulator/db8500-prcmu.c static int db8500_regulator_switch_disable(struct regulator_dev *rdev) rdev 167 drivers/regulator/db8500-prcmu.c struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); rdev 173 drivers/regulator/db8500-prcmu.c dev_vdbg(rdev_get_dev(rdev), "regulator-switch-%s-disable\n", rdev 178 drivers/regulator/db8500-prcmu.c dev_err(rdev_get_dev(rdev), rdev 189 drivers/regulator/db8500-prcmu.c static int db8500_regulator_switch_is_enabled(struct regulator_dev *rdev) rdev 191 drivers/regulator/db8500-prcmu.c struct dbx500_regulator_info *info = rdev_get_drvdata(rdev); rdev 196 drivers/regulator/db8500-prcmu.c dev_vdbg(rdev_get_dev(rdev), rdev 442 drivers/regulator/db8500-prcmu.c struct regulator_dev *rdev; rdev 456 drivers/regulator/db8500-prcmu.c rdev = devm_regulator_register(&pdev->dev, &info->desc, rdev 458 drivers/regulator/db8500-prcmu.c if (IS_ERR(rdev)) { rdev 459 drivers/regulator/db8500-prcmu.c err = PTR_ERR(rdev); rdev 188 drivers/regulator/devres.c struct regulator_dev **ptr, *rdev; rdev 195 drivers/regulator/devres.c rdev = regulator_register(regulator_desc, config); rdev 196 drivers/regulator/devres.c if (!IS_ERR(rdev)) { rdev 197 drivers/regulator/devres.c *ptr = rdev; rdev 203 drivers/regulator/devres.c return rdev; rdev 225 drivers/regulator/devres.c void devm_regulator_unregister(struct device *dev, struct regulator_dev *rdev) rdev 229 drivers/regulator/devres.c rc = devres_release(dev, devm_rdev_release, devm_rdev_match, rdev); rdev 110 drivers/regulator/fan53555.c static int fan53555_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 112 drivers/regulator/fan53555.c struct fan53555_device_info *di = rdev_get_drvdata(rdev); rdev 117 drivers/regulator/fan53555.c ret = regulator_map_voltage_linear(rdev, uV, uV); rdev 120 drivers/regulator/fan53555.c ret = regmap_update_bits(rdev->regmap, di->sleep_reg, rdev 131 drivers/regulator/fan53555.c static int fan53555_set_suspend_enable(struct regulator_dev *rdev) rdev 133 drivers/regulator/fan53555.c struct fan53555_device_info *di = rdev_get_drvdata(rdev); rdev 135 drivers/regulator/fan53555.c return regmap_update_bits(rdev->regmap, di->sleep_reg, rdev 139 drivers/regulator/fan53555.c static int fan53555_set_suspend_disable(struct regulator_dev *rdev) rdev 141 drivers/regulator/fan53555.c struct fan53555_device_info *di = rdev_get_drvdata(rdev); rdev 143 drivers/regulator/fan53555.c return regmap_update_bits(rdev->regmap, di->sleep_reg, rdev 147 drivers/regulator/fan53555.c static int fan53555_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 149 drivers/regulator/fan53555.c struct fan53555_device_info *di = rdev_get_drvdata(rdev); rdev 153 drivers/regulator/fan53555.c regmap_update_bits(rdev->regmap, di->mode_reg, rdev 157 drivers/regulator/fan53555.c regmap_update_bits(rdev->regmap, di->vol_reg, di->mode_mask, 0); rdev 165 drivers/regulator/fan53555.c static unsigned int fan53555_get_mode(struct regulator_dev *rdev) rdev 167 drivers/regulator/fan53555.c struct fan53555_device_info *di = rdev_get_drvdata(rdev); rdev 171 drivers/regulator/fan53555.c ret = regmap_read(rdev->regmap, di->mode_reg, &val); rdev 191 drivers/regulator/fan53555.c static int fan53555_set_ramp(struct regulator_dev *rdev, int ramp) rdev 193 drivers/regulator/fan53555.c struct fan53555_device_info *di = rdev_get_drvdata(rdev); rdev 208 drivers/regulator/fan53555.c return regmap_update_bits(rdev->regmap, FAN53555_CONTROL, rdev 391 drivers/regulator/fan53555.c struct regulator_dev *rdev; rdev 406 drivers/regulator/fan53555.c rdev = devm_regulator_register(di->dev, &di->desc, config); rdev 407 drivers/regulator/fan53555.c return PTR_ERR_OR_ZERO(rdev); rdev 52 drivers/regulator/fixed.c static int reg_clock_enable(struct regulator_dev *rdev) rdev 54 drivers/regulator/fixed.c struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); rdev 66 drivers/regulator/fixed.c static int reg_clock_disable(struct regulator_dev *rdev) rdev 68 drivers/regulator/fixed.c struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); rdev 76 drivers/regulator/fixed.c static int reg_clock_is_enabled(struct regulator_dev *rdev) rdev 78 drivers/regulator/fixed.c struct fixed_voltage_data *priv = rdev_get_drvdata(rdev); rdev 231 drivers/regulator/gpio-regulator.c struct regulator_dev *rdev; rdev 325 drivers/regulator/gpio-regulator.c rdev = devm_regulator_register(dev, &drvdata->desc, &cfg); rdev 326 drivers/regulator/gpio-regulator.c if (IS_ERR(rdev)) { rdev 327 drivers/regulator/gpio-regulator.c ret = PTR_ERR(rdev); rdev 27 drivers/regulator/helpers.c int regulator_is_enabled_regmap(struct regulator_dev *rdev) rdev 32 drivers/regulator/helpers.c ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); rdev 36 drivers/regulator/helpers.c val &= rdev->desc->enable_mask; rdev 38 drivers/regulator/helpers.c if (rdev->desc->enable_is_inverted) { rdev 39 drivers/regulator/helpers.c if (rdev->desc->enable_val) rdev 40 drivers/regulator/helpers.c return val != rdev->desc->enable_val; rdev 43 drivers/regulator/helpers.c if (rdev->desc->enable_val) rdev 44 drivers/regulator/helpers.c return val == rdev->desc->enable_val; rdev 59 drivers/regulator/helpers.c int regulator_enable_regmap(struct regulator_dev *rdev) rdev 63 drivers/regulator/helpers.c if (rdev->desc->enable_is_inverted) { rdev 64 drivers/regulator/helpers.c val = rdev->desc->disable_val; rdev 66 drivers/regulator/helpers.c val = rdev->desc->enable_val; rdev 68 drivers/regulator/helpers.c val = rdev->desc->enable_mask; rdev 71 drivers/regulator/helpers.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 72 drivers/regulator/helpers.c rdev->desc->enable_mask, val); rdev 85 drivers/regulator/helpers.c int regulator_disable_regmap(struct regulator_dev *rdev) rdev 89 drivers/regulator/helpers.c if (rdev->desc->enable_is_inverted) { rdev 90 drivers/regulator/helpers.c val = rdev->desc->enable_val; rdev 92 drivers/regulator/helpers.c val = rdev->desc->enable_mask; rdev 94 drivers/regulator/helpers.c val = rdev->desc->disable_val; rdev 97 drivers/regulator/helpers.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 98 drivers/regulator/helpers.c rdev->desc->enable_mask, val); rdev 102 drivers/regulator/helpers.c static int regulator_range_selector_to_index(struct regulator_dev *rdev, rdev 107 drivers/regulator/helpers.c if (!rdev->desc->linear_range_selectors) rdev 110 drivers/regulator/helpers.c rval &= rdev->desc->vsel_range_mask; rdev 112 drivers/regulator/helpers.c for (i = 0; i < rdev->desc->n_linear_ranges; i++) { rdev 113 drivers/regulator/helpers.c if (rdev->desc->linear_range_selectors[i] == rval) rdev 129 drivers/regulator/helpers.c int regulator_get_voltage_sel_pickable_regmap(struct regulator_dev *rdev) rdev 137 drivers/regulator/helpers.c if (!rdev->desc->linear_ranges) rdev 140 drivers/regulator/helpers.c ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); rdev 144 drivers/regulator/helpers.c ret = regmap_read(rdev->regmap, rdev->desc->vsel_range_reg, &r_val); rdev 148 drivers/regulator/helpers.c val &= rdev->desc->vsel_mask; rdev 149 drivers/regulator/helpers.c val >>= ffs(rdev->desc->vsel_mask) - 1; rdev 151 drivers/regulator/helpers.c range = regulator_range_selector_to_index(rdev, r_val); rdev 156 drivers/regulator/helpers.c voltages_in_range += (rdev->desc->linear_ranges[i].max_sel - rdev 157 drivers/regulator/helpers.c rdev->desc->linear_ranges[i].min_sel) + 1; rdev 174 drivers/regulator/helpers.c int regulator_set_voltage_sel_pickable_regmap(struct regulator_dev *rdev, rdev 181 drivers/regulator/helpers.c for (i = 0; i < rdev->desc->n_linear_ranges; i++) { rdev 182 drivers/regulator/helpers.c voltages_in_range = (rdev->desc->linear_ranges[i].max_sel - rdev 183 drivers/regulator/helpers.c rdev->desc->linear_ranges[i].min_sel) + 1; rdev 189 drivers/regulator/helpers.c if (i == rdev->desc->n_linear_ranges) rdev 192 drivers/regulator/helpers.c sel <<= ffs(rdev->desc->vsel_mask) - 1; rdev 193 drivers/regulator/helpers.c sel += rdev->desc->linear_ranges[i].min_sel; rdev 195 drivers/regulator/helpers.c range = rdev->desc->linear_range_selectors[i]; rdev 197 drivers/regulator/helpers.c if (rdev->desc->vsel_reg == rdev->desc->vsel_range_reg) { rdev 198 drivers/regulator/helpers.c ret = regmap_update_bits(rdev->regmap, rdev 199 drivers/regulator/helpers.c rdev->desc->vsel_reg, rdev 200 drivers/regulator/helpers.c rdev->desc->vsel_range_mask | rdev 201 drivers/regulator/helpers.c rdev->desc->vsel_mask, sel | range); rdev 203 drivers/regulator/helpers.c ret = regmap_update_bits(rdev->regmap, rdev 204 drivers/regulator/helpers.c rdev->desc->vsel_range_reg, rdev 205 drivers/regulator/helpers.c rdev->desc->vsel_range_mask, range); rdev 209 drivers/regulator/helpers.c ret = regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, rdev 210 drivers/regulator/helpers.c rdev->desc->vsel_mask, sel); rdev 216 drivers/regulator/helpers.c if (rdev->desc->apply_bit) rdev 217 drivers/regulator/helpers.c ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, rdev 218 drivers/regulator/helpers.c rdev->desc->apply_bit, rdev 219 drivers/regulator/helpers.c rdev->desc->apply_bit); rdev 233 drivers/regulator/helpers.c int regulator_get_voltage_sel_regmap(struct regulator_dev *rdev) rdev 238 drivers/regulator/helpers.c ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); rdev 242 drivers/regulator/helpers.c val &= rdev->desc->vsel_mask; rdev 243 drivers/regulator/helpers.c val >>= ffs(rdev->desc->vsel_mask) - 1; rdev 259 drivers/regulator/helpers.c int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel) rdev 263 drivers/regulator/helpers.c sel <<= ffs(rdev->desc->vsel_mask) - 1; rdev 265 drivers/regulator/helpers.c ret = regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, rdev 266 drivers/regulator/helpers.c rdev->desc->vsel_mask, sel); rdev 270 drivers/regulator/helpers.c if (rdev->desc->apply_bit) rdev 271 drivers/regulator/helpers.c ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, rdev 272 drivers/regulator/helpers.c rdev->desc->apply_bit, rdev 273 drivers/regulator/helpers.c rdev->desc->apply_bit); rdev 290 drivers/regulator/helpers.c int regulator_map_voltage_iterate(struct regulator_dev *rdev, rdev 300 drivers/regulator/helpers.c for (i = 0; i < rdev->desc->n_voltages; i++) { rdev 301 drivers/regulator/helpers.c ret = rdev->desc->ops->list_voltage(rdev, i); rdev 328 drivers/regulator/helpers.c int regulator_map_voltage_ascend(struct regulator_dev *rdev, rdev 333 drivers/regulator/helpers.c for (i = 0; i < rdev->desc->n_voltages; i++) { rdev 334 drivers/regulator/helpers.c ret = rdev->desc->ops->list_voltage(rdev, i); rdev 359 drivers/regulator/helpers.c int regulator_map_voltage_linear(struct regulator_dev *rdev, rdev 365 drivers/regulator/helpers.c if (rdev->desc->n_voltages == 1 && rdev->desc->uV_step == 0) { rdev 366 drivers/regulator/helpers.c if (min_uV <= rdev->desc->min_uV && rdev->desc->min_uV <= max_uV) rdev 372 drivers/regulator/helpers.c if (!rdev->desc->uV_step) { rdev 373 drivers/regulator/helpers.c BUG_ON(!rdev->desc->uV_step); rdev 377 drivers/regulator/helpers.c if (min_uV < rdev->desc->min_uV) rdev 378 drivers/regulator/helpers.c min_uV = rdev->desc->min_uV; rdev 380 drivers/regulator/helpers.c ret = DIV_ROUND_UP(min_uV - rdev->desc->min_uV, rdev->desc->uV_step); rdev 384 drivers/regulator/helpers.c ret += rdev->desc->linear_min_sel; rdev 387 drivers/regulator/helpers.c voltage = rdev->desc->ops->list_voltage(rdev, ret); rdev 405 drivers/regulator/helpers.c int regulator_map_voltage_linear_range(struct regulator_dev *rdev, rdev 412 drivers/regulator/helpers.c if (!rdev->desc->n_linear_ranges) { rdev 413 drivers/regulator/helpers.c BUG_ON(!rdev->desc->n_linear_ranges); rdev 417 drivers/regulator/helpers.c for (i = 0; i < rdev->desc->n_linear_ranges; i++) { rdev 420 drivers/regulator/helpers.c range = &rdev->desc->linear_ranges[i]; rdev 446 drivers/regulator/helpers.c voltage = rdev->desc->ops->list_voltage(rdev, ret); rdev 451 drivers/regulator/helpers.c if (i == rdev->desc->n_linear_ranges) rdev 468 drivers/regulator/helpers.c int regulator_map_voltage_pickable_linear_range(struct regulator_dev *rdev, rdev 476 drivers/regulator/helpers.c if (!rdev->desc->n_linear_ranges) { rdev 477 drivers/regulator/helpers.c BUG_ON(!rdev->desc->n_linear_ranges); rdev 481 drivers/regulator/helpers.c for (i = 0; i < rdev->desc->n_linear_ranges; i++) { rdev 484 drivers/regulator/helpers.c range = &rdev->desc->linear_ranges[i]; rdev 508 drivers/regulator/helpers.c voltage = rdev->desc->ops->list_voltage(rdev, ret); rdev 521 drivers/regulator/helpers.c if (i == rdev->desc->n_linear_ranges) rdev 538 drivers/regulator/helpers.c int regulator_list_voltage_linear(struct regulator_dev *rdev, rdev 541 drivers/regulator/helpers.c if (selector >= rdev->desc->n_voltages) rdev 543 drivers/regulator/helpers.c if (selector < rdev->desc->linear_min_sel) rdev 546 drivers/regulator/helpers.c selector -= rdev->desc->linear_min_sel; rdev 548 drivers/regulator/helpers.c return rdev->desc->min_uV + (rdev->desc->uV_step * selector); rdev 561 drivers/regulator/helpers.c int regulator_list_voltage_pickable_linear_range(struct regulator_dev *rdev, rdev 568 drivers/regulator/helpers.c if (!rdev->desc->n_linear_ranges) { rdev 569 drivers/regulator/helpers.c BUG_ON(!rdev->desc->n_linear_ranges); rdev 573 drivers/regulator/helpers.c for (i = 0; i < rdev->desc->n_linear_ranges; i++) { rdev 576 drivers/regulator/helpers.c range = &rdev->desc->linear_ranges[i]; rdev 641 drivers/regulator/helpers.c int regulator_list_voltage_linear_range(struct regulator_dev *rdev, rdev 644 drivers/regulator/helpers.c return regulator_desc_list_voltage_linear_range(rdev->desc, selector); rdev 658 drivers/regulator/helpers.c int regulator_list_voltage_table(struct regulator_dev *rdev, rdev 661 drivers/regulator/helpers.c if (!rdev->desc->volt_table) { rdev 662 drivers/regulator/helpers.c BUG_ON(!rdev->desc->volt_table); rdev 666 drivers/regulator/helpers.c if (selector >= rdev->desc->n_voltages) rdev 669 drivers/regulator/helpers.c return rdev->desc->volt_table[selector]; rdev 679 drivers/regulator/helpers.c int regulator_set_bypass_regmap(struct regulator_dev *rdev, bool enable) rdev 684 drivers/regulator/helpers.c val = rdev->desc->bypass_val_on; rdev 686 drivers/regulator/helpers.c val = rdev->desc->bypass_mask; rdev 688 drivers/regulator/helpers.c val = rdev->desc->bypass_val_off; rdev 691 drivers/regulator/helpers.c return regmap_update_bits(rdev->regmap, rdev->desc->bypass_reg, rdev 692 drivers/regulator/helpers.c rdev->desc->bypass_mask, val); rdev 701 drivers/regulator/helpers.c int regulator_set_soft_start_regmap(struct regulator_dev *rdev) rdev 705 drivers/regulator/helpers.c val = rdev->desc->soft_start_val_on; rdev 707 drivers/regulator/helpers.c val = rdev->desc->soft_start_mask; rdev 709 drivers/regulator/helpers.c return regmap_update_bits(rdev->regmap, rdev->desc->soft_start_reg, rdev 710 drivers/regulator/helpers.c rdev->desc->soft_start_mask, val); rdev 719 drivers/regulator/helpers.c int regulator_set_pull_down_regmap(struct regulator_dev *rdev) rdev 723 drivers/regulator/helpers.c val = rdev->desc->pull_down_val_on; rdev 725 drivers/regulator/helpers.c val = rdev->desc->pull_down_mask; rdev 727 drivers/regulator/helpers.c return regmap_update_bits(rdev->regmap, rdev->desc->pull_down_reg, rdev 728 drivers/regulator/helpers.c rdev->desc->pull_down_mask, val); rdev 738 drivers/regulator/helpers.c int regulator_get_bypass_regmap(struct regulator_dev *rdev, bool *enable) rdev 741 drivers/regulator/helpers.c unsigned int val_on = rdev->desc->bypass_val_on; rdev 744 drivers/regulator/helpers.c ret = regmap_read(rdev->regmap, rdev->desc->bypass_reg, &val); rdev 749 drivers/regulator/helpers.c val_on = rdev->desc->bypass_mask; rdev 751 drivers/regulator/helpers.c *enable = (val & rdev->desc->bypass_mask) == val_on; rdev 764 drivers/regulator/helpers.c int regulator_set_active_discharge_regmap(struct regulator_dev *rdev, rdev 770 drivers/regulator/helpers.c val = rdev->desc->active_discharge_on; rdev 772 drivers/regulator/helpers.c val = rdev->desc->active_discharge_off; rdev 774 drivers/regulator/helpers.c return regmap_update_bits(rdev->regmap, rdev 775 drivers/regulator/helpers.c rdev->desc->active_discharge_reg, rdev 776 drivers/regulator/helpers.c rdev->desc->active_discharge_mask, val); rdev 791 drivers/regulator/helpers.c int regulator_set_current_limit_regmap(struct regulator_dev *rdev, rdev 794 drivers/regulator/helpers.c unsigned int n_currents = rdev->desc->n_current_limits; rdev 800 drivers/regulator/helpers.c if (rdev->desc->curr_table) { rdev 801 drivers/regulator/helpers.c const unsigned int *curr_table = rdev->desc->curr_table; rdev 827 drivers/regulator/helpers.c sel <<= ffs(rdev->desc->csel_mask) - 1; rdev 829 drivers/regulator/helpers.c return regmap_update_bits(rdev->regmap, rdev->desc->csel_reg, rdev 830 drivers/regulator/helpers.c rdev->desc->csel_mask, sel); rdev 843 drivers/regulator/helpers.c int regulator_get_current_limit_regmap(struct regulator_dev *rdev) rdev 848 drivers/regulator/helpers.c ret = regmap_read(rdev->regmap, rdev->desc->csel_reg, &val); rdev 852 drivers/regulator/helpers.c val &= rdev->desc->csel_mask; rdev 853 drivers/regulator/helpers.c val >>= ffs(rdev->desc->csel_mask) - 1; rdev 855 drivers/regulator/helpers.c if (rdev->desc->curr_table) { rdev 856 drivers/regulator/helpers.c if (val >= rdev->desc->n_current_limits) rdev 859 drivers/regulator/helpers.c return rdev->desc->curr_table[val]; rdev 895 drivers/regulator/helpers.c return reg1->rdev == reg2->rdev; rdev 367 drivers/regulator/hi6421-regulator.c static int hi6421_regulator_enable(struct regulator_dev *rdev) rdev 371 drivers/regulator/hi6421-regulator.c pdata = dev_get_drvdata(rdev->dev.parent); rdev 380 drivers/regulator/hi6421-regulator.c regulator_enable_regmap(rdev); rdev 386 drivers/regulator/hi6421-regulator.c static unsigned int hi6421_regulator_ldo_get_mode(struct regulator_dev *rdev) rdev 388 drivers/regulator/hi6421-regulator.c struct hi6421_regulator_info *info = rdev_get_drvdata(rdev); rdev 391 drivers/regulator/hi6421-regulator.c regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); rdev 398 drivers/regulator/hi6421-regulator.c static unsigned int hi6421_regulator_buck_get_mode(struct regulator_dev *rdev) rdev 400 drivers/regulator/hi6421-regulator.c struct hi6421_regulator_info *info = rdev_get_drvdata(rdev); rdev 403 drivers/regulator/hi6421-regulator.c regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); rdev 410 drivers/regulator/hi6421-regulator.c static int hi6421_regulator_ldo_set_mode(struct regulator_dev *rdev, rdev 413 drivers/regulator/hi6421-regulator.c struct hi6421_regulator_info *info = rdev_get_drvdata(rdev); rdev 428 drivers/regulator/hi6421-regulator.c regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 434 drivers/regulator/hi6421-regulator.c static int hi6421_regulator_buck_set_mode(struct regulator_dev *rdev, rdev 437 drivers/regulator/hi6421-regulator.c struct hi6421_regulator_info *info = rdev_get_drvdata(rdev); rdev 452 drivers/regulator/hi6421-regulator.c regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 459 drivers/regulator/hi6421-regulator.c hi6421_regulator_ldo_get_optimum_mode(struct regulator_dev *rdev, rdev 462 drivers/regulator/hi6421-regulator.c struct hi6421_regulator_info *info = rdev_get_drvdata(rdev); rdev 539 drivers/regulator/hi6421-regulator.c struct regulator_dev *rdev; rdev 556 drivers/regulator/hi6421-regulator.c rdev = devm_regulator_register(&pdev->dev, &info->desc, rdev 558 drivers/regulator/hi6421-regulator.c if (IS_ERR(rdev)) { rdev 561 drivers/regulator/hi6421-regulator.c return PTR_ERR(rdev); rdev 112 drivers/regulator/hi6421v530-regulator.c struct regulator_dev *rdev) rdev 117 drivers/regulator/hi6421v530-regulator.c info = rdev_get_drvdata(rdev); rdev 118 drivers/regulator/hi6421v530-regulator.c regmap_read(rdev->regmap, rdev->desc->enable_reg, ®_val); rdev 126 drivers/regulator/hi6421v530-regulator.c static int hi6421v530_regulator_ldo_set_mode(struct regulator_dev *rdev, rdev 132 drivers/regulator/hi6421v530-regulator.c info = rdev_get_drvdata(rdev); rdev 144 drivers/regulator/hi6421v530-regulator.c regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 166 drivers/regulator/hi6421v530-regulator.c struct regulator_dev *rdev; rdev 181 drivers/regulator/hi6421v530-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 184 drivers/regulator/hi6421v530-regulator.c if (IS_ERR(rdev)) { rdev 187 drivers/regulator/hi6421v530-regulator.c return PTR_ERR(rdev); rdev 72 drivers/regulator/hi655x-regulator.c static int hi655x_is_enabled(struct regulator_dev *rdev) rdev 75 drivers/regulator/hi655x-regulator.c struct hi655x_regulator *regulator = rdev_get_drvdata(rdev); rdev 77 drivers/regulator/hi655x-regulator.c regmap_read(rdev->regmap, regulator->status_reg, &value); rdev 78 drivers/regulator/hi655x-regulator.c return (value & rdev->desc->enable_mask); rdev 81 drivers/regulator/hi655x-regulator.c static int hi655x_disable(struct regulator_dev *rdev) rdev 83 drivers/regulator/hi655x-regulator.c struct hi655x_regulator *regulator = rdev_get_drvdata(rdev); rdev 85 drivers/regulator/hi655x-regulator.c return regmap_write(rdev->regmap, regulator->disable_reg, rdev 86 drivers/regulator/hi655x-regulator.c rdev->desc->enable_mask); rdev 175 drivers/regulator/hi655x-regulator.c struct regulator_dev *rdev; rdev 193 drivers/regulator/hi655x-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 196 drivers/regulator/hi655x-regulator.c if (IS_ERR(rdev)) { rdev 199 drivers/regulator/hi655x-regulator.c return PTR_ERR(rdev); rdev 45 drivers/regulator/internal.h struct regulator_dev *rdev; rdev 63 drivers/regulator/internal.h struct regulator_dev *of_parse_coupled_regulator(struct regulator_dev *rdev, rdev 66 drivers/regulator/internal.h int of_get_n_coupled(struct regulator_dev *rdev); rdev 68 drivers/regulator/internal.h bool of_check_coupling_data(struct regulator_dev *rdev); rdev 87 drivers/regulator/internal.h of_parse_coupled_regulator(struct regulator_dev *rdev, rdev 93 drivers/regulator/internal.h static inline int of_get_n_coupled(struct regulator_dev *rdev) rdev 98 drivers/regulator/internal.h static inline bool of_check_coupling_data(struct regulator_dev *rdev) rdev 111 drivers/regulator/isl6271a-regulator.c struct regulator_dev *rdev; rdev 136 drivers/regulator/isl6271a-regulator.c rdev = devm_regulator_register(&i2c->dev, &isl_rd[i], &config); rdev 137 drivers/regulator/isl6271a-regulator.c if (IS_ERR(rdev)) { rdev 139 drivers/regulator/isl6271a-regulator.c return PTR_ERR(rdev); rdev 145 drivers/regulator/isl9305.c struct regulator_dev *rdev; rdev 164 drivers/regulator/isl9305.c rdev = devm_regulator_register(&i2c->dev, rdev 167 drivers/regulator/isl9305.c if (IS_ERR(rdev)) { rdev 168 drivers/regulator/isl9305.c ret = PTR_ERR(rdev); rdev 50 drivers/regulator/lm363x-regulator.c static int lm363x_regulator_enable_time(struct regulator_dev *rdev) rdev 52 drivers/regulator/lm363x-regulator.c enum lm363x_regulator_id id = rdev_get_id(rdev); rdev 76 drivers/regulator/lm363x-regulator.c if (regmap_read(rdev->regmap, addr, &val)) rdev 317 drivers/regulator/lm363x-regulator.c struct regulator_dev *rdev; rdev 344 drivers/regulator/lm363x-regulator.c rdev = devm_regulator_register(dev, &lm363x_regulator_desc[id], &cfg); rdev 345 drivers/regulator/lm363x-regulator.c if (IS_ERR(rdev)) { rdev 346 drivers/regulator/lm363x-regulator.c ret = PTR_ERR(rdev); rdev 44 drivers/regulator/lochnagar-regulator.c static int lochnagar_micbias_enable(struct regulator_dev *rdev) rdev 46 drivers/regulator/lochnagar-regulator.c struct lochnagar *lochnagar = rdev_get_drvdata(rdev); rdev 51 drivers/regulator/lochnagar-regulator.c ret = regulator_enable_regmap(rdev); rdev 63 drivers/regulator/lochnagar-regulator.c static int lochnagar_micbias_disable(struct regulator_dev *rdev) rdev 65 drivers/regulator/lochnagar-regulator.c struct lochnagar *lochnagar = rdev_get_drvdata(rdev); rdev 70 drivers/regulator/lochnagar-regulator.c ret = regulator_disable_regmap(rdev); rdev 247 drivers/regulator/lochnagar-regulator.c struct regulator_dev *rdev; rdev 260 drivers/regulator/lochnagar-regulator.c rdev = devm_regulator_register(dev, desc, &config); rdev 261 drivers/regulator/lochnagar-regulator.c if (IS_ERR(rdev)) { rdev 262 drivers/regulator/lochnagar-regulator.c ret = PTR_ERR(rdev); rdev 384 drivers/regulator/lp3971.c struct regulator_dev *rdev; rdev 390 drivers/regulator/lp3971.c rdev = devm_regulator_register(lp3971->dev, rdev 392 drivers/regulator/lp3971.c if (IS_ERR(rdev)) { rdev 393 drivers/regulator/lp3971.c err = PTR_ERR(rdev); rdev 479 drivers/regulator/lp3972.c struct regulator_dev *rdev; rdev 485 drivers/regulator/lp3972.c rdev = devm_regulator_register(lp3972->dev, rdev 487 drivers/regulator/lp3972.c if (IS_ERR(rdev)) { rdev 488 drivers/regulator/lp3972.c err = PTR_ERR(rdev); rdev 218 drivers/regulator/lp872x.c static int lp872x_regulator_enable_time(struct regulator_dev *rdev) rdev 220 drivers/regulator/lp872x.c struct lp872x *lp = rdev_get_drvdata(rdev); rdev 221 drivers/regulator/lp872x.c enum lp872x_regulator_id rid = rdev_get_id(rdev); rdev 316 drivers/regulator/lp872x.c static int lp872x_buck_set_voltage_sel(struct regulator_dev *rdev, rdev 319 drivers/regulator/lp872x.c struct lp872x *lp = rdev_get_drvdata(rdev); rdev 320 drivers/regulator/lp872x.c enum lp872x_regulator_id buck = rdev_get_id(rdev); rdev 334 drivers/regulator/lp872x.c static int lp872x_buck_get_voltage_sel(struct regulator_dev *rdev) rdev 336 drivers/regulator/lp872x.c struct lp872x *lp = rdev_get_drvdata(rdev); rdev 337 drivers/regulator/lp872x.c enum lp872x_regulator_id buck = rdev_get_id(rdev); rdev 352 drivers/regulator/lp872x.c static int lp872x_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 354 drivers/regulator/lp872x.c struct lp872x *lp = rdev_get_drvdata(rdev); rdev 355 drivers/regulator/lp872x.c enum lp872x_regulator_id buck = rdev_get_id(rdev); rdev 388 drivers/regulator/lp872x.c static unsigned int lp872x_buck_get_mode(struct regulator_dev *rdev) rdev 390 drivers/regulator/lp872x.c struct lp872x *lp = rdev_get_drvdata(rdev); rdev 391 drivers/regulator/lp872x.c enum lp872x_regulator_id buck = rdev_get_id(rdev); rdev 771 drivers/regulator/lp872x.c struct regulator_dev *rdev; rdev 783 drivers/regulator/lp872x.c rdev = devm_regulator_register(lp->dev, desc, &cfg); rdev 784 drivers/regulator/lp872x.c if (IS_ERR(rdev)) { rdev 786 drivers/regulator/lp872x.c return PTR_ERR(rdev); rdev 77 drivers/regulator/lp873x-regulator.c static int lp873x_buck_set_ramp_delay(struct regulator_dev *rdev, rdev 80 drivers/regulator/lp873x-regulator.c int id = rdev_get_id(rdev); rdev 81 drivers/regulator/lp873x-regulator.c struct lp873x *lp873 = rdev_get_drvdata(rdev); rdev 110 drivers/regulator/lp873x-regulator.c rdev->constraints->ramp_delay = lp873x_buck_ramp_delay[reg]; rdev 166 drivers/regulator/lp873x-regulator.c struct regulator_dev *rdev; rdev 177 drivers/regulator/lp873x-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i].desc, rdev 179 drivers/regulator/lp873x-regulator.c if (IS_ERR(rdev)) { rdev 182 drivers/regulator/lp873x-regulator.c return PTR_ERR(rdev); rdev 49 drivers/regulator/lp8755.c struct regulator_dev *rdev[LP8755_BUCK_MAX]; rdev 89 drivers/regulator/lp8755.c static int lp8755_buck_enable_time(struct regulator_dev *rdev) rdev 93 drivers/regulator/lp8755.c enum lp8755_bucks id = rdev_get_id(rdev); rdev 94 drivers/regulator/lp8755.c struct lp8755_chip *pchip = rdev_get_drvdata(rdev); rdev 104 drivers/regulator/lp8755.c static int lp8755_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 108 drivers/regulator/lp8755.c enum lp8755_bucks id = rdev_get_id(rdev); rdev 109 drivers/regulator/lp8755.c struct lp8755_chip *pchip = rdev_get_drvdata(rdev); rdev 147 drivers/regulator/lp8755.c static unsigned int lp8755_buck_get_mode(struct regulator_dev *rdev) rdev 151 drivers/regulator/lp8755.c enum lp8755_bucks id = rdev_get_id(rdev); rdev 152 drivers/regulator/lp8755.c struct lp8755_chip *pchip = rdev_get_drvdata(rdev); rdev 178 drivers/regulator/lp8755.c static int lp8755_buck_set_ramp(struct regulator_dev *rdev, int ramp) rdev 182 drivers/regulator/lp8755.c enum lp8755_bucks id = rdev_get_id(rdev); rdev 183 drivers/regulator/lp8755.c struct lp8755_chip *pchip = rdev_get_drvdata(rdev); rdev 337 drivers/regulator/lp8755.c pchip->rdev[buck_num] = rdev 340 drivers/regulator/lp8755.c if (IS_ERR(pchip->rdev[buck_num])) { rdev 341 drivers/regulator/lp8755.c ret = PTR_ERR(pchip->rdev[buck_num]); rdev 342 drivers/regulator/lp8755.c pchip->rdev[buck_num] = NULL; rdev 371 drivers/regulator/lp8755.c && (pchip->rdev[icnt] != NULL)) { rdev 372 drivers/regulator/lp8755.c regulator_lock(pchip->rdev[icnt]); rdev 373 drivers/regulator/lp8755.c regulator_notifier_call_chain(pchip->rdev[icnt], rdev 376 drivers/regulator/lp8755.c regulator_unlock(pchip->rdev[icnt]); rdev 391 drivers/regulator/lp8755.c if (pchip->rdev[icnt] != NULL) { rdev 392 drivers/regulator/lp8755.c regulator_lock(pchip->rdev[icnt]); rdev 393 drivers/regulator/lp8755.c regulator_notifier_call_chain(pchip->rdev[icnt], rdev 396 drivers/regulator/lp8755.c regulator_unlock(pchip->rdev[icnt]); rdev 402 drivers/regulator/lp8755.c if (pchip->rdev[icnt] != NULL) { rdev 403 drivers/regulator/lp8755.c regulator_lock(pchip->rdev[icnt]); rdev 404 drivers/regulator/lp8755.c regulator_notifier_call_chain(pchip->rdev[icnt], rdev 407 drivers/regulator/lp8755.c regulator_unlock(pchip->rdev[icnt]); rdev 64 drivers/regulator/lp87565-regulator.c static int lp87565_buck_set_ramp_delay(struct regulator_dev *rdev, rdev 67 drivers/regulator/lp87565-regulator.c int id = rdev_get_id(rdev); rdev 88 drivers/regulator/lp87565-regulator.c ret = regmap_update_bits(rdev->regmap, regulators[id].ctrl2_reg, rdev 92 drivers/regulator/lp87565-regulator.c dev_err(&rdev->dev, "SLEW RATE write failed: %d\n", ret); rdev 96 drivers/regulator/lp87565-regulator.c rdev->constraints->ramp_delay = lp87565_buck_ramp_delay[reg]; rdev 99 drivers/regulator/lp87565-regulator.c rdev->constraints->ramp_delay = rdev 100 drivers/regulator/lp87565-regulator.c rdev->constraints->ramp_delay * 85 / 100; rdev 164 drivers/regulator/lp87565-regulator.c struct regulator_dev *rdev; rdev 190 drivers/regulator/lp87565-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i].desc, rdev 192 drivers/regulator/lp87565-regulator.c if (IS_ERR(rdev)) { rdev 195 drivers/regulator/lp87565-regulator.c return PTR_ERR(rdev); rdev 256 drivers/regulator/lp8788-buck.c static int lp8788_buck12_set_voltage_sel(struct regulator_dev *rdev, rdev 259 drivers/regulator/lp8788-buck.c struct lp8788_buck *buck = rdev_get_drvdata(rdev); rdev 260 drivers/regulator/lp8788-buck.c enum lp8788_buck_id id = rdev_get_id(rdev); rdev 273 drivers/regulator/lp8788-buck.c static int lp8788_buck12_get_voltage_sel(struct regulator_dev *rdev) rdev 275 drivers/regulator/lp8788-buck.c struct lp8788_buck *buck = rdev_get_drvdata(rdev); rdev 276 drivers/regulator/lp8788-buck.c enum lp8788_buck_id id = rdev_get_id(rdev); rdev 291 drivers/regulator/lp8788-buck.c static int lp8788_buck_enable_time(struct regulator_dev *rdev) rdev 293 drivers/regulator/lp8788-buck.c struct lp8788_buck *buck = rdev_get_drvdata(rdev); rdev 294 drivers/regulator/lp8788-buck.c enum lp8788_buck_id id = rdev_get_id(rdev); rdev 305 drivers/regulator/lp8788-buck.c static int lp8788_buck_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 307 drivers/regulator/lp8788-buck.c struct lp8788_buck *buck = rdev_get_drvdata(rdev); rdev 308 drivers/regulator/lp8788-buck.c enum lp8788_buck_id id = rdev_get_id(rdev); rdev 326 drivers/regulator/lp8788-buck.c static unsigned int lp8788_buck_get_mode(struct regulator_dev *rdev) rdev 328 drivers/regulator/lp8788-buck.c struct lp8788_buck *buck = rdev_get_drvdata(rdev); rdev 329 drivers/regulator/lp8788-buck.c enum lp8788_buck_id id = rdev_get_id(rdev); rdev 495 drivers/regulator/lp8788-buck.c struct regulator_dev *rdev; rdev 516 drivers/regulator/lp8788-buck.c rdev = devm_regulator_register(&pdev->dev, &lp8788_buck_desc[id], &cfg); rdev 517 drivers/regulator/lp8788-buck.c if (IS_ERR(rdev)) { rdev 518 drivers/regulator/lp8788-buck.c ret = PTR_ERR(rdev); rdev 524 drivers/regulator/lp8788-buck.c buck->regulator = rdev; rdev 153 drivers/regulator/lp8788-ldo.c static int lp8788_ldo_enable_time(struct regulator_dev *rdev) rdev 155 drivers/regulator/lp8788-ldo.c struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); rdev 156 drivers/regulator/lp8788-ldo.c enum lp8788_ldo_id id = rdev_get_id(rdev); rdev 529 drivers/regulator/lp8788-ldo.c struct regulator_dev *rdev; rdev 549 drivers/regulator/lp8788-ldo.c rdev = devm_regulator_register(&pdev->dev, &lp8788_dldo_desc[id], &cfg); rdev 550 drivers/regulator/lp8788-ldo.c if (IS_ERR(rdev)) { rdev 551 drivers/regulator/lp8788-ldo.c ret = PTR_ERR(rdev); rdev 557 drivers/regulator/lp8788-ldo.c ldo->regulator = rdev; rdev 576 drivers/regulator/lp8788-ldo.c struct regulator_dev *rdev; rdev 596 drivers/regulator/lp8788-ldo.c rdev = devm_regulator_register(&pdev->dev, &lp8788_aldo_desc[id], &cfg); rdev 597 drivers/regulator/lp8788-ldo.c if (IS_ERR(rdev)) { rdev 598 drivers/regulator/lp8788-ldo.c ret = PTR_ERR(rdev); rdev 604 drivers/regulator/lp8788-ldo.c ldo->regulator = rdev; rdev 91 drivers/regulator/ltc3589.c static int ltc3589_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 93 drivers/regulator/ltc3589.c struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); rdev 100 drivers/regulator/ltc3589.c shift = ffs(rdev->desc->apply_bit) - 1; rdev 113 drivers/regulator/ltc3589.c static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 115 drivers/regulator/ltc3589.c struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); rdev 118 drivers/regulator/ltc3589.c sel = regulator_map_voltage_linear(rdev, uV, uV); rdev 123 drivers/regulator/ltc3589.c return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1, rdev 124 drivers/regulator/ltc3589.c rdev->desc->vsel_mask, sel); rdev 127 drivers/regulator/ltc3589.c static int ltc3589_set_suspend_mode(struct regulator_dev *rdev, rdev 130 drivers/regulator/ltc3589.c struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); rdev 134 drivers/regulator/ltc3589.c mask = rdev->desc->apply_bit << 1; rdev 139 drivers/regulator/ltc3589.c mask |= rdev->desc->apply_bit; rdev 140 drivers/regulator/ltc3589.c bit |= rdev->desc->apply_bit; rdev 73 drivers/regulator/ltc3676.c static int ltc3676_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 75 drivers/regulator/ltc3676.c struct ltc3676 *ltc3676 = rdev_get_drvdata(rdev); rdev 77 drivers/regulator/ltc3676.c int dcdc = rdev_get_id(rdev); rdev 81 drivers/regulator/ltc3676.c sel = regulator_map_voltage_linear(rdev, uV, uV); rdev 86 drivers/regulator/ltc3676.c return regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg + 1, rdev 87 drivers/regulator/ltc3676.c rdev->desc->vsel_mask, sel); rdev 90 drivers/regulator/ltc3676.c static int ltc3676_set_suspend_mode(struct regulator_dev *rdev, rdev 93 drivers/regulator/ltc3676.c struct ltc3676 *ltc3676= rdev_get_drvdata(rdev); rdev 96 drivers/regulator/ltc3676.c int dcdc = rdev_get_id(rdev); rdev 109 drivers/regulator/ltc3676.c dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n", rdev 110 drivers/regulator/ltc3676.c rdev->desc->name, mode); rdev 114 drivers/regulator/ltc3676.c return regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg, rdev 118 drivers/regulator/ltc3676.c static int ltc3676_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) rdev 120 drivers/regulator/ltc3676.c struct ltc3676 *ltc3676 = rdev_get_drvdata(rdev); rdev 122 drivers/regulator/ltc3676.c int ret, dcdc = rdev_get_id(rdev); rdev 126 drivers/regulator/ltc3676.c ret = regmap_update_bits(ltc3676->regmap, rdev->desc->vsel_reg + 1, rdev 132 drivers/regulator/ltc3676.c return regulator_set_voltage_sel_regmap(rdev, selector); rdev 15 drivers/regulator/max14577-regulator.c static int max14577_reg_is_enabled(struct regulator_dev *rdev) rdev 17 drivers/regulator/max14577-regulator.c int rid = rdev_get_id(rdev); rdev 18 drivers/regulator/max14577-regulator.c struct regmap *rmap = rdev->regmap; rdev 36 drivers/regulator/max14577-regulator.c static int max14577_reg_get_current_limit(struct regulator_dev *rdev) rdev 39 drivers/regulator/max14577-regulator.c struct regmap *rmap = rdev->regmap; rdev 40 drivers/regulator/max14577-regulator.c struct max14577 *max14577 = rdev_get_drvdata(rdev); rdev 44 drivers/regulator/max14577-regulator.c if (rdev_get_id(rdev) != MAX14577_CHARGER) rdev 57 drivers/regulator/max14577-regulator.c static int max14577_reg_set_current_limit(struct regulator_dev *rdev, rdev 62 drivers/regulator/max14577-regulator.c struct max14577 *max14577 = rdev_get_drvdata(rdev); rdev 66 drivers/regulator/max14577-regulator.c if (rdev_get_id(rdev) != MAX14577_CHARGER) rdev 73 drivers/regulator/max14577-regulator.c return max14577_update_reg(rdev->regmap, MAX14577_CHG_REG_CHG_CTRL4, rdev 56 drivers/regulator/max1586.c static int max1586_v3_get_voltage_sel(struct regulator_dev *rdev) rdev 58 drivers/regulator/max1586.c struct max1586_data *max1586 = rdev_get_drvdata(rdev); rdev 63 drivers/regulator/max1586.c static int max1586_v3_set_voltage_sel(struct regulator_dev *rdev, rdev 66 drivers/regulator/max1586.c struct max1586_data *max1586 = rdev_get_drvdata(rdev); rdev 72 drivers/regulator/max1586.c regulator_list_voltage_linear(rdev, selector) / 1000); rdev 84 drivers/regulator/max1586.c static int max1586_v6_get_voltage_sel(struct regulator_dev *rdev) rdev 86 drivers/regulator/max1586.c struct max1586_data *max1586 = rdev_get_drvdata(rdev); rdev 91 drivers/regulator/max1586.c static int max1586_v6_set_voltage_sel(struct regulator_dev *rdev, rdev 94 drivers/regulator/max1586.c struct max1586_data *max1586 = rdev_get_drvdata(rdev); rdev 100 drivers/regulator/max1586.c rdev->desc->volt_table[selector] / 1000); rdev 251 drivers/regulator/max1586.c struct regulator_dev *rdev; rdev 272 drivers/regulator/max1586.c rdev = devm_regulator_register(&client->dev, rdev 274 drivers/regulator/max1586.c if (IS_ERR(rdev)) { rdev 277 drivers/regulator/max1586.c return PTR_ERR(rdev); rdev 442 drivers/regulator/max77620-regulator.c static int max77620_regulator_enable(struct regulator_dev *rdev) rdev 444 drivers/regulator/max77620-regulator.c struct max77620_regulator *pmic = rdev_get_drvdata(rdev); rdev 445 drivers/regulator/max77620-regulator.c int id = rdev_get_id(rdev); rdev 454 drivers/regulator/max77620-regulator.c static int max77620_regulator_disable(struct regulator_dev *rdev) rdev 456 drivers/regulator/max77620-regulator.c struct max77620_regulator *pmic = rdev_get_drvdata(rdev); rdev 457 drivers/regulator/max77620-regulator.c int id = rdev_get_id(rdev); rdev 466 drivers/regulator/max77620-regulator.c static int max77620_regulator_is_enabled(struct regulator_dev *rdev) rdev 468 drivers/regulator/max77620-regulator.c struct max77620_regulator *pmic = rdev_get_drvdata(rdev); rdev 469 drivers/regulator/max77620-regulator.c int id = rdev_get_id(rdev); rdev 485 drivers/regulator/max77620-regulator.c static int max77620_regulator_set_mode(struct regulator_dev *rdev, rdev 488 drivers/regulator/max77620-regulator.c struct max77620_regulator *pmic = rdev_get_drvdata(rdev); rdev 489 drivers/regulator/max77620-regulator.c int id = rdev_get_id(rdev); rdev 540 drivers/regulator/max77620-regulator.c static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev) rdev 542 drivers/regulator/max77620-regulator.c struct max77620_regulator *pmic = rdev_get_drvdata(rdev); rdev 543 drivers/regulator/max77620-regulator.c int id = rdev_get_id(rdev); rdev 585 drivers/regulator/max77620-regulator.c static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev, rdev 588 drivers/regulator/max77620-regulator.c struct max77620_regulator *pmic = rdev_get_drvdata(rdev); rdev 589 drivers/regulator/max77620-regulator.c int id = rdev_get_id(rdev); rdev 818 drivers/regulator/max77620-regulator.c struct regulator_dev *rdev; rdev 841 drivers/regulator/max77620-regulator.c rdev = devm_regulator_register(dev, rdesc, &config); rdev 842 drivers/regulator/max77620-regulator.c if (IS_ERR(rdev)) { rdev 843 drivers/regulator/max77620-regulator.c ret = PTR_ERR(rdev); rdev 67 drivers/regulator/max77650-regulator.c static int max77650_regulator_is_enabled(struct regulator_dev *rdev) rdev 73 drivers/regulator/max77650-regulator.c rdesc = rdev_get_drvdata(rdev); rdev 74 drivers/regulator/max77650-regulator.c map = rdev_get_regmap(rdev); rdev 85 drivers/regulator/max77650-regulator.c static int max77650_regulator_enable(struct regulator_dev *rdev) rdev 90 drivers/regulator/max77650-regulator.c rdesc = rdev_get_drvdata(rdev); rdev 91 drivers/regulator/max77650-regulator.c map = rdev_get_regmap(rdev); rdev 98 drivers/regulator/max77650-regulator.c static int max77650_regulator_disable(struct regulator_dev *rdev) rdev 103 drivers/regulator/max77650-regulator.c rdesc = rdev_get_drvdata(rdev); rdev 104 drivers/regulator/max77650-regulator.c map = rdev_get_regmap(rdev); rdev 333 drivers/regulator/max77650-regulator.c struct regulator_dev *rdev; rdev 381 drivers/regulator/max77650-regulator.c rdev = devm_regulator_register(dev, &rdesc->desc, &config); rdev 382 drivers/regulator/max77650-regulator.c if (IS_ERR(rdev)) rdev 383 drivers/regulator/max77650-regulator.c return PTR_ERR(rdev); rdev 120 drivers/regulator/max77686-regulator.c static int max77686_set_suspend_disable(struct regulator_dev *rdev) rdev 123 drivers/regulator/max77686-regulator.c struct max77686_data *max77686 = rdev_get_drvdata(rdev); rdev 124 drivers/regulator/max77686-regulator.c int ret, id = rdev_get_id(rdev); rdev 129 drivers/regulator/max77686-regulator.c ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 130 drivers/regulator/max77686-regulator.c rdev->desc->enable_mask, val << shift); rdev 139 drivers/regulator/max77686-regulator.c static int max77686_set_suspend_mode(struct regulator_dev *rdev, rdev 142 drivers/regulator/max77686-regulator.c struct max77686_data *max77686 = rdev_get_drvdata(rdev); rdev 144 drivers/regulator/max77686-regulator.c int ret, id = rdev_get_id(rdev); rdev 159 drivers/regulator/max77686-regulator.c rdev->desc->name, mode); rdev 163 drivers/regulator/max77686-regulator.c ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 164 drivers/regulator/max77686-regulator.c rdev->desc->enable_mask, rdev 174 drivers/regulator/max77686-regulator.c static int max77686_ldo_set_suspend_mode(struct regulator_dev *rdev, rdev 178 drivers/regulator/max77686-regulator.c struct max77686_data *max77686 = rdev_get_drvdata(rdev); rdev 179 drivers/regulator/max77686-regulator.c int ret, id = rdev_get_id(rdev); rdev 193 drivers/regulator/max77686-regulator.c rdev->desc->name, mode); rdev 197 drivers/regulator/max77686-regulator.c ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 198 drivers/regulator/max77686-regulator.c rdev->desc->enable_mask, rdev 207 drivers/regulator/max77686-regulator.c static int max77686_enable(struct regulator_dev *rdev) rdev 209 drivers/regulator/max77686-regulator.c struct max77686_data *max77686 = rdev_get_drvdata(rdev); rdev 211 drivers/regulator/max77686-regulator.c int id = rdev_get_id(rdev); rdev 218 drivers/regulator/max77686-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 219 drivers/regulator/max77686-regulator.c rdev->desc->enable_mask, rdev 223 drivers/regulator/max77686-regulator.c static int max77686_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 241 drivers/regulator/max77686-regulator.c rdev->desc->name, ramp_delay); rdev 244 drivers/regulator/max77686-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 525 drivers/regulator/max77686-regulator.c struct regulator_dev *rdev; rdev 529 drivers/regulator/max77686-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 531 drivers/regulator/max77686-regulator.c if (IS_ERR(rdev)) { rdev 532 drivers/regulator/max77686-regulator.c int ret = PTR_ERR(rdev); rdev 55 drivers/regulator/max77693-regulator.c static int max77693_chg_get_current_limit(struct regulator_dev *rdev) rdev 57 drivers/regulator/max77693-regulator.c const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); rdev 58 drivers/regulator/max77693-regulator.c unsigned int chg_min_uA = rdev->constraints->min_uA; rdev 59 drivers/regulator/max77693-regulator.c unsigned int chg_max_uA = rdev->constraints->max_uA; rdev 64 drivers/regulator/max77693-regulator.c ret = regmap_read(rdev->regmap, reg_data->linear_reg, ®); rdev 83 drivers/regulator/max77693-regulator.c static int max77693_chg_set_current_limit(struct regulator_dev *rdev, rdev 86 drivers/regulator/max77693-regulator.c const struct chg_reg_data *reg_data = rdev_get_drvdata(rdev); rdev 87 drivers/regulator/max77693-regulator.c unsigned int chg_min_uA = rdev->constraints->min_uA; rdev 99 drivers/regulator/max77693-regulator.c return regmap_write(rdev->regmap, reg_data->linear_reg, sel); rdev 256 drivers/regulator/max77693-regulator.c struct regulator_dev *rdev; rdev 261 drivers/regulator/max77693-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 263 drivers/regulator/max77693-regulator.c if (IS_ERR(rdev)) { rdev 266 drivers/regulator/max77693-regulator.c return PTR_ERR(rdev); rdev 94 drivers/regulator/max77802-regulator.c static int max77802_set_suspend_disable(struct regulator_dev *rdev) rdev 97 drivers/regulator/max77802-regulator.c struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); rdev 98 drivers/regulator/max77802-regulator.c int id = rdev_get_id(rdev); rdev 102 drivers/regulator/max77802-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 103 drivers/regulator/max77802-regulator.c rdev->desc->enable_mask, val << shift); rdev 111 drivers/regulator/max77802-regulator.c static int max77802_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 113 drivers/regulator/max77802-regulator.c struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); rdev 114 drivers/regulator/max77802-regulator.c int id = rdev_get_id(rdev); rdev 126 drivers/regulator/max77802-regulator.c dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n", rdev 127 drivers/regulator/max77802-regulator.c rdev->desc->name, mode); rdev 132 drivers/regulator/max77802-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 133 drivers/regulator/max77802-regulator.c rdev->desc->enable_mask, val << shift); rdev 136 drivers/regulator/max77802-regulator.c static unsigned max77802_get_mode(struct regulator_dev *rdev) rdev 138 drivers/regulator/max77802-regulator.c struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); rdev 139 drivers/regulator/max77802-regulator.c int id = rdev_get_id(rdev); rdev 160 drivers/regulator/max77802-regulator.c static int max77802_set_suspend_mode(struct regulator_dev *rdev, rdev 163 drivers/regulator/max77802-regulator.c struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); rdev 164 drivers/regulator/max77802-regulator.c int id = rdev_get_id(rdev); rdev 173 drivers/regulator/max77802-regulator.c dev_warn(&rdev->dev, "%s: is disabled, mode: 0x%x not set\n", rdev 174 drivers/regulator/max77802-regulator.c rdev->desc->name, mode); rdev 197 drivers/regulator/max77802-regulator.c dev_warn(&rdev->dev, "%s: in Low Power: 0x%x invalid\n", rdev 198 drivers/regulator/max77802-regulator.c rdev->desc->name, mode); rdev 201 drivers/regulator/max77802-regulator.c dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n", rdev 202 drivers/regulator/max77802-regulator.c rdev->desc->name, mode); rdev 206 drivers/regulator/max77802-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 207 drivers/regulator/max77802-regulator.c rdev->desc->enable_mask, val << shift); rdev 210 drivers/regulator/max77802-regulator.c static int max77802_enable(struct regulator_dev *rdev) rdev 212 drivers/regulator/max77802-regulator.c struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev); rdev 213 drivers/regulator/max77802-regulator.c int id = rdev_get_id(rdev); rdev 219 drivers/regulator/max77802-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 220 drivers/regulator/max77802-regulator.c rdev->desc->enable_mask, rdev 224 drivers/regulator/max77802-regulator.c static int max77802_find_ramp_value(struct regulator_dev *rdev, rdev 236 drivers/regulator/max77802-regulator.c dev_warn(&rdev->dev, "%s: ramp_delay: %d not supported, setting 100000\n", rdev 237 drivers/regulator/max77802-regulator.c rdev->desc->name, ramp_delay); rdev 242 drivers/regulator/max77802-regulator.c static int max77802_set_ramp_delay_2bit(struct regulator_dev *rdev, rdev 245 drivers/regulator/max77802-regulator.c int id = rdev_get_id(rdev); rdev 249 drivers/regulator/max77802-regulator.c dev_warn(&rdev->dev, rdev 251 drivers/regulator/max77802-regulator.c rdev->desc->name); rdev 254 drivers/regulator/max77802-regulator.c ramp_value = max77802_find_ramp_value(rdev, ramp_table_77802_2bit, rdev 257 drivers/regulator/max77802-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 263 drivers/regulator/max77802-regulator.c static int max77802_set_ramp_delay_4bit(struct regulator_dev *rdev, rdev 268 drivers/regulator/max77802-regulator.c ramp_value = max77802_find_ramp_value(rdev, ramp_table_77802_4bit, rdev 271 drivers/regulator/max77802-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 543 drivers/regulator/max77802-regulator.c struct regulator_dev *rdev; rdev 567 drivers/regulator/max77802-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 569 drivers/regulator/max77802-regulator.c if (IS_ERR(rdev)) { rdev 570 drivers/regulator/max77802-regulator.c ret = PTR_ERR(rdev); rdev 59 drivers/regulator/max8649.c static int max8649_enable_time(struct regulator_dev *rdev) rdev 61 drivers/regulator/max8649.c struct max8649_regulator_info *info = rdev_get_drvdata(rdev); rdev 66 drivers/regulator/max8649.c ret = regmap_read(info->regmap, rdev->desc->vsel_reg, &val); rdev 70 drivers/regulator/max8649.c voltage = regulator_list_voltage_linear(rdev, (unsigned char)val); rdev 82 drivers/regulator/max8649.c static int max8649_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 84 drivers/regulator/max8649.c struct max8649_regulator_info *info = rdev_get_drvdata(rdev); rdev 88 drivers/regulator/max8649.c regmap_update_bits(info->regmap, rdev->desc->vsel_reg, rdev 92 drivers/regulator/max8649.c regmap_update_bits(info->regmap, rdev->desc->vsel_reg, rdev 101 drivers/regulator/max8649.c static unsigned int max8649_get_mode(struct regulator_dev *rdev) rdev 103 drivers/regulator/max8649.c struct max8649_regulator_info *info = rdev_get_drvdata(rdev); rdev 107 drivers/regulator/max8649.c ret = regmap_read(info->regmap, rdev->desc->vsel_reg, &val); rdev 98 drivers/regulator/max8660.c static int max8660_dcdc_is_enabled(struct regulator_dev *rdev) rdev 100 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 102 drivers/regulator/max8660.c u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4; rdev 107 drivers/regulator/max8660.c static int max8660_dcdc_enable(struct regulator_dev *rdev) rdev 109 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 110 drivers/regulator/max8660.c u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4; rdev 115 drivers/regulator/max8660.c static int max8660_dcdc_disable(struct regulator_dev *rdev) rdev 117 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 118 drivers/regulator/max8660.c u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4; rdev 123 drivers/regulator/max8660.c static int max8660_dcdc_get_voltage_sel(struct regulator_dev *rdev) rdev 125 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 126 drivers/regulator/max8660.c u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2; rdev 132 drivers/regulator/max8660.c static int max8660_dcdc_set_voltage_sel(struct regulator_dev *rdev, rdev 135 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 139 drivers/regulator/max8660.c reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2; rdev 145 drivers/regulator/max8660.c bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30; rdev 162 drivers/regulator/max8660.c static int max8660_ldo5_get_voltage_sel(struct regulator_dev *rdev) rdev 164 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 170 drivers/regulator/max8660.c static int max8660_ldo5_set_voltage_sel(struct regulator_dev *rdev, rdev 173 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 196 drivers/regulator/max8660.c static int max8660_ldo67_is_enabled(struct regulator_dev *rdev) rdev 198 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 200 drivers/regulator/max8660.c u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4; rdev 205 drivers/regulator/max8660.c static int max8660_ldo67_enable(struct regulator_dev *rdev) rdev 207 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 208 drivers/regulator/max8660.c u8 bit = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4; rdev 213 drivers/regulator/max8660.c static int max8660_ldo67_disable(struct regulator_dev *rdev) rdev 215 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 216 drivers/regulator/max8660.c u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? ~2 : ~4; rdev 221 drivers/regulator/max8660.c static int max8660_ldo67_get_voltage_sel(struct regulator_dev *rdev) rdev 223 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 224 drivers/regulator/max8660.c u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4; rdev 230 drivers/regulator/max8660.c static int max8660_ldo67_set_voltage_sel(struct regulator_dev *rdev, rdev 233 drivers/regulator/max8660.c struct max8660 *max8660 = rdev_get_drvdata(rdev); rdev 235 drivers/regulator/max8660.c if (rdev_get_id(rdev) == MAX8660_V6) rdev 476 drivers/regulator/max8660.c struct regulator_dev *rdev; rdev 485 drivers/regulator/max8660.c rdev = devm_regulator_register(&client->dev, rdev 487 drivers/regulator/max8660.c if (IS_ERR(rdev)) { rdev 490 drivers/regulator/max8660.c return PTR_ERR(rdev); rdev 312 drivers/regulator/max8907-regulator.c struct regulator_dev *rdev; rdev 359 drivers/regulator/max8907-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 361 drivers/regulator/max8907-regulator.c if (IS_ERR(rdev)) { rdev 365 drivers/regulator/max8907-regulator.c return PTR_ERR(rdev); rdev 42 drivers/regulator/max8925-regulator.c static int max8925_set_voltage_sel(struct regulator_dev *rdev, rdev 45 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 46 drivers/regulator/max8925-regulator.c unsigned char mask = rdev->desc->n_voltages - 1; rdev 51 drivers/regulator/max8925-regulator.c static int max8925_get_voltage_sel(struct regulator_dev *rdev) rdev 53 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 60 drivers/regulator/max8925-regulator.c mask = rdev->desc->n_voltages - 1; rdev 66 drivers/regulator/max8925-regulator.c static int max8925_enable(struct regulator_dev *rdev) rdev 68 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 77 drivers/regulator/max8925-regulator.c static int max8925_disable(struct regulator_dev *rdev) rdev 79 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 87 drivers/regulator/max8925-regulator.c static int max8925_is_enabled(struct regulator_dev *rdev) rdev 89 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 102 drivers/regulator/max8925-regulator.c static int max8925_set_dvm_voltage(struct regulator_dev *rdev, int uV) rdev 104 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 117 drivers/regulator/max8925-regulator.c static int max8925_set_dvm_enable(struct regulator_dev *rdev) rdev 119 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 125 drivers/regulator/max8925-regulator.c static int max8925_set_dvm_disable(struct regulator_dev *rdev) rdev 127 drivers/regulator/max8925-regulator.c struct max8925_regulator_info *info = rdev_get_drvdata(rdev); rdev 225 drivers/regulator/max8925-regulator.c struct regulator_dev *rdev; rdev 252 drivers/regulator/max8925-regulator.c rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); rdev 253 drivers/regulator/max8925-regulator.c if (IS_ERR(rdev)) { rdev 256 drivers/regulator/max8925-regulator.c return PTR_ERR(rdev); rdev 259 drivers/regulator/max8925-regulator.c platform_set_drvdata(pdev, rdev); rdev 60 drivers/regulator/max8952.c static int max8952_list_voltage(struct regulator_dev *rdev, rdev 63 drivers/regulator/max8952.c struct max8952_data *max8952 = rdev_get_drvdata(rdev); rdev 65 drivers/regulator/max8952.c if (rdev_get_id(rdev) != 0) rdev 71 drivers/regulator/max8952.c static int max8952_get_voltage_sel(struct regulator_dev *rdev) rdev 73 drivers/regulator/max8952.c struct max8952_data *max8952 = rdev_get_drvdata(rdev); rdev 84 drivers/regulator/max8952.c static int max8952_set_voltage_sel(struct regulator_dev *rdev, rdev 87 drivers/regulator/max8952.c struct max8952_data *max8952 = rdev_get_drvdata(rdev); rdev 181 drivers/regulator/max8952.c struct regulator_dev *rdev; rdev 228 drivers/regulator/max8952.c rdev = devm_regulator_register(&client->dev, ®ulator, &config); rdev 229 drivers/regulator/max8952.c if (IS_ERR(rdev)) { rdev 230 drivers/regulator/max8952.c ret = PTR_ERR(rdev); rdev 172 drivers/regulator/max8973-regulator.c static int max8973_dcdc_get_voltage_sel(struct regulator_dev *rdev) rdev 174 drivers/regulator/max8973-regulator.c struct max8973_chip *max = rdev_get_drvdata(rdev); rdev 187 drivers/regulator/max8973-regulator.c static int max8973_dcdc_set_voltage_sel(struct regulator_dev *rdev, rdev 190 drivers/regulator/max8973-regulator.c struct max8973_chip *max = rdev_get_drvdata(rdev); rdev 224 drivers/regulator/max8973-regulator.c static int max8973_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 226 drivers/regulator/max8973-regulator.c struct max8973_chip *max = rdev_get_drvdata(rdev); rdev 252 drivers/regulator/max8973-regulator.c static unsigned int max8973_dcdc_get_mode(struct regulator_dev *rdev) rdev 254 drivers/regulator/max8973-regulator.c struct max8973_chip *max = rdev_get_drvdata(rdev); rdev 268 drivers/regulator/max8973-regulator.c static int max8973_set_ramp_delay(struct regulator_dev *rdev, rdev 271 drivers/regulator/max8973-regulator.c struct max8973_chip *max = rdev_get_drvdata(rdev); rdev 295 drivers/regulator/max8973-regulator.c static int max8973_set_current_limit(struct regulator_dev *rdev, rdev 298 drivers/regulator/max8973-regulator.c struct max8973_chip *max = rdev_get_drvdata(rdev); rdev 319 drivers/regulator/max8973-regulator.c static int max8973_get_current_limit(struct regulator_dev *rdev) rdev 321 drivers/regulator/max8973-regulator.c struct max8973_chip *max = rdev_get_drvdata(rdev); rdev 631 drivers/regulator/max8973-regulator.c struct regulator_dev *rdev; rdev 818 drivers/regulator/max8973-regulator.c rdev = devm_regulator_register(&client->dev, &max->desc, &config); rdev 819 drivers/regulator/max8973-regulator.c if (IS_ERR(rdev)) { rdev 820 drivers/regulator/max8973-regulator.c ret = PTR_ERR(rdev); rdev 125 drivers/regulator/max8997-regulator.c static int max8997_list_voltage_charger_cv(struct regulator_dev *rdev, rdev 128 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 147 drivers/regulator/max8997-regulator.c static int max8997_list_voltage(struct regulator_dev *rdev, rdev 151 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 168 drivers/regulator/max8997-regulator.c static int max8997_get_enable_register(struct regulator_dev *rdev, rdev 171 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 242 drivers/regulator/max8997-regulator.c static int max8997_reg_is_enabled(struct regulator_dev *rdev) rdev 244 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 249 drivers/regulator/max8997-regulator.c ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); rdev 260 drivers/regulator/max8997-regulator.c static int max8997_reg_enable(struct regulator_dev *rdev) rdev 262 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 266 drivers/regulator/max8997-regulator.c ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); rdev 273 drivers/regulator/max8997-regulator.c static int max8997_reg_disable(struct regulator_dev *rdev) rdev 275 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 279 drivers/regulator/max8997-regulator.c ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); rdev 286 drivers/regulator/max8997-regulator.c static int max8997_get_voltage_register(struct regulator_dev *rdev, rdev 289 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 290 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 352 drivers/regulator/max8997-regulator.c static int max8997_get_voltage_sel(struct regulator_dev *rdev) rdev 354 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 359 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); rdev 396 drivers/regulator/max8997-regulator.c static int max8997_set_voltage_charger_cv(struct regulator_dev *rdev, rdev 399 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 401 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 409 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); rdev 448 drivers/regulator/max8997-regulator.c static int max8997_set_voltage_ldobuck(struct regulator_dev *rdev, rdev 451 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 454 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 480 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); rdev 490 drivers/regulator/max8997-regulator.c static int max8997_set_voltage_buck_time_sel(struct regulator_dev *rdev, rdev 494 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 495 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 538 drivers/regulator/max8997-regulator.c static int max8997_assess_side_effect(struct regulator_dev *rdev, rdev 541 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 542 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 615 drivers/regulator/max8997-regulator.c static int max8997_set_voltage_buck(struct regulator_dev *rdev, rdev 618 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 619 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 643 drivers/regulator/max8997-regulator.c return max8997_set_voltage_ldobuck(rdev, min_uV, max_uV, rdev 655 drivers/regulator/max8997-regulator.c damage = max8997_assess_side_effect(rdev, new_val, &new_idx); rdev 674 drivers/regulator/max8997-regulator.c dev_warn(&rdev->dev, rdev 690 drivers/regulator/max8997-regulator.c static int max8997_set_voltage_safeout_sel(struct regulator_dev *rdev, rdev 693 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 695 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 701 drivers/regulator/max8997-regulator.c ret = max8997_get_voltage_register(rdev, ®, &shift, &mask); rdev 708 drivers/regulator/max8997-regulator.c static int max8997_reg_disable_suspend(struct regulator_dev *rdev) rdev 710 drivers/regulator/max8997-regulator.c struct max8997_data *max8997 = rdev_get_drvdata(rdev); rdev 713 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 715 drivers/regulator/max8997-regulator.c ret = max8997_get_enable_register(rdev, ®, &mask, &pattern); rdev 724 drivers/regulator/max8997-regulator.c dev_dbg(&rdev->dev, "Conditional Power-Off for %s\n", rdev 725 drivers/regulator/max8997-regulator.c rdev->desc->name); rdev 729 drivers/regulator/max8997-regulator.c dev_dbg(&rdev->dev, "Full Power-Off for %s (%xh -> %xh)\n", rdev 730 drivers/regulator/max8997-regulator.c rdev->desc->name, max8997->saved_states[rid] & mask, rdev 780 drivers/regulator/max8997-regulator.c static int max8997_set_current_limit(struct regulator_dev *rdev, rdev 784 drivers/regulator/max8997-regulator.c int rid = rdev_get_id(rdev); rdev 790 drivers/regulator/max8997-regulator.c return max8997_set_voltage_ldobuck(rdev, min_uA, max_uA, &dummy); rdev 793 drivers/regulator/max8997-regulator.c static int max8997_get_current_limit(struct regulator_dev *rdev) rdev 795 drivers/regulator/max8997-regulator.c int sel, rid = rdev_get_id(rdev); rdev 800 drivers/regulator/max8997-regulator.c sel = max8997_get_voltage_sel(rdev); rdev 805 drivers/regulator/max8997-regulator.c return max8997_list_voltage(rdev, sel); rdev 1015 drivers/regulator/max8997-regulator.c struct regulator_dev *rdev; rdev 1184 drivers/regulator/max8997-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[id], rdev 1186 drivers/regulator/max8997-regulator.c if (IS_ERR(rdev)) { rdev 1189 drivers/regulator/max8997-regulator.c return PTR_ERR(rdev); rdev 36 drivers/regulator/max8998.c static int max8998_get_enable_register(struct regulator_dev *rdev, rdev 39 drivers/regulator/max8998.c int ldo = rdev_get_id(rdev); rdev 73 drivers/regulator/max8998.c static int max8998_ldo_is_enabled(struct regulator_dev *rdev) rdev 75 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 80 drivers/regulator/max8998.c ret = max8998_get_enable_register(rdev, ®, &shift); rdev 91 drivers/regulator/max8998.c static int max8998_ldo_enable(struct regulator_dev *rdev) rdev 93 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 97 drivers/regulator/max8998.c ret = max8998_get_enable_register(rdev, ®, &shift); rdev 104 drivers/regulator/max8998.c static int max8998_ldo_disable(struct regulator_dev *rdev) rdev 106 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 110 drivers/regulator/max8998.c ret = max8998_get_enable_register(rdev, ®, &shift); rdev 117 drivers/regulator/max8998.c static int max8998_get_voltage_register(struct regulator_dev *rdev, rdev 120 drivers/regulator/max8998.c int ldo = rdev_get_id(rdev); rdev 121 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 180 drivers/regulator/max8998.c static int max8998_get_voltage_sel(struct regulator_dev *rdev) rdev 182 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 187 drivers/regulator/max8998.c ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); rdev 201 drivers/regulator/max8998.c static int max8998_set_voltage_ldo_sel(struct regulator_dev *rdev, rdev 204 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 208 drivers/regulator/max8998.c ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); rdev 228 drivers/regulator/max8998.c static int max8998_set_voltage_buck_sel(struct regulator_dev *rdev, rdev 231 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 234 drivers/regulator/max8998.c int buck = rdev_get_id(rdev); rdev 238 drivers/regulator/max8998.c ret = max8998_get_voltage_register(rdev, ®, &shift, &mask); rdev 272 drivers/regulator/max8998.c ret = max8998_get_voltage_register(rdev, ®, rdev 308 drivers/regulator/max8998.c max8998_get_voltage_register(rdev, rdev 331 drivers/regulator/max8998.c static int max8998_set_voltage_buck_time_sel(struct regulator_dev *rdev, rdev 335 drivers/regulator/max8998.c struct max8998_data *max8998 = rdev_get_drvdata(rdev); rdev 337 drivers/regulator/max8998.c int buck = rdev_get_id(rdev); rdev 354 drivers/regulator/max8998.c difference = (new_selector - old_selector) * rdev->desc->uV_step / 1000; rdev 561 drivers/regulator/max8998.c struct regulator_dev *rdev; rdev 679 drivers/regulator/max8998.c rdev = devm_regulator_register(&pdev->dev, ®ulators[index], rdev 681 drivers/regulator/max8998.c if (IS_ERR(rdev)) { rdev 682 drivers/regulator/max8998.c ret = PTR_ERR(rdev); rdev 325 drivers/regulator/mc13783-regulator.c static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev) rdev 327 drivers/regulator/mc13783-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 329 drivers/regulator/mc13783-regulator.c int id = rdev_get_id(rdev); rdev 332 drivers/regulator/mc13783-regulator.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 343 drivers/regulator/mc13783-regulator.c static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev) rdev 345 drivers/regulator/mc13783-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 347 drivers/regulator/mc13783-regulator.c int id = rdev_get_id(rdev); rdev 350 drivers/regulator/mc13783-regulator.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 361 drivers/regulator/mc13783-regulator.c static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev) rdev 363 drivers/regulator/mc13783-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 365 drivers/regulator/mc13783-regulator.c int ret, id = rdev_get_id(rdev); rdev 333 drivers/regulator/mc13892-regulator.c static int mc13892_gpo_regulator_enable(struct regulator_dev *rdev) rdev 335 drivers/regulator/mc13892-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 336 drivers/regulator/mc13892-regulator.c int id = rdev_get_id(rdev); rdev 340 drivers/regulator/mc13892-regulator.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 352 drivers/regulator/mc13892-regulator.c static int mc13892_gpo_regulator_disable(struct regulator_dev *rdev) rdev 354 drivers/regulator/mc13892-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 355 drivers/regulator/mc13892-regulator.c int id = rdev_get_id(rdev); rdev 358 drivers/regulator/mc13892-regulator.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 368 drivers/regulator/mc13892-regulator.c static int mc13892_gpo_regulator_is_enabled(struct regulator_dev *rdev) rdev 370 drivers/regulator/mc13892-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 371 drivers/regulator/mc13892-regulator.c int ret, id = rdev_get_id(rdev); rdev 398 drivers/regulator/mc13892-regulator.c static int mc13892_sw_regulator_get_voltage_sel(struct regulator_dev *rdev) rdev 400 drivers/regulator/mc13892-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 401 drivers/regulator/mc13892-regulator.c int ret, id = rdev_get_id(rdev); rdev 404 drivers/regulator/mc13892-regulator.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 431 drivers/regulator/mc13892-regulator.c dev_dbg(rdev_get_dev(rdev), "%s id: %d val: 0x%08x selector: %d\n", rdev 437 drivers/regulator/mc13892-regulator.c static int mc13892_sw_regulator_set_voltage_sel(struct regulator_dev *rdev, rdev 440 drivers/regulator/mc13892-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 441 drivers/regulator/mc13892-regulator.c int volt, mask, id = rdev_get_id(rdev); rdev 445 drivers/regulator/mc13892-regulator.c volt = rdev->desc->volt_table[selector]; rdev 489 drivers/regulator/mc13892-regulator.c static int mc13892_vcam_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 492 drivers/regulator/mc13892-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 493 drivers/regulator/mc13892-regulator.c int ret, id = rdev_get_id(rdev); rdev 506 drivers/regulator/mc13892-regulator.c static unsigned int mc13892_vcam_get_mode(struct regulator_dev *rdev) rdev 508 drivers/regulator/mc13892-regulator.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 509 drivers/regulator/mc13892-regulator.c int ret, id = rdev_get_id(rdev); rdev 27 drivers/regulator/mc13xxx-regulator-core.c static int mc13xxx_regulator_enable(struct regulator_dev *rdev) rdev 29 drivers/regulator/mc13xxx-regulator-core.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 31 drivers/regulator/mc13xxx-regulator-core.c int id = rdev_get_id(rdev); rdev 33 drivers/regulator/mc13xxx-regulator-core.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 40 drivers/regulator/mc13xxx-regulator-core.c static int mc13xxx_regulator_disable(struct regulator_dev *rdev) rdev 42 drivers/regulator/mc13xxx-regulator-core.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 44 drivers/regulator/mc13xxx-regulator-core.c int id = rdev_get_id(rdev); rdev 46 drivers/regulator/mc13xxx-regulator-core.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 52 drivers/regulator/mc13xxx-regulator-core.c static int mc13xxx_regulator_is_enabled(struct regulator_dev *rdev) rdev 54 drivers/regulator/mc13xxx-regulator-core.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 56 drivers/regulator/mc13xxx-regulator-core.c int ret, id = rdev_get_id(rdev); rdev 66 drivers/regulator/mc13xxx-regulator-core.c static int mc13xxx_regulator_set_voltage_sel(struct regulator_dev *rdev, rdev 69 drivers/regulator/mc13xxx-regulator-core.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 71 drivers/regulator/mc13xxx-regulator-core.c int id = rdev_get_id(rdev); rdev 78 drivers/regulator/mc13xxx-regulator-core.c static int mc13xxx_regulator_get_voltage(struct regulator_dev *rdev) rdev 80 drivers/regulator/mc13xxx-regulator-core.c struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); rdev 82 drivers/regulator/mc13xxx-regulator-core.c int ret, id = rdev_get_id(rdev); rdev 85 drivers/regulator/mc13xxx-regulator-core.c dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); rdev 95 drivers/regulator/mc13xxx-regulator-core.c dev_dbg(rdev_get_dev(rdev), "%s id: %d val: %d\n", __func__, id, val); rdev 99 drivers/regulator/mc13xxx-regulator-core.c return rdev->desc->volt_table[val]; rdev 112 drivers/regulator/mc13xxx-regulator-core.c int mc13xxx_fixed_regulator_set_voltage(struct regulator_dev *rdev, int min_uV, rdev 115 drivers/regulator/mc13xxx-regulator-core.c int id = rdev_get_id(rdev); rdev 117 drivers/regulator/mc13xxx-regulator-core.c dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n", rdev 120 drivers/regulator/mc13xxx-regulator-core.c if (min_uV <= rdev->desc->volt_table[0] && rdev 121 drivers/regulator/mc13xxx-regulator-core.c rdev->desc->volt_table[0] <= max_uV) { rdev 30 drivers/regulator/mc13xxx.h extern int mc13xxx_fixed_regulator_set_voltage(struct regulator_dev *rdev, rdev 151 drivers/regulator/mcp16502.c static int mcp16502_get_reg(struct regulator_dev *rdev, int opmode) rdev 153 drivers/regulator/mcp16502.c int reg = MCP16502_BASE(rdev_get_id(rdev)); rdev 176 drivers/regulator/mcp16502.c static unsigned int mcp16502_get_mode(struct regulator_dev *rdev) rdev 181 drivers/regulator/mcp16502.c reg = mcp16502_get_reg(rdev, MCP16502_OPMODE_ACTIVE); rdev 185 drivers/regulator/mcp16502.c ret = regmap_read(rdev->regmap, reg, &val); rdev 206 drivers/regulator/mcp16502.c static int _mcp16502_set_mode(struct regulator_dev *rdev, unsigned int mode, rdev 212 drivers/regulator/mcp16502.c reg = mcp16502_get_reg(rdev, op_mode); rdev 227 drivers/regulator/mcp16502.c reg = regmap_update_bits(rdev->regmap, reg, MCP16502_MODE, val); rdev 234 drivers/regulator/mcp16502.c static int mcp16502_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 236 drivers/regulator/mcp16502.c return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_ACTIVE); rdev 242 drivers/regulator/mcp16502.c static int mcp16502_get_status(struct regulator_dev *rdev) rdev 247 drivers/regulator/mcp16502.c ret = regmap_read(rdev->regmap, MCP16502_STAT_BASE(rdev_get_id(rdev)), rdev 267 drivers/regulator/mcp16502.c static int mcp16502_suspend_get_target_reg(struct regulator_dev *rdev) rdev 271 drivers/regulator/mcp16502.c return mcp16502_get_reg(rdev, MCP16502_OPMODE_LPM); rdev 274 drivers/regulator/mcp16502.c return mcp16502_get_reg(rdev, MCP16502_OPMODE_HIB); rdev 276 drivers/regulator/mcp16502.c dev_err(&rdev->dev, "invalid suspend target: %d\n", rdev 286 drivers/regulator/mcp16502.c static int mcp16502_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 288 drivers/regulator/mcp16502.c int sel = regulator_map_voltage_linear_range(rdev, uV, uV); rdev 289 drivers/regulator/mcp16502.c int reg = mcp16502_suspend_get_target_reg(rdev); rdev 297 drivers/regulator/mcp16502.c return regmap_update_bits(rdev->regmap, reg, MCP16502_VSEL, sel); rdev 303 drivers/regulator/mcp16502.c static int mcp16502_set_suspend_mode(struct regulator_dev *rdev, rdev 308 drivers/regulator/mcp16502.c return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_LPM); rdev 311 drivers/regulator/mcp16502.c return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_HIB); rdev 313 drivers/regulator/mcp16502.c dev_err(&rdev->dev, "invalid suspend target: %d\n", rdev 323 drivers/regulator/mcp16502.c static int mcp16502_set_suspend_enable(struct regulator_dev *rdev) rdev 325 drivers/regulator/mcp16502.c int reg = mcp16502_suspend_get_target_reg(rdev); rdev 330 drivers/regulator/mcp16502.c return regmap_update_bits(rdev->regmap, reg, MCP16502_EN, MCP16502_EN); rdev 336 drivers/regulator/mcp16502.c static int mcp16502_set_suspend_disable(struct regulator_dev *rdev) rdev 338 drivers/regulator/mcp16502.c int reg = mcp16502_suspend_get_target_reg(rdev); rdev 343 drivers/regulator/mcp16502.c return regmap_update_bits(rdev->regmap, reg, MCP16502_EN, 0); rdev 434 drivers/regulator/mcp16502.c struct regulator_dev *rdev; rdev 465 drivers/regulator/mcp16502.c rdev = devm_regulator_register(dev, &mcp16502_desc[i], &config); rdev 466 drivers/regulator/mcp16502.c if (IS_ERR(rdev)) { rdev 469 drivers/regulator/mcp16502.c mcp16502_desc[i].name, PTR_ERR(rdev)); rdev 470 drivers/regulator/mcp16502.c return PTR_ERR(rdev); rdev 92 drivers/regulator/mt6311-regulator.c struct regulator_dev *rdev; rdev 125 drivers/regulator/mt6311-regulator.c rdev = devm_regulator_register(&i2c->dev, rdev 127 drivers/regulator/mt6311-regulator.c if (IS_ERR(rdev)) { rdev 130 drivers/regulator/mt6311-regulator.c return PTR_ERR(rdev); rdev 157 drivers/regulator/mt6323-regulator.c static int mt6323_get_status(struct regulator_dev *rdev) rdev 161 drivers/regulator/mt6323-regulator.c struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); rdev 163 drivers/regulator/mt6323-regulator.c ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val); rdev 165 drivers/regulator/mt6323-regulator.c dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); rdev 172 drivers/regulator/mt6323-regulator.c static int mt6323_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 175 drivers/regulator/mt6323-regulator.c struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); rdev 178 drivers/regulator/mt6323-regulator.c dev_err(&rdev->dev, "regulator %s doesn't support set_mode\n", rdev 196 drivers/regulator/mt6323-regulator.c ret = regmap_update_bits(rdev->regmap, info->modeset_reg, rdev 202 drivers/regulator/mt6323-regulator.c static unsigned int mt6323_ldo_get_mode(struct regulator_dev *rdev) rdev 207 drivers/regulator/mt6323-regulator.c struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); rdev 210 drivers/regulator/mt6323-regulator.c dev_err(&rdev->dev, "regulator %s doesn't support get_mode\n", rdev 215 drivers/regulator/mt6323-regulator.c ret = regmap_read(rdev->regmap, info->modeset_reg, &val); rdev 373 drivers/regulator/mt6323-regulator.c struct regulator_dev *rdev; rdev 392 drivers/regulator/mt6323-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 394 drivers/regulator/mt6323-regulator.c if (IS_ERR(rdev)) { rdev 397 drivers/regulator/mt6323-regulator.c return PTR_ERR(rdev); rdev 253 drivers/regulator/mt6358-regulator.c static int mt6358_set_voltage_sel(struct regulator_dev *rdev, rdev 258 drivers/regulator/mt6358-regulator.c struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); rdev 263 drivers/regulator/mt6358-regulator.c ret = regmap_update_bits(rdev->regmap, info->desc.vsel_reg, rdev 270 drivers/regulator/mt6358-regulator.c static int mt6358_get_voltage_sel(struct regulator_dev *rdev) rdev 274 drivers/regulator/mt6358-regulator.c struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); rdev 277 drivers/regulator/mt6358-regulator.c ret = regmap_read(rdev->regmap, info->desc.vsel_reg, &selector); rdev 279 drivers/regulator/mt6358-regulator.c dev_info(&rdev->dev, rdev 295 drivers/regulator/mt6358-regulator.c static int mt6358_get_buck_voltage_sel(struct regulator_dev *rdev) rdev 298 drivers/regulator/mt6358-regulator.c struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); rdev 300 drivers/regulator/mt6358-regulator.c ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val); rdev 302 drivers/regulator/mt6358-regulator.c dev_err(&rdev->dev, rdev 313 drivers/regulator/mt6358-regulator.c static int mt6358_get_status(struct regulator_dev *rdev) rdev 317 drivers/regulator/mt6358-regulator.c struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); rdev 319 drivers/regulator/mt6358-regulator.c ret = regmap_read(rdev->regmap, info->status_reg, ®val); rdev 321 drivers/regulator/mt6358-regulator.c dev_info(&rdev->dev, "Failed to get enable reg: %d\n", ret); rdev 328 drivers/regulator/mt6358-regulator.c static int mt6358_regulator_set_mode(struct regulator_dev *rdev, rdev 331 drivers/regulator/mt6358-regulator.c struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); rdev 345 drivers/regulator/mt6358-regulator.c dev_dbg(&rdev->dev, "mt6358 buck set_mode %#x, %#x, %#x, %#x\n", rdev 351 drivers/regulator/mt6358-regulator.c return regmap_update_bits(rdev->regmap, info->modeset_reg, rdev 355 drivers/regulator/mt6358-regulator.c static unsigned int mt6358_regulator_get_mode(struct regulator_dev *rdev) rdev 357 drivers/regulator/mt6358-regulator.c struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); rdev 360 drivers/regulator/mt6358-regulator.c ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); rdev 362 drivers/regulator/mt6358-regulator.c dev_err(&rdev->dev, rdev 510 drivers/regulator/mt6358-regulator.c struct regulator_dev *rdev; rdev 518 drivers/regulator/mt6358-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 521 drivers/regulator/mt6358-regulator.c if (IS_ERR(rdev)) { rdev 524 drivers/regulator/mt6358-regulator.c return PTR_ERR(rdev); rdev 183 drivers/regulator/mt6380-regulator.c static int mt6380_regulator_set_mode(struct regulator_dev *rdev, rdev 187 drivers/regulator/mt6380-regulator.c struct mt6380_regulator_info *info = rdev_get_drvdata(rdev); rdev 202 drivers/regulator/mt6380-regulator.c ret = regmap_update_bits(rdev->regmap, info->modeset_reg, rdev 208 drivers/regulator/mt6380-regulator.c static unsigned int mt6380_regulator_get_mode(struct regulator_dev *rdev) rdev 213 drivers/regulator/mt6380-regulator.c struct mt6380_regulator_info *info = rdev_get_drvdata(rdev); rdev 215 drivers/regulator/mt6380-regulator.c ret = regmap_read(rdev->regmap, info->modeset_reg, &val); rdev 299 drivers/regulator/mt6380-regulator.c struct regulator_dev *rdev; rdev 306 drivers/regulator/mt6380-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 309 drivers/regulator/mt6380-regulator.c if (IS_ERR(rdev)) { rdev 312 drivers/regulator/mt6380-regulator.c return PTR_ERR(rdev); rdev 149 drivers/regulator/mt6397-regulator.c static int mt6397_regulator_set_mode(struct regulator_dev *rdev, rdev 152 drivers/regulator/mt6397-regulator.c struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); rdev 167 drivers/regulator/mt6397-regulator.c dev_dbg(&rdev->dev, "mt6397 buck set_mode %#x, %#x, %#x, %#x\n", rdev 172 drivers/regulator/mt6397-regulator.c ret = regmap_update_bits(rdev->regmap, info->modeset_reg, rdev 176 drivers/regulator/mt6397-regulator.c dev_err(&rdev->dev, rdev 184 drivers/regulator/mt6397-regulator.c static unsigned int mt6397_regulator_get_mode(struct regulator_dev *rdev) rdev 186 drivers/regulator/mt6397-regulator.c struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); rdev 189 drivers/regulator/mt6397-regulator.c ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); rdev 191 drivers/regulator/mt6397-regulator.c dev_err(&rdev->dev, rdev 206 drivers/regulator/mt6397-regulator.c static int mt6397_get_status(struct regulator_dev *rdev) rdev 210 drivers/regulator/mt6397-regulator.c struct mt6397_regulator_info *info = rdev_get_drvdata(rdev); rdev 212 drivers/regulator/mt6397-regulator.c ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val); rdev 214 drivers/regulator/mt6397-regulator.c dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); rdev 341 drivers/regulator/mt6397-regulator.c struct regulator_dev *rdev; rdev 370 drivers/regulator/mt6397-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 372 drivers/regulator/mt6397-regulator.c if (IS_ERR(rdev)) { rdev 375 drivers/regulator/mt6397-regulator.c return PTR_ERR(rdev); rdev 486 drivers/regulator/of_regulator.c int of_get_n_coupled(struct regulator_dev *rdev) rdev 488 drivers/regulator/of_regulator.c struct device_node *node = rdev->dev.of_node; rdev 545 drivers/regulator/of_regulator.c bool of_check_coupling_data(struct regulator_dev *rdev) rdev 547 drivers/regulator/of_regulator.c struct device_node *node = rdev->dev.of_node; rdev 548 drivers/regulator/of_regulator.c int n_phandles = of_get_n_coupled(rdev); rdev 556 drivers/regulator/of_regulator.c int max_spread = rdev->constraints->max_spread[i]; rdev 560 drivers/regulator/of_regulator.c dev_err(&rdev->dev, "max_spread value invalid\n"); rdev 575 drivers/regulator/of_regulator.c dev_err(&rdev->dev, "number of coupled reg phandles mismatch\n"); rdev 581 drivers/regulator/of_regulator.c dev_err(&rdev->dev, "missing 2-way linking for coupled regulators\n"); rdev 593 drivers/regulator/of_regulator.c dev_err(&rdev->dev, rdev 617 drivers/regulator/of_regulator.c struct regulator_dev *of_parse_coupled_regulator(struct regulator_dev *rdev, rdev 620 drivers/regulator/of_regulator.c struct device_node *node = rdev->dev.of_node; rdev 501 drivers/regulator/palmas-regulator.c static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev, rdev 504 drivers/regulator/palmas-regulator.c int id = rdev_get_id(rdev); rdev 505 drivers/regulator/palmas-regulator.c struct palmas_pmic *pmic = rdev_get_drvdata(rdev); rdev 897 drivers/regulator/palmas-regulator.c struct regulator_dev *rdev; rdev 981 drivers/regulator/palmas-regulator.c rdev = devm_regulator_register(pmic->dev, desc, &config); rdev 982 drivers/regulator/palmas-regulator.c if (IS_ERR(rdev)) { rdev 986 drivers/regulator/palmas-regulator.c return PTR_ERR(rdev); rdev 1015 drivers/regulator/palmas-regulator.c struct regulator_dev *rdev; rdev 1088 drivers/regulator/palmas-regulator.c rdev = devm_regulator_register(pmic->dev, desc, &config); rdev 1089 drivers/regulator/palmas-regulator.c if (IS_ERR(rdev)) { rdev 1093 drivers/regulator/palmas-regulator.c return PTR_ERR(rdev); rdev 1123 drivers/regulator/palmas-regulator.c struct regulator_dev *rdev; rdev 1273 drivers/regulator/palmas-regulator.c rdev = devm_regulator_register(pmic->dev, desc, &config); rdev 1274 drivers/regulator/palmas-regulator.c if (IS_ERR(rdev)) { rdev 1278 drivers/regulator/palmas-regulator.c return PTR_ERR(rdev); rdev 1293 drivers/regulator/palmas-regulator.c struct regulator_dev *rdev; rdev 1377 drivers/regulator/palmas-regulator.c rdev = devm_regulator_register(pmic->dev, desc, &config); rdev 1378 drivers/regulator/palmas-regulator.c if (IS_ERR(rdev)) { rdev 1382 drivers/regulator/palmas-regulator.c return PTR_ERR(rdev); rdev 145 drivers/regulator/pcap-regulator.c static int pcap_regulator_set_voltage_sel(struct regulator_dev *rdev, rdev 148 drivers/regulator/pcap-regulator.c struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; rdev 149 drivers/regulator/pcap-regulator.c void *pcap = rdev_get_drvdata(rdev); rdev 152 drivers/regulator/pcap-regulator.c if (rdev->desc->n_voltages == 1) rdev 156 drivers/regulator/pcap-regulator.c (rdev->desc->n_voltages - 1) << vreg->index, rdev 160 drivers/regulator/pcap-regulator.c static int pcap_regulator_get_voltage_sel(struct regulator_dev *rdev) rdev 162 drivers/regulator/pcap-regulator.c struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; rdev 163 drivers/regulator/pcap-regulator.c void *pcap = rdev_get_drvdata(rdev); rdev 166 drivers/regulator/pcap-regulator.c if (rdev->desc->n_voltages == 1) rdev 170 drivers/regulator/pcap-regulator.c tmp = ((tmp >> vreg->index) & (rdev->desc->n_voltages - 1)); rdev 174 drivers/regulator/pcap-regulator.c static int pcap_regulator_enable(struct regulator_dev *rdev) rdev 176 drivers/regulator/pcap-regulator.c struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; rdev 177 drivers/regulator/pcap-regulator.c void *pcap = rdev_get_drvdata(rdev); rdev 185 drivers/regulator/pcap-regulator.c static int pcap_regulator_disable(struct regulator_dev *rdev) rdev 187 drivers/regulator/pcap-regulator.c struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; rdev 188 drivers/regulator/pcap-regulator.c void *pcap = rdev_get_drvdata(rdev); rdev 196 drivers/regulator/pcap-regulator.c static int pcap_regulator_is_enabled(struct regulator_dev *rdev) rdev 198 drivers/regulator/pcap-regulator.c struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; rdev 199 drivers/regulator/pcap-regulator.c void *pcap = rdev_get_drvdata(rdev); rdev 237 drivers/regulator/pcap-regulator.c struct regulator_dev *rdev; rdev 245 drivers/regulator/pcap-regulator.c rdev = devm_regulator_register(&pdev->dev, &pcap_regulators[pdev->id], rdev 247 drivers/regulator/pcap-regulator.c if (IS_ERR(rdev)) rdev 248 drivers/regulator/pcap-regulator.c return PTR_ERR(rdev); rdev 250 drivers/regulator/pcap-regulator.c platform_set_drvdata(pdev, rdev); rdev 76 drivers/regulator/pcf50633-regulator.c struct regulator_dev *rdev; rdev 88 drivers/regulator/pcf50633-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[pdev->id], rdev 90 drivers/regulator/pcf50633-regulator.c if (IS_ERR(rdev)) rdev 91 drivers/regulator/pcf50633-regulator.c return PTR_ERR(rdev); rdev 93 drivers/regulator/pcf50633-regulator.c platform_set_drvdata(pdev, rdev); rdev 126 drivers/regulator/pfuze100-regulator.c static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 128 drivers/regulator/pfuze100-regulator.c struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev); rdev 129 drivers/regulator/pfuze100-regulator.c int id = rdev_get_id(rdev); rdev 155 drivers/regulator/pfuze100-regulator.c rdev->desc->vsel_reg + 4, rdev 52 drivers/regulator/pv88060-regulator.c struct regulator_dev *rdev[PV88060_MAX_REGULATORS]; rdev 68 drivers/regulator/pv88060-regulator.c static unsigned int pv88060_buck_get_mode(struct regulator_dev *rdev) rdev 70 drivers/regulator/pv88060-regulator.c struct pv88060_regulator *info = rdev_get_drvdata(rdev); rdev 74 drivers/regulator/pv88060-regulator.c ret = regmap_read(rdev->regmap, info->conf, &data); rdev 93 drivers/regulator/pv88060-regulator.c static int pv88060_buck_set_mode(struct regulator_dev *rdev, rdev 96 drivers/regulator/pv88060-regulator.c struct pv88060_regulator *info = rdev_get_drvdata(rdev); rdev 113 drivers/regulator/pv88060-regulator.c return regmap_update_bits(rdev->regmap, info->conf, rdev 236 drivers/regulator/pv88060-regulator.c if (chip->rdev[i] != NULL) { rdev 237 drivers/regulator/pv88060-regulator.c regulator_lock(chip->rdev[i]); rdev 238 drivers/regulator/pv88060-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 241 drivers/regulator/pv88060-regulator.c regulator_unlock(chip->rdev[i]); rdev 255 drivers/regulator/pv88060-regulator.c if (chip->rdev[i] != NULL) { rdev 256 drivers/regulator/pv88060-regulator.c regulator_lock(chip->rdev[i]); rdev 257 drivers/regulator/pv88060-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 260 drivers/regulator/pv88060-regulator.c regulator_unlock(chip->rdev[i]); rdev 357 drivers/regulator/pv88060-regulator.c chip->rdev[i] = devm_regulator_register(chip->dev, rdev 359 drivers/regulator/pv88060-regulator.c if (IS_ERR(chip->rdev[i])) { rdev 362 drivers/regulator/pv88060-regulator.c return PTR_ERR(chip->rdev[i]); rdev 46 drivers/regulator/pv88080-regulator.c struct regulator_dev *rdev[PV88080_MAX_REGULATORS]; rdev 209 drivers/regulator/pv88080-regulator.c static unsigned int pv88080_buck_get_mode(struct regulator_dev *rdev) rdev 211 drivers/regulator/pv88080-regulator.c struct pv88080_regulator *info = rdev_get_drvdata(rdev); rdev 215 drivers/regulator/pv88080-regulator.c ret = regmap_read(rdev->regmap, info->mode_reg, &data); rdev 236 drivers/regulator/pv88080-regulator.c static int pv88080_buck_set_mode(struct regulator_dev *rdev, rdev 239 drivers/regulator/pv88080-regulator.c struct pv88080_regulator *info = rdev_get_drvdata(rdev); rdev 256 drivers/regulator/pv88080-regulator.c return regmap_update_bits(rdev->regmap, info->mode_reg, rdev 337 drivers/regulator/pv88080-regulator.c if (chip->rdev[i] != NULL) { rdev 338 drivers/regulator/pv88080-regulator.c regulator_lock(chip->rdev[i]); rdev 339 drivers/regulator/pv88080-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 342 drivers/regulator/pv88080-regulator.c regulator_unlock(chip->rdev[i]); rdev 356 drivers/regulator/pv88080-regulator.c if (chip->rdev[i] != NULL) { rdev 357 drivers/regulator/pv88080-regulator.c regulator_lock(chip->rdev[i]); rdev 358 drivers/regulator/pv88080-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 361 drivers/regulator/pv88080-regulator.c regulator_unlock(chip->rdev[i]); rdev 522 drivers/regulator/pv88080-regulator.c chip->rdev[i] = devm_regulator_register(chip->dev, rdev 524 drivers/regulator/pv88080-regulator.c if (IS_ERR(chip->rdev[i])) { rdev 527 drivers/regulator/pv88080-regulator.c return PTR_ERR(chip->rdev[i]); rdev 545 drivers/regulator/pv88080-regulator.c chip->rdev[PV88080_ID_HVBUCK] = devm_regulator_register(chip->dev, rdev 547 drivers/regulator/pv88080-regulator.c if (IS_ERR(chip->rdev[PV88080_ID_HVBUCK])) { rdev 549 drivers/regulator/pv88080-regulator.c return PTR_ERR(chip->rdev[PV88080_ID_HVBUCK]); rdev 42 drivers/regulator/pv88090-regulator.c struct regulator_dev *rdev[PV88090_MAX_REGULATORS]; rdev 90 drivers/regulator/pv88090-regulator.c static unsigned int pv88090_buck_get_mode(struct regulator_dev *rdev) rdev 92 drivers/regulator/pv88090-regulator.c struct pv88090_regulator *info = rdev_get_drvdata(rdev); rdev 96 drivers/regulator/pv88090-regulator.c ret = regmap_read(rdev->regmap, info->conf, &data); rdev 115 drivers/regulator/pv88090-regulator.c static int pv88090_buck_set_mode(struct regulator_dev *rdev, rdev 118 drivers/regulator/pv88090-regulator.c struct pv88090_regulator *info = rdev_get_drvdata(rdev); rdev 135 drivers/regulator/pv88090-regulator.c return regmap_update_bits(rdev->regmap, info->conf, rdev 229 drivers/regulator/pv88090-regulator.c if (chip->rdev[i] != NULL) { rdev 230 drivers/regulator/pv88090-regulator.c regulator_lock(chip->rdev[i]); rdev 231 drivers/regulator/pv88090-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 234 drivers/regulator/pv88090-regulator.c regulator_unlock(chip->rdev[i]); rdev 248 drivers/regulator/pv88090-regulator.c if (chip->rdev[i] != NULL) { rdev 249 drivers/regulator/pv88090-regulator.c regulator_lock(chip->rdev[i]); rdev 250 drivers/regulator/pv88090-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 253 drivers/regulator/pv88090-regulator.c regulator_unlock(chip->rdev[i]); rdev 378 drivers/regulator/pv88090-regulator.c chip->rdev[i] = devm_regulator_register(chip->dev, rdev 380 drivers/regulator/pv88090-regulator.c if (IS_ERR(chip->rdev[i])) { rdev 383 drivers/regulator/pv88090-regulator.c return PTR_ERR(chip->rdev[i]); rdev 54 drivers/regulator/pwm-regulator.c static void pwm_regulator_init_state(struct regulator_dev *rdev) rdev 56 drivers/regulator/pwm-regulator.c struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); rdev 64 drivers/regulator/pwm-regulator.c for (i = 0; i < rdev->desc->n_voltages; i++) { rdev 72 drivers/regulator/pwm-regulator.c static int pwm_regulator_get_voltage_sel(struct regulator_dev *rdev) rdev 74 drivers/regulator/pwm-regulator.c struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); rdev 77 drivers/regulator/pwm-regulator.c pwm_regulator_init_state(rdev); rdev 82 drivers/regulator/pwm-regulator.c static int pwm_regulator_set_voltage_sel(struct regulator_dev *rdev, rdev 85 drivers/regulator/pwm-regulator.c struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); rdev 95 drivers/regulator/pwm-regulator.c dev_err(&rdev->dev, "Failed to configure PWM: %d\n", ret); rdev 104 drivers/regulator/pwm-regulator.c static int pwm_regulator_list_voltage(struct regulator_dev *rdev, rdev 107 drivers/regulator/pwm-regulator.c struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); rdev 109 drivers/regulator/pwm-regulator.c if (selector >= rdev->desc->n_voltages) rdev 145 drivers/regulator/pwm-regulator.c static int pwm_regulator_get_voltage(struct regulator_dev *rdev) rdev 147 drivers/regulator/pwm-regulator.c struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); rdev 151 drivers/regulator/pwm-regulator.c int min_uV = rdev->constraints->min_uV; rdev 152 drivers/regulator/pwm-regulator.c int max_uV = rdev->constraints->max_uV; rdev 180 drivers/regulator/pwm-regulator.c static int pwm_regulator_set_voltage(struct regulator_dev *rdev, rdev 184 drivers/regulator/pwm-regulator.c struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev); rdev 188 drivers/regulator/pwm-regulator.c int min_uV = rdev->constraints->min_uV; rdev 189 drivers/regulator/pwm-regulator.c int max_uV = rdev->constraints->max_uV; rdev 221 drivers/regulator/pwm-regulator.c dev_err(&rdev->dev, "Failed to configure PWM: %d\n", ret); rdev 175 drivers/regulator/qcom-rpmh-regulator.c static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, rdev 178 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 185 drivers/regulator/qcom-rpmh-regulator.c cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev, rdev 195 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, rdev 198 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 209 drivers/regulator/qcom-rpmh-regulator.c return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector, rdev 213 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev) rdev 215 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 220 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_is_enabled(struct regulator_dev *rdev) rdev 222 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 227 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev, rdev 230 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 239 drivers/regulator/qcom-rpmh-regulator.c ret = _rpmh_regulator_vrm_set_voltage_sel(rdev, rdev 252 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_enable(struct regulator_dev *rdev) rdev 254 drivers/regulator/qcom-rpmh-regulator.c return rpmh_regulator_set_enable_state(rdev, true); rdev 257 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_disable(struct regulator_dev *rdev) rdev 259 drivers/regulator/qcom-rpmh-regulator.c return rpmh_regulator_set_enable_state(rdev, false); rdev 285 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev, rdev 288 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 301 drivers/regulator/qcom-rpmh-regulator.c static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev) rdev 303 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 319 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_vrm_set_load(struct regulator_dev *rdev, int load_uA) rdev 321 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 329 drivers/regulator/qcom-rpmh-regulator.c return rpmh_regulator_vrm_set_mode(rdev, mode); rdev 332 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev, rdev 335 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 348 drivers/regulator/qcom-rpmh-regulator.c static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev, rdev 351 drivers/regulator/qcom-rpmh-regulator.c struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); rdev 421 drivers/regulator/qcom-rpmh-regulator.c struct regulator_dev *rdev; rdev 483 drivers/regulator/qcom-rpmh-regulator.c rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config); rdev 484 drivers/regulator/qcom-rpmh-regulator.c if (IS_ERR(rdev)) { rdev 485 drivers/regulator/qcom-rpmh-regulator.c ret = PTR_ERR(rdev); rdev 206 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_set_mV_sel(struct regulator_dev *rdev, rdev 209 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 218 drivers/regulator/qcom_rpm-regulator.c uV = regulator_list_voltage_linear_range(rdev, selector); rdev 233 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_set_uV_sel(struct regulator_dev *rdev, rdev 236 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 245 drivers/regulator/qcom_rpm-regulator.c uV = regulator_list_voltage_linear_range(rdev, selector); rdev 260 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_get_voltage(struct regulator_dev *rdev) rdev 262 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 267 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_mV_enable(struct regulator_dev *rdev) rdev 269 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 286 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_uV_enable(struct regulator_dev *rdev) rdev 288 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 305 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_switch_enable(struct regulator_dev *rdev) rdev 307 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 324 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_mV_disable(struct regulator_dev *rdev) rdev 326 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 343 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_uV_disable(struct regulator_dev *rdev) rdev 345 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 362 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_switch_disable(struct regulator_dev *rdev) rdev 364 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 381 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_is_enabled(struct regulator_dev *rdev) rdev 383 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 388 drivers/regulator/qcom_rpm-regulator.c static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) rdev 390 drivers/regulator/qcom_rpm-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 943 drivers/regulator/qcom_rpm-regulator.c struct regulator_dev *rdev; rdev 981 drivers/regulator/qcom_rpm-regulator.c rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config); rdev 982 drivers/regulator/qcom_rpm-regulator.c if (IS_ERR(rdev)) { rdev 984 drivers/regulator/qcom_rpm-regulator.c return PTR_ERR(rdev); rdev 85 drivers/regulator/qcom_smd-regulator.c static int rpm_reg_enable(struct regulator_dev *rdev) rdev 87 drivers/regulator/qcom_smd-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 100 drivers/regulator/qcom_smd-regulator.c static int rpm_reg_is_enabled(struct regulator_dev *rdev) rdev 102 drivers/regulator/qcom_smd-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 107 drivers/regulator/qcom_smd-regulator.c static int rpm_reg_disable(struct regulator_dev *rdev) rdev 109 drivers/regulator/qcom_smd-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 122 drivers/regulator/qcom_smd-regulator.c static int rpm_reg_get_voltage(struct regulator_dev *rdev) rdev 124 drivers/regulator/qcom_smd-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 129 drivers/regulator/qcom_smd-regulator.c static int rpm_reg_set_voltage(struct regulator_dev *rdev, rdev 134 drivers/regulator/qcom_smd-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 148 drivers/regulator/qcom_smd-regulator.c static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) rdev 150 drivers/regulator/qcom_smd-regulator.c struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); rdev 784 drivers/regulator/qcom_smd-regulator.c struct regulator_dev *rdev; rdev 821 drivers/regulator/qcom_smd-regulator.c rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config); rdev 822 drivers/regulator/qcom_smd-regulator.c if (IS_ERR(rdev)) { rdev 824 drivers/regulator/qcom_smd-regulator.c return PTR_ERR(rdev); rdev 553 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_vs_enable(struct regulator_dev *rdev) rdev 555 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 562 drivers/regulator/qcom_spmi-regulator.c return regulator_enable_regmap(rdev); rdev 565 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_vs_ocp(struct regulator_dev *rdev) rdev 567 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 766 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev, rdev 769 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 779 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector) rdev 781 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 795 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, rdev 798 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_ftsmps426_set_voltage(struct regulator_dev *rdev, rdev 801 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 805 drivers/regulator/qcom_spmi-regulator.c mV = spmi_regulator_common_list_voltage(rdev, selector) / 1000; rdev 812 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, rdev 815 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 818 drivers/regulator/qcom_spmi-regulator.c diff_uV = abs(spmi_regulator_common_list_voltage(rdev, new_selector) - rdev 819 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_common_list_voltage(rdev, old_selector)); rdev 824 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev) rdev 826 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 839 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_ftsmps426_get_voltage(struct regulator_dev *rdev) rdev 841 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 854 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev, rdev 857 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 862 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev, rdev 865 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 875 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev) rdev 877 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 888 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev, rdev 891 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 913 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev) rdev 915 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 931 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, rdev 934 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 955 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable) rdev 957 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 968 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable) rdev 970 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 980 drivers/regulator/qcom_spmi-regulator.c static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) rdev 982 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 999 drivers/regulator/qcom_spmi-regulator.c static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev) rdev 1001 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1017 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 1019 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1039 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 1041 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1063 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) rdev 1065 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1073 drivers/regulator/qcom_spmi-regulator.c return spmi_regulator_common_set_mode(rdev, mode); rdev 1076 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev) rdev 1078 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1085 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev) rdev 1087 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1094 drivers/regulator/qcom_spmi-regulator.c static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA) rdev 1096 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1241 drivers/regulator/qcom_spmi-regulator.c spmi_regulator_saw_set_voltage(struct regulator_dev *rdev, unsigned selector) rdev 1243 drivers/regulator/qcom_spmi-regulator.c struct spmi_regulator *vreg = rdev_get_drvdata(rdev); rdev 1252 drivers/regulator/qcom_spmi-regulator.c dev_dbg(&rdev->dev, "range_sel = %02X voltage_sel = %02X", \ rdev 1961 drivers/regulator/qcom_spmi-regulator.c struct regulator_dev *rdev; rdev 2057 drivers/regulator/qcom_spmi-regulator.c rdev = devm_regulator_register(dev, &vreg->desc, &config); rdev 2058 drivers/regulator/qcom_spmi-regulator.c if (IS_ERR(rdev)) { rdev 2060 drivers/regulator/qcom_spmi-regulator.c ret = PTR_ERR(rdev); rdev 37 drivers/regulator/rc5t583-regulator.c static int rc5t583_regulator_enable_time(struct regulator_dev *rdev) rdev 39 drivers/regulator/rc5t583-regulator.c struct rc5t583_regulator_info *reg_info = rdev_get_drvdata(rdev); rdev 40 drivers/regulator/rc5t583-regulator.c int vsel = regulator_get_voltage_sel_regmap(rdev); rdev 41 drivers/regulator/rc5t583-regulator.c int curr_uV = regulator_list_voltage_linear(rdev, vsel); rdev 105 drivers/regulator/rc5t583-regulator.c struct regulator_dev *rdev; rdev 139 drivers/regulator/rc5t583-regulator.c rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); rdev 140 drivers/regulator/rc5t583-regulator.c if (IS_ERR(rdev)) { rdev 143 drivers/regulator/rc5t583-regulator.c return PTR_ERR(rdev); rdev 218 drivers/regulator/rk808-regulator.c static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev) rdev 220 drivers/regulator/rk808-regulator.c struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); rdev 221 drivers/regulator/rk808-regulator.c int id = rdev_get_id(rdev); rdev 227 drivers/regulator/rk808-regulator.c return regulator_get_voltage_sel_regmap(rdev); rdev 229 drivers/regulator/rk808-regulator.c ret = regmap_read(rdev->regmap, rdev 230 drivers/regulator/rk808-regulator.c rdev->desc->vsel_reg + RK808_DVS_REG_OFFSET, rdev 235 drivers/regulator/rk808-regulator.c val &= rdev->desc->vsel_mask; rdev 236 drivers/regulator/rk808-regulator.c val >>= ffs(rdev->desc->vsel_mask) - 1; rdev 241 drivers/regulator/rk808-regulator.c static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev, rdev 245 drivers/regulator/rk808-regulator.c unsigned int old_sel, tmp, val, mask = rdev->desc->vsel_mask; rdev 247 drivers/regulator/rk808-regulator.c ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); rdev 272 drivers/regulator/rk808-regulator.c ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); rdev 278 drivers/regulator/rk808-regulator.c ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val); rdev 290 drivers/regulator/rk808-regulator.c static int rk808_buck1_2_set_voltage_sel(struct regulator_dev *rdev, rdev 293 drivers/regulator/rk808-regulator.c struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); rdev 294 drivers/regulator/rk808-regulator.c int id = rdev_get_id(rdev); rdev 296 drivers/regulator/rk808-regulator.c unsigned int reg = rdev->desc->vsel_reg; rdev 301 drivers/regulator/rk808-regulator.c return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel); rdev 306 drivers/regulator/rk808-regulator.c ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &old_sel); rdev 308 drivers/regulator/rk808-regulator.c ret = regmap_read(rdev->regmap, rdev 316 drivers/regulator/rk808-regulator.c sel <<= ffs(rdev->desc->vsel_mask) - 1; rdev 317 drivers/regulator/rk808-regulator.c sel |= old_sel & ~rdev->desc->vsel_mask; rdev 319 drivers/regulator/rk808-regulator.c ret = regmap_write(rdev->regmap, reg, sel); rdev 328 drivers/regulator/rk808-regulator.c static int rk808_buck1_2_set_voltage_time_sel(struct regulator_dev *rdev, rdev 332 drivers/regulator/rk808-regulator.c struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev); rdev 333 drivers/regulator/rk808-regulator.c int id = rdev_get_id(rdev); rdev 340 drivers/regulator/rk808-regulator.c return regulator_set_voltage_time_sel(rdev, old_selector, new_selector); rdev 343 drivers/regulator/rk808-regulator.c static int rk808_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 346 drivers/regulator/rk808-regulator.c unsigned int reg = rk808_buck_config_regs[rdev_get_id(rdev)]; rdev 362 drivers/regulator/rk808-regulator.c rdev->desc->name, ramp_delay); rdev 365 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 372 drivers/regulator/rk808-regulator.c static int rk817_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 375 drivers/regulator/rk808-regulator.c unsigned int reg = RK817_BUCK_CONFIG_REG(rdev_get_id(rdev)); rdev 390 drivers/regulator/rk808-regulator.c dev_warn(&rdev->dev, rdev 392 drivers/regulator/rk808-regulator.c rdev->desc->name, ramp_delay); rdev 395 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 399 drivers/regulator/rk808-regulator.c static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) rdev 402 drivers/regulator/rk808-regulator.c int sel = regulator_map_voltage_linear(rdev, uv, uv); rdev 407 drivers/regulator/rk808-regulator.c reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; rdev 409 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 410 drivers/regulator/rk808-regulator.c rdev->desc->vsel_mask, rdev 414 drivers/regulator/rk808-regulator.c static int rk817_set_suspend_voltage(struct regulator_dev *rdev, int uv) rdev 417 drivers/regulator/rk808-regulator.c int sel = regulator_map_voltage_linear(rdev, uv, uv); rdev 422 drivers/regulator/rk808-regulator.c reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; rdev 424 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 425 drivers/regulator/rk808-regulator.c rdev->desc->vsel_mask, rdev 429 drivers/regulator/rk808-regulator.c static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) rdev 432 drivers/regulator/rk808-regulator.c int sel = regulator_map_voltage_linear_range(rdev, uv, uv); rdev 437 drivers/regulator/rk808-regulator.c reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; rdev 439 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 440 drivers/regulator/rk808-regulator.c rdev->desc->vsel_mask, rdev 444 drivers/regulator/rk808-regulator.c static int rk805_set_suspend_enable(struct regulator_dev *rdev) rdev 448 drivers/regulator/rk808-regulator.c reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; rdev 450 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 451 drivers/regulator/rk808-regulator.c rdev->desc->enable_mask, rdev 452 drivers/regulator/rk808-regulator.c rdev->desc->enable_mask); rdev 455 drivers/regulator/rk808-regulator.c static int rk805_set_suspend_disable(struct regulator_dev *rdev) rdev 459 drivers/regulator/rk808-regulator.c reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; rdev 461 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 462 drivers/regulator/rk808-regulator.c rdev->desc->enable_mask, rdev 466 drivers/regulator/rk808-regulator.c static int rk808_set_suspend_enable(struct regulator_dev *rdev) rdev 470 drivers/regulator/rk808-regulator.c reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; rdev 472 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 473 drivers/regulator/rk808-regulator.c rdev->desc->enable_mask, rdev 477 drivers/regulator/rk808-regulator.c static int rk808_set_suspend_disable(struct regulator_dev *rdev) rdev 481 drivers/regulator/rk808-regulator.c reg = rdev->desc->enable_reg + RK808_SLP_SET_OFF_REG_OFFSET; rdev 483 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 484 drivers/regulator/rk808-regulator.c rdev->desc->enable_mask, rdev 485 drivers/regulator/rk808-regulator.c rdev->desc->enable_mask); rdev 488 drivers/regulator/rk808-regulator.c static int rk817_set_suspend_enable_ctrl(struct regulator_dev *rdev, rdev 492 drivers/regulator/rk808-regulator.c int id = rdev_get_id(rdev); rdev 512 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, msk, val); rdev 515 drivers/regulator/rk808-regulator.c static int rk817_set_suspend_enable(struct regulator_dev *rdev) rdev 517 drivers/regulator/rk808-regulator.c return rk817_set_suspend_enable_ctrl(rdev, 1); rdev 520 drivers/regulator/rk808-regulator.c static int rk817_set_suspend_disable(struct regulator_dev *rdev) rdev 522 drivers/regulator/rk808-regulator.c return rk817_set_suspend_enable_ctrl(rdev, 0); rdev 525 drivers/regulator/rk808-regulator.c static int rk8xx_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode) rdev 529 drivers/regulator/rk808-regulator.c reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; rdev 533 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 536 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, reg, rdev 539 drivers/regulator/rk808-regulator.c dev_err(&rdev->dev, "do not support this mode\n"); rdev 546 drivers/regulator/rk808-regulator.c static int rk8xx_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 550 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, rdev 553 drivers/regulator/rk808-regulator.c return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, rdev 556 drivers/regulator/rk808-regulator.c dev_err(&rdev->dev, "do not support this mode\n"); rdev 563 drivers/regulator/rk808-regulator.c static unsigned int rk8xx_get_mode(struct regulator_dev *rdev) rdev 568 drivers/regulator/rk808-regulator.c err = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); rdev 578 drivers/regulator/rk808-regulator.c static int rk8xx_is_enabled_wmsk_regmap(struct regulator_dev *rdev) rdev 583 drivers/regulator/rk808-regulator.c ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); rdev 588 drivers/regulator/rk808-regulator.c val |= (rdev->desc->enable_mask & 0xf0); rdev 589 drivers/regulator/rk808-regulator.c val &= rdev->desc->enable_mask; rdev 591 drivers/regulator/rk808-regulator.c if (rdev->desc->enable_is_inverted) { rdev 592 drivers/regulator/rk808-regulator.c if (rdev->desc->enable_val) rdev 593 drivers/regulator/rk808-regulator.c return val != rdev->desc->enable_val; rdev 596 drivers/regulator/rk808-regulator.c if (rdev->desc->enable_val) rdev 597 drivers/regulator/rk808-regulator.c return val == rdev->desc->enable_val; rdev 103 drivers/regulator/rn5t618-regulator.c struct regulator_dev *rdev; rdev 129 drivers/regulator/rn5t618-regulator.c rdev = devm_regulator_register(&pdev->dev, rdev 132 drivers/regulator/rn5t618-regulator.c if (IS_ERR(rdev)) { rdev 135 drivers/regulator/rn5t618-regulator.c return PTR_ERR(rdev); rdev 48 drivers/regulator/s2mpa01.c static int s2mpa01_regulator_set_voltage_time_sel(struct regulator_dev *rdev, rdev 52 drivers/regulator/s2mpa01.c struct s2mpa01_info *s2mpa01 = rdev_get_drvdata(rdev); rdev 56 drivers/regulator/s2mpa01.c switch (rdev_get_id(rdev)) { rdev 82 drivers/regulator/s2mpa01.c ramp_delay = rdev->desc->ramp_delay; rdev 84 drivers/regulator/s2mpa01.c old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector); rdev 85 drivers/regulator/s2mpa01.c new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector); rdev 90 drivers/regulator/s2mpa01.c static int s2mpa01_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 92 drivers/regulator/s2mpa01.c struct s2mpa01_info *s2mpa01 = rdev_get_drvdata(rdev); rdev 97 drivers/regulator/s2mpa01.c switch (rdev_get_id(rdev)) { rdev 187 drivers/regulator/s2mpa01.c if (rdev_get_id(rdev) >= S2MPA01_BUCK1 && rdev 188 drivers/regulator/s2mpa01.c rdev_get_id(rdev) <= S2MPA01_BUCK4) { rdev 189 drivers/regulator/s2mpa01.c ret = regmap_update_bits(rdev->regmap, S2MPA01_REG_RAMP1, rdev 192 drivers/regulator/s2mpa01.c dev_err(&rdev->dev, "failed to enable ramp rate\n"); rdev 199 drivers/regulator/s2mpa01.c return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift, rdev 203 drivers/regulator/s2mpa01.c return regmap_update_bits(rdev->regmap, S2MPA01_REG_RAMP1, rdev 357 drivers/regulator/s2mpa01.c struct regulator_dev *rdev; rdev 362 drivers/regulator/s2mpa01.c rdev = devm_regulator_register(&pdev->dev, rdev 364 drivers/regulator/s2mpa01.c if (IS_ERR(rdev)) { rdev 367 drivers/regulator/s2mpa01.c return PTR_ERR(rdev); rdev 68 drivers/regulator/s2mps11.c static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev, rdev 72 drivers/regulator/s2mps11.c struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); rdev 73 drivers/regulator/s2mps11.c int rdev_id = rdev_get_id(rdev); rdev 102 drivers/regulator/s2mps11.c ramp_delay = rdev->desc->ramp_delay; rdev 104 drivers/regulator/s2mps11.c old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector); rdev 105 drivers/regulator/s2mps11.c new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector); rdev 110 drivers/regulator/s2mps11.c static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 112 drivers/regulator/s2mps11.c struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); rdev 115 drivers/regulator/s2mps11.c int rdev_id = rdev_get_id(rdev); rdev 210 drivers/regulator/s2mps11.c ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, rdev 213 drivers/regulator/s2mps11.c dev_err(&rdev->dev, "failed to enable ramp rate\n"); rdev 220 drivers/regulator/s2mps11.c return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift, rdev 224 drivers/regulator/s2mps11.c return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, rdev 228 drivers/regulator/s2mps11.c static int s2mps11_regulator_enable(struct regulator_dev *rdev) rdev 230 drivers/regulator/s2mps11.c struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); rdev 231 drivers/regulator/s2mps11.c int rdev_id = rdev_get_id(rdev); rdev 239 drivers/regulator/s2mps11.c val = rdev->desc->enable_mask; rdev 248 drivers/regulator/s2mps11.c val = rdev->desc->enable_mask; rdev 254 drivers/regulator/s2mps11.c val = rdev->desc->enable_mask; rdev 260 drivers/regulator/s2mps11.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 261 drivers/regulator/s2mps11.c rdev->desc->enable_mask, val); rdev 264 drivers/regulator/s2mps11.c static int s2mps11_regulator_set_suspend_disable(struct regulator_dev *rdev) rdev 268 drivers/regulator/s2mps11.c struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); rdev 269 drivers/regulator/s2mps11.c int rdev_id = rdev_get_id(rdev); rdev 313 drivers/regulator/s2mps11.c ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); rdev 325 drivers/regulator/s2mps11.c if (!(val & rdev->desc->enable_mask)) rdev 328 drivers/regulator/s2mps11.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 329 drivers/regulator/s2mps11.c rdev->desc->enable_mask, state); rdev 827 drivers/regulator/s2mps11.c struct regulator_dev *rdev) rdev 829 drivers/regulator/s2mps11.c return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 830 drivers/regulator/s2mps11.c rdev->desc->enable_mask, S2MPS14_ENABLE_EXT_CONTROL); rdev 888 drivers/regulator/s2mps11.c static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) rdev 891 drivers/regulator/s2mps11.c int rdev_id = rdev_get_id(rdev); rdev 912 drivers/regulator/s2mps11.c return regmap_update_bits(rdev->regmap, ramp_reg, rdev 292 drivers/regulator/s5m8767.c static int s5m8767_set_voltage_sel(struct regulator_dev *rdev, rdev 295 drivers/regulator/s5m8767.c struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); rdev 296 drivers/regulator/s5m8767.c int reg_id = rdev_get_id(rdev); rdev 333 drivers/regulator/s5m8767.c return regulator_set_voltage_sel_regmap(rdev, selector); rdev 337 drivers/regulator/s5m8767.c static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev, rdev 341 drivers/regulator/s5m8767.c struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); rdev 344 drivers/regulator/s5m8767.c return DIV_ROUND_UP(rdev->desc->uV_step * (new_sel - old_sel), rdev 465 drivers/regulator/s5m8767.c struct regulator_dev *rdev) rdev 467 drivers/regulator/s5m8767.c int id = rdev_get_id(rdev); rdev 925 drivers/regulator/s5m8767.c struct regulator_dev *rdev; rdev 968 drivers/regulator/s5m8767.c rdev = devm_regulator_register(&pdev->dev, ®ulators[id], rdev 970 drivers/regulator/s5m8767.c if (IS_ERR(rdev)) { rdev 971 drivers/regulator/s5m8767.c ret = PTR_ERR(rdev); rdev 978 drivers/regulator/s5m8767.c ret = s5m8767_enable_ext_control(s5m8767, rdev); rdev 982 drivers/regulator/s5m8767.c rdev->desc->name, ret); rdev 215 drivers/regulator/sc2731-regulator.c struct regulator_dev *rdev; rdev 233 drivers/regulator/sc2731-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i], rdev 235 drivers/regulator/sc2731-regulator.c if (IS_ERR(rdev)) { rdev 238 drivers/regulator/sc2731-regulator.c return PTR_ERR(rdev); rdev 61 drivers/regulator/sky81452-regulator.c struct regulator_dev *rdev; rdev 68 drivers/regulator/sky81452-regulator.c rdev = devm_regulator_register(dev, &sky81452_reg, &config); rdev 69 drivers/regulator/sky81452-regulator.c if (IS_ERR(rdev)) { rdev 70 drivers/regulator/sky81452-regulator.c dev_err(dev, "failed to register. err=%ld\n", PTR_ERR(rdev)); rdev 71 drivers/regulator/sky81452-regulator.c return PTR_ERR(rdev); rdev 74 drivers/regulator/sky81452-regulator.c platform_set_drvdata(pdev, rdev); rdev 42 drivers/regulator/slg51000-regulator.c struct regulator_dev *rdev[SLG51000_MAX_REGULATORS]; rdev 335 drivers/regulator/slg51000-regulator.c chip->rdev[id] = devm_regulator_register(chip->dev, rdesc, rdev 337 drivers/regulator/slg51000-regulator.c if (IS_ERR(chip->rdev[id])) { rdev 338 drivers/regulator/slg51000-regulator.c ret = PTR_ERR(chip->rdev[id]); rdev 392 drivers/regulator/slg51000-regulator.c regulator_lock(chip->rdev[i]); rdev 393 drivers/regulator/slg51000-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 395 drivers/regulator/slg51000-regulator.c regulator_unlock(chip->rdev[i]); rdev 409 drivers/regulator/slg51000-regulator.c regulator_lock(chip->rdev[i]); rdev 410 drivers/regulator/slg51000-regulator.c regulator_notifier_call_chain(chip->rdev[i], rdev 412 drivers/regulator/slg51000-regulator.c regulator_unlock(chip->rdev[i]); rdev 41 drivers/regulator/stm32-booster.c static int stm32mp1_booster_enable(struct regulator_dev *rdev) rdev 43 drivers/regulator/stm32-booster.c return regmap_write(rdev->regmap, STM32MP1_SYSCFG_PMCSETR, rdev 47 drivers/regulator/stm32-booster.c static int stm32mp1_booster_disable(struct regulator_dev *rdev) rdev 49 drivers/regulator/stm32-booster.c return regmap_write(rdev->regmap, STM32MP1_SYSCFG_PMCCLRR, rdev 78 drivers/regulator/stm32-booster.c struct regulator_dev *rdev; rdev 94 drivers/regulator/stm32-booster.c rdev = devm_regulator_register(dev, desc, &config); rdev 95 drivers/regulator/stm32-booster.c if (IS_ERR(rdev)) { rdev 96 drivers/regulator/stm32-booster.c ret = PTR_ERR(rdev); rdev 46 drivers/regulator/stm32-pwr.c static int stm32_pwr_reg_is_ready(struct regulator_dev *rdev) rdev 48 drivers/regulator/stm32-pwr.c struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); rdev 56 drivers/regulator/stm32-pwr.c static int stm32_pwr_reg_is_enabled(struct regulator_dev *rdev) rdev 58 drivers/regulator/stm32-pwr.c struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); rdev 63 drivers/regulator/stm32-pwr.c return (val & rdev->desc->enable_mask); rdev 66 drivers/regulator/stm32-pwr.c static int stm32_pwr_reg_enable(struct regulator_dev *rdev) rdev 68 drivers/regulator/stm32-pwr.c struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); rdev 73 drivers/regulator/stm32-pwr.c val |= rdev->desc->enable_mask; rdev 77 drivers/regulator/stm32-pwr.c ret = readx_poll_timeout(stm32_pwr_reg_is_ready, rdev, val, val, rdev 80 drivers/regulator/stm32-pwr.c dev_err(&rdev->dev, "regulator enable timed out!\n"); rdev 85 drivers/regulator/stm32-pwr.c static int stm32_pwr_reg_disable(struct regulator_dev *rdev) rdev 87 drivers/regulator/stm32-pwr.c struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev); rdev 92 drivers/regulator/stm32-pwr.c val &= ~rdev->desc->enable_mask; rdev 96 drivers/regulator/stm32-pwr.c ret = readx_poll_timeout(stm32_pwr_reg_is_ready, rdev, val, !val, rdev 99 drivers/regulator/stm32-pwr.c dev_err(&rdev->dev, "regulator disable timed out!\n"); rdev 135 drivers/regulator/stm32-pwr.c struct regulator_dev *rdev; rdev 156 drivers/regulator/stm32-pwr.c rdev = devm_regulator_register(&pdev->dev, rdev 159 drivers/regulator/stm32-pwr.c if (IS_ERR(rdev)) { rdev 160 drivers/regulator/stm32-pwr.c ret = PTR_ERR(rdev); rdev 41 drivers/regulator/stm32-vrefbuf.c static int stm32_vrefbuf_enable(struct regulator_dev *rdev) rdev 43 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 66 drivers/regulator/stm32-vrefbuf.c dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n"); rdev 78 drivers/regulator/stm32-vrefbuf.c static int stm32_vrefbuf_disable(struct regulator_dev *rdev) rdev 80 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 100 drivers/regulator/stm32-vrefbuf.c static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev) rdev 102 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 119 drivers/regulator/stm32-vrefbuf.c static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev, rdev 122 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 142 drivers/regulator/stm32-vrefbuf.c static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev) rdev 144 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 188 drivers/regulator/stm32-vrefbuf.c struct regulator_dev *rdev; rdev 225 drivers/regulator/stm32-vrefbuf.c rdev = regulator_register(&stm32_vrefbuf_regu, &config); rdev 226 drivers/regulator/stm32-vrefbuf.c if (IS_ERR(rdev)) { rdev 227 drivers/regulator/stm32-vrefbuf.c ret = PTR_ERR(rdev); rdev 231 drivers/regulator/stm32-vrefbuf.c platform_set_drvdata(pdev, rdev); rdev 250 drivers/regulator/stm32-vrefbuf.c struct regulator_dev *rdev = platform_get_drvdata(pdev); rdev 251 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 254 drivers/regulator/stm32-vrefbuf.c regulator_unregister(rdev); rdev 265 drivers/regulator/stm32-vrefbuf.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 266 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 275 drivers/regulator/stm32-vrefbuf.c struct regulator_dev *rdev = dev_get_drvdata(dev); rdev 276 drivers/regulator/stm32-vrefbuf.c struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); rdev 33 drivers/regulator/stpmic1_regulator.c static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode); rdev 34 drivers/regulator/stpmic1_regulator.c static unsigned int stpmic1_get_mode(struct regulator_dev *rdev); rdev 35 drivers/regulator/stpmic1_regulator.c static int stpmic1_set_icc(struct regulator_dev *rdev); rdev 455 drivers/regulator/stpmic1_regulator.c static unsigned int stpmic1_get_mode(struct regulator_dev *rdev) rdev 458 drivers/regulator/stpmic1_regulator.c struct regmap *regmap = rdev_get_regmap(rdev); rdev 460 drivers/regulator/stpmic1_regulator.c regmap_read(regmap, rdev->desc->enable_reg, &value); rdev 468 drivers/regulator/stpmic1_regulator.c static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 471 drivers/regulator/stpmic1_regulator.c struct regmap *regmap = rdev_get_regmap(rdev); rdev 484 drivers/regulator/stpmic1_regulator.c return regmap_update_bits(regmap, rdev->desc->enable_reg, rdev 488 drivers/regulator/stpmic1_regulator.c static int stpmic1_set_icc(struct regulator_dev *rdev) rdev 490 drivers/regulator/stpmic1_regulator.c struct stpmic1_regulator_cfg *cfg = rdev_get_drvdata(rdev); rdev 491 drivers/regulator/stpmic1_regulator.c struct regmap *regmap = rdev_get_regmap(rdev); rdev 500 drivers/regulator/stpmic1_regulator.c struct regulator_dev *rdev = (struct regulator_dev *)data; rdev 502 drivers/regulator/stpmic1_regulator.c regulator_lock(rdev); rdev 505 drivers/regulator/stpmic1_regulator.c regulator_notifier_call_chain(rdev, rdev 509 drivers/regulator/stpmic1_regulator.c regulator_unlock(rdev); rdev 542 drivers/regulator/stpmic1_regulator.c struct regulator_dev *rdev; rdev 553 drivers/regulator/stpmic1_regulator.c rdev = devm_regulator_register(&pdev->dev, &cfg->desc, &config); rdev 554 drivers/regulator/stpmic1_regulator.c if (IS_ERR(rdev)) { rdev 557 drivers/regulator/stpmic1_regulator.c return PTR_ERR(rdev); rdev 580 drivers/regulator/stpmic1_regulator.c pdev->name, rdev); rdev 59 drivers/regulator/stw481x-vmmc.c struct regulator_dev *rdev; rdev 79 drivers/regulator/stw481x-vmmc.c rdev = devm_regulator_register(&pdev->dev, &vmmc_regulator, &config); rdev 80 drivers/regulator/stw481x-vmmc.c if (IS_ERR(rdev)) { rdev 83 drivers/regulator/stw481x-vmmc.c return PTR_ERR(rdev); rdev 68 drivers/regulator/sy8106a-regulator.c struct regulator_dev *rdev; rdev 117 drivers/regulator/sy8106a-regulator.c rdev = devm_regulator_register(&i2c->dev, &sy8106a_reg, &config); rdev 118 drivers/regulator/sy8106a-regulator.c if (IS_ERR(rdev)) { rdev 119 drivers/regulator/sy8106a-regulator.c error = PTR_ERR(rdev); rdev 37 drivers/regulator/sy8824x.c static int sy8824_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 39 drivers/regulator/sy8824x.c struct sy8824_device_info *di = rdev_get_drvdata(rdev); rdev 44 drivers/regulator/sy8824x.c regmap_update_bits(rdev->regmap, cfg->mode_reg, rdev 48 drivers/regulator/sy8824x.c regmap_update_bits(rdev->regmap, cfg->mode_reg, rdev 57 drivers/regulator/sy8824x.c static unsigned int sy8824_get_mode(struct regulator_dev *rdev) rdev 59 drivers/regulator/sy8824x.c struct sy8824_device_info *di = rdev_get_drvdata(rdev); rdev 64 drivers/regulator/sy8824x.c ret = regmap_read(rdev->regmap, cfg->mode_reg, &val); rdev 91 drivers/regulator/sy8824x.c struct regulator_dev *rdev; rdev 106 drivers/regulator/sy8824x.c rdev = devm_regulator_register(di->dev, &di->desc, config); rdev 107 drivers/regulator/sy8824x.c return PTR_ERR_OR_ZERO(rdev); rdev 247 drivers/regulator/ti-abb-regulator.c static int ti_abb_set_opp(struct regulator_dev *rdev, struct ti_abb *abb, rdev 251 drivers/regulator/ti-abb-regulator.c struct device *dev = &rdev->dev; rdev 312 drivers/regulator/ti-abb-regulator.c static int ti_abb_set_voltage_sel(struct regulator_dev *rdev, unsigned sel) rdev 314 drivers/regulator/ti-abb-regulator.c const struct regulator_desc *desc = rdev->desc; rdev 315 drivers/regulator/ti-abb-regulator.c struct ti_abb *abb = rdev_get_drvdata(rdev); rdev 316 drivers/regulator/ti-abb-regulator.c struct device *dev = &rdev->dev; rdev 354 drivers/regulator/ti-abb-regulator.c ret = ti_abb_set_opp(rdev, abb, info); rdev 373 drivers/regulator/ti-abb-regulator.c static int ti_abb_get_voltage_sel(struct regulator_dev *rdev) rdev 375 drivers/regulator/ti-abb-regulator.c const struct regulator_desc *desc = rdev->desc; rdev 376 drivers/regulator/ti-abb-regulator.c struct ti_abb *abb = rdev_get_drvdata(rdev); rdev 377 drivers/regulator/ti-abb-regulator.c struct device *dev = &rdev->dev; rdev 693 drivers/regulator/ti-abb-regulator.c struct regulator_dev *rdev = NULL; rdev 864 drivers/regulator/ti-abb-regulator.c rdev = devm_regulator_register(dev, desc, &config); rdev 865 drivers/regulator/ti-abb-regulator.c if (IS_ERR(rdev)) { rdev 866 drivers/regulator/ti-abb-regulator.c ret = PTR_ERR(rdev); rdev 871 drivers/regulator/ti-abb-regulator.c platform_set_drvdata(pdev, rdev); rdev 89 drivers/regulator/tps51632-regulator.c struct regulator_dev *rdev; rdev 93 drivers/regulator/tps51632-regulator.c static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev, rdev 96 drivers/regulator/tps51632-regulator.c struct tps51632_chip *tps = rdev_get_drvdata(rdev); rdev 267 drivers/regulator/tps51632-regulator.c struct regulator_dev *rdev; rdev 348 drivers/regulator/tps51632-regulator.c rdev = devm_regulator_register(&client->dev, &tps->desc, &config); rdev 349 drivers/regulator/tps51632-regulator.c if (IS_ERR(rdev)) { rdev 351 drivers/regulator/tps51632-regulator.c return PTR_ERR(rdev); rdev 354 drivers/regulator/tps51632-regulator.c tps->rdev = rdev; rdev 66 drivers/regulator/tps62360-regulator.c struct regulator_dev *rdev; rdev 175 drivers/regulator/tps62360-regulator.c static int tps62360_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 177 drivers/regulator/tps62360-regulator.c struct tps62360_chip *tps = rdev_get_drvdata(rdev); rdev 220 drivers/regulator/tps62360-regulator.c static unsigned int tps62360_get_mode(struct regulator_dev *rdev) rdev 222 drivers/regulator/tps62360-regulator.c struct tps62360_chip *tps = rdev_get_drvdata(rdev); rdev 347 drivers/regulator/tps62360-regulator.c struct regulator_dev *rdev; rdev 477 drivers/regulator/tps62360-regulator.c rdev = devm_regulator_register(&client->dev, &tps->desc, &config); rdev 478 drivers/regulator/tps62360-regulator.c if (IS_ERR(rdev)) { rdev 482 drivers/regulator/tps62360-regulator.c return PTR_ERR(rdev); rdev 485 drivers/regulator/tps62360-regulator.c tps->rdev = rdev; rdev 165 drivers/regulator/tps65023-regulator.c struct regulator_dev *rdev[TPS65023_NUM_REGULATOR]; rdev 301 drivers/regulator/tps65023-regulator.c tps->rdev[i] = devm_regulator_register(&client->dev, rdev 303 drivers/regulator/tps65023-regulator.c if (IS_ERR(tps->rdev[i])) { rdev 306 drivers/regulator/tps65023-regulator.c return PTR_ERR(tps->rdev[i]); rdev 383 drivers/regulator/tps6507x-regulator.c struct regulator_dev *rdev; rdev 430 drivers/regulator/tps6507x-regulator.c rdev = devm_regulator_register(&pdev->dev, &tps->desc[i], rdev 432 drivers/regulator/tps6507x-regulator.c if (IS_ERR(rdev)) { rdev 436 drivers/regulator/tps6507x-regulator.c return PTR_ERR(rdev); rdev 214 drivers/regulator/tps65086-regulator.c struct regulator_dev *rdev; rdev 225 drivers/regulator/tps65086-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i].desc, rdev 227 drivers/regulator/tps65086-regulator.c if (IS_ERR(rdev)) { rdev 230 drivers/regulator/tps65086-regulator.c return PTR_ERR(rdev); rdev 45 drivers/regulator/tps65090-regulator.c struct regulator_dev *rdev; rdev 65 drivers/regulator/tps65090-regulator.c struct regulator_dev *rdev) rdev 69 drivers/regulator/tps65090-regulator.c ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 73 drivers/regulator/tps65090-regulator.c dev_err(&rdev->dev, "Error updating overcurrent wait %#x\n", rdev 74 drivers/regulator/tps65090-regulator.c rdev->desc->enable_reg); rdev 88 drivers/regulator/tps65090-regulator.c static int tps65090_try_enable_fet(struct regulator_dev *rdev) rdev 93 drivers/regulator/tps65090-regulator.c ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 94 drivers/regulator/tps65090-regulator.c rdev->desc->enable_mask, rdev 95 drivers/regulator/tps65090-regulator.c rdev->desc->enable_mask); rdev 97 drivers/regulator/tps65090-regulator.c dev_err(&rdev->dev, "Error in updating reg %#x\n", rdev 98 drivers/regulator/tps65090-regulator.c rdev->desc->enable_reg); rdev 103 drivers/regulator/tps65090-regulator.c ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, rdev 133 drivers/regulator/tps65090-regulator.c static int tps65090_fet_enable(struct regulator_dev *rdev) rdev 143 drivers/regulator/tps65090-regulator.c ret = tps65090_try_enable_fet(rdev); rdev 150 drivers/regulator/tps65090-regulator.c ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, rdev 151 drivers/regulator/tps65090-regulator.c rdev->desc->enable_mask, 0); rdev 159 drivers/regulator/tps65090-regulator.c dev_warn(&rdev->dev, "reg %#x enable ok after %d tries\n", rdev 160 drivers/regulator/tps65090-regulator.c rdev->desc->enable_reg, tries); rdev 164 drivers/regulator/tps65090-regulator.c dev_warn(&rdev->dev, "reg %#x enable failed\n", rdev->desc->enable_reg); rdev 406 drivers/regulator/tps65090-regulator.c struct regulator_dev *rdev; rdev 480 drivers/regulator/tps65090-regulator.c rdev = devm_regulator_register(&pdev->dev, ri->desc, &config); rdev 481 drivers/regulator/tps65090-regulator.c if (IS_ERR(rdev)) { rdev 484 drivers/regulator/tps65090-regulator.c return PTR_ERR(rdev); rdev 486 drivers/regulator/tps65090-regulator.c ri->rdev = rdev; rdev 489 drivers/regulator/tps65090-regulator.c ret = tps65090_reg_set_overcurrent_wait(ri, rdev); rdev 61 drivers/regulator/tps65132-regulator.c static int tps65132_regulator_enable(struct regulator_dev *rdev) rdev 63 drivers/regulator/tps65132-regulator.c struct tps65132_regulator *tps = rdev_get_drvdata(rdev); rdev 64 drivers/regulator/tps65132-regulator.c int id = rdev_get_id(rdev); rdev 74 drivers/regulator/tps65132-regulator.c if (rdev->constraints->active_discharge == rdev 76 drivers/regulator/tps65132-regulator.c ret = regulator_set_active_discharge_regmap(rdev, false); rdev 87 drivers/regulator/tps65132-regulator.c static int tps65132_regulator_disable(struct regulator_dev *rdev) rdev 89 drivers/regulator/tps65132-regulator.c struct tps65132_regulator *tps = rdev_get_drvdata(rdev); rdev 90 drivers/regulator/tps65132-regulator.c int id = rdev_get_id(rdev); rdev 108 drivers/regulator/tps65132-regulator.c static int tps65132_regulator_is_enabled(struct regulator_dev *rdev) rdev 110 drivers/regulator/tps65132-regulator.c struct tps65132_regulator *tps = rdev_get_drvdata(rdev); rdev 111 drivers/regulator/tps65132-regulator.c int id = rdev_get_id(rdev); rdev 225 drivers/regulator/tps65132-regulator.c struct regulator_dev *rdev; rdev 250 drivers/regulator/tps65132-regulator.c rdev = devm_regulator_register(dev, &tps_regs_desc[id], rdev 252 drivers/regulator/tps65132-regulator.c if (IS_ERR(rdev)) { rdev 253 drivers/regulator/tps65132-regulator.c ret = PTR_ERR(rdev); rdev 225 drivers/regulator/tps65217-regulator.c struct regulator_dev *rdev; rdev 247 drivers/regulator/tps65217-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i], rdev 249 drivers/regulator/tps65217-regulator.c if (IS_ERR(rdev)) { rdev 252 drivers/regulator/tps65217-regulator.c return PTR_ERR(rdev); rdev 315 drivers/regulator/tps65218-regulator.c struct regulator_dev *rdev; rdev 333 drivers/regulator/tps65218-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i], rdev 335 drivers/regulator/tps65218-regulator.c if (IS_ERR(rdev)) { rdev 338 drivers/regulator/tps65218-regulator.c return PTR_ERR(rdev); rdev 456 drivers/regulator/tps6524x-regulator.c static int set_voltage_sel(struct regulator_dev *rdev, unsigned selector) rdev 461 drivers/regulator/tps6524x-regulator.c hw = rdev_get_drvdata(rdev); rdev 462 drivers/regulator/tps6524x-regulator.c info = &supply_info[rdev_get_id(rdev)]; rdev 464 drivers/regulator/tps6524x-regulator.c if (rdev->desc->n_voltages == 1) rdev 470 drivers/regulator/tps6524x-regulator.c static int get_voltage_sel(struct regulator_dev *rdev) rdev 476 drivers/regulator/tps6524x-regulator.c hw = rdev_get_drvdata(rdev); rdev 477 drivers/regulator/tps6524x-regulator.c info = &supply_info[rdev_get_id(rdev)]; rdev 479 drivers/regulator/tps6524x-regulator.c if (rdev->desc->n_voltages == 1) rdev 491 drivers/regulator/tps6524x-regulator.c static int set_current_limit(struct regulator_dev *rdev, int min_uA, rdev 498 drivers/regulator/tps6524x-regulator.c hw = rdev_get_drvdata(rdev); rdev 499 drivers/regulator/tps6524x-regulator.c info = &supply_info[rdev_get_id(rdev)]; rdev 513 drivers/regulator/tps6524x-regulator.c static int get_current_limit(struct regulator_dev *rdev) rdev 519 drivers/regulator/tps6524x-regulator.c hw = rdev_get_drvdata(rdev); rdev 520 drivers/regulator/tps6524x-regulator.c info = &supply_info[rdev_get_id(rdev)]; rdev 534 drivers/regulator/tps6524x-regulator.c static int enable_supply(struct regulator_dev *rdev) rdev 539 drivers/regulator/tps6524x-regulator.c hw = rdev_get_drvdata(rdev); rdev 540 drivers/regulator/tps6524x-regulator.c info = &supply_info[rdev_get_id(rdev)]; rdev 545 drivers/regulator/tps6524x-regulator.c static int disable_supply(struct regulator_dev *rdev) rdev 550 drivers/regulator/tps6524x-regulator.c hw = rdev_get_drvdata(rdev); rdev 551 drivers/regulator/tps6524x-regulator.c info = &supply_info[rdev_get_id(rdev)]; rdev 556 drivers/regulator/tps6524x-regulator.c static int is_supply_enabled(struct regulator_dev *rdev) rdev 561 drivers/regulator/tps6524x-regulator.c hw = rdev_get_drvdata(rdev); rdev 562 drivers/regulator/tps6524x-regulator.c info = &supply_info[rdev_get_id(rdev)]; rdev 586 drivers/regulator/tps6524x-regulator.c struct regulator_dev *rdev; rdev 619 drivers/regulator/tps6524x-regulator.c rdev = devm_regulator_register(dev, &hw->desc[i], &config); rdev 620 drivers/regulator/tps6524x-regulator.c if (IS_ERR(rdev)) rdev 621 drivers/regulator/tps6524x-regulator.c return PTR_ERR(rdev); rdev 452 drivers/regulator/tps6586x-regulator.c struct regulator_dev *rdev; rdev 498 drivers/regulator/tps6586x-regulator.c rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config); rdev 499 drivers/regulator/tps6586x-regulator.c if (IS_ERR(rdev)) { rdev 502 drivers/regulator/tps6586x-regulator.c return PTR_ERR(rdev); rdev 516 drivers/regulator/tps6586x-regulator.c platform_set_drvdata(pdev, rdev); rdev 311 drivers/regulator/tps65910-regulator.c struct regulator_dev **rdev; rdev 1076 drivers/regulator/tps65910-regulator.c struct regulator_dev *rdev; rdev 1145 drivers/regulator/tps65910-regulator.c pmic->rdev = devm_kcalloc(&pdev->dev, rdev 1149 drivers/regulator/tps65910-regulator.c if (!pmic->rdev) rdev 1211 drivers/regulator/tps65910-regulator.c rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i], rdev 1213 drivers/regulator/tps65910-regulator.c if (IS_ERR(rdev)) { rdev 1217 drivers/regulator/tps65910-regulator.c return PTR_ERR(rdev); rdev 1221 drivers/regulator/tps65910-regulator.c pmic->rdev[i] = rdev; rdev 1246 drivers/regulator/tps65910-regulator.c if (!pmic->rdev[i]) rdev 129 drivers/regulator/tps65912-regulator.c struct regulator_dev *rdev; rdev 140 drivers/regulator/tps65912-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[i], rdev 142 drivers/regulator/tps65912-regulator.c if (IS_ERR(rdev)) { rdev 145 drivers/regulator/tps65912-regulator.c return PTR_ERR(rdev); rdev 81 drivers/regulator/tps80031-regulator.c static inline struct device *to_tps80031_dev(struct regulator_dev *rdev) rdev 83 drivers/regulator/tps80031-regulator.c return rdev_get_dev(rdev)->parent->parent; rdev 86 drivers/regulator/tps80031-regulator.c static int tps80031_reg_is_enabled(struct regulator_dev *rdev) rdev 88 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 89 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 99 drivers/regulator/tps80031-regulator.c dev_err(&rdev->dev, "Reg 0x%02x read failed, err = %d\n", rdev 106 drivers/regulator/tps80031-regulator.c static int tps80031_reg_enable(struct regulator_dev *rdev) rdev 108 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 109 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 118 drivers/regulator/tps80031-regulator.c dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n", rdev 125 drivers/regulator/tps80031-regulator.c static int tps80031_reg_disable(struct regulator_dev *rdev) rdev 127 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 128 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 137 drivers/regulator/tps80031-regulator.c dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n", rdev 150 drivers/regulator/tps80031-regulator.c static int tps80031_dcdc_list_voltage(struct regulator_dev *rdev, unsigned sel) rdev 152 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 158 drivers/regulator/tps80031-regulator.c return regulator_list_voltage_linear(rdev, sel - 1); rdev 163 drivers/regulator/tps80031-regulator.c static int tps80031_dcdc_set_voltage_sel(struct regulator_dev *rdev, rdev 166 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 167 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 197 drivers/regulator/tps80031-regulator.c static int tps80031_dcdc_get_voltage_sel(struct regulator_dev *rdev) rdev 199 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 200 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 226 drivers/regulator/tps80031-regulator.c static int tps80031_ldo_list_voltage(struct regulator_dev *rdev, rdev 229 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 230 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 247 drivers/regulator/tps80031-regulator.c return regulator_list_voltage_linear(rdev, sel); rdev 250 drivers/regulator/tps80031-regulator.c static int tps80031_ldo_map_voltage(struct regulator_dev *rdev, rdev 253 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 254 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 262 drivers/regulator/tps80031-regulator.c return regulator_map_voltage_iterate(rdev, min_uV, rdev 267 drivers/regulator/tps80031-regulator.c return regulator_map_voltage_linear(rdev, min_uV, max_uV); rdev 270 drivers/regulator/tps80031-regulator.c static int tps80031_vbus_is_enabled(struct regulator_dev *rdev) rdev 272 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 273 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 297 drivers/regulator/tps80031-regulator.c static int tps80031_vbus_enable(struct regulator_dev *rdev) rdev 299 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 300 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 321 drivers/regulator/tps80031-regulator.c static int tps80031_vbus_disable(struct regulator_dev *rdev) rdev 323 drivers/regulator/tps80031-regulator.c struct tps80031_regulator *ri = rdev_get_drvdata(rdev); rdev 324 drivers/regulator/tps80031-regulator.c struct device *parent = to_tps80031_dev(rdev); rdev 666 drivers/regulator/tps80031-regulator.c struct regulator_dev *rdev; rdev 716 drivers/regulator/tps80031-regulator.c rdev = devm_regulator_register(&pdev->dev, &ri->rinfo->desc, rdev 718 drivers/regulator/tps80031-regulator.c if (IS_ERR(rdev)) { rdev 722 drivers/regulator/tps80031-regulator.c return PTR_ERR(rdev); rdev 98 drivers/regulator/twl-regulator.c static int twlreg_grp(struct regulator_dev *rdev) rdev 100 drivers/regulator/twl-regulator.c return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, rdev 117 drivers/regulator/twl-regulator.c static int twl4030reg_is_enabled(struct regulator_dev *rdev) rdev 119 drivers/regulator/twl-regulator.c int state = twlreg_grp(rdev); rdev 195 drivers/regulator/twl-regulator.c static int twl4030reg_enable(struct regulator_dev *rdev) rdev 197 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 201 drivers/regulator/twl-regulator.c grp = twlreg_grp(rdev); rdev 212 drivers/regulator/twl-regulator.c static int twl4030reg_disable(struct regulator_dev *rdev) rdev 214 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 218 drivers/regulator/twl-regulator.c grp = twlreg_grp(rdev); rdev 229 drivers/regulator/twl-regulator.c static int twl4030reg_get_status(struct regulator_dev *rdev) rdev 231 drivers/regulator/twl-regulator.c int state = twlreg_grp(rdev); rdev 245 drivers/regulator/twl-regulator.c static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode) rdev 247 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 373 drivers/regulator/twl-regulator.c static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) rdev 375 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 382 drivers/regulator/twl-regulator.c twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) rdev 384 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 390 drivers/regulator/twl-regulator.c static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev) rdev 392 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 418 drivers/regulator/twl-regulator.c twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, rdev 421 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 429 drivers/regulator/twl-regulator.c static int twl4030smps_get_voltage(struct regulator_dev *rdev) rdev 431 drivers/regulator/twl-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 591 drivers/regulator/twl-regulator.c struct regulator_dev *rdev; rdev 635 drivers/regulator/twl-regulator.c rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); rdev 636 drivers/regulator/twl-regulator.c if (IS_ERR(rdev)) { rdev 638 drivers/regulator/twl-regulator.c info->desc.name, PTR_ERR(rdev)); rdev 639 drivers/regulator/twl-regulator.c return PTR_ERR(rdev); rdev 641 drivers/regulator/twl-regulator.c platform_set_drvdata(pdev, rdev); rdev 106 drivers/regulator/twl6030-regulator.c static int twlreg_grp(struct regulator_dev *rdev) rdev 108 drivers/regulator/twl6030-regulator.c return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, rdev 121 drivers/regulator/twl6030-regulator.c static int twl6030reg_is_enabled(struct regulator_dev *rdev) rdev 123 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 127 drivers/regulator/twl6030-regulator.c grp = twlreg_grp(rdev); rdev 145 drivers/regulator/twl6030-regulator.c static int twl6030reg_enable(struct regulator_dev *rdev) rdev 147 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 152 drivers/regulator/twl6030-regulator.c grp = twlreg_grp(rdev); rdev 162 drivers/regulator/twl6030-regulator.c static int twl6030reg_disable(struct regulator_dev *rdev) rdev 164 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 179 drivers/regulator/twl6030-regulator.c static int twl6030reg_get_status(struct regulator_dev *rdev) rdev 181 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 184 drivers/regulator/twl6030-regulator.c val = twlreg_grp(rdev); rdev 206 drivers/regulator/twl6030-regulator.c static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode) rdev 208 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 213 drivers/regulator/twl6030-regulator.c grp = twlreg_grp(rdev); rdev 236 drivers/regulator/twl6030-regulator.c static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV, rdev 242 drivers/regulator/twl6030-regulator.c static int twl6030coresmps_get_voltage(struct regulator_dev *rdev) rdev 253 drivers/regulator/twl6030-regulator.c twl6030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) rdev 255 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 264 drivers/regulator/twl6030-regulator.c static int twl6030ldo_get_voltage_sel(struct regulator_dev *rdev) rdev 266 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 306 drivers/regulator/twl6030-regulator.c static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index) rdev 308 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 393 drivers/regulator/twl6030-regulator.c static int twl6030smps_map_voltage(struct regulator_dev *rdev, int min_uV, rdev 396 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 465 drivers/regulator/twl6030-regulator.c static int twl6030smps_set_voltage_sel(struct regulator_dev *rdev, rdev 468 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 474 drivers/regulator/twl6030-regulator.c static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev) rdev 476 drivers/regulator/twl6030-regulator.c struct twlreg_info *info = rdev_get_drvdata(rdev); rdev 676 drivers/regulator/twl6030-regulator.c struct regulator_dev *rdev; rdev 731 drivers/regulator/twl6030-regulator.c rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); rdev 732 drivers/regulator/twl6030-regulator.c if (IS_ERR(rdev)) { rdev 734 drivers/regulator/twl6030-regulator.c info->desc.name, PTR_ERR(rdev)); rdev 735 drivers/regulator/twl6030-regulator.c return PTR_ERR(rdev); rdev 737 drivers/regulator/twl6030-regulator.c platform_set_drvdata(pdev, rdev); rdev 46 drivers/regulator/uniphier-regulator.c struct regulator_dev *rdev; rdev 101 drivers/regulator/uniphier-regulator.c rdev = devm_regulator_register(dev, priv->data->desc, &config); rdev 102 drivers/regulator/uniphier-regulator.c if (IS_ERR(rdev)) { rdev 103 drivers/regulator/uniphier-regulator.c ret = PTR_ERR(rdev); rdev 38 drivers/regulator/vctrl-regulator.c struct regulator_dev *rdev; rdev 82 drivers/regulator/vctrl-regulator.c static int vctrl_get_voltage(struct regulator_dev *rdev) rdev 84 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 85 drivers/regulator/vctrl-regulator.c int ctrl_uV = regulator_get_voltage_rdev(vctrl->ctrl_reg->rdev); rdev 90 drivers/regulator/vctrl-regulator.c static int vctrl_set_voltage(struct regulator_dev *rdev, rdev 94 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 96 drivers/regulator/vctrl-regulator.c int orig_ctrl_uV = regulator_get_voltage_rdev(ctrl_reg->rdev); rdev 102 drivers/regulator/vctrl-regulator.c return regulator_set_voltage_rdev(ctrl_reg->rdev, rdev 120 drivers/regulator/vctrl-regulator.c ret = regulator_set_voltage_rdev(ctrl_reg->rdev, rdev 137 drivers/regulator/vctrl-regulator.c regulator_set_voltage_rdev(ctrl_reg->rdev, orig_ctrl_uV, orig_ctrl_uV, rdev 143 drivers/regulator/vctrl-regulator.c static int vctrl_get_voltage_sel(struct regulator_dev *rdev) rdev 145 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 150 drivers/regulator/vctrl-regulator.c static int vctrl_set_voltage_sel(struct regulator_dev *rdev, rdev 153 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 158 drivers/regulator/vctrl-regulator.c if (selector >= rdev->desc->n_voltages) rdev 163 drivers/regulator/vctrl-regulator.c ret = regulator_set_voltage_rdev(ctrl_reg->rdev, rdev 182 drivers/regulator/vctrl-regulator.c ret = regulator_set_voltage_rdev(ctrl_reg->rdev, rdev 187 drivers/regulator/vctrl-regulator.c dev_err(&rdev->dev, rdev 205 drivers/regulator/vctrl-regulator.c if (!regulator_set_voltage_rdev(ctrl_reg->rdev, rdev 211 drivers/regulator/vctrl-regulator.c dev_warn(&rdev->dev, rdev 218 drivers/regulator/vctrl-regulator.c static int vctrl_list_voltage(struct regulator_dev *rdev, rdev 221 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 223 drivers/regulator/vctrl-regulator.c if (selector >= rdev->desc->n_voltages) rdev 395 drivers/regulator/vctrl-regulator.c static int vctrl_enable(struct regulator_dev *rdev) rdev 397 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 406 drivers/regulator/vctrl-regulator.c static int vctrl_disable(struct regulator_dev *rdev) rdev 408 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 417 drivers/regulator/vctrl-regulator.c static int vctrl_is_enabled(struct regulator_dev *rdev) rdev 419 drivers/regulator/vctrl-regulator.c struct vctrl_data *vctrl = rdev_get_drvdata(rdev); rdev 493 drivers/regulator/vctrl-regulator.c ctrl_uV = regulator_get_voltage_rdev(vctrl->ctrl_reg->rdev); rdev 516 drivers/regulator/vctrl-regulator.c vctrl->rdev = devm_regulator_register(&pdev->dev, rdesc, &cfg); rdev 517 drivers/regulator/vctrl-regulator.c if (IS_ERR(vctrl->rdev)) { rdev 518 drivers/regulator/vctrl-regulator.c ret = PTR_ERR(vctrl->rdev); rdev 45 drivers/regulator/vexpress-regulator.c struct regulator_dev *rdev; rdev 77 drivers/regulator/vexpress-regulator.c rdev = devm_regulator_register(&pdev->dev, desc, &config); rdev 78 drivers/regulator/vexpress-regulator.c if (IS_ERR(rdev)) rdev 79 drivers/regulator/vexpress-regulator.c return PTR_ERR(rdev); rdev 59 drivers/regulator/wm831x-dcdc.c static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev) rdev 62 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 114 drivers/regulator/wm831x-dcdc.c static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 116 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 123 drivers/regulator/wm831x-dcdc.c static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev, rdev 126 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 133 drivers/regulator/wm831x-dcdc.c static int wm831x_dcdc_get_status(struct regulator_dev *rdev) rdev 135 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 144 drivers/regulator/wm831x-dcdc.c if (ret & (1 << rdev_get_id(rdev))) { rdev 146 drivers/regulator/wm831x-dcdc.c rdev_get_id(rdev) + 1); rdev 151 drivers/regulator/wm831x-dcdc.c if (rdev_get_id(rdev) < 2) { rdev 152 drivers/regulator/wm831x-dcdc.c if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) { rdev 154 drivers/regulator/wm831x-dcdc.c rdev_get_id(rdev) + 1); rdev 158 drivers/regulator/wm831x-dcdc.c if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) { rdev 160 drivers/regulator/wm831x-dcdc.c rdev_get_id(rdev) + 1); rdev 169 drivers/regulator/wm831x-dcdc.c if (!(ret & (1 << rdev_get_id(rdev)))) rdev 212 drivers/regulator/wm831x-dcdc.c static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state) rdev 214 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 230 drivers/regulator/wm831x-dcdc.c static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev, rdev 233 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 241 drivers/regulator/wm831x-dcdc.c return wm831x_buckv_set_dvs(rdev, 0); rdev 244 drivers/regulator/wm831x-dcdc.c return wm831x_buckv_set_dvs(rdev, 1); rdev 256 drivers/regulator/wm831x-dcdc.c ret = wm831x_buckv_set_dvs(rdev, 0); rdev 280 drivers/regulator/wm831x-dcdc.c static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, rdev 283 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 288 drivers/regulator/wm831x-dcdc.c vsel = regulator_map_voltage_linear_range(rdev, uV, uV); rdev 295 drivers/regulator/wm831x-dcdc.c static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev) rdev 297 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 519 drivers/regulator/wm831x-dcdc.c static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 521 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 526 drivers/regulator/wm831x-dcdc.c sel = regulator_map_voltage_linear(rdev, uV, uV); rdev 646 drivers/regulator/wm831x-dcdc.c static int wm831x_boostp_get_status(struct regulator_dev *rdev) rdev 648 drivers/regulator/wm831x-dcdc.c struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); rdev 657 drivers/regulator/wm831x-dcdc.c if (ret & (1 << rdev_get_id(rdev))) { rdev 659 drivers/regulator/wm831x-dcdc.c rdev_get_id(rdev) + 1); rdev 667 drivers/regulator/wm831x-dcdc.c if (ret & (1 << rdev_get_id(rdev))) rdev 33 drivers/regulator/wm831x-isink.c static int wm831x_isink_enable(struct regulator_dev *rdev) rdev 35 drivers/regulator/wm831x-isink.c struct wm831x_isink *isink = rdev_get_drvdata(rdev); rdev 55 drivers/regulator/wm831x-isink.c static int wm831x_isink_disable(struct regulator_dev *rdev) rdev 57 drivers/regulator/wm831x-isink.c struct wm831x_isink *isink = rdev_get_drvdata(rdev); rdev 73 drivers/regulator/wm831x-isink.c static int wm831x_isink_is_enabled(struct regulator_dev *rdev) rdev 75 drivers/regulator/wm831x-isink.c struct wm831x_isink *isink = rdev_get_drvdata(rdev); rdev 67 drivers/regulator/wm831x-ldo.c static int wm831x_gp_ldo_set_suspend_voltage(struct regulator_dev *rdev, rdev 70 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 74 drivers/regulator/wm831x-ldo.c sel = regulator_map_voltage_linear_range(rdev, uV, uV); rdev 81 drivers/regulator/wm831x-ldo.c static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev) rdev 83 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 106 drivers/regulator/wm831x-ldo.c static int wm831x_gp_ldo_set_mode(struct regulator_dev *rdev, rdev 109 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 158 drivers/regulator/wm831x-ldo.c static int wm831x_gp_ldo_get_status(struct regulator_dev *rdev) rdev 160 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 162 drivers/regulator/wm831x-ldo.c int mask = 1 << rdev_get_id(rdev); rdev 179 drivers/regulator/wm831x-ldo.c ret = wm831x_gp_ldo_get_mode(rdev); rdev 186 drivers/regulator/wm831x-ldo.c static unsigned int wm831x_gp_ldo_get_optimum_mode(struct regulator_dev *rdev, rdev 320 drivers/regulator/wm831x-ldo.c static int wm831x_aldo_set_suspend_voltage(struct regulator_dev *rdev, rdev 323 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 327 drivers/regulator/wm831x-ldo.c sel = regulator_map_voltage_linear_range(rdev, uV, uV); rdev 334 drivers/regulator/wm831x-ldo.c static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev) rdev 336 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 351 drivers/regulator/wm831x-ldo.c static int wm831x_aldo_set_mode(struct regulator_dev *rdev, rdev 354 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 381 drivers/regulator/wm831x-ldo.c static int wm831x_aldo_get_status(struct regulator_dev *rdev) rdev 383 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 385 drivers/regulator/wm831x-ldo.c int mask = 1 << rdev_get_id(rdev); rdev 402 drivers/regulator/wm831x-ldo.c ret = wm831x_aldo_get_mode(rdev); rdev 526 drivers/regulator/wm831x-ldo.c static int wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev *rdev, rdev 529 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 533 drivers/regulator/wm831x-ldo.c sel = regulator_map_voltage_linear(rdev, uV, uV); rdev 540 drivers/regulator/wm831x-ldo.c static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev) rdev 542 drivers/regulator/wm831x-ldo.c struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); rdev 544 drivers/regulator/wm831x-ldo.c int mask = 1 << rdev_get_id(rdev); rdev 94 drivers/regulator/wm8350-regulator.c static int wm8350_isink_enable(struct regulator_dev *rdev) rdev 96 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 97 drivers/regulator/wm8350-regulator.c int isink = rdev_get_id(rdev); rdev 138 drivers/regulator/wm8350-regulator.c static int wm8350_isink_disable(struct regulator_dev *rdev) rdev 140 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 141 drivers/regulator/wm8350-regulator.c int isink = rdev_get_id(rdev); rdev 178 drivers/regulator/wm8350-regulator.c static int wm8350_isink_is_enabled(struct regulator_dev *rdev) rdev 180 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 181 drivers/regulator/wm8350-regulator.c int isink = rdev_get_id(rdev); rdev 194 drivers/regulator/wm8350-regulator.c static int wm8350_isink_enable_time(struct regulator_dev *rdev) rdev 196 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 197 drivers/regulator/wm8350-regulator.c int isink = rdev_get_id(rdev); rdev 263 drivers/regulator/wm8350-regulator.c static int wm8350_dcdc_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 265 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 266 drivers/regulator/wm8350-regulator.c int sel, volt_reg, dcdc = rdev_get_id(rdev); rdev 290 drivers/regulator/wm8350-regulator.c sel = regulator_map_voltage_linear(rdev, uV, uV); rdev 300 drivers/regulator/wm8350-regulator.c static int wm8350_dcdc_set_suspend_enable(struct regulator_dev *rdev) rdev 302 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 303 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev); rdev 340 drivers/regulator/wm8350-regulator.c static int wm8350_dcdc_set_suspend_disable(struct regulator_dev *rdev) rdev 342 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 343 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev); rdev 380 drivers/regulator/wm8350-regulator.c static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev) rdev 382 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 383 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev); rdev 405 drivers/regulator/wm8350-regulator.c static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev) rdev 407 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 408 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev); rdev 430 drivers/regulator/wm8350-regulator.c static int wm8350_dcdc_set_suspend_mode(struct regulator_dev *rdev, rdev 433 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 434 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev); rdev 478 drivers/regulator/wm8350-regulator.c static int wm8350_ldo_set_suspend_voltage(struct regulator_dev *rdev, int uV) rdev 480 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 481 drivers/regulator/wm8350-regulator.c int sel, volt_reg, ldo = rdev_get_id(rdev); rdev 503 drivers/regulator/wm8350-regulator.c sel = regulator_map_voltage_linear_range(rdev, uV, uV); rdev 513 drivers/regulator/wm8350-regulator.c static int wm8350_ldo_set_suspend_enable(struct regulator_dev *rdev) rdev 515 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 516 drivers/regulator/wm8350-regulator.c int volt_reg, ldo = rdev_get_id(rdev); rdev 542 drivers/regulator/wm8350-regulator.c static int wm8350_ldo_set_suspend_disable(struct regulator_dev *rdev) rdev 544 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 545 drivers/regulator/wm8350-regulator.c int volt_reg, ldo = rdev_get_id(rdev); rdev 721 drivers/regulator/wm8350-regulator.c static int wm8350_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) rdev 723 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 724 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev); rdev 764 drivers/regulator/wm8350-regulator.c static unsigned int wm8350_dcdc_get_mode(struct regulator_dev *rdev) rdev 766 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 767 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev); rdev 810 drivers/regulator/wm8350-regulator.c static unsigned int wm8350_ldo_get_mode(struct regulator_dev *rdev) rdev 851 drivers/regulator/wm8350-regulator.c static unsigned int wm8350_dcdc_get_optimum_mode(struct regulator_dev *rdev, rdev 855 drivers/regulator/wm8350-regulator.c int dcdc = rdev_get_id(rdev), mode; rdev 1090 drivers/regulator/wm8350-regulator.c struct regulator_dev *rdev = (struct regulator_dev *)data; rdev 1092 drivers/regulator/wm8350-regulator.c regulator_lock(rdev); rdev 1094 drivers/regulator/wm8350-regulator.c regulator_notifier_call_chain(rdev, rdev 1098 drivers/regulator/wm8350-regulator.c regulator_notifier_call_chain(rdev, rdev 1101 drivers/regulator/wm8350-regulator.c regulator_unlock(rdev); rdev 1110 drivers/regulator/wm8350-regulator.c struct regulator_dev *rdev; rdev 1143 drivers/regulator/wm8350-regulator.c rdev = devm_regulator_register(&pdev->dev, &wm8350_reg[pdev->id], rdev 1145 drivers/regulator/wm8350-regulator.c if (IS_ERR(rdev)) { rdev 1148 drivers/regulator/wm8350-regulator.c return PTR_ERR(rdev); rdev 1153 drivers/regulator/wm8350-regulator.c pmic_uv_handler, 0, "UV", rdev); rdev 1165 drivers/regulator/wm8350-regulator.c struct regulator_dev *rdev = platform_get_drvdata(pdev); rdev 1166 drivers/regulator/wm8350-regulator.c struct wm8350 *wm8350 = rdev_get_drvdata(rdev); rdev 1168 drivers/regulator/wm8350-regulator.c wm8350_free_irq(wm8350, wm8350_reg[pdev->id].irq, rdev); rdev 206 drivers/regulator/wm8400-regulator.c struct regulator_dev *rdev; rdev 213 drivers/regulator/wm8400-regulator.c rdev = devm_regulator_register(&pdev->dev, ®ulators[pdev->id], rdev 215 drivers/regulator/wm8400-regulator.c if (IS_ERR(rdev)) rdev 216 drivers/regulator/wm8400-regulator.c return PTR_ERR(rdev); rdev 218 drivers/regulator/wm8400-regulator.c platform_set_drvdata(pdev, rdev); rdev 41 drivers/regulator/wm8994-regulator.c static int wm8994_ldo2_list_voltage(struct regulator_dev *rdev, rdev 44 drivers/regulator/wm8994-regulator.c struct wm8994_ldo *ldo = rdev_get_drvdata(rdev); rdev 57 drivers/rtc/rtc-lp8788.c struct rtc_device *rdev; rdev 251 drivers/rtc/rtc-lp8788.c rtc_update_irq(rtc->rdev, 1, ALARM_IRQ_FLAG); rdev 298 drivers/rtc/rtc-lp8788.c rtc->rdev = devm_rtc_device_register(dev, "lp8788_rtc", rdev 300 drivers/rtc/rtc-lp8788.c if (IS_ERR(rtc->rdev)) { rdev 302 drivers/rtc/rtc-lp8788.c return PTR_ERR(rtc->rdev); rdev 36 drivers/rtc/rtc-puv3.c struct rtc_device *rdev = id; rdev 39 drivers/rtc/rtc-puv3.c rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); rdev 45 drivers/rtc/rtc-puv3.c struct rtc_device *rdev = id; rdev 48 drivers/rtc/rtc-puv3.c rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); rdev 204 drivers/scsi/aic94xx/aic94xx_dev.c struct sas_end_device *rdev = rphy_to_end_device(dev->rphy); rdev 205 drivers/scsi/aic94xx/aic94xx_dev.c if (rdev->I_T_nexus_loss_timeout > 0) rdev 207 drivers/scsi/aic94xx/aic94xx_dev.c min(rdev->I_T_nexus_loss_timeout, rdev 1482 drivers/scsi/megaraid/megaraid_mbox.c mraid_device_t *rdev = ADAP2RAIDDEV(adapter); rdev 1563 drivers/scsi/megaraid/megaraid_mbox.c if (!(rdev->last_disp & (1L << SCP2CHANNEL(scp)))) { rdev 1573 drivers/scsi/megaraid/megaraid_mbox.c rdev->last_disp |= (1L << SCP2CHANNEL(scp)); rdev 1777 drivers/scsi/megaraid/megaraid_mbox.c if (rdev->fast_load && (target == 15) && rdev 1783 drivers/scsi/megaraid/megaraid_mbox.c rdev->fast_load = 0; rdev 1789 drivers/scsi/megaraid/megaraid_mbox.c if (!(rdev->last_disp & (1L << SCP2CHANNEL(scp)))) { rdev 1791 drivers/scsi/megaraid/megaraid_mbox.c ss = rdev->fast_load ? skip : scan; rdev 1801 drivers/scsi/megaraid/megaraid_mbox.c rdev->last_disp |= (1L << SCP2CHANNEL(scp)); rdev 1805 drivers/scsi/megaraid/megaraid_mbox.c if (rdev->fast_load) { rdev 221 drivers/scsi/megaraid/megaraid_mbox.h #define MAILBOX_LOCK(rdev) (&(rdev)->mailbox_lock) rdev 224 drivers/scsi/megaraid/megaraid_mbox.h #define IS_RAID_CH(rdev, ch) (((rdev)->channel_class >> (ch)) & 0x01) rdev 227 drivers/scsi/megaraid/megaraid_mbox.h #define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20) rdev 228 drivers/scsi/megaraid/megaraid_mbox.h #define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C) rdev 229 drivers/scsi/megaraid/megaraid_mbox.h #define WRINDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x20) rdev 230 drivers/scsi/megaraid/megaraid_mbox.h #define WROUTDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x2C) rdev 164 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev; rdev 168 drivers/scsi/scsi_transport_sas.c rdev = rphy_to_end_device(rphy); rdev 169 drivers/scsi/scsi_transport_sas.c return rdev; rdev 324 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev = sas_sdev_to_rdev(sdev); rdev 326 drivers/scsi/scsi_transport_sas.c return rdev->rphy.identify.sas_address; rdev 342 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev = sas_sdev_to_rdev(sdev); rdev 362 drivers/scsi/scsi_transport_sas.c rdev->tlr_supported = ret; rdev 378 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev = sas_sdev_to_rdev(sdev); rdev 380 drivers/scsi/scsi_transport_sas.c rdev->tlr_enabled = 0; rdev 397 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev = sas_sdev_to_rdev(sdev); rdev 399 drivers/scsi/scsi_transport_sas.c rdev->tlr_enabled = 1; rdev 408 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev = sas_sdev_to_rdev(sdev); rdev 409 drivers/scsi/scsi_transport_sas.c return rdev->tlr_enabled; rdev 1230 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev = sas_sdev_to_rdev(sdev); rdev 1252 drivers/scsi/scsi_transport_sas.c rdev->ready_led_meaning = msdata[2] & 0x10 ? 1 : 0; rdev 1253 drivers/scsi/scsi_transport_sas.c rdev->I_T_nexus_loss_timeout = (msdata[4] << 8) + msdata[5]; rdev 1254 drivers/scsi/scsi_transport_sas.c rdev->initiator_response_timeout = (msdata[6] << 8) + msdata[7]; rdev 1271 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev = rphy_to_end_device(rphy); \ rdev 1273 drivers/scsi/scsi_transport_sas.c return snprintf(buf, 20, format_string, cast rdev->field); \ rdev 1431 drivers/scsi/scsi_transport_sas.c struct sas_end_device *rdev; rdev 1433 drivers/scsi/scsi_transport_sas.c rdev = kzalloc(sizeof(*rdev), GFP_KERNEL); rdev 1434 drivers/scsi/scsi_transport_sas.c if (!rdev) { rdev 1438 drivers/scsi/scsi_transport_sas.c device_initialize(&rdev->rphy.dev); rdev 1439 drivers/scsi/scsi_transport_sas.c rdev->rphy.dev.parent = get_device(&parent->dev); rdev 1440 drivers/scsi/scsi_transport_sas.c rdev->rphy.dev.release = sas_end_device_release; rdev 1443 drivers/scsi/scsi_transport_sas.c dev_set_name(&rdev->rphy.dev, "end_device-%d:%d:%d", rdev 1447 drivers/scsi/scsi_transport_sas.c dev_set_name(&rdev->rphy.dev, "end_device-%d:%d", rdev 1449 drivers/scsi/scsi_transport_sas.c rdev->rphy.identify.device_type = SAS_END_DEVICE; rdev 1450 drivers/scsi/scsi_transport_sas.c sas_rphy_initialize(&rdev->rphy); rdev 1451 drivers/scsi/scsi_transport_sas.c transport_setup_device(&rdev->rphy.dev); rdev 1453 drivers/scsi/scsi_transport_sas.c return &rdev->rphy; rdev 1471 drivers/scsi/scsi_transport_sas.c struct sas_expander_device *rdev; rdev 1477 drivers/scsi/scsi_transport_sas.c rdev = kzalloc(sizeof(*rdev), GFP_KERNEL); rdev 1478 drivers/scsi/scsi_transport_sas.c if (!rdev) { rdev 1482 drivers/scsi/scsi_transport_sas.c device_initialize(&rdev->rphy.dev); rdev 1483 drivers/scsi/scsi_transport_sas.c rdev->rphy.dev.parent = get_device(&parent->dev); rdev 1484 drivers/scsi/scsi_transport_sas.c rdev->rphy.dev.release = sas_expander_release; rdev 1486 drivers/scsi/scsi_transport_sas.c rdev->rphy.scsi_target_id = sas_host->next_expander_id++; rdev 1488 drivers/scsi/scsi_transport_sas.c dev_set_name(&rdev->rphy.dev, "expander-%d:%d", rdev 1489 drivers/scsi/scsi_transport_sas.c shost->host_no, rdev->rphy.scsi_target_id); rdev 1490 drivers/scsi/scsi_transport_sas.c rdev->rphy.identify.device_type = type; rdev 1491 drivers/scsi/scsi_transport_sas.c sas_rphy_initialize(&rdev->rphy); rdev 1492 drivers/scsi/scsi_transport_sas.c transport_setup_device(&rdev->rphy.dev); rdev 1494 drivers/scsi/scsi_transport_sas.c return &rdev->rphy; rdev 83 drivers/ssb/driver_mipscore.c static struct ssb_device *find_device(struct ssb_device *rdev, int irqflag) rdev 85 drivers/ssb/driver_mipscore.c struct ssb_bus *bus = rdev->bus; rdev 204 drivers/staging/fieldbus/anybuss/arcx-anybus.c static int can_power_is_enabled(struct regulator_dev *rdev) rdev 206 drivers/staging/fieldbus/anybuss/arcx-anybus.c struct controller_priv *cd = rdev_get_drvdata(rdev); rdev 72 drivers/usb/phy/phy-tahvo.c struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent); rdev 75 drivers/usb/phy/phy-tahvo.c reg = retu_read(rdev, TAHVO_REG_IDSR); rdev 123 drivers/usb/phy/phy-tahvo.c struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent); rdev 128 drivers/usb/phy/phy-tahvo.c retu_write(rdev, TAHVO_REG_USBR, USBR_REGOUT | USBR_NSUSPEND | rdev 142 drivers/usb/phy/phy-tahvo.c struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent); rdev 147 drivers/usb/phy/phy-tahvo.c retu_write(rdev, TAHVO_REG_USBR, USBR_SLAVE_CONTROL | USBR_REGOUT | rdev 163 drivers/usb/phy/phy-tahvo.c struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent); rdev 170 drivers/usb/phy/phy-tahvo.c retu_write(rdev, TAHVO_REG_USBR, 0); rdev 177 drivers/usb/phy/phy-tahvo.c struct retu_dev *rdev = dev_get_drvdata(tu->pt_dev->dev.parent); rdev 182 drivers/usb/phy/phy-tahvo.c w = retu_read(rdev, TAHVO_REG_USBR); rdev 187 drivers/usb/phy/phy-tahvo.c retu_write(rdev, TAHVO_REG_USBR, w); rdev 324 drivers/usb/phy/phy-tahvo.c struct retu_dev *rdev = dev_get_drvdata(pdev->dev.parent); rdev 355 drivers/usb/phy/phy-tahvo.c tu->vbus_state = retu_read(rdev, TAHVO_REG_IDSR) & TAHVO_STAT_VBUS; rdev 24 drivers/watchdog/retu_wdt.c struct retu_dev *rdev; rdev 36 drivers/watchdog/retu_wdt.c retu_write(wdev->rdev, RETU_REG_WATCHDOG, RETU_WDT_MAX_TIMER); rdev 43 drivers/watchdog/retu_wdt.c retu_write(wdev->rdev, RETU_REG_WATCHDOG, RETU_WDT_MAX_TIMER); rdev 60 drivers/watchdog/retu_wdt.c return retu_write(wdev->rdev, RETU_REG_WATCHDOG, wdog->timeout); rdev 76 drivers/watchdog/retu_wdt.c return retu_write(wdev->rdev, RETU_REG_WATCHDOG, wdog->timeout); rdev 85 drivers/watchdog/retu_wdt.c return retu_write(wdev->rdev, RETU_REG_WATCHDOG, wdog->timeout); rdev 103 drivers/watchdog/retu_wdt.c struct retu_dev *rdev = dev_get_drvdata(pdev->dev.parent); rdev 127 drivers/watchdog/retu_wdt.c wdev->rdev = rdev; rdev 111 fs/9p/vfs_inode.c struct p9_wstat *stat, dev_t *rdev) rdev 116 fs/9p/vfs_inode.c *rdev = 0; rdev 147 fs/9p/vfs_inode.c *rdev = MKDEV(major, minor); rdev 251 fs/9p/vfs_inode.c struct inode *inode, umode_t mode, dev_t rdev) rdev 257 fs/9p/vfs_inode.c inode->i_rdev = rdev; rdev 349 fs/9p/vfs_inode.c struct inode *v9fs_get_inode(struct super_block *sb, umode_t mode, dev_t rdev) rdev 363 fs/9p/vfs_inode.c err = v9fs_init_inode(v9ses, inode, mode, rdev); rdev 448 fs/9p/vfs_inode.c dev_t rdev; rdev 453 fs/9p/vfs_inode.c umode = p9mode2unixmode(v9ses, st, &rdev); rdev 490 fs/9p/vfs_inode.c dev_t rdev; rdev 515 fs/9p/vfs_inode.c umode = p9mode2unixmode(v9ses, st, &rdev); rdev 516 fs/9p/vfs_inode.c retval = v9fs_init_inode(v9ses, inode, umode, rdev); rdev 1371 fs/9p/vfs_inode.c v9fs_vfs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 1380 fs/9p/vfs_inode.c MAJOR(rdev), MINOR(rdev)); rdev 1384 fs/9p/vfs_inode.c sprintf(name, "b %u %u", MAJOR(rdev), MINOR(rdev)); rdev 1386 fs/9p/vfs_inode.c sprintf(name, "c %u %u", MAJOR(rdev), MINOR(rdev)); rdev 1399 fs/9p/vfs_inode.c dev_t rdev; rdev 1411 fs/9p/vfs_inode.c umode = p9mode2unixmode(v9ses, st, &rdev); rdev 37 fs/9p/vfs_inode_dotl.c dev_t rdev); rdev 803 fs/9p/vfs_inode_dotl.c dev_t rdev) rdev 817 fs/9p/vfs_inode_dotl.c MAJOR(rdev), MINOR(rdev)); rdev 839 fs/9p/vfs_inode_dotl.c err = p9_client_mknod_dotl(dfid, name, mode, rdev, gid, &qid); rdev 872 fs/9p/vfs_inode_dotl.c inode = v9fs_get_inode(dir->i_sb, mode, rdev); rdev 70 fs/bad_inode.c umode_t mode, dev_t rdev) rdev 1561 fs/btrfs/ctree.h BTRFS_SETGET_FUNCS(inode_rdev, struct btrfs_inode_item, rdev, 64); rdev 1578 fs/btrfs/ctree.h BTRFS_SETGET_STACK_FUNCS(stack_inode_rdev, struct btrfs_inode_item, rdev, 64); rdev 1773 fs/btrfs/delayed-inode.c int btrfs_fill_inode(struct inode *inode, u32 *rdev) rdev 1803 fs/btrfs/delayed-inode.c *rdev = btrfs_stack_inode_rdev(inode_item); rdev 114 fs/btrfs/delayed-inode.h int btrfs_fill_inode(struct inode *inode, u32 *rdev); rdev 3803 fs/btrfs/inode.c u32 rdev; rdev 3808 fs/btrfs/inode.c ret = btrfs_fill_inode(inode, &rdev); rdev 3862 fs/btrfs/inode.c rdev = btrfs_inode_rdev(leaf, inode_item); rdev 3972 fs/btrfs/inode.c init_special_inode(inode, inode->i_mode, rdev); rdev 6685 fs/btrfs/inode.c umode_t mode, dev_t rdev) rdev 6724 fs/btrfs/inode.c init_special_inode(inode, inode->i_mode, rdev); rdev 826 fs/btrfs/send.c u64 *gid, u64 *rdev) rdev 854 fs/btrfs/send.c if (rdev) rdev 855 fs/btrfs/send.c *rdev = btrfs_inode_rdev(path->nodes[0], ii); rdev 863 fs/btrfs/send.c u64 *rdev) rdev 872 fs/btrfs/send.c rdev); rdev 2594 fs/btrfs/send.c u64 rdev; rdev 2604 fs/btrfs/send.c NULL, NULL, &rdev); rdev 2610 fs/btrfs/send.c rdev = sctx->cur_inode_rdev; rdev 2651 fs/btrfs/send.c TLV_PUT_U64(sctx, BTRFS_SEND_A_RDEV, new_encode_dev(rdev)); rdev 823 fs/ceph/dir.c umode_t mode, dev_t rdev) rdev 847 fs/ceph/dir.c dir, dentry, mode, rdev); rdev 858 fs/ceph/dir.c req->r_args.mknod.rdev = cpu_to_le32(rdev); rdev 805 fs/ceph/inode.c inode->i_rdev = le32_to_cpu(info->rdev); rdev 52 fs/efs/inode.c u32 rdev; rdev 116 fs/efs/inode.c rdev = be16_to_cpu(efs_inode->di_u.di_dev.odev); rdev 117 fs/efs/inode.c if (rdev == 0xffff) { rdev 118 fs/efs/inode.c rdev = be32_to_cpu(efs_inode->di_u.di_dev.ndev); rdev 119 fs/efs/inode.c if (sysv_major(rdev) > 0xfff) rdev 122 fs/efs/inode.c device = MKDEV(sysv_major(rdev), sysv_minor(rdev)); rdev 124 fs/efs/inode.c device = old_decode_dev(rdev); rdev 93 fs/erofs/erofs_fs.h __le32 rdev; rdev 121 fs/erofs/erofs_fs.h __le32 rdev; rdev 48 fs/erofs/inode.c new_decode_dev(le32_to_cpu(die->i_u.rdev)); rdev 87 fs/erofs/inode.c new_decode_dev(le32_to_cpu(dic->i_u.rdev)); rdev 126 fs/ext2/namei.c static int ext2_mknod (struct inode * dir, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 138 fs/ext2/namei.c init_special_inode(inode, inode->i_mode, rdev); rdev 2615 fs/ext4/namei.c umode_t mode, dev_t rdev) rdev 2633 fs/ext4/namei.c init_special_inode(inode, inode->i_mode, rdev); rdev 716 fs/f2fs/namei.c umode_t mode, dev_t rdev) rdev 735 fs/f2fs/namei.c init_special_inode(inode, inode->i_mode, rdev); rdev 117 fs/freevxfs/vxfs_inode.h __fs32 rdev; rdev 140 fs/freevxfs/vxfs_inode.h #define vdi_rdev vdi_ftarea.rdev rdev 170 fs/freevxfs/vxfs_inode.h __u32 rdev; rdev 182 fs/freevxfs/vxfs_inode.h #define vii_rdev vii_ftarea.rdev rdev 628 fs/fuse/dir.c dev_t rdev) rdev 639 fs/fuse/dir.c inarg.rdev = new_encode_dev(rdev); rdev 905 fs/fuse/dir.c stat->rdev = inode->i_rdev; rdev 264 fs/fuse/inode.c new_decode_dev(attr->rdev)); rdev 480 fs/hfsplus/dir.c umode_t mode, dev_t rdev) rdev 492 fs/hfsplus/dir.c init_special_inode(inode, mode, rdev); rdev 514 fs/hostfs/hostfs_kern.c dev_t rdev; rdev 521 fs/hostfs/hostfs_kern.c rdev = MKDEV(st.maj, st.min); rdev 535 fs/hostfs/hostfs_kern.c init_special_inode(ino, st.mode & S_IFMT, rdev); rdev 90 fs/hpfs/inode.c int rdev = 0; rdev 101 fs/hpfs/inode.c rdev = le32_to_cpu(*(__le32*)ea); rdev 111 fs/hpfs/inode.c new_decode_dev(rdev)); rdev 218 fs/hpfs/namei.c static int hpfs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 260 fs/hpfs/namei.c init_special_inode(result, mode, rdev); rdev 2026 fs/inode.c void init_special_inode(struct inode *inode, umode_t mode, dev_t rdev) rdev 2031 fs/inode.c inode->i_rdev = rdev; rdev 2034 fs/inode.c inode->i_rdev = rdev; rdev 608 fs/jffs2/dir.c static int jffs2_mknod (struct inode *dir_i, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 630 fs/jffs2/dir.c devlen = jffs2_encode_dev(&dev, rdev); rdev 652 fs/jffs2/dir.c init_special_inode(inode, inode->i_mode, rdev); rdev 259 fs/jffs2/fs.c dev_t rdev = 0; rdev 341 fs/jffs2/fs.c rdev = old_decode_dev(je16_to_cpu(jdev.old_id)); rdev 343 fs/jffs2/fs.c rdev = new_decode_dev(je32_to_cpu(jdev.new_id)); rdev 349 fs/jffs2/fs.c init_special_inode(inode, inode->i_mode, rdev); rdev 316 fs/jffs2/nodelist.h static inline int jffs2_encode_dev(union jffs2_device_node *jdev, dev_t rdev) rdev 318 fs/jffs2/nodelist.h if (old_valid_dev(rdev)) { rdev 319 fs/jffs2/nodelist.h jdev->old_id = cpu_to_je16(old_encode_dev(rdev)); rdev 322 fs/jffs2/nodelist.h jdev->new_id = cpu_to_je32(new_encode_dev(rdev)); rdev 1348 fs/jfs/namei.c umode_t mode, dev_t rdev) rdev 1408 fs/jfs/namei.c jfs_ip->dev = new_encode_dev(rdev); rdev 1409 fs/jfs/namei.c init_special_inode(ip, ip->i_mode, rdev); rdev 438 fs/minix/inode.c void minix_set_inode(struct inode *inode, dev_t rdev) rdev 453 fs/minix/inode.c init_special_inode(inode, inode->i_mode, rdev); rdev 36 fs/minix/namei.c static int minix_mknod(struct inode * dir, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 41 fs/minix/namei.c if (!old_valid_dev(rdev)) rdev 47 fs/minix/namei.c minix_set_inode(inode, rdev); rdev 1785 fs/nfs/dir.c nfs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 1797 fs/nfs/dir.c status = NFS_PROTO(dir)->mknod(dir, dentry, &attr, rdev); rdev 489 fs/nfs/inode.c init_special_inode(inode, inode->i_mode, fattr->rdev); rdev 268 fs/nfs/nfs2xdr.c u32 rdev, type; rdev 291 fs/nfs/nfs2xdr.c rdev = be32_to_cpup(p++); rdev 292 fs/nfs/nfs2xdr.c fattr->rdev = new_decode_dev(rdev); rdev 293 fs/nfs/nfs2xdr.c if (type == (u32)NFCHR && rdev == (u32)NFS2_FIFO_DEV) { rdev 295 fs/nfs/nfs2xdr.c fattr->rdev = 0; rdev 680 fs/nfs/nfs3proc.c dev_t rdev) rdev 688 fs/nfs/nfs3proc.c MAJOR(rdev), MINOR(rdev)); rdev 703 fs/nfs/nfs3proc.c data->arg.mknod.rdev = rdev; rdev 387 fs/nfs/nfs3xdr.c static void encode_specdata3(struct xdr_stream *xdr, const dev_t rdev) rdev 392 fs/nfs/nfs3xdr.c *p++ = cpu_to_be32(MAJOR(rdev)); rdev 393 fs/nfs/nfs3xdr.c *p = cpu_to_be32(MINOR(rdev)); rdev 396 fs/nfs/nfs3xdr.c static __be32 *xdr_decode_specdata3(__be32 *p, dev_t *rdev) rdev 402 fs/nfs/nfs3xdr.c *rdev = MKDEV(major, minor); rdev 403 fs/nfs/nfs3xdr.c if (MAJOR(*rdev) != major || MINOR(*rdev) != minor) rdev 404 fs/nfs/nfs3xdr.c *rdev = 0; rdev 647 fs/nfs/nfs3xdr.c p = xdr_decode_specdata3(p, &fattr->rdev); rdev 1127 fs/nfs/nfs3xdr.c encode_specdata3(xdr, args->rdev); rdev 4923 fs/nfs/nfs4proc.c struct iattr *sattr, struct nfs4_label *label, dev_t rdev) rdev 4937 fs/nfs/nfs4proc.c data->arg.u.device.specdata1 = MAJOR(rdev); rdev 4938 fs/nfs/nfs4proc.c data->arg.u.device.specdata2 = MINOR(rdev); rdev 4942 fs/nfs/nfs4proc.c data->arg.u.device.specdata1 = MAJOR(rdev); rdev 4943 fs/nfs/nfs4proc.c data->arg.u.device.specdata2 = MINOR(rdev); rdev 4958 fs/nfs/nfs4proc.c struct iattr *sattr, dev_t rdev) rdev 4972 fs/nfs/nfs4proc.c err = _nfs4_proc_mknod(dir, dentry, sattr, label, rdev); rdev 3962 fs/nfs/nfs4xdr.c static int decode_attr_rdev(struct xdr_stream *xdr, uint32_t *bitmap, dev_t *rdev) rdev 3968 fs/nfs/nfs4xdr.c *rdev = MKDEV(0,0); rdev 3981 fs/nfs/nfs4xdr.c *rdev = tmp; rdev 4625 fs/nfs/nfs4xdr.c status = decode_attr_rdev(xdr, bitmap, &fattr->rdev); rdev 261 fs/nfs/proc.c dev_t rdev) rdev 278 fs/nfs/proc.c sattr->ia_size = new_encode_dev(rdev);/* get out your barf bag */ rdev 316 fs/nfsd/nfs3proc.c dev_t rdev = 0; rdev 329 fs/nfsd/nfs3proc.c rdev = MKDEV(argp->major, argp->minor); rdev 330 fs/nfsd/nfs3proc.c if (MAJOR(rdev) != argp->major || rdev 331 fs/nfsd/nfs3proc.c MINOR(rdev) != argp->minor) rdev 339 fs/nfsd/nfs3proc.c &argp->attrs, type, rdev, &resp->fh); rdev 182 fs/nfsd/nfs3xdr.c *p++ = htonl((u32) MAJOR(stat->rdev)); rdev 183 fs/nfsd/nfs3xdr.c *p++ = htonl((u32) MINOR(stat->rdev)); rdev 596 fs/nfsd/nfs4proc.c dev_t rdev; rdev 619 fs/nfsd/nfs4proc.c rdev = MKDEV(create->cr_specdata1, create->cr_specdata2); rdev 620 fs/nfsd/nfs4proc.c if (MAJOR(rdev) != create->cr_specdata1 || rdev 621 fs/nfsd/nfs4proc.c MINOR(rdev) != create->cr_specdata2) rdev 625 fs/nfsd/nfs4proc.c &create->cr_iattr, S_IFBLK, rdev, &resfh); rdev 630 fs/nfsd/nfs4proc.c rdev = MKDEV(create->cr_specdata1, create->cr_specdata2); rdev 631 fs/nfsd/nfs4proc.c if (MAJOR(rdev) != create->cr_specdata1 || rdev 632 fs/nfsd/nfs4proc.c MINOR(rdev) != create->cr_specdata2) rdev 636 fs/nfsd/nfs4proc.c &create->cr_iattr,S_IFCHR, rdev, &resfh); rdev 2790 fs/nfsd/nfs4xdr.c *p++ = cpu_to_be32((u32) MAJOR(stat.rdev)); rdev 2791 fs/nfsd/nfs4xdr.c *p++ = cpu_to_be32((u32) MINOR(stat.rdev)); rdev 252 fs/nfsd/nfsproc.c dev_t rdev = 0, wanted = new_decode_dev(attr->ia_size); rdev 314 fs/nfsd/nfsproc.c rdev = inode->i_rdev; rdev 350 fs/nfsd/nfsproc.c rdev = 0; rdev 356 fs/nfsd/nfsproc.c if (!rdev) rdev 357 fs/nfsd/nfsproc.c rdev = wanted; rdev 373 fs/nfsd/nfsproc.c argp->len, attr, type, rdev, newfhp); rdev 153 fs/nfsd/nfsxdr.c *p++ = htonl(new_encode_dev(stat->rdev)); rdev 1160 fs/nfsd/vfs.c int type, dev_t rdev, struct svc_fh *resfhp) rdev 1224 fs/nfsd/vfs.c host_err = vfs_mknod(dirp, dchild, iap->ia_mode, rdev); rdev 1268 fs/nfsd/vfs.c int type, dev_t rdev, struct svc_fh *resfhp) rdev 1301 fs/nfsd/vfs.c rdev, resfhp); rdev 63 fs/nfsd/vfs.h int type, dev_t rdev, struct svc_fh *res); rdev 66 fs/nfsd/vfs.h int type, dev_t rdev, struct svc_fh *res); rdev 103 fs/nilfs2/namei.c nilfs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 115 fs/nilfs2/namei.c init_special_inode(inode, inode->i_mode, rdev); rdev 537 fs/overlayfs/copy_up.c .rdev = c->stat.rdev, rdev 177 fs/overlayfs/dir.c attr->rdev); rdev 586 fs/overlayfs/dir.c static int ovl_create_object(struct dentry *dentry, int mode, dev_t rdev, rdev 592 fs/overlayfs/dir.c .rdev = rdev, rdev 602 fs/overlayfs/dir.c inode = ovl_new_inode(dentry->d_sb, mode, rdev); rdev 636 fs/overlayfs/dir.c dev_t rdev) rdev 639 fs/overlayfs/dir.c if (S_ISCHR(mode) && rdev == WHITEOUT_DEV) rdev 642 fs/overlayfs/dir.c return ovl_create_object(dentry, mode, rdev, NULL); rdev 554 fs/overlayfs/inode.c static void ovl_fill_inode(struct inode *inode, umode_t mode, dev_t rdev, rdev 601 fs/overlayfs/inode.c init_special_inode(inode, mode, rdev); rdev 706 fs/overlayfs/inode.c struct inode *ovl_new_inode(struct super_block *sb, umode_t mode, dev_t rdev) rdev 712 fs/overlayfs/inode.c ovl_fill_inode(inode, mode, rdev, 0, 0); rdev 374 fs/overlayfs/overlayfs.h struct inode *ovl_new_inode(struct super_block *sb, umode_t mode, dev_t rdev); rdev 404 fs/overlayfs/overlayfs.h dev_t rdev; rdev 1243 fs/reiserfs/inode.c __u32 rdev; rdev 1294 fs/reiserfs/inode.c rdev = sd_v1_rdev(sd); rdev 1332 fs/reiserfs/inode.c rdev = sd_v2_rdev(sd); rdev 1371 fs/reiserfs/inode.c init_special_inode(inode, inode->i_mode, new_decode_dev(rdev)); rdev 702 fs/reiserfs/namei.c dev_t rdev) rdev 753 fs/reiserfs/namei.c init_special_inode(inode, inode->i_mode, rdev); rdev 310 fs/squashfs/inode.c unsigned int rdev; rdev 322 fs/squashfs/inode.c rdev = le32_to_cpu(sqsh_ino->rdev); rdev 323 fs/squashfs/inode.c init_special_inode(inode, inode->i_mode, new_decode_dev(rdev)); rdev 326 fs/squashfs/inode.c SQUASHFS_INODE_BLK(ino), offset, rdev); rdev 332 fs/squashfs/inode.c unsigned int rdev; rdev 346 fs/squashfs/inode.c rdev = le32_to_cpu(sqsh_ino->rdev); rdev 347 fs/squashfs/inode.c init_special_inode(inode, inode->i_mode, new_decode_dev(rdev)); rdev 350 fs/squashfs/inode.c SQUASHFS_INODE_BLK(ino), offset, rdev); rdev 306 fs/squashfs/squashfs_fs.h __le32 rdev; rdev 317 fs/squashfs/squashfs_fs.h __le32 rdev; rdev 41 fs/stat.c stat->rdev = inode->i_rdev; rdev 234 fs/stat.c tmp.st_rdev = old_encode_dev(stat->rdev); rdev 304 fs/stat.c if (!valid_dev(stat->dev) || !valid_dev(stat->rdev)) rdev 322 fs/stat.c tmp.st_rdev = encode_dev(stat->rdev); rdev 451 fs/stat.c tmp.st_rdev = new_encode_dev(stat->rdev); rdev 454 fs/stat.c tmp.st_rdev = huge_encode_dev(stat->rdev); rdev 552 fs/stat.c tmp.stx_rdev_major = MAJOR(stat->rdev); rdev 553 fs/stat.c tmp.stx_rdev_minor = MINOR(stat->rdev); rdev 596 fs/stat.c if (!old_valid_dev(stat->dev) || !old_valid_dev(stat->rdev)) rdev 610 fs/stat.c tmp.st_rdev = old_encode_dev(stat->rdev); rdev 153 fs/sysv/inode.c void sysv_set_inode(struct inode *inode, dev_t rdev) rdev 168 fs/sysv/inode.c init_special_inode(inode, inode->i_mode, rdev); rdev 44 fs/sysv/namei.c static int sysv_mknod(struct inode * dir, struct dentry * dentry, umode_t mode, dev_t rdev) rdev 49 fs/sysv/namei.c if (!old_valid_dev(rdev)) rdev 56 fs/sysv/namei.c sysv_set_inode(inode, rdev); rdev 1015 fs/ubifs/dir.c umode_t mode, dev_t rdev) rdev 1039 fs/ubifs/dir.c devlen = ubifs_encode_dev(dev, rdev); rdev 1064 fs/ubifs/dir.c init_special_inode(inode, inode->i_mode, rdev); rdev 146 fs/ubifs/misc.h static inline int ubifs_encode_dev(union ubifs_dev_desc *dev, dev_t rdev) rdev 148 fs/ubifs/misc.h dev->new = cpu_to_le32(new_encode_dev(rdev)); rdev 194 fs/ubifs/super.c dev_t rdev; rdev 205 fs/ubifs/super.c rdev = new_decode_dev(le32_to_cpu(dev->new)); rdev 207 fs/ubifs/super.c rdev = huge_decode_dev(le64_to_cpu(dev->huge)); rdev 214 fs/ubifs/super.c init_special_inode(inode, inode->i_mode, rdev); rdev 647 fs/udf/namei.c dev_t rdev) rdev 651 fs/udf/namei.c if (!old_valid_dev(rdev)) rdev 658 fs/udf/namei.c init_special_inode(inode, mode, rdev); rdev 88 fs/ufs/namei.c static int ufs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, dev_t rdev) rdev 93 fs/ufs/namei.c if (!old_valid_dev(rdev)) rdev 99 fs/ufs/namei.c init_special_inode(inode, mode, rdev); rdev 100 fs/ufs/namei.c ufs_set_inode_dev(inode->i_sb, UFS_I(inode), rdev); rdev 1002 fs/xfs/libxfs/xfs_format.h static inline void xfs_dinode_put_rdev(struct xfs_dinode *dip, xfs_dev_t rdev) rdev 1004 fs/xfs/libxfs/xfs_format.h *(__be32 *)XFS_DFORK_DPTR(dip) = cpu_to_be32(rdev); rdev 748 fs/xfs/xfs_inode.c dev_t rdev, rdev 811 fs/xfs/xfs_inode.c inode->i_rdev = rdev; rdev 967 fs/xfs/xfs_inode.c dev_t rdev, rdev 997 fs/xfs/xfs_inode.c code = xfs_ialloc(tp, dp, mode, nlink, rdev, prid, &ialloc_context, rdev 1067 fs/xfs/xfs_inode.c code = xfs_ialloc(tp, dp, mode, nlink, rdev, prid, rdev 1130 fs/xfs/xfs_inode.c dev_t rdev, rdev 1202 fs/xfs/xfs_inode.c error = xfs_dir_ialloc(&tp, dp, mode, is_dir ? 2 : 1, rdev, prid, &ip); rdev 418 fs/xfs/xfs_inode.h umode_t mode, dev_t rdev, struct xfs_inode **ipp); rdev 126 fs/xfs/xfs_iops.c dev_t rdev, rdev 140 fs/xfs/xfs_iops.c if (unlikely(!sysv_valid_dev(rdev) || MAJOR(rdev) & ~0x1ff)) rdev 143 fs/xfs/xfs_iops.c rdev = 0; rdev 156 fs/xfs/xfs_iops.c error = xfs_create(XFS_I(dir), &name, mode, rdev, &ip); rdev 220 fs/xfs/xfs_iops.c dev_t rdev) rdev 222 fs/xfs/xfs_iops.c return xfs_generic_create(dir, dentry, mode, rdev, false); rdev 543 fs/xfs/xfs_iops.c stat->rdev = inode->i_rdev; rdev 556 fs/xfs/xfs_iops.c stat->rdev = 0; rdev 409 include/linux/ceph/ceph_fs.h __le32 rdev; rdev 509 include/linux/ceph/ceph_fs.h __le32 rdev; rdev 51 include/linux/nfs_xdr.h dev_t rdev; rdev 917 include/linux/nfs_xdr.h dev_t rdev; rdev 45 include/linux/regulator/coupler.h struct regulator_dev *rdev); rdev 47 include/linux/regulator/coupler.h struct regulator_dev *rdev); rdev 49 include/linux/regulator/coupler.h struct regulator_dev *rdev, rdev 55 include/linux/regulator/coupler.h const char *rdev_get_name(struct regulator_dev *rdev); rdev 56 include/linux/regulator/coupler.h int regulator_check_consumers(struct regulator_dev *rdev, rdev 59 include/linux/regulator/coupler.h int regulator_check_voltage(struct regulator_dev *rdev, rdev 61 include/linux/regulator/coupler.h int regulator_get_voltage_rdev(struct regulator_dev *rdev); rdev 62 include/linux/regulator/coupler.h int regulator_set_voltage_rdev(struct regulator_dev *rdev, rdev 70 include/linux/regulator/coupler.h static inline const char *rdev_get_name(struct regulator_dev *rdev) rdev 74 include/linux/regulator/coupler.h static inline int regulator_check_consumers(struct regulator_dev *rdev, rdev 80 include/linux/regulator/coupler.h static inline int regulator_check_voltage(struct regulator_dev *rdev, rdev 85 include/linux/regulator/coupler.h static inline int regulator_get_voltage_rdev(struct regulator_dev *rdev) rdev 89 include/linux/regulator/coupler.h static inline int regulator_set_voltage_rdev(struct regulator_dev *rdev, rdev 219 include/linux/regulator/driver.h int (*resume)(struct regulator_dev *rdev); rdev 494 include/linux/regulator/driver.h void regulator_unregister(struct regulator_dev *rdev); rdev 495 include/linux/regulator/driver.h void devm_regulator_unregister(struct device *dev, struct regulator_dev *rdev); rdev 497 include/linux/regulator/driver.h int regulator_notifier_call_chain(struct regulator_dev *rdev, rdev 500 include/linux/regulator/driver.h void *rdev_get_drvdata(struct regulator_dev *rdev); rdev 501 include/linux/regulator/driver.h struct device *rdev_get_dev(struct regulator_dev *rdev); rdev 502 include/linux/regulator/driver.h struct regmap *rdev_get_regmap(struct regulator_dev *rdev); rdev 503 include/linux/regulator/driver.h int rdev_get_id(struct regulator_dev *rdev); rdev 507 include/linux/regulator/driver.h int regulator_list_voltage_linear(struct regulator_dev *rdev, rdev 509 include/linux/regulator/driver.h int regulator_list_voltage_pickable_linear_range(struct regulator_dev *rdev, rdev 511 include/linux/regulator/driver.h int regulator_list_voltage_linear_range(struct regulator_dev *rdev, rdev 513 include/linux/regulator/driver.h int regulator_list_voltage_table(struct regulator_dev *rdev, rdev 515 include/linux/regulator/driver.h int regulator_map_voltage_linear(struct regulator_dev *rdev, rdev 517 include/linux/regulator/driver.h int regulator_map_voltage_pickable_linear_range(struct regulator_dev *rdev, rdev 519 include/linux/regulator/driver.h int regulator_map_voltage_linear_range(struct regulator_dev *rdev, rdev 521 include/linux/regulator/driver.h int regulator_map_voltage_iterate(struct regulator_dev *rdev, rdev 523 include/linux/regulator/driver.h int regulator_map_voltage_ascend(struct regulator_dev *rdev, rdev 525 include/linux/regulator/driver.h int regulator_get_voltage_sel_pickable_regmap(struct regulator_dev *rdev); rdev 526 include/linux/regulator/driver.h int regulator_set_voltage_sel_pickable_regmap(struct regulator_dev *rdev, rdev 528 include/linux/regulator/driver.h int regulator_get_voltage_sel_regmap(struct regulator_dev *rdev); rdev 529 include/linux/regulator/driver.h int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel); rdev 530 include/linux/regulator/driver.h int regulator_is_enabled_regmap(struct regulator_dev *rdev); rdev 531 include/linux/regulator/driver.h int regulator_enable_regmap(struct regulator_dev *rdev); rdev 532 include/linux/regulator/driver.h int regulator_disable_regmap(struct regulator_dev *rdev); rdev 533 include/linux/regulator/driver.h int regulator_set_voltage_time_sel(struct regulator_dev *rdev, rdev 536 include/linux/regulator/driver.h int regulator_set_bypass_regmap(struct regulator_dev *rdev, bool enable); rdev 537 include/linux/regulator/driver.h int regulator_get_bypass_regmap(struct regulator_dev *rdev, bool *enable); rdev 538 include/linux/regulator/driver.h int regulator_set_soft_start_regmap(struct regulator_dev *rdev); rdev 539 include/linux/regulator/driver.h int regulator_set_pull_down_regmap(struct regulator_dev *rdev); rdev 541 include/linux/regulator/driver.h int regulator_set_active_discharge_regmap(struct regulator_dev *rdev, rdev 543 include/linux/regulator/driver.h int regulator_set_current_limit_regmap(struct regulator_dev *rdev, rdev 545 include/linux/regulator/driver.h int regulator_get_current_limit_regmap(struct regulator_dev *rdev); rdev 548 include/linux/regulator/driver.h void regulator_lock(struct regulator_dev *rdev); rdev 549 include/linux/regulator/driver.h void regulator_unlock(struct regulator_dev *rdev); rdev 199 include/linux/rio.h int (*pwcback) (struct rio_dev *rdev, union rio_pw_msg *msg, int step); rdev 416 include/linux/rio.h int (*add_outb_message)(struct rio_mport *mport, struct rio_dev *rdev, rdev 145 include/linux/rio_drv.h static inline int rio_read_config_32(struct rio_dev *rdev, u32 offset, rdev 148 include/linux/rio_drv.h return rio_mport_read_config_32(rdev->net->hport, rdev->destid, rdev 149 include/linux/rio_drv.h rdev->hopcount, offset, data); rdev 161 include/linux/rio_drv.h static inline int rio_write_config_32(struct rio_dev *rdev, u32 offset, rdev 164 include/linux/rio_drv.h return rio_mport_write_config_32(rdev->net->hport, rdev->destid, rdev 165 include/linux/rio_drv.h rdev->hopcount, offset, data); rdev 177 include/linux/rio_drv.h static inline int rio_read_config_16(struct rio_dev *rdev, u32 offset, rdev 180 include/linux/rio_drv.h return rio_mport_read_config_16(rdev->net->hport, rdev->destid, rdev 181 include/linux/rio_drv.h rdev->hopcount, offset, data); rdev 193 include/linux/rio_drv.h static inline int rio_write_config_16(struct rio_dev *rdev, u32 offset, rdev 196 include/linux/rio_drv.h return rio_mport_write_config_16(rdev->net->hport, rdev->destid, rdev 197 include/linux/rio_drv.h rdev->hopcount, offset, data); rdev 209 include/linux/rio_drv.h static inline int rio_read_config_8(struct rio_dev *rdev, u32 offset, u8 * data) rdev 211 include/linux/rio_drv.h return rio_mport_read_config_8(rdev->net->hport, rdev->destid, rdev 212 include/linux/rio_drv.h rdev->hopcount, offset, data); rdev 224 include/linux/rio_drv.h static inline int rio_write_config_8(struct rio_dev *rdev, u32 offset, u8 data) rdev 226 include/linux/rio_drv.h return rio_mport_write_config_8(rdev->net->hport, rdev->destid, rdev 227 include/linux/rio_drv.h rdev->hopcount, offset, data); rdev 241 include/linux/rio_drv.h static inline int rio_send_doorbell(struct rio_dev *rdev, u16 data) rdev 243 include/linux/rio_drv.h return rio_mport_send_doorbell(rdev->net->hport, rdev->destid, data); rdev 312 include/linux/rio_drv.h struct rio_dev *rdev, int mbox, rdev 315 include/linux/rio_drv.h return mport->ops->add_outb_message(mport, rdev, mbox, rdev 394 include/linux/rio_drv.h extern struct dma_chan *rio_request_dma(struct rio_dev *rdev); rdev 398 include/linux/rio_drv.h struct rio_dev *rdev, struct dma_chan *dchan, rdev 414 include/linux/rio_drv.h static inline const char *rio_name(struct rio_dev *rdev) rdev 416 include/linux/rio_drv.h return dev_name(&rdev->dev); rdev 426 include/linux/rio_drv.h static inline void *rio_get_drvdata(struct rio_dev *rdev) rdev 428 include/linux/rio_drv.h return dev_get_drvdata(&rdev->dev); rdev 439 include/linux/rio_drv.h static inline void rio_set_drvdata(struct rio_dev *rdev, void *data) rdev 441 include/linux/rio_drv.h dev_set_drvdata(&rdev->dev, data); rdev 40 include/linux/stat.h dev_t rdev; rdev 41 include/linux/sunxi-rsb.h static inline void *sunxi_rsb_device_get_drvdata(const struct sunxi_rsb_device *rdev) rdev 43 include/linux/sunxi-rsb.h return dev_get_drvdata(&rdev->dev); rdev 46 include/linux/sunxi-rsb.h static inline void sunxi_rsb_device_set_drvdata(struct sunxi_rsb_device *rdev, rdev 49 include/linux/sunxi-rsb.h dev_set_drvdata(&rdev->dev, data); rdev 61 include/linux/sunxi-rsb.h int (*probe)(struct sunxi_rsb_device *rdev); rdev 62 include/linux/sunxi-rsb.h int (*remove)(struct sunxi_rsb_device *rdev); rdev 86 include/linux/sunxi-rsb.h struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev, rdev 101 include/linux/sunxi-rsb.h #define devm_regmap_init_sunxi_rsb(rdev, config) \ rdev 103 include/linux/sunxi-rsb.h rdev, config) rdev 215 include/net/9p/client.h dev_t rdev, kgid_t gid, struct p9_qid *); rdev 28 include/sound/seq_midi_event.h int snd_midi_event_new(int bufsize, struct snd_midi_event **rdev); rdev 28 include/sound/seq_virmidi.h struct snd_virmidi_dev *rdev; rdev 571 include/uapi/linux/btrfs_tree.h __le64 rdev; rdev 232 include/uapi/linux/fuse.h uint32_t rdev; rdev 536 include/uapi/linux/fuse.h uint32_t rdev; rdev 30 init/do_mounts.h return stat.rdev; rdev 143 init/do_mounts_md.c u32 rdev; rdev 153 init/do_mounts_md.c rdev = bstat(comp_name); rdev 154 init/do_mounts_md.c if (rdev) rdev 155 init/do_mounts_md.c dev = new_decode_dev(rdev); rdev 152 init/initramfs.c static __initdata unsigned rdev; rdev 174 init/initramfs.c rdev = new_encode_dev(MKDEV(parsed[9], parsed[10])); rdev 354 init/initramfs.c ksys_mknod(collected, mode, rdev); rdev 79 kernel/audit.h dev_t rdev; rdev 540 kernel/auditsc.c audit_comparator(MAJOR(name->rdev), f->op, f->val)) rdev 545 kernel/auditsc.c audit_comparator(MAJOR(n->rdev), f->op, f->val)) { rdev 555 kernel/auditsc.c audit_comparator(MINOR(name->rdev), f->op, f->val)) rdev 560 kernel/auditsc.c audit_comparator(MINOR(n->rdev), f->op, f->val)) { rdev 1360 kernel/auditsc.c MAJOR(n->rdev), rdev 1361 kernel/auditsc.c MINOR(n->rdev)); rdev 1929 kernel/auditsc.c name->rdev = inode->i_rdev; rdev 2135 net/9p/client.c dev_t rdev, kgid_t gid, struct p9_qid *qid) rdev 2144 net/9p/client.c "minor %d\n", fid->fid, name, mode, MAJOR(rdev), MINOR(rdev)); rdev 2146 net/9p/client.c MAJOR(rdev), MINOR(rdev), gid); rdev 70 net/ieee802154/core.c struct cfg802154_registered_device *result = NULL, *rdev; rdev 74 net/ieee802154/core.c list_for_each_entry(rdev, &cfg802154_rdev_list, list) { rdev 75 net/ieee802154/core.c if (rdev->wpan_phy_idx == wpan_phy_idx) { rdev 76 net/ieee802154/core.c result = rdev; rdev 86 net/ieee802154/core.c struct cfg802154_registered_device *rdev; rdev 90 net/ieee802154/core.c rdev = cfg802154_rdev_by_wpan_phy_idx(wpan_phy_idx); rdev 91 net/ieee802154/core.c if (!rdev) rdev 93 net/ieee802154/core.c return &rdev->wpan_phy; rdev 100 net/ieee802154/core.c struct cfg802154_registered_device *rdev; rdev 103 net/ieee802154/core.c alloc_size = sizeof(*rdev) + priv_size; rdev 104 net/ieee802154/core.c rdev = kzalloc(alloc_size, GFP_KERNEL); rdev 105 net/ieee802154/core.c if (!rdev) rdev 108 net/ieee802154/core.c rdev->ops = ops; rdev 110 net/ieee802154/core.c rdev->wpan_phy_idx = atomic_inc_return(&wpan_phy_counter); rdev 112 net/ieee802154/core.c if (unlikely(rdev->wpan_phy_idx < 0)) { rdev 115 net/ieee802154/core.c kfree(rdev); rdev 120 net/ieee802154/core.c rdev->wpan_phy_idx--; rdev 122 net/ieee802154/core.c INIT_LIST_HEAD(&rdev->wpan_dev_list); rdev 123 net/ieee802154/core.c device_initialize(&rdev->wpan_phy.dev); rdev 124 net/ieee802154/core.c dev_set_name(&rdev->wpan_phy.dev, PHY_NAME "%d", rdev->wpan_phy_idx); rdev 126 net/ieee802154/core.c rdev->wpan_phy.dev.class = &wpan_phy_class; rdev 127 net/ieee802154/core.c rdev->wpan_phy.dev.platform_data = rdev; rdev 129 net/ieee802154/core.c wpan_phy_net_set(&rdev->wpan_phy, &init_net); rdev 131 net/ieee802154/core.c init_waitqueue_head(&rdev->dev_wait); rdev 133 net/ieee802154/core.c return &rdev->wpan_phy; rdev 139 net/ieee802154/core.c struct cfg802154_registered_device *rdev = wpan_phy_to_rdev(phy); rdev 149 net/ieee802154/core.c list_add_rcu(&rdev->list, &cfg802154_rdev_list); rdev 163 net/ieee802154/core.c struct cfg802154_registered_device *rdev = wpan_phy_to_rdev(phy); rdev 165 net/ieee802154/core.c wait_event(rdev->dev_wait, ({ rdev 168 net/ieee802154/core.c __count = rdev->opencount; rdev 176 net/ieee802154/core.c WARN_ON(!list_empty(&rdev->wpan_dev_list)); rdev 181 net/ieee802154/core.c list_del_rcu(&rdev->list); rdev 198 net/ieee802154/core.c int cfg802154_switch_netns(struct cfg802154_registered_device *rdev, rdev 204 net/ieee802154/core.c list_for_each_entry(wpan_dev, &rdev->wpan_dev_list, list) { rdev 216 net/ieee802154/core.c net = wpan_phy_net(&rdev->wpan_phy); rdev 219 net/ieee802154/core.c &rdev->wpan_dev_list, rdev 233 net/ieee802154/core.c wpan_phy_net_set(&rdev->wpan_phy, net); rdev 235 net/ieee802154/core.c err = device_rename(&rdev->wpan_phy.dev, dev_name(&rdev->wpan_phy.dev)); rdev 241 net/ieee802154/core.c void cfg802154_dev_free(struct cfg802154_registered_device *rdev) rdev 243 net/ieee802154/core.c kfree(rdev); rdev 247 net/ieee802154/core.c cfg802154_update_iface_num(struct cfg802154_registered_device *rdev, rdev 252 net/ieee802154/core.c rdev->num_running_ifaces += num; rdev 260 net/ieee802154/core.c struct cfg802154_registered_device *rdev; rdev 265 net/ieee802154/core.c rdev = wpan_phy_to_rdev(wpan_dev->wpan_phy); rdev 273 net/ieee802154/core.c wpan_dev->identifier = ++rdev->wpan_dev_id; rdev 274 net/ieee802154/core.c list_add_rcu(&wpan_dev->list, &rdev->wpan_dev_list); rdev 275 net/ieee802154/core.c rdev->devlist_generation++; rdev 280 net/ieee802154/core.c cfg802154_update_iface_num(rdev, wpan_dev->iftype, -1); rdev 282 net/ieee802154/core.c rdev->opencount--; rdev 283 net/ieee802154/core.c wake_up(&rdev->dev_wait); rdev 286 net/ieee802154/core.c cfg802154_update_iface_num(rdev, wpan_dev->iftype, 1); rdev 288 net/ieee802154/core.c rdev->opencount++; rdev 299 net/ieee802154/core.c rdev->devlist_generation++; rdev 322 net/ieee802154/core.c struct cfg802154_registered_device *rdev; rdev 325 net/ieee802154/core.c list_for_each_entry(rdev, &cfg802154_rdev_list, list) { rdev 326 net/ieee802154/core.c if (net_eq(wpan_phy_net(&rdev->wpan_phy), net)) rdev 327 net/ieee802154/core.c WARN_ON(cfg802154_switch_netns(rdev, &init_net)); rdev 42 net/ieee802154/core.h int cfg802154_switch_netns(struct cfg802154_registered_device *rdev, rdev 45 net/ieee802154/core.h void cfg802154_dev_free(struct cfg802154_registered_device *rdev); rdev 39 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev; rdev 59 net/ieee802154/nl802154.c list_for_each_entry(rdev, &cfg802154_rdev_list, list) { rdev 62 net/ieee802154/nl802154.c if (wpan_phy_net(&rdev->wpan_phy) != netns) rdev 65 net/ieee802154/nl802154.c if (have_wpan_dev_id && rdev->wpan_phy_idx != wpan_phy_idx) rdev 68 net/ieee802154/nl802154.c list_for_each_entry(wpan_dev, &rdev->wpan_dev_list, list) { rdev 94 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = NULL, *tmp; rdev 105 net/ieee802154/nl802154.c rdev = cfg802154_rdev_by_wpan_phy_idx( rdev 126 net/ieee802154/nl802154.c if (rdev && tmp != rdev) rdev 128 net/ieee802154/nl802154.c rdev = tmp; rdev 148 net/ieee802154/nl802154.c if (rdev && tmp != rdev) rdev 151 net/ieee802154/nl802154.c rdev = tmp; rdev 155 net/ieee802154/nl802154.c if (!rdev) rdev 158 net/ieee802154/nl802154.c if (netns != wpan_phy_net(&rdev->wpan_phy)) rdev 161 net/ieee802154/nl802154.c return rdev; rdev 236 net/ieee802154/nl802154.c struct cfg802154_registered_device **rdev, rdev 258 net/ieee802154/nl802154.c *rdev = wpan_phy_to_rdev((*wpan_dev)->wpan_phy); rdev 260 net/ieee802154/nl802154.c cb->args[0] = (*rdev)->wpan_phy_idx + 1; rdev 271 net/ieee802154/nl802154.c *rdev = wpan_phy_to_rdev(wpan_phy); rdev 274 net/ieee802154/nl802154.c list_for_each_entry(tmp, &(*rdev)->wpan_dev_list, list) { rdev 294 net/ieee802154/nl802154.c nl802154_finish_wpan_dev_dump(struct cfg802154_registered_device *rdev) rdev 331 net/ieee802154/nl802154.c nl802154_send_wpan_phy_channels(struct cfg802154_registered_device *rdev, rdev 343 net/ieee802154/nl802154.c rdev->wpan_phy.supported.channels[page])) rdev 353 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev) rdev 355 net/ieee802154/nl802154.c const struct wpan_phy_supported *caps = &rdev->wpan_phy.supported; rdev 376 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_ED_LEVEL) { rdev 392 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_TXPOWER) { rdev 408 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_MODE) { rdev 438 net/ieee802154/nl802154.c static int nl802154_send_wpan_phy(struct cfg802154_registered_device *rdev, rdev 451 net/ieee802154/nl802154.c if (nla_put_u32(msg, NL802154_ATTR_WPAN_PHY, rdev->wpan_phy_idx) || rdev 453 net/ieee802154/nl802154.c wpan_phy_name(&rdev->wpan_phy)) || rdev 465 net/ieee802154/nl802154.c rdev->wpan_phy.current_page) || rdev 467 net/ieee802154/nl802154.c rdev->wpan_phy.current_channel)) rdev 473 net/ieee802154/nl802154.c if (nl802154_send_wpan_phy_channels(rdev, msg)) rdev 477 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_MODE) { rdev 479 net/ieee802154/nl802154.c rdev->wpan_phy.cca.mode)) rdev 482 net/ieee802154/nl802154.c if (rdev->wpan_phy.cca.mode == NL802154_CCA_ENERGY_CARRIER) { rdev 484 net/ieee802154/nl802154.c rdev->wpan_phy.cca.opt)) rdev 489 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_TXPOWER) { rdev 491 net/ieee802154/nl802154.c rdev->wpan_phy.transmit_power)) rdev 495 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_ED_LEVEL) { rdev 497 net/ieee802154/nl802154.c rdev->wpan_phy.cca_ed_level)) rdev 501 net/ieee802154/nl802154.c if (nl802154_put_capabilities(msg, rdev)) rdev 511 net/ieee802154/nl802154.c if (rdev->ops->op) { \ rdev 529 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_TXPOWER) rdev 532 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_ED_LEVEL) rdev 535 net/ieee802154/nl802154.c if (rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_MODE) rdev 578 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev; rdev 585 net/ieee802154/nl802154.c rdev = wpan_phy_to_rdev( rdev 587 net/ieee802154/nl802154.c state->filter_wpan_phy = rdev->wpan_phy_idx; rdev 599 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev; rdev 618 net/ieee802154/nl802154.c list_for_each_entry(rdev, &cfg802154_rdev_list, list) { rdev 619 net/ieee802154/nl802154.c if (!net_eq(wpan_phy_net(&rdev->wpan_phy), sock_net(skb->sk))) rdev 624 net/ieee802154/nl802154.c state->filter_wpan_phy != rdev->wpan_phy_idx) rdev 627 net/ieee802154/nl802154.c ret = nl802154_send_wpan_phy(rdev, rdev 660 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 666 net/ieee802154/nl802154.c if (nl802154_send_wpan_phy(rdev, NL802154_CMD_NEW_WPAN_PHY, msg, rdev 754 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev, rdev 761 net/ieee802154/nl802154.c ret = rdev_get_llsec_params(rdev, wpan_dev, ¶ms); rdev 787 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev, rdev 803 net/ieee802154/nl802154.c if (nla_put_u32(msg, NL802154_ATTR_WPAN_PHY, rdev->wpan_phy_idx) || rdev 808 net/ieee802154/nl802154.c rdev->devlist_generation ^ rdev 839 net/ieee802154/nl802154.c if (nl802154_get_llsec_params(msg, rdev, wpan_dev) < 0) rdev 858 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev; rdev 862 net/ieee802154/nl802154.c list_for_each_entry(rdev, &cfg802154_rdev_list, list) { rdev 863 net/ieee802154/nl802154.c if (!net_eq(wpan_phy_net(&rdev->wpan_phy), sock_net(skb->sk))) rdev 871 net/ieee802154/nl802154.c list_for_each_entry(wpan_dev, &rdev->wpan_dev_list, list) { rdev 878 net/ieee802154/nl802154.c rdev, wpan_dev) < 0) { rdev 898 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 906 net/ieee802154/nl802154.c rdev, wdev) < 0) { rdev 916 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 930 net/ieee802154/nl802154.c !(rdev->wpan_phy.supported.iftypes & BIT(type))) rdev 937 net/ieee802154/nl802154.c if (!rdev->ops->add_virtual_intf) rdev 940 net/ieee802154/nl802154.c return rdev_add_virtual_intf(rdev, rdev 947 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 950 net/ieee802154/nl802154.c if (!rdev->ops->del_virtual_intf) rdev 962 net/ieee802154/nl802154.c return rdev_del_virtual_intf(rdev, wpan_dev); rdev 967 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 979 net/ieee802154/nl802154.c !(rdev->wpan_phy.supported.channels[page] & BIT(channel))) rdev 982 net/ieee802154/nl802154.c return rdev_set_channel(rdev, page, channel); rdev 987 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 990 net/ieee802154/nl802154.c if (!(rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_MODE)) rdev 1000 net/ieee802154/nl802154.c !(rdev->wpan_phy.supported.cca_modes & BIT(cca.mode))) rdev 1009 net/ieee802154/nl802154.c !(rdev->wpan_phy.supported.cca_opts & BIT(cca.opt))) rdev 1013 net/ieee802154/nl802154.c return rdev_set_cca_mode(rdev, &cca); rdev 1018 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1022 net/ieee802154/nl802154.c if (!(rdev->wpan_phy.flags & WPAN_PHY_FLAG_CCA_ED_LEVEL)) rdev 1030 net/ieee802154/nl802154.c for (i = 0; i < rdev->wpan_phy.supported.cca_ed_levels_size; i++) { rdev 1031 net/ieee802154/nl802154.c if (ed_level == rdev->wpan_phy.supported.cca_ed_levels[i]) rdev 1032 net/ieee802154/nl802154.c return rdev_set_cca_ed_level(rdev, ed_level); rdev 1040 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1044 net/ieee802154/nl802154.c if (!(rdev->wpan_phy.flags & WPAN_PHY_FLAG_TXPOWER)) rdev 1052 net/ieee802154/nl802154.c for (i = 0; i < rdev->wpan_phy.supported.tx_powers_size; i++) { rdev 1053 net/ieee802154/nl802154.c if (power == rdev->wpan_phy.supported.tx_powers[i]) rdev 1054 net/ieee802154/nl802154.c return rdev_set_tx_power(rdev, power); rdev 1062 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1093 net/ieee802154/nl802154.c return rdev_set_pan_id(rdev, wpan_dev, pan_id); rdev 1098 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1134 net/ieee802154/nl802154.c return rdev_set_short_addr(rdev, wpan_dev, short_addr); rdev 1140 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1157 net/ieee802154/nl802154.c if (min_be < rdev->wpan_phy.supported.min_minbe || rdev 1158 net/ieee802154/nl802154.c min_be > rdev->wpan_phy.supported.max_minbe || rdev 1159 net/ieee802154/nl802154.c max_be < rdev->wpan_phy.supported.min_maxbe || rdev 1160 net/ieee802154/nl802154.c max_be > rdev->wpan_phy.supported.max_maxbe || rdev 1164 net/ieee802154/nl802154.c return rdev_set_backoff_exponent(rdev, wpan_dev, min_be, max_be); rdev 1170 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1186 net/ieee802154/nl802154.c if (max_csma_backoffs < rdev->wpan_phy.supported.min_csma_backoffs || rdev 1187 net/ieee802154/nl802154.c max_csma_backoffs > rdev->wpan_phy.supported.max_csma_backoffs) rdev 1190 net/ieee802154/nl802154.c return rdev_set_max_csma_backoffs(rdev, wpan_dev, max_csma_backoffs); rdev 1196 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1211 net/ieee802154/nl802154.c if (max_frame_retries < rdev->wpan_phy.supported.min_frame_retries || rdev 1212 net/ieee802154/nl802154.c max_frame_retries > rdev->wpan_phy.supported.max_frame_retries) rdev 1215 net/ieee802154/nl802154.c return rdev_set_max_frame_retries(rdev, wpan_dev, max_frame_retries); rdev 1220 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1236 net/ieee802154/nl802154.c if (!wpan_phy_supported_bool(mode, rdev->wpan_phy.supported.lbt)) rdev 1239 net/ieee802154/nl802154.c return rdev_set_lbt_mode(rdev, wpan_dev, mode); rdev 1245 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1261 net/ieee802154/nl802154.c return rdev_set_ackreq_default(rdev, wpan_dev, ackreq); rdev 1266 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1288 net/ieee802154/nl802154.c if (!net_eq(wpan_phy_net(&rdev->wpan_phy), net)) rdev 1289 net/ieee802154/nl802154.c err = cfg802154_switch_netns(rdev, net); rdev 1396 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1436 net/ieee802154/nl802154.c return rdev_set_llsec_params(rdev, wpan_dev, ¶ms, changed); rdev 1441 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev, rdev 1499 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = NULL; rdev 1505 net/ieee802154/nl802154.c err = nl802154_prepare_wpan_dev_dump(skb, cb, &rdev, &wpan_dev); rdev 1514 net/ieee802154/nl802154.c rdev_lock_llsec_table(rdev, wpan_dev); rdev 1515 net/ieee802154/nl802154.c rdev_get_llsec_table(rdev, wpan_dev, &table); rdev 1525 net/ieee802154/nl802154.c rdev, wpan_dev->netdev, key) < 0) { rdev 1528 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 1536 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 1539 net/ieee802154/nl802154.c nl802154_finish_wpan_dev_dump(rdev); rdev 1555 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1600 net/ieee802154/nl802154.c return rdev_add_llsec_key(rdev, wpan_dev, &id, &key); rdev 1605 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1617 net/ieee802154/nl802154.c return rdev_del_llsec_key(rdev, wpan_dev, &id); rdev 1622 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev, rdev 1665 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = NULL; rdev 1671 net/ieee802154/nl802154.c err = nl802154_prepare_wpan_dev_dump(skb, cb, &rdev, &wpan_dev); rdev 1680 net/ieee802154/nl802154.c rdev_lock_llsec_table(rdev, wpan_dev); rdev 1681 net/ieee802154/nl802154.c rdev_get_llsec_table(rdev, wpan_dev, &table); rdev 1691 net/ieee802154/nl802154.c rdev, wpan_dev->netdev, dev) < 0) { rdev 1694 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 1702 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 1705 net/ieee802154/nl802154.c nl802154_finish_wpan_dev_dump(rdev); rdev 1756 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1765 net/ieee802154/nl802154.c return rdev_add_device(rdev, wpan_dev, &dev_desc); rdev 1770 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1783 net/ieee802154/nl802154.c return rdev_del_device(rdev, wpan_dev, extended_addr); rdev 1788 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev, rdev 1833 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = NULL; rdev 1840 net/ieee802154/nl802154.c err = nl802154_prepare_wpan_dev_dump(skb, cb, &rdev, &wpan_dev); rdev 1849 net/ieee802154/nl802154.c rdev_lock_llsec_table(rdev, wpan_dev); rdev 1850 net/ieee802154/nl802154.c rdev_get_llsec_table(rdev, wpan_dev, &table); rdev 1863 net/ieee802154/nl802154.c NLM_F_MULTI, rdev, rdev 1869 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 1878 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 1881 net/ieee802154/nl802154.c nl802154_finish_wpan_dev_dump(rdev); rdev 1894 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1920 net/ieee802154/nl802154.c return rdev_add_devkey(rdev, wpan_dev, extended_addr, &key); rdev 1925 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 1947 net/ieee802154/nl802154.c return rdev_del_devkey(rdev, wpan_dev, extended_addr, &key); rdev 1952 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev, rdev 1995 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = NULL; rdev 2001 net/ieee802154/nl802154.c err = nl802154_prepare_wpan_dev_dump(skb, cb, &rdev, &wpan_dev); rdev 2010 net/ieee802154/nl802154.c rdev_lock_llsec_table(rdev, wpan_dev); rdev 2011 net/ieee802154/nl802154.c rdev_get_llsec_table(rdev, wpan_dev, &table); rdev 2021 net/ieee802154/nl802154.c rdev, wpan_dev->netdev, sl) < 0) { rdev 2024 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 2032 net/ieee802154/nl802154.c rdev_unlock_llsec_table(rdev, wpan_dev); rdev 2035 net/ieee802154/nl802154.c nl802154_finish_wpan_dev_dump(rdev); rdev 2084 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 2093 net/ieee802154/nl802154.c return rdev_add_seclevel(rdev, wpan_dev, &sl); rdev 2099 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev = info->user_ptr[0]; rdev 2109 net/ieee802154/nl802154.c return rdev_del_seclevel(rdev, wpan_dev, &sl); rdev 2126 net/ieee802154/nl802154.c struct cfg802154_registered_device *rdev; rdev 2135 net/ieee802154/nl802154.c rdev = cfg802154_get_dev_from_info(genl_info_net(info), info); rdev 2136 net/ieee802154/nl802154.c if (IS_ERR(rdev)) { rdev 2139 net/ieee802154/nl802154.c return PTR_ERR(rdev); rdev 2141 net/ieee802154/nl802154.c info->user_ptr[0] = rdev; rdev 2154 net/ieee802154/nl802154.c rdev = wpan_phy_to_rdev(wpan_dev->wpan_phy); rdev 2179 net/ieee802154/nl802154.c info->user_ptr[0] = rdev; rdev 11 net/ieee802154/rdev-ops.h rdev_add_virtual_intf_deprecated(struct cfg802154_registered_device *rdev, rdev 16 net/ieee802154/rdev-ops.h return rdev->ops->add_virtual_intf_deprecated(&rdev->wpan_phy, name, rdev 21 net/ieee802154/rdev-ops.h rdev_del_virtual_intf_deprecated(struct cfg802154_registered_device *rdev, rdev 24 net/ieee802154/rdev-ops.h rdev->ops->del_virtual_intf_deprecated(&rdev->wpan_phy, dev); rdev 28 net/ieee802154/rdev-ops.h rdev_suspend(struct cfg802154_registered_device *rdev) rdev 31 net/ieee802154/rdev-ops.h trace_802154_rdev_suspend(&rdev->wpan_phy); rdev 32 net/ieee802154/rdev-ops.h ret = rdev->ops->suspend(&rdev->wpan_phy); rdev 33 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 38 net/ieee802154/rdev-ops.h rdev_resume(struct cfg802154_registered_device *rdev) rdev 41 net/ieee802154/rdev-ops.h trace_802154_rdev_resume(&rdev->wpan_phy); rdev 42 net/ieee802154/rdev-ops.h ret = rdev->ops->resume(&rdev->wpan_phy); rdev 43 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 48 net/ieee802154/rdev-ops.h rdev_add_virtual_intf(struct cfg802154_registered_device *rdev, char *name, rdev 54 net/ieee802154/rdev-ops.h trace_802154_rdev_add_virtual_intf(&rdev->wpan_phy, name, type, rdev 56 net/ieee802154/rdev-ops.h ret = rdev->ops->add_virtual_intf(&rdev->wpan_phy, name, rdev 59 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 64 net/ieee802154/rdev-ops.h rdev_del_virtual_intf(struct cfg802154_registered_device *rdev, rdev 69 net/ieee802154/rdev-ops.h trace_802154_rdev_del_virtual_intf(&rdev->wpan_phy, wpan_dev); rdev 70 net/ieee802154/rdev-ops.h ret = rdev->ops->del_virtual_intf(&rdev->wpan_phy, wpan_dev); rdev 71 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 76 net/ieee802154/rdev-ops.h rdev_set_channel(struct cfg802154_registered_device *rdev, u8 page, u8 channel) rdev 80 net/ieee802154/rdev-ops.h trace_802154_rdev_set_channel(&rdev->wpan_phy, page, channel); rdev 81 net/ieee802154/rdev-ops.h ret = rdev->ops->set_channel(&rdev->wpan_phy, page, channel); rdev 82 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 87 net/ieee802154/rdev-ops.h rdev_set_cca_mode(struct cfg802154_registered_device *rdev, rdev 92 net/ieee802154/rdev-ops.h trace_802154_rdev_set_cca_mode(&rdev->wpan_phy, cca); rdev 93 net/ieee802154/rdev-ops.h ret = rdev->ops->set_cca_mode(&rdev->wpan_phy, cca); rdev 94 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 99 net/ieee802154/rdev-ops.h rdev_set_cca_ed_level(struct cfg802154_registered_device *rdev, s32 ed_level) rdev 103 net/ieee802154/rdev-ops.h trace_802154_rdev_set_cca_ed_level(&rdev->wpan_phy, ed_level); rdev 104 net/ieee802154/rdev-ops.h ret = rdev->ops->set_cca_ed_level(&rdev->wpan_phy, ed_level); rdev 105 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 110 net/ieee802154/rdev-ops.h rdev_set_tx_power(struct cfg802154_registered_device *rdev, rdev 115 net/ieee802154/rdev-ops.h trace_802154_rdev_set_tx_power(&rdev->wpan_phy, power); rdev 116 net/ieee802154/rdev-ops.h ret = rdev->ops->set_tx_power(&rdev->wpan_phy, power); rdev 117 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 122 net/ieee802154/rdev-ops.h rdev_set_pan_id(struct cfg802154_registered_device *rdev, rdev 127 net/ieee802154/rdev-ops.h trace_802154_rdev_set_pan_id(&rdev->wpan_phy, wpan_dev, pan_id); rdev 128 net/ieee802154/rdev-ops.h ret = rdev->ops->set_pan_id(&rdev->wpan_phy, wpan_dev, pan_id); rdev 129 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 134 net/ieee802154/rdev-ops.h rdev_set_short_addr(struct cfg802154_registered_device *rdev, rdev 139 net/ieee802154/rdev-ops.h trace_802154_rdev_set_short_addr(&rdev->wpan_phy, wpan_dev, short_addr); rdev 140 net/ieee802154/rdev-ops.h ret = rdev->ops->set_short_addr(&rdev->wpan_phy, wpan_dev, short_addr); rdev 141 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 146 net/ieee802154/rdev-ops.h rdev_set_backoff_exponent(struct cfg802154_registered_device *rdev, rdev 151 net/ieee802154/rdev-ops.h trace_802154_rdev_set_backoff_exponent(&rdev->wpan_phy, wpan_dev, rdev 153 net/ieee802154/rdev-ops.h ret = rdev->ops->set_backoff_exponent(&rdev->wpan_phy, wpan_dev, rdev 155 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 160 net/ieee802154/rdev-ops.h rdev_set_max_csma_backoffs(struct cfg802154_registered_device *rdev, rdev 165 net/ieee802154/rdev-ops.h trace_802154_rdev_set_csma_backoffs(&rdev->wpan_phy, wpan_dev, rdev 167 net/ieee802154/rdev-ops.h ret = rdev->ops->set_max_csma_backoffs(&rdev->wpan_phy, wpan_dev, rdev 169 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 174 net/ieee802154/rdev-ops.h rdev_set_max_frame_retries(struct cfg802154_registered_device *rdev, rdev 179 net/ieee802154/rdev-ops.h trace_802154_rdev_set_max_frame_retries(&rdev->wpan_phy, wpan_dev, rdev 181 net/ieee802154/rdev-ops.h ret = rdev->ops->set_max_frame_retries(&rdev->wpan_phy, wpan_dev, rdev 183 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 188 net/ieee802154/rdev-ops.h rdev_set_lbt_mode(struct cfg802154_registered_device *rdev, rdev 193 net/ieee802154/rdev-ops.h trace_802154_rdev_set_lbt_mode(&rdev->wpan_phy, wpan_dev, mode); rdev 194 net/ieee802154/rdev-ops.h ret = rdev->ops->set_lbt_mode(&rdev->wpan_phy, wpan_dev, mode); rdev 195 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 200 net/ieee802154/rdev-ops.h rdev_set_ackreq_default(struct cfg802154_registered_device *rdev, rdev 205 net/ieee802154/rdev-ops.h trace_802154_rdev_set_ackreq_default(&rdev->wpan_phy, wpan_dev, rdev 207 net/ieee802154/rdev-ops.h ret = rdev->ops->set_ackreq_default(&rdev->wpan_phy, wpan_dev, ackreq); rdev 208 net/ieee802154/rdev-ops.h trace_802154_rdev_return_int(&rdev->wpan_phy, ret); rdev 215 net/ieee802154/rdev-ops.h rdev_get_llsec_table(struct cfg802154_registered_device *rdev, rdev 219 net/ieee802154/rdev-ops.h rdev->ops->get_llsec_table(&rdev->wpan_phy, wpan_dev, table); rdev 223 net/ieee802154/rdev-ops.h rdev_lock_llsec_table(struct cfg802154_registered_device *rdev, rdev 226 net/ieee802154/rdev-ops.h rdev->ops->lock_llsec_table(&rdev->wpan_phy, wpan_dev); rdev 230 net/ieee802154/rdev-ops.h rdev_unlock_llsec_table(struct cfg802154_registered_device *rdev, rdev 233 net/ieee802154/rdev-ops.h rdev->ops->unlock_llsec_table(&rdev->wpan_phy, wpan_dev); rdev 237 net/ieee802154/rdev-ops.h rdev_get_llsec_params(struct cfg802154_registered_device *rdev, rdev 241 net/ieee802154/rdev-ops.h return rdev->ops->get_llsec_params(&rdev->wpan_phy, wpan_dev, params); rdev 245 net/ieee802154/rdev-ops.h rdev_set_llsec_params(struct cfg802154_registered_device *rdev, rdev 250 net/ieee802154/rdev-ops.h return rdev->ops->set_llsec_params(&rdev->wpan_phy, wpan_dev, params, rdev 255 net/ieee802154/rdev-ops.h rdev_add_llsec_key(struct cfg802154_registered_device *rdev, rdev 260 net/ieee802154/rdev-ops.h return rdev->ops->add_llsec_key(&rdev->wpan_phy, wpan_dev, id, key); rdev 264 net/ieee802154/rdev-ops.h rdev_del_llsec_key(struct cfg802154_registered_device *rdev, rdev 268 net/ieee802154/rdev-ops.h return rdev->ops->del_llsec_key(&rdev->wpan_phy, wpan_dev, id); rdev 272 net/ieee802154/rdev-ops.h rdev_add_seclevel(struct cfg802154_registered_device *rdev, rdev 276 net/ieee802154/rdev-ops.h return rdev->ops->add_seclevel(&rdev->wpan_phy, wpan_dev, sl); rdev 280 net/ieee802154/rdev-ops.h rdev_del_seclevel(struct cfg802154_registered_device *rdev, rdev 284 net/ieee802154/rdev-ops.h return rdev->ops->del_seclevel(&rdev->wpan_phy, wpan_dev, sl); rdev 288 net/ieee802154/rdev-ops.h rdev_add_device(struct cfg802154_registered_device *rdev, rdev 292 net/ieee802154/rdev-ops.h return rdev->ops->add_device(&rdev->wpan_phy, wpan_dev, dev_desc); rdev 296 net/ieee802154/rdev-ops.h rdev_del_device(struct cfg802154_registered_device *rdev, rdev 299 net/ieee802154/rdev-ops.h return rdev->ops->del_device(&rdev->wpan_phy, wpan_dev, extended_addr); rdev 303 net/ieee802154/rdev-ops.h rdev_add_devkey(struct cfg802154_registered_device *rdev, rdev 307 net/ieee802154/rdev-ops.h return rdev->ops->add_devkey(&rdev->wpan_phy, wpan_dev, extended_addr, rdev 312 net/ieee802154/rdev-ops.h rdev_del_devkey(struct cfg802154_registered_device *rdev, rdev 316 net/ieee802154/rdev-ops.h return rdev->ops->del_devkey(&rdev->wpan_phy, wpan_dev, extended_addr, rdev 49 net/ieee802154/sysfs.c struct cfg802154_registered_device *rdev = dev_to_rdev(dev); rdev 51 net/ieee802154/sysfs.c cfg802154_dev_free(rdev); rdev 64 net/ieee802154/sysfs.c struct cfg802154_registered_device *rdev = dev_to_rdev(dev); rdev 67 net/ieee802154/sysfs.c if (rdev->ops->suspend) { rdev 69 net/ieee802154/sysfs.c ret = rdev_suspend(rdev); rdev 78 net/ieee802154/sysfs.c struct cfg802154_registered_device *rdev = dev_to_rdev(dev); rdev 81 net/ieee802154/sysfs.c if (rdev->ops->resume) { rdev 83 net/ieee802154/sysfs.c ret = rdev_resume(rdev); rdev 10 net/wireless/ap.c int __cfg80211_stop_ap(struct cfg80211_registered_device *rdev, rdev 18 net/wireless/ap.c if (!rdev->ops->stop_ap) rdev 28 net/wireless/ap.c err = rdev_stop_ap(rdev, dev); rdev 34 net/wireless/ap.c rdev_set_qos_map(rdev, dev, NULL); rdev 41 net/wireless/ap.c cfg80211_sched_dfs_chan_update(rdev); rdev 49 net/wireless/ap.c int cfg80211_stop_ap(struct cfg80211_registered_device *rdev, rdev 56 net/wireless/ap.c err = __cfg80211_stop_ap(rdev, dev, notify); rdev 660 net/wireless/chan.c struct cfg80211_registered_device *rdev; rdev 667 net/wireless/chan.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 668 net/wireless/chan.c if (!reg_dfs_domain_same(wiphy, &rdev->wiphy)) rdev 671 net/wireless/chan.c if (cfg80211_is_wiphy_oper_chan(&rdev->wiphy, chan)) rdev 1004 net/wireless/chan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 1032 net/wireless/chan.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 1146 net/wireless/chan.c int cfg80211_set_monitor_channel(struct cfg80211_registered_device *rdev, rdev 1149 net/wireless/chan.c if (!rdev->ops->set_monitor_channel) rdev 1151 net/wireless/chan.c if (!cfg80211_has_monitors_only(rdev)) rdev 1154 net/wireless/chan.c return rdev_set_monitor_channel(rdev, chandef); rdev 59 net/wireless/core.c struct cfg80211_registered_device *result = NULL, *rdev; rdev 63 net/wireless/core.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 64 net/wireless/core.c if (rdev->wiphy_idx == wiphy_idx) { rdev 65 net/wireless/core.c result = rdev; rdev 75 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 77 net/wireless/core.c return rdev->wiphy_idx; rdev 82 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 86 net/wireless/core.c rdev = cfg80211_rdev_by_wiphy_idx(wiphy_idx); rdev 87 net/wireless/core.c if (!rdev) rdev 89 net/wireless/core.c return &rdev->wiphy; rdev 92 net/wireless/core.c static int cfg80211_dev_check_name(struct cfg80211_registered_device *rdev, rdev 105 net/wireless/core.c if (taken == strlen(newname) && wiphy_idx != rdev->wiphy_idx) { rdev 126 net/wireless/core.c int cfg80211_dev_rename(struct cfg80211_registered_device *rdev, rdev 134 net/wireless/core.c if (strcmp(newname, wiphy_name(&rdev->wiphy)) == 0) rdev 137 net/wireless/core.c result = cfg80211_dev_check_name(rdev, newname); rdev 141 net/wireless/core.c result = device_rename(&rdev->wiphy.dev, newname); rdev 145 net/wireless/core.c if (!IS_ERR_OR_NULL(rdev->wiphy.debugfsdir)) rdev 146 net/wireless/core.c debugfs_rename(rdev->wiphy.debugfsdir->d_parent, rdev 147 net/wireless/core.c rdev->wiphy.debugfsdir, rdev 148 net/wireless/core.c rdev->wiphy.debugfsdir->d_parent, newname); rdev 150 net/wireless/core.c nl80211_notify_wiphy(rdev, NL80211_CMD_NEW_WIPHY); rdev 155 net/wireless/core.c int cfg80211_switch_netns(struct cfg80211_registered_device *rdev, rdev 161 net/wireless/core.c if (!(rdev->wiphy.flags & WIPHY_FLAG_NETNS_OK)) rdev 164 net/wireless/core.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 176 net/wireless/core.c net = wiphy_net(&rdev->wiphy); rdev 179 net/wireless/core.c &rdev->wiphy.wdev_list, rdev 193 net/wireless/core.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 196 net/wireless/core.c nl80211_notify_iface(rdev, wdev, NL80211_CMD_DEL_INTERFACE); rdev 198 net/wireless/core.c nl80211_notify_wiphy(rdev, NL80211_CMD_DEL_WIPHY); rdev 200 net/wireless/core.c wiphy_net_set(&rdev->wiphy, net); rdev 202 net/wireless/core.c err = device_rename(&rdev->wiphy.dev, dev_name(&rdev->wiphy.dev)); rdev 205 net/wireless/core.c nl80211_notify_wiphy(rdev, NL80211_CMD_NEW_WIPHY); rdev 206 net/wireless/core.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 209 net/wireless/core.c nl80211_notify_iface(rdev, wdev, NL80211_CMD_NEW_INTERFACE); rdev 217 net/wireless/core.c struct cfg80211_registered_device *rdev = data; rdev 219 net/wireless/core.c rdev_rfkill_poll(rdev); rdev 222 net/wireless/core.c void cfg80211_stop_p2p_device(struct cfg80211_registered_device *rdev, rdev 233 net/wireless/core.c rdev_stop_p2p_device(rdev, wdev); rdev 236 net/wireless/core.c rdev->opencount--; rdev 238 net/wireless/core.c if (rdev->scan_req && rdev->scan_req->wdev == wdev) { rdev 239 net/wireless/core.c if (WARN_ON(!rdev->scan_req->notified)) rdev 240 net/wireless/core.c rdev->scan_req->info.aborted = true; rdev 241 net/wireless/core.c ___cfg80211_scan_done(rdev, false); rdev 245 net/wireless/core.c void cfg80211_stop_nan(struct cfg80211_registered_device *rdev, rdev 256 net/wireless/core.c rdev_stop_nan(rdev, wdev); rdev 259 net/wireless/core.c rdev->opencount--; rdev 264 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 269 net/wireless/core.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 277 net/wireless/core.c cfg80211_stop_p2p_device(rdev, wdev); rdev 280 net/wireless/core.c cfg80211_stop_nan(rdev, wdev); rdev 291 net/wireless/core.c struct cfg80211_registered_device *rdev = data; rdev 297 net/wireless/core.c cfg80211_shutdown_all_interfaces(&rdev->wiphy); rdev 305 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 307 net/wireless/core.c rdev = container_of(work, struct cfg80211_registered_device, rdev 309 net/wireless/core.c cfg80211_rfkill_set_block(rdev, true); rdev 314 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 316 net/wireless/core.c rdev = container_of(work, struct cfg80211_registered_device, rdev 320 net/wireless/core.c cfg80211_process_rdev_events(rdev); rdev 324 net/wireless/core.c void cfg80211_destroy_ifaces(struct cfg80211_registered_device *rdev) rdev 330 net/wireless/core.c list_for_each_entry_safe(wdev, tmp, &rdev->wiphy.wdev_list, list) { rdev 332 net/wireless/core.c rdev_del_virtual_intf(rdev, wdev); rdev 338 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 340 net/wireless/core.c rdev = container_of(work, struct cfg80211_registered_device, rdev 344 net/wireless/core.c cfg80211_destroy_ifaces(rdev); rdev 350 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 353 net/wireless/core.c rdev = container_of(work, struct cfg80211_registered_device, rdev 357 net/wireless/core.c list_for_each_entry_safe(req, tmp, &rdev->sched_scan_req_list, list) { rdev 359 net/wireless/core.c cfg80211_stop_sched_scan_req(rdev, req, false); rdev 366 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 368 net/wireless/core.c rdev = container_of(work, struct cfg80211_registered_device, rdev 373 net/wireless/core.c regulatory_propagate_dfs_state(&rdev->wiphy, &rdev->radar_chandef, rdev 382 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 384 net/wireless/core.c rdev = container_of(work, struct cfg80211_registered_device, rdev 389 net/wireless/core.c regulatory_propagate_dfs_state(&rdev->wiphy, &rdev->cac_done_chandef, rdev 403 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 423 net/wireless/core.c alloc_size = sizeof(*rdev) + sizeof_priv; rdev 425 net/wireless/core.c rdev = kzalloc(alloc_size, GFP_KERNEL); rdev 426 net/wireless/core.c if (!rdev) rdev 429 net/wireless/core.c rdev->ops = ops; rdev 431 net/wireless/core.c rdev->wiphy_idx = atomic_inc_return(&wiphy_counter); rdev 433 net/wireless/core.c if (unlikely(rdev->wiphy_idx < 0)) { rdev 436 net/wireless/core.c kfree(rdev); rdev 441 net/wireless/core.c rdev->wiphy_idx--; rdev 448 net/wireless/core.c rv = cfg80211_dev_check_name(rdev, requested_name); rdev 455 net/wireless/core.c rv = dev_set_name(&rdev->wiphy.dev, "%s", requested_name); rdev 469 net/wireless/core.c rv = dev_set_name(&rdev->wiphy.dev, PHY_NAME "%d", rdev->wiphy_idx); rdev 471 net/wireless/core.c kfree(rdev); rdev 476 net/wireless/core.c INIT_LIST_HEAD(&rdev->wiphy.wdev_list); rdev 477 net/wireless/core.c INIT_LIST_HEAD(&rdev->beacon_registrations); rdev 478 net/wireless/core.c spin_lock_init(&rdev->beacon_registrations_lock); rdev 479 net/wireless/core.c spin_lock_init(&rdev->bss_lock); rdev 480 net/wireless/core.c INIT_LIST_HEAD(&rdev->bss_list); rdev 481 net/wireless/core.c INIT_LIST_HEAD(&rdev->sched_scan_req_list); rdev 482 net/wireless/core.c INIT_WORK(&rdev->scan_done_wk, __cfg80211_scan_done); rdev 483 net/wireless/core.c INIT_LIST_HEAD(&rdev->mlme_unreg); rdev 484 net/wireless/core.c spin_lock_init(&rdev->mlme_unreg_lock); rdev 485 net/wireless/core.c INIT_WORK(&rdev->mlme_unreg_wk, cfg80211_mlme_unreg_wk); rdev 486 net/wireless/core.c INIT_DELAYED_WORK(&rdev->dfs_update_channels_wk, rdev 489 net/wireless/core.c rdev->wiphy.wext = &cfg80211_wext_handler; rdev 492 net/wireless/core.c device_initialize(&rdev->wiphy.dev); rdev 493 net/wireless/core.c rdev->wiphy.dev.class = &ieee80211_class; rdev 494 net/wireless/core.c rdev->wiphy.dev.platform_data = rdev; rdev 495 net/wireless/core.c device_enable_async_suspend(&rdev->wiphy.dev); rdev 497 net/wireless/core.c INIT_WORK(&rdev->destroy_work, cfg80211_destroy_iface_wk); rdev 498 net/wireless/core.c INIT_WORK(&rdev->sched_scan_stop_wk, cfg80211_sched_scan_stop_wk); rdev 499 net/wireless/core.c INIT_WORK(&rdev->sched_scan_res_wk, cfg80211_sched_scan_results_wk); rdev 500 net/wireless/core.c INIT_WORK(&rdev->propagate_radar_detect_wk, rdev 502 net/wireless/core.c INIT_WORK(&rdev->propagate_cac_done_wk, cfg80211_propagate_cac_done_wk); rdev 505 net/wireless/core.c rdev->wiphy.flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; rdev 508 net/wireless/core.c wiphy_net_set(&rdev->wiphy, &init_net); rdev 510 net/wireless/core.c rdev->rfkill_ops.set_block = cfg80211_rfkill_set_block; rdev 511 net/wireless/core.c rdev->rfkill = rfkill_alloc(dev_name(&rdev->wiphy.dev), rdev 512 net/wireless/core.c &rdev->wiphy.dev, RFKILL_TYPE_WLAN, rdev 513 net/wireless/core.c &rdev->rfkill_ops, rdev); rdev 515 net/wireless/core.c if (!rdev->rfkill) { rdev 516 net/wireless/core.c wiphy_free(&rdev->wiphy); rdev 520 net/wireless/core.c INIT_WORK(&rdev->rfkill_block, cfg80211_rfkill_block_work); rdev 521 net/wireless/core.c INIT_WORK(&rdev->conn_work, cfg80211_conn_work); rdev 522 net/wireless/core.c INIT_WORK(&rdev->event_work, cfg80211_event_work); rdev 524 net/wireless/core.c init_waitqueue_head(&rdev->dev_wait); rdev 531 net/wireless/core.c rdev->wiphy.retry_short = 7; rdev 532 net/wireless/core.c rdev->wiphy.retry_long = 4; rdev 533 net/wireless/core.c rdev->wiphy.frag_threshold = (u32) -1; rdev 534 net/wireless/core.c rdev->wiphy.rts_threshold = (u32) -1; rdev 535 net/wireless/core.c rdev->wiphy.coverage_class = 0; rdev 537 net/wireless/core.c rdev->wiphy.max_num_csa_counters = 1; rdev 539 net/wireless/core.c rdev->wiphy.max_sched_scan_plans = 1; rdev 540 net/wireless/core.c rdev->wiphy.max_sched_scan_plan_interval = U32_MAX; rdev 542 net/wireless/core.c return &rdev->wiphy; rdev 648 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 667 net/wireless/core.c (!rdev->ops->tdls_channel_switch || rdev 668 net/wireless/core.c !rdev->ops->tdls_cancel_channel_switch))) rdev 672 net/wireless/core.c (!rdev->ops->start_nan || !rdev->ops->stop_nan || rdev 673 net/wireless/core.c !rdev->ops->add_nan_func || !rdev->ops->del_nan_func || rdev 756 net/wireless/core.c !rdev->ops->set_mac_acl))) rdev 766 net/wireless/core.c if (WARN_ON(wiphy_ext_feature_isset(&rdev->wiphy, rdev 768 net/wireless/core.c (!rdev->ops->set_pmk || !rdev->ops->del_pmk))) rdev 771 net/wireless/core.c if (WARN_ON(!(rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_FW_ROAM) && rdev 772 net/wireless/core.c rdev->ops->update_connect_params)) rdev 861 net/wireless/core.c for (i = 0; i < rdev->wiphy.n_vendor_commands; i++) { rdev 867 net/wireless/core.c if (WARN_ON(!rdev->wiphy.vendor_commands[i].policy)) rdev 869 net/wireless/core.c if (WARN_ON(!rdev->wiphy.vendor_commands[i].doit && rdev 870 net/wireless/core.c !rdev->wiphy.vendor_commands[i].dumpit)) rdev 875 net/wireless/core.c if (WARN_ON(rdev->wiphy.wowlan && rdev->wiphy.wowlan->n_patterns && rdev 876 net/wireless/core.c (!rdev->wiphy.wowlan->pattern_min_len || rdev 877 net/wireless/core.c rdev->wiphy.wowlan->pattern_min_len > rdev 878 net/wireless/core.c rdev->wiphy.wowlan->pattern_max_len))) rdev 885 net/wireless/core.c rdev->wiphy.features |= NL80211_FEATURE_SCAN_FLUSH; rdev 888 net/wireless/core.c res = device_add(&rdev->wiphy.dev); rdev 897 net/wireless/core.c list_add_rcu(&rdev->list, &cfg80211_rdev_list); rdev 901 net/wireless/core.c rdev->wiphy.debugfsdir = debugfs_create_dir(wiphy_name(&rdev->wiphy), rdev 904 net/wireless/core.c cfg80211_debugfs_rdev_add(rdev); rdev 905 net/wireless/core.c nl80211_notify_wiphy(rdev, NL80211_CMD_NEW_WIPHY); rdev 948 net/wireless/core.c rdev->wiphy.registered = true; rdev 951 net/wireless/core.c res = rfkill_register(rdev->rfkill); rdev 953 net/wireless/core.c rfkill_destroy(rdev->rfkill); rdev 954 net/wireless/core.c rdev->rfkill = NULL; rdev 955 net/wireless/core.c wiphy_unregister(&rdev->wiphy); rdev 965 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 967 net/wireless/core.c if (!rdev->ops->rfkill_poll) rdev 969 net/wireless/core.c rdev->rfkill_ops.poll = cfg80211_rfkill_poll; rdev 970 net/wireless/core.c rfkill_resume_polling(rdev->rfkill); rdev 976 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 978 net/wireless/core.c rfkill_pause_polling(rdev->rfkill); rdev 984 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 986 net/wireless/core.c wait_event(rdev->dev_wait, ({ rdev 989 net/wireless/core.c __count = rdev->opencount; rdev 993 net/wireless/core.c if (rdev->rfkill) rdev 994 net/wireless/core.c rfkill_unregister(rdev->rfkill); rdev 997 net/wireless/core.c nl80211_notify_wiphy(rdev, NL80211_CMD_DEL_WIPHY); rdev 998 net/wireless/core.c rdev->wiphy.registered = false; rdev 1000 net/wireless/core.c WARN_ON(!list_empty(&rdev->wiphy.wdev_list)); rdev 1006 net/wireless/core.c debugfs_remove_recursive(rdev->wiphy.debugfsdir); rdev 1007 net/wireless/core.c list_del_rcu(&rdev->list); rdev 1017 net/wireless/core.c device_del(&rdev->wiphy.dev); rdev 1021 net/wireless/core.c flush_work(&rdev->scan_done_wk); rdev 1022 net/wireless/core.c cancel_work_sync(&rdev->conn_work); rdev 1023 net/wireless/core.c flush_work(&rdev->event_work); rdev 1024 net/wireless/core.c cancel_delayed_work_sync(&rdev->dfs_update_channels_wk); rdev 1025 net/wireless/core.c flush_work(&rdev->destroy_work); rdev 1026 net/wireless/core.c flush_work(&rdev->sched_scan_stop_wk); rdev 1027 net/wireless/core.c flush_work(&rdev->mlme_unreg_wk); rdev 1028 net/wireless/core.c flush_work(&rdev->propagate_radar_detect_wk); rdev 1029 net/wireless/core.c flush_work(&rdev->propagate_cac_done_wk); rdev 1032 net/wireless/core.c if (rdev->wiphy.wowlan_config && rdev->ops->set_wakeup) rdev 1033 net/wireless/core.c rdev_set_wakeup(rdev, false); rdev 1035 net/wireless/core.c cfg80211_rdev_free_wowlan(rdev); rdev 1036 net/wireless/core.c cfg80211_rdev_free_coalesce(rdev); rdev 1040 net/wireless/core.c void cfg80211_dev_free(struct cfg80211_registered_device *rdev) rdev 1044 net/wireless/core.c rfkill_destroy(rdev->rfkill); rdev 1045 net/wireless/core.c list_for_each_entry_safe(reg, treg, &rdev->beacon_registrations, list) { rdev 1049 net/wireless/core.c list_for_each_entry_safe(scan, tmp, &rdev->bss_list, list) rdev 1050 net/wireless/core.c cfg80211_put_bss(&rdev->wiphy, &scan->pub); rdev 1051 net/wireless/core.c kfree(rdev); rdev 1062 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 1064 net/wireless/core.c if (rfkill_set_hw_state(rdev->rfkill, blocked)) rdev 1065 net/wireless/core.c schedule_work(&rdev->rfkill_block); rdev 1077 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1083 net/wireless/core.c nl80211_notify_iface(rdev, wdev, NL80211_CMD_DEL_INTERFACE); rdev 1088 net/wireless/core.c rdev->devlist_generation++; rdev 1094 net/wireless/core.c cfg80211_stop_p2p_device(rdev, wdev); rdev 1097 net/wireless/core.c cfg80211_stop_nan(rdev, wdev); rdev 1127 net/wireless/core.c void cfg80211_update_iface_num(struct cfg80211_registered_device *rdev, rdev 1132 net/wireless/core.c rdev->num_running_ifaces += num; rdev 1134 net/wireless/core.c rdev->num_running_monitor_ifaces += num; rdev 1137 net/wireless/core.c void __cfg80211_leave(struct cfg80211_registered_device *rdev, rdev 1150 net/wireless/core.c __cfg80211_leave_ibss(rdev, dev, true); rdev 1154 net/wireless/core.c list_for_each_entry_safe(pos, tmp, &rdev->sched_scan_req_list, rdev 1157 net/wireless/core.c cfg80211_stop_sched_scan_req(rdev, pos, false); rdev 1166 net/wireless/core.c cfg80211_disconnect(rdev, dev, rdev 1170 net/wireless/core.c __cfg80211_leave_mesh(rdev, dev); rdev 1174 net/wireless/core.c __cfg80211_stop_ap(rdev, dev, true); rdev 1177 net/wireless/core.c __cfg80211_leave_ocb(rdev, dev); rdev 1197 net/wireless/core.c void cfg80211_leave(struct cfg80211_registered_device *rdev, rdev 1201 net/wireless/core.c __cfg80211_leave(rdev, wdev); rdev 1208 net/wireless/core.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 1223 net/wireless/core.c queue_work(cfg80211_wq, &rdev->event_work); rdev 1227 net/wireless/core.c void cfg80211_init_wdev(struct cfg80211_registered_device *rdev, rdev 1247 net/wireless/core.c wdev->identifier = ++rdev->wdev_id; rdev 1248 net/wireless/core.c list_add_rcu(&wdev->list, &rdev->wiphy.wdev_list); rdev 1249 net/wireless/core.c rdev->devlist_generation++; rdev 1251 net/wireless/core.c nl80211_notify_iface(rdev, wdev, NL80211_CMD_NEW_INTERFACE); rdev 1259 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 1265 net/wireless/core.c rdev = wiphy_to_rdev(wdev->wiphy); rdev 1282 net/wireless/core.c if (sysfs_create_link(&dev->dev.kobj, &rdev->wiphy.dev.kobj, rdev 1307 net/wireless/core.c cfg80211_init_wdev(rdev, wdev); rdev 1310 net/wireless/core.c cfg80211_leave(rdev, wdev); rdev 1313 net/wireless/core.c cfg80211_update_iface_num(rdev, wdev->iftype, -1); rdev 1314 net/wireless/core.c if (rdev->scan_req && rdev->scan_req->wdev == wdev) { rdev 1315 net/wireless/core.c if (WARN_ON(!rdev->scan_req->notified)) rdev 1316 net/wireless/core.c rdev->scan_req->info.aborted = true; rdev 1317 net/wireless/core.c ___cfg80211_scan_done(rdev, false); rdev 1321 net/wireless/core.c &rdev->sched_scan_req_list, list) { rdev 1323 net/wireless/core.c cfg80211_stop_sched_scan_req(rdev, pos, false); rdev 1326 net/wireless/core.c rdev->opencount--; rdev 1327 net/wireless/core.c wake_up(&rdev->dev_wait); rdev 1330 net/wireless/core.c cfg80211_update_iface_num(rdev, wdev->iftype, 1); rdev 1335 net/wireless/core.c cfg80211_ibss_wext_join(rdev, wdev); rdev 1338 net/wireless/core.c cfg80211_mgd_wext_connect(rdev, wdev); rdev 1352 net/wireless/core.c __cfg80211_join_mesh(rdev, dev, rdev 1362 net/wireless/core.c rdev->opencount++; rdev 1370 net/wireless/core.c rdev->ops->set_power_mgmt && rdev 1371 net/wireless/core.c rdev_set_power_mgmt(rdev, dev, wdev->ps, rdev 1414 net/wireless/core.c if (rfkill_blocked(rdev->rfkill)) rdev 1432 net/wireless/core.c struct cfg80211_registered_device *rdev; rdev 1435 net/wireless/core.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 1436 net/wireless/core.c if (net_eq(wiphy_net(&rdev->wiphy), net)) rdev 1437 net/wireless/core.c WARN_ON(cfg80211_switch_netns(rdev, &init_net)); rdev 119 net/wireless/core.h cfg80211_rdev_free_wowlan(struct cfg80211_registered_device *rdev) rdev 124 net/wireless/core.h if (!rdev->wiphy.wowlan_config) rdev 126 net/wireless/core.h for (i = 0; i < rdev->wiphy.wowlan_config->n_patterns; i++) rdev 127 net/wireless/core.h kfree(rdev->wiphy.wowlan_config->patterns[i].mask); rdev 128 net/wireless/core.h kfree(rdev->wiphy.wowlan_config->patterns); rdev 129 net/wireless/core.h if (rdev->wiphy.wowlan_config->tcp && rdev 130 net/wireless/core.h rdev->wiphy.wowlan_config->tcp->sock) rdev 131 net/wireless/core.h sock_release(rdev->wiphy.wowlan_config->tcp->sock); rdev 132 net/wireless/core.h kfree(rdev->wiphy.wowlan_config->tcp); rdev 133 net/wireless/core.h kfree(rdev->wiphy.wowlan_config->nd_config); rdev 134 net/wireless/core.h kfree(rdev->wiphy.wowlan_config); rdev 138 net/wireless/core.h static inline u64 cfg80211_assign_cookie(struct cfg80211_registered_device *rdev) rdev 140 net/wireless/core.h u64 r = ++rdev->cookie_counter; rdev 143 net/wireless/core.h r = ++rdev->cookie_counter; rdev 210 net/wireless/core.h int cfg80211_switch_netns(struct cfg80211_registered_device *rdev, rdev 213 net/wireless/core.h void cfg80211_init_wdev(struct cfg80211_registered_device *rdev, rdev 232 net/wireless/core.h static inline bool cfg80211_has_monitors_only(struct cfg80211_registered_device *rdev) rdev 236 net/wireless/core.h return rdev->num_running_ifaces == rdev->num_running_monitor_ifaces && rdev 237 net/wireless/core.h rdev->num_running_ifaces > 0; rdev 296 net/wireless/core.h void cfg80211_destroy_ifaces(struct cfg80211_registered_device *rdev); rdev 299 net/wireless/core.h void cfg80211_dev_free(struct cfg80211_registered_device *rdev); rdev 301 net/wireless/core.h int cfg80211_dev_rename(struct cfg80211_registered_device *rdev, rdev 306 net/wireless/core.h void cfg80211_bss_expire(struct cfg80211_registered_device *rdev); rdev 307 net/wireless/core.h void cfg80211_bss_age(struct cfg80211_registered_device *rdev, rdev 313 net/wireless/core.h int __cfg80211_join_ibss(struct cfg80211_registered_device *rdev, rdev 318 net/wireless/core.h int __cfg80211_leave_ibss(struct cfg80211_registered_device *rdev, rdev 320 net/wireless/core.h int cfg80211_leave_ibss(struct cfg80211_registered_device *rdev, rdev 324 net/wireless/core.h int cfg80211_ibss_wext_join(struct cfg80211_registered_device *rdev, rdev 330 net/wireless/core.h int __cfg80211_join_mesh(struct cfg80211_registered_device *rdev, rdev 334 net/wireless/core.h int __cfg80211_leave_mesh(struct cfg80211_registered_device *rdev, rdev 336 net/wireless/core.h int cfg80211_leave_mesh(struct cfg80211_registered_device *rdev, rdev 338 net/wireless/core.h int cfg80211_set_mesh_channel(struct cfg80211_registered_device *rdev, rdev 343 net/wireless/core.h int __cfg80211_join_ocb(struct cfg80211_registered_device *rdev, rdev 346 net/wireless/core.h int cfg80211_join_ocb(struct cfg80211_registered_device *rdev, rdev 349 net/wireless/core.h int __cfg80211_leave_ocb(struct cfg80211_registered_device *rdev, rdev 351 net/wireless/core.h int cfg80211_leave_ocb(struct cfg80211_registered_device *rdev, rdev 355 net/wireless/core.h int __cfg80211_stop_ap(struct cfg80211_registered_device *rdev, rdev 357 net/wireless/core.h int cfg80211_stop_ap(struct cfg80211_registered_device *rdev, rdev 361 net/wireless/core.h int cfg80211_mlme_auth(struct cfg80211_registered_device *rdev, rdev 370 net/wireless/core.h int cfg80211_mlme_assoc(struct cfg80211_registered_device *rdev, rdev 376 net/wireless/core.h int cfg80211_mlme_deauth(struct cfg80211_registered_device *rdev, rdev 380 net/wireless/core.h int cfg80211_mlme_disassoc(struct cfg80211_registered_device *rdev, rdev 384 net/wireless/core.h void cfg80211_mlme_down(struct cfg80211_registered_device *rdev, rdev 392 net/wireless/core.h int cfg80211_mlme_mgmt_tx(struct cfg80211_registered_device *rdev, rdev 402 net/wireless/core.h int cfg80211_connect(struct cfg80211_registered_device *rdev, rdev 412 net/wireless/core.h int cfg80211_disconnect(struct cfg80211_registered_device *rdev, rdev 418 net/wireless/core.h int cfg80211_mgd_wext_connect(struct cfg80211_registered_device *rdev, rdev 435 net/wireless/core.h int cfg80211_validate_key_settings(struct cfg80211_registered_device *rdev, rdev 439 net/wireless/core.h void ___cfg80211_scan_done(struct cfg80211_registered_device *rdev, rdev 441 net/wireless/core.h void cfg80211_add_sched_scan_req(struct cfg80211_registered_device *rdev, rdev 443 net/wireless/core.h int cfg80211_sched_scan_req_possible(struct cfg80211_registered_device *rdev, rdev 446 net/wireless/core.h int cfg80211_stop_sched_scan_req(struct cfg80211_registered_device *rdev, rdev 449 net/wireless/core.h int __cfg80211_stop_sched_scan(struct cfg80211_registered_device *rdev, rdev 452 net/wireless/core.h int cfg80211_change_iface(struct cfg80211_registered_device *rdev, rdev 455 net/wireless/core.h void cfg80211_process_rdev_events(struct cfg80211_registered_device *rdev); rdev 486 net/wireless/core.h void cfg80211_sched_dfs_chan_update(struct cfg80211_registered_device *rdev); rdev 512 net/wireless/core.h int cfg80211_set_monitor_channel(struct cfg80211_registered_device *rdev, rdev 519 net/wireless/core.h int cfg80211_validate_beacon_int(struct cfg80211_registered_device *rdev, rdev 522 net/wireless/core.h void cfg80211_update_iface_num(struct cfg80211_registered_device *rdev, rdev 525 net/wireless/core.h void __cfg80211_leave(struct cfg80211_registered_device *rdev, rdev 527 net/wireless/core.h void cfg80211_leave(struct cfg80211_registered_device *rdev, rdev 530 net/wireless/core.h void cfg80211_stop_p2p_device(struct cfg80211_registered_device *rdev, rdev 533 net/wireless/core.h void cfg80211_stop_nan(struct cfg80211_registered_device *rdev, rdev 537 net/wireless/core.h cfg80211_bss_update(struct cfg80211_registered_device *rdev, rdev 103 net/wireless/debugfs.c debugfs_create_file(#name, 0444, phyd, &rdev->wiphy, &name## _ops) rdev 105 net/wireless/debugfs.c void cfg80211_debugfs_rdev_add(struct cfg80211_registered_device *rdev) rdev 107 net/wireless/debugfs.c struct dentry *phyd = rdev->wiphy.debugfsdir; rdev 6 net/wireless/debugfs.h void cfg80211_debugfs_rdev_add(struct cfg80211_registered_device *rdev); rdev 9 net/wireless/debugfs.h void cfg80211_debugfs_rdev_add(struct cfg80211_registered_device *rdev) {} rdev 63 net/wireless/ibss.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 83 net/wireless/ibss.c queue_work(cfg80211_wq, &rdev->event_work); rdev 87 net/wireless/ibss.c int __cfg80211_join_ibss(struct cfg80211_registered_device *rdev, rdev 119 net/wireless/ibss.c sband = rdev->wiphy.bands[band]; rdev 144 net/wireless/ibss.c err = rdev_join_ibss(rdev, dev, params); rdev 159 net/wireless/ibss.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 167 net/wireless/ibss.c rdev_set_qos_map(rdev, dev, NULL); rdev 173 net/wireless/ibss.c if (rdev->ops->del_key) rdev 175 net/wireless/ibss.c rdev_del_key(rdev, dev, i, false, NULL); rdev 189 net/wireless/ibss.c cfg80211_sched_dfs_chan_update(rdev); rdev 201 net/wireless/ibss.c int __cfg80211_leave_ibss(struct cfg80211_registered_device *rdev, rdev 212 net/wireless/ibss.c err = rdev_leave_ibss(rdev, dev); rdev 223 net/wireless/ibss.c int cfg80211_leave_ibss(struct cfg80211_registered_device *rdev, rdev 230 net/wireless/ibss.c err = __cfg80211_leave_ibss(rdev, dev, nowext); rdev 237 net/wireless/ibss.c int cfg80211_ibss_wext_join(struct cfg80211_registered_device *rdev, rdev 257 net/wireless/ibss.c sband = rdev->wiphy.bands[band]; rdev 301 net/wireless/ibss.c err = __cfg80211_join_ibss(rdev, wdev->netdev, rdev 314 net/wireless/ibss.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 322 net/wireless/ibss.c if (!rdev->ops->join_ibss) rdev 344 net/wireless/ibss.c err = __cfg80211_leave_ibss(rdev, dev, true); rdev 360 net/wireless/ibss.c err = cfg80211_ibss_wext_join(rdev, wdev); rdev 399 net/wireless/ibss.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 407 net/wireless/ibss.c if (!rdev->ops->join_ibss) rdev 413 net/wireless/ibss.c err = __cfg80211_leave_ibss(rdev, dev, true); rdev 428 net/wireless/ibss.c err = cfg80211_ibss_wext_join(rdev, wdev); rdev 466 net/wireless/ibss.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 474 net/wireless/ibss.c if (!rdev->ops->join_ibss) rdev 499 net/wireless/ibss.c err = __cfg80211_leave_ibss(rdev, dev, true); rdev 512 net/wireless/ibss.c err = cfg80211_ibss_wext_join(rdev, wdev); rdev 97 net/wireless/mesh.c int __cfg80211_join_mesh(struct cfg80211_registered_device *rdev, rdev 112 net/wireless/mesh.c if (!(rdev->wiphy.flags & WIPHY_FLAG_MESH_AUTH) && rdev 122 net/wireless/mesh.c if (!rdev->ops->join_mesh) rdev 139 net/wireless/mesh.c sband = rdev->wiphy.bands[band]; rdev 172 net/wireless/mesh.c rdev->wiphy.bands[setup->chandef.chan->band]; rdev 197 net/wireless/mesh.c err = cfg80211_chandef_dfs_required(&rdev->wiphy, rdev 205 net/wireless/mesh.c if (!cfg80211_reg_can_beacon(&rdev->wiphy, &setup->chandef, rdev 209 net/wireless/mesh.c err = rdev_join_mesh(rdev, dev, conf, setup); rdev 220 net/wireless/mesh.c int cfg80211_set_mesh_channel(struct cfg80211_registered_device *rdev, rdev 233 net/wireless/mesh.c if (rdev->ops->libertas_set_mesh_channel) { rdev 240 net/wireless/mesh.c err = rdev_libertas_set_mesh_channel(rdev, wdev->netdev, rdev 255 net/wireless/mesh.c int __cfg80211_leave_mesh(struct cfg80211_registered_device *rdev, rdev 266 net/wireless/mesh.c if (!rdev->ops->leave_mesh) rdev 272 net/wireless/mesh.c err = rdev_leave_mesh(rdev, dev); rdev 278 net/wireless/mesh.c rdev_set_qos_map(rdev, dev, NULL); rdev 279 net/wireless/mesh.c cfg80211_sched_dfs_chan_update(rdev); rdev 285 net/wireless/mesh.c int cfg80211_leave_mesh(struct cfg80211_registered_device *rdev, rdev 292 net/wireless/mesh.c err = __cfg80211_leave_mesh(rdev, dev); rdev 29 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 58 net/wireless/mlme.c nl80211_send_rx_assoc(rdev, dev, buf, len, GFP_KERNEL, uapsd_queues, rdev 68 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 70 net/wireless/mlme.c nl80211_send_rx_auth(rdev, wdev->netdev, buf, len, GFP_KERNEL); rdev 77 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 83 net/wireless/mlme.c nl80211_send_deauth(rdev, wdev->netdev, buf, len, GFP_KERNEL); rdev 96 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 102 net/wireless/mlme.c nl80211_send_disassoc(rdev, wdev->netdev, buf, len, GFP_KERNEL); rdev 137 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 141 net/wireless/mlme.c nl80211_send_auth_timeout(rdev, dev, addr, GFP_KERNEL); rdev 150 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 154 net/wireless/mlme.c nl80211_send_assoc_timeout(rdev, dev, bss->bssid, GFP_KERNEL); rdev 198 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 216 net/wireless/mlme.c nl80211_michael_mic_failure(rdev, dev, addr, key_type, key_id, tsc, gfp); rdev 221 net/wireless/mlme.c int cfg80211_mlme_auth(struct cfg80211_registered_device *rdev, rdev 254 net/wireless/mlme.c req.bss = cfg80211_get_bss(&rdev->wiphy, chan, bssid, ssid, ssid_len, rdev 260 net/wireless/mlme.c err = rdev_auth(rdev, dev, &req); rdev 262 net/wireless/mlme.c cfg80211_put_bss(&rdev->wiphy, req.bss); rdev 300 net/wireless/mlme.c int cfg80211_mlme_assoc(struct cfg80211_registered_device *rdev, rdev 318 net/wireless/mlme.c rdev->wiphy.ht_capa_mod_mask); rdev 320 net/wireless/mlme.c rdev->wiphy.vht_capa_mod_mask); rdev 322 net/wireless/mlme.c req->bss = cfg80211_get_bss(&rdev->wiphy, chan, bssid, ssid, ssid_len, rdev 328 net/wireless/mlme.c err = rdev_assoc(rdev, dev, req); rdev 332 net/wireless/mlme.c cfg80211_put_bss(&rdev->wiphy, req->bss); rdev 337 net/wireless/mlme.c int cfg80211_mlme_deauth(struct cfg80211_registered_device *rdev, rdev 363 net/wireless/mlme.c return rdev_deauth(rdev, dev, &req); rdev 366 net/wireless/mlme.c int cfg80211_mlme_disassoc(struct cfg80211_registered_device *rdev, rdev 390 net/wireless/mlme.c err = rdev_disassoc(rdev, dev, &req); rdev 399 net/wireless/mlme.c void cfg80211_mlme_down(struct cfg80211_registered_device *rdev, rdev 407 net/wireless/mlme.c if (!rdev->ops->deauth) rdev 414 net/wireless/mlme.c cfg80211_mlme_deauth(rdev, dev, bssid, NULL, 0, rdev 432 net/wireless/mlme.c cfg80211_process_mlme_unregistrations(struct cfg80211_registered_device *rdev) rdev 438 net/wireless/mlme.c spin_lock_bh(&rdev->mlme_unreg_lock); rdev 439 net/wireless/mlme.c while ((reg = list_first_entry_or_null(&rdev->mlme_unreg, rdev 443 net/wireless/mlme.c spin_unlock_bh(&rdev->mlme_unreg_lock); rdev 445 net/wireless/mlme.c if (rdev->ops->mgmt_frame_register) { rdev 448 net/wireless/mlme.c rdev_mgmt_frame_register(rdev, reg->wdev, rdev 454 net/wireless/mlme.c spin_lock_bh(&rdev->mlme_unreg_lock); rdev 456 net/wireless/mlme.c spin_unlock_bh(&rdev->mlme_unreg_lock); rdev 461 net/wireless/mlme.c struct cfg80211_registered_device *rdev; rdev 463 net/wireless/mlme.c rdev = container_of(wk, struct cfg80211_registered_device, rdev 467 net/wireless/mlme.c cfg80211_process_mlme_unregistrations(rdev); rdev 476 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 526 net/wireless/mlme.c cfg80211_process_mlme_unregistrations(rdev); rdev 528 net/wireless/mlme.c if (rdev->ops->mgmt_frame_register) rdev 529 net/wireless/mlme.c rdev_mgmt_frame_register(rdev, wdev, frame_type, true); rdev 542 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 552 net/wireless/mlme.c spin_lock(&rdev->mlme_unreg_lock); rdev 553 net/wireless/mlme.c list_add_tail(®->list, &rdev->mlme_unreg); rdev 554 net/wireless/mlme.c spin_unlock(&rdev->mlme_unreg_lock); rdev 556 net/wireless/mlme.c schedule_work(&rdev->mlme_unreg_wk); rdev 561 net/wireless/mlme.c if (nlportid && rdev->crit_proto_nlportid == nlportid) { rdev 562 net/wireless/mlme.c rdev->crit_proto_nlportid = 0; rdev 563 net/wireless/mlme.c rdev_crit_proto_stop(rdev, wdev); rdev 572 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 575 net/wireless/mlme.c spin_lock(&rdev->mlme_unreg_lock); rdev 576 net/wireless/mlme.c list_splice_tail_init(&wdev->mgmt_registrations, &rdev->mlme_unreg); rdev 577 net/wireless/mlme.c spin_unlock(&rdev->mlme_unreg_lock); rdev 580 net/wireless/mlme.c cfg80211_process_mlme_unregistrations(rdev); rdev 583 net/wireless/mlme.c int cfg80211_mlme_mgmt_tx(struct cfg80211_registered_device *rdev, rdev 593 net/wireless/mlme.c if (!rdev->ops->mgmt_tx) rdev 685 net/wireless/mlme.c &rdev->wiphy, rdev 690 net/wireless/mlme.c &rdev->wiphy, rdev 696 net/wireless/mlme.c return rdev_mgmt_tx(rdev, wdev, params, cookie); rdev 703 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 741 net/wireless/mlme.c if (nl80211_send_mgmt(rdev, wdev, reg->nlportid, rdev 757 net/wireless/mlme.c void cfg80211_sched_dfs_chan_update(struct cfg80211_registered_device *rdev) rdev 759 net/wireless/mlme.c cancel_delayed_work(&rdev->dfs_update_channels_wk); rdev 760 net/wireless/mlme.c queue_delayed_work(cfg80211_wq, &rdev->dfs_update_channels_wk, 0); rdev 766 net/wireless/mlme.c struct cfg80211_registered_device *rdev; rdev 777 net/wireless/mlme.c rdev = container_of(delayed_work, struct cfg80211_registered_device, rdev 779 net/wireless/mlme.c wiphy = &rdev->wiphy; rdev 819 net/wireless/mlme.c nl80211_radar_notify(rdev, &chandef, rdev 840 net/wireless/mlme.c queue_delayed_work(cfg80211_wq, &rdev->dfs_update_channels_wk, rdev 849 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 859 net/wireless/mlme.c cfg80211_sched_dfs_chan_update(rdev); rdev 861 net/wireless/mlme.c nl80211_radar_notify(rdev, chandef, NL80211_RADAR_DETECTED, NULL, gfp); rdev 863 net/wireless/mlme.c memcpy(&rdev->radar_chandef, chandef, sizeof(struct cfg80211_chan_def)); rdev 864 net/wireless/mlme.c queue_work(cfg80211_wq, &rdev->propagate_radar_detect_wk); rdev 874 net/wireless/mlme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 891 net/wireless/mlme.c memcpy(&rdev->cac_done_chandef, chandef, rdev 893 net/wireless/mlme.c queue_work(cfg80211_wq, &rdev->propagate_cac_done_wk); rdev 894 net/wireless/mlme.c cfg80211_sched_dfs_chan_update(rdev); rdev 907 net/wireless/mlme.c nl80211_radar_notify(rdev, chandef, event, netdev, gfp); rdev 33 net/wireless/nl80211.c static int nl80211_crypto_settings(struct cfg80211_registered_device *rdev, rdev 68 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 88 net/wireless/nl80211.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 91 net/wireless/nl80211.c if (wiphy_net(&rdev->wiphy) != netns) rdev 94 net/wireless/nl80211.c if (have_wdev_id && rdev->wiphy_idx != wiphy_idx) rdev 97 net/wireless/nl80211.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 121 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = NULL, *tmp; rdev 132 net/wireless/nl80211.c rdev = cfg80211_rdev_by_wiphy_idx( rdev 153 net/wireless/nl80211.c if (rdev && tmp != rdev) rdev 155 net/wireless/nl80211.c rdev = tmp; rdev 175 net/wireless/nl80211.c if (rdev && tmp != rdev) rdev 178 net/wireless/nl80211.c rdev = tmp; rdev 182 net/wireless/nl80211.c if (!rdev) rdev 185 net/wireless/nl80211.c if (netns != wiphy_net(&rdev->wiphy)) rdev 188 net/wireless/nl80211.c return rdev; rdev 801 net/wireless/nl80211.c struct cfg80211_registered_device **rdev, rdev 828 net/wireless/nl80211.c *rdev = wiphy_to_rdev((*wdev)->wiphy); rdev 830 net/wireless/nl80211.c cb->args[0] = (*rdev)->wiphy_idx + 1; rdev 839 net/wireless/nl80211.c *rdev = wiphy_to_rdev(wiphy); rdev 842 net/wireless/nl80211.c list_for_each_entry(tmp, &(*rdev)->wiphy.wdev_list, list) { rdev 1195 net/wireless/nl80211.c nl80211_parse_connkeys(struct cfg80211_registered_device *rdev, rdev 1245 net/wireless/nl80211.c err = cfg80211_validate_key_settings(rdev, &parse.p, rdev 1416 net/wireless/nl80211.c static int nl80211_send_wowlan_tcp_caps(struct cfg80211_registered_device *rdev, rdev 1419 net/wireless/nl80211.c const struct wiphy_wowlan_tcp_support *tcp = rdev->wiphy.wowlan->tcp; rdev 1458 net/wireless/nl80211.c struct cfg80211_registered_device *rdev, rdev 1463 net/wireless/nl80211.c if (!rdev->wiphy.wowlan) rdev 1471 net/wireless/nl80211.c if (((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_ANY) && rdev 1473 net/wireless/nl80211.c ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_DISCONNECT) && rdev 1475 net/wireless/nl80211.c ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_MAGIC_PKT) && rdev 1477 net/wireless/nl80211.c ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_SUPPORTS_GTK_REKEY) && rdev 1479 net/wireless/nl80211.c ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_GTK_REKEY_FAILURE) && rdev 1481 net/wireless/nl80211.c ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_EAP_IDENTITY_REQ) && rdev 1483 net/wireless/nl80211.c ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_4WAY_HANDSHAKE) && rdev 1485 net/wireless/nl80211.c ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_RFKILL_RELEASE) && rdev 1489 net/wireless/nl80211.c if (rdev->wiphy.wowlan->n_patterns) { rdev 1491 net/wireless/nl80211.c .max_patterns = rdev->wiphy.wowlan->n_patterns, rdev 1492 net/wireless/nl80211.c .min_pattern_len = rdev->wiphy.wowlan->pattern_min_len, rdev 1493 net/wireless/nl80211.c .max_pattern_len = rdev->wiphy.wowlan->pattern_max_len, rdev 1494 net/wireless/nl80211.c .max_pkt_offset = rdev->wiphy.wowlan->max_pkt_offset, rdev 1502 net/wireless/nl80211.c if ((rdev->wiphy.wowlan->flags & WIPHY_WOWLAN_NET_DETECT) && rdev 1504 net/wireless/nl80211.c rdev->wiphy.wowlan->max_nd_match_sets)) rdev 1507 net/wireless/nl80211.c if (large && nl80211_send_wowlan_tcp_caps(rdev, msg)) rdev 1517 net/wireless/nl80211.c struct cfg80211_registered_device *rdev) rdev 1521 net/wireless/nl80211.c if (!rdev->wiphy.coalesce) rdev 1524 net/wireless/nl80211.c rule.max_rules = rdev->wiphy.coalesce->n_rules; rdev 1525 net/wireless/nl80211.c rule.max_delay = rdev->wiphy.coalesce->max_delay; rdev 1526 net/wireless/nl80211.c rule.pat.max_patterns = rdev->wiphy.coalesce->n_patterns; rdev 1527 net/wireless/nl80211.c rule.pat.min_pattern_len = rdev->wiphy.coalesce->pattern_min_len; rdev 1528 net/wireless/nl80211.c rule.pat.max_pattern_len = rdev->wiphy.coalesce->pattern_max_len; rdev 1529 net/wireless/nl80211.c rule.pat.max_pkt_offset = rdev->wiphy.coalesce->max_pkt_offset; rdev 1719 net/wireless/nl80211.c if (rdev->ops->op) { \ rdev 1726 net/wireless/nl80211.c static int nl80211_add_commands_unsplit(struct cfg80211_registered_device *rdev, rdev 1753 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL) rdev 1758 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_NETNS_OK) { rdev 1763 net/wireless/nl80211.c if (rdev->ops->set_monitor_channel || rdev->ops->start_ap || rdev 1764 net/wireless/nl80211.c rdev->ops->join_mesh) { rdev 1770 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_TDLS) { rdev 1774 net/wireless/nl80211.c if (rdev->wiphy.max_sched_scan_reqs) rdev 1778 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_REPORTS_OBSS) { rdev 1789 net/wireless/nl80211.c if (rdev->ops->connect || rdev->ops->auth) { rdev 1795 net/wireless/nl80211.c if (rdev->ops->disconnect || rdev->ops->deauth) { rdev 1849 net/wireless/nl80211.c static int nl80211_send_pmsr_capa(struct cfg80211_registered_device *rdev, rdev 1852 net/wireless/nl80211.c const struct cfg80211_pmsr_capabilities *cap = rdev->wiphy.pmsr_capa; rdev 1898 net/wireless/nl80211.c static int nl80211_send_wiphy(struct cfg80211_registered_device *rdev, rdev 1911 net/wireless/nl80211.c rdev->wiphy.mgmt_stypes; rdev 1921 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 1923 net/wireless/nl80211.c wiphy_name(&rdev->wiphy)) || rdev 1934 net/wireless/nl80211.c rdev->wiphy.retry_short) || rdev 1936 net/wireless/nl80211.c rdev->wiphy.retry_long) || rdev 1938 net/wireless/nl80211.c rdev->wiphy.frag_threshold) || rdev 1940 net/wireless/nl80211.c rdev->wiphy.rts_threshold) || rdev 1942 net/wireless/nl80211.c rdev->wiphy.coverage_class) || rdev 1944 net/wireless/nl80211.c rdev->wiphy.max_scan_ssids) || rdev 1946 net/wireless/nl80211.c rdev->wiphy.max_sched_scan_ssids) || rdev 1948 net/wireless/nl80211.c rdev->wiphy.max_scan_ie_len) || rdev 1950 net/wireless/nl80211.c rdev->wiphy.max_sched_scan_ie_len) || rdev 1952 net/wireless/nl80211.c rdev->wiphy.max_match_sets) || rdev 1954 net/wireless/nl80211.c rdev->wiphy.max_sched_scan_plans) || rdev 1956 net/wireless/nl80211.c rdev->wiphy.max_sched_scan_plan_interval) || rdev 1958 net/wireless/nl80211.c rdev->wiphy.max_sched_scan_plan_iterations)) rdev 1961 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_IBSS_RSN) && rdev 1964 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_MESH_AUTH) && rdev 1967 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_AP_UAPSD) && rdev 1970 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_FW_ROAM) && rdev 1973 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_TDLS) && rdev 1976 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_TDLS_EXTERNAL_SETUP) && rdev 1985 net/wireless/nl80211.c sizeof(u32) * rdev->wiphy.n_cipher_suites, rdev 1986 net/wireless/nl80211.c rdev->wiphy.cipher_suites)) rdev 1990 net/wireless/nl80211.c rdev->wiphy.max_num_pmkids)) rdev 1993 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_CONTROL_PORT_PROTOCOL) && rdev 1998 net/wireless/nl80211.c rdev->wiphy.available_antennas_tx) || rdev 2000 net/wireless/nl80211.c rdev->wiphy.available_antennas_rx)) rdev 2003 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD) && rdev 2005 net/wireless/nl80211.c rdev->wiphy.probe_resp_offload)) rdev 2008 net/wireless/nl80211.c if ((rdev->wiphy.available_antennas_tx || rdev 2009 net/wireless/nl80211.c rdev->wiphy.available_antennas_rx) && rdev 2010 net/wireless/nl80211.c rdev->ops->get_antenna) { rdev 2014 net/wireless/nl80211.c res = rdev_get_antenna(rdev, &tx_ant, &rx_ant); rdev 2032 net/wireless/nl80211.c rdev->wiphy.interface_modes)) rdev 2048 net/wireless/nl80211.c sband = rdev->wiphy.bands[band]; rdev 2083 net/wireless/nl80211.c msg, &rdev->wiphy, chan, rdev 2126 net/wireless/nl80211.c i = nl80211_add_commands_unsplit(rdev, msg); rdev 2132 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_HAS_CHANNEL_SWITCH) rdev 2135 net/wireless/nl80211.c if (rdev->wiphy.features & rdev 2150 net/wireless/nl80211.c if (rdev->ops->remain_on_channel && rdev 2151 net/wireless/nl80211.c (rdev->wiphy.flags & WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL) && rdev 2154 net/wireless/nl80211.c rdev->wiphy.max_remain_on_channel_duration)) rdev 2157 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_OFFCHAN_TX) && rdev 2169 net/wireless/nl80211.c if (nl80211_send_wowlan(msg, rdev, state->split)) rdev 2180 net/wireless/nl80211.c rdev->wiphy.software_iftypes)) rdev 2183 net/wireless/nl80211.c if (nl80211_put_iface_combinations(&rdev->wiphy, msg, rdev 2192 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_HAVE_AP_SME) && rdev 2194 net/wireless/nl80211.c rdev->wiphy.ap_sme_capa)) rdev 2197 net/wireless/nl80211.c features = rdev->wiphy.features; rdev 2208 net/wireless/nl80211.c if (rdev->wiphy.ht_capa_mod_mask && rdev 2210 net/wireless/nl80211.c sizeof(*rdev->wiphy.ht_capa_mod_mask), rdev 2211 net/wireless/nl80211.c rdev->wiphy.ht_capa_mod_mask)) rdev 2214 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_HAVE_AP_SME && rdev 2215 net/wireless/nl80211.c rdev->wiphy.max_acl_mac_addrs && rdev 2217 net/wireless/nl80211.c rdev->wiphy.max_acl_mac_addrs)) rdev 2233 net/wireless/nl80211.c if (rdev->wiphy.extended_capabilities && rdev 2235 net/wireless/nl80211.c rdev->wiphy.extended_capabilities_len, rdev 2236 net/wireless/nl80211.c rdev->wiphy.extended_capabilities) || rdev 2238 net/wireless/nl80211.c rdev->wiphy.extended_capabilities_len, rdev 2239 net/wireless/nl80211.c rdev->wiphy.extended_capabilities_mask))) rdev 2242 net/wireless/nl80211.c if (rdev->wiphy.vht_capa_mod_mask && rdev 2244 net/wireless/nl80211.c sizeof(*rdev->wiphy.vht_capa_mod_mask), rdev 2245 net/wireless/nl80211.c rdev->wiphy.vht_capa_mod_mask)) rdev 2249 net/wireless/nl80211.c rdev->wiphy.perm_addr)) rdev 2252 net/wireless/nl80211.c if (!is_zero_ether_addr(rdev->wiphy.addr_mask) && rdev 2254 net/wireless/nl80211.c rdev->wiphy.addr_mask)) rdev 2257 net/wireless/nl80211.c if (rdev->wiphy.n_addresses > 1) { rdev 2264 net/wireless/nl80211.c for (i = 0; i < rdev->wiphy.n_addresses; i++) rdev 2266 net/wireless/nl80211.c rdev->wiphy.addresses[i].addr)) rdev 2275 net/wireless/nl80211.c if (nl80211_send_coalesce(msg, rdev)) rdev 2278 net/wireless/nl80211.c if ((rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_5_10_MHZ) && rdev 2283 net/wireless/nl80211.c if (rdev->wiphy.max_ap_assoc_sta && rdev 2285 net/wireless/nl80211.c rdev->wiphy.max_ap_assoc_sta)) rdev 2291 net/wireless/nl80211.c if (rdev->wiphy.n_vendor_commands) { rdev 2300 net/wireless/nl80211.c for (i = 0; i < rdev->wiphy.n_vendor_commands; i++) { rdev 2301 net/wireless/nl80211.c info = &rdev->wiphy.vendor_commands[i].info; rdev 2308 net/wireless/nl80211.c if (rdev->wiphy.n_vendor_events) { rdev 2317 net/wireless/nl80211.c for (i = 0; i < rdev->wiphy.n_vendor_events; i++) { rdev 2318 net/wireless/nl80211.c info = &rdev->wiphy.vendor_events[i]; rdev 2327 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_HAS_CHANNEL_SWITCH && rdev 2329 net/wireless/nl80211.c rdev->wiphy.max_num_csa_counters)) rdev 2332 net/wireless/nl80211.c if (rdev->wiphy.regulatory_flags & REGULATORY_WIPHY_SELF_MANAGED && rdev 2336 net/wireless/nl80211.c if (rdev->wiphy.max_sched_scan_reqs && rdev 2338 net/wireless/nl80211.c rdev->wiphy.max_sched_scan_reqs)) rdev 2342 net/wireless/nl80211.c sizeof(rdev->wiphy.ext_features), rdev 2343 net/wireless/nl80211.c rdev->wiphy.ext_features)) rdev 2346 net/wireless/nl80211.c if (rdev->wiphy.bss_select_support) { rdev 2348 net/wireless/nl80211.c u32 bss_select_support = rdev->wiphy.bss_select_support; rdev 2369 net/wireless/nl80211.c if (rdev->wiphy.num_iftype_ext_capab && rdev 2370 net/wireless/nl80211.c rdev->wiphy.iftype_ext_capab) { rdev 2379 net/wireless/nl80211.c i < rdev->wiphy.num_iftype_ext_capab; i++) { rdev 2382 net/wireless/nl80211.c capab = &rdev->wiphy.iftype_ext_capab[i]; rdev 2402 net/wireless/nl80211.c if (i < rdev->wiphy.num_iftype_ext_capab) { rdev 2409 net/wireless/nl80211.c rdev->wiphy.nan_supported_bands)) rdev 2412 net/wireless/nl80211.c if (wiphy_ext_feature_isset(&rdev->wiphy, rdev 2417 net/wireless/nl80211.c res = rdev_get_txq_stats(rdev, NULL, &txqstats); rdev 2424 net/wireless/nl80211.c rdev->wiphy.txq_limit)) rdev 2427 net/wireless/nl80211.c rdev->wiphy.txq_memory_limit)) rdev 2430 net/wireless/nl80211.c rdev->wiphy.txq_quantum)) rdev 2437 net/wireless/nl80211.c if (nl80211_send_pmsr_capa(rdev, msg)) rdev 2443 net/wireless/nl80211.c if (rdev->wiphy.akm_suites && rdev 2445 net/wireless/nl80211.c sizeof(u32) * rdev->wiphy.n_akm_suites, rdev 2446 net/wireless/nl80211.c rdev->wiphy.akm_suites)) rdev 2489 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 2498 net/wireless/nl80211.c rdev = wiphy_to_rdev( rdev 2500 net/wireless/nl80211.c state->filter_wiphy = rdev->wiphy_idx; rdev 2514 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 2533 net/wireless/nl80211.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 2534 net/wireless/nl80211.c if (!net_eq(wiphy_net(&rdev->wiphy), sock_net(skb->sk))) rdev 2539 net/wireless/nl80211.c state->filter_wiphy != rdev->wiphy_idx) rdev 2543 net/wireless/nl80211.c ret = nl80211_send_wiphy(rdev, NL80211_CMD_NEW_WIPHY, rdev 2592 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 2599 net/wireless/nl80211.c if (nl80211_send_wiphy(rdev, NL80211_CMD_NEW_WIPHY, msg, rdev 2663 net/wireless/nl80211.c int nl80211_parse_chandef(struct cfg80211_registered_device *rdev, rdev 2678 net/wireless/nl80211.c chandef->chan = ieee80211_get_channel(&rdev->wiphy, control_freq); rdev 2753 net/wireless/nl80211.c if (!cfg80211_chandef_usable(&rdev->wiphy, chandef, rdev 2761 net/wireless/nl80211.c !(rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_5_10_MHZ)) { rdev 2769 net/wireless/nl80211.c static int __nl80211_set_channel(struct cfg80211_registered_device *rdev, rdev 2785 net/wireless/nl80211.c result = nl80211_parse_chandef(rdev, info, &chandef); rdev 2792 net/wireless/nl80211.c if (!cfg80211_reg_can_beacon_relax(&rdev->wiphy, &chandef, rdev 2798 net/wireless/nl80211.c if (!dev || !rdev->ops->set_ap_chanwidth || rdev 2799 net/wireless/nl80211.c !(rdev->wiphy.features & rdev 2810 net/wireless/nl80211.c result = rdev_set_ap_chanwidth(rdev, dev, &chandef); rdev 2818 net/wireless/nl80211.c result = cfg80211_set_mesh_channel(rdev, wdev, &chandef); rdev 2821 net/wireless/nl80211.c result = cfg80211_set_monitor_channel(rdev, &chandef); rdev 2832 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 2835 net/wireless/nl80211.c return __nl80211_set_channel(rdev, netdev, info); rdev 2840 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 2851 net/wireless/nl80211.c if (!rdev->ops->set_wds_peer) rdev 2858 net/wireless/nl80211.c return rdev_set_wds_peer(rdev, dev, bssid); rdev 2863 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 2891 net/wireless/nl80211.c rdev = wiphy_to_rdev(netdev->ieee80211_ptr->wiphy); rdev 2897 net/wireless/nl80211.c rdev = __cfg80211_rdev_from_attrs(genl_info_net(info), rdev 2899 net/wireless/nl80211.c if (IS_ERR(rdev)) rdev 2900 net/wireless/nl80211.c return PTR_ERR(rdev); rdev 2914 net/wireless/nl80211.c rdev, nla_data(info->attrs[NL80211_ATTR_WIPHY_NAME])); rdev 2923 net/wireless/nl80211.c if (!rdev->ops->set_txq_params) rdev 2950 net/wireless/nl80211.c result = rdev_set_txq_params(rdev, netdev, rdev 2959 net/wireless/nl80211.c rdev, rdev 2971 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_VIF_TXPOWER)) rdev 2974 net/wireless/nl80211.c if (!rdev->ops->set_tx_power) rdev 2989 net/wireless/nl80211.c result = rdev_set_tx_power(rdev, txp_wdev, type, mbm); rdev 2998 net/wireless/nl80211.c if ((!rdev->wiphy.available_antennas_tx && rdev 2999 net/wireless/nl80211.c !rdev->wiphy.available_antennas_rx) || rdev 3000 net/wireless/nl80211.c !rdev->ops->set_antenna) rdev 3008 net/wireless/nl80211.c if ((~tx_ant && (tx_ant & ~rdev->wiphy.available_antennas_tx)) || rdev 3009 net/wireless/nl80211.c (~rx_ant && (rx_ant & ~rdev->wiphy.available_antennas_rx))) rdev 3012 net/wireless/nl80211.c tx_ant = tx_ant & rdev->wiphy.available_antennas_tx; rdev 3013 net/wireless/nl80211.c rx_ant = rx_ant & rdev->wiphy.available_antennas_rx; rdev 3015 net/wireless/nl80211.c result = rdev_set_antenna(rdev, tx_ant, rx_ant); rdev 3070 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_ACKTO_ESTIMATION)) rdev 3077 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 3086 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 3095 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 3109 net/wireless/nl80211.c if (!rdev->ops->set_wiphy_params) rdev 3112 net/wireless/nl80211.c old_retry_short = rdev->wiphy.retry_short; rdev 3113 net/wireless/nl80211.c old_retry_long = rdev->wiphy.retry_long; rdev 3114 net/wireless/nl80211.c old_frag_threshold = rdev->wiphy.frag_threshold; rdev 3115 net/wireless/nl80211.c old_rts_threshold = rdev->wiphy.rts_threshold; rdev 3116 net/wireless/nl80211.c old_coverage_class = rdev->wiphy.coverage_class; rdev 3117 net/wireless/nl80211.c old_txq_limit = rdev->wiphy.txq_limit; rdev 3118 net/wireless/nl80211.c old_txq_memory_limit = rdev->wiphy.txq_memory_limit; rdev 3119 net/wireless/nl80211.c old_txq_quantum = rdev->wiphy.txq_quantum; rdev 3122 net/wireless/nl80211.c rdev->wiphy.retry_short = retry_short; rdev 3124 net/wireless/nl80211.c rdev->wiphy.retry_long = retry_long; rdev 3126 net/wireless/nl80211.c rdev->wiphy.frag_threshold = frag_threshold; rdev 3128 net/wireless/nl80211.c rdev->wiphy.rts_threshold = rts_threshold; rdev 3130 net/wireless/nl80211.c rdev->wiphy.coverage_class = coverage_class; rdev 3132 net/wireless/nl80211.c rdev->wiphy.txq_limit = txq_limit; rdev 3134 net/wireless/nl80211.c rdev->wiphy.txq_memory_limit = txq_memory_limit; rdev 3136 net/wireless/nl80211.c rdev->wiphy.txq_quantum = txq_quantum; rdev 3138 net/wireless/nl80211.c result = rdev_set_wiphy_params(rdev, changed); rdev 3140 net/wireless/nl80211.c rdev->wiphy.retry_short = old_retry_short; rdev 3141 net/wireless/nl80211.c rdev->wiphy.retry_long = old_retry_long; rdev 3142 net/wireless/nl80211.c rdev->wiphy.frag_threshold = old_frag_threshold; rdev 3143 net/wireless/nl80211.c rdev->wiphy.rts_threshold = old_rts_threshold; rdev 3144 net/wireless/nl80211.c rdev->wiphy.coverage_class = old_coverage_class; rdev 3145 net/wireless/nl80211.c rdev->wiphy.txq_limit = old_txq_limit; rdev 3146 net/wireless/nl80211.c rdev->wiphy.txq_memory_limit = old_txq_memory_limit; rdev 3147 net/wireless/nl80211.c rdev->wiphy.txq_quantum = old_txq_quantum; rdev 3185 net/wireless/nl80211.c struct cfg80211_registered_device *rdev, rdev 3205 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 3211 net/wireless/nl80211.c rdev->devlist_generation ^ rdev 3216 net/wireless/nl80211.c if (rdev->ops->get_channel) { rdev 3220 net/wireless/nl80211.c ret = rdev_get_channel(rdev, wdev, &chandef); rdev 3227 net/wireless/nl80211.c if (rdev->ops->get_tx_power) { rdev 3230 net/wireless/nl80211.c ret = rdev_get_tx_power(rdev, wdev, &dbm); rdev 3265 net/wireless/nl80211.c if (rdev->ops->get_txq_stats) { rdev 3267 net/wireless/nl80211.c int ret = rdev_get_txq_stats(rdev, wdev, &txqstats); rdev 3294 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 3322 net/wireless/nl80211.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 3323 net/wireless/nl80211.c if (!net_eq(wiphy_net(&rdev->wiphy), sock_net(skb->sk))) rdev 3330 net/wireless/nl80211.c if (filter_wiphy >= 0 && filter_wiphy != rdev->wiphy_idx) rdev 3335 net/wireless/nl80211.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 3342 net/wireless/nl80211.c rdev, wdev, rdev 3365 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3373 net/wireless/nl80211.c rdev, wdev, NL80211_CMD_NEW_INTERFACE) < 0) { rdev 3412 net/wireless/nl80211.c static int nl80211_parse_mon_options(struct cfg80211_registered_device *rdev, rdev 3433 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_ACTIVE_MONITOR)) rdev 3443 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, cap_flag)) rdev 3464 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, cap_flag)) rdev 3475 net/wireless/nl80211.c static int nl80211_valid_4addr(struct cfg80211_registered_device *rdev, rdev 3487 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_4ADDR_AP) rdev 3491 net/wireless/nl80211.c if (rdev->wiphy.flags & WIPHY_FLAG_4ADDR_STATION) rdev 3503 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3541 net/wireless/nl80211.c err = nl80211_valid_4addr(rdev, dev, params.use_4addr, ntype); rdev 3548 net/wireless/nl80211.c err = nl80211_parse_mon_options(rdev, ntype, info, ¶ms); rdev 3555 net/wireless/nl80211.c err = cfg80211_change_iface(rdev, dev, ntype, ¶ms); rdev 3565 net/wireless/nl80211.c nl80211_notify_iface(rdev, wdev, NL80211_CMD_SET_INTERFACE); rdev 3573 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3581 net/wireless/nl80211.c cfg80211_destroy_ifaces(rdev); rdev 3591 net/wireless/nl80211.c if (!rdev->ops->add_virtual_intf) rdev 3595 net/wireless/nl80211.c rdev->wiphy.features & NL80211_FEATURE_MAC_ON_CREATE) && rdev 3605 net/wireless/nl80211.c err = nl80211_valid_4addr(rdev, NULL, params.use_4addr, type); rdev 3610 net/wireless/nl80211.c if (!cfg80211_iftype_allowed(&rdev->wiphy, type, params.use_4addr, 0)) rdev 3613 net/wireless/nl80211.c err = nl80211_parse_mon_options(rdev, type, info, ¶ms); rdev 3621 net/wireless/nl80211.c wdev = rdev_add_virtual_intf(rdev, rdev 3654 net/wireless/nl80211.c cfg80211_init_wdev(rdev, wdev); rdev 3661 net/wireless/nl80211.c rdev, wdev, NL80211_CMD_NEW_INTERFACE) < 0) { rdev 3671 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3674 net/wireless/nl80211.c if (!rdev->ops->del_virtual_intf) rdev 3687 net/wireless/nl80211.c return rdev_del_virtual_intf(rdev, wdev); rdev 3692 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3699 net/wireless/nl80211.c if (!rdev->ops->set_noack_map) rdev 3704 net/wireless/nl80211.c return rdev_set_noack_map(rdev, dev, noack_map); rdev 3756 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3784 net/wireless/nl80211.c if (!rdev->ops->get_key) rdev 3787 net/wireless/nl80211.c if (!pairwise && mac_addr && !(rdev->wiphy.flags & WIPHY_FLAG_IBSS_RSN)) rdev 3809 net/wireless/nl80211.c err = rdev_get_key(rdev, dev, key_idx, pairwise, mac_addr, &cookie, rdev 3830 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3852 net/wireless/nl80211.c if (!rdev->ops->set_default_key) { rdev 3861 net/wireless/nl80211.c err = rdev_set_default_key(rdev, dev, key.idx, rdev 3876 net/wireless/nl80211.c if (!rdev->ops->set_default_mgmt_key) { rdev 3885 net/wireless/nl80211.c err = rdev_set_default_mgmt_key(rdev, dev, key.idx); rdev 3893 net/wireless/nl80211.c wiphy_ext_feature_isset(&rdev->wiphy, rdev 3905 net/wireless/nl80211.c err = rdev_add_key(rdev, dev, key.idx, rdev 3919 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3947 net/wireless/nl80211.c if (!rdev->ops->add_key) rdev 3950 net/wireless/nl80211.c if (cfg80211_validate_key_settings(rdev, &key.p, key.idx, rdev 3958 net/wireless/nl80211.c err = rdev_add_key(rdev, dev, key.idx, rdev 3968 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 3993 net/wireless/nl80211.c if (!rdev->ops->del_key) rdev 4000 net/wireless/nl80211.c !(rdev->wiphy.flags & WIPHY_FLAG_IBSS_RSN)) rdev 4004 net/wireless/nl80211.c err = rdev_del_key(rdev, dev, key.idx, rdev 4088 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 4100 net/wireless/nl80211.c acl = parse_acl_data(&rdev->wiphy, info); rdev 4104 net/wireless/nl80211.c err = rdev_set_mac_acl(rdev, dev, acl); rdev 4241 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 4250 net/wireless/nl80211.c sband = rdev->wiphy.bands[i]; rdev 4281 net/wireless/nl80211.c sband = rdev->wiphy.bands[band]; rdev 4325 net/wireless/nl80211.c if (!(rdev->wiphy.bands[band]->ht_cap.ht_supported || rdev 4326 net/wireless/nl80211.c rdev->wiphy.bands[band]->vht_cap.vht_supported)) rdev 4346 net/wireless/nl80211.c static int validate_beacon_tx_rate(struct cfg80211_registered_device *rdev, rdev 4387 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 4391 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 4395 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 4402 net/wireless/nl80211.c static int nl80211_parse_beacon(struct cfg80211_registered_device *rdev, rdev 4463 net/wireless/nl80211.c wiphy_ext_feature_isset(&rdev->wiphy, rdev 4559 net/wireless/nl80211.c static bool nl80211_get_ap_channel(struct cfg80211_registered_device *rdev, rdev 4565 net/wireless/nl80211.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 4581 net/wireless/nl80211.c static bool nl80211_valid_auth_type(struct cfg80211_registered_device *rdev, rdev 4590 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_SAE) && rdev 4593 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 4601 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_SAE) && rdev 4602 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 4612 net/wireless/nl80211.c &rdev->wiphy, rdev 4634 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 4644 net/wireless/nl80211.c if (!rdev->ops->start_ap) rdev 4658 net/wireless/nl80211.c err = nl80211_parse_beacon(rdev, info->attrs, ¶ms.beacon); rdev 4667 net/wireless/nl80211.c err = cfg80211_validate_beacon_int(rdev, dev->ieee80211_ptr->iftype, rdev 4697 net/wireless/nl80211.c if (!nl80211_valid_auth_type(rdev, params.auth_type, rdev 4703 net/wireless/nl80211.c err = nl80211_crypto_settings(rdev, info, ¶ms.crypto, rdev 4709 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_INACTIVITY_TIMER)) rdev 4721 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_P2P_GO_CTWIN)) rdev 4733 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_P2P_GO_OPPPS)) rdev 4738 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, ¶ms.chandef); rdev 4743 net/wireless/nl80211.c } else if (!nl80211_get_ap_channel(rdev, ¶ms)) rdev 4746 net/wireless/nl80211.c if (!cfg80211_reg_can_beacon_relax(&rdev->wiphy, ¶ms.chandef, rdev 4755 net/wireless/nl80211.c err = validate_beacon_tx_rate(rdev, params.chandef.chan->band, rdev 4768 net/wireless/nl80211.c if (!(rdev->wiphy.features & rdev 4773 net/wireless/nl80211.c if (!(rdev->wiphy.features & rdev 4785 net/wireless/nl80211.c if (params.pbss && !rdev->wiphy.bands[NL80211_BAND_60GHZ]) rdev 4789 net/wireless/nl80211.c params.acl = parse_acl_data(&rdev->wiphy, info); rdev 4810 net/wireless/nl80211.c err = rdev_start_ap(rdev, dev, ¶ms); rdev 4831 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 4841 net/wireless/nl80211.c if (!rdev->ops->change_beacon) rdev 4847 net/wireless/nl80211.c err = nl80211_parse_beacon(rdev, info->attrs, ¶ms); rdev 4852 net/wireless/nl80211.c err = rdev_change_beacon(rdev, dev, ¶ms); rdev 4860 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 4863 net/wireless/nl80211.c return cfg80211_stop_ap(rdev, dev, false); rdev 5065 net/wireless/nl80211.c struct cfg80211_registered_device *rdev, rdev 5125 net/wireless/nl80211.c if (wiphy_ext_feature_isset(&rdev->wiphy, rdev 5129 net/wireless/nl80211.c switch (rdev->wiphy.signal_type) { rdev 5204 net/wireless/nl80211.c if (wiphy_ext_feature_isset(&rdev->wiphy, rdev 5281 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 5288 net/wireless/nl80211.c err = nl80211_prepare_wdev_dump(cb, &rdev, &wdev); rdev 5297 net/wireless/nl80211.c if (!rdev->ops->dump_station) { rdev 5304 net/wireless/nl80211.c err = rdev_dump_station(rdev, wdev->netdev, sta_idx, rdev 5314 net/wireless/nl80211.c rdev, wdev->netdev, mac_addr, rdev 5332 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 5346 net/wireless/nl80211.c if (!rdev->ops->get_station) rdev 5349 net/wireless/nl80211.c err = rdev_get_station(rdev, dev, mac_addr, &sinfo); rdev 5361 net/wireless/nl80211.c rdev, dev, mac_addr, &sinfo) < 0) { rdev 5525 net/wireless/nl80211.c struct cfg80211_registered_device *rdev) rdev 5538 net/wireless/nl80211.c if (!v->ieee80211_ptr || v->ieee80211_ptr->wiphy != &rdev->wiphy) { rdev 5670 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 5674 net/wireless/nl80211.c if (!rdev->ops->set_tx_power || rdev 5675 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 5699 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 5707 net/wireless/nl80211.c if (!rdev->ops->change_station) rdev 5786 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 5799 net/wireless/nl80211.c params.vlan = get_vlan(info, rdev); rdev 5818 net/wireless/nl80211.c err = rdev_change_station(rdev, dev, mac_addr, ¶ms); rdev 5829 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 5839 net/wireless/nl80211.c if (!rdev->ops->add_station) rdev 5927 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 5968 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_AP_UAPSD) || rdev 5980 net/wireless/nl80211.c if (!(rdev->wiphy.features & rdev 6001 net/wireless/nl80211.c params.vlan = get_vlan(info, rdev); rdev 6031 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_TDLS)) rdev 6034 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_TDLS_EXTERNAL_SETUP)) rdev 6048 net/wireless/nl80211.c err = rdev_add_station(rdev, dev, mac_addr, ¶ms); rdev 6057 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6072 net/wireless/nl80211.c if (!rdev->ops->del_station) rdev 6096 net/wireless/nl80211.c return rdev_del_station(rdev, dev, ¶ms); rdev 6163 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 6171 net/wireless/nl80211.c err = nl80211_prepare_wdev_dump(cb, &rdev, &wdev); rdev 6175 net/wireless/nl80211.c if (!rdev->ops->dump_mpath) { rdev 6186 net/wireless/nl80211.c err = rdev_dump_mpath(rdev, wdev->netdev, path_idx, dst, rdev 6212 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6227 net/wireless/nl80211.c if (!rdev->ops->get_mpath) rdev 6233 net/wireless/nl80211.c err = rdev_get_mpath(rdev, dev, dst, next_hop, &pinfo); rdev 6252 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6266 net/wireless/nl80211.c if (!rdev->ops->change_mpath) rdev 6272 net/wireless/nl80211.c return rdev_change_mpath(rdev, dev, dst, next_hop); rdev 6277 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6291 net/wireless/nl80211.c if (!rdev->ops->add_mpath) rdev 6297 net/wireless/nl80211.c return rdev_add_mpath(rdev, dev, dst, next_hop); rdev 6302 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6309 net/wireless/nl80211.c if (!rdev->ops->del_mpath) rdev 6315 net/wireless/nl80211.c return rdev_del_mpath(rdev, dev, dst); rdev 6320 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6335 net/wireless/nl80211.c if (!rdev->ops->get_mpp) rdev 6341 net/wireless/nl80211.c err = rdev_get_mpp(rdev, dev, dst, mpp, &pinfo); rdev 6362 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 6370 net/wireless/nl80211.c err = nl80211_prepare_wdev_dump(cb, &rdev, &wdev); rdev 6374 net/wireless/nl80211.c if (!rdev->ops->dump_mpp) { rdev 6385 net/wireless/nl80211.c err = rdev_dump_mpp(rdev, wdev->netdev, path_idx, dst, rdev 6411 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6454 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_P2P_GO_CTWIN)) rdev 6466 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_P2P_GO_OPPPS)) rdev 6470 net/wireless/nl80211.c if (!rdev->ops->change_bss) rdev 6478 net/wireless/nl80211.c err = rdev_change_bss(rdev, dev, ¶ms); rdev 6537 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6549 net/wireless/nl80211.c if (!rdev->ops->get_mesh_config) rdev 6557 net/wireless/nl80211.c err = rdev_get_mesh_config(rdev, dev, &cur_params); rdev 6852 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6885 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_USERSPACE_MPM)) rdev 6906 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 6916 net/wireless/nl80211.c if (!rdev->ops->update_mesh_config) rdev 6928 net/wireless/nl80211.c err = rdev_update_mesh_config(rdev, dev, mask, &cfg); rdev 6999 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 7016 net/wireless/nl80211.c rdev = cfg80211_get_dev_from_info(genl_info_net(info), info); rdev 7017 net/wireless/nl80211.c if (IS_ERR(rdev)) { rdev 7019 net/wireless/nl80211.c return PTR_ERR(rdev); rdev 7022 net/wireless/nl80211.c wiphy = &rdev->wiphy; rdev 7104 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 7119 net/wireless/nl80211.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 7120 net/wireless/nl80211.c regdom = get_wiphy_regdom(&rdev->wiphy); rdev 7128 net/wireless/nl80211.c NLM_F_MULTI, &rdev->wiphy, regdom); rdev 7503 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 7511 net/wireless/nl80211.c wiphy = &rdev->wiphy; rdev 7516 net/wireless/nl80211.c if (!rdev->ops->scan) rdev 7519 net/wireless/nl80211.c if (rdev->scan_req || rdev->scan_msg) { rdev 7731 net/wireless/nl80211.c request->wiphy = &rdev->wiphy; rdev 7734 net/wireless/nl80211.c rdev->scan_req = request; rdev 7735 net/wireless/nl80211.c err = rdev_scan(rdev, request); rdev 7738 net/wireless/nl80211.c nl80211_send_scan_start(rdev, wdev); rdev 7743 net/wireless/nl80211.c rdev->scan_req = NULL; rdev 7753 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 7756 net/wireless/nl80211.c if (!rdev->ops->abort_scan) rdev 7759 net/wireless/nl80211.c if (rdev->scan_msg) rdev 7762 net/wireless/nl80211.c if (!rdev->scan_req) rdev 7765 net/wireless/nl80211.c rdev_abort_scan(rdev, wdev); rdev 8246 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 8253 net/wireless/nl80211.c if (!rdev->wiphy.max_sched_scan_reqs || !rdev->ops->sched_scan_start) rdev 8257 net/wireless/nl80211.c err = cfg80211_sched_scan_req_possible(rdev, want_multi); rdev 8261 net/wireless/nl80211.c sched_scan_req = nl80211_parse_sched_scan(&rdev->wiphy, wdev, rdev 8263 net/wireless/nl80211.c rdev->wiphy.max_match_sets); rdev 8272 net/wireless/nl80211.c if (want_multi && rdev->wiphy.max_sched_scan_reqs > 1) { rdev 8274 net/wireless/nl80211.c sched_scan_req->reqid = cfg80211_assign_cookie(rdev); rdev 8277 net/wireless/nl80211.c err = rdev_sched_scan_start(rdev, dev, sched_scan_req); rdev 8282 net/wireless/nl80211.c sched_scan_req->wiphy = &rdev->wiphy; rdev 8287 net/wireless/nl80211.c cfg80211_add_sched_scan_req(rdev, sched_scan_req); rdev 8302 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 8305 net/wireless/nl80211.c if (!rdev->wiphy.max_sched_scan_reqs || !rdev->ops->sched_scan_stop) rdev 8310 net/wireless/nl80211.c return __cfg80211_stop_sched_scan(rdev, cookie, false); rdev 8313 net/wireless/nl80211.c req = list_first_or_null_rcu(&rdev->sched_scan_req_list, rdev 8321 net/wireless/nl80211.c return cfg80211_stop_sched_scan_req(rdev, req, false); rdev 8327 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 8340 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &chandef); rdev 8364 net/wireless/nl80211.c if (!rdev->ops->start_radar_detection) rdev 8367 net/wireless/nl80211.c cac_time_ms = cfg80211_chandef_dfs_cac_time(&rdev->wiphy, &chandef); rdev 8371 net/wireless/nl80211.c err = rdev_start_radar_detection(rdev, dev, &chandef, cac_time_ms); rdev 8384 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 8399 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &chandef); rdev 8425 net/wireless/nl80211.c cfg80211_sched_dfs_chan_update(rdev); rdev 8427 net/wireless/nl80211.c rdev->radar_chandef = chandef; rdev 8430 net/wireless/nl80211.c queue_work(cfg80211_wq, &rdev->propagate_radar_detect_wk); rdev 8437 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 8451 net/wireless/nl80211.c if (!rdev->ops->channel_switch || rdev 8452 net/wireless/nl80211.c !(rdev->wiphy.flags & WIPHY_FLAG_HAS_CHANNEL_SWITCH)) rdev 8505 net/wireless/nl80211.c err = nl80211_parse_beacon(rdev, info->attrs, ¶ms.beacon_after); rdev 8515 net/wireless/nl80211.c err = nl80211_parse_beacon(rdev, csa_attrs, ¶ms.beacon_csa); rdev 8527 net/wireless/nl80211.c if (rdev->wiphy.max_num_csa_counters && rdev 8529 net/wireless/nl80211.c rdev->wiphy.max_num_csa_counters)) rdev 8552 net/wireless/nl80211.c if (rdev->wiphy.max_num_csa_counters && rdev 8554 net/wireless/nl80211.c rdev->wiphy.max_num_csa_counters)) rdev 8574 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, ¶ms.chandef); rdev 8578 net/wireless/nl80211.c if (!cfg80211_reg_can_beacon_relax(&rdev->wiphy, ¶ms.chandef, rdev 8600 net/wireless/nl80211.c err = rdev_channel_switch(rdev, dev, ¶ms); rdev 8608 net/wireless/nl80211.c struct cfg80211_registered_device *rdev, rdev 8626 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_GENERATION, rdev->bss_generation)) rdev 8700 net/wireless/nl80211.c switch (rdev->wiphy.signal_type) { rdev 8745 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 8752 net/wireless/nl80211.c err = nl80211_prepare_wdev_dump(cb, &rdev, &wdev); rdev 8759 net/wireless/nl80211.c spin_lock_bh(&rdev->bss_lock); rdev 8768 net/wireless/nl80211.c cfg80211_bss_expire(rdev); rdev 8770 net/wireless/nl80211.c cb->seq = rdev->bss_generation; rdev 8772 net/wireless/nl80211.c list_for_each_entry(scan, &rdev->bss_list, list) { rdev 8777 net/wireless/nl80211.c rdev, wdev, scan) < 0) { rdev 8783 net/wireless/nl80211.c spin_unlock_bh(&rdev->bss_lock); rdev 8870 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 8881 net/wireless/nl80211.c res = nl80211_prepare_wdev_dump(cb, &rdev, &wdev); rdev 8893 net/wireless/nl80211.c if (!rdev->ops->dump_survey) { rdev 8899 net/wireless/nl80211.c res = rdev_dump_survey(rdev, wdev->netdev, survey_idx, &survey); rdev 8938 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 8984 net/wireless/nl80211.c for (i = 0; i < rdev->wiphy.n_cipher_suites; i++) { rdev 8985 net/wireless/nl80211.c if (key.p.cipher == rdev->wiphy.cipher_suites[i]) { rdev 8994 net/wireless/nl80211.c if (!rdev->ops->auth) rdev 9002 net/wireless/nl80211.c chan = nl80211_get_valid_chan(&rdev->wiphy, rdev 9016 net/wireless/nl80211.c if (!nl80211_valid_auth_type(rdev, auth_type, NL80211_CMD_AUTHENTICATE)) rdev 9049 net/wireless/nl80211.c err = cfg80211_mlme_auth(rdev, dev, chan, auth_type, bssid, rdev 9057 net/wireless/nl80211.c static int validate_pae_over_nl80211(struct cfg80211_registered_device *rdev, rdev 9065 net/wireless/nl80211.c if (!rdev->ops->tx_control_port || rdev 9066 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 9073 net/wireless/nl80211.c static int nl80211_crypto_settings(struct cfg80211_registered_device *rdev, rdev 9088 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_CONTROL_PORT_PROTOCOL) && rdev 9097 net/wireless/nl80211.c int r = validate_pae_over_nl80211(rdev, info); rdev 9123 net/wireless/nl80211.c &rdev->wiphy, rdev 9131 net/wireless/nl80211.c if (!cfg80211_supported_cipher_suite(&rdev->wiphy, rdev 9163 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 9170 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 9184 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9200 net/wireless/nl80211.c if (!rdev->ops->assoc) rdev 9209 net/wireless/nl80211.c chan = nl80211_get_valid_chan(&rdev->wiphy, rdev 9267 net/wireless/nl80211.c if (!((rdev->wiphy.features & rdev 9269 net/wireless/nl80211.c (rdev->wiphy.features & NL80211_FEATURE_QUIET)) && rdev 9270 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 9285 net/wireless/nl80211.c err = nl80211_crypto_settings(rdev, info, &req.crypto, 1); rdev 9289 net/wireless/nl80211.c err = cfg80211_mlme_assoc(rdev, dev, chan, bssid, rdev 9307 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9324 net/wireless/nl80211.c if (!rdev->ops->deauth) rdev 9347 net/wireless/nl80211.c err = cfg80211_mlme_deauth(rdev, dev, bssid, ie, ie_len, reason_code, rdev 9355 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9372 net/wireless/nl80211.c if (!rdev->ops->disassoc) rdev 9395 net/wireless/nl80211.c err = cfg80211_mlme_disassoc(rdev, dev, bssid, ie, ie_len, reason_code, rdev 9402 net/wireless/nl80211.c nl80211_parse_mcast_rate(struct cfg80211_registered_device *rdev, rdev 9406 net/wireless/nl80211.c struct wiphy *wiphy = &rdev->wiphy; rdev 9431 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9450 net/wireless/nl80211.c err = cfg80211_validate_beacon_int(rdev, NL80211_IFTYPE_ADHOC, rdev 9455 net/wireless/nl80211.c if (!rdev->ops->join_ibss) rdev 9461 net/wireless/nl80211.c wiphy = &rdev->wiphy; rdev 9477 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &ibss.chandef); rdev 9481 net/wireless/nl80211.c if (!cfg80211_reg_can_beacon(&rdev->wiphy, &ibss.chandef, rdev 9492 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_HT_IBSS)) rdev 9498 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_HT_IBSS)) rdev 9500 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 9539 net/wireless/nl80211.c !nl80211_parse_mcast_rate(rdev, ibss.mcast_rate, rdev 9546 net/wireless/nl80211.c connkeys = nl80211_parse_connkeys(rdev, info, &no_ht); rdev 9561 net/wireless/nl80211.c int r = validate_pae_over_nl80211(rdev, info); rdev 9575 net/wireless/nl80211.c err = __cfg80211_join_ibss(rdev, dev, &ibss, connkeys); rdev 9587 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9590 net/wireless/nl80211.c if (!rdev->ops->leave_ibss) rdev 9596 net/wireless/nl80211.c return cfg80211_leave_ibss(rdev, dev, false); rdev 9601 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9612 net/wireless/nl80211.c if (!rdev->ops->set_mcast_rate) rdev 9621 net/wireless/nl80211.c if (!nl80211_parse_mcast_rate(rdev, mcast_rate, nla_rate)) rdev 9624 net/wireless/nl80211.c err = rdev_set_mcast_rate(rdev, dev, mcast_rate); rdev 9630 net/wireless/nl80211.c __cfg80211_alloc_vendor_skb(struct cfg80211_registered_device *rdev, rdev 9651 net/wireless/nl80211.c if (nla_put_u32(skb, NL80211_ATTR_WIPHY, rdev->wiphy_idx)) rdev 9677 net/wireless/nl80211.c ((void **)skb->cb)[0] = rdev; rdev 9696 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 9716 net/wireless/nl80211.c return __cfg80211_alloc_vendor_skb(rdev, wdev, approxlen, portid, 0, rdev 9723 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = ((void **)skb->cb)[0]; rdev 9736 net/wireless/nl80211.c genlmsg_unicast(wiphy_net(&rdev->wiphy), skb, rdev 9742 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), rdev 9751 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9756 net/wireless/nl80211.c if (!rdev->ops->testmode_cmd) rdev 9764 net/wireless/nl80211.c } else if (wdev->wiphy != &rdev->wiphy) { rdev 9771 net/wireless/nl80211.c rdev->cur_cmd_info = info; rdev 9772 net/wireless/nl80211.c err = rdev_testmode_cmd(rdev, wdev, rdev 9775 net/wireless/nl80211.c rdev->cur_cmd_info = NULL; rdev 9783 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 9799 net/wireless/nl80211.c rdev = cfg80211_rdev_by_wiphy_idx(phy_idx); rdev 9800 net/wireless/nl80211.c if (!rdev) { rdev 9819 net/wireless/nl80211.c rdev = __cfg80211_rdev_from_attrs(sock_net(skb->sk), attrbuf); rdev 9820 net/wireless/nl80211.c if (IS_ERR(rdev)) { rdev 9821 net/wireless/nl80211.c err = PTR_ERR(rdev); rdev 9824 net/wireless/nl80211.c phy_idx = rdev->wiphy_idx; rdev 9835 net/wireless/nl80211.c if (!rdev->ops->testmode_dump) { rdev 9859 net/wireless/nl80211.c err = rdev_testmode_dump(rdev, skb, cb, data, data_len); rdev 9885 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 9901 net/wireless/nl80211.c if (!nl80211_valid_auth_type(rdev, connect.auth_type, rdev 9910 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 9915 net/wireless/nl80211.c err = nl80211_crypto_settings(rdev, info, &connect.crypto, rdev 9924 net/wireless/nl80211.c wiphy = &rdev->wiphy; rdev 9949 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 9982 net/wireless/nl80211.c connkeys = nl80211_parse_connkeys(rdev, info, NULL); rdev 10024 net/wireless/nl80211.c if (!((rdev->wiphy.features & rdev 10026 net/wireless/nl80211.c (rdev->wiphy.features & NL80211_FEATURE_QUIET)) && rdev 10027 net/wireless/nl80211.c !wiphy_ext_feature_isset(&rdev->wiphy, rdev 10036 net/wireless/nl80211.c if (connect.pbss && !rdev->wiphy.bands[NL80211_BAND_60GHZ]) { rdev 10056 net/wireless/nl80211.c if (wiphy_ext_feature_isset(&rdev->wiphy, rdev 10097 net/wireless/nl80211.c err = cfg80211_connect(rdev, dev, &connect, connkeys, rdev 10121 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10129 net/wireless/nl80211.c if (!rdev->ops->update_connect_params) rdev 10138 net/wireless/nl80211.c fils_sk_offload = wiphy_ext_feature_isset(&rdev->wiphy, rdev 10176 net/wireless/nl80211.c if (!nl80211_valid_auth_type(rdev, auth_type, rdev 10192 net/wireless/nl80211.c ret = rdev_update_connect_params(rdev, dev, &connect, changed); rdev 10200 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10222 net/wireless/nl80211.c ret = cfg80211_disconnect(rdev, dev, reason, true); rdev 10229 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10251 net/wireless/nl80211.c if (!net_eq(wiphy_net(&rdev->wiphy), net)) rdev 10252 net/wireless/nl80211.c err = cfg80211_switch_netns(rdev, net); rdev 10260 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10294 net/wireless/nl80211.c wiphy_ext_feature_isset(&rdev->wiphy, rdev 10300 net/wireless/nl80211.c rdev_ops = rdev->ops->set_pmksa; rdev 10303 net/wireless/nl80211.c rdev_ops = rdev->ops->del_pmksa; rdev 10313 net/wireless/nl80211.c return rdev_ops(&rdev->wiphy, dev, &pmksa); rdev 10318 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10325 net/wireless/nl80211.c if (!rdev->ops->flush_pmksa) rdev 10328 net/wireless/nl80211.c return rdev_flush_pmksa(rdev, dev); rdev 10333 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10341 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_TDLS) || rdev 10342 net/wireless/nl80211.c !rdev->ops->tdls_mgmt) rdev 10361 net/wireless/nl80211.c return rdev_tdls_mgmt(rdev, dev, peer, action_code, rdev 10370 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10375 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_TDLS) || rdev 10376 net/wireless/nl80211.c !rdev->ops->tdls_oper) rdev 10386 net/wireless/nl80211.c return rdev_tdls_oper(rdev, dev, peer, operation); rdev 10392 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10408 net/wireless/nl80211.c if (!rdev->ops->remain_on_channel || rdev 10409 net/wireless/nl80211.c !(rdev->wiphy.flags & WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL)) rdev 10417 net/wireless/nl80211.c duration > rdev->wiphy.max_remain_on_channel_duration) rdev 10420 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &chandef); rdev 10447 net/wireless/nl80211.c err = rdev_remain_on_channel(rdev, wdev, chandef.chan, rdev 10471 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10478 net/wireless/nl80211.c if (!rdev->ops->cancel_remain_on_channel) rdev 10483 net/wireless/nl80211.c return rdev_cancel_remain_on_channel(rdev, wdev, cookie); rdev 10490 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10494 net/wireless/nl80211.c if (!rdev->ops->set_bitrate_mask) rdev 10501 net/wireless/nl80211.c return rdev_set_bitrate_mask(rdev, dev, NULL, &mask); rdev 10506 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10532 net/wireless/nl80211.c if (!rdev->ops->mgmt_tx) rdev 10542 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10557 net/wireless/nl80211.c if (!rdev->ops->mgmt_tx) rdev 10578 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_OFFCHAN_TX)) rdev 10587 net/wireless/nl80211.c params.wait > rdev->wiphy.max_remain_on_channel_duration) rdev 10593 net/wireless/nl80211.c if (params.offchan && !(rdev->wiphy.flags & WIPHY_FLAG_OFFCHAN_TX)) rdev 10603 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &chandef); rdev 10653 net/wireless/nl80211.c err = cfg80211_mlme_mgmt_tx(rdev, wdev, ¶ms, &cookie); rdev 10677 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10684 net/wireless/nl80211.c if (!rdev->ops->mgmt_tx_cancel_wait) rdev 10703 net/wireless/nl80211.c return rdev_mgmt_tx_cancel_wait(rdev, wdev, cookie); rdev 10708 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10722 net/wireless/nl80211.c if (!rdev->ops->set_power_mgmt) rdev 10730 net/wireless/nl80211.c err = rdev_set_power_mgmt(rdev, dev, state, wdev->ps_timeout); rdev 10738 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10748 net/wireless/nl80211.c if (!rdev->ops->set_power_mgmt) rdev 10794 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10801 net/wireless/nl80211.c if (!rdev->ops->set_cqm_txe_config) rdev 10808 net/wireless/nl80211.c return rdev_set_cqm_txe_config(rdev, dev, rate, pkts, intvl); rdev 10811 net/wireless/nl80211.c static int cfg80211_cqm_rssi_update(struct cfg80211_registered_device *rdev, rdev 10822 net/wireless/nl80211.c return rdev_set_cqm_rssi_range_config(rdev, dev, 0, 0); rdev 10831 net/wireless/nl80211.c rdev->ops->get_station) { rdev 10837 net/wireless/nl80211.c err = rdev_get_station(rdev, dev, mac_addr, &sinfo); rdev 10871 net/wireless/nl80211.c return rdev_set_cqm_rssi_range_config(rdev, dev, low, high); rdev 10878 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10900 net/wireless/nl80211.c if (n_thresholds <= 1 && rdev->ops->set_cqm_rssi_config) { rdev 10902 net/wireless/nl80211.c return rdev_set_cqm_rssi_config(rdev, dev, 0, 0); rdev 10904 net/wireless/nl80211.c return rdev_set_cqm_rssi_config(rdev, dev, rdev 10908 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 10934 net/wireless/nl80211.c err = cfg80211_cqm_rssi_update(rdev, dev); rdev 10987 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 10992 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &setup.chandef); rdev 10996 net/wireless/nl80211.c return cfg80211_join_ocb(rdev, dev, &setup); rdev 11001 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 11004 net/wireless/nl80211.c return cfg80211_leave_ocb(rdev, dev); rdev 11009 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 11034 net/wireless/nl80211.c !nl80211_parse_mcast_rate(rdev, setup.mcast_rate, rdev 11042 net/wireless/nl80211.c err = cfg80211_validate_beacon_int(rdev, rdev 11067 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &setup.chandef); rdev 11084 net/wireless/nl80211.c sband = rdev->wiphy.bands[setup.chandef.chan->band]; rdev 11100 net/wireless/nl80211.c err = validate_beacon_tx_rate(rdev, setup.chandef.chan->band, rdev 11110 net/wireless/nl80211.c int r = validate_pae_over_nl80211(rdev, info); rdev 11119 net/wireless/nl80211.c err = __cfg80211_join_mesh(rdev, dev, &setup, &cfg); rdev 11129 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 11132 net/wireless/nl80211.c return cfg80211_leave_mesh(rdev, dev); rdev 11137 net/wireless/nl80211.c struct cfg80211_registered_device *rdev) rdev 11139 net/wireless/nl80211.c struct cfg80211_wowlan *wowlan = rdev->wiphy.wowlan_config; rdev 11305 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 11310 net/wireless/nl80211.c if (!rdev->wiphy.wowlan) rdev 11313 net/wireless/nl80211.c if (rdev->wiphy.wowlan_config && rdev->wiphy.wowlan_config->tcp) { rdev 11315 net/wireless/nl80211.c size += rdev->wiphy.wowlan_config->tcp->tokens_size + rdev 11316 net/wireless/nl80211.c rdev->wiphy.wowlan_config->tcp->payload_len + rdev 11317 net/wireless/nl80211.c rdev->wiphy.wowlan_config->tcp->wake_len + rdev 11318 net/wireless/nl80211.c rdev->wiphy.wowlan_config->tcp->wake_len / 8; rdev 11330 net/wireless/nl80211.c if (rdev->wiphy.wowlan_config) { rdev 11338 net/wireless/nl80211.c if ((rdev->wiphy.wowlan_config->any && rdev 11340 net/wireless/nl80211.c (rdev->wiphy.wowlan_config->disconnect && rdev 11342 net/wireless/nl80211.c (rdev->wiphy.wowlan_config->magic_pkt && rdev 11344 net/wireless/nl80211.c (rdev->wiphy.wowlan_config->gtk_rekey_failure && rdev 11346 net/wireless/nl80211.c (rdev->wiphy.wowlan_config->eap_identity_req && rdev 11348 net/wireless/nl80211.c (rdev->wiphy.wowlan_config->four_way_handshake && rdev 11350 net/wireless/nl80211.c (rdev->wiphy.wowlan_config->rfkill_release && rdev 11354 net/wireless/nl80211.c if (nl80211_send_wowlan_patterns(msg, rdev)) rdev 11358 net/wireless/nl80211.c rdev->wiphy.wowlan_config->tcp)) rdev 11363 net/wireless/nl80211.c rdev->wiphy.wowlan_config->nd_config)) rdev 11377 net/wireless/nl80211.c static int nl80211_parse_wowlan_tcp(struct cfg80211_registered_device *rdev, rdev 11389 net/wireless/nl80211.c if (!rdev->wiphy.wowlan->tcp) rdev 11408 net/wireless/nl80211.c if (data_size > rdev->wiphy.wowlan->tcp->data_payload_max) rdev 11412 net/wireless/nl80211.c rdev->wiphy.wowlan->tcp->data_interval_max || rdev 11417 net/wireless/nl80211.c if (wake_size > rdev->wiphy.wowlan->tcp->wake_payload_max) rdev 11432 net/wireless/nl80211.c if (!rdev->wiphy.wowlan->tcp->tok) rdev 11434 net/wireless/nl80211.c if (tok->len > rdev->wiphy.wowlan->tcp->tok->max_len) rdev 11436 net/wireless/nl80211.c if (tok->len < rdev->wiphy.wowlan->tcp->tok->min_len) rdev 11438 net/wireless/nl80211.c if (tokens_size > rdev->wiphy.wowlan->tcp->tok->bufsize) rdev 11446 net/wireless/nl80211.c if (!rdev->wiphy.wowlan->tcp->seq) rdev 11472 net/wireless/nl80211.c err = __sock_create(wiphy_net(&rdev->wiphy), PF_INET, SOCK_STREAM, rdev 11521 net/wireless/nl80211.c static int nl80211_parse_wowlan_nd(struct cfg80211_registered_device *rdev, rdev 11543 net/wireless/nl80211.c trig->nd_config = nl80211_parse_sched_scan(&rdev->wiphy, NULL, tb, rdev 11556 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 11560 net/wireless/nl80211.c const struct wiphy_wowlan_support *wowlan = rdev->wiphy.wowlan; rdev 11562 net/wireless/nl80211.c bool prev_enabled = rdev->wiphy.wowlan_config; rdev 11569 net/wireless/nl80211.c cfg80211_rdev_free_wowlan(rdev); rdev 11570 net/wireless/nl80211.c rdev->wiphy.wowlan_config = NULL; rdev 11708 net/wireless/nl80211.c rdev, tb[NL80211_WOWLAN_TRIG_TCP_CONNECTION], rdev 11717 net/wireless/nl80211.c rdev, wowlan, tb[NL80211_WOWLAN_TRIG_NET_DETECT], rdev 11739 net/wireless/nl80211.c cfg80211_rdev_free_wowlan(rdev); rdev 11740 net/wireless/nl80211.c rdev->wiphy.wowlan_config = ntrig; rdev 11743 net/wireless/nl80211.c if (rdev->ops->set_wakeup && rdev 11744 net/wireless/nl80211.c prev_enabled != !!rdev->wiphy.wowlan_config) rdev 11745 net/wireless/nl80211.c rdev_set_wakeup(rdev, rdev->wiphy.wowlan_config); rdev 11761 net/wireless/nl80211.c struct cfg80211_registered_device *rdev) rdev 11767 net/wireless/nl80211.c if (!rdev->coalesce->n_rules) rdev 11774 net/wireless/nl80211.c for (i = 0; i < rdev->coalesce->n_rules; i++) { rdev 11779 net/wireless/nl80211.c rule = &rdev->coalesce->rules[i]; rdev 11818 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 11822 net/wireless/nl80211.c if (!rdev->wiphy.coalesce) rdev 11834 net/wireless/nl80211.c if (rdev->coalesce && nl80211_send_coalesce_rules(msg, rdev)) rdev 11845 net/wireless/nl80211.c void cfg80211_rdev_free_coalesce(struct cfg80211_registered_device *rdev) rdev 11847 net/wireless/nl80211.c struct cfg80211_coalesce *coalesce = rdev->coalesce; rdev 11862 net/wireless/nl80211.c rdev->coalesce = NULL; rdev 11865 net/wireless/nl80211.c static int nl80211_parse_coalesce_rule(struct cfg80211_registered_device *rdev, rdev 11870 net/wireless/nl80211.c const struct wiphy_coalesce_support *coalesce = rdev->wiphy.coalesce; rdev 11958 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 11959 net/wireless/nl80211.c const struct wiphy_coalesce_support *coalesce = rdev->wiphy.coalesce; rdev 11966 net/wireless/nl80211.c if (!rdev->wiphy.coalesce || !rdev->ops->set_coalesce) rdev 11970 net/wireless/nl80211.c cfg80211_rdev_free_coalesce(rdev); rdev 11971 net/wireless/nl80211.c rdev_set_coalesce(rdev, NULL); rdev 11991 net/wireless/nl80211.c err = nl80211_parse_coalesce_rule(rdev, rule, rdev 11999 net/wireless/nl80211.c err = rdev_set_coalesce(rdev, &new_coalesce); rdev 12008 net/wireless/nl80211.c cfg80211_rdev_free_coalesce(rdev); rdev 12009 net/wireless/nl80211.c rdev->coalesce = n_coalesce; rdev 12026 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12062 net/wireless/nl80211.c if (!rdev->ops->set_rekey_data) { rdev 12067 net/wireless/nl80211.c err = rdev_set_rekey_data(rdev, dev, &rekey_data); rdev 12093 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12109 net/wireless/nl80211.c if (!rdev->ops->probe_client) rdev 12125 net/wireless/nl80211.c err = rdev_probe_client(rdev, dev, addr, &cookie); rdev 12146 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12150 net/wireless/nl80211.c if (!(rdev->wiphy.flags & WIPHY_FLAG_REPORTS_OBSS)) rdev 12158 net/wireless/nl80211.c spin_lock_bh(&rdev->beacon_registrations_lock); rdev 12159 net/wireless/nl80211.c list_for_each_entry(reg, &rdev->beacon_registrations, list) { rdev 12167 net/wireless/nl80211.c list_add(&nreg->list, &rdev->beacon_registrations); rdev 12169 net/wireless/nl80211.c spin_unlock_bh(&rdev->beacon_registrations_lock); rdev 12173 net/wireless/nl80211.c spin_unlock_bh(&rdev->beacon_registrations_lock); rdev 12180 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12184 net/wireless/nl80211.c if (!rdev->ops->start_p2p_device) rdev 12193 net/wireless/nl80211.c if (rfkill_blocked(rdev->rfkill)) rdev 12196 net/wireless/nl80211.c err = rdev_start_p2p_device(rdev, wdev); rdev 12201 net/wireless/nl80211.c rdev->opencount++; rdev 12208 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12214 net/wireless/nl80211.c if (!rdev->ops->stop_p2p_device) rdev 12217 net/wireless/nl80211.c cfg80211_stop_p2p_device(rdev, wdev); rdev 12224 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12235 net/wireless/nl80211.c if (rfkill_blocked(rdev->rfkill)) rdev 12256 net/wireless/nl80211.c err = rdev_start_nan(rdev, wdev, &conf); rdev 12261 net/wireless/nl80211.c rdev->opencount++; rdev 12268 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12274 net/wireless/nl80211.c cfg80211_stop_nan(rdev, wdev); rdev 12333 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12361 net/wireless/nl80211.c func->cookie = cfg80211_assign_cookie(rdev); rdev 12538 net/wireless/nl80211.c err = rdev_add_nan_func(rdev, wdev, func); rdev 12572 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12587 net/wireless/nl80211.c rdev_del_nan_func(rdev, wdev, cookie); rdev 12595 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12631 net/wireless/nl80211.c return rdev_nan_change_conf(rdev, wdev, &conf, changed); rdev 12638 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 12656 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 12701 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), rdev 12704 net/wireless/nl80211.c genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, rdev 12720 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 12738 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 12761 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), rdev 12764 net/wireless/nl80211.c genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, rdev 12803 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12807 net/wireless/nl80211.c if (!rdev->ops->update_ft_ies) rdev 12819 net/wireless/nl80211.c return rdev_update_ft_ies(rdev, dev, &ft_params); rdev 12825 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12831 net/wireless/nl80211.c if (!rdev->ops->crit_proto_start) rdev 12834 net/wireless/nl80211.c if (WARN_ON(!rdev->ops->crit_proto_stop)) rdev 12837 net/wireless/nl80211.c if (rdev->crit_proto_nlportid) rdev 12857 net/wireless/nl80211.c ret = rdev_crit_proto_start(rdev, wdev, proto, duration); rdev 12859 net/wireless/nl80211.c rdev->crit_proto_nlportid = info->snd_portid; rdev 12867 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12870 net/wireless/nl80211.c if (!rdev->ops->crit_proto_stop) rdev 12873 net/wireless/nl80211.c if (rdev->crit_proto_nlportid) { rdev 12874 net/wireless/nl80211.c rdev->crit_proto_nlportid = 0; rdev 12875 net/wireless/nl80211.c rdev_crit_proto_stop(rdev, wdev); rdev 12905 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 12911 net/wireless/nl80211.c if (!rdev->wiphy.vendor_commands) rdev 12919 net/wireless/nl80211.c } else if (wdev->wiphy != &rdev->wiphy) { rdev 12929 net/wireless/nl80211.c for (i = 0; i < rdev->wiphy.n_vendor_commands; i++) { rdev 12934 net/wireless/nl80211.c vcmd = &rdev->wiphy.vendor_commands[i]; rdev 12969 net/wireless/nl80211.c rdev->cur_cmd_info = info; rdev 12970 net/wireless/nl80211.c err = vcmd->doit(&rdev->wiphy, wdev, data, len); rdev 12971 net/wireless/nl80211.c rdev->cur_cmd_info = NULL; rdev 12980 net/wireless/nl80211.c struct cfg80211_registered_device **rdev, rdev 12998 net/wireless/nl80211.c *rdev = wiphy_to_rdev(wiphy); rdev 13035 net/wireless/nl80211.c *rdev = __cfg80211_rdev_from_attrs(sock_net(skb->sk), attrbuf); rdev 13036 net/wireless/nl80211.c if (IS_ERR(*rdev)) { rdev 13037 net/wireless/nl80211.c err = PTR_ERR(*rdev); rdev 13044 net/wireless/nl80211.c for (i = 0; i < (*rdev)->wiphy.n_vendor_commands; i++) { rdev 13047 net/wireless/nl80211.c vcmd = &(*rdev)->wiphy.vendor_commands[i]; rdev 13071 net/wireless/nl80211.c &(*rdev)->wiphy.vendor_commands[vcmd_idx], rdev 13079 net/wireless/nl80211.c cb->args[0] = (*rdev)->wiphy_idx + 1; rdev 13096 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 13106 net/wireless/nl80211.c err = nl80211_prepare_vendor_dump(skb, cb, &rdev, &wdev); rdev 13113 net/wireless/nl80211.c vcmd = &rdev->wiphy.vendor_commands[vcmd_idx]; rdev 13142 net/wireless/nl80211.c if (nla_put_u32(skb, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 13157 net/wireless/nl80211.c err = vcmd->dumpit(&rdev->wiphy, wdev, skb, data, data_len, rdev 13183 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 13185 net/wireless/nl80211.c if (WARN_ON(!rdev->cur_cmd_info)) rdev 13188 net/wireless/nl80211.c return __cfg80211_alloc_vendor_skb(rdev, NULL, approxlen, rdev 13189 net/wireless/nl80211.c rdev->cur_cmd_info->snd_portid, rdev 13190 net/wireless/nl80211.c rdev->cur_cmd_info->snd_seq, rdev 13197 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = ((void **)skb->cb)[0]; rdev 13204 net/wireless/nl80211.c if (WARN_ON(!rdev->cur_cmd_info)) { rdev 13211 net/wireless/nl80211.c return genlmsg_reply(skb, rdev->cur_cmd_info); rdev 13217 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 13219 net/wireless/nl80211.c if (WARN_ON(!rdev->cur_cmd_info)) rdev 13222 net/wireless/nl80211.c return rdev->cur_cmd_info->snd_portid; rdev 13229 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13235 net/wireless/nl80211.c if (!rdev->ops->set_qos_map) rdev 13270 net/wireless/nl80211.c ret = rdev_set_qos_map(rdev, dev, qos_map); rdev 13279 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13287 net/wireless/nl80211.c if (!(rdev->wiphy.features & NL80211_FEATURE_SUPPORTS_WMM_ADMISSION)) rdev 13328 net/wireless/nl80211.c err = rdev_add_tx_ts(rdev, dev, tsid, peer, up, admitted_time); rdev 13337 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13351 net/wireless/nl80211.c err = rdev_del_tx_ts(rdev, dev, tsid, peer); rdev 13360 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13368 net/wireless/nl80211.c if (!rdev->ops->tdls_channel_switch || rdev 13369 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_TDLS_CHANNEL_SWITCH)) rdev 13384 net/wireless/nl80211.c err = nl80211_parse_chandef(rdev, info, &chandef); rdev 13399 net/wireless/nl80211.c if (!cfg80211_reg_can_beacon_relax(&rdev->wiphy, &chandef, rdev 13411 net/wireless/nl80211.c err = rdev_tdls_channel_switch(rdev, dev, addr, oper_class, &chandef); rdev 13420 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13425 net/wireless/nl80211.c if (!rdev->ops->tdls_channel_switch || rdev 13426 net/wireless/nl80211.c !rdev->ops->tdls_cancel_channel_switch || rdev 13427 net/wireless/nl80211.c !(rdev->wiphy.features & NL80211_FEATURE_TDLS_CHANNEL_SWITCH)) rdev 13444 net/wireless/nl80211.c rdev_tdls_cancel_channel_switch(rdev, dev, addr); rdev 13453 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13459 net/wireless/nl80211.c if (!rdev->ops->set_multicast_to_unicast) rdev 13469 net/wireless/nl80211.c return rdev_set_multicast_to_unicast(rdev, dev, enabled); rdev 13474 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13484 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 13523 net/wireless/nl80211.c ret = rdev_set_pmk(rdev, dev, &pmk_conf); rdev 13531 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13541 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 13550 net/wireless/nl80211.c ret = rdev_del_pmk(rdev, dev, aa); rdev 13558 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13562 net/wireless/nl80211.c if (!rdev->ops->external_auth) rdev 13596 net/wireless/nl80211.c return rdev_external_auth(rdev, dev, ¶ms); rdev 13601 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13611 net/wireless/nl80211.c if (!wiphy_ext_feature_isset(&rdev->wiphy, rdev 13615 net/wireless/nl80211.c if (!rdev->ops->tx_control_port) rdev 13653 net/wireless/nl80211.c return rdev_tx_control_port(rdev, dev, buf, len, rdev 13664 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13676 net/wireless/nl80211.c err = rdev_get_ftm_responder_stats(rdev, dev, &ftm_stats); rdev 13734 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13738 net/wireless/nl80211.c if (!rdev->ops->update_owe_info) rdev 13754 net/wireless/nl80211.c return rdev_update_owe_info(rdev, dev, &owe_info); rdev 13759 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 13768 net/wireless/nl80211.c if (!rdev->ops->probe_mesh_link || !rdev->ops->get_station) rdev 13791 net/wireless/nl80211.c err = rdev_get_station(rdev, dev, dest, &sinfo); rdev 13797 net/wireless/nl80211.c return rdev_probe_mesh_link(rdev, dev, dest, buf, len); rdev 13815 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 13824 net/wireless/nl80211.c rdev = cfg80211_get_dev_from_info(genl_info_net(info), info); rdev 13825 net/wireless/nl80211.c if (IS_ERR(rdev)) { rdev 13828 net/wireless/nl80211.c return PTR_ERR(rdev); rdev 13830 net/wireless/nl80211.c info->user_ptr[0] = rdev; rdev 13844 net/wireless/nl80211.c rdev = wiphy_to_rdev(wdev->wiphy); rdev 13868 net/wireless/nl80211.c info->user_ptr[0] = rdev; rdev 14775 net/wireless/nl80211.c void nl80211_notify_wiphy(struct cfg80211_registered_device *rdev, rdev 14788 net/wireless/nl80211.c if (nl80211_send_wiphy(rdev, cmd, msg, 0, 0, 0, &state) < 0) { rdev 14793 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 14797 net/wireless/nl80211.c void nl80211_notify_iface(struct cfg80211_registered_device *rdev, rdev 14807 net/wireless/nl80211.c if (nl80211_send_iface(msg, 0, 0, 0, rdev, wdev, cmd) < 0) { rdev 14812 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 14817 net/wireless/nl80211.c struct cfg80211_registered_device *rdev) rdev 14819 net/wireless/nl80211.c struct cfg80211_scan_request *req = rdev->scan_req; rdev 14865 net/wireless/nl80211.c struct cfg80211_registered_device *rdev, rdev 14876 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 14884 net/wireless/nl80211.c nl80211_add_scan_req(msg, rdev); rdev 14919 net/wireless/nl80211.c void nl80211_send_scan_start(struct cfg80211_registered_device *rdev, rdev 14928 net/wireless/nl80211.c if (nl80211_prep_scan_msg(msg, rdev, wdev, 0, 0, 0, rdev 14934 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 14938 net/wireless/nl80211.c struct sk_buff *nl80211_build_scan_msg(struct cfg80211_registered_device *rdev, rdev 14947 net/wireless/nl80211.c if (nl80211_prep_scan_msg(msg, rdev, wdev, 0, 0, 0, rdev 14958 net/wireless/nl80211.c void nl80211_send_scan_msg(struct cfg80211_registered_device *rdev, rdev 14964 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15066 net/wireless/nl80211.c static void nl80211_send_mlme_event(struct cfg80211_registered_device *rdev, rdev 15086 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15108 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15116 net/wireless/nl80211.c void nl80211_send_rx_auth(struct cfg80211_registered_device *rdev, rdev 15120 net/wireless/nl80211.c nl80211_send_mlme_event(rdev, netdev, buf, len, rdev 15124 net/wireless/nl80211.c void nl80211_send_rx_assoc(struct cfg80211_registered_device *rdev, rdev 15129 net/wireless/nl80211.c nl80211_send_mlme_event(rdev, netdev, buf, len, rdev 15134 net/wireless/nl80211.c void nl80211_send_deauth(struct cfg80211_registered_device *rdev, rdev 15138 net/wireless/nl80211.c nl80211_send_mlme_event(rdev, netdev, buf, len, rdev 15142 net/wireless/nl80211.c void nl80211_send_disassoc(struct cfg80211_registered_device *rdev, rdev 15146 net/wireless/nl80211.c nl80211_send_mlme_event(rdev, netdev, buf, len, rdev 15155 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15168 net/wireless/nl80211.c nl80211_send_mlme_event(rdev, dev, buf, len, cmd, GFP_ATOMIC, -1, rdev 15173 net/wireless/nl80211.c static void nl80211_send_mlme_timeout(struct cfg80211_registered_device *rdev, rdev 15190 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15198 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15206 net/wireless/nl80211.c void nl80211_send_auth_timeout(struct cfg80211_registered_device *rdev, rdev 15210 net/wireless/nl80211.c nl80211_send_mlme_timeout(rdev, netdev, NL80211_CMD_AUTHENTICATE, rdev 15214 net/wireless/nl80211.c void nl80211_send_assoc_timeout(struct cfg80211_registered_device *rdev, rdev 15218 net/wireless/nl80211.c nl80211_send_mlme_timeout(rdev, netdev, NL80211_CMD_ASSOCIATE, rdev 15222 net/wireless/nl80211.c void nl80211_send_connect_result(struct cfg80211_registered_device *rdev, rdev 15242 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15273 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15281 net/wireless/nl80211.c void nl80211_send_roamed(struct cfg80211_registered_device *rdev, rdev 15301 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15324 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15332 net/wireless/nl80211.c void nl80211_send_port_authorized(struct cfg80211_registered_device *rdev, rdev 15348 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15355 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15363 net/wireless/nl80211.c void nl80211_send_disconnected(struct cfg80211_registered_device *rdev, rdev 15380 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15391 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15399 net/wireless/nl80211.c void nl80211_send_ibss_bssid(struct cfg80211_registered_device *rdev, rdev 15416 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15423 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15436 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 15455 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15466 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15475 net/wireless/nl80211.c void nl80211_michael_mic_failure(struct cfg80211_registered_device *rdev, rdev 15493 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15504 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15569 net/wireless/nl80211.c int cmd, struct cfg80211_registered_device *rdev, rdev 15587 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15605 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15618 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15622 net/wireless/nl80211.c rdev, wdev, cookie, chan, rdev 15632 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15636 net/wireless/nl80211.c rdev, wdev, cookie, chan, 0, gfp); rdev 15645 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15649 net/wireless/nl80211.c rdev, wdev, cookie, chan, 0, gfp); rdev 15657 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15667 net/wireless/nl80211.c rdev, dev, mac_addr, sinfo) < 0) { rdev 15672 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15681 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15697 net/wireless/nl80211.c rdev, dev, mac_addr, sinfo) < 0) { rdev 15702 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15712 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15733 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15746 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 15764 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15770 net/wireless/nl80211.c genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, nlportid); rdev 15820 net/wireless/nl80211.c int nl80211_send_mgmt(struct cfg80211_registered_device *rdev, rdev 15839 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15854 net/wireless/nl80211.c return genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, nlportid); rdev 15865 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 15882 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15895 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 15909 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 15932 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15949 net/wireless/nl80211.c return genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, nlportid); rdev 15972 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 15987 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 15998 net/wireless/nl80211.c cb[2] = rdev; rdev 16009 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = cb[2]; rdev 16016 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16026 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 16037 net/wireless/nl80211.c cfg80211_cqm_rssi_update(rdev, dev); rdev 16132 net/wireless/nl80211.c static void nl80211_gtk_rekey_notify(struct cfg80211_registered_device *rdev, rdev 16150 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16167 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16180 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16183 net/wireless/nl80211.c nl80211_gtk_rekey_notify(rdev, dev, bssid, replay_ctr, gfp); rdev 16188 net/wireless/nl80211.c nl80211_pmksa_candidate_notify(struct cfg80211_registered_device *rdev, rdev 16206 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16224 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16237 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16240 net/wireless/nl80211.c nl80211_pmksa_candidate_notify(rdev, dev, index, bssid, preauth, gfp); rdev 16244 net/wireless/nl80211.c static void nl80211_ch_switch_notify(struct cfg80211_registered_device *rdev, rdev 16276 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16289 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16302 net/wireless/nl80211.c cfg80211_sched_dfs_chan_update(rdev); rdev 16304 net/wireless/nl80211.c nl80211_ch_switch_notify(rdev, dev, chandef, GFP_KERNEL, rdev 16315 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16319 net/wireless/nl80211.c nl80211_ch_switch_notify(rdev, dev, chandef, GFP_KERNEL, rdev 16325 net/wireless/nl80211.c nl80211_radar_notify(struct cfg80211_registered_device *rdev, rdev 16343 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx)) rdev 16364 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16378 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 16394 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx)) rdev 16417 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16432 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 16449 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16461 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16474 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16481 net/wireless/nl80211.c spin_lock_bh(&rdev->beacon_registrations_lock); rdev 16482 net/wireless/nl80211.c list_for_each_entry(reg, &rdev->beacon_registrations, list) { rdev 16485 net/wireless/nl80211.c spin_unlock_bh(&rdev->beacon_registrations_lock); rdev 16493 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16503 net/wireless/nl80211.c genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, reg->nlportid); rdev 16505 net/wireless/nl80211.c spin_unlock_bh(&rdev->beacon_registrations_lock); rdev 16509 net/wireless/nl80211.c spin_unlock_bh(&rdev->beacon_registrations_lock); rdev 16578 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 16596 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16679 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16694 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 16711 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16721 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16735 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 16744 net/wireless/nl80211.c list_for_each_entry_rcu(rdev, &cfg80211_rdev_list, list) { rdev 16748 net/wireless/nl80211.c &rdev->sched_scan_req_list, rdev 16752 net/wireless/nl80211.c schedule_work(&rdev->sched_scan_stop_wk); rdev 16756 net/wireless/nl80211.c list_for_each_entry_rcu(wdev, &rdev->wiphy.wdev_list, list) { rdev 16761 net/wireless/nl80211.c schedule_work(&rdev->destroy_work); rdev 16769 net/wireless/nl80211.c spin_lock_bh(&rdev->beacon_registrations_lock); rdev 16770 net/wireless/nl80211.c list_for_each_entry_safe(reg, tmp, &rdev->beacon_registrations, rdev 16778 net/wireless/nl80211.c spin_unlock_bh(&rdev->beacon_registrations_lock); rdev 16799 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16817 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16832 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 16842 net/wireless/nl80211.c struct cfg80211_registered_device *rdev; rdev 16847 net/wireless/nl80211.c rdev = wiphy_to_rdev(wdev->wiphy); rdev 16848 net/wireless/nl80211.c if (!rdev->crit_proto_nlportid) rdev 16851 net/wireless/nl80211.c nlportid = rdev->crit_proto_nlportid; rdev 16852 net/wireless/nl80211.c rdev->crit_proto_nlportid = 0; rdev 16862 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16869 net/wireless/nl80211.c genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, nlportid); rdev 16880 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16892 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16912 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 16927 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16938 net/wireless/nl80211.c genlmsg_unicast(wiphy_net(&rdev->wiphy), msg, rdev 16953 net/wireless/nl80211.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 16967 net/wireless/nl80211.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 16978 net/wireless/nl80211.c genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, rdev 28 net/wireless/nl80211.h struct cfg80211_registered_device **rdev, rdev 31 net/wireless/nl80211.h int nl80211_parse_chandef(struct cfg80211_registered_device *rdev, rdev 37 net/wireless/nl80211.h void nl80211_notify_wiphy(struct cfg80211_registered_device *rdev, rdev 39 net/wireless/nl80211.h void nl80211_notify_iface(struct cfg80211_registered_device *rdev, rdev 42 net/wireless/nl80211.h void nl80211_send_scan_start(struct cfg80211_registered_device *rdev, rdev 44 net/wireless/nl80211.h struct sk_buff *nl80211_build_scan_msg(struct cfg80211_registered_device *rdev, rdev 46 net/wireless/nl80211.h void nl80211_send_scan_msg(struct cfg80211_registered_device *rdev, rdev 64 net/wireless/nl80211.h void nl80211_send_rx_auth(struct cfg80211_registered_device *rdev, rdev 67 net/wireless/nl80211.h void nl80211_send_rx_assoc(struct cfg80211_registered_device *rdev, rdev 72 net/wireless/nl80211.h void nl80211_send_deauth(struct cfg80211_registered_device *rdev, rdev 75 net/wireless/nl80211.h void nl80211_send_disassoc(struct cfg80211_registered_device *rdev, rdev 78 net/wireless/nl80211.h void nl80211_send_auth_timeout(struct cfg80211_registered_device *rdev, rdev 81 net/wireless/nl80211.h void nl80211_send_assoc_timeout(struct cfg80211_registered_device *rdev, rdev 84 net/wireless/nl80211.h void nl80211_send_connect_result(struct cfg80211_registered_device *rdev, rdev 88 net/wireless/nl80211.h void nl80211_send_roamed(struct cfg80211_registered_device *rdev, rdev 91 net/wireless/nl80211.h void nl80211_send_port_authorized(struct cfg80211_registered_device *rdev, rdev 93 net/wireless/nl80211.h void nl80211_send_disconnected(struct cfg80211_registered_device *rdev, rdev 98 net/wireless/nl80211.h nl80211_michael_mic_failure(struct cfg80211_registered_device *rdev, rdev 108 net/wireless/nl80211.h void nl80211_send_ibss_bssid(struct cfg80211_registered_device *rdev, rdev 112 net/wireless/nl80211.h int nl80211_send_mgmt(struct cfg80211_registered_device *rdev, rdev 118 net/wireless/nl80211.h nl80211_radar_notify(struct cfg80211_registered_device *rdev, rdev 125 net/wireless/nl80211.h void cfg80211_rdev_free_coalesce(struct cfg80211_registered_device *rdev); rdev 17 net/wireless/ocb.c int __cfg80211_join_ocb(struct cfg80211_registered_device *rdev, rdev 29 net/wireless/ocb.c if (!rdev->ops->join_ocb) rdev 35 net/wireless/ocb.c err = rdev_join_ocb(rdev, dev, setup); rdev 42 net/wireless/ocb.c int cfg80211_join_ocb(struct cfg80211_registered_device *rdev, rdev 50 net/wireless/ocb.c err = __cfg80211_join_ocb(rdev, dev, setup); rdev 56 net/wireless/ocb.c int __cfg80211_leave_ocb(struct cfg80211_registered_device *rdev, rdev 67 net/wireless/ocb.c if (!rdev->ops->leave_ocb) rdev 70 net/wireless/ocb.c err = rdev_leave_ocb(rdev, dev); rdev 77 net/wireless/ocb.c int cfg80211_leave_ocb(struct cfg80211_registered_device *rdev, rdev 84 net/wireless/ocb.c err = __cfg80211_leave_ocb(rdev, dev); rdev 12 net/wireless/pmsr.c static int pmsr_parse_ftm(struct cfg80211_registered_device *rdev, rdev 17 net/wireless/pmsr.c const struct cfg80211_pmsr_capabilities *capa = rdev->wiphy.pmsr_capa; rdev 22 net/wireless/pmsr.c if (!(rdev->wiphy.pmsr_capa->ftm.bandwidths & BIT(out->chandef.width))) { rdev 132 net/wireless/pmsr.c static int pmsr_parse_peer(struct cfg80211_registered_device *rdev, rdev 165 net/wireless/pmsr.c err = nl80211_parse_chandef(rdev, info, &out->chandef); rdev 184 net/wireless/pmsr.c if (out->report_ap_tsf && !rdev->wiphy.pmsr_capa->report_ap_tsf) { rdev 194 net/wireless/pmsr.c err = pmsr_parse_ftm(rdev, treq, out, info); rdev 212 net/wireless/pmsr.c struct cfg80211_registered_device *rdev = info->user_ptr[0]; rdev 218 net/wireless/pmsr.c if (!rdev->wiphy.pmsr_capa) rdev 233 net/wireless/pmsr.c if (count > rdev->wiphy.pmsr_capa->max_peers) { rdev 248 net/wireless/pmsr.c if (!rdev->wiphy.pmsr_capa->randomize_mac_addr) { rdev 268 net/wireless/pmsr.c err = pmsr_parse_peer(rdev, peer, &req->peers[idx], info); rdev 275 net/wireless/pmsr.c req->cookie = cfg80211_assign_cookie(rdev); rdev 278 net/wireless/pmsr.c err = rdev_start_pmsr(rdev, wdev, req); rdev 295 net/wireless/pmsr.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 310 net/wireless/pmsr.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 491 net/wireless/pmsr.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 512 net/wireless/pmsr.c if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || rdev 537 net/wireless/pmsr.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 552 net/wireless/pmsr.c rdev_abort_pmsr(rdev, wdev, req); rdev 10 net/wireless/rdev-ops.h static inline int rdev_suspend(struct cfg80211_registered_device *rdev, rdev 14 net/wireless/rdev-ops.h trace_rdev_suspend(&rdev->wiphy, wowlan); rdev 15 net/wireless/rdev-ops.h ret = rdev->ops->suspend(&rdev->wiphy, wowlan); rdev 16 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 20 net/wireless/rdev-ops.h static inline int rdev_resume(struct cfg80211_registered_device *rdev) rdev 23 net/wireless/rdev-ops.h trace_rdev_resume(&rdev->wiphy); rdev 24 net/wireless/rdev-ops.h ret = rdev->ops->resume(&rdev->wiphy); rdev 25 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 29 net/wireless/rdev-ops.h static inline void rdev_set_wakeup(struct cfg80211_registered_device *rdev, rdev 32 net/wireless/rdev-ops.h trace_rdev_set_wakeup(&rdev->wiphy, enabled); rdev 33 net/wireless/rdev-ops.h rdev->ops->set_wakeup(&rdev->wiphy, enabled); rdev 34 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 38 net/wireless/rdev-ops.h *rdev_add_virtual_intf(struct cfg80211_registered_device *rdev, char *name, rdev 44 net/wireless/rdev-ops.h trace_rdev_add_virtual_intf(&rdev->wiphy, name, type); rdev 45 net/wireless/rdev-ops.h ret = rdev->ops->add_virtual_intf(&rdev->wiphy, name, name_assign_type, rdev 47 net/wireless/rdev-ops.h trace_rdev_return_wdev(&rdev->wiphy, ret); rdev 52 net/wireless/rdev-ops.h rdev_del_virtual_intf(struct cfg80211_registered_device *rdev, rdev 56 net/wireless/rdev-ops.h trace_rdev_del_virtual_intf(&rdev->wiphy, wdev); rdev 57 net/wireless/rdev-ops.h ret = rdev->ops->del_virtual_intf(&rdev->wiphy, wdev); rdev 58 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 63 net/wireless/rdev-ops.h rdev_change_virtual_intf(struct cfg80211_registered_device *rdev, rdev 68 net/wireless/rdev-ops.h trace_rdev_change_virtual_intf(&rdev->wiphy, dev, type); rdev 69 net/wireless/rdev-ops.h ret = rdev->ops->change_virtual_intf(&rdev->wiphy, dev, type, params); rdev 70 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 74 net/wireless/rdev-ops.h static inline int rdev_add_key(struct cfg80211_registered_device *rdev, rdev 80 net/wireless/rdev-ops.h trace_rdev_add_key(&rdev->wiphy, netdev, key_index, pairwise, rdev 82 net/wireless/rdev-ops.h ret = rdev->ops->add_key(&rdev->wiphy, netdev, key_index, pairwise, rdev 84 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 89 net/wireless/rdev-ops.h rdev_get_key(struct cfg80211_registered_device *rdev, struct net_device *netdev, rdev 94 net/wireless/rdev-ops.h trace_rdev_get_key(&rdev->wiphy, netdev, key_index, pairwise, mac_addr); rdev 95 net/wireless/rdev-ops.h ret = rdev->ops->get_key(&rdev->wiphy, netdev, key_index, pairwise, rdev 97 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 101 net/wireless/rdev-ops.h static inline int rdev_del_key(struct cfg80211_registered_device *rdev, rdev 106 net/wireless/rdev-ops.h trace_rdev_del_key(&rdev->wiphy, netdev, key_index, pairwise, mac_addr); rdev 107 net/wireless/rdev-ops.h ret = rdev->ops->del_key(&rdev->wiphy, netdev, key_index, pairwise, rdev 109 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 114 net/wireless/rdev-ops.h rdev_set_default_key(struct cfg80211_registered_device *rdev, rdev 119 net/wireless/rdev-ops.h trace_rdev_set_default_key(&rdev->wiphy, netdev, key_index, rdev 121 net/wireless/rdev-ops.h ret = rdev->ops->set_default_key(&rdev->wiphy, netdev, key_index, rdev 123 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 128 net/wireless/rdev-ops.h rdev_set_default_mgmt_key(struct cfg80211_registered_device *rdev, rdev 132 net/wireless/rdev-ops.h trace_rdev_set_default_mgmt_key(&rdev->wiphy, netdev, key_index); rdev 133 net/wireless/rdev-ops.h ret = rdev->ops->set_default_mgmt_key(&rdev->wiphy, netdev, rdev 135 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 139 net/wireless/rdev-ops.h static inline int rdev_start_ap(struct cfg80211_registered_device *rdev, rdev 144 net/wireless/rdev-ops.h trace_rdev_start_ap(&rdev->wiphy, dev, settings); rdev 145 net/wireless/rdev-ops.h ret = rdev->ops->start_ap(&rdev->wiphy, dev, settings); rdev 146 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 150 net/wireless/rdev-ops.h static inline int rdev_change_beacon(struct cfg80211_registered_device *rdev, rdev 155 net/wireless/rdev-ops.h trace_rdev_change_beacon(&rdev->wiphy, dev, info); rdev 156 net/wireless/rdev-ops.h ret = rdev->ops->change_beacon(&rdev->wiphy, dev, info); rdev 157 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 161 net/wireless/rdev-ops.h static inline int rdev_stop_ap(struct cfg80211_registered_device *rdev, rdev 165 net/wireless/rdev-ops.h trace_rdev_stop_ap(&rdev->wiphy, dev); rdev 166 net/wireless/rdev-ops.h ret = rdev->ops->stop_ap(&rdev->wiphy, dev); rdev 167 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 171 net/wireless/rdev-ops.h static inline int rdev_add_station(struct cfg80211_registered_device *rdev, rdev 176 net/wireless/rdev-ops.h trace_rdev_add_station(&rdev->wiphy, dev, mac, params); rdev 177 net/wireless/rdev-ops.h ret = rdev->ops->add_station(&rdev->wiphy, dev, mac, params); rdev 178 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 182 net/wireless/rdev-ops.h static inline int rdev_del_station(struct cfg80211_registered_device *rdev, rdev 187 net/wireless/rdev-ops.h trace_rdev_del_station(&rdev->wiphy, dev, params); rdev 188 net/wireless/rdev-ops.h ret = rdev->ops->del_station(&rdev->wiphy, dev, params); rdev 189 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 193 net/wireless/rdev-ops.h static inline int rdev_change_station(struct cfg80211_registered_device *rdev, rdev 198 net/wireless/rdev-ops.h trace_rdev_change_station(&rdev->wiphy, dev, mac, params); rdev 199 net/wireless/rdev-ops.h ret = rdev->ops->change_station(&rdev->wiphy, dev, mac, params); rdev 200 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 204 net/wireless/rdev-ops.h static inline int rdev_get_station(struct cfg80211_registered_device *rdev, rdev 209 net/wireless/rdev-ops.h trace_rdev_get_station(&rdev->wiphy, dev, mac); rdev 210 net/wireless/rdev-ops.h ret = rdev->ops->get_station(&rdev->wiphy, dev, mac, sinfo); rdev 211 net/wireless/rdev-ops.h trace_rdev_return_int_station_info(&rdev->wiphy, ret, sinfo); rdev 215 net/wireless/rdev-ops.h static inline int rdev_dump_station(struct cfg80211_registered_device *rdev, rdev 220 net/wireless/rdev-ops.h trace_rdev_dump_station(&rdev->wiphy, dev, idx, mac); rdev 221 net/wireless/rdev-ops.h ret = rdev->ops->dump_station(&rdev->wiphy, dev, idx, mac, sinfo); rdev 222 net/wireless/rdev-ops.h trace_rdev_return_int_station_info(&rdev->wiphy, ret, sinfo); rdev 226 net/wireless/rdev-ops.h static inline int rdev_add_mpath(struct cfg80211_registered_device *rdev, rdev 230 net/wireless/rdev-ops.h trace_rdev_add_mpath(&rdev->wiphy, dev, dst, next_hop); rdev 231 net/wireless/rdev-ops.h ret = rdev->ops->add_mpath(&rdev->wiphy, dev, dst, next_hop); rdev 232 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 236 net/wireless/rdev-ops.h static inline int rdev_del_mpath(struct cfg80211_registered_device *rdev, rdev 240 net/wireless/rdev-ops.h trace_rdev_del_mpath(&rdev->wiphy, dev, dst); rdev 241 net/wireless/rdev-ops.h ret = rdev->ops->del_mpath(&rdev->wiphy, dev, dst); rdev 242 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 246 net/wireless/rdev-ops.h static inline int rdev_change_mpath(struct cfg80211_registered_device *rdev, rdev 251 net/wireless/rdev-ops.h trace_rdev_change_mpath(&rdev->wiphy, dev, dst, next_hop); rdev 252 net/wireless/rdev-ops.h ret = rdev->ops->change_mpath(&rdev->wiphy, dev, dst, next_hop); rdev 253 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 257 net/wireless/rdev-ops.h static inline int rdev_get_mpath(struct cfg80211_registered_device *rdev, rdev 262 net/wireless/rdev-ops.h trace_rdev_get_mpath(&rdev->wiphy, dev, dst, next_hop); rdev 263 net/wireless/rdev-ops.h ret = rdev->ops->get_mpath(&rdev->wiphy, dev, dst, next_hop, pinfo); rdev 264 net/wireless/rdev-ops.h trace_rdev_return_int_mpath_info(&rdev->wiphy, ret, pinfo); rdev 269 net/wireless/rdev-ops.h static inline int rdev_get_mpp(struct cfg80211_registered_device *rdev, rdev 275 net/wireless/rdev-ops.h trace_rdev_get_mpp(&rdev->wiphy, dev, dst, mpp); rdev 276 net/wireless/rdev-ops.h ret = rdev->ops->get_mpp(&rdev->wiphy, dev, dst, mpp, pinfo); rdev 277 net/wireless/rdev-ops.h trace_rdev_return_int_mpath_info(&rdev->wiphy, ret, pinfo); rdev 281 net/wireless/rdev-ops.h static inline int rdev_dump_mpath(struct cfg80211_registered_device *rdev, rdev 287 net/wireless/rdev-ops.h trace_rdev_dump_mpath(&rdev->wiphy, dev, idx, dst, next_hop); rdev 288 net/wireless/rdev-ops.h ret = rdev->ops->dump_mpath(&rdev->wiphy, dev, idx, dst, next_hop, rdev 290 net/wireless/rdev-ops.h trace_rdev_return_int_mpath_info(&rdev->wiphy, ret, pinfo); rdev 294 net/wireless/rdev-ops.h static inline int rdev_dump_mpp(struct cfg80211_registered_device *rdev, rdev 301 net/wireless/rdev-ops.h trace_rdev_dump_mpp(&rdev->wiphy, dev, idx, dst, mpp); rdev 302 net/wireless/rdev-ops.h ret = rdev->ops->dump_mpp(&rdev->wiphy, dev, idx, dst, mpp, pinfo); rdev 303 net/wireless/rdev-ops.h trace_rdev_return_int_mpath_info(&rdev->wiphy, ret, pinfo); rdev 308 net/wireless/rdev-ops.h rdev_get_mesh_config(struct cfg80211_registered_device *rdev, rdev 312 net/wireless/rdev-ops.h trace_rdev_get_mesh_config(&rdev->wiphy, dev); rdev 313 net/wireless/rdev-ops.h ret = rdev->ops->get_mesh_config(&rdev->wiphy, dev, conf); rdev 314 net/wireless/rdev-ops.h trace_rdev_return_int_mesh_config(&rdev->wiphy, ret, conf); rdev 319 net/wireless/rdev-ops.h rdev_update_mesh_config(struct cfg80211_registered_device *rdev, rdev 324 net/wireless/rdev-ops.h trace_rdev_update_mesh_config(&rdev->wiphy, dev, mask, nconf); rdev 325 net/wireless/rdev-ops.h ret = rdev->ops->update_mesh_config(&rdev->wiphy, dev, mask, nconf); rdev 326 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 330 net/wireless/rdev-ops.h static inline int rdev_join_mesh(struct cfg80211_registered_device *rdev, rdev 336 net/wireless/rdev-ops.h trace_rdev_join_mesh(&rdev->wiphy, dev, conf, setup); rdev 337 net/wireless/rdev-ops.h ret = rdev->ops->join_mesh(&rdev->wiphy, dev, conf, setup); rdev 338 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 343 net/wireless/rdev-ops.h static inline int rdev_leave_mesh(struct cfg80211_registered_device *rdev, rdev 347 net/wireless/rdev-ops.h trace_rdev_leave_mesh(&rdev->wiphy, dev); rdev 348 net/wireless/rdev-ops.h ret = rdev->ops->leave_mesh(&rdev->wiphy, dev); rdev 349 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 353 net/wireless/rdev-ops.h static inline int rdev_join_ocb(struct cfg80211_registered_device *rdev, rdev 358 net/wireless/rdev-ops.h trace_rdev_join_ocb(&rdev->wiphy, dev, setup); rdev 359 net/wireless/rdev-ops.h ret = rdev->ops->join_ocb(&rdev->wiphy, dev, setup); rdev 360 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 364 net/wireless/rdev-ops.h static inline int rdev_leave_ocb(struct cfg80211_registered_device *rdev, rdev 368 net/wireless/rdev-ops.h trace_rdev_leave_ocb(&rdev->wiphy, dev); rdev 369 net/wireless/rdev-ops.h ret = rdev->ops->leave_ocb(&rdev->wiphy, dev); rdev 370 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 374 net/wireless/rdev-ops.h static inline int rdev_change_bss(struct cfg80211_registered_device *rdev, rdev 380 net/wireless/rdev-ops.h trace_rdev_change_bss(&rdev->wiphy, dev, params); rdev 381 net/wireless/rdev-ops.h ret = rdev->ops->change_bss(&rdev->wiphy, dev, params); rdev 382 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 386 net/wireless/rdev-ops.h static inline int rdev_set_txq_params(struct cfg80211_registered_device *rdev, rdev 392 net/wireless/rdev-ops.h trace_rdev_set_txq_params(&rdev->wiphy, dev, params); rdev 393 net/wireless/rdev-ops.h ret = rdev->ops->set_txq_params(&rdev->wiphy, dev, params); rdev 394 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 399 net/wireless/rdev-ops.h rdev_libertas_set_mesh_channel(struct cfg80211_registered_device *rdev, rdev 404 net/wireless/rdev-ops.h trace_rdev_libertas_set_mesh_channel(&rdev->wiphy, dev, chan); rdev 405 net/wireless/rdev-ops.h ret = rdev->ops->libertas_set_mesh_channel(&rdev->wiphy, dev, chan); rdev 406 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 411 net/wireless/rdev-ops.h rdev_set_monitor_channel(struct cfg80211_registered_device *rdev, rdev 415 net/wireless/rdev-ops.h trace_rdev_set_monitor_channel(&rdev->wiphy, chandef); rdev 416 net/wireless/rdev-ops.h ret = rdev->ops->set_monitor_channel(&rdev->wiphy, chandef); rdev 417 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 421 net/wireless/rdev-ops.h static inline int rdev_scan(struct cfg80211_registered_device *rdev, rdev 425 net/wireless/rdev-ops.h trace_rdev_scan(&rdev->wiphy, request); rdev 426 net/wireless/rdev-ops.h ret = rdev->ops->scan(&rdev->wiphy, request); rdev 427 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 431 net/wireless/rdev-ops.h static inline void rdev_abort_scan(struct cfg80211_registered_device *rdev, rdev 434 net/wireless/rdev-ops.h trace_rdev_abort_scan(&rdev->wiphy, wdev); rdev 435 net/wireless/rdev-ops.h rdev->ops->abort_scan(&rdev->wiphy, wdev); rdev 436 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 439 net/wireless/rdev-ops.h static inline int rdev_auth(struct cfg80211_registered_device *rdev, rdev 444 net/wireless/rdev-ops.h trace_rdev_auth(&rdev->wiphy, dev, req); rdev 445 net/wireless/rdev-ops.h ret = rdev->ops->auth(&rdev->wiphy, dev, req); rdev 446 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 450 net/wireless/rdev-ops.h static inline int rdev_assoc(struct cfg80211_registered_device *rdev, rdev 455 net/wireless/rdev-ops.h trace_rdev_assoc(&rdev->wiphy, dev, req); rdev 456 net/wireless/rdev-ops.h ret = rdev->ops->assoc(&rdev->wiphy, dev, req); rdev 457 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 461 net/wireless/rdev-ops.h static inline int rdev_deauth(struct cfg80211_registered_device *rdev, rdev 466 net/wireless/rdev-ops.h trace_rdev_deauth(&rdev->wiphy, dev, req); rdev 467 net/wireless/rdev-ops.h ret = rdev->ops->deauth(&rdev->wiphy, dev, req); rdev 468 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 472 net/wireless/rdev-ops.h static inline int rdev_disassoc(struct cfg80211_registered_device *rdev, rdev 477 net/wireless/rdev-ops.h trace_rdev_disassoc(&rdev->wiphy, dev, req); rdev 478 net/wireless/rdev-ops.h ret = rdev->ops->disassoc(&rdev->wiphy, dev, req); rdev 479 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 483 net/wireless/rdev-ops.h static inline int rdev_connect(struct cfg80211_registered_device *rdev, rdev 488 net/wireless/rdev-ops.h trace_rdev_connect(&rdev->wiphy, dev, sme); rdev 489 net/wireless/rdev-ops.h ret = rdev->ops->connect(&rdev->wiphy, dev, sme); rdev 490 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 495 net/wireless/rdev-ops.h rdev_update_connect_params(struct cfg80211_registered_device *rdev, rdev 500 net/wireless/rdev-ops.h trace_rdev_update_connect_params(&rdev->wiphy, dev, sme, changed); rdev 501 net/wireless/rdev-ops.h ret = rdev->ops->update_connect_params(&rdev->wiphy, dev, sme, changed); rdev 502 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 506 net/wireless/rdev-ops.h static inline int rdev_disconnect(struct cfg80211_registered_device *rdev, rdev 510 net/wireless/rdev-ops.h trace_rdev_disconnect(&rdev->wiphy, dev, reason_code); rdev 511 net/wireless/rdev-ops.h ret = rdev->ops->disconnect(&rdev->wiphy, dev, reason_code); rdev 512 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 516 net/wireless/rdev-ops.h static inline int rdev_join_ibss(struct cfg80211_registered_device *rdev, rdev 521 net/wireless/rdev-ops.h trace_rdev_join_ibss(&rdev->wiphy, dev, params); rdev 522 net/wireless/rdev-ops.h ret = rdev->ops->join_ibss(&rdev->wiphy, dev, params); rdev 523 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 527 net/wireless/rdev-ops.h static inline int rdev_leave_ibss(struct cfg80211_registered_device *rdev, rdev 531 net/wireless/rdev-ops.h trace_rdev_leave_ibss(&rdev->wiphy, dev); rdev 532 net/wireless/rdev-ops.h ret = rdev->ops->leave_ibss(&rdev->wiphy, dev); rdev 533 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 538 net/wireless/rdev-ops.h rdev_set_wiphy_params(struct cfg80211_registered_device *rdev, u32 changed) rdev 542 net/wireless/rdev-ops.h if (!rdev->ops->set_wiphy_params) rdev 545 net/wireless/rdev-ops.h trace_rdev_set_wiphy_params(&rdev->wiphy, changed); rdev 546 net/wireless/rdev-ops.h ret = rdev->ops->set_wiphy_params(&rdev->wiphy, changed); rdev 547 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 551 net/wireless/rdev-ops.h static inline int rdev_set_tx_power(struct cfg80211_registered_device *rdev, rdev 556 net/wireless/rdev-ops.h trace_rdev_set_tx_power(&rdev->wiphy, wdev, type, mbm); rdev 557 net/wireless/rdev-ops.h ret = rdev->ops->set_tx_power(&rdev->wiphy, wdev, type, mbm); rdev 558 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 562 net/wireless/rdev-ops.h static inline int rdev_get_tx_power(struct cfg80211_registered_device *rdev, rdev 566 net/wireless/rdev-ops.h trace_rdev_get_tx_power(&rdev->wiphy, wdev); rdev 567 net/wireless/rdev-ops.h ret = rdev->ops->get_tx_power(&rdev->wiphy, wdev, dbm); rdev 568 net/wireless/rdev-ops.h trace_rdev_return_int_int(&rdev->wiphy, ret, *dbm); rdev 572 net/wireless/rdev-ops.h static inline int rdev_set_wds_peer(struct cfg80211_registered_device *rdev, rdev 576 net/wireless/rdev-ops.h trace_rdev_set_wds_peer(&rdev->wiphy, dev, addr); rdev 577 net/wireless/rdev-ops.h ret = rdev->ops->set_wds_peer(&rdev->wiphy, dev, addr); rdev 578 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 583 net/wireless/rdev-ops.h rdev_set_multicast_to_unicast(struct cfg80211_registered_device *rdev, rdev 588 net/wireless/rdev-ops.h trace_rdev_set_multicast_to_unicast(&rdev->wiphy, dev, enabled); rdev 589 net/wireless/rdev-ops.h ret = rdev->ops->set_multicast_to_unicast(&rdev->wiphy, dev, enabled); rdev 590 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 595 net/wireless/rdev-ops.h rdev_get_txq_stats(struct cfg80211_registered_device *rdev, rdev 600 net/wireless/rdev-ops.h trace_rdev_get_txq_stats(&rdev->wiphy, wdev); rdev 601 net/wireless/rdev-ops.h ret = rdev->ops->get_txq_stats(&rdev->wiphy, wdev, txqstats); rdev 602 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 606 net/wireless/rdev-ops.h static inline void rdev_rfkill_poll(struct cfg80211_registered_device *rdev) rdev 608 net/wireless/rdev-ops.h trace_rdev_rfkill_poll(&rdev->wiphy); rdev 609 net/wireless/rdev-ops.h rdev->ops->rfkill_poll(&rdev->wiphy); rdev 610 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 615 net/wireless/rdev-ops.h static inline int rdev_testmode_cmd(struct cfg80211_registered_device *rdev, rdev 620 net/wireless/rdev-ops.h trace_rdev_testmode_cmd(&rdev->wiphy, wdev); rdev 621 net/wireless/rdev-ops.h ret = rdev->ops->testmode_cmd(&rdev->wiphy, wdev, data, len); rdev 622 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 626 net/wireless/rdev-ops.h static inline int rdev_testmode_dump(struct cfg80211_registered_device *rdev, rdev 632 net/wireless/rdev-ops.h trace_rdev_testmode_dump(&rdev->wiphy); rdev 633 net/wireless/rdev-ops.h ret = rdev->ops->testmode_dump(&rdev->wiphy, skb, cb, data, len); rdev 634 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 640 net/wireless/rdev-ops.h rdev_set_bitrate_mask(struct cfg80211_registered_device *rdev, rdev 645 net/wireless/rdev-ops.h trace_rdev_set_bitrate_mask(&rdev->wiphy, dev, peer, mask); rdev 646 net/wireless/rdev-ops.h ret = rdev->ops->set_bitrate_mask(&rdev->wiphy, dev, peer, mask); rdev 647 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 651 net/wireless/rdev-ops.h static inline int rdev_dump_survey(struct cfg80211_registered_device *rdev, rdev 656 net/wireless/rdev-ops.h trace_rdev_dump_survey(&rdev->wiphy, netdev, idx); rdev 657 net/wireless/rdev-ops.h ret = rdev->ops->dump_survey(&rdev->wiphy, netdev, idx, info); rdev 659 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 661 net/wireless/rdev-ops.h trace_rdev_return_int_survey_info(&rdev->wiphy, ret, info); rdev 665 net/wireless/rdev-ops.h static inline int rdev_set_pmksa(struct cfg80211_registered_device *rdev, rdev 670 net/wireless/rdev-ops.h trace_rdev_set_pmksa(&rdev->wiphy, netdev, pmksa); rdev 671 net/wireless/rdev-ops.h ret = rdev->ops->set_pmksa(&rdev->wiphy, netdev, pmksa); rdev 672 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 676 net/wireless/rdev-ops.h static inline int rdev_del_pmksa(struct cfg80211_registered_device *rdev, rdev 681 net/wireless/rdev-ops.h trace_rdev_del_pmksa(&rdev->wiphy, netdev, pmksa); rdev 682 net/wireless/rdev-ops.h ret = rdev->ops->del_pmksa(&rdev->wiphy, netdev, pmksa); rdev 683 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 687 net/wireless/rdev-ops.h static inline int rdev_flush_pmksa(struct cfg80211_registered_device *rdev, rdev 691 net/wireless/rdev-ops.h trace_rdev_flush_pmksa(&rdev->wiphy, netdev); rdev 692 net/wireless/rdev-ops.h ret = rdev->ops->flush_pmksa(&rdev->wiphy, netdev); rdev 693 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 698 net/wireless/rdev-ops.h rdev_remain_on_channel(struct cfg80211_registered_device *rdev, rdev 704 net/wireless/rdev-ops.h trace_rdev_remain_on_channel(&rdev->wiphy, wdev, chan, duration); rdev 705 net/wireless/rdev-ops.h ret = rdev->ops->remain_on_channel(&rdev->wiphy, wdev, chan, rdev 707 net/wireless/rdev-ops.h trace_rdev_return_int_cookie(&rdev->wiphy, ret, *cookie); rdev 712 net/wireless/rdev-ops.h rdev_cancel_remain_on_channel(struct cfg80211_registered_device *rdev, rdev 716 net/wireless/rdev-ops.h trace_rdev_cancel_remain_on_channel(&rdev->wiphy, wdev, cookie); rdev 717 net/wireless/rdev-ops.h ret = rdev->ops->cancel_remain_on_channel(&rdev->wiphy, wdev, cookie); rdev 718 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 722 net/wireless/rdev-ops.h static inline int rdev_mgmt_tx(struct cfg80211_registered_device *rdev, rdev 728 net/wireless/rdev-ops.h trace_rdev_mgmt_tx(&rdev->wiphy, wdev, params); rdev 729 net/wireless/rdev-ops.h ret = rdev->ops->mgmt_tx(&rdev->wiphy, wdev, params, cookie); rdev 730 net/wireless/rdev-ops.h trace_rdev_return_int_cookie(&rdev->wiphy, ret, *cookie); rdev 734 net/wireless/rdev-ops.h static inline int rdev_tx_control_port(struct cfg80211_registered_device *rdev, rdev 741 net/wireless/rdev-ops.h trace_rdev_tx_control_port(&rdev->wiphy, dev, buf, len, rdev 743 net/wireless/rdev-ops.h ret = rdev->ops->tx_control_port(&rdev->wiphy, dev, buf, len, rdev 745 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 750 net/wireless/rdev-ops.h rdev_mgmt_tx_cancel_wait(struct cfg80211_registered_device *rdev, rdev 754 net/wireless/rdev-ops.h trace_rdev_mgmt_tx_cancel_wait(&rdev->wiphy, wdev, cookie); rdev 755 net/wireless/rdev-ops.h ret = rdev->ops->mgmt_tx_cancel_wait(&rdev->wiphy, wdev, cookie); rdev 756 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 760 net/wireless/rdev-ops.h static inline int rdev_set_power_mgmt(struct cfg80211_registered_device *rdev, rdev 765 net/wireless/rdev-ops.h trace_rdev_set_power_mgmt(&rdev->wiphy, dev, enabled, timeout); rdev 766 net/wireless/rdev-ops.h ret = rdev->ops->set_power_mgmt(&rdev->wiphy, dev, enabled, timeout); rdev 767 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 772 net/wireless/rdev-ops.h rdev_set_cqm_rssi_config(struct cfg80211_registered_device *rdev, rdev 776 net/wireless/rdev-ops.h trace_rdev_set_cqm_rssi_config(&rdev->wiphy, dev, rssi_thold, rdev 778 net/wireless/rdev-ops.h ret = rdev->ops->set_cqm_rssi_config(&rdev->wiphy, dev, rssi_thold, rdev 780 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 785 net/wireless/rdev-ops.h rdev_set_cqm_rssi_range_config(struct cfg80211_registered_device *rdev, rdev 789 net/wireless/rdev-ops.h trace_rdev_set_cqm_rssi_range_config(&rdev->wiphy, dev, low, high); rdev 790 net/wireless/rdev-ops.h ret = rdev->ops->set_cqm_rssi_range_config(&rdev->wiphy, dev, rdev 792 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 797 net/wireless/rdev-ops.h rdev_set_cqm_txe_config(struct cfg80211_registered_device *rdev, rdev 801 net/wireless/rdev-ops.h trace_rdev_set_cqm_txe_config(&rdev->wiphy, dev, rate, pkts, intvl); rdev 802 net/wireless/rdev-ops.h ret = rdev->ops->set_cqm_txe_config(&rdev->wiphy, dev, rate, pkts, rdev 804 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 809 net/wireless/rdev-ops.h rdev_mgmt_frame_register(struct cfg80211_registered_device *rdev, rdev 814 net/wireless/rdev-ops.h trace_rdev_mgmt_frame_register(&rdev->wiphy, wdev , frame_type, reg); rdev 815 net/wireless/rdev-ops.h rdev->ops->mgmt_frame_register(&rdev->wiphy, wdev , frame_type, reg); rdev 816 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 819 net/wireless/rdev-ops.h static inline int rdev_set_antenna(struct cfg80211_registered_device *rdev, rdev 823 net/wireless/rdev-ops.h trace_rdev_set_antenna(&rdev->wiphy, tx_ant, rx_ant); rdev 824 net/wireless/rdev-ops.h ret = rdev->ops->set_antenna(&rdev->wiphy, tx_ant, rx_ant); rdev 825 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 829 net/wireless/rdev-ops.h static inline int rdev_get_antenna(struct cfg80211_registered_device *rdev, rdev 833 net/wireless/rdev-ops.h trace_rdev_get_antenna(&rdev->wiphy); rdev 834 net/wireless/rdev-ops.h ret = rdev->ops->get_antenna(&rdev->wiphy, tx_ant, rx_ant); rdev 836 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 838 net/wireless/rdev-ops.h trace_rdev_return_int_tx_rx(&rdev->wiphy, ret, *tx_ant, rdev 844 net/wireless/rdev-ops.h rdev_sched_scan_start(struct cfg80211_registered_device *rdev, rdev 849 net/wireless/rdev-ops.h trace_rdev_sched_scan_start(&rdev->wiphy, dev, request->reqid); rdev 850 net/wireless/rdev-ops.h ret = rdev->ops->sched_scan_start(&rdev->wiphy, dev, request); rdev 851 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 855 net/wireless/rdev-ops.h static inline int rdev_sched_scan_stop(struct cfg80211_registered_device *rdev, rdev 859 net/wireless/rdev-ops.h trace_rdev_sched_scan_stop(&rdev->wiphy, dev, reqid); rdev 860 net/wireless/rdev-ops.h ret = rdev->ops->sched_scan_stop(&rdev->wiphy, dev, reqid); rdev 861 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 865 net/wireless/rdev-ops.h static inline int rdev_set_rekey_data(struct cfg80211_registered_device *rdev, rdev 870 net/wireless/rdev-ops.h trace_rdev_set_rekey_data(&rdev->wiphy, dev); rdev 871 net/wireless/rdev-ops.h ret = rdev->ops->set_rekey_data(&rdev->wiphy, dev, data); rdev 872 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 876 net/wireless/rdev-ops.h static inline int rdev_tdls_mgmt(struct cfg80211_registered_device *rdev, rdev 883 net/wireless/rdev-ops.h trace_rdev_tdls_mgmt(&rdev->wiphy, dev, peer, action_code, rdev 886 net/wireless/rdev-ops.h ret = rdev->ops->tdls_mgmt(&rdev->wiphy, dev, peer, action_code, rdev 889 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 893 net/wireless/rdev-ops.h static inline int rdev_tdls_oper(struct cfg80211_registered_device *rdev, rdev 898 net/wireless/rdev-ops.h trace_rdev_tdls_oper(&rdev->wiphy, dev, peer, oper); rdev 899 net/wireless/rdev-ops.h ret = rdev->ops->tdls_oper(&rdev->wiphy, dev, peer, oper); rdev 900 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 904 net/wireless/rdev-ops.h static inline int rdev_probe_client(struct cfg80211_registered_device *rdev, rdev 909 net/wireless/rdev-ops.h trace_rdev_probe_client(&rdev->wiphy, dev, peer); rdev 910 net/wireless/rdev-ops.h ret = rdev->ops->probe_client(&rdev->wiphy, dev, peer, cookie); rdev 911 net/wireless/rdev-ops.h trace_rdev_return_int_cookie(&rdev->wiphy, ret, *cookie); rdev 915 net/wireless/rdev-ops.h static inline int rdev_set_noack_map(struct cfg80211_registered_device *rdev, rdev 919 net/wireless/rdev-ops.h trace_rdev_set_noack_map(&rdev->wiphy, dev, noack_map); rdev 920 net/wireless/rdev-ops.h ret = rdev->ops->set_noack_map(&rdev->wiphy, dev, noack_map); rdev 921 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 926 net/wireless/rdev-ops.h rdev_get_channel(struct cfg80211_registered_device *rdev, rdev 932 net/wireless/rdev-ops.h trace_rdev_get_channel(&rdev->wiphy, wdev); rdev 933 net/wireless/rdev-ops.h ret = rdev->ops->get_channel(&rdev->wiphy, wdev, chandef); rdev 934 net/wireless/rdev-ops.h trace_rdev_return_chandef(&rdev->wiphy, ret, chandef); rdev 939 net/wireless/rdev-ops.h static inline int rdev_start_p2p_device(struct cfg80211_registered_device *rdev, rdev 944 net/wireless/rdev-ops.h trace_rdev_start_p2p_device(&rdev->wiphy, wdev); rdev 945 net/wireless/rdev-ops.h ret = rdev->ops->start_p2p_device(&rdev->wiphy, wdev); rdev 946 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 950 net/wireless/rdev-ops.h static inline void rdev_stop_p2p_device(struct cfg80211_registered_device *rdev, rdev 953 net/wireless/rdev-ops.h trace_rdev_stop_p2p_device(&rdev->wiphy, wdev); rdev 954 net/wireless/rdev-ops.h rdev->ops->stop_p2p_device(&rdev->wiphy, wdev); rdev 955 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 958 net/wireless/rdev-ops.h static inline int rdev_start_nan(struct cfg80211_registered_device *rdev, rdev 964 net/wireless/rdev-ops.h trace_rdev_start_nan(&rdev->wiphy, wdev, conf); rdev 965 net/wireless/rdev-ops.h ret = rdev->ops->start_nan(&rdev->wiphy, wdev, conf); rdev 966 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 970 net/wireless/rdev-ops.h static inline void rdev_stop_nan(struct cfg80211_registered_device *rdev, rdev 973 net/wireless/rdev-ops.h trace_rdev_stop_nan(&rdev->wiphy, wdev); rdev 974 net/wireless/rdev-ops.h rdev->ops->stop_nan(&rdev->wiphy, wdev); rdev 975 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 979 net/wireless/rdev-ops.h rdev_add_nan_func(struct cfg80211_registered_device *rdev, rdev 985 net/wireless/rdev-ops.h trace_rdev_add_nan_func(&rdev->wiphy, wdev, nan_func); rdev 986 net/wireless/rdev-ops.h ret = rdev->ops->add_nan_func(&rdev->wiphy, wdev, nan_func); rdev 987 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 991 net/wireless/rdev-ops.h static inline void rdev_del_nan_func(struct cfg80211_registered_device *rdev, rdev 994 net/wireless/rdev-ops.h trace_rdev_del_nan_func(&rdev->wiphy, wdev, cookie); rdev 995 net/wireless/rdev-ops.h rdev->ops->del_nan_func(&rdev->wiphy, wdev, cookie); rdev 996 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 1000 net/wireless/rdev-ops.h rdev_nan_change_conf(struct cfg80211_registered_device *rdev, rdev 1006 net/wireless/rdev-ops.h trace_rdev_nan_change_conf(&rdev->wiphy, wdev, conf, changes); rdev 1007 net/wireless/rdev-ops.h if (rdev->ops->nan_change_conf) rdev 1008 net/wireless/rdev-ops.h ret = rdev->ops->nan_change_conf(&rdev->wiphy, wdev, conf, rdev 1012 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1016 net/wireless/rdev-ops.h static inline int rdev_set_mac_acl(struct cfg80211_registered_device *rdev, rdev 1022 net/wireless/rdev-ops.h trace_rdev_set_mac_acl(&rdev->wiphy, dev, params); rdev 1023 net/wireless/rdev-ops.h ret = rdev->ops->set_mac_acl(&rdev->wiphy, dev, params); rdev 1024 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1028 net/wireless/rdev-ops.h static inline int rdev_update_ft_ies(struct cfg80211_registered_device *rdev, rdev 1034 net/wireless/rdev-ops.h trace_rdev_update_ft_ies(&rdev->wiphy, dev, ftie); rdev 1035 net/wireless/rdev-ops.h ret = rdev->ops->update_ft_ies(&rdev->wiphy, dev, ftie); rdev 1036 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1040 net/wireless/rdev-ops.h static inline int rdev_crit_proto_start(struct cfg80211_registered_device *rdev, rdev 1047 net/wireless/rdev-ops.h trace_rdev_crit_proto_start(&rdev->wiphy, wdev, protocol, duration); rdev 1048 net/wireless/rdev-ops.h ret = rdev->ops->crit_proto_start(&rdev->wiphy, wdev, rdev 1050 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1054 net/wireless/rdev-ops.h static inline void rdev_crit_proto_stop(struct cfg80211_registered_device *rdev, rdev 1057 net/wireless/rdev-ops.h trace_rdev_crit_proto_stop(&rdev->wiphy, wdev); rdev 1058 net/wireless/rdev-ops.h rdev->ops->crit_proto_stop(&rdev->wiphy, wdev); rdev 1059 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 1062 net/wireless/rdev-ops.h static inline int rdev_channel_switch(struct cfg80211_registered_device *rdev, rdev 1068 net/wireless/rdev-ops.h trace_rdev_channel_switch(&rdev->wiphy, dev, params); rdev 1069 net/wireless/rdev-ops.h ret = rdev->ops->channel_switch(&rdev->wiphy, dev, params); rdev 1070 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1074 net/wireless/rdev-ops.h static inline int rdev_set_qos_map(struct cfg80211_registered_device *rdev, rdev 1080 net/wireless/rdev-ops.h if (rdev->ops->set_qos_map) { rdev 1081 net/wireless/rdev-ops.h trace_rdev_set_qos_map(&rdev->wiphy, dev, qos_map); rdev 1082 net/wireless/rdev-ops.h ret = rdev->ops->set_qos_map(&rdev->wiphy, dev, qos_map); rdev 1083 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1090 net/wireless/rdev-ops.h rdev_set_ap_chanwidth(struct cfg80211_registered_device *rdev, rdev 1095 net/wireless/rdev-ops.h trace_rdev_set_ap_chanwidth(&rdev->wiphy, dev, chandef); rdev 1096 net/wireless/rdev-ops.h ret = rdev->ops->set_ap_chanwidth(&rdev->wiphy, dev, chandef); rdev 1097 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1103 net/wireless/rdev-ops.h rdev_add_tx_ts(struct cfg80211_registered_device *rdev, rdev 1109 net/wireless/rdev-ops.h trace_rdev_add_tx_ts(&rdev->wiphy, dev, tsid, peer, rdev 1111 net/wireless/rdev-ops.h if (rdev->ops->add_tx_ts) rdev 1112 net/wireless/rdev-ops.h ret = rdev->ops->add_tx_ts(&rdev->wiphy, dev, tsid, peer, rdev 1114 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1120 net/wireless/rdev-ops.h rdev_del_tx_ts(struct cfg80211_registered_device *rdev, rdev 1125 net/wireless/rdev-ops.h trace_rdev_del_tx_ts(&rdev->wiphy, dev, tsid, peer); rdev 1126 net/wireless/rdev-ops.h if (rdev->ops->del_tx_ts) rdev 1127 net/wireless/rdev-ops.h ret = rdev->ops->del_tx_ts(&rdev->wiphy, dev, tsid, peer); rdev 1128 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1134 net/wireless/rdev-ops.h rdev_tdls_channel_switch(struct cfg80211_registered_device *rdev, rdev 1140 net/wireless/rdev-ops.h trace_rdev_tdls_channel_switch(&rdev->wiphy, dev, addr, oper_class, rdev 1142 net/wireless/rdev-ops.h ret = rdev->ops->tdls_channel_switch(&rdev->wiphy, dev, addr, rdev 1144 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1149 net/wireless/rdev-ops.h rdev_tdls_cancel_channel_switch(struct cfg80211_registered_device *rdev, rdev 1152 net/wireless/rdev-ops.h trace_rdev_tdls_cancel_channel_switch(&rdev->wiphy, dev, addr); rdev 1153 net/wireless/rdev-ops.h rdev->ops->tdls_cancel_channel_switch(&rdev->wiphy, dev, addr); rdev 1154 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 1158 net/wireless/rdev-ops.h rdev_start_radar_detection(struct cfg80211_registered_device *rdev, rdev 1165 net/wireless/rdev-ops.h trace_rdev_start_radar_detection(&rdev->wiphy, dev, chandef, rdev 1167 net/wireless/rdev-ops.h if (rdev->ops->start_radar_detection) rdev 1168 net/wireless/rdev-ops.h ret = rdev->ops->start_radar_detection(&rdev->wiphy, dev, rdev 1170 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1175 net/wireless/rdev-ops.h rdev_end_cac(struct cfg80211_registered_device *rdev, rdev 1178 net/wireless/rdev-ops.h trace_rdev_end_cac(&rdev->wiphy, dev); rdev 1179 net/wireless/rdev-ops.h if (rdev->ops->end_cac) rdev 1180 net/wireless/rdev-ops.h rdev->ops->end_cac(&rdev->wiphy, dev); rdev 1181 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 1185 net/wireless/rdev-ops.h rdev_set_mcast_rate(struct cfg80211_registered_device *rdev, rdev 1191 net/wireless/rdev-ops.h trace_rdev_set_mcast_rate(&rdev->wiphy, dev, mcast_rate); rdev 1192 net/wireless/rdev-ops.h if (rdev->ops->set_mcast_rate) rdev 1193 net/wireless/rdev-ops.h ret = rdev->ops->set_mcast_rate(&rdev->wiphy, dev, mcast_rate); rdev 1194 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1199 net/wireless/rdev-ops.h rdev_set_coalesce(struct cfg80211_registered_device *rdev, rdev 1204 net/wireless/rdev-ops.h trace_rdev_set_coalesce(&rdev->wiphy, coalesce); rdev 1205 net/wireless/rdev-ops.h if (rdev->ops->set_coalesce) rdev 1206 net/wireless/rdev-ops.h ret = rdev->ops->set_coalesce(&rdev->wiphy, coalesce); rdev 1207 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1211 net/wireless/rdev-ops.h static inline int rdev_set_pmk(struct cfg80211_registered_device *rdev, rdev 1217 net/wireless/rdev-ops.h trace_rdev_set_pmk(&rdev->wiphy, dev, pmk_conf); rdev 1218 net/wireless/rdev-ops.h if (rdev->ops->set_pmk) rdev 1219 net/wireless/rdev-ops.h ret = rdev->ops->set_pmk(&rdev->wiphy, dev, pmk_conf); rdev 1220 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1224 net/wireless/rdev-ops.h static inline int rdev_del_pmk(struct cfg80211_registered_device *rdev, rdev 1229 net/wireless/rdev-ops.h trace_rdev_del_pmk(&rdev->wiphy, dev, aa); rdev 1230 net/wireless/rdev-ops.h if (rdev->ops->del_pmk) rdev 1231 net/wireless/rdev-ops.h ret = rdev->ops->del_pmk(&rdev->wiphy, dev, aa); rdev 1232 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1237 net/wireless/rdev-ops.h rdev_external_auth(struct cfg80211_registered_device *rdev, rdev 1243 net/wireless/rdev-ops.h trace_rdev_external_auth(&rdev->wiphy, dev, params); rdev 1244 net/wireless/rdev-ops.h if (rdev->ops->external_auth) rdev 1245 net/wireless/rdev-ops.h ret = rdev->ops->external_auth(&rdev->wiphy, dev, params); rdev 1246 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1251 net/wireless/rdev-ops.h rdev_get_ftm_responder_stats(struct cfg80211_registered_device *rdev, rdev 1257 net/wireless/rdev-ops.h trace_rdev_get_ftm_responder_stats(&rdev->wiphy, dev, ftm_stats); rdev 1258 net/wireless/rdev-ops.h if (rdev->ops->get_ftm_responder_stats) rdev 1259 net/wireless/rdev-ops.h ret = rdev->ops->get_ftm_responder_stats(&rdev->wiphy, dev, rdev 1261 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1266 net/wireless/rdev-ops.h rdev_start_pmsr(struct cfg80211_registered_device *rdev, rdev 1272 net/wireless/rdev-ops.h trace_rdev_start_pmsr(&rdev->wiphy, wdev, request->cookie); rdev 1273 net/wireless/rdev-ops.h if (rdev->ops->start_pmsr) rdev 1274 net/wireless/rdev-ops.h ret = rdev->ops->start_pmsr(&rdev->wiphy, wdev, request); rdev 1275 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1280 net/wireless/rdev-ops.h rdev_abort_pmsr(struct cfg80211_registered_device *rdev, rdev 1284 net/wireless/rdev-ops.h trace_rdev_abort_pmsr(&rdev->wiphy, wdev, request->cookie); rdev 1285 net/wireless/rdev-ops.h if (rdev->ops->abort_pmsr) rdev 1286 net/wireless/rdev-ops.h rdev->ops->abort_pmsr(&rdev->wiphy, wdev, request); rdev 1287 net/wireless/rdev-ops.h trace_rdev_return_void(&rdev->wiphy); rdev 1290 net/wireless/rdev-ops.h static inline int rdev_update_owe_info(struct cfg80211_registered_device *rdev, rdev 1296 net/wireless/rdev-ops.h trace_rdev_update_owe_info(&rdev->wiphy, dev, oweinfo); rdev 1297 net/wireless/rdev-ops.h if (rdev->ops->update_owe_info) rdev 1298 net/wireless/rdev-ops.h ret = rdev->ops->update_owe_info(&rdev->wiphy, dev, oweinfo); rdev 1299 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 1304 net/wireless/rdev-ops.h rdev_probe_mesh_link(struct cfg80211_registered_device *rdev, rdev 1310 net/wireless/rdev-ops.h trace_rdev_probe_mesh_link(&rdev->wiphy, dev, dest, buf, len); rdev 1311 net/wireless/rdev-ops.h ret = rdev->ops->probe_mesh_link(&rdev->wiphy, dev, buf, len); rdev 1312 net/wireless/rdev-ops.h trace_rdev_return_int(&rdev->wiphy, ret); rdev 2112 net/wireless/reg.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 2140 net/wireless/reg.c if (!rdev->ops->get_channel || rdev 2141 net/wireless/reg.c rdev_get_channel(rdev, wdev, &chandef)) rdev 2182 net/wireless/reg.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 2186 net/wireless/reg.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) rdev 2188 net/wireless/reg.c cfg80211_leave(rdev, wdev); rdev 2193 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 2198 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) rdev 2199 net/wireless/reg.c if (!(rdev->wiphy.regulatory_flags & rdev 2201 net/wireless/reg.c reg_leave_invalid_chans(&rdev->wiphy); rdev 2249 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 2254 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 2255 net/wireless/reg.c wiphy = &rdev->wiphy; rdev 2707 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 2711 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 2712 net/wireless/reg.c if (wiphy == &rdev->wiphy) rdev 2714 net/wireless/reg.c wiphy_share_dfs_chan_state(wiphy, &rdev->wiphy); rdev 2774 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 2777 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 2778 net/wireless/reg.c wiphy = &rdev->wiphy; rdev 2831 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 2842 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) rdev 2843 net/wireless/reg.c wiphy_update_new_beacon(&rdev->wiphy, pending_beacon); rdev 2854 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 2861 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 2862 net/wireless/reg.c wiphy = &rdev->wiphy; rdev 2865 net/wireless/reg.c regd = rdev->requested_regd; rdev 2866 net/wireless/reg.c rdev->requested_regd = NULL; rdev 3174 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 3220 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 3221 net/wireless/reg.c if (rdev->wiphy.regulatory_flags & REGULATORY_WIPHY_SELF_MANAGED) rdev 3223 net/wireless/reg.c if (rdev->wiphy.regulatory_flags & REGULATORY_CUSTOM_REG) rdev 3224 net/wireless/reg.c restore_custom_reg_settings(&rdev->wiphy); rdev 3274 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 3277 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 3278 net/wireless/reg.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 3461 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 3462 net/wireless/reg.c rdev = cfg80211_rdev_by_wiphy_idx(lr->wiphy_idx); rdev 3463 net/wireless/reg.c if (rdev) { rdev 3465 net/wireless/reg.c rdev->country_ie_alpha2[0], rdev 3466 net/wireless/reg.c rdev->country_ie_alpha2[1]); rdev 3708 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 3726 net/wireless/reg.c rdev = wiphy_to_rdev(wiphy); rdev 3729 net/wireless/reg.c prev_regd = rdev->requested_regd; rdev 3730 net/wireless/reg.c rdev->requested_regd = regd; rdev 3895 net/wireless/reg.c static void cfg80211_check_and_end_cac(struct cfg80211_registered_device *rdev) rdev 3907 net/wireless/reg.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 3909 net/wireless/reg.c !cfg80211_chandef_dfs_usable(&rdev->wiphy, &wdev->chandef)) rdev 3910 net/wireless/reg.c rdev_end_cac(rdev, wdev->netdev); rdev 3919 net/wireless/reg.c struct cfg80211_registered_device *rdev; rdev 3926 net/wireless/reg.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 3927 net/wireless/reg.c if (wiphy == &rdev->wiphy) rdev 3930 net/wireless/reg.c if (!reg_dfs_domain_same(wiphy, &rdev->wiphy)) rdev 3933 net/wireless/reg.c if (!ieee80211_get_channel(&rdev->wiphy, rdev 3937 net/wireless/reg.c cfg80211_set_dfs_state(&rdev->wiphy, chandef, dfs_state); rdev 3941 net/wireless/reg.c cfg80211_sched_dfs_chan_update(rdev); rdev 3942 net/wireless/reg.c cfg80211_check_and_end_cac(rdev); rdev 3945 net/wireless/reg.c nl80211_radar_notify(rdev, chandef, event, NULL, GFP_KERNEL); rdev 101 net/wireless/scan.c static inline void bss_ref_get(struct cfg80211_registered_device *rdev, rdev 104 net/wireless/scan.c lockdep_assert_held(&rdev->bss_lock); rdev 121 net/wireless/scan.c static inline void bss_ref_put(struct cfg80211_registered_device *rdev, rdev 124 net/wireless/scan.c lockdep_assert_held(&rdev->bss_lock); rdev 152 net/wireless/scan.c static bool __cfg80211_unlink_bss(struct cfg80211_registered_device *rdev, rdev 155 net/wireless/scan.c lockdep_assert_held(&rdev->bss_lock); rdev 173 net/wireless/scan.c rb_erase(&bss->rbn, &rdev->bss_tree); rdev 174 net/wireless/scan.c rdev->bss_entries--; rdev 175 net/wireless/scan.c WARN_ONCE((rdev->bss_entries == 0) ^ list_empty(&rdev->bss_list), rdev 177 net/wireless/scan.c rdev->bss_entries, list_empty(&rdev->bss_list)); rdev 178 net/wireless/scan.c bss_ref_put(rdev, bss); rdev 395 net/wireless/scan.c static void __cfg80211_bss_expire(struct cfg80211_registered_device *rdev, rdev 401 net/wireless/scan.c lockdep_assert_held(&rdev->bss_lock); rdev 403 net/wireless/scan.c list_for_each_entry_safe(bss, tmp, &rdev->bss_list, list) { rdev 409 net/wireless/scan.c if (__cfg80211_unlink_bss(rdev, bss)) rdev 414 net/wireless/scan.c rdev->bss_generation++; rdev 417 net/wireless/scan.c static bool cfg80211_bss_expire_oldest(struct cfg80211_registered_device *rdev) rdev 422 net/wireless/scan.c lockdep_assert_held(&rdev->bss_lock); rdev 424 net/wireless/scan.c list_for_each_entry(bss, &rdev->bss_list, list) { rdev 446 net/wireless/scan.c ret = __cfg80211_unlink_bss(rdev, oldest); rdev 451 net/wireless/scan.c void ___cfg80211_scan_done(struct cfg80211_registered_device *rdev, rdev 463 net/wireless/scan.c if (rdev->scan_msg) { rdev 464 net/wireless/scan.c nl80211_send_scan_msg(rdev, rdev->scan_msg); rdev 465 net/wireless/scan.c rdev->scan_msg = NULL; rdev 469 net/wireless/scan.c request = rdev->scan_req; rdev 486 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 487 net/wireless/scan.c __cfg80211_bss_expire(rdev, request->scan_start); rdev 488 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 491 net/wireless/scan.c msg = nl80211_build_scan_msg(rdev, wdev, request->info.aborted); rdev 504 net/wireless/scan.c rdev->scan_req = NULL; rdev 508 net/wireless/scan.c rdev->scan_msg = msg; rdev 510 net/wireless/scan.c nl80211_send_scan_msg(rdev, msg); rdev 515 net/wireless/scan.c struct cfg80211_registered_device *rdev; rdev 517 net/wireless/scan.c rdev = container_of(wk, struct cfg80211_registered_device, rdev 521 net/wireless/scan.c ___cfg80211_scan_done(rdev, true); rdev 537 net/wireless/scan.c void cfg80211_add_sched_scan_req(struct cfg80211_registered_device *rdev, rdev 542 net/wireless/scan.c list_add_rcu(&req->list, &rdev->sched_scan_req_list); rdev 545 net/wireless/scan.c static void cfg80211_del_sched_scan_req(struct cfg80211_registered_device *rdev, rdev 555 net/wireless/scan.c cfg80211_find_sched_scan_req(struct cfg80211_registered_device *rdev, u64 reqid) rdev 561 net/wireless/scan.c list_for_each_entry_rcu(pos, &rdev->sched_scan_req_list, list) { rdev 576 net/wireless/scan.c int cfg80211_sched_scan_req_possible(struct cfg80211_registered_device *rdev, rdev 582 net/wireless/scan.c list_for_each_entry(pos, &rdev->sched_scan_req_list, list) { rdev 595 net/wireless/scan.c if (i == rdev->wiphy.max_sched_scan_reqs) rdev 603 net/wireless/scan.c struct cfg80211_registered_device *rdev; rdev 606 net/wireless/scan.c rdev = container_of(work, struct cfg80211_registered_device, rdev 610 net/wireless/scan.c list_for_each_entry_safe(req, tmp, &rdev->sched_scan_req_list, list) { rdev 615 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 616 net/wireless/scan.c __cfg80211_bss_expire(rdev, req->scan_start); rdev 617 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 629 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 636 net/wireless/scan.c request = cfg80211_find_sched_scan_req(rdev, reqid); rdev 639 net/wireless/scan.c queue_work(cfg80211_wq, &rdev->sched_scan_res_wk); rdev 647 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 653 net/wireless/scan.c __cfg80211_stop_sched_scan(rdev, reqid, true); rdev 665 net/wireless/scan.c int cfg80211_stop_sched_scan_req(struct cfg80211_registered_device *rdev, rdev 672 net/wireless/scan.c int err = rdev_sched_scan_stop(rdev, req->dev, req->reqid); rdev 679 net/wireless/scan.c cfg80211_del_sched_scan_req(rdev, req); rdev 684 net/wireless/scan.c int __cfg80211_stop_sched_scan(struct cfg80211_registered_device *rdev, rdev 691 net/wireless/scan.c sched_scan_req = cfg80211_find_sched_scan_req(rdev, reqid); rdev 695 net/wireless/scan.c return cfg80211_stop_sched_scan_req(rdev, sched_scan_req, rdev 699 net/wireless/scan.c void cfg80211_bss_age(struct cfg80211_registered_device *rdev, rdev 705 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 706 net/wireless/scan.c list_for_each_entry(bss, &rdev->bss_list, list) rdev 708 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 711 net/wireless/scan.c void cfg80211_bss_expire(struct cfg80211_registered_device *rdev) rdev 713 net/wireless/scan.c __cfg80211_bss_expire(rdev, jiffies - IEEE80211_SCAN_RESULT_EXPIRE); rdev 920 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 928 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 930 net/wireless/scan.c list_for_each_entry(bss, &rdev->bss_list, list) { rdev 949 net/wireless/scan.c bss_ref_get(rdev, res); rdev 954 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 962 net/wireless/scan.c static void rb_insert_bss(struct cfg80211_registered_device *rdev, rdev 965 net/wireless/scan.c struct rb_node **p = &rdev->bss_tree.rb_node; rdev 988 net/wireless/scan.c rb_insert_color(&bss->rbn, &rdev->bss_tree); rdev 992 net/wireless/scan.c rb_find_bss(struct cfg80211_registered_device *rdev, rdev 996 net/wireless/scan.c struct rb_node *n = rdev->bss_tree.rb_node; rdev 1015 net/wireless/scan.c static bool cfg80211_combine_bsses(struct cfg80211_registered_device *rdev, rdev 1046 net/wireless/scan.c list_for_each_entry(bss, &rdev->bss_list, list) { rdev 1081 net/wireless/scan.c WARN_ONCE(n_entries != rdev->bss_entries, rdev 1083 net/wireless/scan.c rdev->bss_entries, n_entries); rdev 1095 net/wireless/scan.c cfg80211_update_known_bss(struct cfg80211_registered_device *rdev, rdev 1100 net/wireless/scan.c lockdep_assert_held(&rdev->bss_lock); rdev 1183 net/wireless/scan.c cfg80211_bss_update(struct cfg80211_registered_device *rdev, rdev 1194 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 1197 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 1201 net/wireless/scan.c found = rb_find_bss(rdev, tmp, BSS_CMP_REGULAR); rdev 1204 net/wireless/scan.c if (!cfg80211_update_known_bss(rdev, found, tmp, signal_valid)) rdev 1216 net/wireless/scan.c new = kzalloc(sizeof(*new) + rdev->wiphy.bss_priv_size, rdev 1233 net/wireless/scan.c hidden = rb_find_bss(rdev, tmp, BSS_CMP_HIDE_ZLEN); rdev 1235 net/wireless/scan.c hidden = rb_find_bss(rdev, tmp, rdev 1252 net/wireless/scan.c if (!cfg80211_combine_bsses(rdev, new)) { rdev 1258 net/wireless/scan.c if (rdev->bss_entries >= bss_entries_limit && rdev 1259 net/wireless/scan.c !cfg80211_bss_expire_oldest(rdev)) { rdev 1272 net/wireless/scan.c bss_ref_get(rdev, pbss); rdev 1275 net/wireless/scan.c list_add_tail(&new->list, &rdev->bss_list); rdev 1276 net/wireless/scan.c rdev->bss_entries++; rdev 1277 net/wireless/scan.c rb_insert_bss(rdev, new); rdev 1281 net/wireless/scan.c rdev->bss_generation++; rdev 1282 net/wireless/scan.c bss_ref_get(rdev, found); rdev 1283 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 1287 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 1372 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 1459 net/wireless/scan.c if (__cfg80211_unlink_bss(rdev, res)) rdev 1460 net/wireless/scan.c rdev->bss_generation++; rdev 1930 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 1938 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 1939 net/wireless/scan.c bss_ref_get(rdev, bss); rdev 1940 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 1946 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 1954 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 1955 net/wireless/scan.c bss_ref_put(rdev, bss); rdev 1956 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 1962 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 1971 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 1980 net/wireless/scan.c if (__cfg80211_unlink_bss(rdev, tmp1)) rdev 1981 net/wireless/scan.c rdev->bss_generation++; rdev 1984 net/wireless/scan.c if (__cfg80211_unlink_bss(rdev, bss)) rdev 1985 net/wireless/scan.c rdev->bss_generation++; rdev 1987 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 1998 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 2001 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 2003 net/wireless/scan.c list_for_each_entry(bss, &rdev->bss_list, list) { rdev 2008 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 2016 net/wireless/scan.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 2023 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 2040 net/wireless/scan.c list_for_each_entry(bss, &rdev->bss_list, list) { rdev 2057 net/wireless/scan.c if (cfg80211_update_known_bss(rdev, cbss, new, false)) { rdev 2067 net/wireless/scan.c if (__cfg80211_unlink_bss(rdev, bss)) rdev 2068 net/wireless/scan.c rdev->bss_generation++; rdev 2072 net/wireless/scan.c if (!WARN_ON(!__cfg80211_unlink_bss(rdev, new))) rdev 2073 net/wireless/scan.c rdev->bss_generation++; rdev 2076 net/wireless/scan.c rb_erase(&cbss->rbn, &rdev->bss_tree); rdev 2077 net/wireless/scan.c rb_insert_bss(rdev, cbss); rdev 2078 net/wireless/scan.c rdev->bss_generation++; rdev 2086 net/wireless/scan.c rb_erase(&bss->rbn, &rdev->bss_tree); rdev 2087 net/wireless/scan.c rb_insert_bss(rdev, bss); rdev 2088 net/wireless/scan.c rdev->bss_generation++; rdev 2092 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 2099 net/wireless/scan.c struct cfg80211_registered_device *rdev; rdev 2108 net/wireless/scan.c rdev = wiphy_to_rdev(dev->ieee80211_ptr->wiphy); rdev 2110 net/wireless/scan.c rdev = ERR_PTR(-ENODEV); rdev 2112 net/wireless/scan.c return rdev; rdev 2119 net/wireless/scan.c struct cfg80211_registered_device *rdev; rdev 2132 net/wireless/scan.c rdev = cfg80211_get_dev_from_ifindex(dev_net(dev), dev->ifindex); rdev 2134 net/wireless/scan.c if (IS_ERR(rdev)) rdev 2135 net/wireless/scan.c return PTR_ERR(rdev); rdev 2137 net/wireless/scan.c if (rdev->scan_req || rdev->scan_msg) { rdev 2142 net/wireless/scan.c wiphy = &rdev->wiphy; rdev 2234 net/wireless/scan.c rdev->scan_req = creq; rdev 2235 net/wireless/scan.c err = rdev_scan(rdev, creq); rdev 2237 net/wireless/scan.c rdev->scan_req = NULL; rdev 2240 net/wireless/scan.c nl80211_send_scan_start(rdev, dev->ieee80211_ptr); rdev 2558 net/wireless/scan.c static int ieee80211_scan_results(struct cfg80211_registered_device *rdev, rdev 2567 net/wireless/scan.c spin_lock_bh(&rdev->bss_lock); rdev 2568 net/wireless/scan.c cfg80211_bss_expire(rdev); rdev 2570 net/wireless/scan.c list_for_each_entry(bss, &rdev->bss_list, list) { rdev 2575 net/wireless/scan.c current_ev = ieee80211_bss(&rdev->wiphy, info, bss, rdev 2582 net/wireless/scan.c spin_unlock_bh(&rdev->bss_lock); rdev 2594 net/wireless/scan.c struct cfg80211_registered_device *rdev; rdev 2600 net/wireless/scan.c rdev = cfg80211_get_dev_from_ifindex(dev_net(dev), dev->ifindex); rdev 2602 net/wireless/scan.c if (IS_ERR(rdev)) rdev 2603 net/wireless/scan.c return PTR_ERR(rdev); rdev 2605 net/wireless/scan.c if (rdev->scan_req || rdev->scan_msg) rdev 2608 net/wireless/scan.c res = ieee80211_scan_results(rdev, info, extra, data->length); rdev 66 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 73 net/wireless/sme.c if (rdev->scan_req || rdev->scan_msg) rdev 129 net/wireless/sme.c request->wiphy = &rdev->wiphy; rdev 132 net/wireless/sme.c rdev->scan_req = request; rdev 134 net/wireless/sme.c err = rdev_scan(rdev, request); rdev 137 net/wireless/sme.c nl80211_send_scan_start(rdev, wdev); rdev 140 net/wireless/sme.c rdev->scan_req = NULL; rdev 149 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 168 net/wireless/sme.c if (WARN_ON(!rdev->ops->auth)) rdev 171 net/wireless/sme.c return cfg80211_mlme_auth(rdev, wdev->netdev, rdev 182 net/wireless/sme.c if (WARN_ON(!rdev->ops->assoc)) rdev 197 net/wireless/sme.c err = cfg80211_mlme_assoc(rdev, wdev->netdev, params->channel, rdev 201 net/wireless/sme.c cfg80211_mlme_deauth(rdev, wdev->netdev, params->bssid, rdev 210 net/wireless/sme.c cfg80211_mlme_deauth(rdev, wdev->netdev, params->bssid, rdev 215 net/wireless/sme.c cfg80211_mlme_deauth(rdev, wdev->netdev, params->bssid, rdev 230 net/wireless/sme.c struct cfg80211_registered_device *rdev = rdev 238 net/wireless/sme.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 275 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 293 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 301 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 315 net/wireless/sme.c cfg80211_put_bss(&rdev->wiphy, bss); rdev 317 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 332 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy); rdev 365 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 376 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 382 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 400 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 405 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 416 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 422 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 427 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 433 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 438 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 444 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 449 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 455 net/wireless/sme.c schedule_work(&rdev->conn_work); rdev 462 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 466 net/wireless/sme.c if (!rdev->wiphy.extended_capabilities_len || rdev 475 net/wireless/sme.c buf = kmalloc(ies_len + rdev->wiphy.extended_capabilities_len + 2, rdev 495 net/wireless/sme.c memcpy(buf + offs + rdev->wiphy.extended_capabilities_len + 2, rdev 503 net/wireless/sme.c buf[offs + 1] = rdev->wiphy.extended_capabilities_len; rdev 505 net/wireless/sme.c rdev->wiphy.extended_capabilities, rdev 506 net/wireless/sme.c rdev->wiphy.extended_capabilities_len); rdev 509 net/wireless/sme.c *out_ies_len = ies_len + rdev->wiphy.extended_capabilities_len + 2; rdev 518 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 522 net/wireless/sme.c if (!rdev->ops->auth || !rdev->ops->assoc) rdev 607 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 613 net/wireless/sme.c if (!rdev->ops->deauth) rdev 623 net/wireless/sme.c err = cfg80211_mlme_deauth(rdev, wdev->netdev, rdev 637 net/wireless/sme.c struct cfg80211_registered_device *rdev; rdev 649 net/wireless/sme.c list_for_each_entry(rdev, &cfg80211_rdev_list, list) { rdev 650 net/wireless/sme.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) { rdev 793 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 824 net/wireless/sme.c cfg80211_bss_update(rdev, ibss, false, rdev 894 net/wireless/sme.c queue_work(cfg80211_wq, &rdev->event_work); rdev 960 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1027 net/wireless/sme.c queue_work(cfg80211_wq, &rdev->event_work); rdev 1050 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1071 net/wireless/sme.c queue_work(cfg80211_wq, &rdev->event_work); rdev 1079 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1102 net/wireless/sme.c nl80211_send_disconnected(rdev, dev, reason, ie, ie_len, from_ap); rdev 1105 net/wireless/sme.c if (rdev->ops->crit_proto_stop && rdev->crit_proto_nlportid) { rdev 1106 net/wireless/sme.c rdev->crit_proto_nlportid = 0; rdev 1107 net/wireless/sme.c rdev_crit_proto_stop(rdev, wdev); rdev 1114 net/wireless/sme.c if (rdev->ops->del_key) rdev 1116 net/wireless/sme.c rdev_del_key(rdev, dev, i, false, NULL); rdev 1118 net/wireless/sme.c rdev_set_qos_map(rdev, dev, NULL); rdev 1135 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1153 net/wireless/sme.c queue_work(cfg80211_wq, &rdev->event_work); rdev 1160 net/wireless/sme.c int cfg80211_connect(struct cfg80211_registered_device *rdev, rdev 1201 net/wireless/sme.c rdev->wiphy.ht_capa_mod_mask); rdev 1203 net/wireless/sme.c rdev->wiphy.vht_capa_mod_mask); rdev 1245 net/wireless/sme.c if (!rdev->ops->connect) rdev 1248 net/wireless/sme.c err = rdev_connect(rdev, dev, connect); rdev 1264 net/wireless/sme.c int cfg80211_disconnect(struct cfg80211_registered_device *rdev, rdev 1279 net/wireless/sme.c else if (!rdev->ops->disconnect) rdev 1280 net/wireless/sme.c cfg80211_mlme_down(rdev, dev); rdev 1282 net/wireless/sme.c err = rdev_disconnect(rdev, dev, reason); rdev 1303 net/wireless/sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1310 net/wireless/sme.c __cfg80211_leave_ibss(rdev, wdev->netdev, false); rdev 1314 net/wireless/sme.c __cfg80211_stop_ap(rdev, wdev->netdev, false); rdev 1317 net/wireless/sme.c __cfg80211_leave_mesh(rdev, wdev->netdev); rdev 1326 net/wireless/sme.c if (rdev->ops->disconnect || wdev->current_bss) rdev 1327 net/wireless/sme.c cfg80211_disconnect(rdev, wdev->netdev, rdev 1331 net/wireless/sme.c cfg80211_mlme_deauth(rdev, wdev->netdev, rdev 79 net/wireless/sysfs.c struct cfg80211_registered_device *rdev = dev_to_rdev(dev); rdev 81 net/wireless/sysfs.c cfg80211_dev_free(rdev); rdev 91 net/wireless/sysfs.c static void cfg80211_leave_all(struct cfg80211_registered_device *rdev) rdev 95 net/wireless/sysfs.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) rdev 96 net/wireless/sysfs.c cfg80211_leave(rdev, wdev); rdev 101 net/wireless/sysfs.c struct cfg80211_registered_device *rdev = dev_to_rdev(dev); rdev 104 net/wireless/sysfs.c rdev->suspend_at = ktime_get_boottime_seconds(); rdev 107 net/wireless/sysfs.c if (rdev->wiphy.registered) { rdev 108 net/wireless/sysfs.c if (!rdev->wiphy.wowlan_config) { rdev 109 net/wireless/sysfs.c cfg80211_leave_all(rdev); rdev 110 net/wireless/sysfs.c cfg80211_process_rdev_events(rdev); rdev 112 net/wireless/sysfs.c if (rdev->ops->suspend) rdev 113 net/wireless/sysfs.c ret = rdev_suspend(rdev, rdev->wiphy.wowlan_config); rdev 116 net/wireless/sysfs.c cfg80211_leave_all(rdev); rdev 117 net/wireless/sysfs.c cfg80211_process_rdev_events(rdev); rdev 118 net/wireless/sysfs.c ret = rdev_suspend(rdev, NULL); rdev 128 net/wireless/sysfs.c struct cfg80211_registered_device *rdev = dev_to_rdev(dev); rdev 132 net/wireless/sysfs.c cfg80211_bss_age(rdev, ktime_get_boottime_seconds() - rdev->suspend_at); rdev 135 net/wireless/sysfs.c if (rdev->wiphy.registered && rdev->ops->resume) rdev 136 net/wireless/sysfs.c ret = rdev_resume(rdev); rdev 230 net/wireless/util.c int cfg80211_validate_key_settings(struct cfg80211_registered_device *rdev, rdev 237 net/wireless/util.c if (!pairwise && mac_addr && !(rdev->wiphy.flags & WIPHY_FLAG_IBSS_RSN)) rdev 264 net/wireless/util.c if (wiphy_ext_feature_isset(&rdev->wiphy, rdev 367 net/wireless/util.c if (!cfg80211_supported_cipher_suite(&rdev->wiphy, params->cipher)) rdev 829 net/wireless/util.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 839 net/wireless/util.c if (rdev_add_key(rdev, dev, i, false, NULL, rdev 845 net/wireless/util.c rdev_set_default_key(rdev, dev, i, true, true)) { rdev 904 net/wireless/util.c void cfg80211_process_rdev_events(struct cfg80211_registered_device *rdev) rdev 910 net/wireless/util.c list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) rdev 914 net/wireless/util.c int cfg80211_change_iface(struct cfg80211_registered_device *rdev, rdev 932 net/wireless/util.c if (!rdev->ops->change_virtual_intf || rdev 933 net/wireless/util.c !(rdev->wiphy.interface_modes & (1 << ntype))) rdev 947 net/wireless/util.c rdev_set_qos_map(rdev, dev, NULL); rdev 952 net/wireless/util.c cfg80211_stop_ap(rdev, dev, true); rdev 955 net/wireless/util.c cfg80211_leave_ibss(rdev, dev, false); rdev 960 net/wireless/util.c cfg80211_disconnect(rdev, dev, rdev 971 net/wireless/util.c cfg80211_process_rdev_events(rdev); rdev 975 net/wireless/util.c err = rdev_change_virtual_intf(rdev, dev, ntype, params); rdev 1016 net/wireless/util.c cfg80211_update_iface_num(rdev, ntype, 1); rdev 1017 net/wireless/util.c cfg80211_update_iface_num(rdev, otype, -1); rdev 1700 net/wireless/util.c int cfg80211_validate_beacon_int(struct cfg80211_registered_device *rdev, rdev 1904 net/wireless/util.c struct cfg80211_registered_device *rdev; rdev 1911 net/wireless/util.c rdev = wiphy_to_rdev(wdev->wiphy); rdev 1912 net/wireless/util.c if (!rdev->ops->get_station) rdev 1917 net/wireless/util.c return rdev_get_station(rdev, dev, mac_addr, sinfo); rdev 39 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev; rdev 43 net/wireless/wext-compat.c rdev = wiphy_to_rdev(wdev->wiphy); rdev 67 net/wireless/wext-compat.c return cfg80211_change_iface(rdev, dev, type, &vifparams); rdev 256 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 267 net/wireless/wext-compat.c err = rdev_set_wiphy_params(rdev, WIPHY_PARAM_RTS_THRESHOLD); rdev 294 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 307 net/wireless/wext-compat.c err = rdev_set_wiphy_params(rdev, WIPHY_PARAM_FRAG_THRESHOLD); rdev 334 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 357 net/wireless/wext-compat.c err = rdev_set_wiphy_params(rdev, changed); rdev 396 net/wireless/wext-compat.c static int __cfg80211_set_encryption(struct cfg80211_registered_device *rdev, rdev 430 net/wireless/wext-compat.c if (!rdev->ops->set_default_mgmt_key) rdev 447 net/wireless/wext-compat.c __cfg80211_leave_ibss(rdev, wdev->netdev, true); rdev 452 net/wireless/wext-compat.c !(rdev->wiphy.flags & WIPHY_FLAG_IBSS_RSN)) rdev 455 net/wireless/wext-compat.c err = rdev_del_key(rdev, dev, idx, pairwise, rdev 479 net/wireless/wext-compat.c err = cfg80211_ibss_wext_join(rdev, wdev); rdev 487 net/wireless/wext-compat.c if (cfg80211_validate_key_settings(rdev, params, idx, pairwise, addr)) rdev 492 net/wireless/wext-compat.c err = rdev_add_key(rdev, dev, idx, pairwise, addr, params); rdev 524 net/wireless/wext-compat.c __cfg80211_leave_ibss(rdev, wdev->netdev, true); rdev 527 net/wireless/wext-compat.c err = rdev_set_default_key(rdev, dev, idx, true, true); rdev 532 net/wireless/wext-compat.c err = cfg80211_ibss_wext_join(rdev, wdev); rdev 540 net/wireless/wext-compat.c err = rdev_set_default_mgmt_key(rdev, dev, idx); rdev 549 net/wireless/wext-compat.c static int cfg80211_set_encryption(struct cfg80211_registered_device *rdev, rdev 557 net/wireless/wext-compat.c err = __cfg80211_set_encryption(rdev, dev, pairwise, addr, rdev 569 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 579 net/wireless/wext-compat.c if (!rdev->ops->del_key || rdev 580 net/wireless/wext-compat.c !rdev->ops->add_key || rdev 581 net/wireless/wext-compat.c !rdev->ops->set_default_key) rdev 601 net/wireless/wext-compat.c err = rdev_set_default_key(rdev, dev, idx, true, rdev 619 net/wireless/wext-compat.c return cfg80211_set_encryption(rdev, dev, false, NULL, remove, rdev 629 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 642 net/wireless/wext-compat.c if (!rdev->ops->del_key || rdev 643 net/wireless/wext-compat.c !rdev->ops->add_key || rdev 644 net/wireless/wext-compat.c !rdev->ops->set_default_key) rdev 708 net/wireless/wext-compat.c rdev, dev, rdev 757 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 775 net/wireless/wext-compat.c chandef.chan = ieee80211_get_channel(&rdev->wiphy, freq); rdev 778 net/wireless/wext-compat.c return cfg80211_set_monitor_channel(rdev, &chandef); rdev 786 net/wireless/wext-compat.c chandef.chan = ieee80211_get_channel(&rdev->wiphy, freq); rdev 789 net/wireless/wext-compat.c return cfg80211_set_mesh_channel(rdev, wdev, &chandef); rdev 800 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 810 net/wireless/wext-compat.c if (!rdev->ops->get_channel) rdev 813 net/wireless/wext-compat.c ret = rdev_get_channel(rdev, wdev, &chandef); rdev 829 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 838 net/wireless/wext-compat.c if (!rdev->ops->set_tx_power) rdev 843 net/wireless/wext-compat.c rfkill_set_sw_state(rdev->rfkill, false); rdev 868 net/wireless/wext-compat.c if (rfkill_set_sw_state(rdev->rfkill, true)) rdev 869 net/wireless/wext-compat.c schedule_work(&rdev->rfkill_block); rdev 873 net/wireless/wext-compat.c return rdev_set_tx_power(rdev, wdev, type, DBM_TO_MBM(dbm)); rdev 881 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 889 net/wireless/wext-compat.c if (!rdev->ops->get_tx_power) rdev 892 net/wireless/wext-compat.c err = rdev_get_tx_power(rdev, wdev, &val); rdev 898 net/wireless/wext-compat.c data->txpower.disabled = rfkill_blocked(rdev->rfkill); rdev 1101 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1109 net/wireless/wext-compat.c if (!rdev->ops->set_power_mgmt) rdev 1132 net/wireless/wext-compat.c err = rdev_set_power_mgmt(rdev, dev, ps, timeout); rdev 1159 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1171 net/wireless/wext-compat.c if (!rdev->ops->set_wds_peer) rdev 1174 net/wireless/wext-compat.c err = rdev_set_wds_peer(rdev, dev, (u8 *)&addr->sa_data); rdev 1203 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1210 net/wireless/wext-compat.c if (!rdev->ops->set_bitrate_mask) rdev 1246 net/wireless/wext-compat.c return rdev_set_bitrate_mask(rdev, dev, NULL, &mask); rdev 1254 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1262 net/wireless/wext-compat.c if (!rdev->ops->get_station) rdev 1275 net/wireless/wext-compat.c err = rdev_get_station(rdev, dev, addr, &sinfo); rdev 1295 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1304 net/wireless/wext-compat.c if (!rdev->ops->get_station) rdev 1318 net/wireless/wext-compat.c if (rdev_get_station(rdev, dev, bssid, &sinfo)) rdev 1323 net/wireless/wext-compat.c switch (rdev->wiphy.signal_type) { rdev 1440 net/wireless/wext-compat.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 1454 net/wireless/wext-compat.c if (!rdev->ops->set_pmksa) rdev 1457 net/wireless/wext-compat.c return rdev_set_pmksa(rdev, dev, &cfg_pmksa); rdev 1460 net/wireless/wext-compat.c if (!rdev->ops->del_pmksa) rdev 1463 net/wireless/wext-compat.c return rdev_del_pmksa(rdev, dev, &cfg_pmksa); rdev 1466 net/wireless/wext-compat.c if (!rdev->ops->flush_pmksa) rdev 1469 net/wireless/wext-compat.c return rdev_flush_pmksa(rdev, dev); rdev 18 net/wireless/wext-sme.c int cfg80211_mgd_wext_connect(struct cfg80211_registered_device *rdev, rdev 57 net/wireless/wext-sme.c err = cfg80211_connect(rdev, wdev->netdev, rdev 70 net/wireless/wext-sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 103 net/wireless/wext-sme.c err = cfg80211_disconnect(rdev, dev, rdev 110 net/wireless/wext-sme.c err = cfg80211_mgd_wext_connect(rdev, wdev); rdev 149 net/wireless/wext-sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 179 net/wireless/wext-sme.c err = cfg80211_disconnect(rdev, dev, rdev 194 net/wireless/wext-sme.c err = cfg80211_mgd_wext_connect(rdev, wdev); rdev 244 net/wireless/wext-sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 272 net/wireless/wext-sme.c err = cfg80211_disconnect(rdev, dev, rdev 284 net/wireless/wext-sme.c err = cfg80211_mgd_wext_connect(rdev, wdev); rdev 317 net/wireless/wext-sme.c struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); rdev 349 net/wireless/wext-sme.c err = cfg80211_disconnect(rdev, dev, rdev 368 net/wireless/wext-sme.c struct cfg80211_registered_device *rdev; rdev 374 net/wireless/wext-sme.c rdev = wiphy_to_rdev(wdev->wiphy); rdev 386 net/wireless/wext-sme.c err = cfg80211_disconnect(rdev, dev, mlme->reason_code, true); rdev 215 security/tomoyo/audit.c dev = stat->rdev; rdev 573 security/tomoyo/common.h dev_t rdev; rdev 747 security/tomoyo/condition.c stat->rdev = inode->i_rdev; rdev 1027 security/tomoyo/condition.c value = MAJOR(stat->rdev); rdev 1031 security/tomoyo/condition.c value = MINOR(stat->rdev); rdev 89 security/tomoyo/mount.c struct tomoyo_path_info rdev; rdev 156 security/tomoyo/mount.c rdev.name = requested_dev_name; rdev 157 security/tomoyo/mount.c tomoyo_fill_path_info(&rdev); rdev 160 security/tomoyo/mount.c r->param.mount.dev = &rdev; rdev 102 sound/core/seq/seq_midi_event.c int snd_midi_event_new(int bufsize, struct snd_midi_event **rdev) rdev 106 sound/core/seq/seq_midi_event.c *rdev = NULL; rdev 121 sound/core/seq/seq_midi_event.c *rdev = dev; rdev 65 sound/core/seq/seq_virmidi.c static int snd_virmidi_dev_receive_event(struct snd_virmidi_dev *rdev, rdev 74 sound/core/seq/seq_virmidi.c read_lock(&rdev->filelist_lock); rdev 76 sound/core/seq/seq_virmidi.c down_read(&rdev->filelist_sem); rdev 77 sound/core/seq/seq_virmidi.c list_for_each_entry(vmidi, &rdev->filelist, list) { rdev 92 sound/core/seq/seq_virmidi.c read_unlock(&rdev->filelist_lock); rdev 94 sound/core/seq/seq_virmidi.c up_read(&rdev->filelist_sem); rdev 105 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev; rdev 107 sound/core/seq/seq_virmidi.c rdev = private_data; rdev 108 sound/core/seq/seq_virmidi.c if (!(rdev->flags & SNDRV_VIRMIDI_USE)) rdev 110 sound/core/seq/seq_virmidi.c return snd_virmidi_dev_receive_event(rdev, ev, atomic); rdev 138 sound/core/seq/seq_virmidi.c !(vmidi->rdev->flags & SNDRV_VIRMIDI_SUBSCRIBE)) { rdev 179 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev = substream->rmidi->private_data; rdev 191 sound/core/seq/seq_virmidi.c vmidi->seq_mode = rdev->seq_mode; rdev 192 sound/core/seq/seq_virmidi.c vmidi->client = rdev->client; rdev 193 sound/core/seq/seq_virmidi.c vmidi->port = rdev->port; rdev 195 sound/core/seq/seq_virmidi.c down_write(&rdev->filelist_sem); rdev 196 sound/core/seq/seq_virmidi.c write_lock_irq(&rdev->filelist_lock); rdev 197 sound/core/seq/seq_virmidi.c list_add_tail(&vmidi->list, &rdev->filelist); rdev 198 sound/core/seq/seq_virmidi.c write_unlock_irq(&rdev->filelist_lock); rdev 199 sound/core/seq/seq_virmidi.c up_write(&rdev->filelist_sem); rdev 200 sound/core/seq/seq_virmidi.c vmidi->rdev = rdev; rdev 209 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev = substream->rmidi->private_data; rdev 221 sound/core/seq/seq_virmidi.c vmidi->seq_mode = rdev->seq_mode; rdev 222 sound/core/seq/seq_virmidi.c vmidi->client = rdev->client; rdev 223 sound/core/seq/seq_virmidi.c vmidi->port = rdev->port; rdev 225 sound/core/seq/seq_virmidi.c vmidi->rdev = rdev; rdev 236 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev = substream->rmidi->private_data; rdev 239 sound/core/seq/seq_virmidi.c down_write(&rdev->filelist_sem); rdev 240 sound/core/seq/seq_virmidi.c write_lock_irq(&rdev->filelist_lock); rdev 242 sound/core/seq/seq_virmidi.c write_unlock_irq(&rdev->filelist_lock); rdev 243 sound/core/seq/seq_virmidi.c up_write(&rdev->filelist_sem); rdev 271 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev; rdev 273 sound/core/seq/seq_virmidi.c rdev = private_data; rdev 274 sound/core/seq/seq_virmidi.c if (!try_module_get(rdev->card->module)) rdev 276 sound/core/seq/seq_virmidi.c rdev->flags |= SNDRV_VIRMIDI_SUBSCRIBE; rdev 286 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev; rdev 288 sound/core/seq/seq_virmidi.c rdev = private_data; rdev 289 sound/core/seq/seq_virmidi.c rdev->flags &= ~SNDRV_VIRMIDI_SUBSCRIBE; rdev 290 sound/core/seq/seq_virmidi.c module_put(rdev->card->module); rdev 301 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev; rdev 303 sound/core/seq/seq_virmidi.c rdev = private_data; rdev 304 sound/core/seq/seq_virmidi.c if (!try_module_get(rdev->card->module)) rdev 306 sound/core/seq/seq_virmidi.c rdev->flags |= SNDRV_VIRMIDI_USE; rdev 316 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev; rdev 318 sound/core/seq/seq_virmidi.c rdev = private_data; rdev 319 sound/core/seq/seq_virmidi.c rdev->flags &= ~SNDRV_VIRMIDI_USE; rdev 320 sound/core/seq/seq_virmidi.c module_put(rdev->card->module); rdev 344 sound/core/seq/seq_virmidi.c static int snd_virmidi_dev_attach_seq(struct snd_virmidi_dev *rdev) rdev 351 sound/core/seq/seq_virmidi.c if (rdev->client >= 0) rdev 360 sound/core/seq/seq_virmidi.c client = snd_seq_create_kernel_client(rdev->card, rdev->device, rdev 361 sound/core/seq/seq_virmidi.c "%s %d-%d", rdev->rmidi->name, rdev 362 sound/core/seq/seq_virmidi.c rdev->card->number, rdev 363 sound/core/seq/seq_virmidi.c rdev->device); rdev 368 sound/core/seq/seq_virmidi.c rdev->client = client; rdev 372 sound/core/seq/seq_virmidi.c sprintf(pinfo->name, "VirMIDI %d-%d", rdev->card->number, rdev->device); rdev 383 sound/core/seq/seq_virmidi.c pcallbacks.private_data = rdev; rdev 393 sound/core/seq/seq_virmidi.c rdev->client = -1; rdev 397 sound/core/seq/seq_virmidi.c rdev->port = pinfo->addr.port; rdev 409 sound/core/seq/seq_virmidi.c static void snd_virmidi_dev_detach_seq(struct snd_virmidi_dev *rdev) rdev 411 sound/core/seq/seq_virmidi.c if (rdev->client >= 0) { rdev 412 sound/core/seq/seq_virmidi.c snd_seq_delete_kernel_client(rdev->client); rdev 413 sound/core/seq/seq_virmidi.c rdev->client = -1; rdev 422 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev = rmidi->private_data; rdev 425 sound/core/seq/seq_virmidi.c switch (rdev->seq_mode) { rdev 427 sound/core/seq/seq_virmidi.c err = snd_virmidi_dev_attach_seq(rdev); rdev 432 sound/core/seq/seq_virmidi.c if (rdev->client == 0) rdev 437 sound/core/seq/seq_virmidi.c pr_err("ALSA: seq_virmidi: seq_mode is not set: %d\n", rdev->seq_mode); rdev 449 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev = rmidi->private_data; rdev 451 sound/core/seq/seq_virmidi.c if (rdev->seq_mode == SNDRV_VIRMIDI_SEQ_DISPATCH) rdev 452 sound/core/seq/seq_virmidi.c snd_virmidi_dev_detach_seq(rdev); rdev 469 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev = rmidi->private_data; rdev 470 sound/core/seq/seq_virmidi.c kfree(rdev); rdev 481 sound/core/seq/seq_virmidi.c struct snd_virmidi_dev *rdev; rdev 491 sound/core/seq/seq_virmidi.c rdev = kzalloc(sizeof(*rdev), GFP_KERNEL); rdev 492 sound/core/seq/seq_virmidi.c if (rdev == NULL) { rdev 496 sound/core/seq/seq_virmidi.c rdev->card = card; rdev 497 sound/core/seq/seq_virmidi.c rdev->rmidi = rmidi; rdev 498 sound/core/seq/seq_virmidi.c rdev->device = device; rdev 499 sound/core/seq/seq_virmidi.c rdev->client = -1; rdev 500 sound/core/seq/seq_virmidi.c init_rwsem(&rdev->filelist_sem); rdev 501 sound/core/seq/seq_virmidi.c rwlock_init(&rdev->filelist_lock); rdev 502 sound/core/seq/seq_virmidi.c INIT_LIST_HEAD(&rdev->filelist); rdev 503 sound/core/seq/seq_virmidi.c rdev->seq_mode = SNDRV_VIRMIDI_SEQ_DISPATCH; rdev 504 sound/core/seq/seq_virmidi.c rmidi->private_data = rdev; rdev 76 sound/drivers/pcsp/pcsp_input.c int pcspkr_input_init(struct input_dev **rdev, struct device *dev) rdev 102 sound/drivers/pcsp/pcsp_input.c *rdev = input_dev; rdev 11 sound/drivers/pcsp/pcsp_input.h int pcspkr_input_init(struct input_dev **rdev, struct device *dev); rdev 94 sound/drivers/virmidi.c struct snd_virmidi_dev *rdev; rdev 99 sound/drivers/virmidi.c rdev = rmidi->private_data; rdev 102 sound/drivers/virmidi.c rdev->seq_mode = SNDRV_VIRMIDI_SEQ_DISPATCH; rdev 440 sound/soc/amd/acp-da7219-max98357a.c struct regulator_dev *rdev; rdev 443 sound/soc/amd/acp-da7219-max98357a.c rdev = devm_regulator_register(&pdev->dev, &acp_da7219_desc, rdev 445 sound/soc/amd/acp-da7219-max98357a.c if (IS_ERR(rdev)) { rdev 447 sound/soc/amd/acp-da7219-max98357a.c (int)PTR_ERR(rdev)); rdev 366 sound/synth/emux/emux_seq.c struct snd_virmidi_dev *rdev; rdev 369 sound/synth/emux/emux_seq.c rdev = rmidi->private_data; rdev 371 sound/synth/emux/emux_seq.c rdev->seq_mode = SNDRV_VIRMIDI_SEQ_ATTACH; rdev 372 sound/synth/emux/emux_seq.c rdev->client = emu->client; rdev 373 sound/synth/emux/emux_seq.c rdev->port = emu->ports[i];