rcu_pwr_gating_cntl 150 drivers/gpu/drm/radeon/sumo_dpm.c u32 rcu_pwr_gating_cntl; rcu_pwr_gating_cntl 192 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL); rcu_pwr_gating_cntl 193 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= rcu_pwr_gating_cntl 195 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PCV(p_c) | PGS(1) | PWR_GATING_EN; rcu_pwr_gating_cntl 197 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~PCP_MASK; rcu_pwr_gating_cntl 198 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PCP(0x77); rcu_pwr_gating_cntl 200 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 202 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL_2); rcu_pwr_gating_cntl 203 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~(MPPU_MASK | MPPD_MASK); rcu_pwr_gating_cntl 204 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= MPPU(p_p) | MPPD(50); rcu_pwr_gating_cntl 205 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL_2, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 207 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL_3); rcu_pwr_gating_cntl 208 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~(DPPU_MASK | DPPD_MASK); rcu_pwr_gating_cntl 209 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= DPPU(d_p) | DPPD(50); rcu_pwr_gating_cntl 210 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL_3, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 212 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL_4); rcu_pwr_gating_cntl 213 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~(RT_MASK | IT_MASK); rcu_pwr_gating_cntl 214 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= RT(r_t) | IT(i_t); rcu_pwr_gating_cntl 215 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL_4, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 222 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL); rcu_pwr_gating_cntl 223 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= rcu_pwr_gating_cntl 225 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PCV(p_c) | PGS(4) | PWR_GATING_EN; rcu_pwr_gating_cntl 227 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~PCP_MASK; rcu_pwr_gating_cntl 228 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PCP(0x77); rcu_pwr_gating_cntl 230 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 233 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL_2); rcu_pwr_gating_cntl 234 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~(MPPU_MASK | MPPD_MASK); rcu_pwr_gating_cntl 235 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= MPPU(113) | MPPD(50); rcu_pwr_gating_cntl 236 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL_2, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 238 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL_3); rcu_pwr_gating_cntl 239 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~(DPPU_MASK | DPPD_MASK); rcu_pwr_gating_cntl 240 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= DPPU(16) | DPPD(50); rcu_pwr_gating_cntl 241 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL_3, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 246 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL); rcu_pwr_gating_cntl 247 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= rcu_pwr_gating_cntl 249 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PGS(5) | PWR_GATING_EN; rcu_pwr_gating_cntl 252 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PCV(4); rcu_pwr_gating_cntl 253 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~PCP_MASK; rcu_pwr_gating_cntl 254 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PCP(0x77); rcu_pwr_gating_cntl 256 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= PCV(11); rcu_pwr_gating_cntl 257 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 260 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL_2); rcu_pwr_gating_cntl 261 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~(MPPU_MASK | MPPD_MASK); rcu_pwr_gating_cntl 262 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= MPPU(113) | MPPD(50); rcu_pwr_gating_cntl 263 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL_2, rcu_pwr_gating_cntl); rcu_pwr_gating_cntl 265 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl = RREG32_RCU(RCU_PWR_GATING_CNTL_3); rcu_pwr_gating_cntl 266 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl &= ~(DPPU_MASK | DPPD_MASK); rcu_pwr_gating_cntl 267 drivers/gpu/drm/radeon/sumo_dpm.c rcu_pwr_gating_cntl |= DPPU(22) | DPPD(50); rcu_pwr_gating_cntl 268 drivers/gpu/drm/radeon/sumo_dpm.c WREG32_RCU(RCU_PWR_GATING_CNTL_3, rcu_pwr_gating_cntl);