RESYNC_CNTL       762 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	REG_UPDATE(RESYNC_CNTL,
RESYNC_CNTL       775 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		REG_UPDATE(RESYNC_CNTL,
RESYNC_CNTL       779 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		REG_UPDATE(RESYNC_CNTL,
RESYNC_CNTL       783 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		REG_UPDATE(RESYNC_CNTL,
RESYNC_CNTL       787 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		REG_UPDATE(RESYNC_CNTL,
RESYNC_CNTL        34 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRI(RESYNC_CNTL, PIXCLK, id), \
RESYNC_CNTL        38 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 		SRI(RESYNC_CNTL, PIXCLK, id), \
RESYNC_CNTL       151 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	uint32_t RESYNC_CNTL;