rcrtc 33 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg) rcrtc 35 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 37 drivers/gpu/drm/rcar-du/rcar_du_crtc.c return rcar_du_read(rcdu, rcrtc->mmio_offset + reg); rcrtc 40 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_write(struct rcar_du_crtc *rcrtc, u32 reg, u32 data) rcrtc 42 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 44 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data); rcrtc 47 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr) rcrtc 49 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 51 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_write(rcdu, rcrtc->mmio_offset + reg, rcrtc 52 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr); rcrtc 55 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set) rcrtc 57 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 59 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_write(rcdu, rcrtc->mmio_offset + reg, rcrtc 60 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_read(rcdu, rcrtc->mmio_offset + reg) | set); rcrtc 63 drivers/gpu/drm/rcar-du/rcar_du_crtc.c void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set) rcrtc 65 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 67 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->dsysr = (rcrtc->dsysr & ~clr) | set; rcrtc 68 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_write(rcdu, rcrtc->mmio_offset + DSYSR, rcrtc->dsysr); rcrtc 82 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_dpll_divider(struct rcar_du_crtc *rcrtc, rcrtc 160 drivers/gpu/drm/rcar-du/rcar_du_crtc.c dev_dbg(rcrtc->dev->dev, rcrtc 211 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) rcrtc 213 drivers/gpu/drm/rcar-du/rcar_du_crtc.c const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode; rcrtc 214 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 219 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcdu->info->dpll_mask & (1 << rcrtc->index)) { rcrtc 244 drivers/gpu/drm/rcar-du/rcar_du_crtc.c extclk = clk_get_rate(rcrtc->extclock); rcrtc 245 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_dpll_divider(rcrtc, &dpll, extclk, target); rcrtc 252 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcrtc->index == 1) rcrtc 259 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_write(rcrtc->group, DPLLCR, dpllcr); rcrtc 262 drivers/gpu/drm/rcar-du/rcar_du_crtc.c } else if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) { rcrtc 273 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_escr_divider(rcrtc->clock, mode_clock, rcrtc 275 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcrtc->extclock) rcrtc 276 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_escr_divider(rcrtc->extclock, mode_clock, rcrtc 279 drivers/gpu/drm/rcar-du/rcar_du_crtc.c dev_dbg(rcrtc->dev->dev, "mode clock %lu %s rate %lu\n", rcrtc 280 drivers/gpu/drm/rcar-du/rcar_du_crtc.c mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext", rcrtc 287 drivers/gpu/drm/rcar-du/rcar_du_crtc.c dev_dbg(rcrtc->dev->dev, "%s: ESCR 0x%08x\n", __func__, escr); rcrtc 289 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? ESCR13 : ESCR02, escr); rcrtc 290 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, rcrtc->index % 2 ? OTAR13 : OTAR02, 0); rcrtc 297 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, DSMR, dsmr); rcrtc 300 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19); rcrtc 301 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start + rcrtc 303 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end - rcrtc 305 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, HCR, mode->htotal - 1); rcrtc 307 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, VDSR, mode->crtc_vtotal - rcrtc 309 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, VDER, mode->crtc_vtotal - rcrtc 312 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, VSPR, mode->crtc_vtotal - rcrtc 315 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, VCR, mode->crtc_vtotal - 1); rcrtc 317 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, DESR, mode->htotal - mode->hsync_start - 1); rcrtc 318 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, DEWR, mode->hdisplay); rcrtc 332 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_update_planes(struct rcar_du_crtc *rcrtc) rcrtc 335 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 343 drivers/gpu/drm/rcar-du/rcar_du_crtc.c for (i = 0; i < rcrtc->group->num_planes; ++i) { rcrtc 344 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_plane *plane = &rcrtc->group->planes[i]; rcrtc 347 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (plane->plane.state->crtc != &rcrtc->crtc || rcrtc 383 drivers/gpu/drm/rcar-du/rcar_du_crtc.c dspr = (rcrtc->index % 2) + 1; rcrtc 384 drivers/gpu/drm/rcar-du/rcar_du_crtc.c hwplanes = 1 << (rcrtc->index % 2); rcrtc 386 drivers/gpu/drm/rcar-du/rcar_du_crtc.c dspr = (rcrtc->index % 2) ? 3 : 1; rcrtc 387 drivers/gpu/drm/rcar-du/rcar_du_crtc.c hwplanes = 1 << ((rcrtc->index % 2) ? 2 : 0); rcrtc 400 drivers/gpu/drm/rcar-du/rcar_du_crtc.c mutex_lock(&rcrtc->group->lock); rcrtc 402 drivers/gpu/drm/rcar-du/rcar_du_crtc.c dptsr_planes = rcrtc->index % 2 ? rcrtc->group->dptsr_planes | hwplanes rcrtc 403 drivers/gpu/drm/rcar-du/rcar_du_crtc.c : rcrtc->group->dptsr_planes & ~hwplanes; rcrtc 405 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (dptsr_planes != rcrtc->group->dptsr_planes) { rcrtc 406 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_write(rcrtc->group, DPTSR, rcrtc 408 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->group->dptsr_planes = dptsr_planes; rcrtc 410 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcrtc->group->used_crtcs) rcrtc 411 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_restart(rcrtc->group); rcrtc 415 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcrtc->group->need_restart) rcrtc 416 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_restart(rcrtc->group); rcrtc 418 drivers/gpu/drm/rcar-du/rcar_du_crtc.c mutex_unlock(&rcrtc->group->lock); rcrtc 420 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, rcrtc 428 drivers/gpu/drm/rcar-du/rcar_du_crtc.c void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc) rcrtc 431 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_device *dev = rcrtc->crtc.dev; rcrtc 435 drivers/gpu/drm/rcar-du/rcar_du_crtc.c event = rcrtc->event; rcrtc 436 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->event = NULL; rcrtc 443 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_send_vblank_event(&rcrtc->crtc, event); rcrtc 444 drivers/gpu/drm/rcar-du/rcar_du_crtc.c wake_up(&rcrtc->flip_wait); rcrtc 447 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_put(&rcrtc->crtc); rcrtc 450 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static bool rcar_du_crtc_page_flip_pending(struct rcar_du_crtc *rcrtc) rcrtc 452 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_device *dev = rcrtc->crtc.dev; rcrtc 457 drivers/gpu/drm/rcar-du/rcar_du_crtc.c pending = rcrtc->event != NULL; rcrtc 463 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_wait_page_flip(struct rcar_du_crtc *rcrtc) rcrtc 465 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 467 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (wait_event_timeout(rcrtc->flip_wait, rcrtc 468 drivers/gpu/drm/rcar-du/rcar_du_crtc.c !rcar_du_crtc_page_flip_pending(rcrtc), rcrtc 474 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_finish_page_flip(rcrtc); rcrtc 481 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_setup(struct rcar_du_crtc *rcrtc) rcrtc 484 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, DOOR, DOOR_RGB(0, 0, 0)); rcrtc 485 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, BPOR, BPOR_RGB(0, 0, 0)); rcrtc 488 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_set_display_timing(rcrtc); rcrtc 489 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_set_routing(rcrtc->group); rcrtc 492 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0); rcrtc 495 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) rcrtc 496 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_vsp_enable(rcrtc); rcrtc 499 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_vblank_on(&rcrtc->crtc); rcrtc 502 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc) rcrtc 510 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcrtc->initialized) rcrtc 513 drivers/gpu/drm/rcar-du/rcar_du_crtc.c ret = clk_prepare_enable(rcrtc->clock); rcrtc 517 drivers/gpu/drm/rcar-du/rcar_du_crtc.c ret = clk_prepare_enable(rcrtc->extclock); rcrtc 521 drivers/gpu/drm/rcar-du/rcar_du_crtc.c ret = rcar_du_group_get(rcrtc->group); rcrtc 525 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_setup(rcrtc); rcrtc 526 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->initialized = true; rcrtc 531 drivers/gpu/drm/rcar-du/rcar_du_crtc.c clk_disable_unprepare(rcrtc->extclock); rcrtc 533 drivers/gpu/drm/rcar-du/rcar_du_crtc.c clk_disable_unprepare(rcrtc->clock); rcrtc 537 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc) rcrtc 539 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_put(rcrtc->group); rcrtc 541 drivers/gpu/drm/rcar-du/rcar_du_crtc.c clk_disable_unprepare(rcrtc->extclock); rcrtc 542 drivers/gpu/drm/rcar-du/rcar_du_crtc.c clk_disable_unprepare(rcrtc->clock); rcrtc 544 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->initialized = false; rcrtc 547 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc) rcrtc 556 drivers/gpu/drm/rcar-du/rcar_du_crtc.c interlaced = rcrtc->crtc.mode.flags & DRM_MODE_FLAG_INTERLACE; rcrtc 557 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK | DSYSR_SCM_MASK, rcrtc 561 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_start_stop(rcrtc->group, true); rcrtc 564 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc) rcrtc 566 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 567 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_crtc *crtc = &rcrtc->crtc; rcrtc 580 drivers/gpu/drm/rcar-du/rcar_du_crtc.c spin_lock_irq(&rcrtc->vblank_lock); rcrtc 581 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR, 0); rcrtc 582 drivers/gpu/drm/rcar-du/rcar_du_crtc.c status = rcar_du_crtc_read(rcrtc, DSSR); rcrtc 583 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->vblank_count = status & DSSR_VBK ? 2 : 1; rcrtc 584 drivers/gpu/drm/rcar-du/rcar_du_crtc.c spin_unlock_irq(&rcrtc->vblank_lock); rcrtc 586 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (!wait_event_timeout(rcrtc->vblank_wait, rcrtc->vblank_count == 0, rcrtc 593 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) rcrtc 595 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_crtc *crtc = &rcrtc->crtc; rcrtc 608 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_disable_planes(rcrtc); rcrtc 615 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_wait_page_flip(rcrtc); rcrtc 619 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) rcrtc 620 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_vsp_disable(rcrtc); rcrtc 629 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_TVM_SYNC)) rcrtc 630 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_TVM_MASK, rcrtc 633 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_group_start_stop(rcrtc->group, false); rcrtc 666 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 668 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 670 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_get(rcrtc); rcrtc 677 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) && rcrtc 680 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index]; rcrtc 688 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_start(rcrtc); rcrtc 694 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 696 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 698 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_stop(rcrtc); rcrtc 699 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_put(rcrtc); rcrtc 701 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index) && rcrtc 704 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcdu->encoders[RCAR_DU_OUTPUT_LVDS0 + rcrtc->index]; rcrtc 724 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 740 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_get(rcrtc); rcrtc 742 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) rcrtc 743 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_vsp_atomic_begin(rcrtc); rcrtc 749 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 750 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_device *dev = rcrtc->crtc.dev; rcrtc 753 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_update_planes(rcrtc); rcrtc 759 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->event = crtc->state->event; rcrtc 764 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) rcrtc 765 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_vsp_atomic_flush(rcrtc); rcrtc 772 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 773 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 803 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_crc_init(struct rcar_du_crtc *rcrtc) rcrtc 805 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 815 drivers/gpu/drm/rcar-du/rcar_du_crtc.c count = rcrtc->vsp->num_planes + 1; rcrtc 825 drivers/gpu/drm/rcar-du/rcar_du_crtc.c for (i = 0; i < rcrtc->vsp->num_planes; ++i) { rcrtc 826 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_plane *plane = &rcrtc->vsp->planes[i].plane; rcrtc 835 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->sources = sources; rcrtc 836 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->sources_count = count; rcrtc 847 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static void rcar_du_crtc_crc_cleanup(struct rcar_du_crtc *rcrtc) rcrtc 851 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (!rcrtc->sources) rcrtc 854 drivers/gpu/drm/rcar-du/rcar_du_crtc.c for (i = 0; i < rcrtc->sources_count; i++) rcrtc 855 drivers/gpu/drm/rcar-du/rcar_du_crtc.c kfree(rcrtc->sources[i]); rcrtc 856 drivers/gpu/drm/rcar-du/rcar_du_crtc.c kfree(rcrtc->sources); rcrtc 858 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->sources = NULL; rcrtc 859 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->sources_count = 0; rcrtc 890 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 892 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_crc_cleanup(rcrtc); rcrtc 919 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 921 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, DSRCR, DSRCR_VBCL); rcrtc 922 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_set(rcrtc, DIER, DIER_VBE); rcrtc 923 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->vblank_enable = true; rcrtc 930 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 932 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_clr(rcrtc, DIER, DIER_VBE); rcrtc 933 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->vblank_enable = false; rcrtc 936 drivers/gpu/drm/rcar-du/rcar_du_crtc.c static int rcar_du_crtc_parse_crc_source(struct rcar_du_crtc *rcrtc, rcrtc 964 drivers/gpu/drm/rcar-du/rcar_du_crtc.c for (i = 0; i < rcrtc->vsp->num_planes; ++i) { rcrtc 965 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (index == rcrtc->vsp->planes[i].plane.base.id) rcrtc 977 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 980 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcar_du_crtc_parse_crc_source(rcrtc, source_name, &source) < 0) { rcrtc 992 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 994 drivers/gpu/drm/rcar-du/rcar_du_crtc.c *count = rcrtc->sources_count; rcrtc 995 drivers/gpu/drm/rcar-du/rcar_du_crtc.c return rcrtc->sources; rcrtc 1001 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 1009 drivers/gpu/drm/rcar-du/rcar_du_crtc.c ret = rcar_du_crtc_parse_crc_source(rcrtc, source_name, &source); rcrtc 1086 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = arg; rcrtc 1087 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_device *rcdu = rcrtc->dev; rcrtc 1091 drivers/gpu/drm/rcar-du/rcar_du_crtc.c spin_lock(&rcrtc->vblank_lock); rcrtc 1093 drivers/gpu/drm/rcar-du/rcar_du_crtc.c status = rcar_du_crtc_read(rcrtc, DSSR); rcrtc 1094 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, DSRCR, status & DSRCR_MASK); rcrtc 1102 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (rcrtc->vblank_count) { rcrtc 1103 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (--rcrtc->vblank_count == 0) rcrtc 1104 drivers/gpu/drm/rcar-du/rcar_du_crtc.c wake_up(&rcrtc->vblank_wait); rcrtc 1108 drivers/gpu/drm/rcar-du/rcar_du_crtc.c spin_unlock(&rcrtc->vblank_lock); rcrtc 1112 drivers/gpu/drm/rcar-du/rcar_du_crtc.c drm_crtc_handle_vblank(&rcrtc->crtc); rcrtc 1113 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_finish_page_flip(rcrtc); rcrtc 1135 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct rcar_du_crtc *rcrtc = &rcdu->crtcs[swindex]; rcrtc 1136 drivers/gpu/drm/rcar-du/rcar_du_crtc.c struct drm_crtc *crtc = &rcrtc->crtc; rcrtc 1153 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->clock = devm_clk_get(rcdu->dev, name); rcrtc 1154 drivers/gpu/drm/rcar-du/rcar_du_crtc.c if (IS_ERR(rcrtc->clock)) { rcrtc 1156 drivers/gpu/drm/rcar-du/rcar_du_crtc.c return PTR_ERR(rcrtc->clock); rcrtc 1162 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->extclock = clk; rcrtc 1175 drivers/gpu/drm/rcar-du/rcar_du_crtc.c init_waitqueue_head(&rcrtc->flip_wait); rcrtc 1176 drivers/gpu/drm/rcar-du/rcar_du_crtc.c init_waitqueue_head(&rcrtc->vblank_wait); rcrtc 1177 drivers/gpu/drm/rcar-du/rcar_du_crtc.c spin_lock_init(&rcrtc->vblank_lock); rcrtc 1179 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->dev = rcdu; rcrtc 1180 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->group = rgrp; rcrtc 1181 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->mmio_offset = mmio_offsets[hwindex]; rcrtc 1182 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->index = hwindex; rcrtc 1183 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcrtc->dsysr = (rcrtc->index % 2 ? 0 : DSYSR_DRES) | DSYSR_TVM_TVSYNC; rcrtc 1186 drivers/gpu/drm/rcar-du/rcar_du_crtc.c primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane; rcrtc 1218 drivers/gpu/drm/rcar-du/rcar_du_crtc.c dev_name(rcdu->dev), rcrtc); rcrtc 1225 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_crc_init(rcrtc); rcrtc 108 drivers/gpu/drm/rcar-du/rcar_du_crtc.h void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc); rcrtc 110 drivers/gpu/drm/rcar-du/rcar_du_crtc.h void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set); rcrtc 90 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_crtc *rcrtc; rcrtc 108 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = rcdu->crtcs; rcrtc 115 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = &rcdu->crtcs[rgrp->index * 2]; rcrtc 123 drivers/gpu/drm/rcar-du/rcar_du_group.c for (i = 0; i < num_crtcs; ++i, ++rcrtc) { rcrtc 124 drivers/gpu/drm/rcar-du/rcar_du_group.c if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) rcrtc 216 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_crtc *rcrtc = &rgrp->dev->crtcs[rgrp->index * 2]; rcrtc 218 drivers/gpu/drm/rcar-du/rcar_du_group.c rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_DRES | DSYSR_DEN, rcrtc 319 drivers/gpu/drm/rcar-du/rcar_du_group.c struct rcar_du_crtc *rcrtc; rcrtc 321 drivers/gpu/drm/rcar-du/rcar_du_group.c rcrtc = &rcdu->crtcs[rgrp->index * 2 + i]; rcrtc 322 drivers/gpu/drm/rcar-du/rcar_du_group.c rstate = to_rcar_crtc_state(rcrtc->crtc.state); rcrtc 402 drivers/gpu/drm/rcar-du/rcar_du_kms.c struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); rcrtc 405 drivers/gpu/drm/rcar-du/rcar_du_kms.c rcdu->dpad0_source = rcrtc->index; rcrtc 408 drivers/gpu/drm/rcar-du/rcar_du_kms.c rcdu->dpad1_source = rcrtc->index; rcrtc 751 drivers/gpu/drm/rcar-du/rcar_du_kms.c struct rcar_du_crtc *rcrtc = &rcdu->crtcs[i]; rcrtc 753 drivers/gpu/drm/rcar-du/rcar_du_kms.c ret = rcar_du_writeback_init(rcdu, rcrtc); rcrtc 51 drivers/gpu/drm/rcar-du/rcar_du_writeback.c struct rcar_du_crtc *rcrtc = wb_to_rcar_crtc(connector); rcrtc 63 drivers/gpu/drm/rcar-du/rcar_du_writeback.c ret = rcar_du_vsp_map_fb(rcrtc->vsp, job->fb, rjob->sg_tables); rcrtc 76 drivers/gpu/drm/rcar-du/rcar_du_writeback.c struct rcar_du_crtc *rcrtc = wb_to_rcar_crtc(connector); rcrtc 82 drivers/gpu/drm/rcar-du/rcar_du_writeback.c rcar_du_vsp_unmap_fb(rcrtc->vsp, job->fb, rjob->sg_tables); rcrtc 199 drivers/gpu/drm/rcar-du/rcar_du_writeback.c struct rcar_du_crtc *rcrtc) rcrtc 201 drivers/gpu/drm/rcar-du/rcar_du_writeback.c struct drm_writeback_connector *wb_conn = &rcrtc->writeback; rcrtc 203 drivers/gpu/drm/rcar-du/rcar_du_writeback.c wb_conn->encoder.possible_crtcs = 1 << drm_crtc_index(&rcrtc->crtc); rcrtc 214 drivers/gpu/drm/rcar-du/rcar_du_writeback.c void rcar_du_writeback_setup(struct rcar_du_crtc *rcrtc, rcrtc 223 drivers/gpu/drm/rcar-du/rcar_du_writeback.c state = rcrtc->writeback.base.state; rcrtc 238 drivers/gpu/drm/rcar-du/rcar_du_writeback.c drm_writeback_queue_job(&rcrtc->writeback, state); rcrtc 241 drivers/gpu/drm/rcar-du/rcar_du_writeback.c void rcar_du_writeback_complete(struct rcar_du_crtc *rcrtc) rcrtc 243 drivers/gpu/drm/rcar-du/rcar_du_writeback.c drm_writeback_signal_completion(&rcrtc->writeback, 0); rcrtc 19 drivers/gpu/drm/rcar-du/rcar_du_writeback.h struct rcar_du_crtc *rcrtc); rcrtc 20 drivers/gpu/drm/rcar-du/rcar_du_writeback.h void rcar_du_writeback_setup(struct rcar_du_crtc *rcrtc, rcrtc 22 drivers/gpu/drm/rcar-du/rcar_du_writeback.h void rcar_du_writeback_complete(struct rcar_du_crtc *rcrtc); rcrtc 25 drivers/gpu/drm/rcar-du/rcar_du_writeback.h struct rcar_du_crtc *rcrtc) rcrtc 30 drivers/gpu/drm/rcar-du/rcar_du_writeback.h rcar_du_writeback_setup(struct rcar_du_crtc *rcrtc, rcrtc 34 drivers/gpu/drm/rcar-du/rcar_du_writeback.h static inline void rcar_du_writeback_complete(struct rcar_du_crtc *rcrtc)