rcpm_v1_regs       23 arch/powerpc/sysdev/fsl_rcpm.c static struct ccsr_rcpm_v1 __iomem *rcpm_v1_regs;
rcpm_v1_regs       32 arch/powerpc/sysdev/fsl_rcpm.c 	setbits32(&rcpm_v1_regs->cpmimr, mask);
rcpm_v1_regs       33 arch/powerpc/sysdev/fsl_rcpm.c 	setbits32(&rcpm_v1_regs->cpmcimr, mask);
rcpm_v1_regs       34 arch/powerpc/sysdev/fsl_rcpm.c 	setbits32(&rcpm_v1_regs->cpmmcmr, mask);
rcpm_v1_regs       35 arch/powerpc/sysdev/fsl_rcpm.c 	setbits32(&rcpm_v1_regs->cpmnmimr, mask);
rcpm_v1_regs       54 arch/powerpc/sysdev/fsl_rcpm.c 	clrbits32(&rcpm_v1_regs->cpmimr, mask);
rcpm_v1_regs       55 arch/powerpc/sysdev/fsl_rcpm.c 	clrbits32(&rcpm_v1_regs->cpmcimr, mask);
rcpm_v1_regs       56 arch/powerpc/sysdev/fsl_rcpm.c 	clrbits32(&rcpm_v1_regs->cpmmcmr, mask);
rcpm_v1_regs       57 arch/powerpc/sysdev/fsl_rcpm.c 	clrbits32(&rcpm_v1_regs->cpmnmimr, mask);
rcpm_v1_regs       74 arch/powerpc/sysdev/fsl_rcpm.c 		setbits32(&rcpm_v1_regs->ippdexpcr, mask);
rcpm_v1_regs       76 arch/powerpc/sysdev/fsl_rcpm.c 		clrbits32(&rcpm_v1_regs->ippdexpcr, mask);
rcpm_v1_regs       94 arch/powerpc/sysdev/fsl_rcpm.c 		setbits32(&rcpm_v1_regs->cdozcr, mask);
rcpm_v1_regs       97 arch/powerpc/sysdev/fsl_rcpm.c 		setbits32(&rcpm_v1_regs->cnapcr, mask);
rcpm_v1_regs      171 arch/powerpc/sysdev/fsl_rcpm.c 		clrbits32(&rcpm_v1_regs->cdozcr, mask);
rcpm_v1_regs      174 arch/powerpc/sysdev/fsl_rcpm.c 		clrbits32(&rcpm_v1_regs->cnapcr, mask);
rcpm_v1_regs      219 arch/powerpc/sysdev/fsl_rcpm.c 	u32 *pmcsr_reg = &rcpm_v1_regs->powmgtcsr;
rcpm_v1_regs      301 arch/powerpc/sysdev/fsl_rcpm.c 	rcpm_common_freeze_time_base(&rcpm_v1_regs->ctbenr, freeze);
rcpm_v1_regs      373 arch/powerpc/sysdev/fsl_rcpm.c 	rcpm_v1_regs = base;