rb_bufsz 44 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c u32 rb_bufsz; rb_bufsz 48 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c rb_bufsz = order_base_2(ring_size / 4); rb_bufsz 49 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c ring_size = (1 << rb_bufsz) * 4; rb_bufsz 109 drivers/gpu/drm/amd/amdgpu/cik_ih.c int rb_bufsz; rb_bufsz 127 drivers/gpu/drm/amd/amdgpu/cik_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); rb_bufsz 131 drivers/gpu/drm/amd/amdgpu/cik_ih.c (rb_bufsz << 1)); rb_bufsz 436 drivers/gpu/drm/amd/amdgpu/cik_sdma.c u32 rb_bufsz; rb_bufsz 462 drivers/gpu/drm/amd/amdgpu/cik_sdma.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 463 drivers/gpu/drm/amd/amdgpu/cik_sdma.c rb_cntl = rb_bufsz << 1; rb_bufsz 110 drivers/gpu/drm/amd/amdgpu/cz_ih.c int rb_bufsz; rb_bufsz 129 drivers/gpu/drm/amd/amdgpu/cz_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); rb_bufsz 132 drivers/gpu/drm/amd/amdgpu/cz_ih.c ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 2815 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c u32 rb_bufsz; rb_bufsz 2831 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 2832 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 2833 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2); rb_bufsz 2872 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 2873 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 2874 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, RB_BLKSZ, rb_bufsz - 2); rb_bufsz 3024 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint32_t rb_bufsz; rb_bufsz 3074 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rb_bufsz = order_base_2(ring->ring_size / 4) - 1; rb_bufsz 3076 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 3077 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_BLKSZ, rb_bufsz - 2); rb_bufsz 2094 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c u32 rb_bufsz; rb_bufsz 2110 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 2111 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 2191 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c u32 rb_bufsz; rb_bufsz 2199 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 2200 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 2219 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 2220 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 2603 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c u32 rb_bufsz; rb_bufsz 2622 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 2623 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c tmp = (order_base_2(AMDGPU_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 4295 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c u32 rb_bufsz; rb_bufsz 4306 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 4307 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 4308 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2); rb_bufsz 3203 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c u32 rb_bufsz; rb_bufsz 3214 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 3215 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 3216 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2); rb_bufsz 109 drivers/gpu/drm/amd/amdgpu/iceland_ih.c int rb_bufsz; rb_bufsz 129 drivers/gpu/drm/amd/amdgpu/iceland_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); rb_bufsz 132 drivers/gpu/drm/amd/amdgpu/iceland_ih.c ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 78 drivers/gpu/drm/amd/amdgpu/navi10_ih.c int rb_bufsz = order_base_2(ih->ring_size / 4); rb_bufsz 86 drivers/gpu/drm/amd/amdgpu/navi10_ih.c ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 414 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c u32 rb_bufsz; rb_bufsz 438 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 440 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 649 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c u32 rb_bufsz; rb_bufsz 676 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 678 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 963 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c uint32_t rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 965 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 625 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c u32 rb_bufsz; rb_bufsz 641 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 643 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 134 drivers/gpu/drm/amd/amdgpu/si_dma.c u32 rb_cntl, dma_cntl, ib_cntl, rb_bufsz; rb_bufsz 145 drivers/gpu/drm/amd/amdgpu/si_dma.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 146 drivers/gpu/drm/amd/amdgpu/si_dma.c rb_cntl = rb_bufsz << 1; rb_bufsz 63 drivers/gpu/drm/amd/amdgpu/si_ih.c int rb_bufsz; rb_bufsz 75 drivers/gpu/drm/amd/amdgpu/si_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); rb_bufsz 79 drivers/gpu/drm/amd/amdgpu/si_ih.c (rb_bufsz << 1) | rb_bufsz 106 drivers/gpu/drm/amd/amdgpu/tonga_ih.c int rb_bufsz; rb_bufsz 125 drivers/gpu/drm/amd/amdgpu/tonga_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); rb_bufsz 127 drivers/gpu/drm/amd/amdgpu/tonga_ih.c ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 257 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uint32_t rb_bufsz; rb_bufsz 367 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 368 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c rb_bufsz = (0x1 << 8) | rb_bufsz; rb_bufsz 369 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c WREG32_P(mmUVD_RBC_RB_CNTL, rb_bufsz, ~0x11f1f); rb_bufsz 295 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uint32_t rb_bufsz, tmp; rb_bufsz 392 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 394 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 702 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uint32_t rb_bufsz, tmp; rb_bufsz 811 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 812 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 933 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uint32_t rb_bufsz, tmp; rb_bufsz 1061 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 1062 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 785 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c uint32_t rb_bufsz, tmp; rb_bufsz 904 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 905 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 974 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c uint32_t rb_bufsz, tmp; rb_bufsz 1077 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 1078 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 931 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c uint32_t rb_bufsz, tmp; rb_bufsz 1021 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 1022 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 1057 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c uint32_t rb_bufsz, tmp; rb_bufsz 1186 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 1187 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 714 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c uint32_t rb_bufsz, tmp; rb_bufsz 847 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 848 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz); rb_bufsz 168 drivers/gpu/drm/amd/amdgpu/vega10_ih.c int rb_bufsz = order_base_2(ih->ring_size / 4); rb_bufsz 176 drivers/gpu/drm/amd/amdgpu/vega10_ih.c ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); rb_bufsz 4064 drivers/gpu/drm/radeon/cik.c u32 rb_bufsz; rb_bufsz 4083 drivers/gpu/drm/radeon/cik.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 4084 drivers/gpu/drm/radeon/cik.c tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 6953 drivers/gpu/drm/radeon/cik.c int rb_bufsz; rb_bufsz 6984 drivers/gpu/drm/radeon/cik.c rb_bufsz = order_base_2(rdev->ih.ring_size / 4); rb_bufsz 6988 drivers/gpu/drm/radeon/cik.c (rb_bufsz << 1)); rb_bufsz 369 drivers/gpu/drm/radeon/cik_sdma.c u32 rb_bufsz; rb_bufsz 388 drivers/gpu/drm/radeon/cik_sdma.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 389 drivers/gpu/drm/radeon/cik_sdma.c rb_cntl = rb_bufsz << 1; rb_bufsz 3067 drivers/gpu/drm/radeon/evergreen.c u32 rb_bufsz; rb_bufsz 3083 drivers/gpu/drm/radeon/evergreen.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 3084 drivers/gpu/drm/radeon/evergreen.c tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 191 drivers/gpu/drm/radeon/ni_dma.c u32 rb_bufsz; rb_bufsz 210 drivers/gpu/drm/radeon/ni_dma.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 211 drivers/gpu/drm/radeon/ni_dma.c rb_cntl = rb_bufsz << 1; rb_bufsz 1113 drivers/gpu/drm/radeon/r100.c unsigned rb_bufsz; rb_bufsz 1135 drivers/gpu/drm/radeon/r100.c rb_bufsz = order_base_2(ring_size / 8); rb_bufsz 1136 drivers/gpu/drm/radeon/r100.c ring_size = (1 << (rb_bufsz + 1)) * 4; rb_bufsz 1169 drivers/gpu/drm/radeon/r100.c tmp = (REG_SET(RADEON_RB_BUFSZ, rb_bufsz) | rb_bufsz 2719 drivers/gpu/drm/radeon/r600.c u32 rb_bufsz; rb_bufsz 2729 drivers/gpu/drm/radeon/r600.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 2730 drivers/gpu/drm/radeon/r600.c tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 2781 drivers/gpu/drm/radeon/r600.c u32 rb_bufsz; rb_bufsz 2785 drivers/gpu/drm/radeon/r600.c rb_bufsz = order_base_2(ring_size / 8); rb_bufsz 2786 drivers/gpu/drm/radeon/r600.c ring_size = (1 << (rb_bufsz + 1)) * 4; rb_bufsz 3471 drivers/gpu/drm/radeon/r600.c u32 rb_bufsz; rb_bufsz 3474 drivers/gpu/drm/radeon/r600.c rb_bufsz = order_base_2(ring_size / 4); rb_bufsz 3475 drivers/gpu/drm/radeon/r600.c ring_size = (1 << rb_bufsz) * 4; rb_bufsz 3677 drivers/gpu/drm/radeon/r600.c int rb_bufsz; rb_bufsz 3711 drivers/gpu/drm/radeon/r600.c rb_bufsz = order_base_2(rdev->ih.ring_size / 4); rb_bufsz 3715 drivers/gpu/drm/radeon/r600.c (rb_bufsz << 1)); rb_bufsz 124 drivers/gpu/drm/radeon/r600_dma.c u32 rb_bufsz; rb_bufsz 131 drivers/gpu/drm/radeon/r600_dma.c rb_bufsz = order_base_2(ring->ring_size / 4); rb_bufsz 132 drivers/gpu/drm/radeon/r600_dma.c rb_cntl = rb_bufsz << 1; rb_bufsz 3652 drivers/gpu/drm/radeon/si.c u32 rb_bufsz; rb_bufsz 3669 drivers/gpu/drm/radeon/si.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 3670 drivers/gpu/drm/radeon/si.c tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 3700 drivers/gpu/drm/radeon/si.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 3701 drivers/gpu/drm/radeon/si.c tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 3724 drivers/gpu/drm/radeon/si.c rb_bufsz = order_base_2(ring->ring_size / 8); rb_bufsz 3725 drivers/gpu/drm/radeon/si.c tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; rb_bufsz 5981 drivers/gpu/drm/radeon/si.c int rb_bufsz; rb_bufsz 6012 drivers/gpu/drm/radeon/si.c rb_bufsz = order_base_2(rdev->ih.ring_size / 4); rb_bufsz 6016 drivers/gpu/drm/radeon/si.c (rb_bufsz << 1)); rb_bufsz 266 drivers/gpu/drm/radeon/uvd_v1_0.c uint32_t rb_bufsz; rb_bufsz 377 drivers/gpu/drm/radeon/uvd_v1_0.c rb_bufsz = order_base_2(ring->ring_size); rb_bufsz 378 drivers/gpu/drm/radeon/uvd_v1_0.c rb_bufsz = (0x1 << 8) | rb_bufsz; rb_bufsz 379 drivers/gpu/drm/radeon/uvd_v1_0.c WREG32_P(UVD_RBC_RB_CNTL, rb_bufsz, ~0x11f1f);