range_min_qp      301 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		DC_LOG_DSC("\trc_range_parameters[%d].range_min_qp %d", i, pps->rc_range_params[i].range_min_qp);
range_min_qp      639 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP0, reg_vals->pps.rc_range_params[0].range_min_qp,
range_min_qp      644 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP1, reg_vals->pps.rc_range_params[1].range_min_qp,
range_min_qp      647 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP2, reg_vals->pps.rc_range_params[2].range_min_qp,
range_min_qp      652 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP3, reg_vals->pps.rc_range_params[3].range_min_qp,
range_min_qp      655 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP4, reg_vals->pps.rc_range_params[4].range_min_qp,
range_min_qp      660 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP5, reg_vals->pps.rc_range_params[5].range_min_qp,
range_min_qp      663 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP6, reg_vals->pps.rc_range_params[6].range_min_qp,
range_min_qp      668 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP7, reg_vals->pps.rc_range_params[7].range_min_qp,
range_min_qp      671 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP8, reg_vals->pps.rc_range_params[8].range_min_qp,
range_min_qp      676 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP9, reg_vals->pps.rc_range_params[9].range_min_qp,
range_min_qp      679 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP10, reg_vals->pps.rc_range_params[10].range_min_qp,
range_min_qp      684 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP11, reg_vals->pps.rc_range_params[11].range_min_qp,
range_min_qp      687 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP12, reg_vals->pps.rc_range_params[12].range_min_qp,
range_min_qp      692 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP13, reg_vals->pps.rc_range_params[13].range_min_qp,
range_min_qp      695 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		RANGE_MIN_QP14, reg_vals->pps.rc_range_params[14].range_min_qp,
range_min_qp       37 drivers/gpu/drm/amd/display/dc/dsc/dscc_types.h 	int range_min_qp;
range_min_qp       88 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c 		dsc_cfg->rc_range_params[i].range_min_qp     = rc->qp_min[i];
range_min_qp      219 drivers/gpu/drm/drm_dsc.c 			((dsc_cfg->rc_range_params[i].range_min_qp <<
range_min_qp      425 drivers/gpu/drm/i915/display/intel_vdsc.c 		vdsc_cfg->rc_range_params[i].range_min_qp =
range_min_qp      426 drivers/gpu/drm/i915/display/intel_vdsc.c 			rc_params[row_index][column_index].rc_range_params[i].range_min_qp;
range_min_qp      805 drivers/gpu/drm/i915/display/intel_vdsc.c 			       (vdsc_cfg->rc_range_params[i].range_min_qp <<
range_min_qp       57 include/drm/drm_dsc.h 	u8 range_min_qp;