ram_user 189 drivers/gpu/drm/nouveau/dispnv50/disp.c .limit = device->info.ram_user - 1, ram_user 71 drivers/gpu/drm/nouveau/dispnv50/wndw.c args.base.limit = drm->client.device.info.ram_user - 1; ram_user 39 drivers/gpu/drm/nouveau/include/nvif/cl0080.h __u64 ram_user; ram_user 193 drivers/gpu/drm/nouveau/nouveau_chan.c args.limit = args.start + device->info.ram_user - 1; ram_user 198 drivers/gpu/drm/nouveau/nouveau_chan.c args.limit = device->info.ram_user - 1; ram_user 388 drivers/gpu/drm/nouveau/nouveau_chan.c args.limit = device->info.ram_user - 1; ram_user 510 drivers/gpu/drm/nouveau/nouveau_dmem.c size = ALIGN(drm->client.device.info.ram_user, DMEM_CHUNK_SIZE); ram_user 242 drivers/gpu/drm/nouveau/nouveau_ttm.c drm->gem.vram_available = drm->client.device.info.ram_user; ram_user 187 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c args->v0.ram_size = args->v0.ram_user = fb->ram->size; ram_user 189 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c args->v0.ram_size = args->v0.ram_user = 0; ram_user 191 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c args->v0.ram_user = args->v0.ram_user - imem->reserved;