ram_header 354 drivers/gpu/drm/qxl/qxl_cmd.c qdev->ram_header->update_area = *area; ram_header 355 drivers/gpu/drm/qxl/qxl_cmd.c qdev->ram_header->update_surface = surface_id; ram_header 391 drivers/gpu/drm/qxl/qxl_cmd.c DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n", qdev, qdev->ram_header); ram_header 392 drivers/gpu/drm/qxl/qxl_cmd.c create = &qdev->ram_header->create_surface; ram_header 290 drivers/gpu/drm/qxl/qxl_display.c BUG_ON(!qdev->ram_header->monitors_config); ram_header 1173 drivers/gpu/drm/qxl/qxl_display.c qdev->ram_header->monitors_config = ram_header 1191 drivers/gpu/drm/qxl/qxl_display.c qdev->ram_header->monitors_config = 0; ram_header 190 drivers/gpu/drm/qxl/qxl_drv.c qdev->ram_header->int_mask = QXL_INTERRUPT_MASK; ram_header 225 drivers/gpu/drm/qxl/qxl_drv.h struct qxl_ram_header *ram_header; ram_header 38 drivers/gpu/drm/qxl/qxl_irq.c pending = xchg(&qdev->ram_header->int_pending, 0); ram_header 69 drivers/gpu/drm/qxl/qxl_irq.c qdev->ram_header->int_mask = QXL_INTERRUPT_MASK; ram_header 97 drivers/gpu/drm/qxl/qxl_irq.c qdev->ram_header->int_mask = QXL_INTERRUPT_MASK; ram_header 61 drivers/gpu/drm/qxl/qxl_kms.c qdev->ram_header->mem_slot.mem_start = slot->start_phys_addr; ram_header 62 drivers/gpu/drm/qxl/qxl_kms.c qdev->ram_header->mem_slot.mem_end = slot->start_phys_addr + slot->size; ram_header 196 drivers/gpu/drm/qxl/qxl_kms.c qdev->ram_header = ioremap(qdev->vram_base + ram_header 198 drivers/gpu/drm/qxl/qxl_kms.c sizeof(*qdev->ram_header)); ram_header 199 drivers/gpu/drm/qxl/qxl_kms.c if (!qdev->ram_header) { ram_header 205 drivers/gpu/drm/qxl/qxl_kms.c qdev->command_ring = qxl_ring_create(&(qdev->ram_header->cmd_ring_hdr), ram_header 218 drivers/gpu/drm/qxl/qxl_kms.c &(qdev->ram_header->cursor_ring_hdr), ram_header 232 drivers/gpu/drm/qxl/qxl_kms.c &(qdev->ram_header->release_ring_hdr), ram_header 285 drivers/gpu/drm/qxl/qxl_kms.c iounmap(qdev->ram_header); ram_header 310 drivers/gpu/drm/qxl/qxl_kms.c iounmap(qdev->ram_header);