r_pll             128 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	u32 r_pll = 1;
r_pll             197 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			r_pll = 0x10 >> (7 - phy->pll_fbd_2p);
r_pll             204 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		} else if (m_pll >= 2 * 2 * r_pll && m_pll <= 2 * 4 * r_pll) {
r_pll             205 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			phy->pll_pre_p = m_pll / (2 * r_pll);
r_pll             209 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		} else if (m_pll >= 2 * 5 * r_pll && m_pll <= 2 * 150 * r_pll) {
r_pll             210 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			if (((m_pll / (2 * r_pll)) % 2) == 0) {
r_pll             212 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) / 2 - 1;
r_pll             214 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) % 2 + 2;
r_pll             217 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) / 2;
r_pll             219 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 					(m_pll / (2 * r_pll)) % 2;