r_order 475 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h static void bnx2x_init_pxp_arb(struct bnx2x *bp, int r_order, r_order 480 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h if (r_order > MAX_RD_ORD) { r_order 482 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h r_order, MAX_RD_ORD); r_order 483 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h r_order = MAX_RD_ORD; r_order 494 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h DP(NETIF_MSG_HW, "read order %d write order %d\n", r_order, w_order); r_order 497 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h REG_WR(bp, read_arb_addr[i].l, read_arb_data[i][r_order].l); r_order 499 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h read_arb_data[i][r_order].add); r_order 501 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h read_arb_data[i][r_order].ubound); r_order 537 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h val = read_arb_data[NUM_RD_Q-1][r_order].add; r_order 538 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h val += read_arb_data[NUM_RD_Q-1][r_order].ubound << 10; r_order 539 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h val += read_arb_data[NUM_RD_Q-1][r_order].l << 17; r_order 544 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h REG_WR(bp, PXP2_REG_RQ_RD_MBS0, r_order); r_order 545 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h REG_WR(bp, PXP2_REG_RQ_RD_MBS1, r_order); r_order 547 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h if ((CHIP_IS_E1(bp) || CHIP_IS_E1H(bp)) && (r_order == MAX_RD_ORD)) r_order 6900 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c int r_order, w_order; r_order 6906 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c r_order = ((devctl & PCI_EXP_DEVCTL_READRQ) >> 12); r_order 6909 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c r_order = bp->mrrs; r_order 6912 drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c bnx2x_init_pxp_arb(bp, r_order, w_order);