REGAMMA_LUT_WRITE_EN_MASK 1181 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	REG_UPDATE(REGAMMA_LUT_WRITE_EN_MASK,
REGAMMA_LUT_WRITE_EN_MASK 1182 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 		   REGAMMA_LUT_WRITE_EN_MASK, 7);
REGAMMA_LUT_WRITE_EN_MASK   66 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	SRI(REGAMMA_LUT_WRITE_EN_MASK, DCP, id), \
REGAMMA_LUT_WRITE_EN_MASK  157 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(REGAMMA_LUT_WRITE_EN_MASK, REGAMMA_LUT_WRITE_EN_MASK, mask_sh),\
REGAMMA_LUT_WRITE_EN_MASK  251 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(DCP0_REGAMMA_LUT_WRITE_EN_MASK, REGAMMA_LUT_WRITE_EN_MASK, mask_sh),\
REGAMMA_LUT_WRITE_EN_MASK  339 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	type REGAMMA_LUT_WRITE_EN_MASK; \
REGAMMA_LUT_WRITE_EN_MASK  414 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	uint32_t REGAMMA_LUT_WRITE_EN_MASK;