r_mixer           109 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	struct mdp5_hw_mixer *mixer, *r_mixer;
r_mixer           126 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	r_mixer = mdp5_cstate->pipeline.r_mixer;
r_mixer           127 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (r_mixer)
r_mixer           128 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		flush_mask |= mdp_ctl_flush_mask_lm(r_mixer->lm);
r_mixer           222 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	struct mdp5_hw_mixer *r_mixer = pipeline->r_mixer;
r_mixer           223 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	uint32_t r_lm = r_mixer ? r_mixer->lm : 0;
r_mixer           258 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		if (r_mixer)
r_mixer           337 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		if (r_mixer) {
r_mixer           350 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (r_mixer) {
r_mixer           368 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	struct mdp5_hw_mixer *r_mixer = mdp5_cstate->pipeline.r_mixer;
r_mixer           382 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (r_mixer)
r_mixer           395 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (r_mixer) {
r_mixer           396 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		u32 r_lm = r_mixer->lm;
r_mixer           517 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if ((need_right_mixer && !pipeline->r_mixer) ||
r_mixer           518 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	    (!need_right_mixer && pipeline->r_mixer))
r_mixer           523 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		struct mdp5_hw_mixer *old_r_mixer = pipeline->r_mixer;
r_mixer           533 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 					&pipeline->r_mixer : NULL);
r_mixer           541 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 				pipeline->r_mixer = NULL;
r_mixer           598 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (mdp5_cstate->pipeline.r_mixer)
r_mixer           889 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (mdp5_cstate->pipeline.r_mixer)
r_mixer           960 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (mdp5_cstate->pipeline.r_mixer)
r_mixer          1004 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		drm_printf(p, "\tright hwmixer=%s\n", pipeline->r_mixer ?
r_mixer          1005 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 			   pipeline->r_mixer->name : "(null)");
r_mixer           159 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	if (pipeline->r_mixer)
r_mixer           262 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	if (pipeline->r_mixer) {
r_mixer           353 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	struct mdp5_hw_mixer *r_mixer = pipeline->r_mixer;
r_mixer           364 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 		if (r_mixer)
r_mixer           377 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 		if (r_mixer) {
r_mixer           394 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	if (r_mixer) {
r_mixer           395 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 		ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, r_mixer->lm),
r_mixer           397 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 		ctl_write(ctl, REG_MDP5_CTL_LAYER_EXT_REG(ctl->id, r_mixer->lm),
r_mixer           403 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	if (r_mixer)
r_mixer           404 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 		ctl->pending_ctl_trigger |= mdp_ctl_flush_mask_lm(r_mixer->lm);
r_mixer           408 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	if (r_mixer)
r_mixer           410 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 		    r_mixer->lm, r_blend_cfg, r_blend_ext_cfg);
r_mixer           113 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h 	struct mdp5_hw_mixer *r_mixer;	/* right mixer */
r_mixer            40 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c 		      struct mdp5_hw_mixer **r_mixer)
r_mixer            71 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c 		if (r_mixer) {
r_mixer            81 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c 			*r_mixer = mdp5_kms->hwmixers[pair_idx];
r_mixer           104 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c 	if (r_mixer && !(*r_mixer))
r_mixer           110 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c 	if (r_mixer) {
r_mixer           111 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c 		DBG("assigning Right Layer Mixer %d to crtc %s", (*r_mixer)->lm,
r_mixer           113 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c 		new_state->hwmixer_to_crtc[(*r_mixer)->idx] = crtc;
r_mixer            32 drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.h 		      struct mdp5_hw_mixer **r_mixer);