REFCLK_CNTL 151 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h SR(REFCLK_CNTL), \ REFCLK_CNTL 355 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h uint32_t REFCLK_CNTL; REFCLK_CNTL 1193 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(REFCLK_CNTL, 0); REFCLK_CNTL 106 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.c REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); REFCLK_CNTL 37 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h SR(REFCLK_CNTL) REFCLK_CNTL 61 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ REFCLK_CNTL 62 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh) REFCLK_CNTL 90 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h uint32_t REFCLK_CNTL; REFCLK_CNTL 155 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(REFCLK_CNTL, 0); REFCLK_CNTL 2018 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c if (REG(REFCLK_CNTL)) REFCLK_CNTL 2019 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(REFCLK_CNTL, 0);