qvec              242 drivers/crypto/cavium/nitrox/nitrox_dev.h 	struct nitrox_q_vector *qvec;
qvec               29 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_q_vector *qvec = data;
qvec               31 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_cmdq *cmdq = qvec->cmdq;
qvec               36 drivers/crypto/cavium/nitrox/nitrox_isr.c 		tasklet_hi_schedule(&qvec->resp_tasklet);
qvec              205 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_q_vector *qvec = (void *)(uintptr_t)(data);
qvec              206 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_device *ndev = qvec->ndev;
qvec              224 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_q_vector *qvec = data;
qvec              225 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_device *ndev = qvec->ndev;
qvec              268 drivers/crypto/cavium/nitrox/nitrox_isr.c 		struct nitrox_q_vector *qvec;
qvec              271 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec = ndev->qvec + i;
qvec              272 drivers/crypto/cavium/nitrox/nitrox_isr.c 		if (!qvec->valid)
qvec              278 drivers/crypto/cavium/nitrox/nitrox_isr.c 		free_irq(vec, qvec);
qvec              280 drivers/crypto/cavium/nitrox/nitrox_isr.c 		tasklet_disable(&qvec->resp_tasklet);
qvec              281 drivers/crypto/cavium/nitrox/nitrox_isr.c 		tasklet_kill(&qvec->resp_tasklet);
qvec              282 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec->valid = false;
qvec              284 drivers/crypto/cavium/nitrox/nitrox_isr.c 	kfree(ndev->qvec);
qvec              285 drivers/crypto/cavium/nitrox/nitrox_isr.c 	ndev->qvec = NULL;
qvec              292 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_q_vector *qvec;
qvec              318 drivers/crypto/cavium/nitrox/nitrox_isr.c 	ndev->qvec = kcalloc(nr_vecs, sizeof(*qvec), GFP_KERNEL);
qvec              319 drivers/crypto/cavium/nitrox/nitrox_isr.c 	if (!ndev->qvec) {
qvec              326 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec = &ndev->qvec[i];
qvec              328 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec->ring = i / NR_RING_VECTORS;
qvec              329 drivers/crypto/cavium/nitrox/nitrox_isr.c 		if (qvec->ring >= ndev->nr_queues)
qvec              332 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec->cmdq = &ndev->pkt_inq[qvec->ring];
qvec              333 drivers/crypto/cavium/nitrox/nitrox_isr.c 		snprintf(qvec->name, IRQ_NAMESZ, "nitrox-pkt%d", qvec->ring);
qvec              336 drivers/crypto/cavium/nitrox/nitrox_isr.c 		ret = request_irq(vec, nps_pkt_slc_isr, 0, qvec->name, qvec);
qvec              339 drivers/crypto/cavium/nitrox/nitrox_isr.c 				qvec->ring);
qvec              342 drivers/crypto/cavium/nitrox/nitrox_isr.c 		cpu = qvec->ring % num_online_cpus();
qvec              345 drivers/crypto/cavium/nitrox/nitrox_isr.c 		tasklet_init(&qvec->resp_tasklet, pkt_slc_resp_tasklet,
qvec              346 drivers/crypto/cavium/nitrox/nitrox_isr.c 			     (unsigned long)qvec);
qvec              347 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec->valid = true;
qvec              352 drivers/crypto/cavium/nitrox/nitrox_isr.c 	qvec = &ndev->qvec[i];
qvec              353 drivers/crypto/cavium/nitrox/nitrox_isr.c 	qvec->ndev = ndev;
qvec              355 drivers/crypto/cavium/nitrox/nitrox_isr.c 	snprintf(qvec->name, IRQ_NAMESZ, "nitrox-core-int%d", i);
qvec              358 drivers/crypto/cavium/nitrox/nitrox_isr.c 	ret = request_irq(vec, nps_core_int_isr, 0, qvec->name, qvec);
qvec              366 drivers/crypto/cavium/nitrox/nitrox_isr.c 	tasklet_init(&qvec->resp_tasklet, nps_core_int_tasklet,
qvec              367 drivers/crypto/cavium/nitrox/nitrox_isr.c 		     (unsigned long)qvec);
qvec              368 drivers/crypto/cavium/nitrox/nitrox_isr.c 	qvec->valid = true;
qvec              383 drivers/crypto/cavium/nitrox/nitrox_isr.c 		struct nitrox_q_vector *qvec;
qvec              386 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec = ndev->qvec + i;
qvec              387 drivers/crypto/cavium/nitrox/nitrox_isr.c 		if (!qvec->valid)
qvec              392 drivers/crypto/cavium/nitrox/nitrox_isr.c 		free_irq(vec, qvec);
qvec              394 drivers/crypto/cavium/nitrox/nitrox_isr.c 		tasklet_disable(&qvec->resp_tasklet);
qvec              395 drivers/crypto/cavium/nitrox/nitrox_isr.c 		tasklet_kill(&qvec->resp_tasklet);
qvec              396 drivers/crypto/cavium/nitrox/nitrox_isr.c 		qvec->valid = false;
qvec              398 drivers/crypto/cavium/nitrox/nitrox_isr.c 	kfree(ndev->qvec);
qvec              399 drivers/crypto/cavium/nitrox/nitrox_isr.c 	ndev->qvec = NULL;
qvec              406 drivers/crypto/cavium/nitrox/nitrox_isr.c 	struct nitrox_q_vector *qvec;
qvec              422 drivers/crypto/cavium/nitrox/nitrox_isr.c 	qvec = kcalloc(NR_NON_RING_VECTORS, sizeof(*qvec), GFP_KERNEL);
qvec              423 drivers/crypto/cavium/nitrox/nitrox_isr.c 	if (!qvec) {
qvec              427 drivers/crypto/cavium/nitrox/nitrox_isr.c 	qvec->ndev = ndev;
qvec              429 drivers/crypto/cavium/nitrox/nitrox_isr.c 	ndev->qvec = qvec;
qvec              431 drivers/crypto/cavium/nitrox/nitrox_isr.c 	snprintf(qvec->name, IRQ_NAMESZ, "nitrox-core-int%d",
qvec              435 drivers/crypto/cavium/nitrox/nitrox_isr.c 	ret = request_irq(vec, nps_core_int_isr, 0, qvec->name, qvec);
qvec              444 drivers/crypto/cavium/nitrox/nitrox_isr.c 	tasklet_init(&qvec->resp_tasklet, nps_core_int_tasklet,
qvec              445 drivers/crypto/cavium/nitrox/nitrox_isr.c 		     (unsigned long)qvec);
qvec              446 drivers/crypto/cavium/nitrox/nitrox_isr.c 	qvec->valid = true;
qvec              584 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c 	struct nitrox_q_vector *qvec = (void *)(uintptr_t)(data);
qvec              585 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c 	struct nitrox_cmdq *cmdq = qvec->cmdq;
qvec             1033 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c static inline void mvpp2_qvec_interrupt_enable(struct mvpp2_queue_vector *qvec)
qvec             1035 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	struct mvpp2_port *port = qvec->port;
qvec             1038 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		    MVPP2_ISR_ENABLE_INTERRUPT(qvec->sw_thread_mask));
qvec             1041 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c static inline void mvpp2_qvec_interrupt_disable(struct mvpp2_queue_vector *qvec)
qvec             1043 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	struct mvpp2_port *port = qvec->port;
qvec             1046 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 		    MVPP2_ISR_DISABLE_INTERRUPT(qvec->sw_thread_mask));