queue_state 4508 drivers/gpu/drm/radeon/cik.c struct hqd_registers queue_state; queue_state 4629 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control = queue_state 4632 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control |= DOORBELL_EN; queue_state 4634 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_EN; queue_state 4636 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control); queue_state 4639 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_dequeue_request = 0; queue_state 4640 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_rptr = 0; queue_state 4641 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_wptr= 0; queue_state 4649 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_DEQUEUE_REQUEST, mqd->queue_state.cp_hqd_dequeue_request); queue_state 4650 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_RPTR, mqd->queue_state.cp_hqd_pq_rptr); queue_state 4651 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_WPTR, mqd->queue_state.cp_hqd_pq_wptr); queue_state 4655 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_mqd_base_addr = mqd_gpu_addr & 0xfffffffc; queue_state 4656 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr); queue_state 4657 drivers/gpu/drm/radeon/cik.c WREG32(CP_MQD_BASE_ADDR, mqd->queue_state.cp_mqd_base_addr); queue_state 4658 drivers/gpu/drm/radeon/cik.c WREG32(CP_MQD_BASE_ADDR_HI, mqd->queue_state.cp_mqd_base_addr_hi); queue_state 4660 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_mqd_control = RREG32(CP_MQD_CONTROL); queue_state 4661 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_mqd_control &= ~MQD_VMID_MASK; queue_state 4662 drivers/gpu/drm/radeon/cik.c WREG32(CP_MQD_CONTROL, mqd->queue_state.cp_mqd_control); queue_state 4666 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_base = hqd_gpu_addr; queue_state 4667 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); queue_state 4668 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_BASE, mqd->queue_state.cp_hqd_pq_base); queue_state 4669 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_BASE_HI, mqd->queue_state.cp_hqd_pq_base_hi); queue_state 4672 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_control = RREG32(CP_HQD_PQ_CONTROL); queue_state 4673 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_control &= queue_state 4676 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_control |= queue_state 4678 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_control |= queue_state 4681 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_control |= BUF_SWAP_32BIT; queue_state 4683 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_control &= queue_state 4685 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_control |= queue_state 4687 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control); queue_state 4694 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; queue_state 4695 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; queue_state 4696 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_WPTR_POLL_ADDR, mqd->queue_state.cp_hqd_pq_wptr_poll_addr); queue_state 4698 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi); queue_state 4705 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc; queue_state 4706 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_rptr_report_addr_hi = queue_state 4709 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_rptr_report_addr); queue_state 4711 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_rptr_report_addr_hi); queue_state 4715 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control = queue_state 4717 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control &= ~DOORBELL_OFFSET_MASK; queue_state 4718 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control |= queue_state 4720 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control |= DOORBELL_EN; queue_state 4721 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control &= queue_state 4725 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control = 0; queue_state 4728 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_doorbell_control); queue_state 4732 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_wptr = rdev->ring[idx].wptr; queue_state 4733 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_PQ_WPTR, mqd->queue_state.cp_hqd_pq_wptr); queue_state 4734 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_pq_rptr = RREG32(CP_HQD_PQ_RPTR); queue_state 4737 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_vmid = 0; queue_state 4738 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_VMID, mqd->queue_state.cp_hqd_vmid); queue_state 4741 drivers/gpu/drm/radeon/cik.c mqd->queue_state.cp_hqd_active = 1; queue_state 4742 drivers/gpu/drm/radeon/cik.c WREG32(CP_HQD_ACTIVE, mqd->queue_state.cp_hqd_active); queue_state 112 drivers/mailbox/ti-msgmgr.c void __iomem *queue_state; queue_state 162 drivers/mailbox/ti-msgmgr.c val = readl(qinst->queue_state) & status_cnt_mask; queue_state 188 drivers/mailbox/ti-msgmgr.c val = readl(qinst->queue_state) & d->status_err_mask; queue_state 607 drivers/mailbox/ti-msgmgr.c qinst->queue_state = inst->queue_state_debug_region + queue_state 623 drivers/mailbox/ti-msgmgr.c qinst->queue_state = queue_state 504 drivers/net/ethernet/neterion/s2io.c sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_STOP; queue_state 512 drivers/net/ethernet/neterion/s2io.c sp->mac_control.fifos[fifo_no].queue_state = queue_state 524 drivers/net/ethernet/neterion/s2io.c sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START; queue_state 535 drivers/net/ethernet/neterion/s2io.c sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START; queue_state 547 drivers/net/ethernet/neterion/s2io.c } else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) { queue_state 549 drivers/net/ethernet/neterion/s2io.c fifo->queue_state = FIFO_QUEUE_START; queue_state 4076 drivers/net/ethernet/neterion/s2io.c } else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) { queue_state 774 drivers/net/ethernet/neterion/s2io.h int queue_state; queue_state 1215 drivers/net/wireless/intel/iwlwifi/mvm/sta.c enum iwl_mvm_agg_state queue_state; queue_state 1333 drivers/net/wireless/intel/iwlwifi/mvm/sta.c queue_state = mvmsta->tid_data[tid].state; queue_state 1345 drivers/net/wireless/intel/iwlwifi/mvm/sta.c if (queue_state == IWL_AGG_ON) { queue_state 83 samples/bpf/hbm_edt_kern.c qdp = bpf_get_local_storage(&queue_state, 0); queue_state 62 samples/bpf/hbm_kern.h struct bpf_map_def SEC("maps") queue_state = { queue_state 67 samples/bpf/hbm_kern.h BPF_ANNOTATE_KV_PAIR(queue_state, struct bpf_cgroup_storage_key, queue_state 85 samples/bpf/hbm_out_kern.c qdp = bpf_get_local_storage(&queue_state, 0);