qphy 52 drivers/phy/qualcomm/phy-qcom-pcie2.c struct qcom_phy *qphy = phy_get_drvdata(phy); qphy 55 drivers/phy/qualcomm/phy-qcom-pcie2.c ret = reset_control_deassert(qphy->phy_reset); qphy 57 drivers/phy/qualcomm/phy-qcom-pcie2.c dev_err(qphy->dev, "cannot deassert pipe reset\n"); qphy 61 drivers/phy/qualcomm/phy-qcom-pcie2.c ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); qphy 63 drivers/phy/qualcomm/phy-qcom-pcie2.c reset_control_assert(qphy->phy_reset); qphy 70 drivers/phy/qualcomm/phy-qcom-pcie2.c struct qcom_phy *qphy = phy_get_drvdata(phy); qphy 75 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); qphy 77 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); qphy 82 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); qphy 84 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); qphy 87 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL3); qphy 89 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL3); qphy 94 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE2_PHY_RESET_CTRL); qphy 96 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE2_PHY_RESET_CTRL); qphy 99 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PCS_SWING_CTRL1); qphy 102 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PCS_SWING_CTRL1); qphy 104 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PCS_SWING_CTRL2); qphy 107 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PCS_SWING_CTRL2); qphy 110 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PCS_DEEMPH1); qphy 113 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PCS_DEEMPH1); qphy 115 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PCS_DEEMPH2); qphy 118 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PCS_DEEMPH2); qphy 120 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PCS_DEEMPH3); qphy 123 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PCS_DEEMPH3); qphy 126 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_CONFIGBITS); qphy 129 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_CONFIGBITS); qphy 132 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PHY_CTRL3); qphy 135 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PHY_CTRL3); qphy 138 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE20_PARF_PCS_CTRL); qphy 140 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE20_PARF_PCS_CTRL); qphy 143 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE2_PHY_RESET_CTRL); qphy 145 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE2_PHY_RESET_CTRL); qphy 149 drivers/phy/qualcomm/phy-qcom-pcie2.c ret = reset_control_deassert(qphy->pipe_reset); qphy 151 drivers/phy/qualcomm/phy-qcom-pcie2.c dev_err(qphy->dev, "cannot deassert pipe reset\n"); qphy 155 drivers/phy/qualcomm/phy-qcom-pcie2.c clk_set_rate(qphy->pipe_clk, 250000000); qphy 157 drivers/phy/qualcomm/phy-qcom-pcie2.c ret = clk_prepare_enable(qphy->pipe_clk); qphy 159 drivers/phy/qualcomm/phy-qcom-pcie2.c dev_err(qphy->dev, "failed to enable pipe clock\n"); qphy 163 drivers/phy/qualcomm/phy-qcom-pcie2.c ret = readl_poll_timeout(qphy->base + PCIE20_PARF_PHY_STTS, val, qphy 166 drivers/phy/qualcomm/phy-qcom-pcie2.c dev_err(qphy->dev, "phy initialization failed\n"); qphy 174 drivers/phy/qualcomm/phy-qcom-pcie2.c struct qcom_phy *qphy = phy_get_drvdata(phy); qphy 177 drivers/phy/qualcomm/phy-qcom-pcie2.c val = readl(qphy->base + PCIE2_PHY_RESET_CTRL); qphy 179 drivers/phy/qualcomm/phy-qcom-pcie2.c writel(val, qphy->base + PCIE2_PHY_RESET_CTRL); qphy 181 drivers/phy/qualcomm/phy-qcom-pcie2.c clk_disable_unprepare(qphy->pipe_clk); qphy 182 drivers/phy/qualcomm/phy-qcom-pcie2.c reset_control_assert(qphy->pipe_reset); qphy 189 drivers/phy/qualcomm/phy-qcom-pcie2.c struct qcom_phy *qphy = phy_get_drvdata(phy); qphy 191 drivers/phy/qualcomm/phy-qcom-pcie2.c regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); qphy 192 drivers/phy/qualcomm/phy-qcom-pcie2.c reset_control_assert(qphy->phy_reset); qphy 223 drivers/phy/qualcomm/phy-qcom-pcie2.c static int phy_pipe_clksrc_register(struct qcom_phy *qphy) qphy 225 drivers/phy/qualcomm/phy-qcom-pcie2.c struct device_node *np = qphy->dev->of_node; qphy 232 drivers/phy/qualcomm/phy-qcom-pcie2.c dev_err(qphy->dev, "%s: No clock-output-names\n", np->name); qphy 236 drivers/phy/qualcomm/phy-qcom-pcie2.c fixed = devm_kzalloc(qphy->dev, sizeof(*fixed), GFP_KERNEL); qphy 246 drivers/phy/qualcomm/phy-qcom-pcie2.c return devm_clk_hw_register(qphy->dev, &fixed->hw); qphy 252 drivers/phy/qualcomm/phy-qcom-pcie2.c struct qcom_phy *qphy; qphy 258 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); qphy 259 drivers/phy/qualcomm/phy-qcom-pcie2.c if (!qphy) qphy 262 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy->dev = dev; qphy 265 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy->base = devm_ioremap_resource(dev, res); qphy 266 drivers/phy/qualcomm/phy-qcom-pcie2.c if (IS_ERR(qphy->base)) qphy 267 drivers/phy/qualcomm/phy-qcom-pcie2.c return PTR_ERR(qphy->base); qphy 269 drivers/phy/qualcomm/phy-qcom-pcie2.c ret = phy_pipe_clksrc_register(qphy); qphy 275 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy->vregs[0].supply = "vdda-vp"; qphy 276 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy->vregs[1].supply = "vdda-vph"; qphy 277 drivers/phy/qualcomm/phy-qcom-pcie2.c ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(qphy->vregs), qphy->vregs); qphy 281 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy->pipe_clk = devm_clk_get(dev, NULL); qphy 282 drivers/phy/qualcomm/phy-qcom-pcie2.c if (IS_ERR(qphy->pipe_clk)) { qphy 284 drivers/phy/qualcomm/phy-qcom-pcie2.c return PTR_ERR(qphy->pipe_clk); qphy 287 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy->phy_reset = devm_reset_control_get_exclusive(dev, "phy"); qphy 288 drivers/phy/qualcomm/phy-qcom-pcie2.c if (IS_ERR(qphy->phy_reset)) { qphy 290 drivers/phy/qualcomm/phy-qcom-pcie2.c return PTR_ERR(qphy->phy_reset); qphy 293 drivers/phy/qualcomm/phy-qcom-pcie2.c qphy->pipe_reset = devm_reset_control_get_exclusive(dev, "pipe"); qphy 294 drivers/phy/qualcomm/phy-qcom-pcie2.c if (IS_ERR(qphy->pipe_reset)) { qphy 296 drivers/phy/qualcomm/phy-qcom-pcie2.c return PTR_ERR(qphy->pipe_reset); qphy 305 drivers/phy/qualcomm/phy-qcom-pcie2.c phy_set_drvdata(phy, qphy); qphy 1298 drivers/phy/qualcomm/phy-qcom-qmp.c static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) qphy 1300 drivers/phy/qualcomm/phy-qcom-qmp.c struct qcom_qmp *qmp = qphy->qmp; qphy 1303 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *pcs = qphy->pcs; qphy 1444 drivers/phy/qualcomm/phy-qcom-qmp.c struct qmp_phy *qphy = phy_get_drvdata(phy); qphy 1445 drivers/phy/qualcomm/phy-qcom-qmp.c struct qcom_qmp *qmp = qphy->qmp; qphy 1447 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *tx = qphy->tx; qphy 1448 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *rx = qphy->rx; qphy 1449 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *pcs = qphy->pcs; qphy 1484 drivers/phy/qualcomm/phy-qcom-qmp.c ret = qcom_qmp_phy_com_init(qphy); qphy 1489 drivers/phy/qualcomm/phy-qcom-qmp.c ret = reset_control_deassert(qphy->lane_rst); qphy 1492 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->index); qphy 1497 drivers/phy/qualcomm/phy-qcom-qmp.c ret = clk_prepare_enable(qphy->pipe_clk); qphy 1507 drivers/phy/qualcomm/phy-qcom-qmp.c qcom_qmp_phy_configure(qphy->tx2, cfg->regs, qphy 1512 drivers/phy/qualcomm/phy-qcom-qmp.c qcom_qmp_phy_configure(qphy->rx2, cfg->regs, qphy 1561 drivers/phy/qualcomm/phy-qcom-qmp.c clk_disable_unprepare(qphy->pipe_clk); qphy 1564 drivers/phy/qualcomm/phy-qcom-qmp.c reset_control_assert(qphy->lane_rst); qphy 1573 drivers/phy/qualcomm/phy-qcom-qmp.c struct qmp_phy *qphy = phy_get_drvdata(phy); qphy 1574 drivers/phy/qualcomm/phy-qcom-qmp.c struct qcom_qmp *qmp = qphy->qmp; qphy 1577 drivers/phy/qualcomm/phy-qcom-qmp.c clk_disable_unprepare(qphy->pipe_clk); qphy 1581 drivers/phy/qualcomm/phy-qcom-qmp.c qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); qphy 1584 drivers/phy/qualcomm/phy-qcom-qmp.c qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); qphy 1587 drivers/phy/qualcomm/phy-qcom-qmp.c qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl); qphy 1590 drivers/phy/qualcomm/phy-qcom-qmp.c reset_control_assert(qphy->lane_rst); qphy 1602 drivers/phy/qualcomm/phy-qcom-qmp.c struct qmp_phy *qphy = phy_get_drvdata(phy); qphy 1603 drivers/phy/qualcomm/phy-qcom-qmp.c struct qcom_qmp *qmp = qphy->qmp; qphy 1610 drivers/phy/qualcomm/phy-qcom-qmp.c static void qcom_qmp_phy_enable_autonomous_mode(struct qmp_phy *qphy) qphy 1612 drivers/phy/qualcomm/phy-qcom-qmp.c struct qcom_qmp *qmp = qphy->qmp; qphy 1614 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *pcs = qphy->pcs; qphy 1615 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *pcs_misc = qphy->pcs_misc; qphy 1640 drivers/phy/qualcomm/phy-qcom-qmp.c static void qcom_qmp_phy_disable_autonomous_mode(struct qmp_phy *qphy) qphy 1642 drivers/phy/qualcomm/phy-qcom-qmp.c struct qcom_qmp *qmp = qphy->qmp; qphy 1644 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *pcs = qphy->pcs; qphy 1645 drivers/phy/qualcomm/phy-qcom-qmp.c void __iomem *pcs_misc = qphy->pcs_misc; qphy 1662 drivers/phy/qualcomm/phy-qcom-qmp.c struct qmp_phy *qphy = qmp->phys[0]; qphy 1676 drivers/phy/qualcomm/phy-qcom-qmp.c qcom_qmp_phy_enable_autonomous_mode(qphy); qphy 1678 drivers/phy/qualcomm/phy-qcom-qmp.c clk_disable_unprepare(qphy->pipe_clk); qphy 1687 drivers/phy/qualcomm/phy-qcom-qmp.c struct qmp_phy *qphy = qmp->phys[0]; qphy 1708 drivers/phy/qualcomm/phy-qcom-qmp.c ret = clk_prepare_enable(qphy->pipe_clk); qphy 1715 drivers/phy/qualcomm/phy-qcom-qmp.c qcom_qmp_phy_disable_autonomous_mode(qphy); qphy 1866 drivers/phy/qualcomm/phy-qcom-qmp.c struct qmp_phy *qphy; qphy 1871 drivers/phy/qualcomm/phy-qcom-qmp.c qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); qphy 1872 drivers/phy/qualcomm/phy-qcom-qmp.c if (!qphy) qphy 1881 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->tx = of_iomap(np, 0); qphy 1882 drivers/phy/qualcomm/phy-qcom-qmp.c if (!qphy->tx) qphy 1885 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->rx = of_iomap(np, 1); qphy 1886 drivers/phy/qualcomm/phy-qcom-qmp.c if (!qphy->rx) qphy 1889 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->pcs = of_iomap(np, 2); qphy 1890 drivers/phy/qualcomm/phy-qcom-qmp.c if (!qphy->pcs) qphy 1900 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->tx2 = of_iomap(np, 3); qphy 1901 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->rx2 = of_iomap(np, 4); qphy 1902 drivers/phy/qualcomm/phy-qcom-qmp.c if (!qphy->tx2 || !qphy->rx2) { qphy 1907 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->pcs_misc = qphy->tx2; qphy 1908 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->tx2 = qphy->tx + QMP_PHY_LEGACY_LANE_STRIDE; qphy 1909 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->rx2 = qphy->rx + QMP_PHY_LEGACY_LANE_STRIDE; qphy 1912 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->pcs_misc = of_iomap(np, 5); qphy 1916 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->pcs_misc = of_iomap(np, 3); qphy 1919 drivers/phy/qualcomm/phy-qcom-qmp.c if (!qphy->pcs_misc) qphy 1930 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->pipe_clk = of_clk_get_by_name(np, prop_name); qphy 1931 drivers/phy/qualcomm/phy-qcom-qmp.c if (IS_ERR(qphy->pipe_clk)) { qphy 1934 drivers/phy/qualcomm/phy-qcom-qmp.c ret = PTR_ERR(qphy->pipe_clk); qphy 1941 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->pipe_clk = NULL; qphy 1947 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->lane_rst = of_reset_control_get(np, prop_name); qphy 1948 drivers/phy/qualcomm/phy-qcom-qmp.c if (IS_ERR(qphy->lane_rst)) { qphy 1950 drivers/phy/qualcomm/phy-qcom-qmp.c return PTR_ERR(qphy->lane_rst); qphy 1964 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->phy = generic_phy; qphy 1965 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->index = id; qphy 1966 drivers/phy/qualcomm/phy-qcom-qmp.c qphy->qmp = qmp; qphy 1967 drivers/phy/qualcomm/phy-qcom-qmp.c qmp->phys[id] = qphy; qphy 1968 drivers/phy/qualcomm/phy-qcom-qmp.c phy_set_drvdata(generic_phy, qphy); qphy 394 drivers/phy/qualcomm/phy-qcom-qusb2.c static void qusb2_phy_override_phy_params(struct qusb2_phy *qphy) qphy 396 drivers/phy/qualcomm/phy-qcom-qusb2.c const struct qusb2_phy_cfg *cfg = qphy->cfg; qphy 398 drivers/phy/qualcomm/phy-qcom-qusb2.c if (qphy->override_imp_res_offset) qphy 399 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_write_mask(qphy->base, QUSB2PHY_IMP_CTRL1, qphy 400 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->imp_res_offset_value << IMP_RES_OFFSET_SHIFT, qphy 403 drivers/phy/qualcomm/phy-qcom-qusb2.c if (qphy->override_hstx_trim) qphy 404 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], qphy 405 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->hstx_trim_value << HSTX_TRIM_SHIFT, qphy 408 drivers/phy/qualcomm/phy-qcom-qusb2.c if (qphy->override_preemphasis) qphy 409 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], qphy 410 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->preemphasis_level << PREEMPHASIS_EN_SHIFT, qphy 413 drivers/phy/qualcomm/phy-qcom-qusb2.c if (qphy->override_preemphasis_width) { qphy 414 drivers/phy/qualcomm/phy-qcom-qusb2.c if (qphy->preemphasis_width == qphy 416 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_setbits(qphy->base, qphy 420 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_clrbits(qphy->base, qphy 431 drivers/phy/qualcomm/phy-qcom-qusb2.c static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) qphy 433 drivers/phy/qualcomm/phy-qcom-qusb2.c struct device *dev = &qphy->phy->dev; qphy 434 drivers/phy/qualcomm/phy-qcom-qusb2.c const struct qusb2_phy_cfg *cfg = qphy->cfg; qphy 438 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->cell) qphy 448 drivers/phy/qualcomm/phy-qcom-qusb2.c val = nvmem_cell_read(qphy->cell, NULL); qphy 456 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], qphy 460 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE2], qphy 468 drivers/phy/qualcomm/phy-qcom-qusb2.c struct qusb2_phy *qphy = phy_get_drvdata(phy); qphy 470 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->mode = mode; qphy 477 drivers/phy/qualcomm/phy-qcom-qusb2.c struct qusb2_phy *qphy = dev_get_drvdata(dev); qphy 478 drivers/phy/qualcomm/phy-qcom-qusb2.c const struct qusb2_phy_cfg *cfg = qphy->cfg; qphy 481 drivers/phy/qualcomm/phy-qcom-qusb2.c dev_vdbg(dev, "Suspending QUSB2 Phy, mode:%d\n", qphy->mode); qphy 483 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->phy_initialized) { qphy 495 drivers/phy/qualcomm/phy-qcom-qusb2.c switch (qphy->mode) { qphy 513 drivers/phy/qualcomm/phy-qcom-qusb2.c writel(intr_mask, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]); qphy 517 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_setbits(qphy->base, qphy 524 drivers/phy/qualcomm/phy-qcom-qusb2.c if (qphy->mode != PHY_MODE_INVALID) { qphy 525 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_setbits(qphy->base, cfg->regs[QUSB2PHY_PORT_TEST1], qphy 528 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_clrbits(qphy->base, cfg->regs[QUSB2PHY_PORT_TEST1], qphy 532 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->has_se_clk_scheme) qphy 533 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->ref_clk); qphy 535 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->cfg_ahb_clk); qphy 536 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->iface_clk); qphy 543 drivers/phy/qualcomm/phy-qcom-qusb2.c struct qusb2_phy *qphy = dev_get_drvdata(dev); qphy 544 drivers/phy/qualcomm/phy-qcom-qusb2.c const struct qusb2_phy_cfg *cfg = qphy->cfg; qphy 547 drivers/phy/qualcomm/phy-qcom-qusb2.c dev_vdbg(dev, "Resuming QUSB2 phy, mode:%d\n", qphy->mode); qphy 549 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->phy_initialized) { qphy 554 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = clk_prepare_enable(qphy->iface_clk); qphy 560 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = clk_prepare_enable(qphy->cfg_ahb_clk); qphy 566 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->has_se_clk_scheme) { qphy 567 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = clk_prepare_enable(qphy->ref_clk); qphy 574 drivers/phy/qualcomm/phy-qcom-qusb2.c writel(0x0, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]); qphy 578 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_clrbits(qphy->base, qphy 586 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->cfg_ahb_clk); qphy 588 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->iface_clk); qphy 595 drivers/phy/qualcomm/phy-qcom-qusb2.c struct qusb2_phy *qphy = phy_get_drvdata(phy); qphy 596 drivers/phy/qualcomm/phy-qcom-qusb2.c const struct qusb2_phy_cfg *cfg = qphy->cfg; qphy 604 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); qphy 608 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = clk_prepare_enable(qphy->iface_clk); qphy 615 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = clk_prepare_enable(qphy->cfg_ahb_clk); qphy 622 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = reset_control_assert(qphy->phy_reset); qphy 631 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = reset_control_deassert(qphy->phy_reset); qphy 638 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_setbits(qphy->base, cfg->regs[QUSB2PHY_PORT_POWERDOWN], qphy 639 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->cfg->disable_ctrl); qphy 643 drivers/phy/qualcomm/phy-qcom-qusb2.c val = readl(qphy->base + QUSB2PHY_PLL_TEST); qphy 646 drivers/phy/qualcomm/phy-qcom-qusb2.c qcom_qusb2_phy_configure(qphy->base, cfg->regs, cfg->tbl, qphy 650 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_phy_override_phy_params(qphy); qphy 653 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_phy_set_tune2_param(qphy); qphy 656 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_clrbits(qphy->base, cfg->regs[QUSB2PHY_PORT_POWERDOWN], qphy 663 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->has_se_clk_scheme = true; qphy 670 drivers/phy/qualcomm/phy-qcom-qusb2.c if (qphy->tcsr) { qphy 671 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = regmap_read(qphy->tcsr, qphy->cfg->clk_scheme_offset, qphy 682 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->has_se_clk_scheme = false; qphy 689 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->has_se_clk_scheme) { qphy 690 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = clk_prepare_enable(qphy->ref_clk); qphy 699 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->has_se_clk_scheme) qphy 704 drivers/phy/qualcomm/phy-qcom-qusb2.c writel(val, qphy->base + QUSB2PHY_PLL_TEST); qphy 707 drivers/phy/qualcomm/phy-qcom-qusb2.c readl(qphy->base + QUSB2PHY_PLL_TEST); qphy 713 drivers/phy/qualcomm/phy-qcom-qusb2.c val = readb(qphy->base + cfg->regs[QUSB2PHY_PLL_STATUS]); qphy 720 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->phy_initialized = true; qphy 725 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->has_se_clk_scheme) qphy 726 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->ref_clk); qphy 728 drivers/phy/qualcomm/phy-qcom-qusb2.c reset_control_assert(qphy->phy_reset); qphy 730 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->cfg_ahb_clk); qphy 732 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->iface_clk); qphy 734 drivers/phy/qualcomm/phy-qcom-qusb2.c regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); qphy 741 drivers/phy/qualcomm/phy-qcom-qusb2.c struct qusb2_phy *qphy = phy_get_drvdata(phy); qphy 744 drivers/phy/qualcomm/phy-qcom-qusb2.c qusb2_setbits(qphy->base, qphy->cfg->regs[QUSB2PHY_PORT_POWERDOWN], qphy 745 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->cfg->disable_ctrl); qphy 747 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy->has_se_clk_scheme) qphy 748 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->ref_clk); qphy 750 drivers/phy/qualcomm/phy-qcom-qusb2.c reset_control_assert(qphy->phy_reset); qphy 752 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->cfg_ahb_clk); qphy 753 drivers/phy/qualcomm/phy-qcom-qusb2.c clk_disable_unprepare(qphy->iface_clk); qphy 755 drivers/phy/qualcomm/phy-qcom-qusb2.c regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); qphy 757 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->phy_initialized = false; qphy 792 drivers/phy/qualcomm/phy-qcom-qusb2.c struct qusb2_phy *qphy; qphy 800 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); qphy 801 drivers/phy/qualcomm/phy-qcom-qusb2.c if (!qphy) qphy 805 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->base = devm_ioremap_resource(dev, res); qphy 806 drivers/phy/qualcomm/phy-qcom-qusb2.c if (IS_ERR(qphy->base)) qphy 807 drivers/phy/qualcomm/phy-qcom-qusb2.c return PTR_ERR(qphy->base); qphy 809 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb"); qphy 810 drivers/phy/qualcomm/phy-qcom-qusb2.c if (IS_ERR(qphy->cfg_ahb_clk)) { qphy 811 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = PTR_ERR(qphy->cfg_ahb_clk); qphy 817 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->ref_clk = devm_clk_get(dev, "ref"); qphy 818 drivers/phy/qualcomm/phy-qcom-qusb2.c if (IS_ERR(qphy->ref_clk)) { qphy 819 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = PTR_ERR(qphy->ref_clk); qphy 825 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->iface_clk = devm_clk_get_optional(dev, "iface"); qphy 826 drivers/phy/qualcomm/phy-qcom-qusb2.c if (IS_ERR(qphy->iface_clk)) qphy 827 drivers/phy/qualcomm/phy-qcom-qusb2.c return PTR_ERR(qphy->iface_clk); qphy 829 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->phy_reset = devm_reset_control_get_by_index(&pdev->dev, 0); qphy 830 drivers/phy/qualcomm/phy-qcom-qusb2.c if (IS_ERR(qphy->phy_reset)) { qphy 832 drivers/phy/qualcomm/phy-qcom-qusb2.c return PTR_ERR(qphy->phy_reset); qphy 835 drivers/phy/qualcomm/phy-qcom-qusb2.c num = ARRAY_SIZE(qphy->vregs); qphy 837 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->vregs[i].supply = qusb2_phy_vreg_names[i]; qphy 839 drivers/phy/qualcomm/phy-qcom-qusb2.c ret = devm_regulator_bulk_get(dev, num, qphy->vregs); qphy 848 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->cfg = of_device_get_match_data(dev); qphy 850 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->tcsr = syscon_regmap_lookup_by_phandle(dev->of_node, qphy 852 drivers/phy/qualcomm/phy-qcom-qusb2.c if (IS_ERR(qphy->tcsr)) { qphy 854 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->tcsr = NULL; qphy 857 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->cell = devm_nvmem_cell_get(dev, NULL); qphy 858 drivers/phy/qualcomm/phy-qcom-qusb2.c if (IS_ERR(qphy->cell)) { qphy 859 drivers/phy/qualcomm/phy-qcom-qusb2.c if (PTR_ERR(qphy->cell) == -EPROBE_DEFER) qphy 861 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->cell = NULL; qphy 867 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->imp_res_offset_value = (u8)value; qphy 868 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->override_imp_res_offset = true; qphy 873 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->hstx_trim_value = (u8)value; qphy 874 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->override_hstx_trim = true; qphy 879 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->preemphasis_level = (u8)value; qphy 880 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->override_preemphasis = true; qphy 885 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->preemphasis_width = (u8)value; qphy 886 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->override_preemphasis_width = true; qphy 904 drivers/phy/qualcomm/phy-qcom-qusb2.c qphy->phy = generic_phy; qphy 906 drivers/phy/qualcomm/phy-qcom-qusb2.c dev_set_drvdata(dev, qphy); qphy 907 drivers/phy/qualcomm/phy-qcom-qusb2.c phy_set_drvdata(generic_phy, qphy);