qpc_mask 3191 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask, qpc_mask 3208 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S, 0); qpc_mask 3212 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S, 0); qpc_mask 3216 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S, 0); qpc_mask 3221 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 3236 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_SGE_SHIFT_M, qpc_mask 3242 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_20_smac_sgid_idx, qpc_mask 3252 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_20_smac_sgid_idx, qpc_mask 3260 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 3273 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M, qpc_mask 3278 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_SQPN_M, qpc_mask 3283 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M, qpc_mask 3288 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_20_smac_sgid_idx, V2_QPC_BYTE_20_RQWS_M, qpc_mask 3291 drivers/infiniband/hw/hns/hns_roce_hw_v2.c set_qpc_wqe_cnt(hr_qp, context, qpc_mask); qpc_mask 3296 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_VLAN_ID_M, qpc_mask 3304 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_SQ_TX_ERR_S, 0); qpc_mask 3305 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_SQ_RX_ERR_S, 0); qpc_mask 3306 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_RQ_TX_ERR_S, 0); qpc_mask 3307 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_RQ_RX_ERR_S, 0); qpc_mask 3309 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_60_qpst_tempid, V2_QPC_BYTE_60_TEMPID_M, qpc_mask 3312 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_60_qpst_tempid, qpc_mask 3315 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_60_qpst_tempid, qpc_mask 3317 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_60_qpst_tempid, qpc_mask 3319 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_CNP_TX_FLAG_S, 0); qpc_mask 3320 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_CE_FLAG_S, 0); qpc_mask 3325 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_68_rq_db, qpc_mask 3333 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_68_rq_db, qpc_mask 3337 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rq_db_record_addr = 0; qpc_mask 3341 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RQIE_S, 0); qpc_mask 3345 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_80_rnr_rx_cqn, V2_QPC_BYTE_80_RX_CQN_M, qpc_mask 3351 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_76_srqn_op_en, qpc_mask 3355 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, qpc_mask 3359 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_84_rq_ci_pi, qpc_mask 3362 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_84_rq_ci_pi, qpc_mask 3366 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_92_srq_info, V2_QPC_BYTE_92_SRQ_INFO_M, qpc_mask 3369 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_96_rx_reqmsn, V2_QPC_BYTE_96_RX_REQ_MSN_M, qpc_mask 3372 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_104_rq_sge, qpc_mask 3376 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_108_rx_reqepsn, qpc_mask 3378 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_108_rx_reqepsn, qpc_mask 3381 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_108_rx_reqepsn, qpc_mask 3384 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rq_rnr_timer = 0; qpc_mask 3385 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rx_msg_len = 0; qpc_mask 3386 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rx_rkey_pkt_info = 0; qpc_mask 3387 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rx_va = 0; qpc_mask 3389 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_132_trrl, V2_QPC_BYTE_132_TRRL_HEAD_MAX_M, qpc_mask 3391 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_132_trrl, V2_QPC_BYTE_132_TRRL_TAIL_MAX_M, qpc_mask 3394 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RQ_RTY_WAIT_DO_S, qpc_mask 3396 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RAQ_TRRL_HEAD_M, qpc_mask 3398 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RAQ_TRRL_TAIL_M, qpc_mask 3401 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_144_raq, qpc_mask 3404 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_144_raq, V2_QPC_BYTE_144_RAQ_CREDIT_M, qpc_mask 3406 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_144_raq, V2_QPC_BYTE_144_RESP_RTY_FLG_S, 0); qpc_mask 3408 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_148_raq, V2_QPC_BYTE_148_RQ_MSN_M, qpc_mask 3410 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_148_raq, V2_QPC_BYTE_148_RAQ_SYNDROME_M, qpc_mask 3413 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_152_raq, V2_QPC_BYTE_152_RAQ_PSN_M, qpc_mask 3415 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_152_raq, qpc_mask 3419 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_156_raq, V2_QPC_BYTE_156_RAQ_USE_PKTN_M, qpc_mask 3422 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_160_sq_ci_pi, qpc_mask 3425 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_160_sq_ci_pi, qpc_mask 3429 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_168_irrl_idx, qpc_mask 3431 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_168_irrl_idx, qpc_mask 3433 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_168_irrl_idx, qpc_mask 3435 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_168_irrl_idx, qpc_mask 3437 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_168_irrl_idx, qpc_mask 3439 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_168_irrl_idx, qpc_mask 3445 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_172_sq_psn, qpc_mask 3449 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_172_sq_psn, V2_QPC_BYTE_172_MSG_RNR_FLG_S, qpc_mask 3453 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_172_sq_psn, V2_QPC_BYTE_172_FRE_S, 0); qpc_mask 3455 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_176_msg_pktn, qpc_mask 3458 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_176_msg_pktn, qpc_mask 3462 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_184_irrl_idx, qpc_mask 3466 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->cur_sge_offset = 0; qpc_mask 3468 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_192_ext_sge, qpc_mask 3471 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_192_ext_sge, qpc_mask 3475 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_196_sq_psn, V2_QPC_BYTE_196_IRRL_HEAD_M, qpc_mask 3478 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_200_sq_max, V2_QPC_BYTE_200_SQ_MAX_IDX_M, qpc_mask 3480 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_200_sq_max, qpc_mask 3484 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_208_irrl, V2_QPC_BYTE_208_PKT_RNR_FLG_S, 0); qpc_mask 3485 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_208_irrl, V2_QPC_BYTE_208_PKT_RTY_FLG_S, 0); qpc_mask 3487 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_212_lsn, V2_QPC_BYTE_212_CHECK_FLG_M, qpc_mask 3490 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->sq_timer = 0; qpc_mask 3492 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_220_retry_psn_msn, qpc_mask 3495 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_232_irrl_sge, qpc_mask 3499 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_232_irrl_sge, V2_QPC_BYTE_232_SO_LP_VLD_S, qpc_mask 3501 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_232_irrl_sge, qpc_mask 3503 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_232_irrl_sge, V2_QPC_BYTE_232_IRRL_LP_VLD_S, qpc_mask 3506 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->irrl_cur_sge_offset = 0; qpc_mask 3508 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_240_irrl_tail, qpc_mask 3511 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_240_irrl_tail, qpc_mask 3514 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_240_irrl_tail, qpc_mask 3518 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_IRRL_PSN_M, qpc_mask 3520 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_ACK_PSN_ERR_S, qpc_mask 3522 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_248_ack_psn, qpc_mask 3525 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_IRRL_PSN_VLD_S, qpc_mask 3527 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_248_ack_psn, qpc_mask 3529 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_CQ_ERR_IND_S, qpc_mask 3535 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_252_err_txcqn, V2_QPC_BYTE_252_TX_CQN_M, qpc_mask 3538 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_252_err_txcqn, V2_QPC_BYTE_252_ERR_TYPE_M, qpc_mask 3541 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_256_sqflush_rqcqe, qpc_mask 3544 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_256_sqflush_rqcqe, qpc_mask 3552 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 3564 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M, qpc_mask 3570 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S, qpc_mask 3576 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S, qpc_mask 3582 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S, qpc_mask 3587 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S, qpc_mask 3592 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S, qpc_mask 3597 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S, qpc_mask 3603 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M, qpc_mask 3608 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_80_rnr_rx_cqn, V2_QPC_BYTE_80_RX_CQN_M, qpc_mask 3613 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_252_err_txcqn, V2_QPC_BYTE_252_TX_CQN_M, qpc_mask 3619 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, qpc_mask 3624 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_76_srqn_op_en, qpc_mask 3630 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_SQPN_M, qpc_mask 3636 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_56_dqpn_err, qpc_mask 3669 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 3720 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->wqe_sge_ba = 0; qpc_mask 3730 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_12_sq_hop, V2_QPC_BYTE_12_WQE_SGE_BA_M, qpc_mask 3737 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_12_sq_hop, V2_QPC_BYTE_12_SQ_HOP_NUM_M, qpc_mask 3746 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_20_smac_sgid_idx, qpc_mask 3755 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_20_smac_sgid_idx, qpc_mask 3763 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, qpc_mask 3771 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, qpc_mask 3776 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rq_cur_blk_addr = 0; qpc_mask 3782 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_92_srq_info, qpc_mask 3787 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rq_nxt_blk_addr = 0; qpc_mask 3793 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_104_rq_sge, qpc_mask 3799 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_132_trrl, V2_QPC_BYTE_132_TRRL_BA_M, qpc_mask 3802 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->trrl_ba = 0; qpc_mask 3806 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_TRRL_BA_M, qpc_mask 3810 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->irrl_ba = 0; qpc_mask 3814 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_208_irrl, V2_QPC_BYTE_208_IRRL_BA_M, qpc_mask 3818 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_208_irrl, V2_QPC_BYTE_208_RMT_E2E_S, 0); qpc_mask 3822 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_252_err_txcqn, V2_QPC_BYTE_252_SIG_TYPE_S, qpc_mask 3832 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_LBI_S, 0); qpc_mask 3838 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_56_dqpn_err, qpc_mask 3849 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_20_smac_sgid_idx, qpc_mask 3855 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->dmac = 0; qpc_mask 3856 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_52_udpspn_dmac, V2_QPC_BYTE_52_DMAC_M, qpc_mask 3862 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M, qpc_mask 3872 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M, qpc_mask 3878 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_84_rq_ci_pi, qpc_mask 3882 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_84_rq_ci_pi, qpc_mask 3885 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_108_rx_reqepsn, qpc_mask 3887 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_96_rx_reqmsn, V2_QPC_BYTE_96_RX_REQ_MSN_M, qpc_mask 3889 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_108_rx_reqepsn, qpc_mask 3894 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rq_rnr_timer = 0; qpc_mask 3896 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_132_trrl, V2_QPC_BYTE_132_TRRL_HEAD_MAX_M, qpc_mask 3898 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_132_trrl, V2_QPC_BYTE_132_TRRL_TAIL_MAX_M, qpc_mask 3905 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_168_irrl_idx, qpc_mask 3915 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 3962 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->sq_cur_blk_addr = 0; qpc_mask 3963 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_168_irrl_idx, qpc_mask 3978 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->sq_cur_sge_blk_addr = 0; qpc_mask 3979 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_184_irrl_idx, qpc_mask 3989 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->rx_sq_cur_blk_addr = 0; qpc_mask 3990 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_232_irrl_sge, qpc_mask 3999 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_232_irrl_sge, qpc_mask 4003 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_240_irrl_tail, qpc_mask 4007 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_248_ack_psn, qpc_mask 4010 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_248_ack_psn, qpc_mask 4012 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_248_ack_psn, qpc_mask 4016 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_240_irrl_tail, qpc_mask 4020 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_220_retry_psn_msn, qpc_mask 4024 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_248_ack_psn, qpc_mask 4027 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_212_lsn, V2_QPC_BYTE_212_CHECK_FLG_M, qpc_mask 4032 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_212_lsn, V2_QPC_BYTE_212_LSN_M, qpc_mask 4035 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_196_sq_psn, V2_QPC_BYTE_196_IRRL_HEAD_M, qpc_mask 4060 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 4092 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_76_srqn_op_en, qpc_mask 4096 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_168_irrl_idx, qpc_mask 4102 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_VLAN_ID_M, qpc_mask 4120 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_52_udpspn_dmac, V2_QPC_BYTE_52_UDPSPN_M, qpc_mask 4127 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_20_smac_sgid_idx, qpc_mask 4132 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_HOP_LIMIT_M, qpc_mask 4141 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_TC_M, qpc_mask 4145 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_FL_M, qpc_mask 4148 drivers/infiniband/hw/hns/hns_roce_hw_v2.c memset(qpc_mask->dgid, 0, sizeof(grh->dgid.raw)); qpc_mask 4151 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_SL_M, qpc_mask 4164 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 4170 drivers/infiniband/hw/hns/hns_roce_hw_v2.c memset(qpc_mask, 0, sizeof(*qpc_mask)); qpc_mask 4172 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask); qpc_mask 4175 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask); qpc_mask 4178 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask); qpc_mask 4183 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask); qpc_mask 4203 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask) qpc_mask 4211 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask); qpc_mask 4221 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_28_at_fl, qpc_mask 4235 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_212_lsn, qpc_mask 4243 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_212_lsn, qpc_mask 4252 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_244_rnr_rxack, qpc_mask 4259 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_244_rnr_rxack, qpc_mask 4269 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_172_sq_psn, qpc_mask 4276 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_196_sq_psn, qpc_mask 4283 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_220_retry_psn_msn, qpc_mask 4291 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_224_retry_msg, qpc_mask 4299 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_224_retry_msg, qpc_mask 4306 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_244_rnr_rxack, qpc_mask 4316 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RR_MAX_M, qpc_mask 4324 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_208_irrl, qpc_mask 4330 drivers/infiniband/hw/hns/hns_roce_hw_v2.c set_access_flags(hr_qp, context, qpc_mask, attr, attr_mask); qpc_mask 4337 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_80_rnr_rx_cqn, qpc_mask 4347 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_108_rx_reqepsn, qpc_mask 4353 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_152_raq, qpc_mask 4360 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask->qkey_xrcd = 0; qpc_mask 4394 drivers/infiniband/hw/hns/hns_roce_hw_v2.c struct hns_roce_v2_qp_context *qpc_mask = ctx + 1; qpc_mask 4405 drivers/infiniband/hw/hns/hns_roce_hw_v2.c memset(qpc_mask, 0xff, sizeof(*qpc_mask)); qpc_mask 4407 drivers/infiniband/hw/hns/hns_roce_hw_v2.c new_state, context, qpc_mask); qpc_mask 4417 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_160_sq_ci_pi, qpc_mask 4426 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_84_rq_ci_pi, qpc_mask 4434 drivers/infiniband/hw/hns/hns_roce_hw_v2.c qpc_mask); qpc_mask 4440 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_bit(qpc_mask->byte_108_rx_reqepsn, qpc_mask 4446 drivers/infiniband/hw/hns/hns_roce_hw_v2.c roce_set_field(qpc_mask->byte_60_qpst_tempid, V2_QPC_BYTE_60_QP_ST_M,