qlm_cfg 94 arch/mips/cavium-octeon/executive/cvmx-helper.c union cvmx_mio_qlmx_cfg qlm_cfg; qlm_cfg 97 arch/mips/cavium-octeon/executive/cvmx-helper.c qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0)); qlm_cfg 99 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_spd == 15) qlm_cfg 102 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_cfg == 2) qlm_cfg 104 arch/mips/cavium-octeon/executive/cvmx-helper.c else if (qlm_cfg.s.qlm_cfg == 3) qlm_cfg 111 arch/mips/cavium-octeon/executive/cvmx-helper.c qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(interface)); qlm_cfg 113 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_spd == 15) qlm_cfg 116 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_cfg == 2) qlm_cfg 118 arch/mips/cavium-octeon/executive/cvmx-helper.c else if (qlm_cfg.s.qlm_cfg == 3) qlm_cfg 123 arch/mips/cavium-octeon/executive/cvmx-helper.c qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(3)); qlm_cfg 125 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_spd == 15) { qlm_cfg 127 arch/mips/cavium-octeon/executive/cvmx-helper.c } else if (qlm_cfg.s.qlm_cfg != 0) { qlm_cfg 128 arch/mips/cavium-octeon/executive/cvmx-helper.c qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(1)); qlm_cfg 129 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_cfg != 0) qlm_cfg 179 arch/mips/cavium-octeon/executive/cvmx-helper.c if (mio_qlm_cfg.s.qlm_cfg == 9) qlm_cfg 181 arch/mips/cavium-octeon/executive/cvmx-helper.c else if (mio_qlm_cfg.s.qlm_cfg == 11) qlm_cfg 186 arch/mips/cavium-octeon/executive/cvmx-helper.c union cvmx_mio_qlmx_cfg qlm_cfg; qlm_cfg 189 arch/mips/cavium-octeon/executive/cvmx-helper.c qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(2)); qlm_cfg 190 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_cfg == 2) qlm_cfg 192 arch/mips/cavium-octeon/executive/cvmx-helper.c else if (qlm_cfg.s.qlm_cfg == 3) qlm_cfg 197 arch/mips/cavium-octeon/executive/cvmx-helper.c qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0)); qlm_cfg 198 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_cfg == 2) qlm_cfg 200 arch/mips/cavium-octeon/executive/cvmx-helper.c else if (qlm_cfg.s.qlm_cfg == 3) qlm_cfg 207 arch/mips/cavium-octeon/executive/cvmx-helper.c union cvmx_mio_qlmx_cfg qlm_cfg; qlm_cfg 208 arch/mips/cavium-octeon/executive/cvmx-helper.c qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0)); qlm_cfg 209 arch/mips/cavium-octeon/executive/cvmx-helper.c if (qlm_cfg.s.qlm_cfg == 2) qlm_cfg 778 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t qlm_cfg:4; qlm_cfg 800 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t qlm_cfg:4; qlm_cfg 810 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t qlm_cfg:1; qlm_cfg 832 arch/mips/include/asm/octeon/cvmx-dpi-defs.h uint64_t qlm_cfg:1; qlm_cfg 2873 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:4; qlm_cfg 2875 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:4; qlm_cfg 2890 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:2; qlm_cfg 2892 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:2; qlm_cfg 2905 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:4; qlm_cfg 2907 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:4; qlm_cfg 2918 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:3; qlm_cfg 2920 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t qlm_cfg:3; qlm_cfg 201 arch/mips/include/asm/octeon/cvmx-pescx-defs.h uint64_t qlm_cfg:2; qlm_cfg 227 arch/mips/include/asm/octeon/cvmx-pescx-defs.h uint64_t qlm_cfg:2; qlm_cfg 238 arch/mips/include/asm/octeon/cvmx-pescx-defs.h uint64_t qlm_cfg:2; qlm_cfg 264 arch/mips/include/asm/octeon/cvmx-pescx-defs.h uint64_t qlm_cfg:2; qlm_cfg 595 arch/mips/pci/pcie-octeon.c if (pescx_ctl_status.s.qlm_cfg == 0)