ql                493 drivers/net/ethernet/brocade/bna/bfi_enet.h 		struct bfi_enet_rxq	ql;	/* large/data/single buffers */
ql               1643 drivers/net/ethernet/brocade/bna/bna_tx_rx.c 			bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].ql.q,
ql               1656 drivers/net/ethernet/brocade/bna/bna_tx_rx.c 			cfg_req->q_cfg[i].ql.rx_buffer_size =
ql                144 drivers/net/ethernet/marvell/mvpp2/mvpp2.h #define     MVPP22_CLS_C2_ATTR0_QLOW(ql)	(((ql) & 0x7) << 21)
ql                864 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 	u8 qh, ql, pmap;
ql                891 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 	ql = port->first_rxq & MVPP22_CLS_C2_ATTR0_QLOW_MASK;
ql                894 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 		      MVPP22_CLS_C2_ATTR0_QLOW(ql);
ql                987 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 	u8 qh, ql;
ql                995 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 	ql = ctx & MVPP22_CLS_C2_ATTR0_QLOW_MASK;
ql                998 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 		     MVPP22_CLS_C2_ATTR0_QLOW(ql);
ql               1008 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 	u8 qh, ql;
ql               1014 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 	ql = port->first_rxq & MVPP22_CLS_C2_ATTR0_QLOW_MASK;
ql               1017 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 		      MVPP22_CLS_C2_ATTR0_QLOW(ql);
ql               1082 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 	u8 qh, ql, pmap;
ql               1146 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 			ql = ctx & MVPP22_CLS_C2_ATTR0_QLOW_MASK;
ql               1150 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 			ql = (act->queue.index + port->first_rxq) &
ql               1155 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c 			      MVPP22_CLS_C2_ATTR0_QLOW(ql);
ql                209 drivers/net/ethernet/marvell/mvpp2/mvpp2_debugfs.c 	u8 qh, ql;
ql                216 drivers/net/ethernet/marvell/mvpp2/mvpp2_debugfs.c 	ql = (c2.attr[0] >> MVPP22_CLS_C2_ATTR0_QLOW_OFFS) &
ql                219 drivers/net/ethernet/marvell/mvpp2/mvpp2_debugfs.c 	seq_printf(s, "%d\n", (qh << 3 | ql));
ql                 13 drivers/nvme/target/io-cmd-bdev.c 	const struct queue_limits *ql = &bdev_get_queue(bdev)->limits;
ql                 15 drivers/nvme/target/io-cmd-bdev.c 	const u32 lpp = ql->physical_block_size / ql->logical_block_size;
ql                 43 drivers/nvme/target/io-cmd-bdev.c 	id->npdg = to0based(ql->discard_granularity / ql->logical_block_size);
ql                 47 drivers/nvme/target/io-cmd-bdev.c 	id->nows = to0based(ql->io_opt / ql->logical_block_size);
ql                101 drivers/scsi/qla2xxx/qla_target.h #define QLA_TGT_MAX_SG32(ql) \
ql                102 drivers/scsi/qla2xxx/qla_target.h 	(((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD32 + \
ql                103 drivers/scsi/qla2xxx/qla_target.h 		QLA_TGT_DATASEGS_PER_CONT32*((ql) - 1)) : 0)
ql                107 drivers/scsi/qla2xxx/qla_target.h #define QLA_TGT_MAX_SG64(ql) \
ql                108 drivers/scsi/qla2xxx/qla_target.h 	(((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD64 + \
ql                109 drivers/scsi/qla2xxx/qla_target.h 		QLA_TGT_DATASEGS_PER_CONT64*((ql) - 1)) : 0)
ql                115 drivers/scsi/qla2xxx/qla_target.h #define QLA_TGT_MAX_SG_24XX(ql) \
ql                116 drivers/scsi/qla2xxx/qla_target.h 	(min(1270, ((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD_24XX + \
ql                117 drivers/scsi/qla2xxx/qla_target.h 		QLA_TGT_DATASEGS_PER_CONT_24XX*((ql) - 1)) : 0))
ql                135 drivers/scsi/qlogicpti.c #define QUEUE_DEPTH(in, out, ql)	((in - out) & (ql))
ql                 47 drivers/scsi/qlogicpti.h #define QLOGICPTI_MAX_SG(ql)	(4 + (((ql) > 0) ? 7*((ql) - 1) : 0))