qdiv_ratio       1214 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	u32 qdiv_ratio;
qdiv_ratio       1273 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	params->qdiv_ratio = p1;
qdiv_ratio       1274 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	params->qdiv_mode = (params->qdiv_ratio == 1) ? 0 : 1;
qdiv_ratio       1382 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	cfgcr2 = DPLL_CFGCR2_QDIV_RATIO(wrpll_params.qdiv_ratio) |
qdiv_ratio       2248 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	params->qdiv_ratio = qdiv;
qdiv_ratio       2331 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	cfgcr1 = DPLL_CFGCR1_QDIV_RATIO(wrpll_params.qdiv_ratio) |
qdiv_ratio       2475 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2478 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x2 /* 3 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2481 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x4 /* 5 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2484 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2487 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 1, .qdiv_ratio = 2, }, },
qdiv_ratio       2490 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2493 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2496 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x1 /* 2 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2504 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2507 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x2 /* 3 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2510 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x4 /* 5 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2513 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2516 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 1, .qdiv_ratio = 2, }, },
qdiv_ratio       2519 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2522 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2525 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	    .pdiv = 0x1 /* 2 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, },
qdiv_ratio       2530 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	.pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0,
qdiv_ratio       2535 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	.pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0,
qdiv_ratio       2594 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	cfgcr1 = DPLL_CFGCR1_QDIV_RATIO(pll_params.qdiv_ratio) |