qdiv_mode 1215 drivers/gpu/drm/i915/display/intel_dpll_mgr.c u32 qdiv_mode; qdiv_mode 1274 drivers/gpu/drm/i915/display/intel_dpll_mgr.c params->qdiv_mode = (params->qdiv_ratio == 1) ? 0 : 1; qdiv_mode 1383 drivers/gpu/drm/i915/display/intel_dpll_mgr.c DPLL_CFGCR2_QDIV_MODE(wrpll_params.qdiv_mode) | qdiv_mode 2249 drivers/gpu/drm/i915/display/intel_dpll_mgr.c params->qdiv_mode = (qdiv == 1) ? 0 : 1; qdiv_mode 2332 drivers/gpu/drm/i915/display/intel_dpll_mgr.c DPLL_CFGCR1_QDIV_MODE(wrpll_params.qdiv_mode) | qdiv_mode 2475 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2478 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x2 /* 3 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2481 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x4 /* 5 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2484 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2487 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 1, .qdiv_ratio = 2, }, }, qdiv_mode 2490 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2493 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2496 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x1 /* 2 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2504 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2507 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x2 /* 3 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2510 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x4 /* 5 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2513 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2516 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 1, .qdiv_ratio = 2, }, }, qdiv_mode 2519 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x1 /* 2 */, .kdiv = 2, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2522 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x2 /* 3 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2525 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x1 /* 2 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, }, }, qdiv_mode 2530 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, qdiv_mode 2535 drivers/gpu/drm/i915/display/intel_dpll_mgr.c .pdiv = 0x4 /* 5 */, .kdiv = 1, .qdiv_mode = 0, .qdiv_ratio = 0, qdiv_mode 2595 drivers/gpu/drm/i915/display/intel_dpll_mgr.c DPLL_CFGCR1_QDIV_MODE(pll_params.qdiv_mode) |