RB_ENABLE         197 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c 			     RB_ENABLE, 1);
RB_ENABLE         555 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 			     RB_ENABLE, 1);
RB_ENABLE         468 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 			     RB_ENABLE, 1);
RB_ENABLE         452 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 			     RB_ENABLE, 1);
RB_ENABLE         454 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 			     RB_ENABLE, 1);
RB_ENABLE          66 drivers/gpu/drm/amd/amdgpu/cz_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE          84 drivers/gpu/drm/amd/amdgpu/cz_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE          66 drivers/gpu/drm/amd/amdgpu/iceland_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE          84 drivers/gpu/drm/amd/amdgpu/iceland_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE          49 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE          66 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE         352 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE         469 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE         526 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE         737 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE         821 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE         868 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 					RB_ENABLE, 0);
RB_ENABLE        1050 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE        1141 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_PAGE_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE         511 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE         743 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE          64 drivers/gpu/drm/amd/amdgpu/tonga_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE          81 drivers/gpu/drm/amd/amdgpu/tonga_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE          51 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
RB_ENABLE          66 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 					   RB_ENABLE, 1);
RB_ENABLE          82 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 					   RB_ENABLE, 1);
RB_ENABLE         107 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0);
RB_ENABLE         127 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 					   RB_ENABLE, 0);
RB_ENABLE         147 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 					   RB_ENABLE, 0);