qcam_reg           52 drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c #define MLX5_DSCP_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, qcam_reg)  && \
qcam_reg          227 drivers/net/ethernet/mellanox/mlx5/core/fw.c 	if (MLX5_CAP_GEN(dev, qcam_reg))
qcam_reg          101 drivers/net/ethernet/mellanox/mlx5/core/port.c 	u32 in[MLX5_ST_SZ_DW(qcam_reg)] = {};
qcam_reg          102 drivers/net/ethernet/mellanox/mlx5/core/port.c 	int sz = MLX5_ST_SZ_BYTES(qcam_reg);
qcam_reg          104 drivers/net/ethernet/mellanox/mlx5/core/port.c 	MLX5_SET(qcam_reg, in, feature_group, feature_group);
qcam_reg          105 drivers/net/ethernet/mellanox/mlx5/core/port.c 	MLX5_SET(qcam_reg, in, access_reg_group, access_reg_group);
qcam_reg         1277 include/linux/mlx5/device.h 	MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_access_reg_cap_mask.reg_cap.fld)
qcam_reg         1280 include/linux/mlx5/device.h 	MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_feature_cap_mask.feature_cap.fld)
qcam_reg          691 include/linux/mlx5/driver.h 		u32 qcam[MLX5_ST_SZ_DW(qcam_reg)];
qcam_reg         1205 include/linux/mlx5/mlx5_ifc.h 	u8         qcam_reg[0x1];