CFG_LO            807 drivers/dma/dw/core.c 	while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--)
CFG_LO             28 drivers/dma/dw/dw.c 	channel_writel(dwc, CFG_LO, cfglo);
CFG_LO             34 drivers/dma/dw/dw.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
CFG_LO             36 drivers/dma/dw/dw.c 	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
CFG_LO             41 drivers/dma/dw/dw.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
CFG_LO             43 drivers/dma/dw/dw.c 	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
CFG_LO             28 drivers/dma/dw/idma32.c 	channel_writel(dwc, CFG_LO, cfglo);
CFG_LO             34 drivers/dma/dw/idma32.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
CFG_LO             39 drivers/dma/dw/idma32.c 	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
CFG_LO             44 drivers/dma/dw/idma32.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
CFG_LO             49 drivers/dma/dw/idma32.c 	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
CFG_LO             49 drivers/dma/dw/regs.h 	u32	CFG_LO;		/* Configuration Register Low */
CFG_LO             67 drivers/dma/idma64.c 	channel_writel(idma64c, CFG_LO, cfglo);
CFG_LO            419 drivers/dma/idma64.c 	cfglo = channel_readl(idma64c, CFG_LO);
CFG_LO            425 drivers/dma/idma64.c 	channel_writel(idma64c, CFG_LO, cfglo | IDMA64C_CFGL_CH_SUSP);
CFG_LO            428 drivers/dma/idma64.c 		cfglo = channel_readl(idma64c, CFG_LO);
CFG_LO            436 drivers/dma/idma64.c 	cfglo = channel_readl(idma64c, CFG_LO);
CFG_LO            437 drivers/dma/idma64.c 	channel_writel(idma64c, CFG_LO, cfglo & ~IDMA64C_CFGL_CH_SUSP);