pxl_clk_params    234 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	struct bp_pixel_clock_parameters pxl_clk_params = { 0 };
pxl_clk_params    245 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	pxl_clk_params.target_pixel_clock_100hz = requested_clk_khz * 10;
pxl_clk_params    246 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	pxl_clk_params.pll_id = CLOCK_SOURCE_ID_DFS;
pxl_clk_params    249 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 		pxl_clk_params.flags.SET_DISPCLK_DFS_BYPASS = true;
pxl_clk_params    251 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 	bp->funcs->program_display_engine_pll(bp, &pxl_clk_params);
pxl_clk_params    256 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 			pxl_clk_params.dfs_bypass_display_clock;
pxl_clk_params    257 drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c 		actual_clock = pxl_clk_params.dfs_bypass_display_clock;
pxl_clk_params    251 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	struct bp_pixel_clock_parameters pxl_clk_params = { 0 };
pxl_clk_params    262 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	pxl_clk_params.target_pixel_clock_100hz = requested_clk_khz * 10;
pxl_clk_params    263 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	pxl_clk_params.pll_id = CLOCK_SOURCE_ID_DFS;
pxl_clk_params    266 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 		pxl_clk_params.flags.SET_DISPCLK_DFS_BYPASS = true;
pxl_clk_params    268 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	bp->funcs->program_display_engine_pll(bp, &pxl_clk_params);
pxl_clk_params    273 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 			pxl_clk_params.dfs_bypass_display_clock;
pxl_clk_params    274 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 		actual_clock = pxl_clk_params.dfs_bypass_display_clock;