pwrstctrl_offs 132 arch/arm/mach-omap2/powerdomain.h const u8 pwrstctrl_offs; pwrstctrl_offs 28 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrstctrl_offs = AM33XX_PM_GFX_PWRSTCTRL_OFFSET, pwrstctrl_offs 59 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrstctrl_offs = AM33XX_PM_RTC_PWRSTCTRL_OFFSET, pwrstctrl_offs 69 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrstctrl_offs = AM33XX_PM_WKUP_PWRSTCTRL_OFFSET, pwrstctrl_offs 79 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrstctrl_offs = AM33XX_PM_PER_PWRSTCTRL_OFFSET, pwrstctrl_offs 122 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrstctrl_offs = AM33XX_PM_MPU_PWRSTCTRL_OFFSET, pwrstctrl_offs 165 arch/arm/mach-omap2/powerdomains33xx_data.c .pwrstctrl_offs = AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET, pwrstctrl_offs 153 arch/arm/mach-omap2/prm33xx.c pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 161 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 183 arch/arm/mach-omap2/prm33xx.c pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 204 arch/arm/mach-omap2/prm33xx.c pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 228 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 245 arch/arm/mach-omap2/prm33xx.c pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 260 arch/arm/mach-omap2/prm33xx.c pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 288 arch/arm/mach-omap2/prm33xx.c v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); pwrstctrl_offs 348 arch/arm/mach-omap2/prm33xx.c pwrdm->pwrstctrl_offs); pwrstctrl_offs 364 arch/arm/mach-omap2/prm33xx.c pwrdm->pwrstctrl_offs); pwrstctrl_offs 687 arch/arm/mach-omap2/prm44xx.c pwrdm->pwrstctrl_offs); pwrstctrl_offs 709 arch/arm/mach-omap2/prm44xx.c pwrdm->pwrstctrl_offs); pwrstctrl_offs 714 arch/arm/mach-omap2/prm44xx.c pwrdm->pwrstctrl_offs);