pwr_width          28 drivers/clk/bcm/clk-cygnus.c #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \
pwr_width         198 drivers/clk/bcm/clk-iproc-pll.c 		val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift;
pwr_width         209 drivers/clk/bcm/clk-iproc-pll.c 		val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);
pwr_width         221 drivers/clk/bcm/clk-iproc-pll.c 		val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);
pwr_width         228 drivers/clk/bcm/clk-iproc-pll.c 		val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift;
pwr_width         122 drivers/clk/bcm/clk-iproc.h 	unsigned int pwr_width;
pwr_width          26 drivers/clk/bcm/clk-ns2.c #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \
pwr_width          26 drivers/clk/bcm/clk-nsp.c #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \
pwr_width          16 drivers/clk/bcm/clk-sr.c #define AON_VAL(o, pw, ps, is) { .offset = o, .pwr_width = pw, \