pwr_mask 398 arch/arm/mach-dove/common.c .pwr_mask = PMU_PWR_VPU_PWR_DWN_MASK, pwr_mask 403 arch/arm/mach-dove/common.c .pwr_mask = PMU_PWR_GPU_PWR_DWN_MASK, pwr_mask 380 drivers/gpu/drm/gma500/cdv_device.c u32 pwr_cnt, pwr_mask, pwr_sts; pwr_mask 386 drivers/gpu/drm/gma500/cdv_device.c pwr_mask = PSB_PWRGT_GFX_MASK; pwr_mask 392 drivers/gpu/drm/gma500/cdv_device.c if ((pwr_sts & pwr_mask) == PSB_PWRGT_GFX_D3) pwr_mask 402 drivers/gpu/drm/gma500/cdv_device.c u32 pwr_cnt, pwr_mask, pwr_sts; pwr_mask 408 drivers/gpu/drm/gma500/cdv_device.c pwr_mask = PSB_PWRGT_GFX_MASK; pwr_mask 414 drivers/gpu/drm/gma500/cdv_device.c if ((pwr_sts & pwr_mask) == PSB_PWRGT_GFX_D0) pwr_mask 411 drivers/gpu/drm/gma500/oaktrail_device.c u32 pwr_mask ; pwr_mask 414 drivers/gpu/drm/gma500/oaktrail_device.c pwr_mask = PSB_PWRGT_DISPLAY_MASK; pwr_mask 415 drivers/gpu/drm/gma500/oaktrail_device.c outl(pwr_mask, dev_priv->ospm_base + PSB_PM_SSC); pwr_mask 419 drivers/gpu/drm/gma500/oaktrail_device.c if ((pwr_sts & pwr_mask) == pwr_mask) pwr_mask 435 drivers/gpu/drm/gma500/oaktrail_device.c u32 pwr_mask = PSB_PWRGT_DISPLAY_MASK; pwr_mask 439 drivers/gpu/drm/gma500/oaktrail_device.c pwr_cnt &= ~pwr_mask; pwr_mask 444 drivers/gpu/drm/gma500/oaktrail_device.c if ((pwr_sts & pwr_mask) == 0) pwr_mask 101 drivers/misc/cardreader/rts5209.c u8 pwr_mask, partial_pwr_on, pwr_on; pwr_mask 103 drivers/misc/cardreader/rts5209.c pwr_mask = SD_POWER_MASK; pwr_mask 108 drivers/misc/cardreader/rts5209.c pwr_mask = MS_POWER_MASK; pwr_mask 115 drivers/misc/cardreader/rts5209.c pwr_mask, partial_pwr_on); pwr_mask 126 drivers/misc/cardreader/rts5209.c rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, pwr_mask, pwr_on); pwr_mask 134 drivers/misc/cardreader/rts5209.c u8 pwr_mask, pwr_off; pwr_mask 136 drivers/misc/cardreader/rts5209.c pwr_mask = SD_POWER_MASK; pwr_mask 140 drivers/misc/cardreader/rts5209.c pwr_mask = MS_POWER_MASK; pwr_mask 146 drivers/misc/cardreader/rts5209.c pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA); pwr_mask 16 drivers/soc/actions/owl-sps-helper.c int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable) pwr_mask 28 drivers/soc/actions/owl-sps-helper.c val |= pwr_mask; pwr_mask 30 drivers/soc/actions/owl-sps-helper.c val &= ~pwr_mask; pwr_mask 49 drivers/soc/actions/owl-sps.c u32 pwr_mask, ack_mask; pwr_mask 52 drivers/soc/actions/owl-sps.c pwr_mask = BIT(pd->info->pwr_bit); pwr_mask 54 drivers/soc/actions/owl-sps.c return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable); pwr_mask 122 drivers/soc/dove/pmu.c u32 pwr_mask; pwr_mask 169 drivers/soc/dove/pmu.c val = readl_relaxed(pmu_base + PMU_PWR) | pmu_dom->pwr_mask; pwr_mask 189 drivers/soc/dove/pmu.c val = ~pmu_dom->pwr_mask & readl_relaxed(pmu_base + PMU_PWR); pwr_mask 219 drivers/soc/dove/pmu.c pm_genpd_init(&domain->base, NULL, !(val & domain->pwr_mask)); pwr_mask 331 drivers/soc/dove/pmu.c domain->pwr_mask = domain_initdata->pwr_mask; pwr_mask 424 drivers/soc/dove/pmu.c &domain->pwr_mask); pwr_mask 32 drivers/soc/rockchip/pm_domains.c int pwr_mask; pwr_mask 90 drivers/soc/rockchip/pm_domains.c .pwr_mask = (pwr), \ pwr_mask 101 drivers/soc/rockchip/pm_domains.c .pwr_mask = (pwr), \ pwr_mask 270 drivers/soc/rockchip/pm_domains.c if (pd->info->pwr_mask == 0) pwr_mask 275 drivers/soc/rockchip/pm_domains.c (pd->info->pwr_mask | pd->info->pwr_w_mask)); pwr_mask 278 drivers/soc/rockchip/pm_domains.c pd->info->pwr_mask, on ? 0 : -1U); pwr_mask 9 include/linux/soc/actions/owl-sps.h int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable); pwr_mask 8 include/linux/soc/dove/pmu.h u32 pwr_mask; pwr_mask 469 sound/soc/codecs/wm8580.c unsigned int pwr_mask; pwr_mask 481 sound/soc/codecs/wm8580.c pwr_mask = WM8580_PWRDN2_PLLAPD; pwr_mask 486 sound/soc/codecs/wm8580.c pwr_mask = WM8580_PWRDN2_PLLBPD; pwr_mask 504 sound/soc/codecs/wm8580.c snd_soc_component_update_bits(component, WM8580_PWRDN2, pwr_mask, pwr_mask); pwr_mask 522 sound/soc/codecs/wm8580.c snd_soc_component_update_bits(component, WM8580_PWRDN2, pwr_mask, 0);