pwr_addr           42 drivers/clk/mediatek/clk-pll.c 	void __iomem	*pwr_addr;
pwr_addr          242 drivers/clk/mediatek/clk-pll.c 	r = readl(pll->pwr_addr) | CON0_PWR_ON;
pwr_addr          243 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
pwr_addr          246 drivers/clk/mediatek/clk-pll.c 	r = readl(pll->pwr_addr) & ~CON0_ISO_EN;
pwr_addr          247 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
pwr_addr          284 drivers/clk/mediatek/clk-pll.c 	r = readl(pll->pwr_addr) | CON0_ISO_EN;
pwr_addr          285 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
pwr_addr          287 drivers/clk/mediatek/clk-pll.c 	r = readl(pll->pwr_addr) & ~CON0_PWR_ON;
pwr_addr          288 drivers/clk/mediatek/clk-pll.c 	writel(r, pll->pwr_addr);
pwr_addr          313 drivers/clk/mediatek/clk-pll.c 	pll->pwr_addr = base + data->pwr_reg;