ptable5 1462 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c const ATOM_PPLIB_POWERPLAYTABLE5 *ptable5 = ptable5 1466 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c (&ptable5->basicTable4); ptable5 1474 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->platform_descriptor.TDPLimit = le32_to_cpu(ptable5->ulTDPLimit); ptable5 1475 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->platform_descriptor.nearTDPLimit = le32_to_cpu(ptable5->ulNearTDPLimit); ptable5 1477 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->platform_descriptor.TDPODLimit = le16_to_cpu(ptable5->usTDPODLimit); ptable5 1486 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->platform_descriptor.nearTDPLimitAdjusted = le32_to_cpu(ptable5->ulNearTDPLimit); ptable5 1492 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->platform_descriptor.SQRampingThreshold = le32_to_cpu(ptable5->ulSQRampingThreshold); ptable5 1494 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->platform_descriptor.CACLeakage = le32_to_cpu(ptable5->ulCACLeakage); ptable5 1498 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c if (0 != ptable5->usCACLeakageTableOffset) { ptable5 1500 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c (ATOM_PPLIB_CAC_Leakage_Table *)(((unsigned long)ptable5) + ptable5 1501 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c le16_to_cpu(ptable5->usCACLeakageTableOffset)); ptable5 1506 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c hwmgr->platform_descriptor.LoadLineSlope = le16_to_cpu(ptable5->usLoadLineSlope);