pstates           815 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 	struct plane_state *pstates;
pstates           835 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 	pstates = kzalloc(sizeof(*pstates) * DPU_STAGE_MAX * 4, GFP_KERNEL);
pstates           875 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		pstates[cnt].dpu_pstate = to_dpu_plane_state(pstate);
pstates           876 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		pstates[cnt].drm_pstate = pstate;
pstates           877 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		pstates[cnt].stage = pstate->normalized_zpos;
pstates           878 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		pstates[cnt].pipe_id = dpu_plane_pipe(plane);
pstates           880 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		if (pipe_staged[pstates[cnt].pipe_id]) {
pstates           882 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 				pipe_staged[pstates[cnt].pipe_id];
pstates           886 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 			pipe_staged[pstates[cnt].pipe_id] = NULL;
pstates           888 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 			pipe_staged[pstates[cnt].pipe_id] = pstate;
pstates           921 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		if (pstates[i].stage != z_pos) {
pstates           924 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 			z_pos = pstates[i].stage;
pstates           933 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		} else if (pstates[i].drm_pstate->crtc_x < mixer_width) {
pstates           952 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		pstates[i].dpu_pstate->stage = z_pos + DPU_STAGE_0;
pstates           987 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		prv_pstate = &pstates[i - 1];
pstates           988 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		cur_pstate = &pstates[i];
pstates          1039 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 	kfree(pstates);
pstates           218 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	struct mdp5_plane_state *pstate, *pstates[STAGE_MAX + 1] = {NULL};
pstates           252 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		pstates[pstate->stage] = pstate;
pstates           275 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	if (!pstates[STAGE_BASE]) {
pstates           279 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		format = to_mdp_format(msm_framebuffer_format(pstates[STAGE_BASE]->base.fb));
pstates           287 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		if (!pstates[i])
pstates           291 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 			msm_framebuffer_format(pstates[i]->base.fb));
pstates           292 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		plane = pstates[i]->base.plane;
pstates           295 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		fg_alpha = pstates[i]->alpha;
pstates           296 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		bg_alpha = 0xFF - pstates[i]->alpha;
pstates           305 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		if (format->alpha_enable && pstates[i]->premultiplied) {
pstates           616 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	struct plane_state pstates[STAGE_MAX + 1];
pstates           632 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		pstates[cnt].plane = plane;
pstates           633 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		pstates[cnt].state = to_mdp5_plane_state(pstate);
pstates           639 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		if (pstates[cnt].state->r_hwpipe)
pstates           667 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	sort(pstates, cnt, sizeof(pstates[0]), pstate_cmp, NULL);
pstates           671 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		(pstates[cnt - 1].plane->type != DRM_PLANE_TYPE_CURSOR));
pstates           673 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	start = get_start_stage(crtc, state, &pstates[0].state->base);
pstates           686 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 			pstates[i].state->stage = hw_cfg->lm.nb_stages;
pstates           688 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 			pstates[i].state->stage = start + i;
pstates           690 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 				pstates[i].plane->name,
pstates           691 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 				pstates[i].state->stage);
pstates           633 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	if (clk->func->pstates)
pstates           682 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 	if (!func->pstates) {
pstates           689 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 			list_add_tail(&func->pstates[idx].head, &clk->states);
pstates           585 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 	base->func->calc(base, &base->func->pstates[0].base);
pstates           603 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 	.pstates = gk20a_pstates,
pstates           624 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 		INIT_LIST_HEAD(&func->pstates[i].list);
pstates           625 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 		func->pstates[i].pstate = i + 1;
pstates           865 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	base->func->calc(base, &base->func->pstates[0].base);
pstates           883 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	.pstates = gm20b_pstates,
pstates           901 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	.pstates = gm20b_pstates,
pstates           983 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 	struct nvkm_pstate *pstates = clk->base.base.func->pstates;
pstates          1000 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 		if (pstates[i].base.voltage == id)
pstates          1002 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 				   pstates[i].base.domain[nv_clk_src_gpc]);
pstates            14 drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h 	struct nvkm_pstate *pstates;
pstates           185 drivers/misc/echo/echo.c 	ec->pstates = 0;
pstates           250 drivers/misc/echo/echo.c 	ec->pstates = 0;
pstates           336 drivers/misc/echo/echo.c 		ec->pstates +=
pstates           338 drivers/misc/echo/echo.c 		if (ec->pstates < 0)
pstates           339 drivers/misc/echo/echo.c 			ec->pstates = 0;
pstates           408 drivers/misc/echo/echo.c 		p = MIN_TX_POWER_FOR_ADAPTION + ec->pstates;
pstates           130 drivers/misc/echo/echo.h 	int32_t pstates;
pstates           300 drivers/mtd/nand/raw/nandsim.c 	uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
pstates          1228 drivers/mtd/nand/raw/nandsim.c 			if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
pstates          1285 drivers/mtd/nand/raw/nandsim.c 	ns->pstates[ns->npstates++] = ns->state;
pstates           343 drivers/platform/x86/intel_telemetry_debugfs.c 	u64 pstates = 0;
pstates           401 drivers/platform/x86/intel_telemetry_debugfs.c 			pstates = evtlog[index].telem_evtlog;
pstates           409 drivers/platform/x86/intel_telemetry_debugfs.c 		   (pstates & TELEM_MASK_BYTE)*100,
pstates           410 drivers/platform/x86/intel_telemetry_debugfs.c 		   ((pstates >> 8) & TELEM_MASK_BYTE)*50/3);
pstates           413 drivers/platform/x86/intel_telemetry_debugfs.c 		   ((pstates >> 16) & TELEM_MASK_BYTE)*25,
pstates           414 drivers/platform/x86/intel_telemetry_debugfs.c 		   ((pstates >> 24) & TELEM_MASK_BYTE)*50/3);
pstates           167 tools/power/cpupower/utils/cpufreq-info.c 	unsigned long pstates[MAX_HW_PSTATES] = {0,};
pstates           190 tools/power/cpupower/utils/cpufreq-info.c 				     pstates, &pstate_no);
pstates           197 tools/power/cpupower/utils/cpufreq-info.c 			if (!pstates[i])
pstates           201 tools/power/cpupower/utils/cpufreq-info.c 					 "\n"), i, pstates[i]);
pstates           204 tools/power/cpupower/utils/cpufreq-info.c 				       i - b_states, pstates[i]);
pstates            89 tools/power/cpupower/utils/helpers/amd.c 		   int boost_states, unsigned long *pstates, int *no)
pstates           127 tools/power/cpupower/utils/helpers/amd.c 		pstates[i] = get_cof(cpu_family, pstate);
pstates           126 tools/power/cpupower/utils/helpers/helpers.h 			  int boost_states, unsigned long *pstates, int *no);
pstates           144 tools/power/cpupower/utils/helpers/helpers.h 				 int boost_states, unsigned long *pstates,