psr 11 arch/arm/include/asm/opcodes.h extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); psr 52 arch/arm/kernel/opcodes.c asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr) psr 55 arch/arm/kernel/opcodes.c u32 psr_cond = psr >> 28; psr 131 arch/arm64/include/asm/ptrace.h static inline unsigned long compat_psr_to_pstate(const unsigned long psr) psr 135 arch/arm64/include/asm/ptrace.h pstate = psr & ~COMPAT_PSR_DIT_BIT; psr 137 arch/arm64/include/asm/ptrace.h if (psr & COMPAT_PSR_DIT_BIT) psr 145 arch/arm64/include/asm/ptrace.h unsigned long psr; psr 147 arch/arm64/include/asm/ptrace.h psr = pstate & ~PSR_AA32_DIT_BIT; psr 150 arch/arm64/include/asm/ptrace.h psr |= COMPAT_PSR_DIT_BIT; psr 152 arch/arm64/include/asm/ptrace.h return psr; psr 353 arch/arm64/kernel/armv8_deprecated.c static unsigned int __kprobes aarch32_check_condition(u32 opcode, u32 psr) psr 358 arch/arm64/kernel/armv8_deprecated.c if ((*aarch32_opcode_cond_checks[cc_bits])(psr)) psr 190 arch/arm64/kernel/signal32.c unsigned long psr; psr 214 arch/arm64/kernel/signal32.c __get_user_error(psr, &sf->uc.uc_mcontext.arm_cpsr, err); psr 216 arch/arm64/kernel/signal32.c regs->pstate = compat_psr_to_pstate(psr); psr 390 arch/arm64/kernel/signal32.c unsigned long psr = pstate_to_compat_psr(regs->pstate); psr 409 arch/arm64/kernel/signal32.c __put_user_error(psr, &sf->uc.uc_mcontext.arm_cpsr, err); psr 158 arch/csky/abiv1/inc/abi/entry.h mtcr r6, psr psr 181 arch/csky/abiv2/inc/abi/entry.h mtcr r6, psr psr 84 arch/ia64/include/asm/mca_asm.h mov old_psr = psr; \ psr 100 arch/ia64/include/asm/mca_asm.h mov temp1 = psr; \ psr 101 arch/ia64/include/asm/mca_asm.h mov temp2 = psr; \ psr 106 arch/ia64/include/asm/mca_asm.h mov psr.l = temp2; \ psr 164 arch/ia64/include/asm/mca_asm.h mov temp2 = psr; \ psr 170 arch/ia64/include/asm/mca_asm.h mov psr.l = temp2; \ psr 36 arch/ia64/include/asm/native/inst.h (pred) mov reg = psr psr 76 arch/ia64/include/asm/native/inst.h ssm psr.ic | PSR_DEFAULT_BITS \ psr 82 arch/ia64/include/asm/native/inst.h ssm psr.ic \ psr 87 arch/ia64/include/asm/native/inst.h rsm psr.ic psr 90 arch/ia64/include/asm/native/inst.h (pred) ssm psr.i psr 93 arch/ia64/include/asm/native/inst.h (pred) rsm psr.i psr 96 arch/ia64/include/asm/native/inst.h rsm psr.i | psr.ic psr 99 arch/ia64/include/asm/native/inst.h rsm psr.dt psr 102 arch/ia64/include/asm/native/inst.h rsm psr.be | psr.i psr 105 arch/ia64/include/asm/native/inst.h ssm psr.dt \ psr 456 arch/ia64/include/asm/processor.h __u64 psr; psr 457 arch/ia64/include/asm/processor.h psr = ia64_getreg(_IA64_REG_PSR); psr 461 arch/ia64/include/asm/processor.h return psr; psr 468 arch/ia64/include/asm/processor.h ia64_set_psr (__u64 psr) psr 471 arch/ia64/include/asm/processor.h ia64_setreg(_IA64_REG_PSR_L, psr); psr 458 arch/ia64/kernel/efi.c u64 psr; psr 466 arch/ia64/kernel/efi.c psr = ia64_clear_ic(); psr 471 arch/ia64/kernel/efi.c ia64_set_psr(psr); /* restore psr */ psr 1227 arch/ia64/kernel/mca.c unsigned long psr; psr 1233 arch/ia64/kernel/mca.c psr = ia64_clear_ic(); psr 1258 arch/ia64/kernel/mca.c ia64_set_psr(psr); psr 956 arch/ia64/kernel/perfmon.c unsigned long psr, val; psr 971 arch/ia64/kernel/perfmon.c psr = pfm_get_psr(); psr 1044 arch/ia64/kernel/perfmon.c pfm_set_psr_l(psr); psr 4541 arch/ia64/kernel/perfmon.c { u64 psr = pfm_get_psr(); psr 4542 arch/ia64/kernel/perfmon.c BUG_ON(psr & (IA64_PSR_UP|IA64_PSR_PP)); psr 5589 arch/ia64/kernel/perfmon.c unsigned long psr; psr 5633 arch/ia64/kernel/perfmon.c psr = pfm_get_psr(); psr 5640 arch/ia64/kernel/perfmon.c cpu, psr, psr 5750 arch/ia64/kernel/perfmon.c u64 psr; psr 5782 arch/ia64/kernel/perfmon.c psr = pfm_get_psr(); psr 5784 arch/ia64/kernel/perfmon.c BUG_ON(psr & (IA64_PSR_I)); psr 5798 arch/ia64/kernel/perfmon.c ctx->ctx_saved_psr_up = psr & IA64_PSR_UP; psr 5838 arch/ia64/kernel/perfmon.c u64 psr; psr 5846 arch/ia64/kernel/perfmon.c psr = pfm_get_psr(); psr 5848 arch/ia64/kernel/perfmon.c BUG_ON(psr & (IA64_PSR_I)); psr 5862 arch/ia64/kernel/perfmon.c ctx->ctx_saved_psr_up = psr & IA64_PSR_UP; psr 5871 arch/ia64/kernel/perfmon.c { u64 psr = pfm_get_psr(); psr 5872 arch/ia64/kernel/perfmon.c BUG_ON(psr & IA64_PSR_UP); psr 5933 arch/ia64/kernel/perfmon.c u64 psr, psr_up; psr 5952 arch/ia64/kernel/perfmon.c psr = pfm_get_psr(); psr 5956 arch/ia64/kernel/perfmon.c BUG_ON(psr & (IA64_PSR_UP|IA64_PSR_PP)); psr 5957 arch/ia64/kernel/perfmon.c BUG_ON(psr & IA64_PSR_I); psr 6096 arch/ia64/kernel/perfmon.c u64 psr, psr_up; psr 6101 arch/ia64/kernel/perfmon.c psr = pfm_get_psr(); psr 6103 arch/ia64/kernel/perfmon.c BUG_ON(psr & (IA64_PSR_UP|IA64_PSR_PP)); psr 6104 arch/ia64/kernel/perfmon.c BUG_ON(psr & IA64_PSR_I); psr 6611 arch/ia64/kernel/perfmon.c unsigned long psr, dcr, info, flags; psr 6638 arch/ia64/kernel/perfmon.c psr = pfm_get_psr(); psr 6643 arch/ia64/kernel/perfmon.c psr & IA64_PSR_PP ? 1 : 0, psr 6644 arch/ia64/kernel/perfmon.c psr & IA64_PSR_UP ? 1 : 0, psr 687 arch/ia64/kernel/ptrace.c struct ia64_psr *psr = ia64_psr(task_pt_regs(task)); psr 694 arch/ia64/kernel/ptrace.c if (ia64_is_local_fpu_owner(task) && psr->mfh) { psr 695 arch/ia64/kernel/ptrace.c psr->mfh = 0; psr 713 arch/ia64/kernel/ptrace.c struct ia64_psr *psr = ia64_psr(task_pt_regs(task)); psr 721 arch/ia64/kernel/ptrace.c psr->dfh = 1; psr 830 arch/ia64/kernel/ptrace.c unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val; psr 854 arch/ia64/kernel/ptrace.c if (access_uarea(child, PT_CR_IPSR, &psr, 0) < 0 psr 866 arch/ia64/kernel/ptrace.c retval |= __put_user(psr, &ppr->cr_ipsr); psr 974 arch/ia64/kernel/ptrace.c unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0; psr 1002 arch/ia64/kernel/ptrace.c retval |= __get_user(psr, &ppr->cr_ipsr); psr 1104 arch/ia64/kernel/ptrace.c retval |= access_uarea(child, PT_CR_IPSR, &psr, 1); psr 91 arch/ia64/kernel/signal.c struct ia64_psr *psr = ia64_psr(&scr->pt); psr 94 arch/ia64/kernel/signal.c psr->mfh = 0; /* drop signal handler's fph contents... */ psr 96 arch/ia64/kernel/signal.c if (psr->dfh) psr 193 arch/ia64/kernel/traps.c struct ia64_psr *psr = ia64_psr(regs); psr 196 arch/ia64/kernel/traps.c psr->dfh = 0; psr 220 arch/ia64/kernel/traps.c psr->mfh = 0; psr 227 arch/ia64/kernel/traps.c psr->mfh = 1; psr 458 arch/ia64/mm/tlb.c unsigned long psr; psr 524 arch/ia64/mm/tlb.c psr = ia64_clear_ic(); psr 543 arch/ia64/mm/tlb.c ia64_set_psr(psr); psr 28 arch/m68k/include/asm/bvme6000hw.h pad_n[3], psr, psr 553 arch/powerpc/boot/4xx.c u32 psr = mfdcr(DCRN_405_CPC0_PSR); psr 570 arch/powerpc/boot/4xx.c if (!(psr & 0x00001000)) /* PCI async mode enable == 0 */ psr 571 arch/powerpc/boot/4xx.c if (psr & 0x00000020) /* New mode enable */ psr 575 arch/powerpc/boot/4xx.c else if (psr & 0x00000020) /* New mode enable */ psr 576 arch/powerpc/boot/4xx.c if (psr & 0x00000800) /* PerClk synch mode */ psr 295 arch/powerpc/include/asm/opal.h int opal_get_power_shift_ratio(u32 handle, int token, u32 *psr); psr 296 arch/powerpc/include/asm/opal.h int opal_set_power_shift_ratio(u32 handle, int token, u32 psr); psr 30 arch/powerpc/platforms/powernv/opal-psr.c int psr, ret, token; psr 43 arch/powerpc/platforms/powernv/opal-psr.c (u32 *)__pa(&psr)); psr 54 arch/powerpc/platforms/powernv/opal-psr.c ret = sprintf(buf, "%u\n", be32_to_cpu(psr)); psr 60 arch/powerpc/platforms/powernv/opal-psr.c ret = sprintf(buf, "%u\n", be32_to_cpu(psr)); psr 80 arch/powerpc/platforms/powernv/opal-psr.c int psr, ret, token; psr 82 arch/powerpc/platforms/powernv/opal-psr.c ret = kstrtoint(buf, 0, &psr); psr 96 arch/powerpc/platforms/powernv/opal-psr.c ret = opal_set_power_shift_ratio(psr_attr->handle, token, psr); psr 125 arch/powerpc/platforms/powernv/opal-psr.c struct device_node *psr, *node; psr 128 arch/powerpc/platforms/powernv/opal-psr.c psr = of_find_compatible_node(NULL, NULL, psr 130 arch/powerpc/platforms/powernv/opal-psr.c if (!psr) { psr 135 arch/powerpc/platforms/powernv/opal-psr.c psr_attrs = kcalloc(of_get_child_count(psr), sizeof(*psr_attrs), psr 146 arch/powerpc/platforms/powernv/opal-psr.c for_each_child_of_node(psr, node) { psr 172 arch/powerpc/sysdev/fsl_gtm.c u8 psr; psr 196 arch/powerpc/sysdev/fsl_gtm.c psr = 0; psr 199 arch/powerpc/sysdev/fsl_gtm.c psr = 256 - 1; psr 215 arch/powerpc/sysdev/fsl_gtm.c out_be16(tmr->gtpsr, psr); psr 13 arch/sparc/include/asm/head_32.h rd %psr, %l0; b label; rd %wim, %l3; nop; psr 16 arch/sparc/include/asm/head_32.h #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; psr 17 arch/sparc/include/asm/head_32.h #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; psr 21 arch/sparc/include/asm/head_32.h rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3; psr 38 arch/sparc/include/asm/head_32.h rd %psr, %l0; psr 42 arch/sparc/include/asm/head_32.h rd %psr,%l0; \ psr 50 arch/sparc/include/asm/head_32.h rd %psr,%l0; \ psr 59 arch/sparc/include/asm/head_32.h b getcc_trap_handler; rd %psr, %l0; nop; nop; psr 63 arch/sparc/include/asm/head_32.h b setcc_trap_handler; rd %psr, %l0; nop; nop; psr 67 arch/sparc/include/asm/head_32.h rd %psr, %i0; jmp %l2; rett %l2 + 4; nop; psr 73 arch/sparc/include/asm/head_32.h mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3; psr 79 arch/sparc/include/asm/head_32.h rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0; psr 82 arch/sparc/include/asm/head_32.h rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0; psr 71 arch/sparc/include/asm/processor_32.h regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; psr 21 arch/sparc/include/asm/psr.h unsigned int psr; psr 27 arch/sparc/include/asm/psr.h : "=r" (psr) psr 31 arch/sparc/include/asm/psr.h return psr; psr 124 arch/sparc/include/asm/ptrace.h return (regs->psr & PSR_SYSCALL); psr 129 arch/sparc/include/asm/ptrace.h return (regs->psr &= ~PSR_SYSCALL); psr 143 arch/sparc/include/asm/ptrace.h #define user_mode(regs) (!((regs)->psr & PSR_PS)) psr 40 arch/sparc/include/asm/sigcontext.h unsigned int psr; psr 24 arch/sparc/include/asm/switch_to_32.h (prv)->thread.kregs->psr &= ~PSR_EF; \ psr 34 arch/sparc/include/asm/switch_to_32.h (nxt)->thread.kregs->psr&=~PSR_EF; \ psr 43 arch/sparc/include/asm/syscall.h return (regs->psr & PSR_C) ? true : false; psr 47 arch/sparc/include/asm/syscall.h regs->psr |= PSR_C; psr 51 arch/sparc/include/asm/syscall.h regs->psr &= ~PSR_C; psr 38 arch/sparc/include/uapi/asm/psrcompat.h static inline unsigned long psr_to_tstate_icc(unsigned int psr) psr 40 arch/sparc/include/uapi/asm/psrcompat.h unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12; psr 41 arch/sparc/include/uapi/asm/psrcompat.h if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) psr 42 arch/sparc/include/uapi/asm/psrcompat.h tstate |= ((unsigned long)(psr & PSR_XCC)) << 20; psr 44 arch/sparc/include/uapi/asm/ptrace.h unsigned int psr; psr 105 arch/sparc/include/uapi/asm/ptrace.h unsigned long psr; psr 443 arch/sparc/kernel/cpu.c int psr; psr 448 arch/sparc/kernel/cpu.c psr = get_psr(); psr 449 arch/sparc/kernel/cpu.c put_psr(psr | PSR_EF); psr 456 arch/sparc/kernel/cpu.c put_psr(psr); psr 16 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 19 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 21 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 23 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 25 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 27 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 29 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 31 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 33 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 35 arch/sparc/kernel/entry.h unsigned long npc, unsigned long psr); psr 82 arch/sparc/kernel/kernel.h unsigned long npc, unsigned long psr); psr 38 arch/sparc/kernel/kgdb_32.c gdb_regs[GDB_PSR] = regs->psr; psr 93 arch/sparc/kernel/kgdb_32.c if (regs->psr != gdb_regs[GDB_PSR]) { psr 94 arch/sparc/kernel/kgdb_32.c unsigned long cwp = regs->psr & PSR_CWP; psr 96 arch/sparc/kernel/kgdb_32.c regs->psr = (gdb_regs[GDB_PSR] & ~PSR_CWP) | cwp; psr 129 arch/sparc/kernel/process_32.c r->psr, r->pc, r->npc, r->y, print_tainted()); psr 343 arch/sparc/kernel/process_32.c unsigned long psr; psr 350 arch/sparc/kernel/process_32.c psr = childregs->psr = get_psr(); psr 351 arch/sparc/kernel/process_32.c ti->kpsr = psr | PSR_PIL; psr 352 arch/sparc/kernel/process_32.c ti->kwim = 1 << (((psr & PSR_CWP) + 1) % nwindows); psr 395 arch/sparc/kernel/process_32.c childregs->psr &= ~PSR_EF; psr 428 arch/sparc/kernel/process_32.c regs->psr &= ~(PSR_EF); psr 438 arch/sparc/kernel/process_32.c regs->psr &= ~(PSR_EF); psr 93 arch/sparc/kernel/ptrace_32.c reg = regs->psr; psr 170 arch/sparc/kernel/ptrace_32.c unsigned long psr; psr 179 arch/sparc/kernel/ptrace_32.c psr = regs->psr; psr 180 arch/sparc/kernel/ptrace_32.c psr &= ~(PSR_ICC | PSR_SYSCALL); psr 181 arch/sparc/kernel/ptrace_32.c psr |= (reg & (PSR_ICC | PSR_SYSCALL)); psr 182 arch/sparc/kernel/ptrace_32.c regs->psr = psr; psr 361 arch/sparc/kernel/ptrace_32.c &pregs->psr); psr 374 arch/sparc/kernel/ptrace_32.c &pregs->psr); psr 934 arch/sparc/kernel/ptrace_64.c &pregs->psr); psr 946 arch/sparc/kernel/ptrace_64.c &pregs->psr); psr 90 arch/sparc/kernel/signal32.c unsigned int psr, ufp; psr 130 arch/sparc/kernel/signal32.c err |= __get_user(psr, &sf->info.si_regs.psr); psr 134 arch/sparc/kernel/signal32.c if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) { psr 149 arch/sparc/kernel/signal32.c regs->tstate |= psr_to_tstate_icc(psr); psr 179 arch/sparc/kernel/signal32.c unsigned int psr, pc, npc, ufp; psr 218 arch/sparc/kernel/signal32.c err |= __get_user(psr, &sf->regs.psr); psr 222 arch/sparc/kernel/signal32.c if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) { psr 237 arch/sparc/kernel/signal32.c regs->tstate |= psr_to_tstate_icc(psr); psr 355 arch/sparc/kernel/signal32.c u32 psr; psr 392 arch/sparc/kernel/signal32.c psr = tstate_to_psr(regs->tstate); psr 394 arch/sparc/kernel/signal32.c psr |= PSR_EF; psr 395 arch/sparc/kernel/signal32.c err |= __put_user(psr, &sf->info.si_regs.psr); psr 406 arch/sparc/kernel/signal32.c if (psr & PSR_EF) { psr 490 arch/sparc/kernel/signal32.c u32 psr; psr 526 arch/sparc/kernel/signal32.c psr = tstate_to_psr(regs->tstate); psr 528 arch/sparc/kernel/signal32.c psr |= PSR_EF; psr 529 arch/sparc/kernel/signal32.c err |= __put_user(psr, &sf->regs.psr); psr 540 arch/sparc/kernel/signal32.c if (psr & PSR_EF) { psr 109 arch/sparc/kernel/signal_32.c up_psr = regs->psr; psr 113 arch/sparc/kernel/signal_32.c regs->psr = (up_psr & ~(PSR_ICC | PSR_EF)) psr 114 arch/sparc/kernel/signal_32.c | (regs->psr & (PSR_ICC | PSR_EF)); psr 146 arch/sparc/kernel/signal_32.c unsigned int psr, pc, npc, ufp; psr 168 arch/sparc/kernel/signal_32.c err |= __get_user(psr, &sf->regs.psr); psr 173 arch/sparc/kernel/signal_32.c regs->psr = (regs->psr & ~PSR_ICC) | (psr & PSR_ICC); psr 328 arch/sparc/kernel/signal_32.c unsigned int psr; psr 349 arch/sparc/kernel/signal_32.c psr = regs->psr; psr 351 arch/sparc/kernel/signal_32.c psr |= PSR_EF; psr 352 arch/sparc/kernel/signal_32.c err |= __put_user(psr, &sf->regs.psr); psr 356 arch/sparc/kernel/signal_32.c if (psr & PSR_EF) { psr 440 arch/sparc/kernel/signal_32.c regs->psr |= PSR_C; psr 481 arch/sparc/kernel/signal_32.c if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C)) psr 491 arch/sparc/kernel/signal_32.c if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C)) { psr 23 arch/sparc/kernel/sigutil_32.c regs->psr &= ~(PSR_EF); psr 32 arch/sparc/kernel/sigutil_32.c regs->psr &= ~(PSR_EF); psr 58 arch/sparc/kernel/sigutil_32.c regs->psr &= ~PSR_EF; psr 62 arch/sparc/kernel/sigutil_32.c regs->psr &= ~PSR_EF; psr 89 arch/sparc/kernel/traps_32.c if(regs->psr & PSR_PS) psr 102 arch/sparc/kernel/traps_32.c if(regs->psr & PSR_PS) psr 110 arch/sparc/kernel/traps_32.c unsigned long psr) psr 112 arch/sparc/kernel/traps_32.c if(psr & PSR_PS) psr 123 arch/sparc/kernel/traps_32.c unsigned long psr) psr 125 arch/sparc/kernel/traps_32.c if(psr & PSR_PS) psr 133 arch/sparc/kernel/traps_32.c unsigned long psr) psr 135 arch/sparc/kernel/traps_32.c if(regs->psr & PSR_PS) { psr 159 arch/sparc/kernel/traps_32.c unsigned long psr) psr 162 arch/sparc/kernel/traps_32.c if(psr & PSR_PS) psr 166 arch/sparc/kernel/traps_32.c regs->psr |= PSR_EF; psr 201 arch/sparc/kernel/traps_32.c unsigned long psr) psr 223 arch/sparc/kernel/traps_32.c regs->psr &= ~PSR_EF; psr 265 arch/sparc/kernel/traps_32.c if(psr & PSR_PS) { psr 298 arch/sparc/kernel/traps_32.c regs->psr &= ~PSR_EF; psr 304 arch/sparc/kernel/traps_32.c unsigned long psr) psr 306 arch/sparc/kernel/traps_32.c if(psr & PSR_PS) psr 312 arch/sparc/kernel/traps_32.c unsigned long psr) psr 316 arch/sparc/kernel/traps_32.c pc, npc, psr); psr 318 arch/sparc/kernel/traps_32.c if(psr & PSR_PS) psr 324 arch/sparc/kernel/traps_32.c unsigned long psr) psr 328 arch/sparc/kernel/traps_32.c pc, npc, psr); psr 334 arch/sparc/kernel/traps_32.c unsigned long psr) psr 340 arch/sparc/kernel/traps_32.c unsigned long psr) psr 344 arch/sparc/kernel/traps_32.c pc, npc, psr); psr 350 arch/sparc/kernel/traps_32.c unsigned long psr) psr 99 arch/sparc/mm/fault_32.c "nop\n" : "=r" (regs.psr)); psr 144 arch/sparc/mm/fault_32.c if (regs->psr & PSR_PS) psr 168 arch/sparc/mm/fault_32.c int from_user = !(regs->psr & PSR_PS); psr 1563 arch/sparc/mm/srmmu.c unsigned long mreg, psr; psr 1569 arch/sparc/mm/srmmu.c mreg = srmmu_get_mmureg(); psr = get_psr(); psr 1572 arch/sparc/mm/srmmu.c psr_typ = (psr >> 28) & 0xf; psr 1573 arch/sparc/mm/srmmu.c psr_vers = (psr >> 24) & 0xf; psr 454 drivers/atm/fore200e.c int irq_posted = readl(fore200e->regs.pca.psr); psr 498 drivers/atm/fore200e.c fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET; psr 775 drivers/atm/fore200e.h volatile u32 __iomem * psr; /* address of PCI specific register */ psr 94 drivers/cpufreq/maple-cpufreq.c unsigned long psr = scom970_read(SCOM_PSR); psr 96 drivers/cpufreq/maple-cpufreq.c if ((psr & PSR_CMD_RECEIVED) == 0 && psr 97 drivers/cpufreq/maple-cpufreq.c (((psr >> PSR_CUR_SPEED_SHIFT) ^ psr 101 drivers/cpufreq/maple-cpufreq.c if (psr & PSR_CMD_COMPLETED) psr 116 drivers/cpufreq/maple-cpufreq.c unsigned long psr = scom970_read(SCOM_PSR); psr 120 drivers/cpufreq/maple-cpufreq.c if ((((psr >> PSR_CUR_SPEED_SHIFT) ^ psr 168 drivers/cpufreq/pmac64-cpufreq.c unsigned long psr = scom970_read(SCOM_PSR); psr 170 drivers/cpufreq/pmac64-cpufreq.c if ((psr & PSR_CMD_RECEIVED) == 0 && psr 171 drivers/cpufreq/pmac64-cpufreq.c (((psr >> PSR_CUR_SPEED_SHIFT) ^ psr 175 drivers/cpufreq/pmac64-cpufreq.c if (psr & PSR_CMD_COMPLETED) psr 194 drivers/cpufreq/pmac64-cpufreq.c unsigned long psr = scom970_read(SCOM_PSR); psr 198 drivers/cpufreq/pmac64-cpufreq.c if ((((psr >> PSR_CUR_SPEED_SHIFT) ^ psr 564 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.enable = driver->psr_enabled; psr 681 drivers/gpu/drm/i915/display/intel_bios.c const struct bdb_psr *psr; psr 685 drivers/gpu/drm/i915/display/intel_bios.c psr = find_section(bdb, BDB_PSR); psr 686 drivers/gpu/drm/i915/display/intel_bios.c if (!psr) { psr 691 drivers/gpu/drm/i915/display/intel_bios.c psr_table = &psr->psr_table[panel_type]; psr 693 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.full_link = psr_table->full_link; psr 694 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; psr 697 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : psr 702 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; psr 705 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; psr 708 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; psr 711 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; psr 728 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp1_wakeup_time_us = 500; psr 731 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp1_wakeup_time_us = 100; psr 734 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp1_wakeup_time_us = 0; psr 741 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; psr 747 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; psr 750 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; psr 753 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; psr 760 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; psr 764 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; psr 765 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; psr 769 drivers/gpu/drm/i915/display/intel_bios.c u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; psr 787 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; psr 790 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; psr 6744 drivers/gpu/drm/i915/display/intel_dp.c if (dev_priv->psr.enabled) { psr 82 drivers/gpu/drm/i915/display/intel_psr.c switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) { psr 191 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.irq_aux_error = true; psr 205 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.last_entry_attempt = time_ns; psr 211 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.last_exit = time_ns; psr 217 drivers/gpu/drm/i915/display/intel_psr.c bool psr2_enabled = dev_priv->psr.psr2_enabled; psr 229 drivers/gpu/drm/i915/display/intel_psr.c schedule_work(&dev_priv->psr.work); psr 304 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.sink_support = true; psr 305 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.sink_sync_latency = psr 308 drivers/gpu/drm/i915/display/intel_psr.c WARN_ON(dev_priv->psr.dp); psr 309 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.dp = intel_dp; psr 328 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.sink_psr2_support = y_req && alpm; psr 330 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.sink_psr2_support ? "" : "not "); psr 332 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.sink_psr2_support) { psr 333 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.colorimetry_support = psr 335 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.su_x_granularity = psr 348 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.psr2_enabled) { psr 353 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.colorimetry_support) { psr 413 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.psr2_enabled) { psr 418 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.link_standby) psr 438 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0) psr 440 drivers/gpu/drm/i915/display/intel_psr.c else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 100) psr 442 drivers/gpu/drm/i915/display/intel_psr.c else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 500) psr 447 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us == 0) psr 449 drivers/gpu/drm/i915/display/intel_psr.c else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100) psr 451 drivers/gpu/drm/i915/display/intel_psr.c else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500) psr 474 drivers/gpu/drm/i915/display/intel_psr.c int idle_frames = max(6, dev_priv->vbt.psr.idle_frames); psr 479 drivers/gpu/drm/i915/display/intel_psr.c idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency + 1); psr 486 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.link_standby) psr 506 drivers/gpu/drm/i915/display/intel_psr.c int idle_frames = max(6, dev_priv->vbt.psr.idle_frames); psr 508 drivers/gpu/drm/i915/display/intel_psr.c idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency + 1); psr 515 drivers/gpu/drm/i915/display/intel_psr.c val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1); psr 517 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 && psr 518 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 50) psr 520 drivers/gpu/drm/i915/display/intel_psr.c else if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 100) psr 522 drivers/gpu/drm/i915/display/intel_psr.c else if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 500) psr 544 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.sink_psr2_support) psr 578 drivers/gpu/drm/i915/display/intel_psr.c if (crtc_hdisplay % dev_priv->psr.su_x_granularity) { psr 580 drivers/gpu/drm/i915/display/intel_psr.c crtc_hdisplay, dev_priv->psr.su_x_granularity); psr 604 drivers/gpu/drm/i915/display/intel_psr.c if (intel_dp != dev_priv->psr.dp) psr 619 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.sink_not_reliable) { psr 654 drivers/gpu/drm/i915/display/intel_psr.c WARN_ON(dev_priv->psr.active); psr 655 drivers/gpu/drm/i915/display/intel_psr.c lockdep_assert_held(&dev_priv->psr.lock); psr 658 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.psr2_enabled) psr 663 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.active = true; psr 698 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.psr2_enabled && (IS_GEN(dev_priv, 9) && psr 729 drivers/gpu/drm/i915/display/intel_psr.c struct intel_dp *intel_dp = dev_priv->psr.dp; psr 731 drivers/gpu/drm/i915/display/intel_psr.c WARN_ON(dev_priv->psr.enabled); psr 733 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state); psr 734 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.busy_frontbuffer_bits = 0; psr 735 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; psr 738 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.psr2_enabled ? "2" : "1"); psr 742 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.enabled = true; psr 767 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 769 drivers/gpu/drm/i915/display/intel_psr.c if (!psr_global_enabled(dev_priv->psr.debug)) { psr 777 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 784 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.active) { psr 791 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.psr2_enabled) { psr 800 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.active = false; psr 809 drivers/gpu/drm/i915/display/intel_psr.c lockdep_assert_held(&dev_priv->psr.lock); psr 811 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.enabled) psr 815 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.psr2_enabled ? "2" : "1"); psr 819 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.psr2_enabled) { psr 835 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.enabled = false; psr 856 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 860 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 861 drivers/gpu/drm/i915/display/intel_psr.c cancel_work_sync(&dev_priv->psr.work); psr 876 drivers/gpu/drm/i915/display/intel_psr.c I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0); psr 898 drivers/gpu/drm/i915/display/intel_psr.c struct i915_psr *psr = &dev_priv->psr; psr 901 drivers/gpu/drm/i915/display/intel_psr.c if (!CAN_PSR(dev_priv) || READ_ONCE(psr->dp) != intel_dp) psr 904 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 906 drivers/gpu/drm/i915/display/intel_psr.c enable = crtc_state->has_psr && psr_global_enabled(psr->debug); psr 909 drivers/gpu/drm/i915/display/intel_psr.c if (enable == psr->enabled && psr2_enable == psr->psr2_enabled) { psr 911 drivers/gpu/drm/i915/display/intel_psr.c if (crtc_state->crc_enabled && psr->enabled) psr 913 drivers/gpu/drm/i915/display/intel_psr.c else if (INTEL_GEN(dev_priv) < 9 && psr->enabled) { psr 918 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.active && psr 919 drivers/gpu/drm/i915/display/intel_psr.c !dev_priv->psr.busy_frontbuffer_bits) psr 920 drivers/gpu/drm/i915/display/intel_psr.c schedule_work(&dev_priv->psr.work); psr 926 drivers/gpu/drm/i915/display/intel_psr.c if (psr->enabled) psr 933 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 952 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.enabled || !new_crtc_state->has_psr) psr 956 drivers/gpu/drm/i915/display/intel_psr.c if (READ_ONCE(dev_priv->psr.psr2_enabled)) psr 978 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.enabled) psr 981 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.psr2_enabled) { psr 989 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 996 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 997 drivers/gpu/drm/i915/display/intel_psr.c return err == 0 && dev_priv->psr.enabled; psr 1064 drivers/gpu/drm/i915/display/intel_psr.c ret = mutex_lock_interruptible(&dev_priv->psr.lock); psr 1068 drivers/gpu/drm/i915/display/intel_psr.c old_mode = dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK; psr 1069 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.debug = val; psr 1070 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_irq_control(dev_priv, dev_priv->psr.debug); psr 1072 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 1082 drivers/gpu/drm/i915/display/intel_psr.c struct i915_psr *psr = &dev_priv->psr; psr 1084 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_disable_locked(psr->dp); psr 1085 drivers/gpu/drm/i915/display/intel_psr.c psr->sink_not_reliable = true; psr 1087 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&psr->dp->aux, DP_SET_POWER, DP_SET_POWER_D0); psr 1093 drivers/gpu/drm/i915/display/intel_psr.c container_of(work, typeof(*dev_priv), psr.work); psr 1095 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 1097 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.enabled) psr 1100 drivers/gpu/drm/i915/display/intel_psr.c if (READ_ONCE(dev_priv->psr.irq_aux_error)) psr 1117 drivers/gpu/drm/i915/display/intel_psr.c if (dev_priv->psr.busy_frontbuffer_bits || dev_priv->psr.active) psr 1120 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_activate(dev_priv->psr.dp); psr 1122 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 1147 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 1148 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.enabled) { psr 1149 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 1153 drivers/gpu/drm/i915/display/intel_psr.c frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(dev_priv->psr.pipe); psr 1154 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.busy_frontbuffer_bits |= frontbuffer_bits; psr 1159 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 1184 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 1185 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.enabled) { psr 1186 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 1190 drivers/gpu/drm/i915/display/intel_psr.c frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(dev_priv->psr.pipe); psr 1191 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.busy_frontbuffer_bits &= ~frontbuffer_bits; psr 1197 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) psr 1198 drivers/gpu/drm/i915/display/intel_psr.c schedule_work(&dev_priv->psr.work); psr 1199 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 1219 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.sink_support) psr 1223 drivers/gpu/drm/i915/display/intel_psr.c if (INTEL_GEN(dev_priv) < 9 || !dev_priv->vbt.psr.enable) psr 1238 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.sink_not_reliable = true; psr 1244 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.link_standby = false; psr 1247 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link; psr 1249 drivers/gpu/drm/i915/display/intel_psr.c INIT_WORK(&dev_priv->psr.work, intel_psr_work); psr 1250 drivers/gpu/drm/i915/display/intel_psr.c mutex_init(&dev_priv->psr.lock); psr 1256 drivers/gpu/drm/i915/display/intel_psr.c struct i915_psr *psr = &dev_priv->psr; psr 1265 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&psr->lock); psr 1267 drivers/gpu/drm/i915/display/intel_psr.c if (!psr->enabled || psr->dp != intel_dp) psr 1278 drivers/gpu/drm/i915/display/intel_psr.c psr->sink_not_reliable = true; psr 1298 drivers/gpu/drm/i915/display/intel_psr.c psr->sink_not_reliable = true; psr 1303 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&psr->lock); psr 1314 drivers/gpu/drm/i915/display/intel_psr.c mutex_lock(&dev_priv->psr.lock); psr 1315 drivers/gpu/drm/i915/display/intel_psr.c ret = (dev_priv->psr.dp == intel_dp && dev_priv->psr.enabled); psr 1316 drivers/gpu/drm/i915/display/intel_psr.c mutex_unlock(&dev_priv->psr.lock); psr 15 drivers/gpu/drm/i915/display/intel_psr.h #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) psr 2122 drivers/gpu/drm/i915/i915_debugfs.c if (dev_priv->psr.psr2_enabled) { psr 2165 drivers/gpu/drm/i915/i915_debugfs.c struct i915_psr *psr = &dev_priv->psr; psr 2174 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "Sink support: %s", yesno(psr->sink_support)); psr 2175 drivers/gpu/drm/i915/i915_debugfs.c if (psr->dp) psr 2176 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, " [0x%02x]", psr->dp->psr_dpcd[0]); psr 2179 drivers/gpu/drm/i915/i915_debugfs.c if (!psr->sink_support) psr 2183 drivers/gpu/drm/i915/i915_debugfs.c mutex_lock(&psr->lock); psr 2185 drivers/gpu/drm/i915/i915_debugfs.c if (psr->enabled) psr 2186 drivers/gpu/drm/i915/i915_debugfs.c status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled"; psr 2191 drivers/gpu/drm/i915/i915_debugfs.c if (!psr->enabled) psr 2194 drivers/gpu/drm/i915/i915_debugfs.c if (psr->psr2_enabled) { psr 2205 drivers/gpu/drm/i915/i915_debugfs.c psr->busy_frontbuffer_bits); psr 2215 drivers/gpu/drm/i915/i915_debugfs.c if (psr->debug & I915_PSR_DEBUG_IRQ) { psr 2217 drivers/gpu/drm/i915/i915_debugfs.c psr->last_entry_attempt); psr 2218 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "Last exit at: %lld\n", psr->last_exit); psr 2221 drivers/gpu/drm/i915/i915_debugfs.c if (psr->psr2_enabled) { psr 2245 drivers/gpu/drm/i915/i915_debugfs.c mutex_unlock(&psr->lock); psr 2280 drivers/gpu/drm/i915/i915_debugfs.c *val = READ_ONCE(dev_priv->psr.debug); psr 3032 drivers/gpu/drm/i915/i915_debugfs.c if (dev_priv->psr.enabled) psr 788 drivers/gpu/drm/i915/i915_drv.h } psr; psr 1511 drivers/gpu/drm/i915/i915_drv.h struct i915_psr psr; psr 3687 drivers/gpu/drm/i915/i915_irq.c intel_psr_irq_control(dev_priv, dev_priv->psr.debug); psr 3798 drivers/gpu/drm/i915/i915_irq.c intel_psr_irq_control(dev_priv, dev_priv->psr.debug); psr 321 drivers/media/common/saa7146/saa7146_core.c u32 psr = saa7146_read(dev, PSR); psr 324 drivers/media/common/saa7146/saa7146_core.c dev->name, isr, psr, ssr); psr 731 drivers/net/can/m_can/m_can.c static int m_can_handle_state_errors(struct net_device *dev, u32 psr) psr 736 drivers/net/can/m_can/m_can.c if (psr & PSR_EW && cdev->can.state != CAN_STATE_ERROR_WARNING) { psr 742 drivers/net/can/m_can/m_can.c if (psr & PSR_EP && cdev->can.state != CAN_STATE_ERROR_PASSIVE) { psr 748 drivers/net/can/m_can/m_can.c if (psr & PSR_BO && cdev->can.state != CAN_STATE_BUS_OFF) { psr 773 drivers/net/can/m_can/m_can.c static inline bool is_lec_err(u32 psr) psr 775 drivers/net/can/m_can/m_can.c psr &= LEC_UNUSED; psr 777 drivers/net/can/m_can/m_can.c return psr && (psr != LEC_UNUSED); psr 781 drivers/net/can/m_can/m_can.c u32 psr) psr 791 drivers/net/can/m_can/m_can.c is_lec_err(psr)) psr 792 drivers/net/can/m_can/m_can.c work_done += m_can_handle_lec_err(dev, psr & LEC_UNUSED); psr 804 drivers/net/can/m_can/m_can.c u32 irqstatus, psr; psr 831 drivers/net/can/m_can/m_can.c psr = m_can_read(cdev, M_CAN_PSR); psr 834 drivers/net/can/m_can/m_can.c work_done += m_can_handle_state_errors(dev, psr); psr 837 drivers/net/can/m_can/m_can.c work_done += m_can_handle_bus_errors(dev, irqstatus, psr); psr 2190 drivers/net/ethernet/agere/et131x.c struct pkt_stat_desc *psr; psr 2214 drivers/net/ethernet/agere/et131x.c psr = (struct pkt_stat_desc *)(rx_local->ps_ring_virtaddr) + psr 2220 drivers/net/ethernet/agere/et131x.c len = psr->word1 & 0xFFFF; psr 2221 drivers/net/ethernet/agere/et131x.c ring_index = (psr->word1 >> 26) & 0x03; psr 2223 drivers/net/ethernet/agere/et131x.c buff_index = (psr->word1 >> 16) & 0x3FF; psr 2224 drivers/net/ethernet/agere/et131x.c word0 = psr->word0; psr 692 drivers/net/ethernet/renesas/ravb_main.c u32 ecsr, psr; psr 705 drivers/net/ethernet/renesas/ravb_main.c psr = ravb_read(ndev, PSR); psr 707 drivers/net/ethernet/renesas/ravb_main.c psr ^= PSR_LMON; psr 708 drivers/net/ethernet/renesas/ravb_main.c if (!(psr & PSR_LMON)) { psr 156 drivers/net/wan/n2.c u8 psr = inb(card->io + N2_PSR); psr 157 drivers/net/wan/n2.c outb((psr & ~PSR_PAGEBITS) | page, card->io + N2_PSR); psr 816 drivers/spi/spi-s3c64xx.c u32 psr, speed; psr 824 drivers/spi/spi-s3c64xx.c psr = clk_get_rate(sdd->src_clk) / 2 / spi->max_speed_hz - 1; psr 825 drivers/spi/spi-s3c64xx.c psr &= S3C64XX_SPI_PSR_MASK; psr 826 drivers/spi/spi-s3c64xx.c if (psr == S3C64XX_SPI_PSR_MASK) psr 827 drivers/spi/spi-s3c64xx.c psr--; psr 829 drivers/spi/spi-s3c64xx.c speed = clk_get_rate(sdd->src_clk) / 2 / (psr + 1); psr 831 drivers/spi/spi-s3c64xx.c if (psr+1 < S3C64XX_SPI_PSR_MASK) { psr 832 drivers/spi/spi-s3c64xx.c psr++; psr 839 drivers/spi/spi-s3c64xx.c speed = clk_get_rate(sdd->src_clk) / 2 / (psr + 1); psr 284 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c u8 *psr = NULL, sr = 0; psr 294 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL); psr 311 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c if (psr != NULL) psr 312 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c *psr = 0; /* clear sr */ psr 142 sound/soc/fsl/fsl_esai.c u32 psr, pm = 999, maxfp, prod, sub, savesub, i, j; psr 160 sound/soc/fsl/fsl_esai.c psr = ratio <= 256 * maxfp ? ESAI_xCCR_xPSR_BYPASS : ESAI_xCCR_xPSR_DIV8; psr 170 sound/soc/fsl/fsl_esai.c savesub = (psr ? 1 : 8) * 256 * maxfp / 1000; psr 176 sound/soc/fsl/fsl_esai.c prod = (psr ? 1 : 8) * i * j; psr 209 sound/soc/fsl/fsl_esai.c psr | ESAI_xCCR_xPM(pm)); psr 679 sound/soc/fsl/fsl_ssi.c u32 pm = 999, div2, psr, stccr, mask, afreq, factor, i; psr 714 sound/soc/fsl/fsl_ssi.c psr = 0; psr 717 sound/soc/fsl/fsl_ssi.c factor = (div2 + 1) * (7 * psr + 1) * 2; psr 743 sound/soc/fsl/fsl_ssi.c if (sub < savesub && !(i == 0 && psr == 0 && div2 == 0)) { psr 761 sound/soc/fsl/fsl_ssi.c (psr ? SSI_SxCCR_PSR : 0); psr 873 sound/soc/samsung/i2s.c u32 psr; psr 919 sound/soc/samsung/i2s.c psr = priv->rclk_srcrate / i2s->frmclk / rfs; psr 920 sound/soc/samsung/i2s.c writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR); psr 923 sound/soc/samsung/i2s.c priv->rclk_srcrate, psr, rfs, bfs); psr 35 sound/soc/samsung/snow.c int bfs, psr, rfs, bitwidth; psr 78 sound/soc/samsung/snow.c for (psr = 8; psr > 0; psr /= 2) { psr 80 sound/soc/samsung/snow.c if ((pll_rate[i] - rclk * psr) <= 2) {