QPOLB 903 drivers/pinctrl/sh-pfc/pfc-r8a7778.c PINMUX_IPSR_GPSR(IP5_20_18, QPOLB), QPOLB 872 drivers/pinctrl/sh-pfc/pfc-r8a7779.c PINMUX_IPSR_GPSR(IP4_4_2, QPOLB), QPOLB 1718 drivers/pinctrl/sh-pfc/pfc-r8a7790.c PINMUX_IPSR_GPSR(IP16_5_3, QPOLB), QPOLB 1298 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_IPSR_GPSR(IP9_18_17, QPOLB), QPOLB 995 drivers/pinctrl/sh-pfc/pfc-r8a7794.c PINMUX_IPSR_GPSR(IP6_7_6, QPOLB), QPOLB 260 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) QPOLB 669 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_GPSR(IP0_27_24, QPOLB), QPOLB 261 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) QPOLB 675 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_GPSR(IP0_27_24, QPOLB), QPOLB 265 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) QPOLB 679 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_GPSR(IP0_27_24, QPOLB), QPOLB 266 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) QPOLB 681 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_GPSR(IP0_27_24, QPOLB), QPOLB 278 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP7_27_24 FM(SDA4) FM(WE1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI4_DATA7_B) FM(VI5_DATA7_B) FM(QPOLB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) QPOLB 966 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_GPSR(IP7_27_24, QPOLB), QPOLB 46 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define GPSR1_31 F_(QPOLB, IP4_27_24) QPOLB 239 drivers/pinctrl/sh-pfc/pfc-r8a77995.c #define IP4_27_24 FM(QPOLB) F_(0, 0) FM(TX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) QPOLB 675 drivers/pinctrl/sh-pfc/pfc-r8a77995.c PINMUX_IPSR_GPSR(IP4_27_24, QPOLB),