prt0              333 arch/mips/cavium-octeon/executive/cvmx-spi.c 			srxx_spi4_calx.s.prt0 = port++;
prt0              396 arch/mips/cavium-octeon/executive/cvmx-spi.c 			stxx_spi4_calx.s.prt0 = port++;
prt0              450 arch/mips/include/asm/octeon/cvmx-sriox-defs.h 		uint64_t prt0:1;
prt0              466 arch/mips/include/asm/octeon/cvmx-sriox-defs.h 		uint64_t prt0:1;
prt0               79 arch/mips/include/asm/octeon/cvmx-srxx-defs.h 		uint64_t prt0:4;
prt0               81 arch/mips/include/asm/octeon/cvmx-srxx-defs.h 		uint64_t prt0:4;
prt0              232 arch/mips/include/asm/octeon/cvmx-stxx-defs.h 		uint64_t prt0:4;
prt0              234 arch/mips/include/asm/octeon/cvmx-stxx-defs.h 		uint64_t prt0:4;