prio_mask        1893 arch/mips/include/asm/octeon/cvmx-pow.h 			uint32_t prio_mask = 0;
prio_mask        1897 arch/mips/include/asm/octeon/cvmx-pow.h 					prio_mask |= 1 << priority[i];
prio_mask        1899 arch/mips/include/asm/octeon/cvmx-pow.h 			if (prio_mask ^ ((1 << cvmx_pop(prio_mask)) - 1)) {
prio_mask        1902 arch/mips/include/asm/octeon/cvmx-pow.h 				     (unsigned long long)prio_mask);
prio_mask          38 arch/powerpc/sysdev/ipic.c 		.prio_mask = 0,
prio_mask          45 arch/powerpc/sysdev/ipic.c 		.prio_mask = 1,
prio_mask          52 arch/powerpc/sysdev/ipic.c 		.prio_mask = 2,
prio_mask          59 arch/powerpc/sysdev/ipic.c 		.prio_mask = 3,
prio_mask          66 arch/powerpc/sysdev/ipic.c 		.prio_mask = 4,
prio_mask          73 arch/powerpc/sysdev/ipic.c 		.prio_mask = 5,
prio_mask          80 arch/powerpc/sysdev/ipic.c 		.prio_mask = 6,
prio_mask          87 arch/powerpc/sysdev/ipic.c 		.prio_mask = 7,
prio_mask          94 arch/powerpc/sysdev/ipic.c 		.prio_mask = 0,
prio_mask         101 arch/powerpc/sysdev/ipic.c 		.prio_mask = 1,
prio_mask         108 arch/powerpc/sysdev/ipic.c 		.prio_mask = 2,
prio_mask         115 arch/powerpc/sysdev/ipic.c 		.prio_mask = 3,
prio_mask         122 arch/powerpc/sysdev/ipic.c 		.prio_mask = 4,
prio_mask         129 arch/powerpc/sysdev/ipic.c 		.prio_mask = 5,
prio_mask         136 arch/powerpc/sysdev/ipic.c 		.prio_mask = 6,
prio_mask         143 arch/powerpc/sysdev/ipic.c 		.prio_mask = 7,
prio_mask         151 arch/powerpc/sysdev/ipic.c 		.prio_mask = 5,
prio_mask         159 arch/powerpc/sysdev/ipic.c 		.prio_mask = 6,
prio_mask         167 arch/powerpc/sysdev/ipic.c 		.prio_mask = 7,
prio_mask         175 arch/powerpc/sysdev/ipic.c 		.prio_mask = 4,
prio_mask         183 arch/powerpc/sysdev/ipic.c 		.prio_mask = 5,
prio_mask         191 arch/powerpc/sysdev/ipic.c 		.prio_mask = 6,
prio_mask         199 arch/powerpc/sysdev/ipic.c 		.prio_mask = 7,
prio_mask         206 arch/powerpc/sysdev/ipic.c 		.prio_mask = 0,
prio_mask         213 arch/powerpc/sysdev/ipic.c 		.prio_mask = 1,
prio_mask         220 arch/powerpc/sysdev/ipic.c 		.prio_mask = 2,
prio_mask         227 arch/powerpc/sysdev/ipic.c 		.prio_mask = 3,
prio_mask         234 arch/powerpc/sysdev/ipic.c 		.prio_mask = 4,
prio_mask         241 arch/powerpc/sysdev/ipic.c 		.prio_mask = 5,
prio_mask         248 arch/powerpc/sysdev/ipic.c 		.prio_mask = 6,
prio_mask         255 arch/powerpc/sysdev/ipic.c 		.prio_mask = 7,
prio_mask         262 arch/powerpc/sysdev/ipic.c 		.prio_mask = 0,
prio_mask         269 arch/powerpc/sysdev/ipic.c 		.prio_mask = 1,
prio_mask         276 arch/powerpc/sysdev/ipic.c 		.prio_mask = 2,
prio_mask         283 arch/powerpc/sysdev/ipic.c 		.prio_mask = 3,
prio_mask         290 arch/powerpc/sysdev/ipic.c 		.prio_mask = 4,
prio_mask         297 arch/powerpc/sysdev/ipic.c 		.prio_mask = 5,
prio_mask         304 arch/powerpc/sysdev/ipic.c 		.prio_mask = 6,
prio_mask         311 arch/powerpc/sysdev/ipic.c 		.prio_mask = 7,
prio_mask         319 arch/powerpc/sysdev/ipic.c 		.prio_mask = 4,
prio_mask         326 arch/powerpc/sysdev/ipic.c 		.prio_mask = 0,
prio_mask         333 arch/powerpc/sysdev/ipic.c 		.prio_mask = 1,
prio_mask         340 arch/powerpc/sysdev/ipic.c 		.prio_mask = 2,
prio_mask         347 arch/powerpc/sysdev/ipic.c 		.prio_mask = 3,
prio_mask         354 arch/powerpc/sysdev/ipic.c 		.prio_mask = 0,
prio_mask         361 arch/powerpc/sysdev/ipic.c 		.prio_mask = 1,
prio_mask         368 arch/powerpc/sysdev/ipic.c 		.prio_mask = 2,
prio_mask         375 arch/powerpc/sysdev/ipic.c 		.prio_mask = 3,
prio_mask          53 arch/powerpc/sysdev/ipic.h 	u8	prio_mask;	/* priority mask value */
prio_mask        1101 drivers/net/ethernet/freescale/gianfar_ethtool.c 	u32 prio = 0, prio_mask = 0;
prio_mask        1119 drivers/net/ethernet/freescale/gianfar_ethtool.c 		prio_mask = vlan_tci_priom(rule);
prio_mask        1169 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_set_attribute(prio, prio_mask, RQFCR_PID_PRI, tab);
prio_mask         215 drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c 	u8 prio_mask = BIT(up);
prio_mask         228 drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c 		if (prio_mask & tc_config[tc].path[direction].up_to_tc_bitmap)
prio_mask         740 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c 	u8 prio_val, prio_mask = 0;
prio_mask         755 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c 		prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
prio_mask         759 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c 	if (!vlan_present || !prio_mask) {
prio_mask         761 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c 	} else if (prio_mask != 0x7) {
prio_mask         277 drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c 	u8 prio_mask;
prio_mask         279 drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c 	prio_mask = dcb_ieee_getapp_default_prio_mask(mlxsw_sp_port->dev);
prio_mask         280 drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c 	if (prio_mask)
prio_mask         282 drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c 		return fls(prio_mask) - 1;