PwrCfgCmd          45 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 	WLAN_PWR_CFG PwrCfgCmd;
PwrCfgCmd          54 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 		PwrCfgCmd = PwrSeqCmd[AryIdx];
PwrCfgCmd          61 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_OFFSET(PwrCfgCmd),
PwrCfgCmd          62 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
PwrCfgCmd          63 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
PwrCfgCmd          64 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
PwrCfgCmd          65 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_BASE(PwrCfgCmd),
PwrCfgCmd          66 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_CMD(PwrCfgCmd),
PwrCfgCmd          67 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_MASK(PwrCfgCmd),
PwrCfgCmd          68 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				GET_PWR_CFG_VALUE(PwrCfgCmd)
PwrCfgCmd          74 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 			(GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
PwrCfgCmd          75 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 			(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
PwrCfgCmd          76 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 			(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)
PwrCfgCmd          78 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 			switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
PwrCfgCmd          93 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
PwrCfgCmd          99 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) {
PwrCfgCmd         103 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 					value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
PwrCfgCmd         105 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 						GET_PWR_CFG_VALUE(PwrCfgCmd) &
PwrCfgCmd         106 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 						GET_PWR_CFG_MASK(PwrCfgCmd)
PwrCfgCmd         115 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 					value &= (~(GET_PWR_CFG_MASK(PwrCfgCmd)));
PwrCfgCmd         117 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 						GET_PWR_CFG_VALUE(PwrCfgCmd)
PwrCfgCmd         118 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 						&GET_PWR_CFG_MASK(PwrCfgCmd)
PwrCfgCmd         134 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
PwrCfgCmd         136 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 					if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
PwrCfgCmd         141 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 					value = value&GET_PWR_CFG_MASK(PwrCfgCmd);
PwrCfgCmd         143 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 						value == (GET_PWR_CFG_VALUE(PwrCfgCmd) &
PwrCfgCmd         144 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 						GET_PWR_CFG_MASK(PwrCfgCmd))
PwrCfgCmd         168 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 				if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
PwrCfgCmd         169 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 					udelay(GET_PWR_CFG_OFFSET(PwrCfgCmd));
PwrCfgCmd         171 drivers/staging/rtl8723bs/hal/HalPwrSeqCmd.c 					udelay(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
PwrCfgCmd         122 drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h 	WLAN_PWR_CFG	PwrCfgCmd[]);