primary_pipe      512 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		struct pipe_ctx *primary_pipe,
primary_pipe      517 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	if (!primary_pipe->plane_state)
primary_pipe      520 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	*secondary_pipe = *primary_pipe;
primary_pipe      529 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	if (primary_pipe->bottom_pipe) {
primary_pipe      530 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		ASSERT(primary_pipe->bottom_pipe != secondary_pipe);
primary_pipe      531 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe;
primary_pipe      534 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	primary_pipe->bottom_pipe = secondary_pipe;
primary_pipe      535 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	secondary_pipe->top_pipe = primary_pipe;
primary_pipe      537 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	resource_build_scaling_params(primary_pipe);
primary_pipe     1071 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		const struct pipe_ctx *primary_pipe)
primary_pipe     1104 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	if (primary_pipe) {
primary_pipe     1105 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 		int preferred_pipe_idx = (pool->pipe_count - 1) - primary_pipe->pipe_idx;
primary_pipe     1803 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct pipe_ctx *primary_pipe,
primary_pipe     1809 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	*secondary_pipe = *primary_pipe;
primary_pipe     1822 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	if (primary_pipe->bottom_pipe && primary_pipe->bottom_pipe != secondary_pipe) {
primary_pipe     1824 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe;
primary_pipe     1827 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	primary_pipe->bottom_pipe = secondary_pipe;
primary_pipe     1828 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	secondary_pipe->top_pipe = primary_pipe;
primary_pipe     1830 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	ASSERT(primary_pipe->plane_state);
primary_pipe     1831 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	resource_build_scaling_params(primary_pipe);
primary_pipe     2291 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		const struct pipe_ctx *primary_pipe)
primary_pipe     2295 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	if (dc && primary_pipe) {
primary_pipe     2306 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		if (dc->current_state->res_ctx.pipe_ctx[primary_pipe->pipe_idx].bottom_pipe) {
primary_pipe     2307 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			preferred_pipe_idx = dc->current_state->res_ctx.pipe_ctx[primary_pipe->pipe_idx].bottom_pipe->pipe_idx;
primary_pipe     2312 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		} else if (dc->current_state->res_ctx.pipe_ctx[primary_pipe->pipe_idx].next_odm_pipe) {
primary_pipe     2313 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			preferred_pipe_idx = dc->current_state->res_ctx.pipe_ctx[primary_pipe->pipe_idx].next_odm_pipe->pipe_idx;
primary_pipe      143 drivers/gpu/drm/amd/display/dc/inc/resource.h 		const struct pipe_ctx *primary_pipe);