pps_val 491 drivers/gpu/drm/i915/display/intel_vdsc.c u32 pps_val = 0; pps_val 498 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = DSC_VER_MAJ | vdsc_cfg->dsc_version_minor << pps_val 503 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_BLOCK_PREDICTION; pps_val 505 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_COLOR_SPACE_CONVERSION; pps_val 507 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_422_ENABLE; pps_val 509 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_VBR_ENABLE; pps_val 510 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS0 = 0x%08x\n", pps_val); pps_val 512 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_0, pps_val); pps_val 518 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_0, pps_val); pps_val 520 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe), pps_val); pps_val 523 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 527 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 528 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_BPP(vdsc_cfg->bits_per_pixel); pps_val 529 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS1 = 0x%08x\n", pps_val); pps_val 531 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_1, pps_val); pps_val 537 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_1, pps_val); pps_val 539 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe), pps_val); pps_val 542 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 546 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 547 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) | pps_val 549 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS2 = 0x%08x\n", pps_val); pps_val 551 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_2, pps_val); pps_val 557 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_2, pps_val); pps_val 559 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe), pps_val); pps_val 562 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 566 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 567 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) | pps_val 569 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS3 = 0x%08x\n", pps_val); pps_val 571 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_3, pps_val); pps_val 577 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_3, pps_val); pps_val 579 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_3(pipe), pps_val); pps_val 582 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 586 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 587 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) | pps_val 589 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS4 = 0x%08x\n", pps_val); pps_val 591 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_4, pps_val); pps_val 597 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_4, pps_val); pps_val 599 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_4(pipe), pps_val); pps_val 602 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 606 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 607 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) | pps_val 609 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS5 = 0x%08x\n", pps_val); pps_val 611 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_5, pps_val); pps_val 617 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_5, pps_val); pps_val 619 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_5(pipe), pps_val); pps_val 622 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 626 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 627 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_INITIAL_SCALE_VALUE(vdsc_cfg->initial_scale_value) | pps_val 631 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS6 = 0x%08x\n", pps_val); pps_val 633 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_6, pps_val); pps_val 639 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_6, pps_val); pps_val 641 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_6(pipe), pps_val); pps_val 644 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 648 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 649 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) | pps_val 651 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS7 = 0x%08x\n", pps_val); pps_val 653 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_7, pps_val); pps_val 659 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_7, pps_val); pps_val 661 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_7(pipe), pps_val); pps_val 664 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 668 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 669 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) | pps_val 671 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS8 = 0x%08x\n", pps_val); pps_val 673 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_8, pps_val); pps_val 679 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_8, pps_val); pps_val 681 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_8(pipe), pps_val); pps_val 684 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 688 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 689 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_RC_MODEL_SIZE(DSC_RC_MODEL_SIZE_CONST) | pps_val 691 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS9 = 0x%08x\n", pps_val); pps_val 693 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_9, pps_val); pps_val 699 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_9, pps_val); pps_val 701 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_9(pipe), pps_val); pps_val 704 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 708 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 709 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_RC_QUANT_INC_LIMIT0(vdsc_cfg->rc_quant_incr_limit0) | pps_val 713 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS10 = 0x%08x\n", pps_val); pps_val 715 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_10, pps_val); pps_val 721 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_10, pps_val); pps_val 723 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_10(pipe), pps_val); pps_val 726 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val); pps_val 730 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val = 0; pps_val 731 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val |= DSC_SLICE_CHUNK_SIZE(vdsc_cfg->slice_chunk_size) | pps_val 736 drivers/gpu/drm/i915/display/intel_vdsc.c DRM_INFO("PPS16 = 0x%08x\n", pps_val); pps_val 738 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCA_PICTURE_PARAMETER_SET_16, pps_val); pps_val 744 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(DSCC_PICTURE_PARAMETER_SET_16, pps_val); pps_val 746 drivers/gpu/drm/i915/display/intel_vdsc.c I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_16(pipe), pps_val); pps_val 749 drivers/gpu/drm/i915/display/intel_vdsc.c pps_val);