PixelClockBackEnd 1786 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 						mode_lib->vba.PixelClockBackEnd[k] / 6
PixelClockBackEnd 1793 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 						mode_lib->vba.PixelClockBackEnd[k] / 3
PixelClockBackEnd 1838 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 					/ mode_lib->vba.PixelClockBackEnd[k];
PixelClockBackEnd 4051 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 							dml_min(600.0, mode_lib->vba.PHYCLKPerState[i]) / mode_lib->vba.PixelClockBackEnd[k] * 24,
PixelClockBackEnd 4067 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4074 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4096 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4103 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4127 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4134 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4187 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 							if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor
PixelClockBackEnd 4193 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 							if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor
PixelClockBackEnd 4231 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) {
PixelClockBackEnd 4233 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 						mode_lib->vba.PixelClockBackEnd[k] / 400.0,
PixelClockBackEnd 4235 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) {
PixelClockBackEnd 4237 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) {
PixelClockBackEnd 4239 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 340.0) {
PixelClockBackEnd 4275 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 						locals->DSCDelayPerState[i][k] * mode_lib->vba.PixelClock[k] / mode_lib->vba.PixelClockBackEnd[k];
PixelClockBackEnd 1821 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 						mode_lib->vba.PixelClockBackEnd[k] / 6
PixelClockBackEnd 1828 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 						mode_lib->vba.PixelClockBackEnd[k] / 3
PixelClockBackEnd 1873 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 					/ mode_lib->vba.PixelClockBackEnd[k];
PixelClockBackEnd 4083 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 							dml_min(600.0, mode_lib->vba.PHYCLKPerState[i]) / mode_lib->vba.PixelClockBackEnd[k] * 24,
PixelClockBackEnd 4099 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4106 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4128 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4135 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4159 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4166 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4219 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 							if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor
PixelClockBackEnd 4225 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 							if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor
PixelClockBackEnd 4263 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) {
PixelClockBackEnd 4265 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 						mode_lib->vba.PixelClockBackEnd[k] / 400.0,
PixelClockBackEnd 4267 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) {
PixelClockBackEnd 4269 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) {
PixelClockBackEnd 4271 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 340.0) {
PixelClockBackEnd 4307 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 						locals->DSCDelayPerState[i][k] * mode_lib->vba.PixelClock[k] / mode_lib->vba.PixelClockBackEnd[k];
PixelClockBackEnd 1773 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						mode_lib->vba.PixelClockBackEnd[k] / 6
PixelClockBackEnd 1780 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						mode_lib->vba.PixelClockBackEnd[k] / 3
PixelClockBackEnd 1825 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					/ mode_lib->vba.PixelClockBackEnd[k];
PixelClockBackEnd 4123 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 							dml_min(600.0, mode_lib->vba.PHYCLKPerState[i]) / mode_lib->vba.PixelClockBackEnd[k] * 24,
PixelClockBackEnd 4140 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4148 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4171 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4179 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4204 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4212 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 								* mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0,
PixelClockBackEnd 4266 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 							if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor
PixelClockBackEnd 4272 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 							if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor
PixelClockBackEnd 4310 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) {
PixelClockBackEnd 4312 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						mode_lib->vba.PixelClockBackEnd[k] / 400.0,
PixelClockBackEnd 4314 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) {
PixelClockBackEnd 4316 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) {
PixelClockBackEnd 4318 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			} else if (mode_lib->vba.PixelClockBackEnd[k] > 340.0) {
PixelClockBackEnd 4354 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 						locals->DSCDelayPerState[i][k] * mode_lib->vba.PixelClock[k] / mode_lib->vba.PixelClockBackEnd[k];
PixelClockBackEnd  506 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c 		mode_lib->vba.PixelClockBackEnd[mode_lib->vba.NumberOfActivePlanes] = dst->pixel_rate_mhz;
PixelClockBackEnd  780 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c 			mode_lib->vba.PixelClock[k] = 2 * mode_lib->vba.PixelClockBackEnd[k];
PixelClockBackEnd  291 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double PixelClockBackEnd[DC__NUM_DPP__MAX];