ppll_div_3        879 drivers/gpu/drm/radeon/radeon_legacy_tv.c 				  uint32_t *ppll_div_3, uint32_t *pixclks_cntl)
ppll_div_3        892 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	*ppll_div_3 = (const_ptr->crtcPLL_N & 0x7ff) | (get_post_div(const_ptr->crtcPLL_post_div) << 16);
ppll_div_3        962 drivers/gpu/drm/radeon/radeon_mode.h 				  uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
ppll_div_3       1351 drivers/video/fbdev/aty/radeon_base.c 	save->ppll_div_3 = INPLL(PPLL_DIV_3);
ppll_div_3       1372 drivers/video/fbdev/aty/radeon_base.c 		    (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) &
ppll_div_3       1421 drivers/video/fbdev/aty/radeon_base.c 	OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK);
ppll_div_3       1422 drivers/video/fbdev/aty/radeon_base.c 	OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK);
ppll_div_3       1640 drivers/video/fbdev/aty/radeon_base.c 	regs->ppll_div_3 = fb_div | (post_div->bitvalue << 16);
ppll_div_3       1644 drivers/video/fbdev/aty/radeon_base.c 	pr_debug("ppll_div_3 = 0x%x\n", regs->ppll_div_3);
ppll_div_3       1708 drivers/video/fbdev/aty/radeon_base.c 			newmode->ppll_div_3 = rinfo->panel_info.fbk_divider |
ppll_div_3        236 drivers/video/fbdev/aty/radeonfb.h 	u32		ppll_div_3;